diff --git a/drm-fixes.patch b/drm-fixes.patch
index 700f43c4d..4d80be1eb 100644
--- a/drm-fixes.patch
+++ b/drm-fixes.patch
@@ -57,6 +57,19 @@ index f7af91c..7ca5935 100644
  			changed = true;
  	}
  
+diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
+index f737960..b1f8164 100644
+--- a/drivers/gpu/drm/i915/i915_drv.c
++++ b/drivers/gpu/drm/i915/i915_drv.c
+@@ -509,6 +509,8 @@ i915_pci_remove(struct pci_dev *pdev)
+ {
+ 	struct drm_device *dev = pci_get_drvdata(pdev);
+ 
++	pci_disable_device(pdev); /* core did previous enable */
++
+ 	drm_put_dev(dev);
+ }
+ 
 diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
 index 17b1cba..5e54821 100644
 --- a/drivers/gpu/drm/i915/i915_gem.c
@@ -798,7 +811,7 @@ index bee24b1..255b52e 100644
  	if (HAS_PCH_SPLIT(dev)) {
  		dpd_is_edp = intel_dpd_is_edp(dev);
 diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index c8e0055..300f64b 100644
+index c8e0055..2e3db37 100644
 --- a/drivers/gpu/drm/i915/intel_dp.c
 +++ b/drivers/gpu/drm/i915/intel_dp.c
 @@ -584,17 +584,6 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
@@ -839,7 +852,34 @@ index c8e0055..300f64b 100644
  	return false;
  }
  
-@@ -1087,21 +1089,11 @@ intel_get_adjust_train(struct intel_dp *intel_dp)
+@@ -793,7 +795,8 @@ static bool ironlake_edp_panel_on (struct intel_dp *intel_dp)
+ {
+ 	struct drm_device *dev = intel_dp->base.base.dev;
+ 	struct drm_i915_private *dev_priv = dev->dev_private;
+-	u32 pp, idle_on_mask = PP_ON | PP_SEQUENCE_STATE_ON_IDLE;
++	u32 pp, idle_on = PP_ON | PP_SEQUENCE_STATE_ON_IDLE;
++	u32 idle_on_mask = PP_ON | PP_SEQUENCE_STATE_MASK;
+ 
+ 	if (I915_READ(PCH_PP_STATUS) & PP_ON)
+ 		return true;
+@@ -814,7 +817,7 @@ static bool ironlake_edp_panel_on (struct intel_dp *intel_dp)
+ 	 */
+ 	msleep(300);
+ 
+-	if (wait_for((I915_READ(PCH_PP_STATUS) & idle_on_mask) == idle_on_mask,
++	if (wait_for((I915_READ(PCH_PP_STATUS) & idle_on_mask) == idle_on,
+ 		     5000))
+ 		DRM_ERROR("panel on wait timed out: 0x%08x\n",
+ 			  I915_READ(PCH_PP_STATUS));
+@@ -920,6 +923,7 @@ static void intel_dp_prepare(struct drm_encoder *encoder)
+ 
+ 	if (is_edp(intel_dp)) {
+ 		ironlake_edp_backlight_off(dev);
++		ironlake_edp_panel_off(dev);
+ 		ironlake_edp_panel_on(intel_dp);
+ 		if (!is_pch_edp(intel_dp))
+ 			ironlake_edp_pll_on(encoder);
+@@ -1087,21 +1091,11 @@ intel_get_adjust_train(struct intel_dp *intel_dp)
  }
  
  static uint32_t
@@ -864,7 +904,7 @@ index c8e0055..300f64b 100644
  	case DP_TRAIN_VOLTAGE_SWING_400:
  	default:
  		signal_levels |= DP_VOLTAGE_0_4;
-@@ -1116,7 +1108,7 @@ intel_dp_signal_levels(struct intel_dp *intel_dp)
+@@ -1116,7 +1110,7 @@ intel_dp_signal_levels(struct intel_dp *intel_dp)
  		signal_levels |= DP_VOLTAGE_1_2;
  		break;
  	}
@@ -873,7 +913,7 @@ index c8e0055..300f64b 100644
  	case DP_TRAIN_PRE_EMPHASIS_0:
  	default:
  		signal_levels |= DP_PRE_EMPHASIS_0;
-@@ -1203,18 +1195,6 @@ intel_channel_eq_ok(struct intel_dp *intel_dp)
+@@ -1203,18 +1197,6 @@ intel_channel_eq_ok(struct intel_dp *intel_dp)
  }
  
  static bool
@@ -892,7 +932,7 @@ index c8e0055..300f64b 100644
  intel_dp_set_link_train(struct intel_dp *intel_dp,
  			uint32_t dp_reg_value,
  			uint8_t dp_train_pat)
-@@ -1226,9 +1206,6 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
+@@ -1226,9 +1208,6 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
  	I915_WRITE(intel_dp->output_reg, dp_reg_value);
  	POSTING_READ(intel_dp->output_reg);
  
@@ -902,7 +942,7 @@ index c8e0055..300f64b 100644
  	intel_dp_aux_native_write_1(intel_dp,
  				    DP_TRAINING_PATTERN_SET,
  				    dp_train_pat);
-@@ -1261,11 +1238,10 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
+@@ -1261,11 +1240,10 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
  	POSTING_READ(intel_dp->output_reg);
  	intel_wait_for_vblank(dev, intel_crtc->pipe);
  
@@ -918,7 +958,7 @@ index c8e0055..300f64b 100644
  
  	DP |= DP_PORT_EN;
  	if (HAS_PCH_CPT(dev) && !is_edp(intel_dp))
-@@ -1283,7 +1259,7 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
+@@ -1283,7 +1261,7 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
  			signal_levels = intel_gen6_edp_signal_levels(intel_dp->train_set[0]);
  			DP = (DP & ~EDP_LINK_TRAIN_VOL_EMP_MASK_SNB) | signal_levels;
  		} else {
@@ -927,7 +967,7 @@ index c8e0055..300f64b 100644
  			DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels;
  		}
  
-@@ -1297,37 +1273,33 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
+@@ -1297,37 +1275,33 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
  			break;
  		/* Set training pattern 1 */
  
@@ -986,7 +1026,7 @@ index c8e0055..300f64b 100644
  	}
  
  	intel_dp->DP = DP;
-@@ -1354,7 +1326,7 @@ intel_dp_complete_link_train(struct intel_dp *intel_dp)
+@@ -1354,7 +1328,7 @@ intel_dp_complete_link_train(struct intel_dp *intel_dp)
  			signal_levels = intel_gen6_edp_signal_levels(intel_dp->train_set[0]);
  			DP = (DP & ~EDP_LINK_TRAIN_VOL_EMP_MASK_SNB) | signal_levels;
  		} else {
@@ -995,7 +1035,7 @@ index c8e0055..300f64b 100644
  			DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels;
  		}
  
-@@ -1368,28 +1340,24 @@ intel_dp_complete_link_train(struct intel_dp *intel_dp)
+@@ -1368,28 +1342,24 @@ intel_dp_complete_link_train(struct intel_dp *intel_dp)
  					     DP_TRAINING_PATTERN_2))
  			break;
  
diff --git a/kernel.spec b/kernel.spec
index 67b66b60e..b01ba32a2 100644
--- a/kernel.spec
+++ b/kernel.spec
@@ -1915,6 +1915,7 @@ fi
 * Wed Dec 01 2010 Kyle McMartin <kyle@redhat.com> 2.6.37-0.rc4.git1.1
 - Linux 2.6.37-rc4-git1
 - Pull in DRM fixes that are queued for -rc5 [3074adc8]
+  + edp-fixes on top
 
 * Tue Nov 30 2010 Kyle McMartin <kyle@redhat.com> 2.6.37-0.rc4.git0.1
 - Linux 2.6.37-rc4