Update riscv64 configs
Signed-off-by: David Abdurachmanov <davidlt@rivosinc.com>
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@ -4168,8 +4168,8 @@ CONFIG_NLS_UTF8=m
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CONFIG_NLS=y
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# CONFIG_NOA1305 is not set
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CONFIG_NODES_SHIFT=2
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# CONFIG_NO_HZ_FULL is not set
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CONFIG_NO_HZ_IDLE=y
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CONFIG_NO_HZ_FULL=y
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# CONFIG_NO_HZ_IDLE is not set
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CONFIG_NO_HZ=y
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CONFIG_NOP_USB_XCEIV=m
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CONFIG_NORTEL_HERMES=m
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@ -4824,12 +4824,16 @@ CONFIG_RIONET_TX_SIZE=128
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CONFIG_RISCV_BASE_PMU=y
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# CONFIG_RISCV_BOOT_SPINWAIT is not set
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CONFIG_RISCV_ERRATA_ALTERNATIVE=y
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CONFIG_RISCV_INTC=y
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CONFIG_RISCV_ISA_C=y
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CONFIG_RISCV_PLIC=y
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CONFIG_RISCV_PMU_LEGACY=y
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CONFIG_RISCV_PMU_SBI=y
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CONFIG_RISCV_PMU=y
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CONFIG_RISCV_SBI_CPUIDLE=y
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# CONFIG_RISCV_SBI_V01 is not set
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CONFIG_RISCV_SBI=y
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CONFIG_RISCV_TIMER=y
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CONFIG_RMI4_CORE=m
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CONFIG_RMI4_F03=y
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CONFIG_RMI4_F11=y
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@ -4148,8 +4148,8 @@ CONFIG_NLS_UTF8=m
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CONFIG_NLS=y
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# CONFIG_NOA1305 is not set
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CONFIG_NODES_SHIFT=2
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# CONFIG_NO_HZ_FULL is not set
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CONFIG_NO_HZ_IDLE=y
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CONFIG_NO_HZ_FULL=y
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# CONFIG_NO_HZ_IDLE is not set
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CONFIG_NO_HZ=y
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CONFIG_NOP_USB_XCEIV=m
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CONFIG_NORTEL_HERMES=m
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@ -4803,12 +4803,16 @@ CONFIG_RIONET_TX_SIZE=128
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CONFIG_RISCV_BASE_PMU=y
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# CONFIG_RISCV_BOOT_SPINWAIT is not set
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CONFIG_RISCV_ERRATA_ALTERNATIVE=y
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CONFIG_RISCV_INTC=y
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CONFIG_RISCV_ISA_C=y
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CONFIG_RISCV_PLIC=y
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CONFIG_RISCV_PMU_LEGACY=y
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CONFIG_RISCV_PMU_SBI=y
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CONFIG_RISCV_PMU=y
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CONFIG_RISCV_SBI_CPUIDLE=y
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# CONFIG_RISCV_SBI_V01 is not set
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CONFIG_RISCV_SBI=y
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CONFIG_RISCV_TIMER=y
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CONFIG_RMI4_CORE=m
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CONFIG_RMI4_F03=y
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CONFIG_RMI4_F11=y
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