largish update for ARMv7 and aarch64

- Updates and new SoCs for aarch64 and ARMv7
- Add aarch64 support for PINE64 and Geekbox devices
- Fix ethernet naming on Armada 38x devices
- Serial console fixes for Tegra
This commit is contained in:
Peter Robinson 2016-03-06 18:50:49 +00:00
parent 519148ae7b
commit 6c5f57724d
9 changed files with 2885 additions and 64 deletions

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@ -0,0 +1,101 @@
From patchwork Wed Jan 27 15:08:19 2016
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [1/2] ARM: mvebu: change order of ethernet DT nodes on Armada 38x
From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
X-Patchwork-Id: 8134751
Message-Id: <1453907300-28283-2-git-send-email-thomas.petazzoni@free-electrons.com>
To: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
Gregory Clement <gregory.clement@free-electrons.com>
Cc: Nadav Haklai <nadavh@marvell.com>, Lior Amsalem <alior@marvell.com>,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
linux-arm-kernel@lists.infradead.org
Date: Wed, 27 Jan 2016 16:08:19 +0100
On Armada 38x, the available network interfaces are:
- port 0, at 0x70000
- port 1, at 0x30000
- port 2, at 0x34000
Due to the rule saying that DT nodes should be ordered by register
addresses, the network interfaces are probed in this order:
- port 1, at 0x30000, which gets named eth0
- port 2, at 0x34000, which gets named eth1
- port 0, at 0x70000, which gets named eth2
(if all three ports are enabled at the board level)
Unfortunately, the network subsystem doesn't provide any way to rename
network interfaces from the kernel (it can only be done from
userspace). So, the default naming of the network interfaces is very
confusing as it doesn't match the datasheet, nor the naming of the
interfaces in the bootloader, nor the naming of the interfaces on
labels printed on the board.
For example, on the Armada 388 GP, the board has two ports, labelled
GE0 and GE1. One has to know that GE0 is eth1 and GE1 is eth0, which
isn't really obvious.
In order to solve this, this patch proposes to exceptionaly violate
the rule of "order DT nodes by register address", and put the 0x70000
node before the 0x30000 node, so that network interfaces get named in
a more natural way.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/boot/dts/armada-38x.dtsi | 30 +++++++++++++++++++++---------
1 file changed, 21 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index e8b7f67..b50784d 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -429,6 +429,27 @@
reg = <0x22000 0x1000>;
};
+ /*
+ * As a special exception to the "order by
+ * register address" rule, the eth0 node is
+ * placed here to ensure that it gets
+ * registered as the first interface, since
+ * the network subsystem doesn't allow naming
+ * interfaces using DT aliases. Without this,
+ * the ordering of interfaces is different
+ * from the one used in U-Boot and the
+ * labeling of interfaces on the boards, which
+ * is very confusing for users.
+ */
+ eth0: ethernet@70000 {
+ compatible = "marvell,armada-370-neta";
+ reg = <0x70000 0x4000>;
+ interrupts-extended = <&mpic 8>;
+ clocks = <&gateclk 4>;
+ tx-csum-limit = <9800>;
+ status = "disabled";
+ };
+
eth1: ethernet@30000 {
compatible = "marvell,armada-370-neta";
reg = <0x30000 0x4000>;
@@ -493,15 +514,6 @@
};
};
- eth0: ethernet@70000 {
- compatible = "marvell,armada-370-neta";
- reg = <0x70000 0x4000>;
- interrupts-extended = <&mpic 8>;
- clocks = <&gateclk 4>;
- tx-csum-limit = <9800>;
- status = "disabled";
- };
-
mdio: mdio@72004 {
#address-cells = <1>;
#size-cells = <0>;

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@ -0,0 +1,318 @@
From 15b8caef5f380d9465876478ff5e365bc6afa5b6 Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Sun, 6 Mar 2016 10:59:13 +0000
Subject: [PATCH] Fix tegra to use stdout-path for serial console
---
arch/arm/boot/dts/tegra114-dalmore.dts | 4 ++++
arch/arm/boot/dts/tegra124-jetson-tk1.dts | 4 ++++
arch/arm/boot/dts/tegra124-nyan.dtsi | 4 ++++
arch/arm/boot/dts/tegra124-venice2.dts | 4 ++++
arch/arm/boot/dts/tegra20-harmony.dts | 4 ++++
arch/arm/boot/dts/tegra20-iris-512.dts | 4 ++++
arch/arm/boot/dts/tegra20-medcom-wide.dts | 4 ++++
arch/arm/boot/dts/tegra20-paz00.dts | 4 ++++
arch/arm/boot/dts/tegra20-seaboard.dts | 4 ++++
arch/arm/boot/dts/tegra20-tamonten.dtsi | 4 ++++
arch/arm/boot/dts/tegra20-trimslice.dts | 4 ++++
arch/arm/boot/dts/tegra20-ventana.dts | 4 ++++
arch/arm/boot/dts/tegra20-whistler.dts | 4 ++++
arch/arm/boot/dts/tegra30-apalis-eval.dts | 4 ++++
arch/arm/boot/dts/tegra30-beaver.dts | 4 ++++
arch/arm/boot/dts/tegra30-cardhu.dtsi | 4 ++++
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 4 ++++
arch/arm64/boot/dts/nvidia/tegra132-norrin.dts | 5 ++++-
arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi | 4 ++++
19 files changed, 76 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts
index 8b7aa0d..b5748ee 100644
--- a/arch/arm/boot/dts/tegra114-dalmore.dts
+++ b/arch/arm/boot/dts/tegra114-dalmore.dts
@@ -18,6 +18,10 @@
serial0 = &uartd;
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
memory {
reg = <0x80000000 0x40000000>;
};
diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
index 66b4451..abf046a 100644
--- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
+++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts
@@ -15,6 +15,10 @@
serial0 = &uartd;
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
memory {
reg = <0x0 0x80000000 0x0 0x80000000>;
};
diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi
index ec1aa64..e2cd39e 100644
--- a/arch/arm/boot/dts/tegra124-nyan.dtsi
+++ b/arch/arm/boot/dts/tegra124-nyan.dtsi
@@ -8,6 +8,10 @@
serial0 = &uarta;
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
memory {
reg = <0x0 0x80000000 0x0 0x80000000>;
};
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index cfbdf42..604f4b7 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -13,6 +13,10 @@
serial0 = &uarta;
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
memory {
reg = <0x0 0x80000000 0x0 0x80000000>;
};
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
index b926a07..4b73c76 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -13,6 +13,10 @@
serial0 = &uartd;
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
memory {
reg = <0x00000000 0x40000000>;
};
diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts b/arch/arm/boot/dts/tegra20-iris-512.dts
index 1dd7d7b..bb56dfe 100644
--- a/arch/arm/boot/dts/tegra20-iris-512.dts
+++ b/arch/arm/boot/dts/tegra20-iris-512.dts
@@ -11,6 +11,10 @@
serial1 = &uartd;
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
host1x@50000000 {
hdmi@54280000 {
status = "okay";
diff --git a/arch/arm/boot/dts/tegra20-medcom-wide.dts b/arch/arm/boot/dts/tegra20-medcom-wide.dts
index 9b87526..34c6588 100644
--- a/arch/arm/boot/dts/tegra20-medcom-wide.dts
+++ b/arch/arm/boot/dts/tegra20-medcom-wide.dts
@@ -10,6 +10,10 @@
serial0 = &uartd;
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
pwm@7000a000 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index ed7e100..81a10a9 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -14,6 +14,10 @@
serial1 = &uartc;
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
memory {
reg = <0x00000000 0x20000000>;
};
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index aea8994..0aed748 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -13,6 +13,10 @@
serial0 = &uartd;
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
memory {
reg = <0x00000000 0x40000000>;
};
diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi
index 13d4e61..025e9e8 100644
--- a/arch/arm/boot/dts/tegra20-tamonten.dtsi
+++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi
@@ -10,6 +10,10 @@
serial0 = &uartd;
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
memory {
reg = <0x00000000 0x20000000>;
};
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index d99af4e..69d25ca 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -13,6 +13,10 @@
serial0 = &uarta;
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
memory {
reg = <0x00000000 0x40000000>;
};
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index 04c58e9..c61533a 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -13,6 +13,10 @@
serial0 = &uartd;
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
memory {
reg = <0x00000000 0x40000000>;
};
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts
index 340d811..bd76585 100644
--- a/arch/arm/boot/dts/tegra20-whistler.dts
+++ b/arch/arm/boot/dts/tegra20-whistler.dts
@@ -13,6 +13,10 @@
serial0 = &uarta;
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
memory {
reg = <0x00000000 0x20000000>;
};
diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts
index f2879cf..b914bcb 100644
--- a/arch/arm/boot/dts/tegra30-apalis-eval.dts
+++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts
@@ -17,6 +17,10 @@
serial3 = &uartd;
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
pcie-controller@00003000 {
status = "okay";
diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
index 3dede39..1eca3b2 100644
--- a/arch/arm/boot/dts/tegra30-beaver.dts
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -12,6 +12,10 @@
serial0 = &uarta;
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
memory {
reg = <0x80000000 0x7ff00000>;
};
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index bb1ca15..de9d6cc 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -35,6 +35,10 @@
serial1 = &uartc;
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
memory {
reg = <0x80000000 0x40000000>;
};
diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
index 3ff019f..93e1ffd 100644
--- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
@@ -15,6 +15,10 @@
serial2 = &uartd;
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
host1x@50000000 {
dc@54200000 {
rgb {
diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
index 62f33fc..3c0b4d7 100644
--- a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
@@ -10,9 +10,12 @@
aliases {
rtc0 = "/i2c@0,7000d000/as3722@40";
rtc1 = "/rtc@0,7000e000";
+ serial0 = &uarta;
};
- chosen { };
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
memory {
device_type = "memory";
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
index ece0dec..73ba582 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
@@ -9,6 +9,10 @@
serial0 = &uarta;
};
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
memory {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0xc0000000>;
--
2.5.0

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@ -0,0 +1,437 @@
From a516bbf04744817e49e173b2a217a2a6366b5f9c Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Wed, 2 Mar 2016 18:12:09 +0000
Subject: [PATCH] Geekbox device tree support
---
Documentation/devicetree/bindings/arm/rockchip.txt | 9 +
arch/arm64/boot/dts/rockchip/Makefile | 2 +
.../dts/rockchip/rk3368-geekbox-landingship.dts | 56 ++++
arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts | 321 +++++++++++++++++++++
4 files changed, 388 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-geekbox-landingship.dts
create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
index 078c14f..c6d95f2 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -87,6 +87,15 @@ Rockchip platforms device tree bindings
"google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
"google,veyron-speedy", "google,veyron", "rockchip,rk3288";
+- GeekBuying GeekBox:
+ Required root node properties:
+ - compatible = "geekbuying,geekbox", "rockchip,rk3368";
+
+- GeekBuying Landingship:
+ Required root node properties:
+ - compatible = "geekbuying,landingship",
+ "geekbuying,geekbox", "rockchip,rk3368";
+
- Rockchip RK3368 evb:
Required root node properties:
- compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index e3f0b5f..201bcd9 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -1,4 +1,6 @@
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox-landingship.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
always := $(dtb-y)
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-geekbox-landingship.dts b/arch/arm64/boot/dts/rockchip/rk3368-geekbox-landingship.dts
new file mode 100644
index 0000000..e4a1175
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3368-geekbox-landingship.dts
@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2016 Andreas Färber
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "rk3368-geekbox.dts"
+
+/ {
+ model = "GeekBox on Landingship";
+ compatible = "geekbuying,landingship", "geekbuying,geekbox", "rockchip,rk3368";
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
new file mode 100644
index 0000000..7e51876
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
@@ -0,0 +1,321 @@
+/*
+ * Copyright (c) 2016 Andreas Färber
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "rk3368.dtsi"
+
+/ {
+ model = "GeekBox";
+ compatible = "geekbuying,geekbox", "rockchip,rk3368";
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x80000000>;
+ };
+
+ ext_gmac: gmac-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "ext_gmac";
+ #clock-cells = <0>;
+ };
+
+ ir: ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_int>;
+ };
+
+ keys: gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwr_key>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ button@0 {
+ reg = <0>;
+ gpio-key,wakeup = <1>;
+ gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ label = "GPIO Power";
+ linux,code = <116>;
+ };
+ };
+
+ leds: gpio-leds {
+ compatible = "gpio-leds";
+
+ blue {
+ gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
+ label = "geekbox:blue:led";
+ default-state = "on";
+ };
+
+ red {
+ gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
+ label = "geekbox:red:led";
+ default-state = "off";
+ };
+ };
+
+ vcc_sys: vcc-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+};
+
+&emmc {
+ status = "okay";
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ clock-frequency = <150000000>;
+ disable-wp;
+ keep-power-in-suspend;
+ non-removable;
+ num-slots = <1>;
+ vmmc-supply = <&vcc_io>;
+ vqmmc-supply = <&vcc18_flash>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
+};
+
+&gmac {
+ status = "okay";
+ phy-supply = <&vcc_lan>;
+ phy-mode = "rgmii";
+ clock_in_out = "input";
+ assigned-clocks = <&cru SCLK_MAC>;
+ assigned-clock-parents = <&ext_gmac>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ tx_delay = <0x30>;
+ rx_delay = <0x10>;
+};
+
+&i2c0 {
+ status = "okay";
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int>, <&pmic_sleep>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
+ rockchip,system-power-controller;
+ vcc1-supply = <&vcc_sys>;
+ vcc2-supply = <&vcc_sys>;
+ vcc3-supply = <&vcc_sys>;
+ vcc4-supply = <&vcc_sys>;
+ vcc6-supply = <&vcc_sys>;
+ vcc7-supply = <&vcc_sys>;
+ vcc8-supply = <&vcc_io>;
+ vcc9-supply = <&vcc_sys>;
+ vcc10-supply = <&vcc_sys>;
+ vcc11-supply = <&vcc_sys>;
+ vcc12-supply = <&vcc_io>;
+ clock-output-names = "xin32k", "rk808-clkout2";
+ #clock-cells = <1>;
+
+ regulators {
+ vdd_cpu: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd_cpu";
+ };
+
+ vdd_log: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd_log";
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_ddr";
+ };
+
+ vcc_io: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_io";
+ };
+
+ vcc18_flash: LDO_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc18_flash";
+ };
+
+ vcc33_lcd: LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc33_lcd";
+ };
+
+ vdd_10: LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-name = "vdd_10";
+ };
+
+ vcca_18: LDO_REG4 {
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca_18";
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vccio_sd";
+ };
+
+ vdd10_lcd: LDO_REG6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-name = "vdd10_lcd";
+ };
+
+ vcc_18: LDO_REG7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_18";
+ };
+
+ vcc18_lcd: LDO_REG8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc18_lcd";
+ };
+
+ vcc_sd: SWITCH_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_sd";
+ };
+
+ vcc_lan: SWITCH_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_lan";
+ };
+ };
+ };
+};
+
+&pinctrl {
+ ir {
+ ir_int: ir-int {
+ rockchip,pins = <3 30 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ keys {
+ pwr_key: pwr-key {
+ rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ pmic {
+ pmic_sleep: pmic-sleep {
+ rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
+ };
+
+ pmic_int: pmic-int {
+ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&tsadc {
+ status = "okay";
+ rockchip,hw-tshut-mode = <0>; /* CRU */
+ rockchip,hw-tshut-polarity = <0>; /* low */
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_otg {
+ status = "okay";
+};
+
+&wdt {
+ status = "okay";
+};
--
2.5.0

File diff suppressed because it is too large Load Diff

View File

@ -79,6 +79,11 @@ CONFIG_CRYPTO_SHA1_ARM_NEON=y
CONFIG_CRYPTO_SHA512_ARM_NEON=y
CONFIG_CRYPTO_SHA512_ARM=y
# EDAC
CONFIG_EDAC=y
CONFIG_EDAC_MM_EDAC=m
CONFIG_EDAC_LEGACY_SYSFS=y
# ARM VExpress
CONFIG_ARCH_VEXPRESS=y
CONFIG_MFD_VEXPRESS_SYSREG=y
@ -128,8 +133,41 @@ CONFIG_CRYPTO_DEV_ROCKCHIP=m
CONFIG_ROCKCHIP_EFUSE=m
# Tegra
# CONFIG_TEGRA_AHB is not set
#
CONFIG_ARM_TEGRA_CPUFREQ=y
CONFIG_TEGRA_MC=y
CONFIG_TEGRA124_EMC=y
CONFIG_TEGRA_IOMMU_SMMU=y
CONFIG_TEGRA_AHB=y
CONFIG_TEGRA20_APB_DMA=y
CONFIG_TRUSTED_FOUNDATIONS=y
CONFIG_SERIAL_TEGRA=y
CONFIG_PCI_TEGRA=y
CONFIG_AHCI_TEGRA=m
CONFIG_MMC_SDHCI_TEGRA=m
CONFIG_TEGRA_WATCHDOG=m
CONFIG_I2C_TEGRA=m
CONFIG_SPI_TEGRA114=m
CONFIG_PWM_TEGRA=m
CONFIG_KEYBOARD_TEGRA=m
CONFIG_USB_EHCI_TEGRA=m
CONFIG_RTC_DRV_TEGRA=m
CONFIG_ARM_TEGRA_DEVFREQ=m
CONFIG_ARM_TEGRA124_CPUFREQ=m
CONFIG_TEGRA_SOCTHERM=m
CONFIG_TEGRA_HOST1X=m
CONFIG_TEGRA_HOST1X_FIREWALL=y
CONFIG_DRM_TEGRA=m
CONFIG_DRM_TEGRA_FBDEV=y
# CONFIG_DRM_TEGRA_DEBUG is not set
CONFIG_DRM_TEGRA_STAGING=y
CONFIG_NOUVEAU_PLATFORM_DRIVER=y
CONFIG_SND_HDA_TEGRA=m
# CONFIG_ARM_TEGRA20_CPUFREQ is not set
# CONFIG_MFD_NVEC is not set
# CONFIG_TEGRA20_APB_DMA is not set
# Virt
CONFIG_PARAVIRT=y
CONFIG_PARAVIRT_TIME_ACCOUNTING=y
@ -248,6 +286,18 @@ CONFIG_USB_CONFIGFS_SERIAL=y
CONFIG_MMC_SPI=m
CONFIG_MMC_SDHCI_OF_ARASAN=m
# LCD Panels
CONFIG_DRM_PANEL=y
CONFIG_DRM_PANEL_SIMPLE=m
CONFIG_DRM_PANEL_LD9040=m
CONFIG_DRM_PANEL_LG_LG4573=m
CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=m
CONFIG_DRM_PANEL_S6E8AA0=m
CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m
CONFIG_DRM_PANEL_SHARP_LS043T1LE01=m
CONFIG_DRM_PANEL_SAMSUNG_LD9040=m
CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m
# Designware (used by numerous devices)
CONFIG_MMC_DW=m
CONFIG_MMC_DW_PLTFM=m
@ -367,11 +417,6 @@ CONFIG_CMA_SIZE_SEL_MBYTES=y
CONFIG_CMA_ALIGNMENT=8
CONFIG_CMA_AREAS=7
# EDAC
CONFIG_EDAC=y
CONFIG_EDAC_MM_EDAC=m
CONFIG_EDAC_LEGACY_SYSFS=y
# VFIO
CONFIG_VFIO_PLATFORM=m
CONFIG_VFIO_AMBA=m

View File

@ -9,6 +9,8 @@ CONFIG_SCHED_SMT=y
# arm64 only SoCs
CONFIG_ARCH_HISI=y
CONFIG_ARCH_SEATTLE=y
CONFIG_ARCH_SUNXI=y
CONFIG_ARCH_TEGRA=y
CONFIG_ARCH_XGENE=y
# CONFIG_ARCH_BCM_IPROC is not set
# CONFIG_ARCH_BERLIN is not set
@ -20,7 +22,6 @@ CONFIG_ARCH_XGENE=y
# CONFIG_ARCH_RENESAS is not set
# CONFIG_ARCH_SPRD is not set
# CONFIG_ARCH_STRATIX10 is not set
# CONFIG_ARCH_TEGRA is not set
# CONFIG_ARCH_THUNDER is not set
# CONFIG_ARCH_ZYNQMP is not set
# CONFIG_ARCH_UNIPHIER is not set
@ -142,6 +143,31 @@ CONFIG_STUB_CLK_HI6220=y
CONFIG_PHY_HI6220_USB=m
CONFIG_COMMON_RESET_HI6220=m
# Tegra
CONFIG_ARCH_TEGRA_132_SOC=y
CONFIG_ARCH_TEGRA_210_SOC=y
# AllWinner
CONFIG_MACH_SUN50I=y
CONFIG_SUNXI_RSB=m
CONFIG_AHCI_SUNXI=m
CONFIG_NET_VENDOR_ALLWINNER=y
# CONFIG_SUN4I_EMAC is not set
# CONFIG_MDIO_SUN4I is not set
# CONFIG_KEYBOARD_SUN4I_LRADC is not set
# CONFIG_TOUCHSCREEN_SUN4I is not set
# CONFIG_SERIO_SUN4I_PS2 is not set
CONFIG_I2C_MV64XXX=m
CONFIG_SUNXI_WATCHDOG=m
CONFIG_MFD_SUN6I_PRCM=y
CONFIG_IR_SUNXI=m
CONFIG_MMC_SUNXI=m
CONFIG_RTC_DRV_SUN6I=m
CONFIG_PWM_SUN4I=m
# CONFIG_PHY_SUN4I_USB is not set
# CONFIG_PHY_SUN9I_USB is not set
CONFIG_NVMEM_SUNXI_SID=m
# ThunderX
# CONFIG_MDIO_OCTEON is not set

View File

@ -3,6 +3,7 @@
# CONFIG_ARCH_BERLIN is not set
# CONFIG_ARCH_KEYSTONE is not set
CONFIG_ARCH_MXC=y
CONFIG_ARCH_MMP=y
CONFIG_ARCH_OMAP3=y
CONFIG_ARCH_OMAP4=y
CONFIG_ARCH_QCOM=y
@ -510,6 +511,24 @@ CONFIG_REGULATOR_DA9055=m
# picoxcell
# CONFIG_CRYPTO_DEV_PICOXCELL is not set
# MMP XO 1.75
# CONFIG_MACH_BROWNSTONE is not set
# CONFIG_MACH_FLINT is not set
# CONFIG_MACH_MARVELL_JASPER is not set
CONFIG_MACH_MMP2_DT=y
CONFIG_SERIAL_PXA=y
CONFIG_SERIAL_PXA_CONSOLE=y
CONFIG_KEYBOARD_PXA27x=y
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
CONFIG_SND_MMP_SOC=y
CONFIG_SND_PXA910_SOC=m
CONFIG_MMC_SDHCI_PXAV2=m
CONFIG_MMP_PDMA=y
CONFIG_MMP_TDMA=y
CONFIG_PXA_DMA=y
CONFIG_SERIO_OLPC_APSP=m
# Exynos 4
CONFIG_ARCH_EXYNOS4=y
CONFIG_SOC_EXYNOS4212=y
@ -591,9 +610,6 @@ CONFIG_MFD_TPS6586X=y
CONFIG_GPIO_TPS6586X=y
CONFIG_RTC_DRV_TPS6586X=m
# OLPC XO
CONFIG_SERIO_OLPC_APSP=m
# Zynq-7xxx
CONFIG_SERIAL_UARTLITE=y
CONFIG_SERIAL_UARTLITE_CONSOLE=y
@ -626,9 +642,9 @@ CONFIG_USB_GADGET_XILINX=m
CONFIG_PCIE_XILINX=y
CONFIG_CADENCE_WATCHDOG=m
CONFIG_REGULATOR_ISL9305=m
CONFIG_EDAC_SYNOPSYS=m
CONFIG_PINCTRL_ZYNQ=y
CONFIG_AXI_DMAC=m
CONFIG_EDAC_SYNOPSYS=m
# Multi function devices
CONFIG_MFD_88PM800=m

View File

@ -49,6 +49,7 @@ CONFIG_CPU_SW_DOMAIN_PAN=y
# CONFIG_ARM_VIRT_EXT is not set
# Platforms enabled/disabled globally on ARMv7
CONFIG_ARCH_BCM2835=y
CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_HIGHBANK=y
CONFIG_ARCH_SUNXI=y
@ -170,8 +171,6 @@ CONFIG_RTC_DRV_PL030=y
CONFIG_AMBA_PL08X=y
CONFIG_SND_ARMAACI=m
CONFIG_EDAC=y
# highbank
CONFIG_EDAC_HIGHBANK_MC=m
CONFIG_EDAC_HIGHBANK_L2=m
@ -188,6 +187,7 @@ CONFIG_MACH_SUN6I=y
CONFIG_MACH_SUN7I=y
CONFIG_MACH_SUN8I=y
# CONFIG_MACH_SUN9I is not set
# CONFIG_MACH_SUN50I is not set
CONFIG_SUNXI_SRAM=y
CONFIG_DMA_SUN4I=m
CONFIG_DMA_SUN6I=m
@ -229,6 +229,22 @@ CONFIG_SND_SUN4I_CODEC=m
CONFIG_SUNXI_RSB=m
CONFIG_NVMEM_SUNXI_SID=m
# BCM 283x
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_DMA_BCM2835=m
CONFIG_MMC_SDHCI_BCM2835=m
CONFIG_BCM2835_MBOX=m
CONFIG_PWM_BCM2835=m
CONFIG_HW_RANDOM_BCM2835=m
CONFIG_I2C_BCM2835=m
CONFIG_SPI_BCM2835=m
CONFIG_SPI_BCM2835AUX=m
CONFIG_BCM2835_WDT=m
CONFIG_SND_BCM2835_SOC_I2S=m
CONFIG_DRM_VC4=m
CONFIG_RASPBERRYPI_FIRMWARE=m
# Exynos
CONFIG_ARCH_EXYNOS3=y
# CONFIG_ARCH_EXYNOS4 is not set
@ -344,52 +360,15 @@ CONFIG_EXTCON_MAX8997=m
# Tegra
CONFIG_ARCH_TEGRA_114_SOC=y
CONFIG_ARCH_TEGRA_124_SOC=y
CONFIG_ARM_TEGRA_CPUFREQ=y
CONFIG_TRUSTED_FOUNDATIONS=y
CONFIG_SERIAL_TEGRA=y
CONFIG_PCI_TEGRA=y
CONFIG_AHCI_TEGRA=m
CONFIG_TEGRA_IOMMU_SMMU=y
CONFIG_MMC_SDHCI_TEGRA=m
CONFIG_TEGRA_WATCHDOG=m
CONFIG_I2C_TEGRA=m
CONFIG_TEGRA_AHB=y
CONFIG_TEGRA20_APB_DMA=y
CONFIG_SPI_TEGRA114=m
CONFIG_PWM_TEGRA=m
CONFIG_KEYBOARD_TEGRA=m
CONFIG_USB_EHCI_TEGRA=m
CONFIG_RTC_DRV_TEGRA=m
CONFIG_SND_SOC_TEGRA=m
CONFIG_SND_SOC_TEGRA_MAX98090=m
CONFIG_SND_SOC_TEGRA_RT5640=m
CONFIG_SND_SOC_TEGRA30_AHUB=m
CONFIG_SND_SOC_TEGRA30_I2S=m
CONFIG_SND_SOC_TEGRA_MAX98090=m
CONFIG_SND_SOC_TEGRA_RT5640=m
CONFIG_SND_SOC_TEGRA_RT5677=m
CONFIG_SND_HDA_TEGRA=m
CONFIG_TEGRA_HOST1X=m
CONFIG_TEGRA_HOST1X_FIREWALL=y
CONFIG_DRM_TEGRA=m
CONFIG_DRM_TEGRA_FBDEV=y
# CONFIG_DRM_TEGRA_DEBUG is not set
CONFIG_DRM_TEGRA_STAGING=y
CONFIG_NOUVEAU_PLATFORM_DRIVER=y
CONFIG_AD525X_DPOT=m
CONFIG_AD525X_DPOT_I2C=m
CONFIG_AD525X_DPOT_SPI=m
CONFIG_TEGRA_SOCTHERM=m
CONFIG_TEGRA_MC=y
CONFIG_TEGRA124_EMC=y
CONFIG_ARM_TEGRA_DEVFREQ=m
# CONFIG_ARM_TEGRA20_CPUFREQ is not set
CONFIG_ARM_TEGRA124_CPUFREQ=m
# Jetson TK1
CONFIG_PINCTRL_AS3722=y
CONFIG_POWER_RESET_AS3722=y
CONFIG_MFD_AS3722=y
CONFIG_REGULATOR_AS3722=m
CONFIG_RTC_DRV_AS3722=y
# TI Generic
CONFIG_TI_SOC_THERMAL=m
@ -853,18 +832,18 @@ CONFIG_R8188EU=m
# CONFIG_SND_SOC_APQ8016_SBC is not set
# CONFIG_SND_SOC_TAS571X is not set
# Debug options. We need to deal with them at some point like x86
# CONFIG_DEBUG_USER is not set
# CONFIG_DEBUG_LL is not set
# CONFIG_DEBUG_PINCTRL is not set
# CONFIG_DMADEVICES_VDEBUG is not set
# CONFIG_DMADEVICES_DEBUG is not set
# CONFIG_OMAP2_DSS_DEBUG is not set
# CONFIG_CRYPTO_DEV_UX500_DEBUG is not set
# CONFIG_AB8500_DEBUG is not set
# CONFIG_ARM_KERNMEM_PERMS is not set
# CONFIG_VFIO_PLATFORM_AMDXGBE_RESET is not set
# Altera?
# CONFIG_PCIE_ALTERA is not set
# Debug options. We need to deal with them at some point like x86
# CONFIG_DEBUG_USER is not set
# CONFIG_DMADEVICES_VDEBUG is not set
# CONFIG_DMADEVICES_DEBUG is not set
# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
# CONFIG_OMAP2_DSS_DEBUG is not set
# CONFIG_CRYPTO_DEV_UX500_DEBUG is not set
# CONFIG_AB8500_DEBUG is not set
# CONFIG_ARM_KERNMEM_PERMS is not set
# CONFIG_DEBUG_LL is not set

View File

@ -506,6 +506,17 @@ Patch456: arm64-acpi-drop-expert-patch.patch
# http://patchwork.ozlabs.org/patch/587554/
Patch457: ARM-tegra-usb-no-reset.patch
Patch458: ARM-mvebu-change-order-of-ethernet-DT-nodes-on-Armada-38x.patch
# http://www.spinics.net/lists/arm-kernel/msg480703.html
Patch459: Geekbox-device-tree-support.patch
# http://www.spinics.net/lists/arm-kernel/msg483898.html
Patch460: Initial-AllWinner-A64-and-PINE64-support.patch
# http://www.spinics.net/lists/linux-tegra/msg25152.html
Patch461: Fix-tegra-to-use-stdout-path-for-serial-console.patch
Patch463: arm-i.MX6-Utilite-device-dtb.patch
Patch466: input-kill-stupid-messages.patch
@ -2127,6 +2138,12 @@ fi
#
#
%changelog
* Sat Mar 5 2016 Peter Robinson <pbrobinson@fedoraproject.org>
- Updates and new SoCs for aarch64 and ARMv7
- Add aarch64 support for PINE64 and Geekbox devices
- Fix ethernet naming on Armada 38x devices
- Serial console fixes for Tegra
* Fri Mar 04 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.5.0-0.rc6.git3.1
- Linux v4.5-rc6-41-ge3c2ef4