From 6116861edf2be2615467c0f189153f95badf7e58 Mon Sep 17 00:00:00 2001 From: Josh Boyer Date: Tue, 17 May 2016 09:03:07 -0400 Subject: [PATCH] Linux v4.6 - Disable CONFIG_DEBUG_VM_PGFLAGS on non debug kernels (rhbz 1335173) - CVE-2016-3713 kvm: out-of-bounds access in set_var_mtrr_msr (rhbz 1332139 1336410) --- ...ing-RTF_CACHE-from-a-rt-that-is-not-.patch | 91 - ...-x86-cpu-cacheinfo-Fix-teardown-path.patch | 86 - ...Fix-leak-in-SNDRV_TIMER_IOCTL_PARAMS.patch | 33 + ...eak-in-events-via-snd_timer_user_cca.patch | 34 + ...eak-in-events-via-snd_timer_user_tin.patch | 34 + Add-EFI-signature-data-types.patch | 14 +- ...signature-blob-parser-and-key-loader.patch | 3 +- ...o-use-stdout-path-for-serial-console.patch | 318 + ...dd-support-for-Acer-Aspire-Switch-12.patch | 103 - ...x-accessing-freed-memory-during-devi.patch | 53 - ...nable-palm-rejection-if-device-imple.patch | 41 - ...bail-out-when-the-sixaxis-refuses-th.patch | 49 - ...ial-AllWinner-A64-and-PINE64-support.patch | 1200 ++ ...hm-IPC-objects-before-doing-ipc_addi.patch | 117 - ...-mark-protocols-v2-and-v3-as-semi-mt.patch | 41 - KEYS-Add-a-system-blacklist-keyring.patch | 6 +- KVM-MTRR-remove-MSR-0x2f8.patch | 49 + Makefile | 6 +- Makefile.release | 8 +- ...oadwell-to-Intel-MCH-size-workaround.patch | 101 - ...ell-ULT-to-Intel-MCH-size-workaround.patch | 119 - ...nderlying-transport-exists-before-cr.patch | 79 - ...sbfs-fix-potential-infoleak-in-devio.patch | 41 + ...at-fix-potential-null-deref-at-probe.patch | 81 - ...orce-native-backlight-quirk-for-Leno.patch | 81 - ...-forcing-native-backlight-on-non-win.patch | 73 - alua_fix.patch | 41 - amd-xgbe-a0-Add-support-for-XGBE-on-A0.patch | 10391 ---------------- ...hy-a0-Add-support-for-XGBE-PHY-on-A0.patch | 1870 --- antenna_select.patch | 227 + ...ing-console-to-enable-serial-console.patch | 12 +- ...oy_all-should-clear-q-root_blkg-and-.patch | 64 - ...ffset-adjustment-on-backjumps-after-.patch | 92 - cfg80211-wext-fix-message-ordering.patch | 83 - config-arm-generic | 170 +- config-arm64 | 144 +- config-armv7 | 101 +- config-armv7-generic | 215 +- config-armv7-lpae | 6 +- config-debug | 4 +- config-generic | 306 +- config-nodebug | 3 +- config-powerpc64-generic | 12 +- config-powerpc64le | 2 + config-s390x | 2 +- config-x86-32-generic | 11 +- config-x86-generic | 53 +- config-x86_64-generic | 26 +- ...Handle-escaped-paths-in-prepend_path.patch | 65 - disable-CONFIG_EXPERT-for-ZONE_DMA.patch | 43 + ...ut-up-gen8-SDE-irq-dmesg-noise-again.patch | 68 - ...-dropped-masters-render-node-like-ac.patch | 60 - filter-aarch64.sh | 6 +- filter-armv7hl.sh | 8 +- filter-i686.sh | 4 +- filter-modules.sh | 28 +- filter-ppc64.sh | 4 +- filter-ppc64le.sh | 4 +- filter-ppc64p7.sh | 4 +- filter-s390x.sh | 0 filter-x86_64.sh | 0 ...de.c-fix-bugs-in-hugetlb_vmtruncate_.patch | 86 - geekbox-v4-device-tree-support.patch | 464 + ...on-recovery_tmo-sysfs-writes-persist.patch | 89 - input-silence-i8042-noise.patch | 62 - ...arn-when-primary-address-is-missing-.patch | 40 + ...correctly-returning-error-on-success.patch | 41 - kbuild-AFTER_LINK.patch | 2 +- kernel.spec | 2105 +--- ...v-avoid-going-past-input-audio-array.patch | 29 - ...e-that-the-whole-MFD-is-built-into-a.patch | 28 - mod-extra.list | 303 +- net-inet-fix-race-in-reqsk_queue_unlink.patch | 76 - ...es-deal-with-bogus-nextoffset-values.patch | 150 + ...e-mc-subdev-oclass-from-nv44-to-nv4c.patch | 33 - ...trl-single-must-be-initialized-early.patch | 34 - ...able-wrt-a-process-requires-mapped-u.patch | 108 - regulator-axp20x-module-alias.patch | 26 - si2157-Bounds-check-firmware.patch | 39 - si2168-Bounds-check-firmware.patch | 50 - sources | 5 +- ...-tegra-Add-38.4MHz-clock-table-entry.patch | 53 + ...ash-on-detecting-device-with-invalid.patch | 49 - ...-handle-paths-that-are-unreachable-f.patch | 110 - vmwgfx-Rework-device-initialization.patch | 890 -- ...Disable-watchdog-on-virtual-machines.patch | 2 +- wext-fix-message-delay-ordering.patch | 122 - ...-port-access-when-module-security-is.patch | 15 +- 88 files changed, 3696 insertions(+), 18305 deletions(-) delete mode 100644 0001-ipv6-Avoid-creating-RTF_CACHE-from-a-rt-that-is-not-.patch delete mode 100644 0001-x86-cpu-cacheinfo-Fix-teardown-path.patch create mode 100644 ALSA-timer-Fix-leak-in-SNDRV_TIMER_IOCTL_PARAMS.patch create mode 100644 ALSA-timer-Fix-leak-in-events-via-snd_timer_user_cca.patch create mode 100644 ALSA-timer-Fix-leak-in-events-via-snd_timer_user_tin.patch create mode 100644 Fix-tegra-to-use-stdout-path-for-serial-console.patch delete mode 100644 HID-chicony-Add-support-for-Acer-Aspire-Switch-12.patch delete mode 100644 HID-hid-input-Fix-accessing-freed-memory-during-devi.patch delete mode 100644 HID-multitouch-enable-palm-rejection-if-device-imple.patch delete mode 100644 HID-sony-do-not-bail-out-when-the-sixaxis-refuses-th.patch create mode 100644 Initial-AllWinner-A64-and-PINE64-support.patch delete mode 100644 Initialize-msg-shm-IPC-objects-before-doing-ipc_addi.patch delete mode 100644 Input-elantech-mark-protocols-v2-and-v3-as-semi-mt.patch create mode 100644 KVM-MTRR-remove-MSR-0x2f8.patch delete mode 100644 PNP-Add-Broadwell-to-Intel-MCH-size-workaround.patch delete mode 100644 PNP-Add-Haswell-ULT-to-Intel-MCH-size-workaround.patch delete mode 100644 RDS-verify-the-underlying-transport-exists-before-cr.patch create mode 100644 USB-usbfs-fix-potential-infoleak-in-devio.patch delete mode 100644 USB-whiteheat-fix-potential-null-deref-at-probe.patch delete mode 100644 acpi-video-Add-force-native-backlight-quirk-for-Leno.patch delete mode 100644 acpi-video-Allow-forcing-native-backlight-on-non-win.patch delete mode 100644 alua_fix.patch delete mode 100644 amd-xgbe-a0-Add-support-for-XGBE-on-A0.patch delete mode 100644 amd-xgbe-phy-a0-Add-support-for-XGBE-PHY-on-A0.patch create mode 100644 antenna_select.patch delete mode 100644 block-blkg_destroy_all-should-clear-q-root_blkg-and-.patch delete mode 100644 bpf-fix-branch-offset-adjustment-on-backjumps-after-.patch delete mode 100644 cfg80211-wext-fix-message-ordering.patch delete mode 100644 dcache-Handle-escaped-paths-in-prepend_path.patch create mode 100644 disable-CONFIG_EXPERT-for-ZONE_DMA.patch delete mode 100644 drm-i915-shut-up-gen8-SDE-irq-dmesg-noise-again.patch delete mode 100644 drm-vmwgfx-Allow-dropped-masters-render-node-like-ac.patch mode change 100755 => 100644 filter-aarch64.sh mode change 100755 => 100644 filter-armv7hl.sh mode change 100755 => 100644 filter-i686.sh mode change 100755 => 100644 filter-ppc64.sh mode change 100755 => 100644 filter-ppc64le.sh mode change 100755 => 100644 filter-ppc64p7.sh mode change 100755 => 100644 filter-s390x.sh mode change 100755 => 100644 filter-x86_64.sh delete mode 100644 fs-hugetlbfs-inode.c-fix-bugs-in-hugetlb_vmtruncate_.patch create mode 100644 geekbox-v4-device-tree-support.patch delete mode 100644 iSCSI-let-session-recovery_tmo-sysfs-writes-persist.patch delete mode 100644 input-silence-i8042-noise.patch create mode 100644 ipv4-fib-don-t-warn-when-primary-address-is-missing-.patch delete mode 100644 iw_cxgb3-Fix-incorrectly-returning-error-on-success.patch delete mode 100644 media-ivtv-avoid-going-past-input-audio-array.patch delete mode 100644 mfd-wm8994-Ensure-that-the-whole-MFD-is-built-into-a.patch delete mode 100644 net-inet-fix-race-in-reqsk_queue_unlink.patch create mode 100644 netfilter-x_tables-deal-with-bogus-nextoffset-values.patch delete mode 100644 nv46-Change-mc-subdev-oclass-from-nv44-to-nv4c.patch delete mode 100644 pinctrl-pinctrl-single-must-be-initialized-early.patch delete mode 100644 ptrace-being-capable-wrt-a-process-requires-mapped-u.patch delete mode 100644 regulator-axp20x-module-alias.patch delete mode 100644 si2157-Bounds-check-firmware.patch delete mode 100644 si2168-Bounds-check-firmware.patch create mode 100644 usb-phy-tegra-Add-38.4MHz-clock-table-entry.patch delete mode 100644 usbvision-fix-crash-on-detecting-device-with-invalid.patch delete mode 100644 vfs-Test-for-and-handle-paths-that-are-unreachable-f.patch delete mode 100644 vmwgfx-Rework-device-initialization.patch delete mode 100644 wext-fix-message-delay-ordering.patch diff --git a/0001-ipv6-Avoid-creating-RTF_CACHE-from-a-rt-that-is-not-.patch b/0001-ipv6-Avoid-creating-RTF_CACHE-from-a-rt-that-is-not-.patch deleted file mode 100644 index 3390024d2..000000000 --- a/0001-ipv6-Avoid-creating-RTF_CACHE-from-a-rt-that-is-not-.patch +++ /dev/null @@ -1,91 +0,0 @@ -From 0d3f6d297bfb7af24d0508460fdb3d1ec4903fa3 Mon Sep 17 00:00:00 2001 -From: Martin KaFai Lau -Date: Wed, 11 Nov 2015 11:51:06 -0800 -Subject: [PATCH] ipv6: Avoid creating RTF_CACHE from a rt that is not managed - by fib6 tree - -The original bug report: -https://bugzilla.redhat.com/show_bug.cgi?id=1272571 - -The setup has a IPv4 GRE tunnel running in a IPSec. The bug -happens when ndisc starts sending router solicitation at the gre -interface. The simplified oops stack is like: - -__lock_acquire+0x1b2/0x1c30 -lock_acquire+0xb9/0x140 -_raw_write_lock_bh+0x3f/0x50 -__ip6_ins_rt+0x2e/0x60 -ip6_ins_rt+0x49/0x50 -~~~~~~~~ -__ip6_rt_update_pmtu.part.54+0x145/0x250 -ip6_rt_update_pmtu+0x2e/0x40 -~~~~~~~~ -ip_tunnel_xmit+0x1f1/0xf40 -__gre_xmit+0x7a/0x90 -ipgre_xmit+0x15a/0x220 -dev_hard_start_xmit+0x2bd/0x480 -__dev_queue_xmit+0x696/0x730 -dev_queue_xmit+0x10/0x20 -neigh_direct_output+0x11/0x20 -ip6_finish_output2+0x21f/0x770 -ip6_finish_output+0xa7/0x1d0 -ip6_output+0x56/0x190 -~~~~~~~~ -ndisc_send_skb+0x1d9/0x400 -ndisc_send_rs+0x88/0xc0 -~~~~~~~~ - -The rt passed to ip6_rt_update_pmtu() is created by -icmp6_dst_alloc() and it is not managed by the fib6 tree, -so its rt6i_table == NULL. When __ip6_rt_update_pmtu() creates -a RTF_CACHE clone, the newly created clone also has rt6i_table == NULL -and it causes the ip6_ins_rt() oops. - -During pmtu update, we only want to create a RTF_CACHE clone -from a rt which is currently managed (or owned) by the -fib6 tree. It means either rt->rt6i_node != NULL or -rt is a RTF_PCPU clone. - -It is worth to note that rt6i_table may not be NULL even it is -not (yet) managed by the fib6 tree (e.g. addrconf_dst_alloc()). -Hence, rt6i_node is a better check instead of rt6i_table. - -Fixes: 45e4fd26683c ("ipv6: Only create RTF_CACHE routes after encountering pmtu") -Signed-off-by: Martin KaFai Lau -Reported-by: Chris Siebenmann -Cc: Chris Siebenmann -Cc: Hannes Frederic Sowa -Signed-off-by: David S. Miller ---- - net/ipv6/route.c | 8 +++++++- - 1 file changed, 7 insertions(+), 1 deletion(-) - -diff --git a/net/ipv6/route.c b/net/ipv6/route.c -index c8bc9b4..74907c5 100644 ---- a/net/ipv6/route.c -+++ b/net/ipv6/route.c -@@ -1322,6 +1322,12 @@ static void rt6_do_update_pmtu(struct rt6_info *rt, u32 mtu) - rt6_update_expires(rt, net->ipv6.sysctl.ip6_rt_mtu_expires); - } - -+static bool rt6_cache_allowed_for_pmtu(const struct rt6_info *rt) -+{ -+ return !(rt->rt6i_flags & RTF_CACHE) && -+ (rt->rt6i_flags & RTF_PCPU || rt->rt6i_node); -+} -+ - static void __ip6_rt_update_pmtu(struct dst_entry *dst, const struct sock *sk, - const struct ipv6hdr *iph, u32 mtu) - { -@@ -1335,7 +1341,7 @@ static void __ip6_rt_update_pmtu(struct dst_entry *dst, const struct sock *sk, - if (mtu >= dst_mtu(dst)) - return; - -- if (rt6->rt6i_flags & RTF_CACHE) { -+ if (!rt6_cache_allowed_for_pmtu(rt6)) { - rt6_do_update_pmtu(rt6, mtu); - } else { - const struct in6_addr *daddr, *saddr; --- -2.5.0 - diff --git a/0001-x86-cpu-cacheinfo-Fix-teardown-path.patch b/0001-x86-cpu-cacheinfo-Fix-teardown-path.patch deleted file mode 100644 index 52e82feed..000000000 --- a/0001-x86-cpu-cacheinfo-Fix-teardown-path.patch +++ /dev/null @@ -1,86 +0,0 @@ -From 680ac028240f8747f31c03986fbcf18b2b521e93 Mon Sep 17 00:00:00 2001 -From: Borislav Petkov -Date: Mon, 27 Jul 2015 09:58:05 +0200 -Subject: [PATCH] x86/cpu/cacheinfo: Fix teardown path -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Philip Müller reported a hang when booting 32-bit 4.1 kernel on -an AMD box. A fragment of the splat was enough to pinpoint the -issue: - - task: f58e0000 ti: f58e8000 task.ti: f58e800 - EIP: 0060:[] EFLAGS: 00010206 CPU: 0 - EIP is at free_cache_attributes+0x83/0xd0 - EAX: 00000001 EBX: f589d46c ECX: 00000090 EDX: 360c2000 - ESI: 00000000 EDI: c1724a80 EBP: f58e9ec0 ESP: f58e9ea0 - DS: 007b ES: 007b FS: 00d8 GS: 00e0 SS: 0068 - CR0: 8005003b CR2: 000000ac CR3: 01731000 CR4: 000006d0 - -cache_shared_cpu_map_setup() did check sibling CPUs cacheinfo -descriptor while the respective teardown path -cache_shared_cpu_map_remove() didn't. Fix that. - -From tglx's version: to be on the safe side, move the cacheinfo -descriptor check to free_cache_attributes(), thus cleaning up -the hotplug path a little and making this even more robust. - -Reported-by: Philip Müller -Signed-off-by: Borislav Petkov -Cc: # v4.1+ -Cc: Andre Przywara -Cc: Guenter Roeck -Cc: H. Peter Anvin -Cc: Linus Torvalds -Cc: Peter Zijlstra -Cc: Sudeep Holla -Cc: Thomas Gleixner -Cc: linux-kernel@vger.kernel.org -Cc: manjaro-dev@manjaro.org -Link: http://lkml.kernel.org/r/20150727075805.GA20416@nazgul.tnic -Link: https://lkml.kernel.org/r/55B47BB8.6080202@manjaro.org -Signed-off-by: Ingo Molnar ---- - drivers/base/cacheinfo.c | 10 ++++++++-- - 1 file changed, 8 insertions(+), 2 deletions(-) - -diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c -index 764280a91776..e9fd32e91668 100644 ---- a/drivers/base/cacheinfo.c -+++ b/drivers/base/cacheinfo.c -@@ -148,7 +148,11 @@ static void cache_shared_cpu_map_remove(unsigned int cpu) - - if (sibling == cpu) /* skip itself */ - continue; -+ - sib_cpu_ci = get_cpu_cacheinfo(sibling); -+ if (!sib_cpu_ci->info_list) -+ continue; -+ - sib_leaf = sib_cpu_ci->info_list + index; - cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map); - cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map); -@@ -159,6 +163,9 @@ static void cache_shared_cpu_map_remove(unsigned int cpu) - - static void free_cache_attributes(unsigned int cpu) - { -+ if (!per_cpu_cacheinfo(cpu)) -+ return; -+ - cache_shared_cpu_map_remove(cpu); - - kfree(per_cpu_cacheinfo(cpu)); -@@ -514,8 +521,7 @@ static int cacheinfo_cpu_callback(struct notifier_block *nfb, - break; - case CPU_DEAD: - cache_remove_dev(cpu); -- if (per_cpu_cacheinfo(cpu)) -- free_cache_attributes(cpu); -+ free_cache_attributes(cpu); - break; - } - return notifier_from_errno(rc); --- -2.4.3 - diff --git a/ALSA-timer-Fix-leak-in-SNDRV_TIMER_IOCTL_PARAMS.patch b/ALSA-timer-Fix-leak-in-SNDRV_TIMER_IOCTL_PARAMS.patch new file mode 100644 index 000000000..3eb8bf183 --- /dev/null +++ b/ALSA-timer-Fix-leak-in-SNDRV_TIMER_IOCTL_PARAMS.patch @@ -0,0 +1,33 @@ +From 527a5767c165abd2b4dba99da992c51ca7547562 Mon Sep 17 00:00:00 2001 +From: Kangjie Lu +Date: Tue, 3 May 2016 16:44:07 -0400 +Subject: [PATCH 1/3] ALSA: timer: Fix leak in SNDRV_TIMER_IOCTL_PARAMS +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The stack object “tread” has a total size of 32 bytes. Its field +“event” and “val” both contain 4 bytes padding. These 8 bytes +padding bytes are sent to user without being initialized. + +Signed-off-by: Kangjie Lu +Signed-off-by: Takashi Iwai +--- + sound/core/timer.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/sound/core/timer.c b/sound/core/timer.c +index 6469bedda2f3..964f5ebf495e 100644 +--- a/sound/core/timer.c ++++ b/sound/core/timer.c +@@ -1739,6 +1739,7 @@ static int snd_timer_user_params(struct file *file, + if (tu->timeri->flags & SNDRV_TIMER_IFLG_EARLY_EVENT) { + if (tu->tread) { + struct snd_timer_tread tread; ++ memset(&tread, 0, sizeof(tread)); + tread.event = SNDRV_TIMER_EVENT_EARLY; + tread.tstamp.tv_sec = 0; + tread.tstamp.tv_nsec = 0; +-- +2.5.5 + diff --git a/ALSA-timer-Fix-leak-in-events-via-snd_timer_user_cca.patch b/ALSA-timer-Fix-leak-in-events-via-snd_timer_user_cca.patch new file mode 100644 index 000000000..e6f46f8a8 --- /dev/null +++ b/ALSA-timer-Fix-leak-in-events-via-snd_timer_user_cca.patch @@ -0,0 +1,34 @@ +From addd6e9f0e25efb00d813d54528607c75b77c416 Mon Sep 17 00:00:00 2001 +From: Kangjie Lu +Date: Tue, 3 May 2016 16:44:20 -0400 +Subject: [PATCH 2/3] ALSA: timer: Fix leak in events via + snd_timer_user_ccallback +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The stack object “r1” has a total size of 32 bytes. Its field +“event” and “val” both contain 4 bytes padding. These 8 bytes +padding bytes are sent to user without being initialized. + +Signed-off-by: Kangjie Lu +Signed-off-by: Takashi Iwai +--- + sound/core/timer.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/sound/core/timer.c b/sound/core/timer.c +index 964f5ebf495e..e98fa5feb731 100644 +--- a/sound/core/timer.c ++++ b/sound/core/timer.c +@@ -1225,6 +1225,7 @@ static void snd_timer_user_ccallback(struct snd_timer_instance *timeri, + tu->tstamp = *tstamp; + if ((tu->filter & (1 << event)) == 0 || !tu->tread) + return; ++ memset(&r1, 0, sizeof(r1)); + r1.event = event; + r1.tstamp = *tstamp; + r1.val = resolution; +-- +2.5.5 + diff --git a/ALSA-timer-Fix-leak-in-events-via-snd_timer_user_tin.patch b/ALSA-timer-Fix-leak-in-events-via-snd_timer_user_tin.patch new file mode 100644 index 000000000..7851c55a2 --- /dev/null +++ b/ALSA-timer-Fix-leak-in-events-via-snd_timer_user_tin.patch @@ -0,0 +1,34 @@ +From b06a443b5679e9a0298e2f206ddb60845569f62f Mon Sep 17 00:00:00 2001 +From: Kangjie Lu +Date: Tue, 3 May 2016 16:44:32 -0400 +Subject: [PATCH 3/3] ALSA: timer: Fix leak in events via + snd_timer_user_tinterrupt +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The stack object “r1” has a total size of 32 bytes. Its field +“event” and “val” both contain 4 bytes padding. These 8 bytes +padding bytes are sent to user without being initialized. + +Signed-off-by: Kangjie Lu +Signed-off-by: Takashi Iwai +--- + sound/core/timer.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/sound/core/timer.c b/sound/core/timer.c +index e98fa5feb731..c69a27155433 100644 +--- a/sound/core/timer.c ++++ b/sound/core/timer.c +@@ -1268,6 +1268,7 @@ static void snd_timer_user_tinterrupt(struct snd_timer_instance *timeri, + } + if ((tu->filter & (1 << SNDRV_TIMER_EVENT_RESOLUTION)) && + tu->last_resolution != resolution) { ++ memset(&r1, 0, sizeof(r1)); + r1.event = SNDRV_TIMER_EVENT_RESOLUTION; + r1.tstamp = tstamp; + r1.val = resolution; +-- +2.5.5 + diff --git a/Add-EFI-signature-data-types.patch b/Add-EFI-signature-data-types.patch index 35f170abb..4bdea30ae 100644 --- a/Add-EFI-signature-data-types.patch +++ b/Add-EFI-signature-data-types.patch @@ -1,7 +1,7 @@ -From 47f6b5c281137394d627e275cb80980492d00d84 Mon Sep 17 00:00:00 2001 +From 24ceffbbe2764a31328e1146a2cf4bdcf85664e7 Mon Sep 17 00:00:00 2001 From: Dave Howells Date: Tue, 23 Oct 2012 09:30:54 -0400 -Subject: [PATCH 15/20] Add EFI signature data types +Subject: [PATCH] Add EFI signature data types Add the data types that are used for containing hashes, keys and certificates for cryptographic verification. @@ -15,12 +15,12 @@ Signed-off-by: David Howells 1 file changed, 20 insertions(+) diff --git a/include/linux/efi.h b/include/linux/efi.h -index 4dc970e..82d6218 100644 +index 333d0ca6940f..b3efb6d06344 100644 --- a/include/linux/efi.h +++ b/include/linux/efi.h -@@ -599,6 +599,12 @@ void efi_native_runtime_setup(void); - #define EFI_PROPERTIES_TABLE_GUID \ - EFI_GUID( 0x880aaca3, 0x4adc, 0x4a04, 0x90, 0x79, 0xb7, 0x47, 0x34, 0x08, 0x25, 0xe5 ) +@@ -603,6 +603,12 @@ void efi_native_runtime_setup(void); + EFI_GUID(0x3152bca5, 0xeade, 0x433d, \ + 0x86, 0x2e, 0xc0, 0x1c, 0xdc, 0x29, 0x1f, 0x44) +#define EFI_CERT_SHA256_GUID \ + EFI_GUID( 0xc1c41626, 0x504c, 0x4092, 0xac, 0xa9, 0x41, 0xf9, 0x36, 0x93, 0x43, 0x28 ) @@ -31,7 +31,7 @@ index 4dc970e..82d6218 100644 typedef struct { efi_guid_t guid; u64 table; -@@ -823,6 +829,20 @@ typedef struct { +@@ -827,6 +833,20 @@ typedef struct { #define EFI_INVALID_TABLE_ADDR (~0UL) diff --git a/Add-an-EFI-signature-blob-parser-and-key-loader.patch b/Add-an-EFI-signature-blob-parser-and-key-loader.patch index 06ddd1596..86a285581 100644 --- a/Add-an-EFI-signature-blob-parser-and-key-loader.patch +++ b/Add-an-EFI-signature-blob-parser-and-key-loader.patch @@ -36,10 +36,9 @@ diff --git a/crypto/asymmetric_keys/Makefile b/crypto/asymmetric_keys/Makefile index cd1406f9b14a..d9db380bbe53 100644 --- a/crypto/asymmetric_keys/Makefile +++ b/crypto/asymmetric_keys/Makefile -@@ -8,6 +8,7 @@ asymmetric_keys-y := asymmetric_type.o signature.o +@@ -7,5 +7,6 @@ asymmetric_keys-y := asymmetric_type.o signature.o obj-$(CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE) += public_key.o - obj-$(CONFIG_PUBLIC_KEY_ALGO_RSA) += rsa.o +obj-$(CONFIG_EFI_SIGNATURE_LIST_PARSER) += efi_parser.o # diff --git a/Fix-tegra-to-use-stdout-path-for-serial-console.patch b/Fix-tegra-to-use-stdout-path-for-serial-console.patch new file mode 100644 index 000000000..80a2d1b95 --- /dev/null +++ b/Fix-tegra-to-use-stdout-path-for-serial-console.patch @@ -0,0 +1,318 @@ +From 15b8caef5f380d9465876478ff5e365bc6afa5b6 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 6 Mar 2016 10:59:13 +0000 +Subject: [PATCH] Fix tegra to use stdout-path for serial console + +--- + arch/arm/boot/dts/tegra114-dalmore.dts | 4 ++++ + arch/arm/boot/dts/tegra124-jetson-tk1.dts | 4 ++++ + arch/arm/boot/dts/tegra124-nyan.dtsi | 4 ++++ + arch/arm/boot/dts/tegra124-venice2.dts | 4 ++++ + arch/arm/boot/dts/tegra20-harmony.dts | 4 ++++ + arch/arm/boot/dts/tegra20-iris-512.dts | 4 ++++ + arch/arm/boot/dts/tegra20-medcom-wide.dts | 4 ++++ + arch/arm/boot/dts/tegra20-paz00.dts | 4 ++++ + arch/arm/boot/dts/tegra20-seaboard.dts | 4 ++++ + arch/arm/boot/dts/tegra20-tamonten.dtsi | 4 ++++ + arch/arm/boot/dts/tegra20-trimslice.dts | 4 ++++ + arch/arm/boot/dts/tegra20-ventana.dts | 4 ++++ + arch/arm/boot/dts/tegra20-whistler.dts | 4 ++++ + arch/arm/boot/dts/tegra30-apalis-eval.dts | 4 ++++ + arch/arm/boot/dts/tegra30-beaver.dts | 4 ++++ + arch/arm/boot/dts/tegra30-cardhu.dtsi | 4 ++++ + arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 4 ++++ + arch/arm64/boot/dts/nvidia/tegra132-norrin.dts | 5 ++++- + arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi | 4 ++++ + 19 files changed, 76 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts +index 8b7aa0d..b5748ee 100644 +--- a/arch/arm/boot/dts/tegra114-dalmore.dts ++++ b/arch/arm/boot/dts/tegra114-dalmore.dts +@@ -18,6 +18,10 @@ + serial0 = &uartd; + }; + ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + memory { + reg = <0x80000000 0x40000000>; + }; +diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts +index 66b4451..abf046a 100644 +--- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts ++++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts +@@ -15,6 +15,10 @@ + serial0 = &uartd; + }; + ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + memory { + reg = <0x0 0x80000000 0x0 0x80000000>; + }; +diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi +index ec1aa64..e2cd39e 100644 +--- a/arch/arm/boot/dts/tegra124-nyan.dtsi ++++ b/arch/arm/boot/dts/tegra124-nyan.dtsi +@@ -8,6 +8,10 @@ + serial0 = &uarta; + }; + ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + memory { + reg = <0x0 0x80000000 0x0 0x80000000>; + }; +diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts +index cfbdf42..604f4b7 100644 +--- a/arch/arm/boot/dts/tegra124-venice2.dts ++++ b/arch/arm/boot/dts/tegra124-venice2.dts +@@ -13,6 +13,10 @@ + serial0 = &uarta; + }; + ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + memory { + reg = <0x0 0x80000000 0x0 0x80000000>; + }; +diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts +index b926a07..4b73c76 100644 +--- a/arch/arm/boot/dts/tegra20-harmony.dts ++++ b/arch/arm/boot/dts/tegra20-harmony.dts +@@ -13,6 +13,10 @@ + serial0 = &uartd; + }; + ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + memory { + reg = <0x00000000 0x40000000>; + }; +diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts b/arch/arm/boot/dts/tegra20-iris-512.dts +index 1dd7d7b..bb56dfe 100644 +--- a/arch/arm/boot/dts/tegra20-iris-512.dts ++++ b/arch/arm/boot/dts/tegra20-iris-512.dts +@@ -11,6 +11,10 @@ + serial1 = &uartd; + }; + ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + host1x@50000000 { + hdmi@54280000 { + status = "okay"; +diff --git a/arch/arm/boot/dts/tegra20-medcom-wide.dts b/arch/arm/boot/dts/tegra20-medcom-wide.dts +index 9b87526..34c6588 100644 +--- a/arch/arm/boot/dts/tegra20-medcom-wide.dts ++++ b/arch/arm/boot/dts/tegra20-medcom-wide.dts +@@ -10,6 +10,10 @@ + serial0 = &uartd; + }; + ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + pwm@7000a000 { + status = "okay"; + }; +diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts +index ed7e100..81a10a9 100644 +--- a/arch/arm/boot/dts/tegra20-paz00.dts ++++ b/arch/arm/boot/dts/tegra20-paz00.dts +@@ -14,6 +14,10 @@ + serial1 = &uartc; + }; + ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + memory { + reg = <0x00000000 0x20000000>; + }; +diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts +index aea8994..0aed748 100644 +--- a/arch/arm/boot/dts/tegra20-seaboard.dts ++++ b/arch/arm/boot/dts/tegra20-seaboard.dts +@@ -13,6 +13,10 @@ + serial0 = &uartd; + }; + ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + memory { + reg = <0x00000000 0x40000000>; + }; +diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi +index 13d4e61..025e9e8 100644 +--- a/arch/arm/boot/dts/tegra20-tamonten.dtsi ++++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi +@@ -10,6 +10,10 @@ + serial0 = &uartd; + }; + ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + memory { + reg = <0x00000000 0x20000000>; + }; +diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts +index d99af4e..69d25ca 100644 +--- a/arch/arm/boot/dts/tegra20-trimslice.dts ++++ b/arch/arm/boot/dts/tegra20-trimslice.dts +@@ -13,6 +13,10 @@ + serial0 = &uarta; + }; + ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + memory { + reg = <0x00000000 0x40000000>; + }; +diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts +index 04c58e9..c61533a 100644 +--- a/arch/arm/boot/dts/tegra20-ventana.dts ++++ b/arch/arm/boot/dts/tegra20-ventana.dts +@@ -13,6 +13,10 @@ + serial0 = &uartd; + }; + ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + memory { + reg = <0x00000000 0x40000000>; + }; +diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts +index 340d811..bd76585 100644 +--- a/arch/arm/boot/dts/tegra20-whistler.dts ++++ b/arch/arm/boot/dts/tegra20-whistler.dts +@@ -13,6 +13,10 @@ + serial0 = &uarta; + }; + ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + memory { + reg = <0x00000000 0x20000000>; + }; +diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts +index f2879cf..b914bcb 100644 +--- a/arch/arm/boot/dts/tegra30-apalis-eval.dts ++++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts +@@ -17,6 +17,10 @@ + serial3 = &uartd; + }; + ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + pcie-controller@00003000 { + status = "okay"; + +diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts +index 3dede39..1eca3b2 100644 +--- a/arch/arm/boot/dts/tegra30-beaver.dts ++++ b/arch/arm/boot/dts/tegra30-beaver.dts +@@ -12,6 +12,10 @@ + serial0 = &uarta; + }; + ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + memory { + reg = <0x80000000 0x7ff00000>; + }; +diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi +index bb1ca15..de9d6cc 100644 +--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi ++++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi +@@ -35,6 +35,10 @@ + serial1 = &uartc; + }; + ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + memory { + reg = <0x80000000 0x40000000>; + }; +diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts +index 3ff019f..93e1ffd 100644 +--- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts ++++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts +@@ -15,6 +15,10 @@ + serial2 = &uartd; + }; + ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + host1x@50000000 { + dc@54200000 { + rgb { +diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts +index 62f33fc..3c0b4d7 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts +@@ -10,9 +10,12 @@ + aliases { + rtc0 = "/i2c@0,7000d000/as3722@40"; + rtc1 = "/rtc@0,7000e000"; ++ serial0 = &uarta; + }; + +- chosen { }; ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; + + memory { + device_type = "memory"; +diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi +index ece0dec..73ba582 100644 +--- a/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi +@@ -9,6 +9,10 @@ + serial0 = &uarta; + }; + ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + memory { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0xc0000000>; +-- +2.5.0 + diff --git a/HID-chicony-Add-support-for-Acer-Aspire-Switch-12.patch b/HID-chicony-Add-support-for-Acer-Aspire-Switch-12.patch deleted file mode 100644 index 2baf72e4c..000000000 --- a/HID-chicony-Add-support-for-Acer-Aspire-Switch-12.patch +++ /dev/null @@ -1,103 +0,0 @@ -From 98f07385212073536f303c07ece455acdd4d267f Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?=D0=9D=D0=B8=D0=BA=D0=BE=D0=BB=D0=B0=D0=B9=20=D0=9A=D1=83?= - =?UTF-8?q?=D0=B4=D1=80=D1=8F=D0=B2=D1=86=D0=B5=D0=B2?= - -Date: Tue, 21 Jul 2015 13:31:52 +0300 -Subject: [PATCH] HID: chicony: Add support for Acer Aspire Switch 12 - -Acer Aspire Switch 12 keyboard Chicony's controller reports too big usage -index on the 1st interface. The patch fixes the report. The work based on -solution from drivers/hid/hid-holtek-mouse.c - -Bug report: https://bugzilla.kernel.org/show_bug.cgi?id=101721 - -Signed-off-by: Nicholas Kudriavtsev -Signed-off-by: Jiri Kosina ---- - drivers/hid/hid-chicony.c | 26 ++++++++++++++++++++++++++ - drivers/hid/hid-core.c | 1 + - drivers/hid/hid-ids.h | 1 + - 3 files changed, 28 insertions(+) - -diff --git a/drivers/hid/hid-chicony.c b/drivers/hid/hid-chicony.c -index b613d5a79684..bc3cec199fee 100644 ---- a/drivers/hid/hid-chicony.c -+++ b/drivers/hid/hid-chicony.c -@@ -20,6 +20,7 @@ - #include - #include - #include -+#include - - #include "hid-ids.h" - -@@ -57,10 +58,34 @@ static int ch_input_mapping(struct hid_device *hdev, struct hid_input *hi, - return 1; - } - -+static __u8 *ch_switch12_report_fixup(struct hid_device *hdev, __u8 *rdesc, -+ unsigned int *rsize) -+{ -+ struct usb_interface *intf = to_usb_interface(hdev->dev.parent); -+ -+ if (intf->cur_altsetting->desc.bInterfaceNumber == 1) { -+ /* Change usage maximum and logical maximum from 0x7fff to -+ * 0x2fff, so they don't exceed HID_MAX_USAGES */ -+ switch (hdev->product) { -+ case USB_DEVICE_ID_CHICONY_ACER_SWITCH12: -+ if (*rsize >= 128 && rdesc[64] == 0xff && rdesc[65] == 0x7f -+ && rdesc[69] == 0xff && rdesc[70] == 0x7f) { -+ hid_info(hdev, "Fixing up report descriptor\n"); -+ rdesc[65] = rdesc[70] = 0x2f; -+ } -+ break; -+ } -+ -+ } -+ return rdesc; -+} -+ -+ - static const struct hid_device_id ch_devices[] = { - { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_TACTICAL_PAD) }, - { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_WIRELESS2) }, - { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_AK1D) }, -+ { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_ACER_SWITCH12) }, - { } - }; - MODULE_DEVICE_TABLE(hid, ch_devices); -@@ -68,6 +93,7 @@ MODULE_DEVICE_TABLE(hid, ch_devices); - static struct hid_driver ch_driver = { - .name = "chicony", - .id_table = ch_devices, -+ .report_fixup = ch_switch12_report_fixup, - .input_mapping = ch_input_mapping, - }; - module_hid_driver(ch_driver); -diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c -index e6fce23b121a..f90ca6574221 100644 ---- a/drivers/hid/hid-core.c -+++ b/drivers/hid/hid-core.c -@@ -1807,6 +1807,7 @@ static const struct hid_device_id hid_have_special_driver[] = { - { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_WIRELESS) }, - { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_WIRELESS2) }, - { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_AK1D) }, -+ { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_ACER_SWITCH12) }, - { HID_USB_DEVICE(USB_VENDOR_ID_CREATIVELABS, USB_DEVICE_ID_PRODIKEYS_PCMIDI) }, - { HID_USB_DEVICE(USB_VENDOR_ID_CYGNAL, USB_DEVICE_ID_CYGNAL_CP2112) }, - { HID_USB_DEVICE(USB_VENDOR_ID_CYPRESS, USB_DEVICE_ID_CYPRESS_BARCODE_1) }, -diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h -index b3b225b75d0a..79210ca8eff1 100644 ---- a/drivers/hid/hid-ids.h -+++ b/drivers/hid/hid-ids.h -@@ -233,6 +233,7 @@ - #define USB_DEVICE_ID_CHICONY_PIXART_USB_OPTICAL_MOUSE 0x1053 - #define USB_DEVICE_ID_CHICONY_WIRELESS2 0x1123 - #define USB_DEVICE_ID_CHICONY_AK1D 0x1125 -+#define USB_DEVICE_ID_CHICONY_ACER_SWITCH12 0x1421 - - #define USB_VENDOR_ID_CHUNGHWAT 0x2247 - #define USB_DEVICE_ID_CHUNGHWAT_MULTITOUCH 0x0001 --- -2.4.3 - diff --git a/HID-hid-input-Fix-accessing-freed-memory-during-devi.patch b/HID-hid-input-Fix-accessing-freed-memory-during-devi.patch deleted file mode 100644 index 6a64910b5..000000000 --- a/HID-hid-input-Fix-accessing-freed-memory-during-devi.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 0621809e37936e7c2b3eac9165cf2aad7f9189eb Mon Sep 17 00:00:00 2001 -From: Krzysztof Kozlowski -Date: Mon, 3 Aug 2015 14:57:30 +0900 -Subject: [PATCH] HID: hid-input: Fix accessing freed memory during device - disconnect - -During unbinding the driver was dereferencing a pointer to memory -already freed by power_supply_unregister(). - -Driver was freeing its internal description of battery through pointers -stored in power_supply structure. However, because the core owns the -power supply instance, after calling power_supply_unregister() this -memory is freed and the driver cannot access these members. - -Fix this by storing the pointer to internal description of battery in a -local variable before calling power_supply_unregister(), so the pointer -remains valid. - -Signed-off-by: Krzysztof Kozlowski -Reported-by: H.J. Lu -Fixes: 297d716f6260 ("power_supply: Change ownership from driver to core") -Cc: -Reviewed-by: Dmitry Torokhov -Signed-off-by: Jiri Kosina ---- - drivers/hid/hid-input.c | 7 +++++-- - 1 file changed, 5 insertions(+), 2 deletions(-) - -diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c -index 3511bbab..e3c6364 100644 ---- a/drivers/hid/hid-input.c -+++ b/drivers/hid/hid-input.c -@@ -462,12 +462,15 @@ out: - - static void hidinput_cleanup_battery(struct hid_device *dev) - { -+ const struct power_supply_desc *psy_desc; -+ - if (!dev->battery) - return; - -+ psy_desc = dev->battery->desc; - power_supply_unregister(dev->battery); -- kfree(dev->battery->desc->name); -- kfree(dev->battery->desc); -+ kfree(psy_desc->name); -+ kfree(psy_desc); - dev->battery = NULL; - } - #else /* !CONFIG_HID_BATTERY_STRENGTH */ --- -2.4.3 - diff --git a/HID-multitouch-enable-palm-rejection-if-device-imple.patch b/HID-multitouch-enable-palm-rejection-if-device-imple.patch deleted file mode 100644 index b9753fce7..000000000 --- a/HID-multitouch-enable-palm-rejection-if-device-imple.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 37e81f1a82ba4f214c05c4cc3807378753c7a867 Mon Sep 17 00:00:00 2001 -From: Allen Hung -Date: Fri, 20 Nov 2015 18:21:06 +0800 -Subject: [PATCH] HID: multitouch: enable palm rejection if device implements - confidence usage - -The usage Confidence is mandary to Windows Precision Touchpad devices. The -appearance of this usage is checked in hidinput_connect but the quirk -MT_QUIRK_VALID_IS_CONFIDENCE is not applied to device accordingly. -Apply this quirk and also remove quirk MT_QUIRK_ALWAYS_VALID to enable palm -rejection for the WIN 8 touchpad devices which have implemented usage -Confidence in its input reports. - -Tested on Dell XPS 13 laptop. - -Signed-off-by: Allen Hung -Reviewed-by: Benjamin Tissoires -Signed-off-by: Jiri Kosina ---- - drivers/hid/hid-multitouch.c | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c -index 7c811252c1ce..0c94348a168d 100644 ---- a/drivers/hid/hid-multitouch.c -+++ b/drivers/hid/hid-multitouch.c -@@ -448,6 +448,11 @@ static int mt_touch_input_mapping(struct hid_device *hdev, struct hid_input *hi, - mt_store_field(usage, td, hi); - return 1; - case HID_DG_CONFIDENCE: -+ if (cls->name == MT_CLS_WIN_8 && -+ field->application == HID_DG_TOUCHPAD) { -+ cls->quirks &= ~MT_QUIRK_ALWAYS_VALID; -+ cls->quirks |= MT_QUIRK_VALID_IS_CONFIDENCE; -+ } - mt_store_field(usage, td, hi); - return 1; - case HID_DG_TIPSWITCH: --- -2.5.0 - diff --git a/HID-sony-do-not-bail-out-when-the-sixaxis-refuses-th.patch b/HID-sony-do-not-bail-out-when-the-sixaxis-refuses-th.patch deleted file mode 100644 index b1a789e84..000000000 --- a/HID-sony-do-not-bail-out-when-the-sixaxis-refuses-th.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 954d6154959c8c196fa4b89fc98a4fb377c6a38d Mon Sep 17 00:00:00 2001 -From: Benjamin Tissoires -Date: Fri, 8 Jan 2016 17:58:49 +0100 -Subject: [PATCH] HID: sony: do not bail out when the sixaxis refuses the - output report - -When setting the operational mode, some third party (Speedlink Strike-FX) -gamepads refuse the output report. Failing here means we refuse to -initialize the gamepad while this should be harmless. - -The weird part is that the initial commit that added this: a7de9b8 -("HID: sony: Enable Gasia third-party PS3 controllers") mentions this -very same controller as one requiring this output report. -Anyway, it's broken for one user at least, so let's change it. -We will report an error, but at least the controller should work. - -And no, these devices present themselves as legacy Sony controllers -(VID:PID of 054C:0268, as in the official ones) so there are no ways -of discriminating them from the official ones. - -https://bugzilla.redhat.com/show_bug.cgi?id=1255325 - -Reported-and-tested-by: Max Fedotov -Signed-off-by: Benjamin Tissoires -Signed-off-by: Jiri Kosina ---- - drivers/hid/hid-sony.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - -diff --git a/drivers/hid/hid-sony.c b/drivers/hid/hid-sony.c -index 661f94f8ab8b..11f91c0c2458 100644 ---- a/drivers/hid/hid-sony.c -+++ b/drivers/hid/hid-sony.c -@@ -1411,8 +1411,10 @@ static int sixaxis_set_operational_usb(struct hid_device *hdev) - } - - ret = hid_hw_output_report(hdev, buf, 1); -- if (ret < 0) -- hid_err(hdev, "can't set operational mode: step 3\n"); -+ if (ret < 0) { -+ hid_info(hdev, "can't set operational mode: step 3, ignoring\n"); -+ ret = 0; -+ } - - out: - kfree(buf); --- -2.5.0 - diff --git a/Initial-AllWinner-A64-and-PINE64-support.patch b/Initial-AllWinner-A64-and-PINE64-support.patch new file mode 100644 index 000000000..966275a8f --- /dev/null +++ b/Initial-AllWinner-A64-and-PINE64-support.patch @@ -0,0 +1,1200 @@ +From 97f002d28e975991226ab70599731bd2ccc8c060 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 6 Mar 2016 12:06:41 +0000 +Subject: [PATCH] Initial AllWinner A64 and PINE64 support + +--- + Documentation/devicetree/bindings/arm/sunxi.txt | 1 + + Documentation/devicetree/bindings/clock/sunxi.txt | 7 + + .../devicetree/bindings/vendor-prefixes.txt | 1 + + arch/arm/boot/dts/sun8i-h3.dtsi | 18 +- + arch/arm/mach-sunxi/Kconfig | 7 + + arch/arm64/Kconfig.platforms | 6 + + arch/arm64/boot/dts/Makefile | 1 + + arch/arm64/boot/dts/allwinner/Makefile | 5 + + .../dts/allwinner/sun50i-a64-pine64-common.dtsi | 80 +++ + .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 59 ++ + .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 58 ++ + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 624 +++++++++++++++++++++ + drivers/clk/sunxi/Makefile | 1 + + drivers/clk/sunxi/clk-factors.c | 3 +- + drivers/clk/sunxi/clk-factors.h | 1 + + drivers/clk/sunxi/clk-multi-gates.c | 105 ++++ + drivers/clk/sunxi/clk-sunxi.c | 4 +- + drivers/crypto/Kconfig | 2 +- + 23 files changed, 1582 insertions(+), 16 deletions(-) + create mode 100644 arch/arm64/boot/dts/allwinner/Makefile + create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi + create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts + create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts + create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi + create mode 100644 drivers/clk/sunxi/clk-multi-gates.c + create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c + +diff --git a/Documentation/devicetree/bindings/arm/sunxi.txt b/Documentation/devicetree/bindings/arm/sunxi.txt +index bb9b0faa..8b39d2b 100644 +--- a/Documentation/devicetree/bindings/arm/sunxi.txt ++++ b/Documentation/devicetree/bindings/arm/sunxi.txt +@@ -13,3 +13,4 @@ using one of the following compatible strings: + allwinner,sun8i-a83t + allwinner,sun8i-h3 + allwinner,sun9i-a80 ++ allwinner,sun50i-a64 +diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt +index e59f57b..8af12b5 100644 +--- a/Documentation/devicetree/bindings/clock/sunxi.txt ++++ b/Documentation/devicetree/bindings/clock/sunxi.txt +@@ -77,6 +77,8 @@ Required properties: + "allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80 + "allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80 + "allwinner,sun4i-a10-ve-clk" - for the Video Engine clock ++ "allwinner,sunxi-multi-bus-gates-clk" - for the multi-parent bus gates ++ "allwinner,sun50i-a64-bus-gates-clk" - for the bus gates on A64 + + Required properties for all clocks: + - reg : shall be the control register address for the clock. +@@ -117,6 +119,11 @@ For "allwinner,sun6i-a31-pll6-clk", there are 2 outputs. The first output + is the normal PLL6 output, or "pll6". The second output is rate doubled + PLL6, or "pll6x2". + ++The "allwinner,sunxi-multi-bus-gates-clk" holds the actual clocks in ++child nodes, where each one specifies the parent clock that the particular ++gates are depending from. The child nodes each follow the common clock ++binding as described in this document. ++ + The "allwinner,*-mmc-clk" clocks have three different outputs: the + main clock, with the ID 0, and the output and sample clocks, with the + IDs 1 and 2, respectively. +diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt +index 72e2c5a..0c22fa9 100644 +--- a/Documentation/devicetree/bindings/vendor-prefixes.txt ++++ b/Documentation/devicetree/bindings/vendor-prefixes.txt +@@ -175,6 +175,7 @@ parade Parade Technologies Inc. + pericom Pericom Technology Inc. + phytec PHYTEC Messtechnik GmbH + picochip Picochip Ltd ++pine64 Pine64 + plathome Plat'Home Co., Ltd. + plda PLDA + pixcir PIXCIR MICROELECTRONICS Co., Ltd +diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi +index 1524130e..7c50fa0 100644 +--- a/arch/arm/boot/dts/sun8i-h3.dtsi ++++ b/arch/arm/boot/dts/sun8i-h3.dtsi +@@ -137,12 +137,12 @@ + clock-output-names = "pll6d2"; + }; + +- /* dummy clock until pll6 can be reused */ +- pll8: pll8_clk { +- #clock-cells = <0>; +- compatible = "fixed-clock"; +- clock-frequency = <1>; +- clock-output-names = "pll8"; ++ pll8: clk@c01c20044 { ++ #clock-cells = <1>; ++ compatible = "allwinner,sun6i-a31-pll6-clk"; ++ reg = <0x01c20044 0x4>; ++ clocks = <&osc24M>; ++ clock-output-names = "pll8", "pll8x2"; + }; + + cpu: cpu_clk@01c20050 { +@@ -243,7 +243,7 @@ + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-mmc-clk"; + reg = <0x01c20088 0x4>; +- clocks = <&osc24M>, <&pll6 0>, <&pll8>; ++ clocks = <&osc24M>, <&pll6 0>, <&pll8 0>; + clock-output-names = "mmc0", + "mmc0_output", + "mmc0_sample"; +@@ -253,7 +253,7 @@ + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-mmc-clk"; + reg = <0x01c2008c 0x4>; +- clocks = <&osc24M>, <&pll6 0>, <&pll8>; ++ clocks = <&osc24M>, <&pll6 0>, <&pll8 0>; + clock-output-names = "mmc1", + "mmc1_output", + "mmc1_sample"; +@@ -263,7 +263,7 @@ + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-mmc-clk"; + reg = <0x01c20090 0x4>; +- clocks = <&osc24M>, <&pll6 0>, <&pll8>; ++ clocks = <&osc24M>, <&pll6 0>, <&pll8 0>; + clock-output-names = "mmc2", + "mmc2_output", + "mmc2_sample"; +diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig +index c124d65..b305f5b 100644 +--- a/arch/arm/mach-sunxi/Kconfig ++++ b/arch/arm/mach-sunxi/Kconfig +@@ -46,4 +46,11 @@ config MACH_SUN9I + default ARCH_SUNXI + select ARM_GIC + ++config MACH_SUN50I ++ bool "Allwinner A64 (sun50i) SoCs support" ++ default ARCH_SUNXI ++ select ARM_GIC ++ select HAVE_ARM_ARCH_TIMER ++ select PINCTRL_SUN50I_A64 ++ + endif +diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms +index 21074f6..63a690d 100644 +--- a/arch/arm64/Kconfig.platforms ++++ b/arch/arm64/Kconfig.platforms +@@ -72,6 +72,12 @@ config ARCH_SEATTLE + config ARCH_SHMOBILE + bool + ++config ARCH_SUNXI ++ bool "Allwinner sunxi 64-bit SoC Family" ++ select PINCTRL_SUN50I_A64 ++ help ++ This enables support for Allwinner sunxi based SoCs like the A64. ++ + config ARCH_RENESAS + bool "Renesas SoC Platforms" + select ARCH_SHMOBILE +diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile +index f832b8a..3b7428a 100644 +--- a/arch/arm64/boot/dts/Makefile ++++ b/arch/arm64/boot/dts/Makefile +@@ -2,3 +2,4 @@ + dts-dirs += al ++dts-dirs += allwinner + dts-dirs += altera + dts-dirs += amd +diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile +new file mode 100644 +index 0000000..1e29a5a +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/Makefile +@@ -0,0 +1,5 @@ ++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb ++ ++always := $(dtb-y) ++subdir-y := $(dts-dirs) ++clean-files := *.dtb +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi +new file mode 100644 +index 0000000..d5a7249 +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi +@@ -0,0 +1,80 @@ ++/* ++ * Copyright (c) 2016 ARM Ltd. ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This library is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This library is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++#include "sun50i-a64.dtsi" ++ ++/ { ++ ++ aliases { ++ serial0 = &uart0; ++ }; ++ ++ soc { ++ reg_vcc3v3: vcc3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ }; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins>, <&mmc0_default_cd_pin>; ++ vmmc-supply = <®_vcc3v3>; ++ cd-gpios = <&pio 5 6 0>; ++ cd-inverted; ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins_a>; ++ status = "okay"; ++}; ++ ++&i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1_pins>; ++ status = "okay"; ++}; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts +new file mode 100644 +index 0000000..549dc15 +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts +@@ -0,0 +1,59 @@ ++/* ++ * Copyright (c) 2016 ARM Ltd. ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This library is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This library is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++ ++#include "sun50i-a64-pine64-common.dtsi" ++ ++/ { ++ model = "Pine64+"; ++ compatible = "pine64,pine64-plus", "allwinner,sun50i-a64"; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ /* There is a model with 2GB of DRAM, but U-Boot fixes this for us. */ ++ memory { ++ reg = <0x40000000 0x40000000>; ++ }; ++}; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +new file mode 100644 +index 0000000..ebe029e +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +@@ -0,0 +1,58 @@ ++/* ++ * Copyright (c) 2016 ARM Ltd. ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This library is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This library is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++ ++#include "sun50i-a64-pine64-common.dtsi" ++ ++/ { ++ model = "Pine64"; ++ compatible = "pine64,pine64", "allwinner,sun50i-a64"; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory { ++ reg = <0x40000000 0x20000000>; ++ }; ++}; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +new file mode 100644 +index 0000000..1bd436f +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +@@ -0,0 +1,624 @@ ++/* ++ * Copyright (C) 2016 ARM Ltd. ++ * based on the Allwinner H3 dtsi: ++ * Copyright (C) 2015 Jens Kuske ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++#include ++#include ++ ++/ { ++ interrupt-parent = <&gic>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ cpu@0 { ++ compatible = "arm,cortex-a53", "arm,armv8"; ++ device_type = "cpu"; ++ reg = <0>; ++ enable-method = "psci"; ++ }; ++ ++ cpu@1 { ++ compatible = "arm,cortex-a53", "arm,armv8"; ++ device_type = "cpu"; ++ reg = <1>; ++ enable-method = "psci"; ++ }; ++ ++ cpu@2 { ++ compatible = "arm,cortex-a53", "arm,armv8"; ++ device_type = "cpu"; ++ reg = <2>; ++ enable-method = "psci"; ++ }; ++ ++ cpu@3 { ++ compatible = "arm,cortex-a53", "arm,armv8"; ++ device_type = "cpu"; ++ reg = <3>; ++ enable-method = "psci"; ++ }; ++ }; ++ ++ psci { ++ compatible = "arm,psci-0.2"; ++ method = "smc"; ++ }; ++ ++ memory { ++ device_type = "memory"; ++ reg = <0x40000000 0>; ++ }; ++ ++ gic: interrupt-controller@1c81000 { ++ compatible = "arm,gic-400"; ++ interrupt-controller; ++ #interrupt-cells = <3>; ++ #address-cells = <0>; ++ ++ reg = <0x01c81000 0x1000>, ++ <0x01c82000 0x2000>, ++ <0x01c84000 0x2000>, ++ <0x01c86000 0x2000>; ++ interrupts = ; ++ }; ++ ++ timer { ++ compatible = "arm,armv8-timer"; ++ interrupts = , ++ , ++ , ++ ; ++ }; ++ ++ clocks { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; ++ ++ osc24M: osc24M_clk { ++ #clock-cells = <0>; ++ compatible = "fixed-clock"; ++ clock-frequency = <24000000>; ++ clock-output-names = "osc24M"; ++ }; ++ ++ osc32k: osc32k_clk { ++ #clock-cells = <0>; ++ compatible = "fixed-clock"; ++ clock-frequency = <32768>; ++ clock-output-names = "osc32k"; ++ }; ++ ++ pll1: pll1_clk@1c20000 { ++ #clock-cells = <0>; ++ compatible = "allwinner,sun8i-a23-pll1-clk"; ++ reg = <0x01c20000 0x4>; ++ clocks = <&osc24M>; ++ clock-output-names = "pll1"; ++ }; ++ ++ pll6: pll6_clk@1c20028 { ++ #clock-cells = <1>; ++ compatible = "allwinner,sun6i-a31-pll6-clk"; ++ reg = <0x01c20028 0x4>; ++ clocks = <&osc24M>; ++ clock-output-names = "pll6", "pll6x2"; ++ }; ++ ++ pll6d2: pll6d2_clk { ++ #clock-cells = <0>; ++ compatible = "fixed-factor-clock"; ++ clock-div = <2>; ++ clock-mult = <1>; ++ clocks = <&pll6 0>; ++ clock-output-names = "pll6d2"; ++ }; ++ ++ pll7: pll7_clk@1c2002c { ++ #clock-cells = <1>; ++ compatible = "allwinner,sun6i-a31-pll6-clk"; ++ reg = <0x01c2002c 0x4>; ++ clocks = <&osc24M>; ++ clock-output-names = "pll7", "pll7x2"; ++ }; ++ ++ cpu: cpu_clk@1c20050 { ++ #clock-cells = <0>; ++ compatible = "allwinner,sun4i-a10-cpu-clk"; ++ reg = <0x01c20050 0x4>; ++ clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll1>; ++ clock-output-names = "cpu"; ++ critical-clocks = <0>; ++ }; ++ ++ axi: axi_clk@1c20050 { ++ #clock-cells = <0>; ++ compatible = "allwinner,sun4i-a10-axi-clk"; ++ reg = <0x01c20050 0x4>; ++ clocks = <&cpu>; ++ clock-output-names = "axi"; ++ }; ++ ++ ahb1: ahb1_clk@1c20054 { ++ #clock-cells = <0>; ++ compatible = "allwinner,sun6i-a31-ahb1-clk"; ++ reg = <0x01c20054 0x4>; ++ clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>; ++ clock-output-names = "ahb1"; ++ }; ++ ++ ahb2: ahb2_clk@1c2005c { ++ #clock-cells = <0>; ++ compatible = "allwinner,sun8i-h3-ahb2-clk"; ++ reg = <0x01c2005c 0x4>; ++ clocks = <&ahb1>, <&pll6d2>; ++ clock-output-names = "ahb2"; ++ }; ++ ++ apb1: apb1_clk@1c20054 { ++ #clock-cells = <0>; ++ compatible = "allwinner,sun4i-a10-apb0-clk"; ++ reg = <0x01c20054 0x4>; ++ clocks = <&ahb1>; ++ clock-output-names = "apb1"; ++ }; ++ ++ apb2: apb2_clk@1c20058 { ++ #clock-cells = <0>; ++ compatible = "allwinner,sun4i-a10-apb1-clk"; ++ reg = <0x01c20058 0x4>; ++ clocks = <&osc32k>, <&osc24M>, <&pll6 1>, <&pll6 1>; ++ clock-output-names = "apb2"; ++ }; ++ ++ bus_gates: bus_gates_clk@1c20060 { ++ #clock-cells = <1>; ++ compatible = "allwinner,sun50i-a64-bus-gates-clk", ++ "allwinner,sunxi-multi-bus-gates-clk"; ++ reg = <0x01c20060 0x14>; ++ ahb1_parent { ++ clocks = <&ahb1>; ++ clock-indices = <1>, <5>, ++ <6>, <8>, ++ <9>, <10>, ++ <13>, <14>, ++ <18>, <19>, ++ <20>, <21>, ++ <23>, <24>, ++ <25>, <28>, ++ <32>, <35>, ++ <36>, <37>, ++ <40>, <43>, ++ <44>, <52>, ++ <53>, <54>, ++ <135>; ++ clock-output-names = "bus_mipidsi", "bus_ce", ++ "bus_dma", "bus_mmc0", ++ "bus_mmc1", "bus_mmc2", ++ "bus_nand", "bus_sdram", ++ "bus_ts", "bus_hstimer", ++ "bus_spi0", "bus_spi1", ++ "bus_otg", "bus_otg_ehci0", ++ "bus_ehci0", "bus_otg_ohci0", ++ "bus_ve", "bus_lcd0", ++ "bus_lcd1", "bus_deint", ++ "bus_csi", "bus_hdmi", ++ "bus_de", "bus_gpu", ++ "bus_msgbox", "bus_spinlock", ++ "bus_dbg"; ++ }; ++ ahb2_parent { ++ clocks = <&ahb2>; ++ clock-indices = <17>, <29>; ++ clock-output-names = "bus_gmac", "bus_ohci0"; ++ }; ++ apb1_parent { ++ clocks = <&apb1>; ++ clock-indices = <64>, <65>, ++ <69>, <72>, ++ <76>, <77>, ++ <78>; ++ clock-output-names = "bus_codec", "bus_spdif", ++ "bus_pio", "bus_ths", ++ "bus_i2s0", "bus_i2s1", ++ "bus_i2s2"; ++ }; ++ abp2_parent { ++ clocks = <&apb2>; ++ clock-indices = <96>, <97>, ++ <98>, <101>, ++ <112>, <113>, ++ <114>, <115>, ++ <116>; ++ clock-output-names = "bus_i2c0", "bus_i2c1", ++ "bus_i2c2", "bus_scr", ++ "bus_uart0", "bus_uart1", ++ "bus_uart2", "bus_uart3", ++ "bus_uart4"; ++ }; ++ }; ++ ++ mmc0_clk: mmc0_clk@1c20088 { ++ #clock-cells = <0>; ++ compatible = "allwinner,sun4i-a10-mod0-clk"; ++ reg = <0x01c20088 0x4>; ++ clocks = <&osc24M>, <&pll6 1>, <&pll7 1>; ++ clock-output-names = "mmc0"; ++ }; ++ ++ mmc1_clk: mmc1_clk@1c2008c { ++ #clock-cells = <0>; ++ compatible = "allwinner,sun4i-a10-mod0-clk"; ++ reg = <0x01c2008c 0x4>; ++ clocks = <&osc24M>, <&pll6 1>, <&pll7 1>; ++ clock-output-names = "mmc1"; ++ }; ++ ++ mmc2_clk: mmc2_clk@1c20090 { ++ #clock-cells = <0>; ++ compatible = "allwinner,sun4i-a10-mod0-clk"; ++ reg = <0x01c20090 0x4>; ++ clocks = <&osc24M>, <&pll6 1>, <&pll7 1>; ++ clock-output-names = "mmc2"; ++ }; ++ }; ++ ++ soc { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; ++ ++ mmc0: mmc@1c0f000 { ++ compatible = "allwinner,sun50i-a64-mmc", ++ "allwinner,sun5i-a13-mmc"; ++ reg = <0x01c0f000 0x1000>; ++ clocks = <&bus_gates 8>, <&mmc0_clk>, ++ <&mmc0_clk>, <&mmc0_clk>; ++ clock-names = "ahb", "mmc", ++ "output", "sample"; ++ resets = <&ahb_rst 8>; ++ reset-names = "ahb"; ++ interrupts = ; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ mmc1: mmc@1c10000 { ++ compatible = "allwinner,sun50i-a64-mmc", ++ "allwinner,sun5i-a13-mmc"; ++ reg = <0x01c10000 0x1000>; ++ clocks = <&bus_gates 9>, <&mmc1_clk>, ++ <&mmc1_clk>, <&mmc1_clk>; ++ clock-names = "ahb", "mmc", ++ "output", "sample"; ++ resets = <&ahb_rst 9>; ++ reset-names = "ahb"; ++ interrupts = ; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ mmc2: mmc@1c11000 { ++ compatible = "allwinner,sun50i-a64-mmc", ++ "allwinner,sun5i-a13-mmc"; ++ reg = <0x01c11000 0x1000>; ++ clocks = <&bus_gates 10>, <&mmc2_clk>, ++ <&mmc2_clk>, <&mmc2_clk>; ++ clock-names = "ahb", "mmc", ++ "output", "sample"; ++ resets = <&ahb_rst 10>; ++ reset-names = "ahb"; ++ interrupts = ; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ pio: pinctrl@1c20800 { ++ compatible = "allwinner,sun50i-a64-pinctrl"; ++ reg = <0x01c20800 0x400>; ++ interrupts = , ++ , ++ ; ++ clocks = <&bus_gates 69>; ++ gpio-controller; ++ #gpio-cells = <3>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ ++ uart0_pins_a: uart0@0 { ++ allwinner,pins = "PB8", "PB9"; ++ allwinner,function = "uart0"; ++ allwinner,drive = ; ++ allwinner,pull = ; ++ }; ++ ++ uart0_pins_b: uart0@1 { ++ allwinner,pins = "PF2", "PF3"; ++ allwinner,function = "uart0"; ++ allwinner,drive = ; ++ allwinner,pull = ; ++ }; ++ ++ uart1_2pins: uart1_2@0 { ++ allwinner,pins = "PG6", "PG7"; ++ allwinner,function = "uart1"; ++ allwinner,drive = ; ++ allwinner,pull = ; ++ }; ++ ++ uart1_4pins: uart1_4@0 { ++ allwinner,pins = "PG6", "PG7", "PG8", "PG9"; ++ allwinner,function = "uart1"; ++ allwinner,drive = ; ++ allwinner,pull = ; ++ }; ++ ++ uart2_2pins: uart2_2@0 { ++ allwinner,pins = "PB0", "PB1"; ++ allwinner,function = "uart2"; ++ allwinner,drive = ; ++ allwinner,pull = ; ++ }; ++ ++ uart2_4pins: uart2_4@0 { ++ allwinner,pins = "PB0", "PB1", "PB2", "PB3"; ++ allwinner,function = "uart2"; ++ allwinner,drive = ; ++ allwinner,pull = ; ++ }; ++ ++ uart3_pins_a: uart3@0 { ++ allwinner,pins = "PD0", "PD1"; ++ allwinner,function = "uart3"; ++ allwinner,drive = ; ++ allwinner,pull = ; ++ }; ++ ++ uart3_2pins_b: uart3_2@1 { ++ allwinner,pins = "PH4", "PH5"; ++ allwinner,function = "uart3"; ++ allwinner,drive = ; ++ allwinner,pull = ; ++ }; ++ ++ uart3_4pins_b: uart3_4@1 { ++ allwinner,pins = "PH4", "PH5", "PH6", "PH7"; ++ allwinner,function = "uart3"; ++ allwinner,drive = ; ++ allwinner,pull = ; ++ }; ++ ++ uart4_2pins: uart4_2@0 { ++ allwinner,pins = "PD2", "PD3"; ++ allwinner,function = "uart4"; ++ allwinner,drive = ; ++ allwinner,pull = ; ++ }; ++ ++ uart4_4pins: uart4_4@0 { ++ allwinner,pins = "PD2", "PD3", "PD4", "PD5"; ++ allwinner,function = "uart4"; ++ allwinner,drive = ; ++ allwinner,pull = ; ++ }; ++ ++ mmc0_pins: mmc0@0 { ++ allwinner,pins = "PF0", "PF1", "PF2", "PF3", ++ "PF4", "PF5"; ++ allwinner,function = "mmc0"; ++ allwinner,drive = ; ++ allwinner,pull = ; ++ }; ++ ++ mmc0_default_cd_pin: mmc0_cd_pin@0 { ++ allwinner,pins = "PF6"; ++ allwinner,function = "gpio_in"; ++ allwinner,drive = ; ++ allwinner,pull = ; ++ }; ++ ++ mmc1_pins: mmc1@0 { ++ allwinner,pins = "PG0", "PG1", "PG2", "PG3", ++ "PG4", "PG5"; ++ allwinner,function = "mmc1"; ++ allwinner,drive = ; ++ allwinner,pull = ; ++ }; ++ ++ mmc2_pins: mmc2@0 { ++ allwinner,pins = "PC1", "PC5", "PC6", "PC8", ++ "PC9", "PC10"; ++ allwinner,function = "mmc2"; ++ allwinner,drive = ; ++ allwinner,pull = ; ++ }; ++ ++ i2c0_pins: i2c0_pins { ++ allwinner,pins = "PH0", "PH1"; ++ allwinner,function = "i2c0"; ++ allwinner,drive = ; ++ allwinner,pull = ; ++ }; ++ ++ i2c1_pins: i2c1_pins { ++ allwinner,pins = "PH2", "PH3"; ++ allwinner,function = "i2c1"; ++ allwinner,drive = ; ++ allwinner,pull = ; ++ }; ++ ++ i2c2_pins: i2c2_pins { ++ allwinner,pins = "PE14", "PE15"; ++ allwinner,function = "i2c2"; ++ allwinner,drive = ; ++ allwinner,pull = ; ++ }; ++ }; ++ ++ ahb_rst: reset@1c202c0 { ++ #reset-cells = <1>; ++ compatible = "allwinner,sun6i-a31-clock-reset"; ++ reg = <0x01c202c0 0xc>; ++ }; ++ ++ apb1_rst: reset@1c202d0 { ++ #reset-cells = <1>; ++ compatible = "allwinner,sun6i-a31-clock-reset"; ++ reg = <0x01c202d0 0x4>; ++ }; ++ ++ apb2_rst: reset@1c202d8 { ++ #reset-cells = <1>; ++ compatible = "allwinner,sun6i-a31-clock-reset"; ++ reg = <0x01c202d8 0x4>; ++ }; ++ ++ uart0: serial@1c28000 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x01c28000 0x400>; ++ interrupts = ; ++ reg-shift = <2>; ++ reg-io-width = <4>; ++ clocks = <&bus_gates 112>; ++ resets = <&apb2_rst 16>; ++ status = "disabled"; ++ }; ++ ++ uart1: serial@1c28400 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x01c28400 0x400>; ++ interrupts = ; ++ reg-shift = <2>; ++ reg-io-width = <4>; ++ clocks = <&bus_gates 113>; ++ resets = <&apb2_rst 17>; ++ status = "disabled"; ++ }; ++ ++ uart2: serial@1c28800 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x01c28800 0x400>; ++ interrupts = ; ++ reg-shift = <2>; ++ reg-io-width = <4>; ++ clocks = <&bus_gates 114>; ++ resets = <&apb2_rst 18>; ++ status = "disabled"; ++ }; ++ ++ uart3: serial@1c28c00 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x01c28c00 0x400>; ++ interrupts = ; ++ reg-shift = <2>; ++ reg-io-width = <4>; ++ clocks = <&bus_gates 115>; ++ resets = <&apb2_rst 19>; ++ status = "disabled"; ++ }; ++ ++ uart4: serial@1c29000 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x01c29000 0x400>; ++ interrupts = ; ++ reg-shift = <2>; ++ reg-io-width = <4>; ++ clocks = <&bus_gates 116>; ++ resets = <&apb2_rst 20>; ++ status = "disabled"; ++ }; ++ ++ rtc: rtc@1f00000 { ++ compatible = "allwinner,sun6i-a31-rtc"; ++ reg = <0x01f00000 0x54>; ++ interrupts = , ++ ; ++ }; ++ ++ i2c0: i2c@1c2ac00 { ++ compatible = "allwinner,sun6i-a31-i2c"; ++ reg = <0x01c2ac00 0x400>; ++ interrupts = ; ++ clocks = <&bus_gates 96>; ++ resets = <&apb2_rst 0>; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ i2c1: i2c@1c2b000 { ++ compatible = "allwinner,sun6i-a31-i2c"; ++ reg = <0x01c2b000 0x400>; ++ interrupts = ; ++ clocks = <&bus_gates 97>; ++ resets = <&apb2_rst 1>; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ i2c2: i2c@1c2b400 { ++ compatible = "allwinner,sun6i-a31-i2c"; ++ reg = <0x01c2b400 0x400>; ++ interrupts = ; ++ clocks = <&bus_gates 98>; ++ resets = <&apb2_rst 2>; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ }; ++}; +diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile +index 3fd7901..3a9dc31 100644 +--- a/drivers/clk/sunxi/Makefile ++++ b/drivers/clk/sunxi/Makefile +@@ -11,6 +11,7 @@ obj-y += clk-a10-ve.o + obj-y += clk-a20-gmac.o + obj-y += clk-mod0.o + obj-y += clk-simple-gates.o ++obj-y += clk-multi-gates.o + obj-y += clk-sun8i-bus-gates.o + obj-y += clk-sun8i-mbus.o + obj-y += clk-sun9i-core.o +diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c +index 59428db..607ba53 100644 +--- a/drivers/clk/sunxi/clk-factors.c ++++ b/drivers/clk/sunxi/clk-factors.c +@@ -184,7 +184,8 @@ struct clk *sunxi_factors_register(struct device_node *node, + if (data->name) + clk_name = data->name; + else +- of_property_read_string(node, "clock-output-names", &clk_name); ++ of_property_read_string_index(node, "clock-output-names", ++ data->name_idx, &clk_name); + + factors = kzalloc(sizeof(struct clk_factors), GFP_KERNEL); + if (!factors) +diff --git a/drivers/clk/sunxi/clk-factors.h b/drivers/clk/sunxi/clk-factors.h +index 171085a..cc89d1f 100644 +--- a/drivers/clk/sunxi/clk-factors.h ++++ b/drivers/clk/sunxi/clk-factors.h +@@ -26,6 +26,7 @@ struct factors_data { + void (*getter)(struct factors_request *req); + void (*recalc)(struct factors_request *req); + const char *name; ++ int name_idx; + }; + + struct clk_factors { +diff --git a/drivers/clk/sunxi/clk-multi-gates.c b/drivers/clk/sunxi/clk-multi-gates.c +new file mode 100644 +index 0000000..76e715a +--- /dev/null ++++ b/drivers/clk/sunxi/clk-multi-gates.c +@@ -0,0 +1,105 @@ ++/* ++ * Copyright (C) 2016 ARM Ltd. ++ * ++ * Based on clk-sun8i-bus-gates.c, which is: ++ * Copyright (C) 2015 Jens Kuske ++ * Based on clk-simple-gates.c, which is: ++ * Copyright 2015 Maxime Ripard ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++static DEFINE_SPINLOCK(gates_lock); ++ ++static void __init sunxi_parse_parent(struct device_node *node, ++ struct clk_onecell_data *clk_data, ++ void __iomem *reg) ++{ ++ const char *parent = of_clk_get_parent_name(node, 0); ++ const char *clk_name; ++ struct property *prop; ++ struct clk *clk; ++ const __be32 *p; ++ int index, i = 0; ++ ++ of_property_for_each_u32(node, "clock-indices", prop, p, index) { ++ of_property_read_string_index(node, "clock-output-names", ++ i, &clk_name); ++ ++ clk = clk_register_gate(NULL, clk_name, parent, 0, ++ reg + 4 * (index / 32), index % 32, ++ 0, &gates_lock); ++ i++; ++ if (IS_ERR(clk)) { ++ pr_warn("could not register gate clock \"%s\"\n", ++ clk_name); ++ continue; ++ } ++ if (clk_data->clks[index]) ++ pr_warn("bus-gate clock %s: index #%d already registered as %s\n", ++ clk_name, index, "?"); ++ else ++ clk_data->clks[index] = clk; ++ } ++} ++ ++static void __init sunxi_multi_bus_gates_init(struct device_node *node) ++{ ++ struct clk_onecell_data *clk_data; ++ struct device_node *child; ++ struct property *prop; ++ struct resource res; ++ void __iomem *reg; ++ const __be32 *p; ++ int number = 0; ++ int index; ++ ++ reg = of_io_request_and_map(node, 0, of_node_full_name(node)); ++ if (IS_ERR(reg)) ++ return; ++ ++ clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL); ++ if (!clk_data) ++ goto err_unmap; ++ ++ for_each_child_of_node(node, child) ++ of_property_for_each_u32(child, "clock-indices", prop, p, index) ++ number = max(number, index); ++ ++ clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL); ++ if (!clk_data->clks) ++ goto err_free_data; ++ ++ for_each_child_of_node(node, child) ++ sunxi_parse_parent(child, clk_data, reg); ++ ++ clk_data->clk_num = number + 1; ++ if (of_clk_add_provider(node, of_clk_src_onecell_get, clk_data)) ++ pr_err("registering bus-gate clock %s failed\n", node->name); ++ ++ return; ++ ++err_free_data: ++ kfree(clk_data); ++err_unmap: ++ iounmap(reg); ++ of_address_to_resource(node, 0, &res); ++ release_mem_region(res.start, resource_size(&res)); ++} ++ ++CLK_OF_DECLARE(sunxi_multi_bus_gates, "allwinner,sunxi-multi-bus-gates-clk", ++ sunxi_multi_bus_gates_init); +diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c +index 5ba2188..ca59458 100644 +--- a/drivers/clk/sunxi/clk-sunxi.c ++++ b/drivers/clk/sunxi/clk-sunxi.c +@@ -711,14 +711,14 @@ static const struct factors_data sun4i_pll6_data __initconst = { + .enable = 31, + .table = &sun4i_pll5_config, + .getter = sun4i_get_pll5_factors, +- .name = "pll6", ++ .name_idx = 2, + }; + + static const struct factors_data sun6i_a31_pll6_data __initconst = { + .enable = 31, + .table = &sun6i_a31_pll6_config, + .getter = sun6i_a31_get_pll6_factors, +- .name = "pll6x2", ++ .name_idx = 1, + }; + + static const struct factors_data sun5i_a13_ahb_data __initconst = { +-- +2.5.0 + diff --git a/Initialize-msg-shm-IPC-objects-before-doing-ipc_addi.patch b/Initialize-msg-shm-IPC-objects-before-doing-ipc_addi.patch deleted file mode 100644 index 8a53a43ce..000000000 --- a/Initialize-msg-shm-IPC-objects-before-doing-ipc_addi.patch +++ /dev/null @@ -1,117 +0,0 @@ -From b9a532277938798b53178d5a66af6e2915cb27cf Mon Sep 17 00:00:00 2001 -From: Linus Torvalds -Date: Wed, 30 Sep 2015 12:48:40 -0400 -Subject: [PATCH] Initialize msg/shm IPC objects before doing ipc_addid() - -As reported by Dmitry Vyukov, we really shouldn't do ipc_addid() before -having initialized the IPC object state. Yes, we initialize the IPC -object in a locked state, but with all the lockless RCU lookup work, -that IPC object lock no longer means that the state cannot be seen. - -We already did this for the IPC semaphore code (see commit e8577d1f0329: -"ipc/sem.c: fully initialize sem_array before making it visible") but we -clearly forgot about msg and shm. - -Reported-by: Dmitry Vyukov -Cc: Manfred Spraul -Cc: Davidlohr Bueso -Cc: stable@vger.kernel.org -Signed-off-by: Linus Torvalds ---- - ipc/msg.c | 14 +++++++------- - ipc/shm.c | 13 +++++++------ - ipc/util.c | 8 ++++---- - 3 files changed, 18 insertions(+), 17 deletions(-) - -diff --git a/ipc/msg.c b/ipc/msg.c -index 66c4f567eb73..1471db9a7e61 100644 ---- a/ipc/msg.c -+++ b/ipc/msg.c -@@ -137,13 +137,6 @@ static int newque(struct ipc_namespace *ns, struct ipc_params *params) - return retval; - } - -- /* ipc_addid() locks msq upon success. */ -- id = ipc_addid(&msg_ids(ns), &msq->q_perm, ns->msg_ctlmni); -- if (id < 0) { -- ipc_rcu_putref(msq, msg_rcu_free); -- return id; -- } -- - msq->q_stime = msq->q_rtime = 0; - msq->q_ctime = get_seconds(); - msq->q_cbytes = msq->q_qnum = 0; -@@ -153,6 +146,13 @@ static int newque(struct ipc_namespace *ns, struct ipc_params *params) - INIT_LIST_HEAD(&msq->q_receivers); - INIT_LIST_HEAD(&msq->q_senders); - -+ /* ipc_addid() locks msq upon success. */ -+ id = ipc_addid(&msg_ids(ns), &msq->q_perm, ns->msg_ctlmni); -+ if (id < 0) { -+ ipc_rcu_putref(msq, msg_rcu_free); -+ return id; -+ } -+ - ipc_unlock_object(&msq->q_perm); - rcu_read_unlock(); - -diff --git a/ipc/shm.c b/ipc/shm.c -index 222131e8e38f..41787276e141 100644 ---- a/ipc/shm.c -+++ b/ipc/shm.c -@@ -551,12 +551,6 @@ static int newseg(struct ipc_namespace *ns, struct ipc_params *params) - if (IS_ERR(file)) - goto no_file; - -- id = ipc_addid(&shm_ids(ns), &shp->shm_perm, ns->shm_ctlmni); -- if (id < 0) { -- error = id; -- goto no_id; -- } -- - shp->shm_cprid = task_tgid_vnr(current); - shp->shm_lprid = 0; - shp->shm_atim = shp->shm_dtim = 0; -@@ -565,6 +559,13 @@ static int newseg(struct ipc_namespace *ns, struct ipc_params *params) - shp->shm_nattch = 0; - shp->shm_file = file; - shp->shm_creator = current; -+ -+ id = ipc_addid(&shm_ids(ns), &shp->shm_perm, ns->shm_ctlmni); -+ if (id < 0) { -+ error = id; -+ goto no_id; -+ } -+ - list_add(&shp->shm_clist, ¤t->sysvshm.shm_clist); - - /* -diff --git a/ipc/util.c b/ipc/util.c -index be4230020a1f..0f401d94b7c6 100644 ---- a/ipc/util.c -+++ b/ipc/util.c -@@ -237,6 +237,10 @@ int ipc_addid(struct ipc_ids *ids, struct kern_ipc_perm *new, int size) - rcu_read_lock(); - spin_lock(&new->lock); - -+ current_euid_egid(&euid, &egid); -+ new->cuid = new->uid = euid; -+ new->gid = new->cgid = egid; -+ - id = idr_alloc(&ids->ipcs_idr, new, - (next_id < 0) ? 0 : ipcid_to_idx(next_id), 0, - GFP_NOWAIT); -@@ -249,10 +253,6 @@ int ipc_addid(struct ipc_ids *ids, struct kern_ipc_perm *new, int size) - - ids->in_use++; - -- current_euid_egid(&euid, &egid); -- new->cuid = new->uid = euid; -- new->gid = new->cgid = egid; -- - if (next_id < 0) { - new->seq = ids->seq++; - if (ids->seq > IPCID_SEQ_MAX) --- -2.4.3 - diff --git a/Input-elantech-mark-protocols-v2-and-v3-as-semi-mt.patch b/Input-elantech-mark-protocols-v2-and-v3-as-semi-mt.patch deleted file mode 100644 index c02a0f53b..000000000 --- a/Input-elantech-mark-protocols-v2-and-v3-as-semi-mt.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 6544a1df11c48c8413071aac3316792e4678fbfb Mon Sep 17 00:00:00 2001 -From: Benjamin Tissoires -Date: Mon, 11 Jan 2016 17:35:38 -0800 -Subject: [PATCH] Input: elantech - mark protocols v2 and v3 as semi-mt - -When using a protocol v2 or v3 hardware, elantech uses the function -elantech_report_semi_mt_data() to report data. This devices are rather -creepy because if num_finger is 3, (x2,y2) is (0,0). Yes, only one valid -touch is reported. - -Anyway, userspace (libinput) is now confused by these (0,0) touches, -and detect them as palm, and rejects them. - -Commit 3c0213d17a09 ("Input: elantech - fix semi-mt protocol for v3 HW") -was sufficient enough for xf86-input-synaptics and libinput before it has -palm rejection. Now we need to actually tell libinput that this device is -a semi-mt one and it should not rely on the actual values of the 2 touches. - -Cc: stable@vger.kernel.org -Signed-off-by: Benjamin Tissoires -Signed-off-by: Dmitry Torokhov ---- - drivers/input/mouse/elantech.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/input/mouse/elantech.c b/drivers/input/mouse/elantech.c -index 537ebb0e193a..78f93cf68840 100644 ---- a/drivers/input/mouse/elantech.c -+++ b/drivers/input/mouse/elantech.c -@@ -1222,7 +1222,7 @@ static int elantech_set_input_params(struct psmouse *psmouse) - input_set_abs_params(dev, ABS_TOOL_WIDTH, ETP_WMIN_V2, - ETP_WMAX_V2, 0, 0); - } -- input_mt_init_slots(dev, 2, 0); -+ input_mt_init_slots(dev, 2, INPUT_MT_SEMI_MT); - input_set_abs_params(dev, ABS_MT_POSITION_X, x_min, x_max, 0, 0); - input_set_abs_params(dev, ABS_MT_POSITION_Y, y_min, y_max, 0, 0); - break; --- -2.5.0 - diff --git a/KEYS-Add-a-system-blacklist-keyring.patch b/KEYS-Add-a-system-blacklist-keyring.patch index be35564a6..469ac35ab 100644 --- a/KEYS-Add-a-system-blacklist-keyring.patch +++ b/KEYS-Add-a-system-blacklist-keyring.patch @@ -71,7 +71,7 @@ diff --git a/include/keys/system_keyring.h b/include/keys/system_keyring.h index b20cd885c1fd..51d8ddc60e0f 100644 --- a/include/keys/system_keyring.h +++ b/include/keys/system_keyring.h -@@ -35,4 +35,8 @@ extern int system_verify_data(const void *data, unsigned long len, +@@ -35,6 +35,10 @@ extern int system_verify_data(const void *data, unsigned long len, enum key_being_used_for usage); #endif @@ -79,7 +79,9 @@ index b20cd885c1fd..51d8ddc60e0f 100644 +extern struct key *system_blacklist_keyring; +#endif + - #endif /* _KEYS_SYSTEM_KEYRING_H */ + #ifdef CONFIG_IMA_MOK_KEYRING + extern struct key *ima_mok_keyring; + extern struct key *ima_blacklist_keyring; diff --git a/init/Kconfig b/init/Kconfig index 02da9f1fd9df..782d26f02885 100644 --- a/init/Kconfig diff --git a/KVM-MTRR-remove-MSR-0x2f8.patch b/KVM-MTRR-remove-MSR-0x2f8.patch new file mode 100644 index 000000000..8066b2e8f --- /dev/null +++ b/KVM-MTRR-remove-MSR-0x2f8.patch @@ -0,0 +1,49 @@ +From bb0f06280beb6507226627a85076ae349a23fe22 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= +Date: Mon, 16 May 2016 09:45:35 -0400 +Subject: [PATCH] KVM: MTRR: remove MSR 0x2f8 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +MSR 0x2f8 accessed the 124th Variable Range MTRR ever since MTRR support +was introduced by 9ba075a664df ("KVM: MTRR support"). + +0x2f8 became harmful when 910a6aae4e2e ("KVM: MTRR: exactly define the +size of variable MTRRs") shrinked the array of VR MTRRs from 256 to 8, +which made access to index 124 out of bounds. The surrounding code only +WARNs in this situation, thus the guest gained a limited read/write +access to struct kvm_arch_vcpu. + +0x2f8 is not a valid VR MTRR MSR, because KVM has/advertises only 16 VR +MTRR MSRs, 0x200-0x20f. Every VR MTRR is set up using two MSRs, 0x2f8 +was treated as a PHYSBASE and 0x2f9 would be its PHYSMASK, but 0x2f9 was +not implemented in KVM, therefore 0x2f8 could never do anything useful +and getting rid of it is safe. + +This fixes CVE-2016-TBD. + +Fixes: 910a6aae4e2e ("KVM: MTRR: exactly define the size of variable MTRRs") +Cc: stable@vger.kernel.org +Reported-by: David Matlack +Signed-off-by: Radim Krčmář +--- + arch/x86/kvm/mtrr.c | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/arch/x86/kvm/mtrr.c b/arch/x86/kvm/mtrr.c +index 3f8c732117ec..c146f3c262c3 100644 +--- a/arch/x86/kvm/mtrr.c ++++ b/arch/x86/kvm/mtrr.c +@@ -44,8 +44,6 @@ static bool msr_mtrr_valid(unsigned msr) + case MSR_MTRRdefType: + case MSR_IA32_CR_PAT: + return true; +- case 0x2f8: +- return true; + } + return false; + } +-- +2.5.5 + diff --git a/Makefile b/Makefile index 4f11a034b..535403510 100644 --- a/Makefile +++ b/Makefile @@ -19,7 +19,7 @@ noarch: fedpkg -v local --arch=noarch # 'make local' also needs to build the noarch firmware package -local: noarch +local: fedpkg -v local extremedebug: @@ -37,6 +37,7 @@ debug: @perl -pi -e 's/# CONFIG_PROVE_RCU is not set/CONFIG_PROVE_RCU=y/' config-nodebug @perl -pi -e 's/# CONFIG_DEBUG_SPINLOCK is not set/CONFIG_DEBUG_SPINLOCK=y/' config-nodebug @perl -pi -e 's/# CONFIG_DEBUG_VM is not set/CONFIG_DEBUG_VM=y/' config-nodebug + @perl -pi -e 's/# CONFIG_DEBUG_VM_PGFLAGS is not set/CONFIG_DEBUG_VM_PGFLAGS=y/' config-nodebug @perl -pi -e 's/# CONFIG_FAULT_INJECTION is not set/CONFIG_FAULT_INJECTION=y/' config-nodebug @perl -pi -e 's/# CONFIG_FAILSLAB is not set/CONFIG_FAILSLAB=y/' config-nodebug @perl -pi -e 's/# CONFIG_FAIL_PAGE_ALLOC is not set/CONFIG_FAIL_PAGE_ALLOC=y/' config-nodebug @@ -79,7 +80,6 @@ debug: @perl -pi -e 's/# CONFIG_CARL9170_DEBUGFS is not set/CONFIG_CARL9170_DEBUGFS=y/' config-nodebug @perl -pi -e 's/# CONFIG_IWLWIFI_DEVICE_TRACING is not set/CONFIG_IWLWIFI_DEVICE_TRACING=y/' config-nodebug @perl -pi -e 's/# CONFIG_DMADEVICES_DEBUG is not set/CONFIG_DMADEVICES_DEBUG=y/' config-nodebug - @perl -pi -e 's/# CONFIG_DMADEVICES_VDEBUG is not set/CONFIG_DMADEVICES_VDEBUG=y/' config-nodebug @perl -pi -e 's/# CONFIG_CEPH_LIB_PRETTYDEBUG is not set/CONFIG_CEPH_LIB_PRETTYDEBUG=y/' config-nodebug @perl -pi -e 's/# CONFIG_QUOTA_DEBUG is not set/CONFIG_QUOTA_DEBUG=y/' config-nodebug @perl -pi -e 's/# CONFIG_KGDB_KDB is not set/CONFIG_KGDB_KDB=y/' config-nodebug @@ -89,9 +89,9 @@ debug: @perl -pi -e 's/# CONFIG_TEST_LIST_SORT is not set/CONFIG_TEST_LIST_SORT=y/' config-nodebug @perl -pi -e 's/# CONFIG_DEBUG_ATOMIC_SLEEP is not set/CONFIG_DEBUG_ATOMIC_SLEEP=y/' config-nodebug @perl -pi -e 's/# CONFIG_DETECT_HUNG_TASK is not set/CONFIG_DETECT_HUNG_TASK=y/' config-nodebug + @perl -pi -e 's/# CONFIG_WQ_WATCHDOG is not set/CONFIG_WQ_WATCHDOG=y/' config-nodebug @perl -pi -e 's/# CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK is not set/CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y/' config-nodebug @perl -pi -e 's/# CONFIG_DEBUG_KMEMLEAK is not set/CONFIG_DEBUG_KMEMLEAK=y/' config-nodebug - @perl -pi -e 's/# CONFIG_X86_DEBUG_STATIC_CPU_HAS is not set/CONFIG_X86_DEBUG_STATIC_CPU_HAS=y/' config-nodebug @# just in case we're going from extremedebug -> debug @perl -pi -e 's/CONFIG_DEBUG_PAGEALLOC=y/# CONFIG_DEBUG_PAGEALLOC is not set/' config-nodebug diff --git a/Makefile.release b/Makefile.release index f7b704237..3e850d614 100644 --- a/Makefile.release +++ b/Makefile.release @@ -17,6 +17,7 @@ config-release: @perl -pi -e 's/CONFIG_PROVE_RCU=y/# CONFIG_PROVE_RCU is not set/' config-nodebug @perl -pi -e 's/CONFIG_DEBUG_SPINLOCK=y/# CONFIG_DEBUG_SPINLOCK is not set/' config-nodebug @perl -pi -e 's/CONFIG_DEBUG_VM=y/# CONFIG_DEBUG_VM is not set/' config-nodebug + @perl -pi -e 's/CONFIG_DEBUG_VM_PGFLAGS=y/# CONFIG_DEBUG_VM_PGFLAGS is not set/' config-nodebug @perl -pi -e 's/CONFIG_FAULT_INJECTION=y/# CONFIG_FAULT_INJECTION is not set/' config-nodebug @perl -pi -e 's/CONFIG_FAILSLAB=y/# CONFIG_FAILSLAB is not set/' config-nodebug @perl -pi -e 's/CONFIG_FAIL_PAGE_ALLOC=y/# CONFIG_FAIL_PAGE_ALLOC is not set/' config-nodebug @@ -58,7 +59,6 @@ config-release: @perl -pi -e 's/CONFIG_CARL9170_DEBUGFS=y/# CONFIG_CARL9170_DEBUGFS is not set/' config-nodebug @perl -pi -e 's/CONFIG_IWLWIFI_DEVICE_TRACING=y/# CONFIG_IWLWIFI_DEVICE_TRACING is not set/' config-nodebug @perl -pi -e 's/CONFIG_DMADEVICES_DEBUG=y/# CONFIG_DMADEVICES_DEBUG is not set/' config-nodebug - @perl -pi -e 's/CONFIG_DMADEVICES_VDEBUG=y/# CONFIG_DMADEVICES_VDEBUG is not set/' config-nodebug @perl -pi -e 's/CONFIG_CEPH_LIB_PRETTYDEBUG=y/# CONFIG_CEPH_LIB_PRETTYDEBUG is not set/' config-nodebug @perl -pi -e 's/CONFIG_QUOTA_DEBUG=y/# CONFIG_QUOTA_DEBUG is not set/' config-nodebug @perl -pi -e 's/CONFIG_CPU_NOTIFIER_ERROR_INJECT=m/# CONFIG_CPU_NOTIFIER_ERROR_INJECT is not set/' config-nodebug @@ -68,13 +68,13 @@ config-release: @perl -pi -e 's/CONFIG_TEST_STRING_HELPERS=m/# CONFIG_TEST_STRING_HELPERS is not set/' config-nodebug @perl -pi -e 's/CONFIG_DEBUG_ATOMIC_SLEEP=y/# CONFIG_DEBUG_ATOMIC_SLEEP is not set/' config-nodebug @perl -pi -e 's/CONFIG_DETECT_HUNG_TASK=y/# CONFIG_DETECT_HUNG_TASK is not set/' config-nodebug + @perl -pi -e 's/CONFIG_WQ_WATCHDOG=y/# CONFIG_WQ_WATCHDOG is not set/' config-nodebug @perl -pi -e 's/CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y/# CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK is not set/' config-nodebug @perl -pi -e 's/CONFIG_DEBUG_KMEMLEAK=y/# CONFIG_DEBUG_KMEMLEAK is not set/' config-nodebug @perl -pi -e 's/CONFIG_MAC80211_MESSAGE_TRACING=y/# CONFIG_MAC80211_MESSAGE_TRACING is not set/' config-nodebug @perl -pi -e 's/CONFIG_XFS_WARN=y/# CONFIG_XFS_WARN is not set/' config-nodebug @perl -pi -e 's/CONFIG_EDAC_DEBUG=y/# CONFIG_EDAC_DEBUG is not set/' config-nodebug @perl -pi -e 's/CONFIG_RTLWIFI_DEBUG=y/# CONFIG_RTLWIFI_DEBUG is not set/' config-nodebug - @perl -pi -e 's/CONFIG_X86_DEBUG_STATIC_CPU_HAS=y/# CONFIG_X86_DEBUG_STATIC_CPU_HAS is not set/' config-nodebug @# Undo anything that make extremedebug might have set @perl -pi -e 's/CONFIG_DEBUG_PAGEALLOC=y/# CONFIG_DEBUG_PAGEALLOC is not set/' config-debug @@ -82,7 +82,3 @@ config-release: @# Change defaults back to sane things. @perl -pi -e 's/CONFIG_MAXSMP=y/# CONFIG_MAXSMP is not set/' config-x86-generic - - @perl -pi -e 's/CONFIG_SCHEDSTATS=y/# CONFIG_SCHEDSTATS is not set/' config-nodebug - @perl -pi -e 's/CONFIG_LATENCYTOP=y/# CONFIG_LATENCYTOP is not set/' config-nodebug - diff --git a/PNP-Add-Broadwell-to-Intel-MCH-size-workaround.patch b/PNP-Add-Broadwell-to-Intel-MCH-size-workaround.patch deleted file mode 100644 index 3a877105d..000000000 --- a/PNP-Add-Broadwell-to-Intel-MCH-size-workaround.patch +++ /dev/null @@ -1,101 +0,0 @@ -From 61feb31b0dfecfd7949e672a54ac7256f4dd2c3d Mon Sep 17 00:00:00 2001 -From: Christophe Le Roy -Date: Fri, 11 Dec 2015 09:13:42 +0100 -Subject: [PATCH] PNP: Add Broadwell to Intel MCH size workaround - -Add device ID 0x1604 for Broadwell to commit cb171f7abb9a ("PNP: -Work around BIOS defects in Intel MCH area reporting"). - ->From a Lenovo ThinkPad T550: - - system 00:01: [io 0x1800-0x189f] could not be reserved - system 00:01: [io 0x0800-0x087f] has been reserved - system 00:01: [io 0x0880-0x08ff] has been reserved - system 00:01: [io 0x0900-0x097f] has been reserved - system 00:01: [io 0x0980-0x09ff] has been reserved - system 00:01: [io 0x0a00-0x0a7f] has been reserved - system 00:01: [io 0x0a80-0x0aff] has been reserved - system 00:01: [io 0x0b00-0x0b7f] has been reserved - system 00:01: [io 0x0b80-0x0bff] has been reserved - system 00:01: [io 0x15e0-0x15ef] has been reserved - system 00:01: [io 0x1600-0x167f] has been reserved - system 00:01: [io 0x1640-0x165f] has been reserved - system 00:01: [mem 0xf8000000-0xfbffffff] could not be reserved - system 00:01: [mem 0xfed1c000-0xfed1ffff] has been reserved - system 00:01: [mem 0xfed10000-0xfed13fff] has been reserved - system 00:01: [mem 0xfed18000-0xfed18fff] has been reserved - system 00:01: [mem 0xfed19000-0xfed19fff] has been reserved - system 00:01: [mem 0xfed45000-0xfed4bfff] has been reserved - system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active) - [...] - resource sanity check: requesting [mem 0xfed10000-0xfed15fff], which spans more than pnp 00:01 [mem 0xfed10000-0xfed13fff] - ------------[ cut here ]------------ - WARNING: CPU: 2 PID: 1 at /build/linux-CrHvZ_/linux-4.2.6/arch/x86/mm/ioremap.c:198 __ioremap_caller+0x2ee/0x360() - Info: mapping multiple BARs. Your kernel is fine. - Modules linked in: - CPU: 2 PID: 1 Comm: swapper/0 Not tainted 4.2.0-1-amd64 #1 Debian 4.2.6-1 - Hardware name: LENOVO 20CKCTO1WW/20CKCTO1WW, BIOS N11ET34W (1.10 ) 08/20/2015 - 0000000000000000 ffffffff817e6868 ffffffff8154e2f6 ffff8802241efbf8 - ffffffff8106e5b1 ffffc90000e98000 0000000000006000 ffffc90000e98000 - 0000000000006000 0000000000000000 ffffffff8106e62a ffffffff817e68c8 - Call Trace: - [] ? dump_stack+0x40/0x50 - [] ? warn_slowpath_common+0x81/0xb0 - [] ? warn_slowpath_fmt+0x4a/0x50 - [] ? iomem_map_sanity_check+0xb3/0xc0 - [] ? __ioremap_caller+0x2ee/0x360 - [] ? snb_uncore_imc_init_box+0x66/0x90 - [] ? uncore_pci_probe+0xc8/0x1a0 - [] ? local_pci_probe+0x3f/0xa0 - [] ? pci_device_probe+0xc4/0x110 - [] ? driver_probe_device+0x1ee/0x450 - [] ? __driver_attach+0x7b/0x80 - [] ? driver_probe_device+0x450/0x450 - [] ? bus_for_each_dev+0x5a/0x90 - [] ? bus_add_driver+0x1f1/0x290 - [] ? uncore_cpu_setup+0xc/0xc - [] ? driver_register+0x5f/0xe0 - [] ? intel_uncore_init+0xcc/0x2b0 - [] ? uncore_cpu_setup+0xc/0xc - [] ? do_one_initcall+0xce/0x200 - [] ? parse_args+0x140/0x4e0 - [] ? kernel_init_freeable+0x162/0x1e8 - [] ? rest_init+0x80/0x80 - [] ? kernel_init+0xe/0xf0 - [] ? ret_from_fork+0x3f/0x70 - [] ? rest_init+0x80/0x80 - ---[ end trace 472e7959536abf12 ]--- - - 00:00.0 Host bridge: Intel Corporation Broadwell-U Host Bridge -OPI (rev 09) - Subsystem: Lenovo Device 2223 - Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- - Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- SERR- - Kernel driver in use: bdw_uncore - 00: 86 80 04 16 06 00 90 20 09 00 00 06 00 00 00 00 - 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 - 20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 23 22 - 30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 - -Signed-off-by: Christophe Le Roy -Signed-off-by: Rafael J. Wysocki ---- - drivers/pnp/quirks.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/pnp/quirks.c b/drivers/pnp/quirks.c -index 943c1cb9566c..f700723ca5d6 100644 ---- a/drivers/pnp/quirks.c -+++ b/drivers/pnp/quirks.c -@@ -343,6 +343,7 @@ static void quirk_amd_mmconfig_area(struct pnp_dev *dev) - static const unsigned int mch_quirk_devices[] = { - 0x0154, /* Ivy Bridge */ - 0x0c00, /* Haswell */ -+ 0x1604, /* Broadwell */ - }; - - static struct pci_dev *get_intel_host(void) --- -2.5.0 - diff --git a/PNP-Add-Haswell-ULT-to-Intel-MCH-size-workaround.patch b/PNP-Add-Haswell-ULT-to-Intel-MCH-size-workaround.patch deleted file mode 100644 index c2082a3b4..000000000 --- a/PNP-Add-Haswell-ULT-to-Intel-MCH-size-workaround.patch +++ /dev/null @@ -1,119 +0,0 @@ -From afa5b65015ff2a7f0b4ec8cab6f58fa47025259a Mon Sep 17 00:00:00 2001 -From: Josh Boyer -Date: Fri, 22 Jan 2016 08:11:46 -0500 -Subject: [PATCH] PNP: Add Haswell-ULT to Intel MCH size workaround - -Add device ID 0x0a04 for Haswell-ULT to the list of devices with MCH -problems. - -From a Lenovo ThinkPad T440S: -[ 0.188604] pnp: PnP ACPI init -[ 0.189044] system 00:00: [mem 0x00000000-0x0009ffff] could not be reserved -[ 0.189048] system 00:00: [mem 0x000c0000-0x000c3fff] could not be reserved -[ 0.189050] system 00:00: [mem 0x000c4000-0x000c7fff] could not be reserved -[ 0.189052] system 00:00: [mem 0x000c8000-0x000cbfff] could not be reserved -[ 0.189054] system 00:00: [mem 0x000cc000-0x000cffff] could not be reserved -[ 0.189056] system 00:00: [mem 0x000d0000-0x000d3fff] has been reserved -[ 0.189058] system 00:00: [mem 0x000d4000-0x000d7fff] has been reserved -[ 0.189060] system 00:00: [mem 0x000d8000-0x000dbfff] has been reserved -[ 0.189061] system 00:00: [mem 0x000dc000-0x000dffff] has been reserved -[ 0.189063] system 00:00: [mem 0x000e0000-0x000e3fff] could not be reserved -[ 0.189065] system 00:00: [mem 0x000e4000-0x000e7fff] could not be reserved -[ 0.189067] system 00:00: [mem 0x000e8000-0x000ebfff] could not be reserved -[ 0.189069] system 00:00: [mem 0x000ec000-0x000effff] could not be reserved -[ 0.189071] system 00:00: [mem 0x000f0000-0x000fffff] could not be reserved -[ 0.189073] system 00:00: [mem 0x00100000-0xdf9fffff] could not be reserved -[ 0.189075] system 00:00: [mem 0xfec00000-0xfed3ffff] could not be reserved -[ 0.189078] system 00:00: [mem 0xfed4c000-0xffffffff] could not be reserved -[ 0.189082] system 00:00: Plug and Play ACPI device, IDs PNP0c01 (active) -[ 0.189216] system 00:01: [io 0x1800-0x189f] could not be reserved -[ 0.189220] system 00:01: [io 0x0800-0x087f] has been reserved -[ 0.189222] system 00:01: [io 0x0880-0x08ff] has been reserved -[ 0.189224] system 00:01: [io 0x0900-0x097f] has been reserved -[ 0.189226] system 00:01: [io 0x0980-0x09ff] has been reserved -[ 0.189229] system 00:01: [io 0x0a00-0x0a7f] has been reserved -[ 0.189231] system 00:01: [io 0x0a80-0x0aff] has been reserved -[ 0.189233] system 00:01: [io 0x0b00-0x0b7f] has been reserved -[ 0.189235] system 00:01: [io 0x0b80-0x0bff] has been reserved -[ 0.189238] system 00:01: [io 0x15e0-0x15ef] has been reserved -[ 0.189240] system 00:01: [io 0x1600-0x167f] has been reserved -[ 0.189242] system 00:01: [io 0x1640-0x165f] has been reserved -[ 0.189246] system 00:01: [mem 0xf8000000-0xfbffffff] could not be reserved -[ 0.189249] system 00:01: [mem 0x00000000-0x00000fff] could not be reserved -[ 0.189251] system 00:01: [mem 0xfed1c000-0xfed1ffff] has been reserved -[ 0.189254] system 00:01: [mem 0xfed10000-0xfed13fff] has been reserved -[ 0.189256] system 00:01: [mem 0xfed18000-0xfed18fff] has been reserved -[ 0.189258] system 00:01: [mem 0xfed19000-0xfed19fff] has been reserved -[ 0.189261] system 00:01: [mem 0xfed45000-0xfed4bfff] has been reserved -[ 0.189264] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active) -[....] -[ 0.583653] resource sanity check: requesting [mem 0xfed10000-0xfed15fff], which spans more than pnp 00:01 [mem 0xfed10000-0xfed13fff] -[ 0.583654] ------------[ cut here ]------------ -[ 0.583660] WARNING: CPU: 0 PID: 1 at arch/x86/mm/ioremap.c:198 __ioremap_caller+0x2c5/0x380() -[ 0.583661] Info: mapping multiple BARs. Your kernel is fine. -[ 0.583662] Modules linked in: - -[ 0.583666] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.3.3-303.fc23.x86_64 #1 -[ 0.583668] Hardware name: LENOVO 20AR001GXS/20AR001GXS, BIOS GJET86WW (2.36 ) 12/04/2015 -[ 0.583670] 0000000000000000 0000000014cf7e59 ffff880214a1baf8 ffffffff813a625f -[ 0.583673] ffff880214a1bb40 ffff880214a1bb30 ffffffff810a07c2 00000000fed10000 -[ 0.583675] ffffc90000cb8000 0000000000006000 0000000000000000 ffff8800d6381040 -[ 0.583678] Call Trace: -[ 0.583683] [] dump_stack+0x44/0x55 -[ 0.583686] [] warn_slowpath_common+0x82/0xc0 -[ 0.583688] [] warn_slowpath_fmt+0x5c/0x80 -[ 0.583692] [] ? iomem_map_sanity_check+0xba/0xd0 -[ 0.583695] [] __ioremap_caller+0x2c5/0x380 -[ 0.583698] [] ioremap_nocache+0x17/0x20 -[ 0.583701] [] snb_uncore_imc_init_box+0x79/0xb0 -[ 0.583705] [] uncore_pci_probe+0xd0/0x1b0 -[ 0.583707] [] local_pci_probe+0x45/0xa0 -[ 0.583710] [] pci_device_probe+0xfd/0x140 -[ 0.583713] [] driver_probe_device+0x222/0x480 -[ 0.583715] [] __driver_attach+0x84/0x90 -[ 0.583717] [] ? driver_probe_device+0x480/0x480 -[ 0.583720] [] bus_for_each_dev+0x6c/0xc0 -[ 0.583722] [] driver_attach+0x1e/0x20 -[ 0.583724] [] bus_add_driver+0x1eb/0x280 -[ 0.583727] [] ? uncore_cpu_setup+0x12/0x12 -[ 0.583729] [] driver_register+0x60/0xe0 -[ 0.583733] [] __pci_register_driver+0x4c/0x50 -[ 0.583736] [] intel_uncore_init+0xe2/0x2e6 -[ 0.583738] [] ? uncore_cpu_setup+0x12/0x12 -[ 0.583741] [] do_one_initcall+0xb3/0x200 -[ 0.583745] [] ? parse_args+0x1a0/0x4a0 -[ 0.583749] [] kernel_init_freeable+0x189/0x223 -[ 0.583752] [] ? rest_init+0x80/0x80 -[ 0.583754] [] kernel_init+0xe/0xe0 -[ 0.583758] [] ret_from_fork+0x3f/0x70 -[ 0.583760] [] ? rest_init+0x80/0x80 -[ 0.583765] ---[ end trace 077c426a39e018aa ]--- - -00:00.0 Host bridge [0600]: Intel Corporation Haswell-ULT DRAM Controller [8086:0a04] (rev 0b) - Subsystem: Lenovo Device [17aa:220c] - Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- - Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- SERR- - Kernel driver in use: hsw_uncore - -Signed-off-by: Josh Boyer ---- - drivers/pnp/quirks.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/pnp/quirks.c b/drivers/pnp/quirks.c -index f700723ca5d6..d28e3ab9479c 100644 ---- a/drivers/pnp/quirks.c -+++ b/drivers/pnp/quirks.c -@@ -342,6 +342,7 @@ static void quirk_amd_mmconfig_area(struct pnp_dev *dev) - /* Device IDs of parts that have 32KB MCH space */ - static const unsigned int mch_quirk_devices[] = { - 0x0154, /* Ivy Bridge */ -+ 0x0a04, /* Haswell-ULT */ - 0x0c00, /* Haswell */ - 0x1604, /* Broadwell */ - }; --- -2.5.0 - diff --git a/RDS-verify-the-underlying-transport-exists-before-cr.patch b/RDS-verify-the-underlying-transport-exists-before-cr.patch deleted file mode 100644 index eb39c1f1d..000000000 --- a/RDS-verify-the-underlying-transport-exists-before-cr.patch +++ /dev/null @@ -1,79 +0,0 @@ -From 74e98eb085889b0d2d4908f59f6e00026063014f Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Tue, 8 Sep 2015 10:53:40 -0400 -Subject: [PATCH] RDS: verify the underlying transport exists before creating a - connection - -There was no verification that an underlying transport exists when creating -a connection, this would cause dereferencing a NULL ptr. - -It might happen on sockets that weren't properly bound before attempting to -send a message, which will cause a NULL ptr deref: - -[135546.047719] kasan: GPF could be caused by NULL-ptr deref or user memory accessgeneral protection fault: 0000 [#1] PREEMPT SMP DEBUG_PAGEALLOC KASAN -[135546.051270] Modules linked in: -[135546.051781] CPU: 4 PID: 15650 Comm: trinity-c4 Not tainted 4.2.0-next-20150902-sasha-00041-gbaa1222-dirty #2527 -[135546.053217] task: ffff8800835bc000 ti: ffff8800bc708000 task.ti: ffff8800bc708000 -[135546.054291] RIP: __rds_conn_create (net/rds/connection.c:194) -[135546.055666] RSP: 0018:ffff8800bc70fab0 EFLAGS: 00010202 -[135546.056457] RAX: dffffc0000000000 RBX: 0000000000000f2c RCX: ffff8800835bc000 -[135546.057494] RDX: 0000000000000007 RSI: ffff8800835bccd8 RDI: 0000000000000038 -[135546.058530] RBP: ffff8800bc70fb18 R08: 0000000000000001 R09: 0000000000000000 -[135546.059556] R10: ffffed014d7a3a23 R11: ffffed014d7a3a21 R12: 0000000000000000 -[135546.060614] R13: 0000000000000001 R14: ffff8801ec3d0000 R15: 0000000000000000 -[135546.061668] FS: 00007faad4ffb700(0000) GS:ffff880252000000(0000) knlGS:0000000000000000 -[135546.062836] CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b -[135546.063682] CR2: 000000000000846a CR3: 000000009d137000 CR4: 00000000000006a0 -[135546.064723] Stack: -[135546.065048] ffffffffafe2055c ffffffffafe23fc1 ffffed00493097bf ffff8801ec3d0008 -[135546.066247] 0000000000000000 00000000000000d0 0000000000000000 ac194a24c0586342 -[135546.067438] 1ffff100178e1f78 ffff880320581b00 ffff8800bc70fdd0 ffff880320581b00 -[135546.068629] Call Trace: -[135546.069028] ? __rds_conn_create (include/linux/rcupdate.h:856 net/rds/connection.c:134) -[135546.069989] ? rds_message_copy_from_user (net/rds/message.c:298) -[135546.071021] rds_conn_create_outgoing (net/rds/connection.c:278) -[135546.071981] rds_sendmsg (net/rds/send.c:1058) -[135546.072858] ? perf_trace_lock (include/trace/events/lock.h:38) -[135546.073744] ? lockdep_init (kernel/locking/lockdep.c:3298) -[135546.074577] ? rds_send_drop_to (net/rds/send.c:976) -[135546.075508] ? __might_fault (./arch/x86/include/asm/current.h:14 mm/memory.c:3795) -[135546.076349] ? __might_fault (mm/memory.c:3795) -[135546.077179] ? rds_send_drop_to (net/rds/send.c:976) -[135546.078114] sock_sendmsg (net/socket.c:611 net/socket.c:620) -[135546.078856] SYSC_sendto (net/socket.c:1657) -[135546.079596] ? SYSC_connect (net/socket.c:1628) -[135546.080510] ? trace_dump_stack (kernel/trace/trace.c:1926) -[135546.081397] ? ring_buffer_unlock_commit (kernel/trace/ring_buffer.c:2479 kernel/trace/ring_buffer.c:2558 kernel/trace/ring_buffer.c:2674) -[135546.082390] ? trace_buffer_unlock_commit (kernel/trace/trace.c:1749) -[135546.083410] ? trace_event_raw_event_sys_enter (include/trace/events/syscalls.h:16) -[135546.084481] ? do_audit_syscall_entry (include/trace/events/syscalls.h:16) -[135546.085438] ? trace_buffer_unlock_commit (kernel/trace/trace.c:1749) -[135546.085515] rds_ib_laddr_check(): addr 36.74.25.172 ret -99 node type -1 - -Acked-by: Santosh Shilimkar -Signed-off-by: Sasha Levin -Signed-off-by: David S. Miller ---- - net/rds/connection.c | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/net/rds/connection.c b/net/rds/connection.c -index 9b2de5e67d79..49adeef8090c 100644 ---- a/net/rds/connection.c -+++ b/net/rds/connection.c -@@ -190,6 +190,12 @@ new_conn: - } - } - -+ if (trans == NULL) { -+ kmem_cache_free(rds_conn_slab, conn); -+ conn = ERR_PTR(-ENODEV); -+ goto out; -+ } -+ - conn->c_trans = trans; - - ret = trans->conn_alloc(conn, gfp); --- -2.4.3 - diff --git a/USB-usbfs-fix-potential-infoleak-in-devio.patch b/USB-usbfs-fix-potential-infoleak-in-devio.patch new file mode 100644 index 000000000..48360c930 --- /dev/null +++ b/USB-usbfs-fix-potential-infoleak-in-devio.patch @@ -0,0 +1,41 @@ +From 7adc5cbc25dcc47dc3856108d9823d08da75da9d Mon Sep 17 00:00:00 2001 +From: Kangjie Lu +Date: Tue, 3 May 2016 16:32:16 -0400 +Subject: [PATCH] USB: usbfs: fix potential infoleak in devio +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The stack object “ci” has a total size of 8 bytes. Its last 3 bytes +are padding bytes which are not initialized and leaked to userland +via “copy_to_user”. + +Signed-off-by: Kangjie Lu +Signed-off-by: Greg Kroah-Hartman +--- + drivers/usb/core/devio.c | 9 +++++---- + 1 file changed, 5 insertions(+), 4 deletions(-) + +diff --git a/drivers/usb/core/devio.c b/drivers/usb/core/devio.c +index 52c4461dfccd..9b7f1f75e887 100644 +--- a/drivers/usb/core/devio.c ++++ b/drivers/usb/core/devio.c +@@ -1316,10 +1316,11 @@ static int proc_getdriver(struct usb_dev_state *ps, void __user *arg) + + static int proc_connectinfo(struct usb_dev_state *ps, void __user *arg) + { +- struct usbdevfs_connectinfo ci = { +- .devnum = ps->dev->devnum, +- .slow = ps->dev->speed == USB_SPEED_LOW +- }; ++ struct usbdevfs_connectinfo ci; ++ ++ memset(&ci, 0, sizeof(ci)); ++ ci.devnum = ps->dev->devnum; ++ ci.slow = ps->dev->speed == USB_SPEED_LOW; + + if (copy_to_user(arg, &ci, sizeof(ci))) + return -EFAULT; +-- +2.5.5 + diff --git a/USB-whiteheat-fix-potential-null-deref-at-probe.patch b/USB-whiteheat-fix-potential-null-deref-at-probe.patch deleted file mode 100644 index 00fd5578c..000000000 --- a/USB-whiteheat-fix-potential-null-deref-at-probe.patch +++ /dev/null @@ -1,81 +0,0 @@ -From 10d98bced414c6fc1d09db123e7f762d91b5ebea Mon Sep 17 00:00:00 2001 -From: Johan Hovold -Date: Wed, 23 Sep 2015 11:41:42 -0700 -Subject: [PATCH] USB: whiteheat: fix potential null-deref at probe - -Fix potential null-pointer dereference at probe by making sure that the -required endpoints are present. - -The whiteheat driver assumes there are at least five pairs of bulk -endpoints, of which the final pair is used for the "command port". An -attempt to bind to an interface with fewer bulk endpoints would -currently lead to an oops. - -Fixes CVE-2015-5257. - -Reported-by: Moein Ghasemzadeh -Cc: stable -Signed-off-by: Johan Hovold ---- - drivers/usb/serial/whiteheat.c | 31 +++++++++++++++++++++++++++++++ - 1 file changed, 31 insertions(+) - -diff --git a/drivers/usb/serial/whiteheat.c b/drivers/usb/serial/whiteheat.c -index 6c3734d2b45a..d3ea90bef84d 100644 ---- a/drivers/usb/serial/whiteheat.c -+++ b/drivers/usb/serial/whiteheat.c -@@ -80,6 +80,8 @@ static int whiteheat_firmware_download(struct usb_serial *serial, - static int whiteheat_firmware_attach(struct usb_serial *serial); - - /* function prototypes for the Connect Tech WhiteHEAT serial converter */ -+static int whiteheat_probe(struct usb_serial *serial, -+ const struct usb_device_id *id); - static int whiteheat_attach(struct usb_serial *serial); - static void whiteheat_release(struct usb_serial *serial); - static int whiteheat_port_probe(struct usb_serial_port *port); -@@ -116,6 +118,7 @@ static struct usb_serial_driver whiteheat_device = { - .description = "Connect Tech - WhiteHEAT", - .id_table = id_table_std, - .num_ports = 4, -+ .probe = whiteheat_probe, - .attach = whiteheat_attach, - .release = whiteheat_release, - .port_probe = whiteheat_port_probe, -@@ -217,6 +220,34 @@ static int whiteheat_firmware_attach(struct usb_serial *serial) - /***************************************************************************** - * Connect Tech's White Heat serial driver functions - *****************************************************************************/ -+ -+static int whiteheat_probe(struct usb_serial *serial, -+ const struct usb_device_id *id) -+{ -+ struct usb_host_interface *iface_desc; -+ struct usb_endpoint_descriptor *endpoint; -+ size_t num_bulk_in = 0; -+ size_t num_bulk_out = 0; -+ size_t min_num_bulk; -+ unsigned int i; -+ -+ iface_desc = serial->interface->cur_altsetting; -+ -+ for (i = 0; i < iface_desc->desc.bNumEndpoints; i++) { -+ endpoint = &iface_desc->endpoint[i].desc; -+ if (usb_endpoint_is_bulk_in(endpoint)) -+ ++num_bulk_in; -+ if (usb_endpoint_is_bulk_out(endpoint)) -+ ++num_bulk_out; -+ } -+ -+ min_num_bulk = COMMAND_PORT + 1; -+ if (num_bulk_in < min_num_bulk || num_bulk_out < min_num_bulk) -+ return -ENODEV; -+ -+ return 0; -+} -+ - static int whiteheat_attach(struct usb_serial *serial) - { - struct usb_serial_port *command_port; --- -2.4.3 - diff --git a/acpi-video-Add-force-native-backlight-quirk-for-Leno.patch b/acpi-video-Add-force-native-backlight-quirk-for-Leno.patch deleted file mode 100644 index 706fc540d..000000000 --- a/acpi-video-Add-force-native-backlight-quirk-for-Leno.patch +++ /dev/null @@ -1,81 +0,0 @@ -From: Hans de Goede -Date: Tue, 3 Mar 2015 08:31:24 +0100 -Subject: [PATCH] acpi: video: Add force native backlight quirk for Lenovo - Ideapad Z570 - -The Lenovo Ideapad Z570 (which is an Acer in disguise like some other Ideapads) -has a broken acpi_video interface, this was fixed in commmit a11d342fb8 -("ACPI / video: force vendor backlight on Lenovo Ideapad Z570"). - -Which stops acpi_video from registering a backlight interface, but this is -only a partial fix, because for people who have the ideapad-laptop module -installed that module will now register a backlight interface, which also -does not work, so we need to use the native intel_backlight interface. - -The Lenovo Ideapad 570 is a pre-win8 laptop / too old for the acpi-video code -to automatically prefer the native backlight interface, so add a quirk for it. - -This commit also removes the previous incomplete fix. - -BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1187004 -Cc: Stepan Bujnak -Signed-off-by: Hans de Goede ---- - drivers/acpi/video.c | 17 +++++++++++++++++ - drivers/acpi/video_detect.c | 8 -------- - 2 files changed, 17 insertions(+), 8 deletions(-) - -diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c -index 70ea37bea84f..d9bf8ba7d848 100644 ---- a/drivers/acpi/video.c -+++ b/drivers/acpi/video.c -@@ -425,6 +425,12 @@ static int __init video_disable_native_backlight(const struct dmi_system_id *d) - return 0; - } - -+static int __init video_enable_native_backlight(const struct dmi_system_id *d) -+{ -+ use_native_backlight_dmi = NATIVE_BACKLIGHT_ON; -+ return 0; -+} -+ - static struct dmi_system_id video_dmi_table[] __initdata = { - /* - * Broken _BQC workaround http://bugzilla.kernel.org/show_bug.cgi?id=13121 -@@ -566,6 +572,17 @@ static struct dmi_system_id video_dmi_table[] __initdata = { - DMI_MATCH(DMI_PRODUCT_NAME, "XPS L521X"), - }, - }, -+ -+ /* Non win8 machines which need native backlight nevertheless */ -+ { -+ /* https://bugzilla.redhat.com/show_bug.cgi?id=1187004 */ -+ .callback = video_enable_native_backlight, -+ .ident = "Lenovo Ideapad Z570", -+ .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), -+ DMI_MATCH(DMI_PRODUCT_NAME, "102434U"), -+ }, -+ }, - {} - }; - -diff --git a/drivers/acpi/video_detect.c b/drivers/acpi/video_detect.c -index 27c43499977a..c42feb2bacd0 100644 ---- a/drivers/acpi/video_detect.c -+++ b/drivers/acpi/video_detect.c -@@ -174,14 +174,6 @@ static struct dmi_system_id video_detect_dmi_table[] = { - DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 5737"), - }, - }, -- { -- .callback = video_detect_force_vendor, -- .ident = "Lenovo IdeaPad Z570", -- .matches = { -- DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), -- DMI_MATCH(DMI_PRODUCT_VERSION, "Ideapad Z570"), -- }, -- }, - { }, - }; - diff --git a/acpi-video-Allow-forcing-native-backlight-on-non-win.patch b/acpi-video-Allow-forcing-native-backlight-on-non-win.patch deleted file mode 100644 index 2e6627be3..000000000 --- a/acpi-video-Allow-forcing-native-backlight-on-non-win.patch +++ /dev/null @@ -1,73 +0,0 @@ -From: Aaron Lu -Date: Wed, 11 Mar 2015 14:14:56 +0800 -Subject: [PATCH] acpi: video: Allow forcing native backlight on non win8 - machines - -The native backlight behavior (so not registering both the acpi-video -and the vendor backlight driver) can be useful on some non win8 machines -too, so change the behavior of the video.use_native_backlight=1 or 0 -kernel cmdline option to be: if user has set video.use_native_backlight=1 -or 0, use that no matter if it is a win8 system or not. Also, we will -put some known systems into the DMI table to make them either use native -backlight interface or not, and the use_native_backlight_dmi is used to -reflect that. - -Original-by: Hans de Goede -Signed-off-by: Aaron Lu -Acked-by: Hans de Goede -Signed-off-by: Hans de Goede ---- - drivers/acpi/video.c | 19 +++++++++++++------ - 1 file changed, 13 insertions(+), 6 deletions(-) - -diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c -index db70d550f526..70ea37bea84f 100644 ---- a/drivers/acpi/video.c -+++ b/drivers/acpi/video.c -@@ -82,9 +82,15 @@ module_param(allow_duplicates, bool, 0644); - * For Windows 8 systems: used to decide if video module - * should skip registering backlight interface of its own. - */ --static int use_native_backlight_param = -1; -+enum { -+ NATIVE_BACKLIGHT_NOT_SET = -1, -+ NATIVE_BACKLIGHT_OFF, -+ NATIVE_BACKLIGHT_ON, -+}; -+ -+static int use_native_backlight_param = NATIVE_BACKLIGHT_NOT_SET; - module_param_named(use_native_backlight, use_native_backlight_param, int, 0444); --static bool use_native_backlight_dmi = true; -+static int use_native_backlight_dmi = NATIVE_BACKLIGHT_NOT_SET; - - static int register_count; - static struct mutex video_list_lock; -@@ -237,15 +243,16 @@ static void acpi_video_switch_brightness(struct work_struct *work); - - static bool acpi_video_use_native_backlight(void) - { -- if (use_native_backlight_param != -1) -+ if (use_native_backlight_param != NATIVE_BACKLIGHT_NOT_SET) - return use_native_backlight_param; -- else -+ else if (use_native_backlight_dmi != NATIVE_BACKLIGHT_NOT_SET) - return use_native_backlight_dmi; -+ return acpi_osi_is_win8(); - } - - bool acpi_video_verify_backlight_support(void) - { -- if (acpi_osi_is_win8() && acpi_video_use_native_backlight() && -+ if (acpi_video_use_native_backlight() && - backlight_device_registered(BACKLIGHT_RAW)) - return false; - return acpi_video_backlight_support(); -@@ -414,7 +421,7 @@ static int __init video_set_bqc_offset(const struct dmi_system_id *d) - - static int __init video_disable_native_backlight(const struct dmi_system_id *d) - { -- use_native_backlight_dmi = false; -+ use_native_backlight_dmi = NATIVE_BACKLIGHT_OFF; - return 0; - } - diff --git a/alua_fix.patch b/alua_fix.patch deleted file mode 100644 index eb278fabb..000000000 --- a/alua_fix.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 221255aee67ec1c752001080aafec0c4e9390d95 Mon Sep 17 00:00:00 2001 -From: Hannes Reinecke -Date: Tue, 1 Dec 2015 10:16:42 +0100 -Subject: scsi: ignore errors from scsi_dh_add_device() - -device handler initialisation might fail due to a number of -reasons. But as device_handlers are optional this shouldn't -cause us to disable the device entirely. -So just ignore errors from scsi_dh_add_device(). - -Reviewed-by: Johannes Thumshirn -Reviewed-by: Christoph Hellwig -Signed-off-by: Hannes Reinecke -Signed-off-by: Martin K. Petersen ---- - drivers/scsi/scsi_sysfs.c | 7 ++++--- - 1 file changed, 4 insertions(+), 3 deletions(-) - -diff --git a/drivers/scsi/scsi_sysfs.c b/drivers/scsi/scsi_sysfs.c -index fc3cd26..d015374 100644 ---- a/drivers/scsi/scsi_sysfs.c -+++ b/drivers/scsi/scsi_sysfs.c -@@ -1120,11 +1120,12 @@ int scsi_sysfs_add_sdev(struct scsi_device *sdev) - } - - error = scsi_dh_add_device(sdev); -- if (error) { -+ if (error) -+ /* -+ * device_handler is optional, so any error can be ignored -+ */ - sdev_printk(KERN_INFO, sdev, - "failed to add device handler: %d\n", error); -- return error; -- } - - device_enable_async_suspend(&sdev->sdev_dev); - error = device_add(&sdev->sdev_dev); --- -cgit v0.11.2 - diff --git a/amd-xgbe-a0-Add-support-for-XGBE-on-A0.patch b/amd-xgbe-a0-Add-support-for-XGBE-on-A0.patch deleted file mode 100644 index 6b9d07dc7..000000000 --- a/amd-xgbe-a0-Add-support-for-XGBE-on-A0.patch +++ /dev/null @@ -1,10391 +0,0 @@ -From b634bc924371a7df6459af04f37c91f65ac59df2 Mon Sep 17 00:00:00 2001 -From: Tom Lendacky -Date: Thu, 28 May 2015 16:38:57 -0400 -Subject: [PATCH 1/2] amd-xgbe-a0: Add support for XGBE on A0 - -Add XGBE driver support for A0 hardware. - -Signed-off-by: Tom Lendacky -[fixup timespec -> timespec64] -[use device_dma_is_coherent] -Signed-off-by: Mark Salter ---- - drivers/net/ethernet/amd/Makefile | 1 + - drivers/net/ethernet/amd/xgbe-a0/Makefile | 8 + - drivers/net/ethernet/amd/xgbe-a0/xgbe-common.h | 1142 +++++++++ - drivers/net/ethernet/amd/xgbe-a0/xgbe-dcb.c | 269 +++ - drivers/net/ethernet/amd/xgbe-a0/xgbe-debugfs.c | 373 +++ - drivers/net/ethernet/amd/xgbe-a0/xgbe-desc.c | 636 +++++ - drivers/net/ethernet/amd/xgbe-a0/xgbe-dev.c | 2930 +++++++++++++++++++++++ - drivers/net/ethernet/amd/xgbe-a0/xgbe-drv.c | 2218 +++++++++++++++++ - drivers/net/ethernet/amd/xgbe-a0/xgbe-ethtool.c | 616 +++++ - drivers/net/ethernet/amd/xgbe-a0/xgbe-main.c | 618 +++++ - drivers/net/ethernet/amd/xgbe-a0/xgbe-mdio.c | 312 +++ - drivers/net/ethernet/amd/xgbe-a0/xgbe-ptp.c | 278 +++ - drivers/net/ethernet/amd/xgbe-a0/xgbe.h | 868 +++++++ - 13 files changed, 10269 insertions(+) - create mode 100644 drivers/net/ethernet/amd/xgbe-a0/Makefile - create mode 100644 drivers/net/ethernet/amd/xgbe-a0/xgbe-common.h - create mode 100644 drivers/net/ethernet/amd/xgbe-a0/xgbe-dcb.c - create mode 100644 drivers/net/ethernet/amd/xgbe-a0/xgbe-debugfs.c - create mode 100644 drivers/net/ethernet/amd/xgbe-a0/xgbe-desc.c - create mode 100644 drivers/net/ethernet/amd/xgbe-a0/xgbe-dev.c - create mode 100644 drivers/net/ethernet/amd/xgbe-a0/xgbe-drv.c - create mode 100644 drivers/net/ethernet/amd/xgbe-a0/xgbe-ethtool.c - create mode 100644 drivers/net/ethernet/amd/xgbe-a0/xgbe-main.c - create mode 100644 drivers/net/ethernet/amd/xgbe-a0/xgbe-mdio.c - create mode 100644 drivers/net/ethernet/amd/xgbe-a0/xgbe-ptp.c - create mode 100644 drivers/net/ethernet/amd/xgbe-a0/xgbe.h - -diff --git a/drivers/net/ethernet/amd/Makefile b/drivers/net/ethernet/amd/Makefile -index a38a2dc..bf0cf2f 100644 ---- a/drivers/net/ethernet/amd/Makefile -+++ b/drivers/net/ethernet/amd/Makefile -@@ -18,3 +18,4 @@ obj-$(CONFIG_PCNET32) += pcnet32.o - obj-$(CONFIG_SUN3LANCE) += sun3lance.o - obj-$(CONFIG_SUNLANCE) += sunlance.o - obj-$(CONFIG_AMD_XGBE) += xgbe/ -+obj-$(CONFIG_AMD_XGBE) += xgbe-a0/ -diff --git a/drivers/net/ethernet/amd/xgbe-a0/Makefile b/drivers/net/ethernet/amd/xgbe-a0/Makefile -new file mode 100644 -index 0000000..561116f ---- /dev/null -+++ b/drivers/net/ethernet/amd/xgbe-a0/Makefile -@@ -0,0 +1,8 @@ -+obj-$(CONFIG_AMD_XGBE) += amd-xgbe-a0.o -+ -+amd-xgbe-a0-objs := xgbe-main.o xgbe-drv.o xgbe-dev.o \ -+ xgbe-desc.o xgbe-ethtool.o xgbe-mdio.o \ -+ xgbe-ptp.o -+ -+amd-xgbe-a0-$(CONFIG_AMD_XGBE_DCB) += xgbe-dcb.o -+amd-xgbe-a0-$(CONFIG_DEBUG_FS) += xgbe-debugfs.o -diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-common.h b/drivers/net/ethernet/amd/xgbe-a0/xgbe-common.h -new file mode 100644 -index 0000000..75b08c6 ---- /dev/null -+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-common.h -@@ -0,0 +1,1142 @@ -+/* -+ * AMD 10Gb Ethernet driver -+ * -+ * This file is available to you under your choice of the following two -+ * licenses: -+ * -+ * License 1: GPLv2 -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * -+ * This file is free software; you may copy, redistribute and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation, either version 2 of the License, or (at -+ * your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program. If not, see . -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * -+ * License 2: Modified BSD -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions are met: -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * * Neither the name of Advanced Micro Devices, Inc. nor the -+ * names of its contributors may be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY -+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+#ifndef __XGBE_COMMON_H__ -+#define __XGBE_COMMON_H__ -+ -+/* DMA register offsets */ -+#define DMA_MR 0x3000 -+#define DMA_SBMR 0x3004 -+#define DMA_ISR 0x3008 -+#define DMA_AXIARCR 0x3010 -+#define DMA_AXIAWCR 0x3018 -+#define DMA_DSR0 0x3020 -+#define DMA_DSR1 0x3024 -+ -+/* DMA register entry bit positions and sizes */ -+#define DMA_AXIARCR_DRC_INDEX 0 -+#define DMA_AXIARCR_DRC_WIDTH 4 -+#define DMA_AXIARCR_DRD_INDEX 4 -+#define DMA_AXIARCR_DRD_WIDTH 2 -+#define DMA_AXIARCR_TEC_INDEX 8 -+#define DMA_AXIARCR_TEC_WIDTH 4 -+#define DMA_AXIARCR_TED_INDEX 12 -+#define DMA_AXIARCR_TED_WIDTH 2 -+#define DMA_AXIARCR_THC_INDEX 16 -+#define DMA_AXIARCR_THC_WIDTH 4 -+#define DMA_AXIARCR_THD_INDEX 20 -+#define DMA_AXIARCR_THD_WIDTH 2 -+#define DMA_AXIAWCR_DWC_INDEX 0 -+#define DMA_AXIAWCR_DWC_WIDTH 4 -+#define DMA_AXIAWCR_DWD_INDEX 4 -+#define DMA_AXIAWCR_DWD_WIDTH 2 -+#define DMA_AXIAWCR_RPC_INDEX 8 -+#define DMA_AXIAWCR_RPC_WIDTH 4 -+#define DMA_AXIAWCR_RPD_INDEX 12 -+#define DMA_AXIAWCR_RPD_WIDTH 2 -+#define DMA_AXIAWCR_RHC_INDEX 16 -+#define DMA_AXIAWCR_RHC_WIDTH 4 -+#define DMA_AXIAWCR_RHD_INDEX 20 -+#define DMA_AXIAWCR_RHD_WIDTH 2 -+#define DMA_AXIAWCR_TDC_INDEX 24 -+#define DMA_AXIAWCR_TDC_WIDTH 4 -+#define DMA_AXIAWCR_TDD_INDEX 28 -+#define DMA_AXIAWCR_TDD_WIDTH 2 -+#define DMA_ISR_MACIS_INDEX 17 -+#define DMA_ISR_MACIS_WIDTH 1 -+#define DMA_ISR_MTLIS_INDEX 16 -+#define DMA_ISR_MTLIS_WIDTH 1 -+#define DMA_MR_SWR_INDEX 0 -+#define DMA_MR_SWR_WIDTH 1 -+#define DMA_SBMR_EAME_INDEX 11 -+#define DMA_SBMR_EAME_WIDTH 1 -+#define DMA_SBMR_BLEN_256_INDEX 7 -+#define DMA_SBMR_BLEN_256_WIDTH 1 -+#define DMA_SBMR_UNDEF_INDEX 0 -+#define DMA_SBMR_UNDEF_WIDTH 1 -+ -+/* DMA register values */ -+#define DMA_DSR_RPS_WIDTH 4 -+#define DMA_DSR_TPS_WIDTH 4 -+#define DMA_DSR_Q_WIDTH (DMA_DSR_RPS_WIDTH + DMA_DSR_TPS_WIDTH) -+#define DMA_DSR0_RPS_START 8 -+#define DMA_DSR0_TPS_START 12 -+#define DMA_DSRX_FIRST_QUEUE 3 -+#define DMA_DSRX_INC 4 -+#define DMA_DSRX_QPR 4 -+#define DMA_DSRX_RPS_START 0 -+#define DMA_DSRX_TPS_START 4 -+#define DMA_TPS_STOPPED 0x00 -+#define DMA_TPS_SUSPENDED 0x06 -+ -+/* DMA channel register offsets -+ * Multiple channels can be active. The first channel has registers -+ * that begin at 0x3100. Each subsequent channel has registers that -+ * are accessed using an offset of 0x80 from the previous channel. -+ */ -+#define DMA_CH_BASE 0x3100 -+#define DMA_CH_INC 0x80 -+ -+#define DMA_CH_CR 0x00 -+#define DMA_CH_TCR 0x04 -+#define DMA_CH_RCR 0x08 -+#define DMA_CH_TDLR_HI 0x10 -+#define DMA_CH_TDLR_LO 0x14 -+#define DMA_CH_RDLR_HI 0x18 -+#define DMA_CH_RDLR_LO 0x1c -+#define DMA_CH_TDTR_LO 0x24 -+#define DMA_CH_RDTR_LO 0x2c -+#define DMA_CH_TDRLR 0x30 -+#define DMA_CH_RDRLR 0x34 -+#define DMA_CH_IER 0x38 -+#define DMA_CH_RIWT 0x3c -+#define DMA_CH_CATDR_LO 0x44 -+#define DMA_CH_CARDR_LO 0x4c -+#define DMA_CH_CATBR_HI 0x50 -+#define DMA_CH_CATBR_LO 0x54 -+#define DMA_CH_CARBR_HI 0x58 -+#define DMA_CH_CARBR_LO 0x5c -+#define DMA_CH_SR 0x60 -+ -+/* DMA channel register entry bit positions and sizes */ -+#define DMA_CH_CR_PBLX8_INDEX 16 -+#define DMA_CH_CR_PBLX8_WIDTH 1 -+#define DMA_CH_CR_SPH_INDEX 24 -+#define DMA_CH_CR_SPH_WIDTH 1 -+#define DMA_CH_IER_AIE_INDEX 15 -+#define DMA_CH_IER_AIE_WIDTH 1 -+#define DMA_CH_IER_FBEE_INDEX 12 -+#define DMA_CH_IER_FBEE_WIDTH 1 -+#define DMA_CH_IER_NIE_INDEX 16 -+#define DMA_CH_IER_NIE_WIDTH 1 -+#define DMA_CH_IER_RBUE_INDEX 7 -+#define DMA_CH_IER_RBUE_WIDTH 1 -+#define DMA_CH_IER_RIE_INDEX 6 -+#define DMA_CH_IER_RIE_WIDTH 1 -+#define DMA_CH_IER_RSE_INDEX 8 -+#define DMA_CH_IER_RSE_WIDTH 1 -+#define DMA_CH_IER_TBUE_INDEX 2 -+#define DMA_CH_IER_TBUE_WIDTH 1 -+#define DMA_CH_IER_TIE_INDEX 0 -+#define DMA_CH_IER_TIE_WIDTH 1 -+#define DMA_CH_IER_TXSE_INDEX 1 -+#define DMA_CH_IER_TXSE_WIDTH 1 -+#define DMA_CH_RCR_PBL_INDEX 16 -+#define DMA_CH_RCR_PBL_WIDTH 6 -+#define DMA_CH_RCR_RBSZ_INDEX 1 -+#define DMA_CH_RCR_RBSZ_WIDTH 14 -+#define DMA_CH_RCR_SR_INDEX 0 -+#define DMA_CH_RCR_SR_WIDTH 1 -+#define DMA_CH_RIWT_RWT_INDEX 0 -+#define DMA_CH_RIWT_RWT_WIDTH 8 -+#define DMA_CH_SR_FBE_INDEX 12 -+#define DMA_CH_SR_FBE_WIDTH 1 -+#define DMA_CH_SR_RBU_INDEX 7 -+#define DMA_CH_SR_RBU_WIDTH 1 -+#define DMA_CH_SR_RI_INDEX 6 -+#define DMA_CH_SR_RI_WIDTH 1 -+#define DMA_CH_SR_RPS_INDEX 8 -+#define DMA_CH_SR_RPS_WIDTH 1 -+#define DMA_CH_SR_TBU_INDEX 2 -+#define DMA_CH_SR_TBU_WIDTH 1 -+#define DMA_CH_SR_TI_INDEX 0 -+#define DMA_CH_SR_TI_WIDTH 1 -+#define DMA_CH_SR_TPS_INDEX 1 -+#define DMA_CH_SR_TPS_WIDTH 1 -+#define DMA_CH_TCR_OSP_INDEX 4 -+#define DMA_CH_TCR_OSP_WIDTH 1 -+#define DMA_CH_TCR_PBL_INDEX 16 -+#define DMA_CH_TCR_PBL_WIDTH 6 -+#define DMA_CH_TCR_ST_INDEX 0 -+#define DMA_CH_TCR_ST_WIDTH 1 -+#define DMA_CH_TCR_TSE_INDEX 12 -+#define DMA_CH_TCR_TSE_WIDTH 1 -+ -+/* DMA channel register values */ -+#define DMA_OSP_DISABLE 0x00 -+#define DMA_OSP_ENABLE 0x01 -+#define DMA_PBL_1 1 -+#define DMA_PBL_2 2 -+#define DMA_PBL_4 4 -+#define DMA_PBL_8 8 -+#define DMA_PBL_16 16 -+#define DMA_PBL_32 32 -+#define DMA_PBL_64 64 /* 8 x 8 */ -+#define DMA_PBL_128 128 /* 8 x 16 */ -+#define DMA_PBL_256 256 /* 8 x 32 */ -+#define DMA_PBL_X8_DISABLE 0x00 -+#define DMA_PBL_X8_ENABLE 0x01 -+ -+/* MAC register offsets */ -+#define MAC_TCR 0x0000 -+#define MAC_RCR 0x0004 -+#define MAC_PFR 0x0008 -+#define MAC_WTR 0x000c -+#define MAC_HTR0 0x0010 -+#define MAC_VLANTR 0x0050 -+#define MAC_VLANHTR 0x0058 -+#define MAC_VLANIR 0x0060 -+#define MAC_IVLANIR 0x0064 -+#define MAC_RETMR 0x006c -+#define MAC_Q0TFCR 0x0070 -+#define MAC_RFCR 0x0090 -+#define MAC_RQC0R 0x00a0 -+#define MAC_RQC1R 0x00a4 -+#define MAC_RQC2R 0x00a8 -+#define MAC_RQC3R 0x00ac -+#define MAC_ISR 0x00b0 -+#define MAC_IER 0x00b4 -+#define MAC_RTSR 0x00b8 -+#define MAC_PMTCSR 0x00c0 -+#define MAC_RWKPFR 0x00c4 -+#define MAC_LPICSR 0x00d0 -+#define MAC_LPITCR 0x00d4 -+#define MAC_VR 0x0110 -+#define MAC_DR 0x0114 -+#define MAC_HWF0R 0x011c -+#define MAC_HWF1R 0x0120 -+#define MAC_HWF2R 0x0124 -+#define MAC_GPIOCR 0x0278 -+#define MAC_GPIOSR 0x027c -+#define MAC_MACA0HR 0x0300 -+#define MAC_MACA0LR 0x0304 -+#define MAC_MACA1HR 0x0308 -+#define MAC_MACA1LR 0x030c -+#define MAC_RSSCR 0x0c80 -+#define MAC_RSSAR 0x0c88 -+#define MAC_RSSDR 0x0c8c -+#define MAC_TSCR 0x0d00 -+#define MAC_SSIR 0x0d04 -+#define MAC_STSR 0x0d08 -+#define MAC_STNR 0x0d0c -+#define MAC_STSUR 0x0d10 -+#define MAC_STNUR 0x0d14 -+#define MAC_TSAR 0x0d18 -+#define MAC_TSSR 0x0d20 -+#define MAC_TXSNR 0x0d30 -+#define MAC_TXSSR 0x0d34 -+ -+#define MAC_QTFCR_INC 4 -+#define MAC_MACA_INC 4 -+#define MAC_HTR_INC 4 -+ -+#define MAC_RQC2_INC 4 -+#define MAC_RQC2_Q_PER_REG 4 -+ -+/* MAC register entry bit positions and sizes */ -+#define MAC_HWF0R_ADDMACADRSEL_INDEX 18 -+#define MAC_HWF0R_ADDMACADRSEL_WIDTH 5 -+#define MAC_HWF0R_ARPOFFSEL_INDEX 9 -+#define MAC_HWF0R_ARPOFFSEL_WIDTH 1 -+#define MAC_HWF0R_EEESEL_INDEX 13 -+#define MAC_HWF0R_EEESEL_WIDTH 1 -+#define MAC_HWF0R_GMIISEL_INDEX 1 -+#define MAC_HWF0R_GMIISEL_WIDTH 1 -+#define MAC_HWF0R_MGKSEL_INDEX 7 -+#define MAC_HWF0R_MGKSEL_WIDTH 1 -+#define MAC_HWF0R_MMCSEL_INDEX 8 -+#define MAC_HWF0R_MMCSEL_WIDTH 1 -+#define MAC_HWF0R_RWKSEL_INDEX 6 -+#define MAC_HWF0R_RWKSEL_WIDTH 1 -+#define MAC_HWF0R_RXCOESEL_INDEX 16 -+#define MAC_HWF0R_RXCOESEL_WIDTH 1 -+#define MAC_HWF0R_SAVLANINS_INDEX 27 -+#define MAC_HWF0R_SAVLANINS_WIDTH 1 -+#define MAC_HWF0R_SMASEL_INDEX 5 -+#define MAC_HWF0R_SMASEL_WIDTH 1 -+#define MAC_HWF0R_TSSEL_INDEX 12 -+#define MAC_HWF0R_TSSEL_WIDTH 1 -+#define MAC_HWF0R_TSSTSSEL_INDEX 25 -+#define MAC_HWF0R_TSSTSSEL_WIDTH 2 -+#define MAC_HWF0R_TXCOESEL_INDEX 14 -+#define MAC_HWF0R_TXCOESEL_WIDTH 1 -+#define MAC_HWF0R_VLHASH_INDEX 4 -+#define MAC_HWF0R_VLHASH_WIDTH 1 -+#define MAC_HWF1R_ADVTHWORD_INDEX 13 -+#define MAC_HWF1R_ADVTHWORD_WIDTH 1 -+#define MAC_HWF1R_DBGMEMA_INDEX 19 -+#define MAC_HWF1R_DBGMEMA_WIDTH 1 -+#define MAC_HWF1R_DCBEN_INDEX 16 -+#define MAC_HWF1R_DCBEN_WIDTH 1 -+#define MAC_HWF1R_HASHTBLSZ_INDEX 24 -+#define MAC_HWF1R_HASHTBLSZ_WIDTH 3 -+#define MAC_HWF1R_L3L4FNUM_INDEX 27 -+#define MAC_HWF1R_L3L4FNUM_WIDTH 4 -+#define MAC_HWF1R_NUMTC_INDEX 21 -+#define MAC_HWF1R_NUMTC_WIDTH 3 -+#define MAC_HWF1R_RSSEN_INDEX 20 -+#define MAC_HWF1R_RSSEN_WIDTH 1 -+#define MAC_HWF1R_RXFIFOSIZE_INDEX 0 -+#define MAC_HWF1R_RXFIFOSIZE_WIDTH 5 -+#define MAC_HWF1R_SPHEN_INDEX 17 -+#define MAC_HWF1R_SPHEN_WIDTH 1 -+#define MAC_HWF1R_TSOEN_INDEX 18 -+#define MAC_HWF1R_TSOEN_WIDTH 1 -+#define MAC_HWF1R_TXFIFOSIZE_INDEX 6 -+#define MAC_HWF1R_TXFIFOSIZE_WIDTH 5 -+#define MAC_HWF2R_AUXSNAPNUM_INDEX 28 -+#define MAC_HWF2R_AUXSNAPNUM_WIDTH 3 -+#define MAC_HWF2R_PPSOUTNUM_INDEX 24 -+#define MAC_HWF2R_PPSOUTNUM_WIDTH 3 -+#define MAC_HWF2R_RXCHCNT_INDEX 12 -+#define MAC_HWF2R_RXCHCNT_WIDTH 4 -+#define MAC_HWF2R_RXQCNT_INDEX 0 -+#define MAC_HWF2R_RXQCNT_WIDTH 4 -+#define MAC_HWF2R_TXCHCNT_INDEX 18 -+#define MAC_HWF2R_TXCHCNT_WIDTH 4 -+#define MAC_HWF2R_TXQCNT_INDEX 6 -+#define MAC_HWF2R_TXQCNT_WIDTH 4 -+#define MAC_IER_TSIE_INDEX 12 -+#define MAC_IER_TSIE_WIDTH 1 -+#define MAC_ISR_MMCRXIS_INDEX 9 -+#define MAC_ISR_MMCRXIS_WIDTH 1 -+#define MAC_ISR_MMCTXIS_INDEX 10 -+#define MAC_ISR_MMCTXIS_WIDTH 1 -+#define MAC_ISR_PMTIS_INDEX 4 -+#define MAC_ISR_PMTIS_WIDTH 1 -+#define MAC_ISR_TSIS_INDEX 12 -+#define MAC_ISR_TSIS_WIDTH 1 -+#define MAC_MACA1HR_AE_INDEX 31 -+#define MAC_MACA1HR_AE_WIDTH 1 -+#define MAC_PFR_HMC_INDEX 2 -+#define MAC_PFR_HMC_WIDTH 1 -+#define MAC_PFR_HPF_INDEX 10 -+#define MAC_PFR_HPF_WIDTH 1 -+#define MAC_PFR_HUC_INDEX 1 -+#define MAC_PFR_HUC_WIDTH 1 -+#define MAC_PFR_PM_INDEX 4 -+#define MAC_PFR_PM_WIDTH 1 -+#define MAC_PFR_PR_INDEX 0 -+#define MAC_PFR_PR_WIDTH 1 -+#define MAC_PFR_VTFE_INDEX 16 -+#define MAC_PFR_VTFE_WIDTH 1 -+#define MAC_PMTCSR_MGKPKTEN_INDEX 1 -+#define MAC_PMTCSR_MGKPKTEN_WIDTH 1 -+#define MAC_PMTCSR_PWRDWN_INDEX 0 -+#define MAC_PMTCSR_PWRDWN_WIDTH 1 -+#define MAC_PMTCSR_RWKFILTRST_INDEX 31 -+#define MAC_PMTCSR_RWKFILTRST_WIDTH 1 -+#define MAC_PMTCSR_RWKPKTEN_INDEX 2 -+#define MAC_PMTCSR_RWKPKTEN_WIDTH 1 -+#define MAC_Q0TFCR_PT_INDEX 16 -+#define MAC_Q0TFCR_PT_WIDTH 16 -+#define MAC_Q0TFCR_TFE_INDEX 1 -+#define MAC_Q0TFCR_TFE_WIDTH 1 -+#define MAC_RCR_ACS_INDEX 1 -+#define MAC_RCR_ACS_WIDTH 1 -+#define MAC_RCR_CST_INDEX 2 -+#define MAC_RCR_CST_WIDTH 1 -+#define MAC_RCR_DCRCC_INDEX 3 -+#define MAC_RCR_DCRCC_WIDTH 1 -+#define MAC_RCR_HDSMS_INDEX 12 -+#define MAC_RCR_HDSMS_WIDTH 3 -+#define MAC_RCR_IPC_INDEX 9 -+#define MAC_RCR_IPC_WIDTH 1 -+#define MAC_RCR_JE_INDEX 8 -+#define MAC_RCR_JE_WIDTH 1 -+#define MAC_RCR_LM_INDEX 10 -+#define MAC_RCR_LM_WIDTH 1 -+#define MAC_RCR_RE_INDEX 0 -+#define MAC_RCR_RE_WIDTH 1 -+#define MAC_RFCR_PFCE_INDEX 8 -+#define MAC_RFCR_PFCE_WIDTH 1 -+#define MAC_RFCR_RFE_INDEX 0 -+#define MAC_RFCR_RFE_WIDTH 1 -+#define MAC_RFCR_UP_INDEX 1 -+#define MAC_RFCR_UP_WIDTH 1 -+#define MAC_RQC0R_RXQ0EN_INDEX 0 -+#define MAC_RQC0R_RXQ0EN_WIDTH 2 -+#define MAC_RSSAR_ADDRT_INDEX 2 -+#define MAC_RSSAR_ADDRT_WIDTH 1 -+#define MAC_RSSAR_CT_INDEX 1 -+#define MAC_RSSAR_CT_WIDTH 1 -+#define MAC_RSSAR_OB_INDEX 0 -+#define MAC_RSSAR_OB_WIDTH 1 -+#define MAC_RSSAR_RSSIA_INDEX 8 -+#define MAC_RSSAR_RSSIA_WIDTH 8 -+#define MAC_RSSCR_IP2TE_INDEX 1 -+#define MAC_RSSCR_IP2TE_WIDTH 1 -+#define MAC_RSSCR_RSSE_INDEX 0 -+#define MAC_RSSCR_RSSE_WIDTH 1 -+#define MAC_RSSCR_TCP4TE_INDEX 2 -+#define MAC_RSSCR_TCP4TE_WIDTH 1 -+#define MAC_RSSCR_UDP4TE_INDEX 3 -+#define MAC_RSSCR_UDP4TE_WIDTH 1 -+#define MAC_RSSDR_DMCH_INDEX 0 -+#define MAC_RSSDR_DMCH_WIDTH 4 -+#define MAC_SSIR_SNSINC_INDEX 8 -+#define MAC_SSIR_SNSINC_WIDTH 8 -+#define MAC_SSIR_SSINC_INDEX 16 -+#define MAC_SSIR_SSINC_WIDTH 8 -+#define MAC_TCR_SS_INDEX 29 -+#define MAC_TCR_SS_WIDTH 2 -+#define MAC_TCR_TE_INDEX 0 -+#define MAC_TCR_TE_WIDTH 1 -+#define MAC_TSCR_AV8021ASMEN_INDEX 28 -+#define MAC_TSCR_AV8021ASMEN_WIDTH 1 -+#define MAC_TSCR_SNAPTYPSEL_INDEX 16 -+#define MAC_TSCR_SNAPTYPSEL_WIDTH 2 -+#define MAC_TSCR_TSADDREG_INDEX 5 -+#define MAC_TSCR_TSADDREG_WIDTH 1 -+#define MAC_TSCR_TSCFUPDT_INDEX 1 -+#define MAC_TSCR_TSCFUPDT_WIDTH 1 -+#define MAC_TSCR_TSCTRLSSR_INDEX 9 -+#define MAC_TSCR_TSCTRLSSR_WIDTH 1 -+#define MAC_TSCR_TSENA_INDEX 0 -+#define MAC_TSCR_TSENA_WIDTH 1 -+#define MAC_TSCR_TSENALL_INDEX 8 -+#define MAC_TSCR_TSENALL_WIDTH 1 -+#define MAC_TSCR_TSEVNTENA_INDEX 14 -+#define MAC_TSCR_TSEVNTENA_WIDTH 1 -+#define MAC_TSCR_TSINIT_INDEX 2 -+#define MAC_TSCR_TSINIT_WIDTH 1 -+#define MAC_TSCR_TSIPENA_INDEX 11 -+#define MAC_TSCR_TSIPENA_WIDTH 1 -+#define MAC_TSCR_TSIPV4ENA_INDEX 13 -+#define MAC_TSCR_TSIPV4ENA_WIDTH 1 -+#define MAC_TSCR_TSIPV6ENA_INDEX 12 -+#define MAC_TSCR_TSIPV6ENA_WIDTH 1 -+#define MAC_TSCR_TSMSTRENA_INDEX 15 -+#define MAC_TSCR_TSMSTRENA_WIDTH 1 -+#define MAC_TSCR_TSVER2ENA_INDEX 10 -+#define MAC_TSCR_TSVER2ENA_WIDTH 1 -+#define MAC_TSCR_TXTSSTSM_INDEX 24 -+#define MAC_TSCR_TXTSSTSM_WIDTH 1 -+#define MAC_TSSR_TXTSC_INDEX 15 -+#define MAC_TSSR_TXTSC_WIDTH 1 -+#define MAC_TXSNR_TXTSSTSMIS_INDEX 31 -+#define MAC_TXSNR_TXTSSTSMIS_WIDTH 1 -+#define MAC_VLANHTR_VLHT_INDEX 0 -+#define MAC_VLANHTR_VLHT_WIDTH 16 -+#define MAC_VLANIR_VLTI_INDEX 20 -+#define MAC_VLANIR_VLTI_WIDTH 1 -+#define MAC_VLANIR_CSVL_INDEX 19 -+#define MAC_VLANIR_CSVL_WIDTH 1 -+#define MAC_VLANTR_DOVLTC_INDEX 20 -+#define MAC_VLANTR_DOVLTC_WIDTH 1 -+#define MAC_VLANTR_ERSVLM_INDEX 19 -+#define MAC_VLANTR_ERSVLM_WIDTH 1 -+#define MAC_VLANTR_ESVL_INDEX 18 -+#define MAC_VLANTR_ESVL_WIDTH 1 -+#define MAC_VLANTR_ETV_INDEX 16 -+#define MAC_VLANTR_ETV_WIDTH 1 -+#define MAC_VLANTR_EVLS_INDEX 21 -+#define MAC_VLANTR_EVLS_WIDTH 2 -+#define MAC_VLANTR_EVLRXS_INDEX 24 -+#define MAC_VLANTR_EVLRXS_WIDTH 1 -+#define MAC_VLANTR_VL_INDEX 0 -+#define MAC_VLANTR_VL_WIDTH 16 -+#define MAC_VLANTR_VTHM_INDEX 25 -+#define MAC_VLANTR_VTHM_WIDTH 1 -+#define MAC_VLANTR_VTIM_INDEX 17 -+#define MAC_VLANTR_VTIM_WIDTH 1 -+#define MAC_VR_DEVID_INDEX 8 -+#define MAC_VR_DEVID_WIDTH 8 -+#define MAC_VR_SNPSVER_INDEX 0 -+#define MAC_VR_SNPSVER_WIDTH 8 -+#define MAC_VR_USERVER_INDEX 16 -+#define MAC_VR_USERVER_WIDTH 8 -+ -+/* MMC register offsets */ -+#define MMC_CR 0x0800 -+#define MMC_RISR 0x0804 -+#define MMC_TISR 0x0808 -+#define MMC_RIER 0x080c -+#define MMC_TIER 0x0810 -+#define MMC_TXOCTETCOUNT_GB_LO 0x0814 -+#define MMC_TXOCTETCOUNT_GB_HI 0x0818 -+#define MMC_TXFRAMECOUNT_GB_LO 0x081c -+#define MMC_TXFRAMECOUNT_GB_HI 0x0820 -+#define MMC_TXBROADCASTFRAMES_G_LO 0x0824 -+#define MMC_TXBROADCASTFRAMES_G_HI 0x0828 -+#define MMC_TXMULTICASTFRAMES_G_LO 0x082c -+#define MMC_TXMULTICASTFRAMES_G_HI 0x0830 -+#define MMC_TX64OCTETS_GB_LO 0x0834 -+#define MMC_TX64OCTETS_GB_HI 0x0838 -+#define MMC_TX65TO127OCTETS_GB_LO 0x083c -+#define MMC_TX65TO127OCTETS_GB_HI 0x0840 -+#define MMC_TX128TO255OCTETS_GB_LO 0x0844 -+#define MMC_TX128TO255OCTETS_GB_HI 0x0848 -+#define MMC_TX256TO511OCTETS_GB_LO 0x084c -+#define MMC_TX256TO511OCTETS_GB_HI 0x0850 -+#define MMC_TX512TO1023OCTETS_GB_LO 0x0854 -+#define MMC_TX512TO1023OCTETS_GB_HI 0x0858 -+#define MMC_TX1024TOMAXOCTETS_GB_LO 0x085c -+#define MMC_TX1024TOMAXOCTETS_GB_HI 0x0860 -+#define MMC_TXUNICASTFRAMES_GB_LO 0x0864 -+#define MMC_TXUNICASTFRAMES_GB_HI 0x0868 -+#define MMC_TXMULTICASTFRAMES_GB_LO 0x086c -+#define MMC_TXMULTICASTFRAMES_GB_HI 0x0870 -+#define MMC_TXBROADCASTFRAMES_GB_LO 0x0874 -+#define MMC_TXBROADCASTFRAMES_GB_HI 0x0878 -+#define MMC_TXUNDERFLOWERROR_LO 0x087c -+#define MMC_TXUNDERFLOWERROR_HI 0x0880 -+#define MMC_TXOCTETCOUNT_G_LO 0x0884 -+#define MMC_TXOCTETCOUNT_G_HI 0x0888 -+#define MMC_TXFRAMECOUNT_G_LO 0x088c -+#define MMC_TXFRAMECOUNT_G_HI 0x0890 -+#define MMC_TXPAUSEFRAMES_LO 0x0894 -+#define MMC_TXPAUSEFRAMES_HI 0x0898 -+#define MMC_TXVLANFRAMES_G_LO 0x089c -+#define MMC_TXVLANFRAMES_G_HI 0x08a0 -+#define MMC_RXFRAMECOUNT_GB_LO 0x0900 -+#define MMC_RXFRAMECOUNT_GB_HI 0x0904 -+#define MMC_RXOCTETCOUNT_GB_LO 0x0908 -+#define MMC_RXOCTETCOUNT_GB_HI 0x090c -+#define MMC_RXOCTETCOUNT_G_LO 0x0910 -+#define MMC_RXOCTETCOUNT_G_HI 0x0914 -+#define MMC_RXBROADCASTFRAMES_G_LO 0x0918 -+#define MMC_RXBROADCASTFRAMES_G_HI 0x091c -+#define MMC_RXMULTICASTFRAMES_G_LO 0x0920 -+#define MMC_RXMULTICASTFRAMES_G_HI 0x0924 -+#define MMC_RXCRCERROR_LO 0x0928 -+#define MMC_RXCRCERROR_HI 0x092c -+#define MMC_RXRUNTERROR 0x0930 -+#define MMC_RXJABBERERROR 0x0934 -+#define MMC_RXUNDERSIZE_G 0x0938 -+#define MMC_RXOVERSIZE_G 0x093c -+#define MMC_RX64OCTETS_GB_LO 0x0940 -+#define MMC_RX64OCTETS_GB_HI 0x0944 -+#define MMC_RX65TO127OCTETS_GB_LO 0x0948 -+#define MMC_RX65TO127OCTETS_GB_HI 0x094c -+#define MMC_RX128TO255OCTETS_GB_LO 0x0950 -+#define MMC_RX128TO255OCTETS_GB_HI 0x0954 -+#define MMC_RX256TO511OCTETS_GB_LO 0x0958 -+#define MMC_RX256TO511OCTETS_GB_HI 0x095c -+#define MMC_RX512TO1023OCTETS_GB_LO 0x0960 -+#define MMC_RX512TO1023OCTETS_GB_HI 0x0964 -+#define MMC_RX1024TOMAXOCTETS_GB_LO 0x0968 -+#define MMC_RX1024TOMAXOCTETS_GB_HI 0x096c -+#define MMC_RXUNICASTFRAMES_G_LO 0x0970 -+#define MMC_RXUNICASTFRAMES_G_HI 0x0974 -+#define MMC_RXLENGTHERROR_LO 0x0978 -+#define MMC_RXLENGTHERROR_HI 0x097c -+#define MMC_RXOUTOFRANGETYPE_LO 0x0980 -+#define MMC_RXOUTOFRANGETYPE_HI 0x0984 -+#define MMC_RXPAUSEFRAMES_LO 0x0988 -+#define MMC_RXPAUSEFRAMES_HI 0x098c -+#define MMC_RXFIFOOVERFLOW_LO 0x0990 -+#define MMC_RXFIFOOVERFLOW_HI 0x0994 -+#define MMC_RXVLANFRAMES_GB_LO 0x0998 -+#define MMC_RXVLANFRAMES_GB_HI 0x099c -+#define MMC_RXWATCHDOGERROR 0x09a0 -+ -+/* MMC register entry bit positions and sizes */ -+#define MMC_CR_CR_INDEX 0 -+#define MMC_CR_CR_WIDTH 1 -+#define MMC_CR_CSR_INDEX 1 -+#define MMC_CR_CSR_WIDTH 1 -+#define MMC_CR_ROR_INDEX 2 -+#define MMC_CR_ROR_WIDTH 1 -+#define MMC_CR_MCF_INDEX 3 -+#define MMC_CR_MCF_WIDTH 1 -+#define MMC_CR_MCT_INDEX 4 -+#define MMC_CR_MCT_WIDTH 2 -+#define MMC_RIER_ALL_INTERRUPTS_INDEX 0 -+#define MMC_RIER_ALL_INTERRUPTS_WIDTH 23 -+#define MMC_RISR_RXFRAMECOUNT_GB_INDEX 0 -+#define MMC_RISR_RXFRAMECOUNT_GB_WIDTH 1 -+#define MMC_RISR_RXOCTETCOUNT_GB_INDEX 1 -+#define MMC_RISR_RXOCTETCOUNT_GB_WIDTH 1 -+#define MMC_RISR_RXOCTETCOUNT_G_INDEX 2 -+#define MMC_RISR_RXOCTETCOUNT_G_WIDTH 1 -+#define MMC_RISR_RXBROADCASTFRAMES_G_INDEX 3 -+#define MMC_RISR_RXBROADCASTFRAMES_G_WIDTH 1 -+#define MMC_RISR_RXMULTICASTFRAMES_G_INDEX 4 -+#define MMC_RISR_RXMULTICASTFRAMES_G_WIDTH 1 -+#define MMC_RISR_RXCRCERROR_INDEX 5 -+#define MMC_RISR_RXCRCERROR_WIDTH 1 -+#define MMC_RISR_RXRUNTERROR_INDEX 6 -+#define MMC_RISR_RXRUNTERROR_WIDTH 1 -+#define MMC_RISR_RXJABBERERROR_INDEX 7 -+#define MMC_RISR_RXJABBERERROR_WIDTH 1 -+#define MMC_RISR_RXUNDERSIZE_G_INDEX 8 -+#define MMC_RISR_RXUNDERSIZE_G_WIDTH 1 -+#define MMC_RISR_RXOVERSIZE_G_INDEX 9 -+#define MMC_RISR_RXOVERSIZE_G_WIDTH 1 -+#define MMC_RISR_RX64OCTETS_GB_INDEX 10 -+#define MMC_RISR_RX64OCTETS_GB_WIDTH 1 -+#define MMC_RISR_RX65TO127OCTETS_GB_INDEX 11 -+#define MMC_RISR_RX65TO127OCTETS_GB_WIDTH 1 -+#define MMC_RISR_RX128TO255OCTETS_GB_INDEX 12 -+#define MMC_RISR_RX128TO255OCTETS_GB_WIDTH 1 -+#define MMC_RISR_RX256TO511OCTETS_GB_INDEX 13 -+#define MMC_RISR_RX256TO511OCTETS_GB_WIDTH 1 -+#define MMC_RISR_RX512TO1023OCTETS_GB_INDEX 14 -+#define MMC_RISR_RX512TO1023OCTETS_GB_WIDTH 1 -+#define MMC_RISR_RX1024TOMAXOCTETS_GB_INDEX 15 -+#define MMC_RISR_RX1024TOMAXOCTETS_GB_WIDTH 1 -+#define MMC_RISR_RXUNICASTFRAMES_G_INDEX 16 -+#define MMC_RISR_RXUNICASTFRAMES_G_WIDTH 1 -+#define MMC_RISR_RXLENGTHERROR_INDEX 17 -+#define MMC_RISR_RXLENGTHERROR_WIDTH 1 -+#define MMC_RISR_RXOUTOFRANGETYPE_INDEX 18 -+#define MMC_RISR_RXOUTOFRANGETYPE_WIDTH 1 -+#define MMC_RISR_RXPAUSEFRAMES_INDEX 19 -+#define MMC_RISR_RXPAUSEFRAMES_WIDTH 1 -+#define MMC_RISR_RXFIFOOVERFLOW_INDEX 20 -+#define MMC_RISR_RXFIFOOVERFLOW_WIDTH 1 -+#define MMC_RISR_RXVLANFRAMES_GB_INDEX 21 -+#define MMC_RISR_RXVLANFRAMES_GB_WIDTH 1 -+#define MMC_RISR_RXWATCHDOGERROR_INDEX 22 -+#define MMC_RISR_RXWATCHDOGERROR_WIDTH 1 -+#define MMC_TIER_ALL_INTERRUPTS_INDEX 0 -+#define MMC_TIER_ALL_INTERRUPTS_WIDTH 18 -+#define MMC_TISR_TXOCTETCOUNT_GB_INDEX 0 -+#define MMC_TISR_TXOCTETCOUNT_GB_WIDTH 1 -+#define MMC_TISR_TXFRAMECOUNT_GB_INDEX 1 -+#define MMC_TISR_TXFRAMECOUNT_GB_WIDTH 1 -+#define MMC_TISR_TXBROADCASTFRAMES_G_INDEX 2 -+#define MMC_TISR_TXBROADCASTFRAMES_G_WIDTH 1 -+#define MMC_TISR_TXMULTICASTFRAMES_G_INDEX 3 -+#define MMC_TISR_TXMULTICASTFRAMES_G_WIDTH 1 -+#define MMC_TISR_TX64OCTETS_GB_INDEX 4 -+#define MMC_TISR_TX64OCTETS_GB_WIDTH 1 -+#define MMC_TISR_TX65TO127OCTETS_GB_INDEX 5 -+#define MMC_TISR_TX65TO127OCTETS_GB_WIDTH 1 -+#define MMC_TISR_TX128TO255OCTETS_GB_INDEX 6 -+#define MMC_TISR_TX128TO255OCTETS_GB_WIDTH 1 -+#define MMC_TISR_TX256TO511OCTETS_GB_INDEX 7 -+#define MMC_TISR_TX256TO511OCTETS_GB_WIDTH 1 -+#define MMC_TISR_TX512TO1023OCTETS_GB_INDEX 8 -+#define MMC_TISR_TX512TO1023OCTETS_GB_WIDTH 1 -+#define MMC_TISR_TX1024TOMAXOCTETS_GB_INDEX 9 -+#define MMC_TISR_TX1024TOMAXOCTETS_GB_WIDTH 1 -+#define MMC_TISR_TXUNICASTFRAMES_GB_INDEX 10 -+#define MMC_TISR_TXUNICASTFRAMES_GB_WIDTH 1 -+#define MMC_TISR_TXMULTICASTFRAMES_GB_INDEX 11 -+#define MMC_TISR_TXMULTICASTFRAMES_GB_WIDTH 1 -+#define MMC_TISR_TXBROADCASTFRAMES_GB_INDEX 12 -+#define MMC_TISR_TXBROADCASTFRAMES_GB_WIDTH 1 -+#define MMC_TISR_TXUNDERFLOWERROR_INDEX 13 -+#define MMC_TISR_TXUNDERFLOWERROR_WIDTH 1 -+#define MMC_TISR_TXOCTETCOUNT_G_INDEX 14 -+#define MMC_TISR_TXOCTETCOUNT_G_WIDTH 1 -+#define MMC_TISR_TXFRAMECOUNT_G_INDEX 15 -+#define MMC_TISR_TXFRAMECOUNT_G_WIDTH 1 -+#define MMC_TISR_TXPAUSEFRAMES_INDEX 16 -+#define MMC_TISR_TXPAUSEFRAMES_WIDTH 1 -+#define MMC_TISR_TXVLANFRAMES_G_INDEX 17 -+#define MMC_TISR_TXVLANFRAMES_G_WIDTH 1 -+ -+/* MTL register offsets */ -+#define MTL_OMR 0x1000 -+#define MTL_FDCR 0x1008 -+#define MTL_FDSR 0x100c -+#define MTL_FDDR 0x1010 -+#define MTL_ISR 0x1020 -+#define MTL_RQDCM0R 0x1030 -+#define MTL_TCPM0R 0x1040 -+#define MTL_TCPM1R 0x1044 -+ -+#define MTL_RQDCM_INC 4 -+#define MTL_RQDCM_Q_PER_REG 4 -+#define MTL_TCPM_INC 4 -+#define MTL_TCPM_TC_PER_REG 4 -+ -+/* MTL register entry bit positions and sizes */ -+#define MTL_OMR_ETSALG_INDEX 5 -+#define MTL_OMR_ETSALG_WIDTH 2 -+#define MTL_OMR_RAA_INDEX 2 -+#define MTL_OMR_RAA_WIDTH 1 -+ -+/* MTL queue register offsets -+ * Multiple queues can be active. The first queue has registers -+ * that begin at 0x1100. Each subsequent queue has registers that -+ * are accessed using an offset of 0x80 from the previous queue. -+ */ -+#define MTL_Q_BASE 0x1100 -+#define MTL_Q_INC 0x80 -+ -+#define MTL_Q_TQOMR 0x00 -+#define MTL_Q_TQUR 0x04 -+#define MTL_Q_TQDR 0x08 -+#define MTL_Q_RQOMR 0x40 -+#define MTL_Q_RQMPOCR 0x44 -+#define MTL_Q_RQDR 0x4c -+#define MTL_Q_IER 0x70 -+#define MTL_Q_ISR 0x74 -+ -+/* MTL queue register entry bit positions and sizes */ -+#define MTL_Q_RQOMR_EHFC_INDEX 7 -+#define MTL_Q_RQOMR_EHFC_WIDTH 1 -+#define MTL_Q_RQOMR_RFA_INDEX 8 -+#define MTL_Q_RQOMR_RFA_WIDTH 3 -+#define MTL_Q_RQOMR_RFD_INDEX 13 -+#define MTL_Q_RQOMR_RFD_WIDTH 3 -+#define MTL_Q_RQOMR_RQS_INDEX 16 -+#define MTL_Q_RQOMR_RQS_WIDTH 9 -+#define MTL_Q_RQOMR_RSF_INDEX 5 -+#define MTL_Q_RQOMR_RSF_WIDTH 1 -+#define MTL_Q_RQOMR_RTC_INDEX 0 -+#define MTL_Q_RQOMR_RTC_WIDTH 2 -+#define MTL_Q_TQOMR_FTQ_INDEX 0 -+#define MTL_Q_TQOMR_FTQ_WIDTH 1 -+#define MTL_Q_TQOMR_Q2TCMAP_INDEX 8 -+#define MTL_Q_TQOMR_Q2TCMAP_WIDTH 3 -+#define MTL_Q_TQOMR_TQS_INDEX 16 -+#define MTL_Q_TQOMR_TQS_WIDTH 10 -+#define MTL_Q_TQOMR_TSF_INDEX 1 -+#define MTL_Q_TQOMR_TSF_WIDTH 1 -+#define MTL_Q_TQOMR_TTC_INDEX 4 -+#define MTL_Q_TQOMR_TTC_WIDTH 3 -+#define MTL_Q_TQOMR_TXQEN_INDEX 2 -+#define MTL_Q_TQOMR_TXQEN_WIDTH 2 -+ -+/* MTL queue register value */ -+#define MTL_RSF_DISABLE 0x00 -+#define MTL_RSF_ENABLE 0x01 -+#define MTL_TSF_DISABLE 0x00 -+#define MTL_TSF_ENABLE 0x01 -+ -+#define MTL_RX_THRESHOLD_64 0x00 -+#define MTL_RX_THRESHOLD_96 0x02 -+#define MTL_RX_THRESHOLD_128 0x03 -+#define MTL_TX_THRESHOLD_32 0x01 -+#define MTL_TX_THRESHOLD_64 0x00 -+#define MTL_TX_THRESHOLD_96 0x02 -+#define MTL_TX_THRESHOLD_128 0x03 -+#define MTL_TX_THRESHOLD_192 0x04 -+#define MTL_TX_THRESHOLD_256 0x05 -+#define MTL_TX_THRESHOLD_384 0x06 -+#define MTL_TX_THRESHOLD_512 0x07 -+ -+#define MTL_ETSALG_WRR 0x00 -+#define MTL_ETSALG_WFQ 0x01 -+#define MTL_ETSALG_DWRR 0x02 -+#define MTL_RAA_SP 0x00 -+#define MTL_RAA_WSP 0x01 -+ -+#define MTL_Q_DISABLED 0x00 -+#define MTL_Q_ENABLED 0x02 -+ -+/* MTL traffic class register offsets -+ * Multiple traffic classes can be active. The first class has registers -+ * that begin at 0x1100. Each subsequent queue has registers that -+ * are accessed using an offset of 0x80 from the previous queue. -+ */ -+#define MTL_TC_BASE MTL_Q_BASE -+#define MTL_TC_INC MTL_Q_INC -+ -+#define MTL_TC_ETSCR 0x10 -+#define MTL_TC_ETSSR 0x14 -+#define MTL_TC_QWR 0x18 -+ -+/* MTL traffic class register entry bit positions and sizes */ -+#define MTL_TC_ETSCR_TSA_INDEX 0 -+#define MTL_TC_ETSCR_TSA_WIDTH 2 -+#define MTL_TC_QWR_QW_INDEX 0 -+#define MTL_TC_QWR_QW_WIDTH 21 -+ -+/* MTL traffic class register value */ -+#define MTL_TSA_SP 0x00 -+#define MTL_TSA_ETS 0x02 -+ -+/* PCS MMD select register offset -+ * The MMD select register is used for accessing PCS registers -+ * when the underlying APB3 interface is using indirect addressing. -+ * Indirect addressing requires accessing registers in two phases, -+ * an address phase and a data phase. The address phases requires -+ * writing an address selection value to the MMD select regiesters. -+ */ -+#define PCS_MMD_SELECT 0xff -+ -+/* Descriptor/Packet entry bit positions and sizes */ -+#define RX_PACKET_ERRORS_CRC_INDEX 2 -+#define RX_PACKET_ERRORS_CRC_WIDTH 1 -+#define RX_PACKET_ERRORS_FRAME_INDEX 3 -+#define RX_PACKET_ERRORS_FRAME_WIDTH 1 -+#define RX_PACKET_ERRORS_LENGTH_INDEX 0 -+#define RX_PACKET_ERRORS_LENGTH_WIDTH 1 -+#define RX_PACKET_ERRORS_OVERRUN_INDEX 1 -+#define RX_PACKET_ERRORS_OVERRUN_WIDTH 1 -+ -+#define RX_PACKET_ATTRIBUTES_CSUM_DONE_INDEX 0 -+#define RX_PACKET_ATTRIBUTES_CSUM_DONE_WIDTH 1 -+#define RX_PACKET_ATTRIBUTES_VLAN_CTAG_INDEX 1 -+#define RX_PACKET_ATTRIBUTES_VLAN_CTAG_WIDTH 1 -+#define RX_PACKET_ATTRIBUTES_INCOMPLETE_INDEX 2 -+#define RX_PACKET_ATTRIBUTES_INCOMPLETE_WIDTH 1 -+#define RX_PACKET_ATTRIBUTES_CONTEXT_NEXT_INDEX 3 -+#define RX_PACKET_ATTRIBUTES_CONTEXT_NEXT_WIDTH 1 -+#define RX_PACKET_ATTRIBUTES_CONTEXT_INDEX 4 -+#define RX_PACKET_ATTRIBUTES_CONTEXT_WIDTH 1 -+#define RX_PACKET_ATTRIBUTES_RX_TSTAMP_INDEX 5 -+#define RX_PACKET_ATTRIBUTES_RX_TSTAMP_WIDTH 1 -+#define RX_PACKET_ATTRIBUTES_RSS_HASH_INDEX 6 -+#define RX_PACKET_ATTRIBUTES_RSS_HASH_WIDTH 1 -+ -+#define RX_NORMAL_DESC0_OVT_INDEX 0 -+#define RX_NORMAL_DESC0_OVT_WIDTH 16 -+#define RX_NORMAL_DESC2_HL_INDEX 0 -+#define RX_NORMAL_DESC2_HL_WIDTH 10 -+#define RX_NORMAL_DESC3_CDA_INDEX 27 -+#define RX_NORMAL_DESC3_CDA_WIDTH 1 -+#define RX_NORMAL_DESC3_CTXT_INDEX 30 -+#define RX_NORMAL_DESC3_CTXT_WIDTH 1 -+#define RX_NORMAL_DESC3_ES_INDEX 15 -+#define RX_NORMAL_DESC3_ES_WIDTH 1 -+#define RX_NORMAL_DESC3_ETLT_INDEX 16 -+#define RX_NORMAL_DESC3_ETLT_WIDTH 4 -+#define RX_NORMAL_DESC3_FD_INDEX 29 -+#define RX_NORMAL_DESC3_FD_WIDTH 1 -+#define RX_NORMAL_DESC3_INTE_INDEX 30 -+#define RX_NORMAL_DESC3_INTE_WIDTH 1 -+#define RX_NORMAL_DESC3_L34T_INDEX 20 -+#define RX_NORMAL_DESC3_L34T_WIDTH 4 -+#define RX_NORMAL_DESC3_LD_INDEX 28 -+#define RX_NORMAL_DESC3_LD_WIDTH 1 -+#define RX_NORMAL_DESC3_OWN_INDEX 31 -+#define RX_NORMAL_DESC3_OWN_WIDTH 1 -+#define RX_NORMAL_DESC3_PL_INDEX 0 -+#define RX_NORMAL_DESC3_PL_WIDTH 14 -+#define RX_NORMAL_DESC3_RSV_INDEX 26 -+#define RX_NORMAL_DESC3_RSV_WIDTH 1 -+ -+#define RX_DESC3_L34T_IPV4_TCP 1 -+#define RX_DESC3_L34T_IPV4_UDP 2 -+#define RX_DESC3_L34T_IPV4_ICMP 3 -+#define RX_DESC3_L34T_IPV6_TCP 9 -+#define RX_DESC3_L34T_IPV6_UDP 10 -+#define RX_DESC3_L34T_IPV6_ICMP 11 -+ -+#define RX_CONTEXT_DESC3_TSA_INDEX 4 -+#define RX_CONTEXT_DESC3_TSA_WIDTH 1 -+#define RX_CONTEXT_DESC3_TSD_INDEX 6 -+#define RX_CONTEXT_DESC3_TSD_WIDTH 1 -+ -+#define TX_PACKET_ATTRIBUTES_CSUM_ENABLE_INDEX 0 -+#define TX_PACKET_ATTRIBUTES_CSUM_ENABLE_WIDTH 1 -+#define TX_PACKET_ATTRIBUTES_TSO_ENABLE_INDEX 1 -+#define TX_PACKET_ATTRIBUTES_TSO_ENABLE_WIDTH 1 -+#define TX_PACKET_ATTRIBUTES_VLAN_CTAG_INDEX 2 -+#define TX_PACKET_ATTRIBUTES_VLAN_CTAG_WIDTH 1 -+#define TX_PACKET_ATTRIBUTES_PTP_INDEX 3 -+#define TX_PACKET_ATTRIBUTES_PTP_WIDTH 1 -+ -+#define TX_CONTEXT_DESC2_MSS_INDEX 0 -+#define TX_CONTEXT_DESC2_MSS_WIDTH 15 -+#define TX_CONTEXT_DESC3_CTXT_INDEX 30 -+#define TX_CONTEXT_DESC3_CTXT_WIDTH 1 -+#define TX_CONTEXT_DESC3_TCMSSV_INDEX 26 -+#define TX_CONTEXT_DESC3_TCMSSV_WIDTH 1 -+#define TX_CONTEXT_DESC3_VLTV_INDEX 16 -+#define TX_CONTEXT_DESC3_VLTV_WIDTH 1 -+#define TX_CONTEXT_DESC3_VT_INDEX 0 -+#define TX_CONTEXT_DESC3_VT_WIDTH 16 -+ -+#define TX_NORMAL_DESC2_HL_B1L_INDEX 0 -+#define TX_NORMAL_DESC2_HL_B1L_WIDTH 14 -+#define TX_NORMAL_DESC2_IC_INDEX 31 -+#define TX_NORMAL_DESC2_IC_WIDTH 1 -+#define TX_NORMAL_DESC2_TTSE_INDEX 30 -+#define TX_NORMAL_DESC2_TTSE_WIDTH 1 -+#define TX_NORMAL_DESC2_VTIR_INDEX 14 -+#define TX_NORMAL_DESC2_VTIR_WIDTH 2 -+#define TX_NORMAL_DESC3_CIC_INDEX 16 -+#define TX_NORMAL_DESC3_CIC_WIDTH 2 -+#define TX_NORMAL_DESC3_CPC_INDEX 26 -+#define TX_NORMAL_DESC3_CPC_WIDTH 2 -+#define TX_NORMAL_DESC3_CTXT_INDEX 30 -+#define TX_NORMAL_DESC3_CTXT_WIDTH 1 -+#define TX_NORMAL_DESC3_FD_INDEX 29 -+#define TX_NORMAL_DESC3_FD_WIDTH 1 -+#define TX_NORMAL_DESC3_FL_INDEX 0 -+#define TX_NORMAL_DESC3_FL_WIDTH 15 -+#define TX_NORMAL_DESC3_LD_INDEX 28 -+#define TX_NORMAL_DESC3_LD_WIDTH 1 -+#define TX_NORMAL_DESC3_OWN_INDEX 31 -+#define TX_NORMAL_DESC3_OWN_WIDTH 1 -+#define TX_NORMAL_DESC3_TCPHDRLEN_INDEX 19 -+#define TX_NORMAL_DESC3_TCPHDRLEN_WIDTH 4 -+#define TX_NORMAL_DESC3_TCPPL_INDEX 0 -+#define TX_NORMAL_DESC3_TCPPL_WIDTH 18 -+#define TX_NORMAL_DESC3_TSE_INDEX 18 -+#define TX_NORMAL_DESC3_TSE_WIDTH 1 -+ -+#define TX_NORMAL_DESC2_VLAN_INSERT 0x2 -+ -+/* MDIO undefined or vendor specific registers */ -+#ifndef MDIO_AN_COMP_STAT -+#define MDIO_AN_COMP_STAT 0x0030 -+#endif -+ -+/* Bit setting and getting macros -+ * The get macro will extract the current bit field value from within -+ * the variable -+ * -+ * The set macro will clear the current bit field value within the -+ * variable and then set the bit field of the variable to the -+ * specified value -+ */ -+#define GET_BITS(_var, _index, _width) \ -+ (((_var) >> (_index)) & ((0x1 << (_width)) - 1)) -+ -+#define SET_BITS(_var, _index, _width, _val) \ -+do { \ -+ (_var) &= ~(((0x1 << (_width)) - 1) << (_index)); \ -+ (_var) |= (((_val) & ((0x1 << (_width)) - 1)) << (_index)); \ -+} while (0) -+ -+#define GET_BITS_LE(_var, _index, _width) \ -+ ((le32_to_cpu((_var)) >> (_index)) & ((0x1 << (_width)) - 1)) -+ -+#define SET_BITS_LE(_var, _index, _width, _val) \ -+do { \ -+ (_var) &= cpu_to_le32(~(((0x1 << (_width)) - 1) << (_index))); \ -+ (_var) |= cpu_to_le32((((_val) & \ -+ ((0x1 << (_width)) - 1)) << (_index))); \ -+} while (0) -+ -+/* Bit setting and getting macros based on register fields -+ * The get macro uses the bit field definitions formed using the input -+ * names to extract the current bit field value from within the -+ * variable -+ * -+ * The set macro uses the bit field definitions formed using the input -+ * names to set the bit field of the variable to the specified value -+ */ -+#define XGMAC_GET_BITS(_var, _prefix, _field) \ -+ GET_BITS((_var), \ -+ _prefix##_##_field##_INDEX, \ -+ _prefix##_##_field##_WIDTH) -+ -+#define XGMAC_SET_BITS(_var, _prefix, _field, _val) \ -+ SET_BITS((_var), \ -+ _prefix##_##_field##_INDEX, \ -+ _prefix##_##_field##_WIDTH, (_val)) -+ -+#define XGMAC_GET_BITS_LE(_var, _prefix, _field) \ -+ GET_BITS_LE((_var), \ -+ _prefix##_##_field##_INDEX, \ -+ _prefix##_##_field##_WIDTH) -+ -+#define XGMAC_SET_BITS_LE(_var, _prefix, _field, _val) \ -+ SET_BITS_LE((_var), \ -+ _prefix##_##_field##_INDEX, \ -+ _prefix##_##_field##_WIDTH, (_val)) -+ -+/* Macros for reading or writing registers -+ * The ioread macros will get bit fields or full values using the -+ * register definitions formed using the input names -+ * -+ * The iowrite macros will set bit fields or full values using the -+ * register definitions formed using the input names -+ */ -+#define XGMAC_IOREAD(_pdata, _reg) \ -+ ioread32((_pdata)->xgmac_regs + _reg) -+ -+#define XGMAC_IOREAD_BITS(_pdata, _reg, _field) \ -+ GET_BITS(XGMAC_IOREAD((_pdata), _reg), \ -+ _reg##_##_field##_INDEX, \ -+ _reg##_##_field##_WIDTH) -+ -+#define XGMAC_IOWRITE(_pdata, _reg, _val) \ -+ iowrite32((_val), (_pdata)->xgmac_regs + _reg) -+ -+#define XGMAC_IOWRITE_BITS(_pdata, _reg, _field, _val) \ -+do { \ -+ u32 reg_val = XGMAC_IOREAD((_pdata), _reg); \ -+ SET_BITS(reg_val, \ -+ _reg##_##_field##_INDEX, \ -+ _reg##_##_field##_WIDTH, (_val)); \ -+ XGMAC_IOWRITE((_pdata), _reg, reg_val); \ -+} while (0) -+ -+/* Macros for reading or writing MTL queue or traffic class registers -+ * Similar to the standard read and write macros except that the -+ * base register value is calculated by the queue or traffic class number -+ */ -+#define XGMAC_MTL_IOREAD(_pdata, _n, _reg) \ -+ ioread32((_pdata)->xgmac_regs + \ -+ MTL_Q_BASE + ((_n) * MTL_Q_INC) + _reg) -+ -+#define XGMAC_MTL_IOREAD_BITS(_pdata, _n, _reg, _field) \ -+ GET_BITS(XGMAC_MTL_IOREAD((_pdata), (_n), _reg), \ -+ _reg##_##_field##_INDEX, \ -+ _reg##_##_field##_WIDTH) -+ -+#define XGMAC_MTL_IOWRITE(_pdata, _n, _reg, _val) \ -+ iowrite32((_val), (_pdata)->xgmac_regs + \ -+ MTL_Q_BASE + ((_n) * MTL_Q_INC) + _reg) -+ -+#define XGMAC_MTL_IOWRITE_BITS(_pdata, _n, _reg, _field, _val) \ -+do { \ -+ u32 reg_val = XGMAC_MTL_IOREAD((_pdata), (_n), _reg); \ -+ SET_BITS(reg_val, \ -+ _reg##_##_field##_INDEX, \ -+ _reg##_##_field##_WIDTH, (_val)); \ -+ XGMAC_MTL_IOWRITE((_pdata), (_n), _reg, reg_val); \ -+} while (0) -+ -+/* Macros for reading or writing DMA channel registers -+ * Similar to the standard read and write macros except that the -+ * base register value is obtained from the ring -+ */ -+#define XGMAC_DMA_IOREAD(_channel, _reg) \ -+ ioread32((_channel)->dma_regs + _reg) -+ -+#define XGMAC_DMA_IOREAD_BITS(_channel, _reg, _field) \ -+ GET_BITS(XGMAC_DMA_IOREAD((_channel), _reg), \ -+ _reg##_##_field##_INDEX, \ -+ _reg##_##_field##_WIDTH) -+ -+#define XGMAC_DMA_IOWRITE(_channel, _reg, _val) \ -+ iowrite32((_val), (_channel)->dma_regs + _reg) -+ -+#define XGMAC_DMA_IOWRITE_BITS(_channel, _reg, _field, _val) \ -+do { \ -+ u32 reg_val = XGMAC_DMA_IOREAD((_channel), _reg); \ -+ SET_BITS(reg_val, \ -+ _reg##_##_field##_INDEX, \ -+ _reg##_##_field##_WIDTH, (_val)); \ -+ XGMAC_DMA_IOWRITE((_channel), _reg, reg_val); \ -+} while (0) -+ -+/* Macros for building, reading or writing register values or bits -+ * within the register values of XPCS registers. -+ */ -+#define XPCS_IOWRITE(_pdata, _off, _val) \ -+ iowrite32(_val, (_pdata)->xpcs_regs + (_off)) -+ -+#define XPCS_IOREAD(_pdata, _off) \ -+ ioread32((_pdata)->xpcs_regs + (_off)) -+ -+/* Macros for building, reading or writing register values or bits -+ * using MDIO. Different from above because of the use of standardized -+ * Linux include values. No shifting is performed with the bit -+ * operations, everything works on mask values. -+ */ -+#define XMDIO_READ(_pdata, _mmd, _reg) \ -+ ((_pdata)->hw_if.read_mmd_regs((_pdata), 0, \ -+ MII_ADDR_C45 | (_mmd << 16) | ((_reg) & 0xffff))) -+ -+#define XMDIO_READ_BITS(_pdata, _mmd, _reg, _mask) \ -+ (XMDIO_READ((_pdata), _mmd, _reg) & _mask) -+ -+#define XMDIO_WRITE(_pdata, _mmd, _reg, _val) \ -+ ((_pdata)->hw_if.write_mmd_regs((_pdata), 0, \ -+ MII_ADDR_C45 | (_mmd << 16) | ((_reg) & 0xffff), (_val))) -+ -+#define XMDIO_WRITE_BITS(_pdata, _mmd, _reg, _mask, _val) \ -+do { \ -+ u32 mmd_val = XMDIO_READ((_pdata), _mmd, _reg); \ -+ mmd_val &= ~_mask; \ -+ mmd_val |= (_val); \ -+ XMDIO_WRITE((_pdata), _mmd, _reg, mmd_val); \ -+} while (0) -+ -+#endif -diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-dcb.c b/drivers/net/ethernet/amd/xgbe-a0/xgbe-dcb.c -new file mode 100644 -index 0000000..343301c ---- /dev/null -+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-dcb.c -@@ -0,0 +1,269 @@ -+/* -+ * AMD 10Gb Ethernet driver -+ * -+ * This file is available to you under your choice of the following two -+ * licenses: -+ * -+ * License 1: GPLv2 -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * -+ * This file is free software; you may copy, redistribute and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation, either version 2 of the License, or (at -+ * your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program. If not, see . -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * -+ * License 2: Modified BSD -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions are met: -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * * Neither the name of Advanced Micro Devices, Inc. nor the -+ * names of its contributors may be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY -+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+#include -+#include -+ -+#include "xgbe.h" -+#include "xgbe-common.h" -+ -+static int xgbe_dcb_ieee_getets(struct net_device *netdev, -+ struct ieee_ets *ets) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ -+ /* Set number of supported traffic classes */ -+ ets->ets_cap = pdata->hw_feat.tc_cnt; -+ -+ if (pdata->ets) { -+ ets->cbs = pdata->ets->cbs; -+ memcpy(ets->tc_tx_bw, pdata->ets->tc_tx_bw, -+ sizeof(ets->tc_tx_bw)); -+ memcpy(ets->tc_tsa, pdata->ets->tc_tsa, -+ sizeof(ets->tc_tsa)); -+ memcpy(ets->prio_tc, pdata->ets->prio_tc, -+ sizeof(ets->prio_tc)); -+ } -+ -+ return 0; -+} -+ -+static int xgbe_dcb_ieee_setets(struct net_device *netdev, -+ struct ieee_ets *ets) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ unsigned int i, tc_ets, tc_ets_weight; -+ -+ tc_ets = 0; -+ tc_ets_weight = 0; -+ for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { -+ DBGPR(" TC%u: tx_bw=%hhu, rx_bw=%hhu, tsa=%hhu\n", i, -+ ets->tc_tx_bw[i], ets->tc_rx_bw[i], ets->tc_tsa[i]); -+ DBGPR(" PRIO%u: TC=%hhu\n", i, ets->prio_tc[i]); -+ -+ if ((ets->tc_tx_bw[i] || ets->tc_tsa[i]) && -+ (i >= pdata->hw_feat.tc_cnt)) -+ return -EINVAL; -+ -+ if (ets->prio_tc[i] >= pdata->hw_feat.tc_cnt) -+ return -EINVAL; -+ -+ switch (ets->tc_tsa[i]) { -+ case IEEE_8021QAZ_TSA_STRICT: -+ break; -+ case IEEE_8021QAZ_TSA_ETS: -+ tc_ets = 1; -+ tc_ets_weight += ets->tc_tx_bw[i]; -+ break; -+ -+ default: -+ return -EINVAL; -+ } -+ } -+ -+ /* Weights must add up to 100% */ -+ if (tc_ets && (tc_ets_weight != 100)) -+ return -EINVAL; -+ -+ if (!pdata->ets) { -+ pdata->ets = devm_kzalloc(pdata->dev, sizeof(*pdata->ets), -+ GFP_KERNEL); -+ if (!pdata->ets) -+ return -ENOMEM; -+ } -+ -+ memcpy(pdata->ets, ets, sizeof(*pdata->ets)); -+ -+ pdata->hw_if.config_dcb_tc(pdata); -+ -+ return 0; -+} -+ -+static int xgbe_dcb_ieee_getpfc(struct net_device *netdev, -+ struct ieee_pfc *pfc) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ -+ /* Set number of supported PFC traffic classes */ -+ pfc->pfc_cap = pdata->hw_feat.tc_cnt; -+ -+ if (pdata->pfc) { -+ pfc->pfc_en = pdata->pfc->pfc_en; -+ pfc->mbc = pdata->pfc->mbc; -+ pfc->delay = pdata->pfc->delay; -+ } -+ -+ return 0; -+} -+ -+static int xgbe_dcb_ieee_setpfc(struct net_device *netdev, -+ struct ieee_pfc *pfc) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ -+ DBGPR(" cap=%hhu, en=%hhx, mbc=%hhu, delay=%hhu\n", -+ pfc->pfc_cap, pfc->pfc_en, pfc->mbc, pfc->delay); -+ -+ if (!pdata->pfc) { -+ pdata->pfc = devm_kzalloc(pdata->dev, sizeof(*pdata->pfc), -+ GFP_KERNEL); -+ if (!pdata->pfc) -+ return -ENOMEM; -+ } -+ -+ memcpy(pdata->pfc, pfc, sizeof(*pdata->pfc)); -+ -+ pdata->hw_if.config_dcb_pfc(pdata); -+ -+ return 0; -+} -+ -+static u8 xgbe_dcb_getdcbx(struct net_device *netdev) -+{ -+ return DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE; -+} -+ -+static u8 xgbe_dcb_setdcbx(struct net_device *netdev, u8 dcbx) -+{ -+ u8 support = xgbe_dcb_getdcbx(netdev); -+ -+ DBGPR(" DCBX=%#hhx\n", dcbx); -+ -+ if (dcbx & ~support) -+ return 1; -+ -+ if ((dcbx & support) != support) -+ return 1; -+ -+ return 0; -+} -+ -+static const struct dcbnl_rtnl_ops xgbe_dcbnl_ops = { -+ /* IEEE 802.1Qaz std */ -+ .ieee_getets = xgbe_dcb_ieee_getets, -+ .ieee_setets = xgbe_dcb_ieee_setets, -+ .ieee_getpfc = xgbe_dcb_ieee_getpfc, -+ .ieee_setpfc = xgbe_dcb_ieee_setpfc, -+ -+ /* DCBX configuration */ -+ .getdcbx = xgbe_dcb_getdcbx, -+ .setdcbx = xgbe_dcb_setdcbx, -+}; -+ -+const struct dcbnl_rtnl_ops *xgbe_a0_get_dcbnl_ops(void) -+{ -+ return &xgbe_dcbnl_ops; -+} -diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-debugfs.c b/drivers/net/ethernet/amd/xgbe-a0/xgbe-debugfs.c -new file mode 100644 -index 0000000..ecfa6f9 ---- /dev/null -+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-debugfs.c -@@ -0,0 +1,373 @@ -+/* -+ * AMD 10Gb Ethernet driver -+ * -+ * This file is available to you under your choice of the following two -+ * licenses: -+ * -+ * License 1: GPLv2 -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * -+ * This file is free software; you may copy, redistribute and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation, either version 2 of the License, or (at -+ * your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program. If not, see . -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * -+ * License 2: Modified BSD -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions are met: -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * * Neither the name of Advanced Micro Devices, Inc. nor the -+ * names of its contributors may be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY -+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+#include -+#include -+#include -+ -+#include "xgbe.h" -+#include "xgbe-common.h" -+ -+static ssize_t xgbe_common_read(char __user *buffer, size_t count, -+ loff_t *ppos, unsigned int value) -+{ -+ char *buf; -+ ssize_t len; -+ -+ if (*ppos != 0) -+ return 0; -+ -+ buf = kasprintf(GFP_KERNEL, "0x%08x\n", value); -+ if (!buf) -+ return -ENOMEM; -+ -+ if (count < strlen(buf)) { -+ kfree(buf); -+ return -ENOSPC; -+ } -+ -+ len = simple_read_from_buffer(buffer, count, ppos, buf, strlen(buf)); -+ kfree(buf); -+ -+ return len; -+} -+ -+static ssize_t xgbe_common_write(const char __user *buffer, size_t count, -+ loff_t *ppos, unsigned int *value) -+{ -+ char workarea[32]; -+ ssize_t len; -+ int ret; -+ -+ if (*ppos != 0) -+ return 0; -+ -+ if (count >= sizeof(workarea)) -+ return -ENOSPC; -+ -+ len = simple_write_to_buffer(workarea, sizeof(workarea) - 1, ppos, -+ buffer, count); -+ if (len < 0) -+ return len; -+ -+ workarea[len] = '\0'; -+ ret = kstrtouint(workarea, 16, value); -+ if (ret) -+ return -EIO; -+ -+ return len; -+} -+ -+static ssize_t xgmac_reg_addr_read(struct file *filp, char __user *buffer, -+ size_t count, loff_t *ppos) -+{ -+ struct xgbe_prv_data *pdata = filp->private_data; -+ -+ return xgbe_common_read(buffer, count, ppos, pdata->debugfs_xgmac_reg); -+} -+ -+static ssize_t xgmac_reg_addr_write(struct file *filp, -+ const char __user *buffer, -+ size_t count, loff_t *ppos) -+{ -+ struct xgbe_prv_data *pdata = filp->private_data; -+ -+ return xgbe_common_write(buffer, count, ppos, -+ &pdata->debugfs_xgmac_reg); -+} -+ -+static ssize_t xgmac_reg_value_read(struct file *filp, char __user *buffer, -+ size_t count, loff_t *ppos) -+{ -+ struct xgbe_prv_data *pdata = filp->private_data; -+ unsigned int value; -+ -+ value = XGMAC_IOREAD(pdata, pdata->debugfs_xgmac_reg); -+ -+ return xgbe_common_read(buffer, count, ppos, value); -+} -+ -+static ssize_t xgmac_reg_value_write(struct file *filp, -+ const char __user *buffer, -+ size_t count, loff_t *ppos) -+{ -+ struct xgbe_prv_data *pdata = filp->private_data; -+ unsigned int value; -+ ssize_t len; -+ -+ len = xgbe_common_write(buffer, count, ppos, &value); -+ if (len < 0) -+ return len; -+ -+ XGMAC_IOWRITE(pdata, pdata->debugfs_xgmac_reg, value); -+ -+ return len; -+} -+ -+static const struct file_operations xgmac_reg_addr_fops = { -+ .owner = THIS_MODULE, -+ .open = simple_open, -+ .read = xgmac_reg_addr_read, -+ .write = xgmac_reg_addr_write, -+}; -+ -+static const struct file_operations xgmac_reg_value_fops = { -+ .owner = THIS_MODULE, -+ .open = simple_open, -+ .read = xgmac_reg_value_read, -+ .write = xgmac_reg_value_write, -+}; -+ -+static ssize_t xpcs_mmd_read(struct file *filp, char __user *buffer, -+ size_t count, loff_t *ppos) -+{ -+ struct xgbe_prv_data *pdata = filp->private_data; -+ -+ return xgbe_common_read(buffer, count, ppos, pdata->debugfs_xpcs_mmd); -+} -+ -+static ssize_t xpcs_mmd_write(struct file *filp, const char __user *buffer, -+ size_t count, loff_t *ppos) -+{ -+ struct xgbe_prv_data *pdata = filp->private_data; -+ -+ return xgbe_common_write(buffer, count, ppos, -+ &pdata->debugfs_xpcs_mmd); -+} -+ -+static ssize_t xpcs_reg_addr_read(struct file *filp, char __user *buffer, -+ size_t count, loff_t *ppos) -+{ -+ struct xgbe_prv_data *pdata = filp->private_data; -+ -+ return xgbe_common_read(buffer, count, ppos, pdata->debugfs_xpcs_reg); -+} -+ -+static ssize_t xpcs_reg_addr_write(struct file *filp, const char __user *buffer, -+ size_t count, loff_t *ppos) -+{ -+ struct xgbe_prv_data *pdata = filp->private_data; -+ -+ return xgbe_common_write(buffer, count, ppos, -+ &pdata->debugfs_xpcs_reg); -+} -+ -+static ssize_t xpcs_reg_value_read(struct file *filp, char __user *buffer, -+ size_t count, loff_t *ppos) -+{ -+ struct xgbe_prv_data *pdata = filp->private_data; -+ unsigned int value; -+ -+ value = XMDIO_READ(pdata, pdata->debugfs_xpcs_mmd, -+ pdata->debugfs_xpcs_reg); -+ -+ return xgbe_common_read(buffer, count, ppos, value); -+} -+ -+static ssize_t xpcs_reg_value_write(struct file *filp, -+ const char __user *buffer, -+ size_t count, loff_t *ppos) -+{ -+ struct xgbe_prv_data *pdata = filp->private_data; -+ unsigned int value; -+ ssize_t len; -+ -+ len = xgbe_common_write(buffer, count, ppos, &value); -+ if (len < 0) -+ return len; -+ -+ XMDIO_WRITE(pdata, pdata->debugfs_xpcs_mmd, pdata->debugfs_xpcs_reg, -+ value); -+ -+ return len; -+} -+ -+static const struct file_operations xpcs_mmd_fops = { -+ .owner = THIS_MODULE, -+ .open = simple_open, -+ .read = xpcs_mmd_read, -+ .write = xpcs_mmd_write, -+}; -+ -+static const struct file_operations xpcs_reg_addr_fops = { -+ .owner = THIS_MODULE, -+ .open = simple_open, -+ .read = xpcs_reg_addr_read, -+ .write = xpcs_reg_addr_write, -+}; -+ -+static const struct file_operations xpcs_reg_value_fops = { -+ .owner = THIS_MODULE, -+ .open = simple_open, -+ .read = xpcs_reg_value_read, -+ .write = xpcs_reg_value_write, -+}; -+ -+void xgbe_a0_debugfs_init(struct xgbe_prv_data *pdata) -+{ -+ struct dentry *pfile; -+ char *buf; -+ -+ /* Set defaults */ -+ pdata->debugfs_xgmac_reg = 0; -+ pdata->debugfs_xpcs_mmd = 1; -+ pdata->debugfs_xpcs_reg = 0; -+ -+ buf = kasprintf(GFP_KERNEL, "amd-xgbe-a0-%s", pdata->netdev->name); -+ pdata->xgbe_debugfs = debugfs_create_dir(buf, NULL); -+ if (!pdata->xgbe_debugfs) { -+ netdev_err(pdata->netdev, "debugfs_create_dir failed\n"); -+ return; -+ } -+ -+ pfile = debugfs_create_file("xgmac_register", 0600, -+ pdata->xgbe_debugfs, pdata, -+ &xgmac_reg_addr_fops); -+ if (!pfile) -+ netdev_err(pdata->netdev, "debugfs_create_file failed\n"); -+ -+ pfile = debugfs_create_file("xgmac_register_value", 0600, -+ pdata->xgbe_debugfs, pdata, -+ &xgmac_reg_value_fops); -+ if (!pfile) -+ netdev_err(pdata->netdev, "debugfs_create_file failed\n"); -+ -+ pfile = debugfs_create_file("xpcs_mmd", 0600, -+ pdata->xgbe_debugfs, pdata, -+ &xpcs_mmd_fops); -+ if (!pfile) -+ netdev_err(pdata->netdev, "debugfs_create_file failed\n"); -+ -+ pfile = debugfs_create_file("xpcs_register", 0600, -+ pdata->xgbe_debugfs, pdata, -+ &xpcs_reg_addr_fops); -+ if (!pfile) -+ netdev_err(pdata->netdev, "debugfs_create_file failed\n"); -+ -+ pfile = debugfs_create_file("xpcs_register_value", 0600, -+ pdata->xgbe_debugfs, pdata, -+ &xpcs_reg_value_fops); -+ if (!pfile) -+ netdev_err(pdata->netdev, "debugfs_create_file failed\n"); -+ -+ kfree(buf); -+} -+ -+void xgbe_a0_debugfs_exit(struct xgbe_prv_data *pdata) -+{ -+ debugfs_remove_recursive(pdata->xgbe_debugfs); -+ pdata->xgbe_debugfs = NULL; -+} -diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-desc.c b/drivers/net/ethernet/amd/xgbe-a0/xgbe-desc.c -new file mode 100644 -index 0000000..5dd5777 ---- /dev/null -+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-desc.c -@@ -0,0 +1,636 @@ -+/* -+ * AMD 10Gb Ethernet driver -+ * -+ * This file is available to you under your choice of the following two -+ * licenses: -+ * -+ * License 1: GPLv2 -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * -+ * This file is free software; you may copy, redistribute and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation, either version 2 of the License, or (at -+ * your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program. If not, see . -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * -+ * License 2: Modified BSD -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions are met: -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * * Neither the name of Advanced Micro Devices, Inc. nor the -+ * names of its contributors may be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY -+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+#include "xgbe.h" -+#include "xgbe-common.h" -+ -+static void xgbe_unmap_rdata(struct xgbe_prv_data *, struct xgbe_ring_data *); -+ -+static void xgbe_free_ring(struct xgbe_prv_data *pdata, -+ struct xgbe_ring *ring) -+{ -+ struct xgbe_ring_data *rdata; -+ unsigned int i; -+ -+ if (!ring) -+ return; -+ -+ if (ring->rdata) { -+ for (i = 0; i < ring->rdesc_count; i++) { -+ rdata = XGBE_GET_DESC_DATA(ring, i); -+ xgbe_unmap_rdata(pdata, rdata); -+ } -+ -+ kfree(ring->rdata); -+ ring->rdata = NULL; -+ } -+ -+ if (ring->rx_hdr_pa.pages) { -+ dma_unmap_page(pdata->dev, ring->rx_hdr_pa.pages_dma, -+ ring->rx_hdr_pa.pages_len, DMA_FROM_DEVICE); -+ put_page(ring->rx_hdr_pa.pages); -+ -+ ring->rx_hdr_pa.pages = NULL; -+ ring->rx_hdr_pa.pages_len = 0; -+ ring->rx_hdr_pa.pages_offset = 0; -+ ring->rx_hdr_pa.pages_dma = 0; -+ } -+ -+ if (ring->rx_buf_pa.pages) { -+ dma_unmap_page(pdata->dev, ring->rx_buf_pa.pages_dma, -+ ring->rx_buf_pa.pages_len, DMA_FROM_DEVICE); -+ put_page(ring->rx_buf_pa.pages); -+ -+ ring->rx_buf_pa.pages = NULL; -+ ring->rx_buf_pa.pages_len = 0; -+ ring->rx_buf_pa.pages_offset = 0; -+ ring->rx_buf_pa.pages_dma = 0; -+ } -+ -+ if (ring->rdesc) { -+ dma_free_coherent(pdata->dev, -+ (sizeof(struct xgbe_ring_desc) * -+ ring->rdesc_count), -+ ring->rdesc, ring->rdesc_dma); -+ ring->rdesc = NULL; -+ } -+} -+ -+static void xgbe_free_ring_resources(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ DBGPR("-->xgbe_free_ring_resources\n"); -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ xgbe_free_ring(pdata, channel->tx_ring); -+ xgbe_free_ring(pdata, channel->rx_ring); -+ } -+ -+ DBGPR("<--xgbe_free_ring_resources\n"); -+} -+ -+static int xgbe_init_ring(struct xgbe_prv_data *pdata, -+ struct xgbe_ring *ring, unsigned int rdesc_count) -+{ -+ DBGPR("-->xgbe_init_ring\n"); -+ -+ if (!ring) -+ return 0; -+ -+ /* Descriptors */ -+ ring->rdesc_count = rdesc_count; -+ ring->rdesc = dma_alloc_coherent(pdata->dev, -+ (sizeof(struct xgbe_ring_desc) * -+ rdesc_count), &ring->rdesc_dma, -+ GFP_KERNEL); -+ if (!ring->rdesc) -+ return -ENOMEM; -+ -+ /* Descriptor information */ -+ ring->rdata = kcalloc(rdesc_count, sizeof(struct xgbe_ring_data), -+ GFP_KERNEL); -+ if (!ring->rdata) -+ return -ENOMEM; -+ -+ DBGPR(" rdesc=0x%p, rdesc_dma=0x%llx, rdata=0x%p\n", -+ ring->rdesc, ring->rdesc_dma, ring->rdata); -+ -+ DBGPR("<--xgbe_init_ring\n"); -+ -+ return 0; -+} -+ -+static int xgbe_alloc_ring_resources(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ int ret; -+ -+ DBGPR("-->xgbe_alloc_ring_resources\n"); -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ DBGPR(" %s - tx_ring:\n", channel->name); -+ ret = xgbe_init_ring(pdata, channel->tx_ring, -+ pdata->tx_desc_count); -+ if (ret) { -+ netdev_alert(pdata->netdev, -+ "error initializing Tx ring\n"); -+ goto err_ring; -+ } -+ -+ DBGPR(" %s - rx_ring:\n", channel->name); -+ ret = xgbe_init_ring(pdata, channel->rx_ring, -+ pdata->rx_desc_count); -+ if (ret) { -+ netdev_alert(pdata->netdev, -+ "error initializing Tx ring\n"); -+ goto err_ring; -+ } -+ } -+ -+ DBGPR("<--xgbe_alloc_ring_resources\n"); -+ -+ return 0; -+ -+err_ring: -+ xgbe_free_ring_resources(pdata); -+ -+ return ret; -+} -+ -+static int xgbe_alloc_pages(struct xgbe_prv_data *pdata, -+ struct xgbe_page_alloc *pa, gfp_t gfp, int order) -+{ -+ struct page *pages = NULL; -+ dma_addr_t pages_dma; -+ int ret; -+ -+ /* Try to obtain pages, decreasing order if necessary */ -+ gfp |= __GFP_COLD | __GFP_COMP; -+ while (order >= 0) { -+ pages = alloc_pages(gfp, order); -+ if (pages) -+ break; -+ -+ order--; -+ } -+ if (!pages) -+ return -ENOMEM; -+ -+ /* Map the pages */ -+ pages_dma = dma_map_page(pdata->dev, pages, 0, -+ PAGE_SIZE << order, DMA_FROM_DEVICE); -+ ret = dma_mapping_error(pdata->dev, pages_dma); -+ if (ret) { -+ put_page(pages); -+ return ret; -+ } -+ -+ pa->pages = pages; -+ pa->pages_len = PAGE_SIZE << order; -+ pa->pages_offset = 0; -+ pa->pages_dma = pages_dma; -+ -+ return 0; -+} -+ -+static void xgbe_set_buffer_data(struct xgbe_buffer_data *bd, -+ struct xgbe_page_alloc *pa, -+ unsigned int len) -+{ -+ get_page(pa->pages); -+ bd->pa = *pa; -+ -+ bd->dma = pa->pages_dma + pa->pages_offset; -+ bd->dma_len = len; -+ -+ pa->pages_offset += len; -+ if ((pa->pages_offset + len) > pa->pages_len) { -+ /* This data descriptor is responsible for unmapping page(s) */ -+ bd->pa_unmap = *pa; -+ -+ /* Get a new allocation next time */ -+ pa->pages = NULL; -+ pa->pages_len = 0; -+ pa->pages_offset = 0; -+ pa->pages_dma = 0; -+ } -+} -+ -+static int xgbe_map_rx_buffer(struct xgbe_prv_data *pdata, -+ struct xgbe_ring *ring, -+ struct xgbe_ring_data *rdata) -+{ -+ int order, ret; -+ -+ if (!ring->rx_hdr_pa.pages) { -+ ret = xgbe_alloc_pages(pdata, &ring->rx_hdr_pa, GFP_ATOMIC, 0); -+ if (ret) -+ return ret; -+ } -+ -+ if (!ring->rx_buf_pa.pages) { -+ order = max_t(int, PAGE_ALLOC_COSTLY_ORDER - 1, 0); -+ ret = xgbe_alloc_pages(pdata, &ring->rx_buf_pa, GFP_ATOMIC, -+ order); -+ if (ret) -+ return ret; -+ } -+ -+ /* Set up the header page info */ -+ xgbe_set_buffer_data(&rdata->rx.hdr, &ring->rx_hdr_pa, -+ XGBE_SKB_ALLOC_SIZE); -+ -+ /* Set up the buffer page info */ -+ xgbe_set_buffer_data(&rdata->rx.buf, &ring->rx_buf_pa, -+ pdata->rx_buf_size); -+ -+ return 0; -+} -+ -+static void xgbe_wrapper_tx_descriptor_init(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ struct xgbe_channel *channel; -+ struct xgbe_ring *ring; -+ struct xgbe_ring_data *rdata; -+ struct xgbe_ring_desc *rdesc; -+ dma_addr_t rdesc_dma; -+ unsigned int i, j; -+ -+ DBGPR("-->xgbe_wrapper_tx_descriptor_init\n"); -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ ring = channel->tx_ring; -+ if (!ring) -+ break; -+ -+ rdesc = ring->rdesc; -+ rdesc_dma = ring->rdesc_dma; -+ -+ for (j = 0; j < ring->rdesc_count; j++) { -+ rdata = XGBE_GET_DESC_DATA(ring, j); -+ -+ rdata->rdesc = rdesc; -+ rdata->rdesc_dma = rdesc_dma; -+ -+ rdesc++; -+ rdesc_dma += sizeof(struct xgbe_ring_desc); -+ } -+ -+ ring->cur = 0; -+ ring->dirty = 0; -+ memset(&ring->tx, 0, sizeof(ring->tx)); -+ -+ hw_if->tx_desc_init(channel); -+ } -+ -+ DBGPR("<--xgbe_wrapper_tx_descriptor_init\n"); -+} -+ -+static void xgbe_wrapper_rx_descriptor_init(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ struct xgbe_channel *channel; -+ struct xgbe_ring *ring; -+ struct xgbe_ring_desc *rdesc; -+ struct xgbe_ring_data *rdata; -+ dma_addr_t rdesc_dma; -+ unsigned int i, j; -+ -+ DBGPR("-->xgbe_wrapper_rx_descriptor_init\n"); -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ ring = channel->rx_ring; -+ if (!ring) -+ break; -+ -+ rdesc = ring->rdesc; -+ rdesc_dma = ring->rdesc_dma; -+ -+ for (j = 0; j < ring->rdesc_count; j++) { -+ rdata = XGBE_GET_DESC_DATA(ring, j); -+ -+ rdata->rdesc = rdesc; -+ rdata->rdesc_dma = rdesc_dma; -+ -+ if (xgbe_map_rx_buffer(pdata, ring, rdata)) -+ break; -+ -+ rdesc++; -+ rdesc_dma += sizeof(struct xgbe_ring_desc); -+ } -+ -+ ring->cur = 0; -+ ring->dirty = 0; -+ -+ hw_if->rx_desc_init(channel); -+ } -+ -+ DBGPR("<--xgbe_wrapper_rx_descriptor_init\n"); -+} -+ -+static void xgbe_unmap_rdata(struct xgbe_prv_data *pdata, -+ struct xgbe_ring_data *rdata) -+{ -+ if (rdata->skb_dma) { -+ if (rdata->mapped_as_page) { -+ dma_unmap_page(pdata->dev, rdata->skb_dma, -+ rdata->skb_dma_len, DMA_TO_DEVICE); -+ } else { -+ dma_unmap_single(pdata->dev, rdata->skb_dma, -+ rdata->skb_dma_len, DMA_TO_DEVICE); -+ } -+ rdata->skb_dma = 0; -+ rdata->skb_dma_len = 0; -+ } -+ -+ if (rdata->skb) { -+ dev_kfree_skb_any(rdata->skb); -+ rdata->skb = NULL; -+ } -+ -+ if (rdata->rx.hdr.pa.pages) -+ put_page(rdata->rx.hdr.pa.pages); -+ -+ if (rdata->rx.hdr.pa_unmap.pages) { -+ dma_unmap_page(pdata->dev, rdata->rx.hdr.pa_unmap.pages_dma, -+ rdata->rx.hdr.pa_unmap.pages_len, -+ DMA_FROM_DEVICE); -+ put_page(rdata->rx.hdr.pa_unmap.pages); -+ } -+ -+ if (rdata->rx.buf.pa.pages) -+ put_page(rdata->rx.buf.pa.pages); -+ -+ if (rdata->rx.buf.pa_unmap.pages) { -+ dma_unmap_page(pdata->dev, rdata->rx.buf.pa_unmap.pages_dma, -+ rdata->rx.buf.pa_unmap.pages_len, -+ DMA_FROM_DEVICE); -+ put_page(rdata->rx.buf.pa_unmap.pages); -+ } -+ -+ memset(&rdata->tx, 0, sizeof(rdata->tx)); -+ memset(&rdata->rx, 0, sizeof(rdata->rx)); -+ -+ rdata->mapped_as_page = 0; -+ -+ if (rdata->state_saved) { -+ rdata->state_saved = 0; -+ rdata->state.incomplete = 0; -+ rdata->state.context_next = 0; -+ rdata->state.skb = NULL; -+ rdata->state.len = 0; -+ rdata->state.error = 0; -+ } -+} -+ -+static int xgbe_map_tx_skb(struct xgbe_channel *channel, struct sk_buff *skb) -+{ -+ struct xgbe_prv_data *pdata = channel->pdata; -+ struct xgbe_ring *ring = channel->tx_ring; -+ struct xgbe_ring_data *rdata; -+ struct xgbe_packet_data *packet; -+ struct skb_frag_struct *frag; -+ dma_addr_t skb_dma; -+ unsigned int start_index, cur_index; -+ unsigned int offset, tso, vlan, datalen, len; -+ unsigned int i; -+ -+ DBGPR("-->xgbe_map_tx_skb: cur = %d\n", ring->cur); -+ -+ offset = 0; -+ start_index = ring->cur; -+ cur_index = ring->cur; -+ -+ packet = &ring->packet_data; -+ packet->rdesc_count = 0; -+ packet->length = 0; -+ -+ tso = XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, -+ TSO_ENABLE); -+ vlan = XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, -+ VLAN_CTAG); -+ -+ /* Save space for a context descriptor if needed */ -+ if ((tso && (packet->mss != ring->tx.cur_mss)) || -+ (vlan && (packet->vlan_ctag != ring->tx.cur_vlan_ctag))) -+ cur_index++; -+ rdata = XGBE_GET_DESC_DATA(ring, cur_index); -+ -+ if (tso) { -+ DBGPR(" TSO packet\n"); -+ -+ /* Map the TSO header */ -+ skb_dma = dma_map_single(pdata->dev, skb->data, -+ packet->header_len, DMA_TO_DEVICE); -+ if (dma_mapping_error(pdata->dev, skb_dma)) { -+ netdev_alert(pdata->netdev, "dma_map_single failed\n"); -+ goto err_out; -+ } -+ rdata->skb_dma = skb_dma; -+ rdata->skb_dma_len = packet->header_len; -+ -+ offset = packet->header_len; -+ -+ packet->length += packet->header_len; -+ -+ cur_index++; -+ rdata = XGBE_GET_DESC_DATA(ring, cur_index); -+ } -+ -+ /* Map the (remainder of the) packet */ -+ for (datalen = skb_headlen(skb) - offset; datalen; ) { -+ len = min_t(unsigned int, datalen, XGBE_TX_MAX_BUF_SIZE); -+ -+ skb_dma = dma_map_single(pdata->dev, skb->data + offset, len, -+ DMA_TO_DEVICE); -+ if (dma_mapping_error(pdata->dev, skb_dma)) { -+ netdev_alert(pdata->netdev, "dma_map_single failed\n"); -+ goto err_out; -+ } -+ rdata->skb_dma = skb_dma; -+ rdata->skb_dma_len = len; -+ DBGPR(" skb data: index=%u, dma=0x%llx, len=%u\n", -+ cur_index, skb_dma, len); -+ -+ datalen -= len; -+ offset += len; -+ -+ packet->length += len; -+ -+ cur_index++; -+ rdata = XGBE_GET_DESC_DATA(ring, cur_index); -+ } -+ -+ for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { -+ DBGPR(" mapping frag %u\n", i); -+ -+ frag = &skb_shinfo(skb)->frags[i]; -+ offset = 0; -+ -+ for (datalen = skb_frag_size(frag); datalen; ) { -+ len = min_t(unsigned int, datalen, -+ XGBE_TX_MAX_BUF_SIZE); -+ -+ skb_dma = skb_frag_dma_map(pdata->dev, frag, offset, -+ len, DMA_TO_DEVICE); -+ if (dma_mapping_error(pdata->dev, skb_dma)) { -+ netdev_alert(pdata->netdev, -+ "skb_frag_dma_map failed\n"); -+ goto err_out; -+ } -+ rdata->skb_dma = skb_dma; -+ rdata->skb_dma_len = len; -+ rdata->mapped_as_page = 1; -+ DBGPR(" skb data: index=%u, dma=0x%llx, len=%u\n", -+ cur_index, skb_dma, len); -+ -+ datalen -= len; -+ offset += len; -+ -+ packet->length += len; -+ -+ cur_index++; -+ rdata = XGBE_GET_DESC_DATA(ring, cur_index); -+ } -+ } -+ -+ /* Save the skb address in the last entry. We always have some data -+ * that has been mapped so rdata is always advanced past the last -+ * piece of mapped data - use the entry pointed to by cur_index - 1. -+ */ -+ rdata = XGBE_GET_DESC_DATA(ring, cur_index - 1); -+ rdata->skb = skb; -+ -+ /* Save the number of descriptor entries used */ -+ packet->rdesc_count = cur_index - start_index; -+ -+ DBGPR("<--xgbe_map_tx_skb: count=%u\n", packet->rdesc_count); -+ -+ return packet->rdesc_count; -+ -+err_out: -+ while (start_index < cur_index) { -+ rdata = XGBE_GET_DESC_DATA(ring, start_index++); -+ xgbe_unmap_rdata(pdata, rdata); -+ } -+ -+ DBGPR("<--xgbe_map_tx_skb: count=0\n"); -+ -+ return 0; -+} -+ -+void xgbe_a0_init_function_ptrs_desc(struct xgbe_desc_if *desc_if) -+{ -+ DBGPR("-->xgbe_a0_init_function_ptrs_desc\n"); -+ -+ desc_if->alloc_ring_resources = xgbe_alloc_ring_resources; -+ desc_if->free_ring_resources = xgbe_free_ring_resources; -+ desc_if->map_tx_skb = xgbe_map_tx_skb; -+ desc_if->map_rx_buffer = xgbe_map_rx_buffer; -+ desc_if->unmap_rdata = xgbe_unmap_rdata; -+ desc_if->wrapper_tx_desc_init = xgbe_wrapper_tx_descriptor_init; -+ desc_if->wrapper_rx_desc_init = xgbe_wrapper_rx_descriptor_init; -+ -+ DBGPR("<--xgbe_a0_init_function_ptrs_desc\n"); -+} -diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-dev.c b/drivers/net/ethernet/amd/xgbe-a0/xgbe-dev.c -new file mode 100644 -index 0000000..2d88739 ---- /dev/null -+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-dev.c -@@ -0,0 +1,2930 @@ -+/* -+ * AMD 10Gb Ethernet driver -+ * -+ * This file is available to you under your choice of the following two -+ * licenses: -+ * -+ * License 1: GPLv2 -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * -+ * This file is free software; you may copy, redistribute and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation, either version 2 of the License, or (at -+ * your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program. If not, see . -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * -+ * License 2: Modified BSD -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions are met: -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * * Neither the name of Advanced Micro Devices, Inc. nor the -+ * names of its contributors may be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY -+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include "xgbe.h" -+#include "xgbe-common.h" -+ -+static unsigned int xgbe_usec_to_riwt(struct xgbe_prv_data *pdata, -+ unsigned int usec) -+{ -+ unsigned long rate; -+ unsigned int ret; -+ -+ DBGPR("-->xgbe_usec_to_riwt\n"); -+ -+ rate = pdata->sysclk_rate; -+ -+ /* -+ * Convert the input usec value to the watchdog timer value. Each -+ * watchdog timer value is equivalent to 256 clock cycles. -+ * Calculate the required value as: -+ * ( usec * ( system_clock_mhz / 10^6 ) / 256 -+ */ -+ ret = (usec * (rate / 1000000)) / 256; -+ -+ DBGPR("<--xgbe_usec_to_riwt\n"); -+ -+ return ret; -+} -+ -+static unsigned int xgbe_riwt_to_usec(struct xgbe_prv_data *pdata, -+ unsigned int riwt) -+{ -+ unsigned long rate; -+ unsigned int ret; -+ -+ DBGPR("-->xgbe_riwt_to_usec\n"); -+ -+ rate = pdata->sysclk_rate; -+ -+ /* -+ * Convert the input watchdog timer value to the usec value. Each -+ * watchdog timer value is equivalent to 256 clock cycles. -+ * Calculate the required value as: -+ * ( riwt * 256 ) / ( system_clock_mhz / 10^6 ) -+ */ -+ ret = (riwt * 256) / (rate / 1000000); -+ -+ DBGPR("<--xgbe_riwt_to_usec\n"); -+ -+ return ret; -+} -+ -+static int xgbe_config_pblx8(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) -+ XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_CR, PBLX8, -+ pdata->pblx8); -+ -+ return 0; -+} -+ -+static int xgbe_get_tx_pbl_val(struct xgbe_prv_data *pdata) -+{ -+ return XGMAC_DMA_IOREAD_BITS(pdata->channel, DMA_CH_TCR, PBL); -+} -+ -+static int xgbe_config_tx_pbl_val(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->tx_ring) -+ break; -+ -+ XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, PBL, -+ pdata->tx_pbl); -+ } -+ -+ return 0; -+} -+ -+static int xgbe_get_rx_pbl_val(struct xgbe_prv_data *pdata) -+{ -+ return XGMAC_DMA_IOREAD_BITS(pdata->channel, DMA_CH_RCR, PBL); -+} -+ -+static int xgbe_config_rx_pbl_val(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->rx_ring) -+ break; -+ -+ XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, PBL, -+ pdata->rx_pbl); -+ } -+ -+ return 0; -+} -+ -+static int xgbe_config_osp_mode(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->tx_ring) -+ break; -+ -+ XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, OSP, -+ pdata->tx_osp_mode); -+ } -+ -+ return 0; -+} -+ -+static int xgbe_config_rsf_mode(struct xgbe_prv_data *pdata, unsigned int val) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < pdata->rx_q_count; i++) -+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RSF, val); -+ -+ return 0; -+} -+ -+static int xgbe_config_tsf_mode(struct xgbe_prv_data *pdata, unsigned int val) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < pdata->tx_q_count; i++) -+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TSF, val); -+ -+ return 0; -+} -+ -+static int xgbe_config_rx_threshold(struct xgbe_prv_data *pdata, -+ unsigned int val) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < pdata->rx_q_count; i++) -+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RTC, val); -+ -+ return 0; -+} -+ -+static int xgbe_config_tx_threshold(struct xgbe_prv_data *pdata, -+ unsigned int val) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < pdata->tx_q_count; i++) -+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TTC, val); -+ -+ return 0; -+} -+ -+static int xgbe_config_rx_coalesce(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->rx_ring) -+ break; -+ -+ XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RIWT, RWT, -+ pdata->rx_riwt); -+ } -+ -+ return 0; -+} -+ -+static int xgbe_config_tx_coalesce(struct xgbe_prv_data *pdata) -+{ -+ return 0; -+} -+ -+static void xgbe_config_rx_buffer_size(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->rx_ring) -+ break; -+ -+ XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, RBSZ, -+ pdata->rx_buf_size); -+ } -+} -+ -+static void xgbe_config_tso_mode(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->tx_ring) -+ break; -+ -+ XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, TSE, 1); -+ } -+} -+ -+static void xgbe_config_sph_mode(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->rx_ring) -+ break; -+ -+ XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_CR, SPH, 1); -+ } -+ -+ XGMAC_IOWRITE_BITS(pdata, MAC_RCR, HDSMS, XGBE_SPH_HDSMS_SIZE); -+} -+ -+static int xgbe_write_rss_reg(struct xgbe_prv_data *pdata, unsigned int type, -+ unsigned int index, unsigned int val) -+{ -+ unsigned int wait; -+ int ret = 0; -+ -+ mutex_lock(&pdata->rss_mutex); -+ -+ if (XGMAC_IOREAD_BITS(pdata, MAC_RSSAR, OB)) { -+ ret = -EBUSY; -+ goto unlock; -+ } -+ -+ XGMAC_IOWRITE(pdata, MAC_RSSDR, val); -+ -+ XGMAC_IOWRITE_BITS(pdata, MAC_RSSAR, RSSIA, index); -+ XGMAC_IOWRITE_BITS(pdata, MAC_RSSAR, ADDRT, type); -+ XGMAC_IOWRITE_BITS(pdata, MAC_RSSAR, CT, 0); -+ XGMAC_IOWRITE_BITS(pdata, MAC_RSSAR, OB, 1); -+ -+ wait = 1000; -+ while (wait--) { -+ if (!XGMAC_IOREAD_BITS(pdata, MAC_RSSAR, OB)) -+ goto unlock; -+ -+ usleep_range(1000, 1500); -+ } -+ -+ ret = -EBUSY; -+ -+unlock: -+ mutex_unlock(&pdata->rss_mutex); -+ -+ return ret; -+} -+ -+static int xgbe_write_rss_hash_key(struct xgbe_prv_data *pdata) -+{ -+ unsigned int key_regs = sizeof(pdata->rss_key) / sizeof(u32); -+ unsigned int *key = (unsigned int *)&pdata->rss_key; -+ int ret; -+ -+ while (key_regs--) { -+ ret = xgbe_write_rss_reg(pdata, XGBE_RSS_HASH_KEY_TYPE, -+ key_regs, *key++); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int xgbe_write_rss_lookup_table(struct xgbe_prv_data *pdata) -+{ -+ unsigned int i; -+ int ret; -+ -+ for (i = 0; i < ARRAY_SIZE(pdata->rss_table); i++) { -+ ret = xgbe_write_rss_reg(pdata, -+ XGBE_RSS_LOOKUP_TABLE_TYPE, i, -+ pdata->rss_table[i]); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int xgbe_set_rss_hash_key(struct xgbe_prv_data *pdata, const u8 *key) -+{ -+ memcpy(pdata->rss_key, key, sizeof(pdata->rss_key)); -+ -+ return xgbe_write_rss_hash_key(pdata); -+} -+ -+static int xgbe_set_rss_lookup_table(struct xgbe_prv_data *pdata, -+ const u32 *table) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(pdata->rss_table); i++) -+ XGMAC_SET_BITS(pdata->rss_table[i], MAC_RSSDR, DMCH, table[i]); -+ -+ return xgbe_write_rss_lookup_table(pdata); -+} -+ -+static int xgbe_enable_rss(struct xgbe_prv_data *pdata) -+{ -+ int ret; -+ -+ if (!pdata->hw_feat.rss) -+ return -EOPNOTSUPP; -+ -+ /* Program the hash key */ -+ ret = xgbe_write_rss_hash_key(pdata); -+ if (ret) -+ return ret; -+ -+ /* Program the lookup table */ -+ ret = xgbe_write_rss_lookup_table(pdata); -+ if (ret) -+ return ret; -+ -+ /* Set the RSS options */ -+ XGMAC_IOWRITE(pdata, MAC_RSSCR, pdata->rss_options); -+ -+ /* Enable RSS */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_RSSCR, RSSE, 1); -+ -+ return 0; -+} -+ -+static int xgbe_disable_rss(struct xgbe_prv_data *pdata) -+{ -+ if (!pdata->hw_feat.rss) -+ return -EOPNOTSUPP; -+ -+ XGMAC_IOWRITE_BITS(pdata, MAC_RSSCR, RSSE, 0); -+ -+ return 0; -+} -+ -+static void xgbe_config_rss(struct xgbe_prv_data *pdata) -+{ -+ int ret; -+ -+ if (!pdata->hw_feat.rss) -+ return; -+ -+ if (pdata->netdev->features & NETIF_F_RXHASH) -+ ret = xgbe_enable_rss(pdata); -+ else -+ ret = xgbe_disable_rss(pdata); -+ -+ if (ret) -+ netdev_err(pdata->netdev, -+ "error configuring RSS, RSS disabled\n"); -+} -+ -+static int xgbe_disable_tx_flow_control(struct xgbe_prv_data *pdata) -+{ -+ unsigned int max_q_count, q_count; -+ unsigned int reg, reg_val; -+ unsigned int i; -+ -+ /* Clear MTL flow control */ -+ for (i = 0; i < pdata->rx_q_count; i++) -+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, EHFC, 0); -+ -+ /* Clear MAC flow control */ -+ max_q_count = XGMAC_MAX_FLOW_CONTROL_QUEUES; -+ q_count = min_t(unsigned int, pdata->tx_q_count, max_q_count); -+ reg = MAC_Q0TFCR; -+ for (i = 0; i < q_count; i++) { -+ reg_val = XGMAC_IOREAD(pdata, reg); -+ XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, TFE, 0); -+ XGMAC_IOWRITE(pdata, reg, reg_val); -+ -+ reg += MAC_QTFCR_INC; -+ } -+ -+ return 0; -+} -+ -+static int xgbe_enable_tx_flow_control(struct xgbe_prv_data *pdata) -+{ -+ unsigned int max_q_count, q_count; -+ unsigned int reg, reg_val; -+ unsigned int i; -+ -+ /* Set MTL flow control */ -+ for (i = 0; i < pdata->rx_q_count; i++) -+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, EHFC, 1); -+ -+ /* Set MAC flow control */ -+ max_q_count = XGMAC_MAX_FLOW_CONTROL_QUEUES; -+ q_count = min_t(unsigned int, pdata->tx_q_count, max_q_count); -+ reg = MAC_Q0TFCR; -+ for (i = 0; i < q_count; i++) { -+ reg_val = XGMAC_IOREAD(pdata, reg); -+ -+ /* Enable transmit flow control */ -+ XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, TFE, 1); -+ /* Set pause time */ -+ XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, PT, 0xffff); -+ -+ XGMAC_IOWRITE(pdata, reg, reg_val); -+ -+ reg += MAC_QTFCR_INC; -+ } -+ -+ return 0; -+} -+ -+static int xgbe_disable_rx_flow_control(struct xgbe_prv_data *pdata) -+{ -+ XGMAC_IOWRITE_BITS(pdata, MAC_RFCR, RFE, 0); -+ -+ return 0; -+} -+ -+static int xgbe_enable_rx_flow_control(struct xgbe_prv_data *pdata) -+{ -+ XGMAC_IOWRITE_BITS(pdata, MAC_RFCR, RFE, 1); -+ -+ return 0; -+} -+ -+static int xgbe_config_tx_flow_control(struct xgbe_prv_data *pdata) -+{ -+ struct ieee_pfc *pfc = pdata->pfc; -+ -+ if (pdata->tx_pause || (pfc && pfc->pfc_en)) -+ xgbe_enable_tx_flow_control(pdata); -+ else -+ xgbe_disable_tx_flow_control(pdata); -+ -+ return 0; -+} -+ -+static int xgbe_config_rx_flow_control(struct xgbe_prv_data *pdata) -+{ -+ struct ieee_pfc *pfc = pdata->pfc; -+ -+ if (pdata->rx_pause || (pfc && pfc->pfc_en)) -+ xgbe_enable_rx_flow_control(pdata); -+ else -+ xgbe_disable_rx_flow_control(pdata); -+ -+ return 0; -+} -+ -+static void xgbe_config_flow_control(struct xgbe_prv_data *pdata) -+{ -+ struct ieee_pfc *pfc = pdata->pfc; -+ -+ xgbe_config_tx_flow_control(pdata); -+ xgbe_config_rx_flow_control(pdata); -+ -+ XGMAC_IOWRITE_BITS(pdata, MAC_RFCR, PFCE, -+ (pfc && pfc->pfc_en) ? 1 : 0); -+} -+ -+static void xgbe_enable_dma_interrupts(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int dma_ch_isr, dma_ch_ier; -+ unsigned int i; -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ /* Clear all the interrupts which are set */ -+ dma_ch_isr = XGMAC_DMA_IOREAD(channel, DMA_CH_SR); -+ XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_ch_isr); -+ -+ /* Clear all interrupt enable bits */ -+ dma_ch_ier = 0; -+ -+ /* Enable following interrupts -+ * NIE - Normal Interrupt Summary Enable -+ * AIE - Abnormal Interrupt Summary Enable -+ * FBEE - Fatal Bus Error Enable -+ */ -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, NIE, 1); -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, AIE, 1); -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, FBEE, 1); -+ -+ if (channel->tx_ring) { -+ /* Enable the following Tx interrupts -+ * TIE - Transmit Interrupt Enable (unless using -+ * per channel interrupts) -+ */ -+ if (!pdata->per_channel_irq) -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1); -+ } -+ if (channel->rx_ring) { -+ /* Enable following Rx interrupts -+ * RBUE - Receive Buffer Unavailable Enable -+ * RIE - Receive Interrupt Enable (unless using -+ * per channel interrupts) -+ */ -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 1); -+ if (!pdata->per_channel_irq) -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1); -+ } -+ -+ XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, dma_ch_ier); -+ } -+} -+ -+static void xgbe_enable_mtl_interrupts(struct xgbe_prv_data *pdata) -+{ -+ unsigned int mtl_q_isr; -+ unsigned int q_count, i; -+ -+ q_count = max(pdata->hw_feat.tx_q_cnt, pdata->hw_feat.rx_q_cnt); -+ for (i = 0; i < q_count; i++) { -+ /* Clear all the interrupts which are set */ -+ mtl_q_isr = XGMAC_MTL_IOREAD(pdata, i, MTL_Q_ISR); -+ XGMAC_MTL_IOWRITE(pdata, i, MTL_Q_ISR, mtl_q_isr); -+ -+ /* No MTL interrupts to be enabled */ -+ XGMAC_MTL_IOWRITE(pdata, i, MTL_Q_IER, 0); -+ } -+} -+ -+static void xgbe_enable_mac_interrupts(struct xgbe_prv_data *pdata) -+{ -+ unsigned int mac_ier = 0; -+ -+ /* Enable Timestamp interrupt */ -+ XGMAC_SET_BITS(mac_ier, MAC_IER, TSIE, 1); -+ -+ XGMAC_IOWRITE(pdata, MAC_IER, mac_ier); -+ -+ /* Enable all counter interrupts */ -+ XGMAC_IOWRITE_BITS(pdata, MMC_RIER, ALL_INTERRUPTS, 0xffffffff); -+ XGMAC_IOWRITE_BITS(pdata, MMC_TIER, ALL_INTERRUPTS, 0xffffffff); -+} -+ -+static int xgbe_set_gmii_speed(struct xgbe_prv_data *pdata) -+{ -+ if (XGMAC_IOREAD_BITS(pdata, MAC_TCR, SS) == 0x3) -+ return 0; -+ -+ XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, 0x3); -+ -+ return 0; -+} -+ -+static int xgbe_set_gmii_2500_speed(struct xgbe_prv_data *pdata) -+{ -+ if (XGMAC_IOREAD_BITS(pdata, MAC_TCR, SS) == 0x2) -+ return 0; -+ -+ XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, 0x2); -+ -+ return 0; -+} -+ -+static int xgbe_set_xgmii_speed(struct xgbe_prv_data *pdata) -+{ -+ if (XGMAC_IOREAD_BITS(pdata, MAC_TCR, SS) == 0) -+ return 0; -+ -+ XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, 0); -+ -+ return 0; -+} -+ -+static int xgbe_set_promiscuous_mode(struct xgbe_prv_data *pdata, -+ unsigned int enable) -+{ -+ unsigned int val = enable ? 1 : 0; -+ -+ if (XGMAC_IOREAD_BITS(pdata, MAC_PFR, PR) == val) -+ return 0; -+ -+ DBGPR(" %s promiscuous mode\n", enable ? "entering" : "leaving"); -+ XGMAC_IOWRITE_BITS(pdata, MAC_PFR, PR, val); -+ -+ return 0; -+} -+ -+static int xgbe_set_all_multicast_mode(struct xgbe_prv_data *pdata, -+ unsigned int enable) -+{ -+ unsigned int val = enable ? 1 : 0; -+ -+ if (XGMAC_IOREAD_BITS(pdata, MAC_PFR, PM) == val) -+ return 0; -+ -+ DBGPR(" %s allmulti mode\n", enable ? "entering" : "leaving"); -+ XGMAC_IOWRITE_BITS(pdata, MAC_PFR, PM, val); -+ -+ return 0; -+} -+ -+static void xgbe_set_mac_reg(struct xgbe_prv_data *pdata, -+ struct netdev_hw_addr *ha, unsigned int *mac_reg) -+{ -+ unsigned int mac_addr_hi, mac_addr_lo; -+ u8 *mac_addr; -+ -+ mac_addr_lo = 0; -+ mac_addr_hi = 0; -+ -+ if (ha) { -+ mac_addr = (u8 *)&mac_addr_lo; -+ mac_addr[0] = ha->addr[0]; -+ mac_addr[1] = ha->addr[1]; -+ mac_addr[2] = ha->addr[2]; -+ mac_addr[3] = ha->addr[3]; -+ mac_addr = (u8 *)&mac_addr_hi; -+ mac_addr[0] = ha->addr[4]; -+ mac_addr[1] = ha->addr[5]; -+ -+ DBGPR(" adding mac address %pM at 0x%04x\n", ha->addr, -+ *mac_reg); -+ -+ XGMAC_SET_BITS(mac_addr_hi, MAC_MACA1HR, AE, 1); -+ } -+ -+ XGMAC_IOWRITE(pdata, *mac_reg, mac_addr_hi); -+ *mac_reg += MAC_MACA_INC; -+ XGMAC_IOWRITE(pdata, *mac_reg, mac_addr_lo); -+ *mac_reg += MAC_MACA_INC; -+} -+ -+static void xgbe_set_mac_addn_addrs(struct xgbe_prv_data *pdata) -+{ -+ struct net_device *netdev = pdata->netdev; -+ struct netdev_hw_addr *ha; -+ unsigned int mac_reg; -+ unsigned int addn_macs; -+ -+ mac_reg = MAC_MACA1HR; -+ addn_macs = pdata->hw_feat.addn_mac; -+ -+ if (netdev_uc_count(netdev) > addn_macs) { -+ xgbe_set_promiscuous_mode(pdata, 1); -+ } else { -+ netdev_for_each_uc_addr(ha, netdev) { -+ xgbe_set_mac_reg(pdata, ha, &mac_reg); -+ addn_macs--; -+ } -+ -+ if (netdev_mc_count(netdev) > addn_macs) { -+ xgbe_set_all_multicast_mode(pdata, 1); -+ } else { -+ netdev_for_each_mc_addr(ha, netdev) { -+ xgbe_set_mac_reg(pdata, ha, &mac_reg); -+ addn_macs--; -+ } -+ } -+ } -+ -+ /* Clear remaining additional MAC address entries */ -+ while (addn_macs--) -+ xgbe_set_mac_reg(pdata, NULL, &mac_reg); -+} -+ -+static void xgbe_set_mac_hash_table(struct xgbe_prv_data *pdata) -+{ -+ struct net_device *netdev = pdata->netdev; -+ struct netdev_hw_addr *ha; -+ unsigned int hash_reg; -+ unsigned int hash_table_shift, hash_table_count; -+ u32 hash_table[XGBE_MAC_HASH_TABLE_SIZE]; -+ u32 crc; -+ unsigned int i; -+ -+ hash_table_shift = 26 - (pdata->hw_feat.hash_table_size >> 7); -+ hash_table_count = pdata->hw_feat.hash_table_size / 32; -+ memset(hash_table, 0, sizeof(hash_table)); -+ -+ /* Build the MAC Hash Table register values */ -+ netdev_for_each_uc_addr(ha, netdev) { -+ crc = bitrev32(~crc32_le(~0, ha->addr, ETH_ALEN)); -+ crc >>= hash_table_shift; -+ hash_table[crc >> 5] |= (1 << (crc & 0x1f)); -+ } -+ -+ netdev_for_each_mc_addr(ha, netdev) { -+ crc = bitrev32(~crc32_le(~0, ha->addr, ETH_ALEN)); -+ crc >>= hash_table_shift; -+ hash_table[crc >> 5] |= (1 << (crc & 0x1f)); -+ } -+ -+ /* Set the MAC Hash Table registers */ -+ hash_reg = MAC_HTR0; -+ for (i = 0; i < hash_table_count; i++) { -+ XGMAC_IOWRITE(pdata, hash_reg, hash_table[i]); -+ hash_reg += MAC_HTR_INC; -+ } -+} -+ -+static int xgbe_add_mac_addresses(struct xgbe_prv_data *pdata) -+{ -+ if (pdata->hw_feat.hash_table_size) -+ xgbe_set_mac_hash_table(pdata); -+ else -+ xgbe_set_mac_addn_addrs(pdata); -+ -+ return 0; -+} -+ -+static int xgbe_set_mac_address(struct xgbe_prv_data *pdata, u8 *addr) -+{ -+ unsigned int mac_addr_hi, mac_addr_lo; -+ -+ mac_addr_hi = (addr[5] << 8) | (addr[4] << 0); -+ mac_addr_lo = (addr[3] << 24) | (addr[2] << 16) | -+ (addr[1] << 8) | (addr[0] << 0); -+ -+ XGMAC_IOWRITE(pdata, MAC_MACA0HR, mac_addr_hi); -+ XGMAC_IOWRITE(pdata, MAC_MACA0LR, mac_addr_lo); -+ -+ return 0; -+} -+ -+static int xgbe_read_mmd_regs(struct xgbe_prv_data *pdata, int prtad, -+ int mmd_reg) -+{ -+ unsigned int mmd_address; -+ int mmd_data; -+ -+ if (mmd_reg & MII_ADDR_C45) -+ mmd_address = mmd_reg & ~MII_ADDR_C45; -+ else -+ mmd_address = (pdata->mdio_mmd << 16) | (mmd_reg & 0xffff); -+ -+ /* The PCS implementation has reversed the devices in -+ * package registers so we need to change 05 to 06 and -+ * 06 to 05 if being read (these registers are readonly -+ * so no need to do this in the write function) -+ */ -+ if ((mmd_address & 0xffff) == 0x05) -+ mmd_address = (mmd_address & ~0xffff) | 0x06; -+ else if ((mmd_address & 0xffff) == 0x06) -+ mmd_address = (mmd_address & ~0xffff) | 0x05; -+ -+ /* The PCS registers are accessed using mmio. The underlying APB3 -+ * management interface uses indirect addressing to access the MMD -+ * register sets. This requires accessing of the PCS register in two -+ * phases, an address phase and a data phase. -+ * -+ * The mmio interface is based on 32-bit offsets and values. All -+ * register offsets must therefore be adjusted by left shifting the -+ * offset 2 bits and reading 32 bits of data. -+ */ -+ mutex_lock(&pdata->xpcs_mutex); -+ XPCS_IOWRITE(pdata, PCS_MMD_SELECT << 2, mmd_address >> 8); -+ mmd_data = XPCS_IOREAD(pdata, (mmd_address & 0xff) << 2); -+ mutex_unlock(&pdata->xpcs_mutex); -+ -+ return mmd_data; -+} -+ -+static void xgbe_write_mmd_regs(struct xgbe_prv_data *pdata, int prtad, -+ int mmd_reg, int mmd_data) -+{ -+ unsigned int mmd_address; -+ -+ if (mmd_reg & MII_ADDR_C45) -+ mmd_address = mmd_reg & ~MII_ADDR_C45; -+ else -+ mmd_address = (pdata->mdio_mmd << 16) | (mmd_reg & 0xffff); -+ -+ /* If the PCS is changing modes, match the MAC speed to it */ -+ if (((mmd_address >> 16) == MDIO_MMD_PCS) && -+ ((mmd_address & 0xffff) == MDIO_CTRL2)) { -+ struct phy_device *phydev = pdata->phydev; -+ -+ if (mmd_data & MDIO_PCS_CTRL2_TYPE) { -+ /* KX mode */ -+ if (phydev->supported & SUPPORTED_1000baseKX_Full) -+ xgbe_set_gmii_speed(pdata); -+ else -+ xgbe_set_gmii_2500_speed(pdata); -+ } else { -+ /* KR mode */ -+ xgbe_set_xgmii_speed(pdata); -+ } -+ } -+ -+ /* The PCS registers are accessed using mmio. The underlying APB3 -+ * management interface uses indirect addressing to access the MMD -+ * register sets. This requires accessing of the PCS register in two -+ * phases, an address phase and a data phase. -+ * -+ * The mmio interface is based on 32-bit offsets and values. All -+ * register offsets must therefore be adjusted by left shifting the -+ * offset 2 bits and reading 32 bits of data. -+ */ -+ mutex_lock(&pdata->xpcs_mutex); -+ XPCS_IOWRITE(pdata, PCS_MMD_SELECT << 2, mmd_address >> 8); -+ XPCS_IOWRITE(pdata, (mmd_address & 0xff) << 2, mmd_data); -+ mutex_unlock(&pdata->xpcs_mutex); -+} -+ -+static int xgbe_tx_complete(struct xgbe_ring_desc *rdesc) -+{ -+ return !XGMAC_GET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN); -+} -+ -+static int xgbe_disable_rx_csum(struct xgbe_prv_data *pdata) -+{ -+ XGMAC_IOWRITE_BITS(pdata, MAC_RCR, IPC, 0); -+ -+ return 0; -+} -+ -+static int xgbe_enable_rx_csum(struct xgbe_prv_data *pdata) -+{ -+ XGMAC_IOWRITE_BITS(pdata, MAC_RCR, IPC, 1); -+ -+ return 0; -+} -+ -+static int xgbe_enable_rx_vlan_stripping(struct xgbe_prv_data *pdata) -+{ -+ /* Put the VLAN tag in the Rx descriptor */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EVLRXS, 1); -+ -+ /* Don't check the VLAN type */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, DOVLTC, 1); -+ -+ /* Check only C-TAG (0x8100) packets */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ERSVLM, 0); -+ -+ /* Don't consider an S-TAG (0x88A8) packet as a VLAN packet */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ESVL, 0); -+ -+ /* Enable VLAN tag stripping */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EVLS, 0x3); -+ -+ return 0; -+} -+ -+static int xgbe_disable_rx_vlan_stripping(struct xgbe_prv_data *pdata) -+{ -+ XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EVLS, 0); -+ -+ return 0; -+} -+ -+static int xgbe_enable_rx_vlan_filtering(struct xgbe_prv_data *pdata) -+{ -+ /* Enable VLAN filtering */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_PFR, VTFE, 1); -+ -+ /* Enable VLAN Hash Table filtering */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, VTHM, 1); -+ -+ /* Disable VLAN tag inverse matching */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, VTIM, 0); -+ -+ /* Only filter on the lower 12-bits of the VLAN tag */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ETV, 1); -+ -+ /* In order for the VLAN Hash Table filtering to be effective, -+ * the VLAN tag identifier in the VLAN Tag Register must not -+ * be zero. Set the VLAN tag identifier to "1" to enable the -+ * VLAN Hash Table filtering. This implies that a VLAN tag of -+ * 1 will always pass filtering. -+ */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, VL, 1); -+ -+ return 0; -+} -+ -+static int xgbe_disable_rx_vlan_filtering(struct xgbe_prv_data *pdata) -+{ -+ /* Disable VLAN filtering */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_PFR, VTFE, 0); -+ -+ return 0; -+} -+ -+#ifndef CRCPOLY_LE -+#define CRCPOLY_LE 0xedb88320 -+#endif -+static u32 xgbe_vid_crc32_le(__le16 vid_le) -+{ -+ u32 poly = CRCPOLY_LE; -+ u32 crc = ~0; -+ u32 temp = 0; -+ unsigned char *data = (unsigned char *)&vid_le; -+ unsigned char data_byte = 0; -+ int i, bits; -+ -+ bits = get_bitmask_order(VLAN_VID_MASK); -+ for (i = 0; i < bits; i++) { -+ if ((i % 8) == 0) -+ data_byte = data[i / 8]; -+ -+ temp = ((crc & 1) ^ data_byte) & 1; -+ crc >>= 1; -+ data_byte >>= 1; -+ -+ if (temp) -+ crc ^= poly; -+ } -+ -+ return crc; -+} -+ -+static int xgbe_update_vlan_hash_table(struct xgbe_prv_data *pdata) -+{ -+ u32 crc; -+ u16 vid; -+ __le16 vid_le; -+ u16 vlan_hash_table = 0; -+ -+ /* Generate the VLAN Hash Table value */ -+ for_each_set_bit(vid, pdata->active_vlans, VLAN_N_VID) { -+ /* Get the CRC32 value of the VLAN ID */ -+ vid_le = cpu_to_le16(vid); -+ crc = bitrev32(~xgbe_vid_crc32_le(vid_le)) >> 28; -+ -+ vlan_hash_table |= (1 << crc); -+ } -+ -+ /* Set the VLAN Hash Table filtering register */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_VLANHTR, VLHT, vlan_hash_table); -+ -+ return 0; -+} -+ -+static void xgbe_tx_desc_reset(struct xgbe_ring_data *rdata) -+{ -+ struct xgbe_ring_desc *rdesc = rdata->rdesc; -+ -+ /* Reset the Tx descriptor -+ * Set buffer 1 (lo) address to zero -+ * Set buffer 1 (hi) address to zero -+ * Reset all other control bits (IC, TTSE, B2L & B1L) -+ * Reset all other control bits (OWN, CTXT, FD, LD, CPC, CIC, etc) -+ */ -+ rdesc->desc0 = 0; -+ rdesc->desc1 = 0; -+ rdesc->desc2 = 0; -+ rdesc->desc3 = 0; -+ -+ /* Make sure ownership is written to the descriptor */ -+ wmb(); -+} -+ -+static void xgbe_tx_desc_init(struct xgbe_channel *channel) -+{ -+ struct xgbe_ring *ring = channel->tx_ring; -+ struct xgbe_ring_data *rdata; -+ int i; -+ int start_index = ring->cur; -+ -+ DBGPR("-->tx_desc_init\n"); -+ -+ /* Initialze all descriptors */ -+ for (i = 0; i < ring->rdesc_count; i++) { -+ rdata = XGBE_GET_DESC_DATA(ring, i); -+ -+ /* Initialize Tx descriptor */ -+ xgbe_tx_desc_reset(rdata); -+ } -+ -+ /* Update the total number of Tx descriptors */ -+ XGMAC_DMA_IOWRITE(channel, DMA_CH_TDRLR, ring->rdesc_count - 1); -+ -+ /* Update the starting address of descriptor ring */ -+ rdata = XGBE_GET_DESC_DATA(ring, start_index); -+ XGMAC_DMA_IOWRITE(channel, DMA_CH_TDLR_HI, -+ upper_32_bits(rdata->rdesc_dma)); -+ XGMAC_DMA_IOWRITE(channel, DMA_CH_TDLR_LO, -+ lower_32_bits(rdata->rdesc_dma)); -+ -+ DBGPR("<--tx_desc_init\n"); -+} -+ -+static void xgbe_rx_desc_reset(struct xgbe_ring_data *rdata) -+{ -+ struct xgbe_ring_desc *rdesc = rdata->rdesc; -+ -+ /* Reset the Rx descriptor -+ * Set buffer 1 (lo) address to header dma address (lo) -+ * Set buffer 1 (hi) address to header dma address (hi) -+ * Set buffer 2 (lo) address to buffer dma address (lo) -+ * Set buffer 2 (hi) address to buffer dma address (hi) and -+ * set control bits OWN and INTE -+ */ -+ rdesc->desc0 = cpu_to_le32(lower_32_bits(rdata->rx.hdr.dma)); -+ rdesc->desc1 = cpu_to_le32(upper_32_bits(rdata->rx.hdr.dma)); -+ rdesc->desc2 = cpu_to_le32(lower_32_bits(rdata->rx.buf.dma)); -+ rdesc->desc3 = cpu_to_le32(upper_32_bits(rdata->rx.buf.dma)); -+ -+ XGMAC_SET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, INTE, -+ rdata->interrupt ? 1 : 0); -+ -+ /* Since the Rx DMA engine is likely running, make sure everything -+ * is written to the descriptor(s) before setting the OWN bit -+ * for the descriptor -+ */ -+ wmb(); -+ -+ XGMAC_SET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, OWN, 1); -+ -+ /* Make sure ownership is written to the descriptor */ -+ wmb(); -+} -+ -+static void xgbe_rx_desc_init(struct xgbe_channel *channel) -+{ -+ struct xgbe_prv_data *pdata = channel->pdata; -+ struct xgbe_ring *ring = channel->rx_ring; -+ struct xgbe_ring_data *rdata; -+ unsigned int start_index = ring->cur; -+ unsigned int rx_coalesce, rx_frames; -+ unsigned int i; -+ -+ DBGPR("-->rx_desc_init\n"); -+ -+ rx_coalesce = (pdata->rx_riwt || pdata->rx_frames) ? 1 : 0; -+ rx_frames = pdata->rx_frames; -+ -+ /* Initialize all descriptors */ -+ for (i = 0; i < ring->rdesc_count; i++) { -+ rdata = XGBE_GET_DESC_DATA(ring, i); -+ -+ /* Set interrupt on completion bit as appropriate */ -+ if (rx_coalesce && (!rx_frames || ((i + 1) % rx_frames))) -+ rdata->interrupt = 0; -+ else -+ rdata->interrupt = 1; -+ -+ /* Initialize Rx descriptor */ -+ xgbe_rx_desc_reset(rdata); -+ } -+ -+ /* Update the total number of Rx descriptors */ -+ XGMAC_DMA_IOWRITE(channel, DMA_CH_RDRLR, ring->rdesc_count - 1); -+ -+ /* Update the starting address of descriptor ring */ -+ rdata = XGBE_GET_DESC_DATA(ring, start_index); -+ XGMAC_DMA_IOWRITE(channel, DMA_CH_RDLR_HI, -+ upper_32_bits(rdata->rdesc_dma)); -+ XGMAC_DMA_IOWRITE(channel, DMA_CH_RDLR_LO, -+ lower_32_bits(rdata->rdesc_dma)); -+ -+ /* Update the Rx Descriptor Tail Pointer */ -+ rdata = XGBE_GET_DESC_DATA(ring, start_index + ring->rdesc_count - 1); -+ XGMAC_DMA_IOWRITE(channel, DMA_CH_RDTR_LO, -+ lower_32_bits(rdata->rdesc_dma)); -+ -+ DBGPR("<--rx_desc_init\n"); -+} -+ -+static void xgbe_update_tstamp_addend(struct xgbe_prv_data *pdata, -+ unsigned int addend) -+{ -+ /* Set the addend register value and tell the device */ -+ XGMAC_IOWRITE(pdata, MAC_TSAR, addend); -+ XGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSADDREG, 1); -+ -+ /* Wait for addend update to complete */ -+ while (XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSADDREG)) -+ udelay(5); -+} -+ -+static void xgbe_set_tstamp_time(struct xgbe_prv_data *pdata, unsigned int sec, -+ unsigned int nsec) -+{ -+ /* Set the time values and tell the device */ -+ XGMAC_IOWRITE(pdata, MAC_STSUR, sec); -+ XGMAC_IOWRITE(pdata, MAC_STNUR, nsec); -+ XGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSINIT, 1); -+ -+ /* Wait for time update to complete */ -+ while (XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSINIT)) -+ udelay(5); -+} -+ -+static u64 xgbe_get_tstamp_time(struct xgbe_prv_data *pdata) -+{ -+ u64 nsec; -+ -+ nsec = XGMAC_IOREAD(pdata, MAC_STSR); -+ nsec *= NSEC_PER_SEC; -+ nsec += XGMAC_IOREAD(pdata, MAC_STNR); -+ -+ return nsec; -+} -+ -+static u64 xgbe_get_tx_tstamp(struct xgbe_prv_data *pdata) -+{ -+ unsigned int tx_snr; -+ u64 nsec; -+ -+ tx_snr = XGMAC_IOREAD(pdata, MAC_TXSNR); -+ if (XGMAC_GET_BITS(tx_snr, MAC_TXSNR, TXTSSTSMIS)) -+ return 0; -+ -+ nsec = XGMAC_IOREAD(pdata, MAC_TXSSR); -+ nsec *= NSEC_PER_SEC; -+ nsec += tx_snr; -+ -+ return nsec; -+} -+ -+static void xgbe_get_rx_tstamp(struct xgbe_packet_data *packet, -+ struct xgbe_ring_desc *rdesc) -+{ -+ u64 nsec; -+ -+ if (XGMAC_GET_BITS_LE(rdesc->desc3, RX_CONTEXT_DESC3, TSA) && -+ !XGMAC_GET_BITS_LE(rdesc->desc3, RX_CONTEXT_DESC3, TSD)) { -+ nsec = le32_to_cpu(rdesc->desc1); -+ nsec <<= 32; -+ nsec |= le32_to_cpu(rdesc->desc0); -+ if (nsec != 0xffffffffffffffffULL) { -+ packet->rx_tstamp = nsec; -+ XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, -+ RX_TSTAMP, 1); -+ } -+ } -+} -+ -+static int xgbe_config_tstamp(struct xgbe_prv_data *pdata, -+ unsigned int mac_tscr) -+{ -+ /* Set one nano-second accuracy */ -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCTRLSSR, 1); -+ -+ /* Set fine timestamp update */ -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCFUPDT, 1); -+ -+ /* Overwrite earlier timestamps */ -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TXTSSTSM, 1); -+ -+ XGMAC_IOWRITE(pdata, MAC_TSCR, mac_tscr); -+ -+ /* Exit if timestamping is not enabled */ -+ if (!XGMAC_GET_BITS(mac_tscr, MAC_TSCR, TSENA)) -+ return 0; -+ -+ /* Initialize time registers */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC, XGBE_TSTAMP_SSINC); -+ XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC, XGBE_TSTAMP_SNSINC); -+ xgbe_update_tstamp_addend(pdata, pdata->tstamp_addend); -+ xgbe_set_tstamp_time(pdata, 0, 0); -+ -+ /* Initialize the timecounter */ -+ timecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc, -+ ktime_to_ns(ktime_get_real())); -+ -+ return 0; -+} -+ -+static void xgbe_config_dcb_tc(struct xgbe_prv_data *pdata) -+{ -+ struct ieee_ets *ets = pdata->ets; -+ unsigned int total_weight, min_weight, weight; -+ unsigned int i; -+ -+ if (!ets) -+ return; -+ -+ /* Set Tx to deficit weighted round robin scheduling algorithm (when -+ * traffic class is using ETS algorithm) -+ */ -+ XGMAC_IOWRITE_BITS(pdata, MTL_OMR, ETSALG, MTL_ETSALG_DWRR); -+ -+ /* Set Traffic Class algorithms */ -+ total_weight = pdata->netdev->mtu * pdata->hw_feat.tc_cnt; -+ min_weight = total_weight / 100; -+ if (!min_weight) -+ min_weight = 1; -+ -+ for (i = 0; i < pdata->hw_feat.tc_cnt; i++) { -+ switch (ets->tc_tsa[i]) { -+ case IEEE_8021QAZ_TSA_STRICT: -+ DBGPR(" TC%u using SP\n", i); -+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_ETSCR, TSA, -+ MTL_TSA_SP); -+ break; -+ case IEEE_8021QAZ_TSA_ETS: -+ weight = total_weight * ets->tc_tx_bw[i] / 100; -+ weight = clamp(weight, min_weight, total_weight); -+ -+ DBGPR(" TC%u using DWRR (weight %u)\n", i, weight); -+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_ETSCR, TSA, -+ MTL_TSA_ETS); -+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_QWR, QW, -+ weight); -+ break; -+ } -+ } -+} -+ -+static void xgbe_config_dcb_pfc(struct xgbe_prv_data *pdata) -+{ -+ struct ieee_pfc *pfc = pdata->pfc; -+ struct ieee_ets *ets = pdata->ets; -+ unsigned int mask, reg, reg_val; -+ unsigned int tc, prio; -+ -+ if (!pfc || !ets) -+ return; -+ -+ for (tc = 0; tc < pdata->hw_feat.tc_cnt; tc++) { -+ mask = 0; -+ for (prio = 0; prio < IEEE_8021QAZ_MAX_TCS; prio++) { -+ if ((pfc->pfc_en & (1 << prio)) && -+ (ets->prio_tc[prio] == tc)) -+ mask |= (1 << prio); -+ } -+ mask &= 0xff; -+ -+ DBGPR(" TC%u PFC mask=%#x\n", tc, mask); -+ reg = MTL_TCPM0R + (MTL_TCPM_INC * (tc / MTL_TCPM_TC_PER_REG)); -+ reg_val = XGMAC_IOREAD(pdata, reg); -+ -+ reg_val &= ~(0xff << ((tc % MTL_TCPM_TC_PER_REG) << 3)); -+ reg_val |= (mask << ((tc % MTL_TCPM_TC_PER_REG) << 3)); -+ -+ XGMAC_IOWRITE(pdata, reg, reg_val); -+ } -+ -+ xgbe_config_flow_control(pdata); -+} -+ -+static void xgbe_tx_start_xmit(struct xgbe_channel *channel, -+ struct xgbe_ring *ring) -+{ -+ struct xgbe_prv_data *pdata = channel->pdata; -+ struct xgbe_ring_data *rdata; -+ -+ /* Issue a poll command to Tx DMA by writing address -+ * of next immediate free descriptor */ -+ rdata = XGBE_GET_DESC_DATA(ring, ring->cur); -+ XGMAC_DMA_IOWRITE(channel, DMA_CH_TDTR_LO, -+ lower_32_bits(rdata->rdesc_dma)); -+ -+ /* Start the Tx coalescing timer */ -+ if (pdata->tx_usecs && !channel->tx_timer_active) { -+ channel->tx_timer_active = 1; -+ hrtimer_start(&channel->tx_timer, -+ ktime_set(0, pdata->tx_usecs * NSEC_PER_USEC), -+ HRTIMER_MODE_REL); -+ } -+ -+ ring->tx.xmit_more = 0; -+} -+ -+static void xgbe_dev_xmit(struct xgbe_channel *channel) -+{ -+ struct xgbe_prv_data *pdata = channel->pdata; -+ struct xgbe_ring *ring = channel->tx_ring; -+ struct xgbe_ring_data *rdata; -+ struct xgbe_ring_desc *rdesc; -+ struct xgbe_packet_data *packet = &ring->packet_data; -+ unsigned int csum, tso, vlan; -+ unsigned int tso_context, vlan_context; -+ unsigned int tx_set_ic; -+ int start_index = ring->cur; -+ int cur_index = ring->cur; -+ int i; -+ -+ DBGPR("-->xgbe_dev_xmit\n"); -+ -+ csum = XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, -+ CSUM_ENABLE); -+ tso = XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, -+ TSO_ENABLE); -+ vlan = XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, -+ VLAN_CTAG); -+ -+ if (tso && (packet->mss != ring->tx.cur_mss)) -+ tso_context = 1; -+ else -+ tso_context = 0; -+ -+ if (vlan && (packet->vlan_ctag != ring->tx.cur_vlan_ctag)) -+ vlan_context = 1; -+ else -+ vlan_context = 0; -+ -+ /* Determine if an interrupt should be generated for this Tx: -+ * Interrupt: -+ * - Tx frame count exceeds the frame count setting -+ * - Addition of Tx frame count to the frame count since the -+ * last interrupt was set exceeds the frame count setting -+ * No interrupt: -+ * - No frame count setting specified (ethtool -C ethX tx-frames 0) -+ * - Addition of Tx frame count to the frame count since the -+ * last interrupt was set does not exceed the frame count setting -+ */ -+ ring->coalesce_count += packet->tx_packets; -+ if (!pdata->tx_frames) -+ tx_set_ic = 0; -+ else if (packet->tx_packets > pdata->tx_frames) -+ tx_set_ic = 1; -+ else if ((ring->coalesce_count % pdata->tx_frames) < -+ packet->tx_packets) -+ tx_set_ic = 1; -+ else -+ tx_set_ic = 0; -+ -+ rdata = XGBE_GET_DESC_DATA(ring, cur_index); -+ rdesc = rdata->rdesc; -+ -+ /* Create a context descriptor if this is a TSO packet */ -+ if (tso_context || vlan_context) { -+ if (tso_context) { -+ DBGPR(" TSO context descriptor, mss=%u\n", -+ packet->mss); -+ -+ /* Set the MSS size */ -+ XGMAC_SET_BITS_LE(rdesc->desc2, TX_CONTEXT_DESC2, -+ MSS, packet->mss); -+ -+ /* Mark it as a CONTEXT descriptor */ -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_CONTEXT_DESC3, -+ CTXT, 1); -+ -+ /* Indicate this descriptor contains the MSS */ -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_CONTEXT_DESC3, -+ TCMSSV, 1); -+ -+ ring->tx.cur_mss = packet->mss; -+ } -+ -+ if (vlan_context) { -+ DBGPR(" VLAN context descriptor, ctag=%u\n", -+ packet->vlan_ctag); -+ -+ /* Mark it as a CONTEXT descriptor */ -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_CONTEXT_DESC3, -+ CTXT, 1); -+ -+ /* Set the VLAN tag */ -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_CONTEXT_DESC3, -+ VT, packet->vlan_ctag); -+ -+ /* Indicate this descriptor contains the VLAN tag */ -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_CONTEXT_DESC3, -+ VLTV, 1); -+ -+ ring->tx.cur_vlan_ctag = packet->vlan_ctag; -+ } -+ -+ cur_index++; -+ rdata = XGBE_GET_DESC_DATA(ring, cur_index); -+ rdesc = rdata->rdesc; -+ } -+ -+ /* Update buffer address (for TSO this is the header) */ -+ rdesc->desc0 = cpu_to_le32(lower_32_bits(rdata->skb_dma)); -+ rdesc->desc1 = cpu_to_le32(upper_32_bits(rdata->skb_dma)); -+ -+ /* Update the buffer length */ -+ XGMAC_SET_BITS_LE(rdesc->desc2, TX_NORMAL_DESC2, HL_B1L, -+ rdata->skb_dma_len); -+ -+ /* VLAN tag insertion check */ -+ if (vlan) -+ XGMAC_SET_BITS_LE(rdesc->desc2, TX_NORMAL_DESC2, VTIR, -+ TX_NORMAL_DESC2_VLAN_INSERT); -+ -+ /* Timestamp enablement check */ -+ if (XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, PTP)) -+ XGMAC_SET_BITS_LE(rdesc->desc2, TX_NORMAL_DESC2, TTSE, 1); -+ -+ /* Mark it as First Descriptor */ -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, FD, 1); -+ -+ /* Mark it as a NORMAL descriptor */ -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, CTXT, 0); -+ -+ /* Set OWN bit if not the first descriptor */ -+ if (cur_index != start_index) -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN, 1); -+ -+ if (tso) { -+ /* Enable TSO */ -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, TSE, 1); -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, TCPPL, -+ packet->tcp_payload_len); -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, TCPHDRLEN, -+ packet->tcp_header_len / 4); -+ } else { -+ /* Enable CRC and Pad Insertion */ -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, CPC, 0); -+ -+ /* Enable HW CSUM */ -+ if (csum) -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, -+ CIC, 0x3); -+ -+ /* Set the total length to be transmitted */ -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, FL, -+ packet->length); -+ } -+ -+ for (i = cur_index - start_index + 1; i < packet->rdesc_count; i++) { -+ cur_index++; -+ rdata = XGBE_GET_DESC_DATA(ring, cur_index); -+ rdesc = rdata->rdesc; -+ -+ /* Update buffer address */ -+ rdesc->desc0 = cpu_to_le32(lower_32_bits(rdata->skb_dma)); -+ rdesc->desc1 = cpu_to_le32(upper_32_bits(rdata->skb_dma)); -+ -+ /* Update the buffer length */ -+ XGMAC_SET_BITS_LE(rdesc->desc2, TX_NORMAL_DESC2, HL_B1L, -+ rdata->skb_dma_len); -+ -+ /* Set OWN bit */ -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN, 1); -+ -+ /* Mark it as NORMAL descriptor */ -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, CTXT, 0); -+ -+ /* Enable HW CSUM */ -+ if (csum) -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, -+ CIC, 0x3); -+ } -+ -+ /* Set LAST bit for the last descriptor */ -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, LD, 1); -+ -+ /* Set IC bit based on Tx coalescing settings */ -+ if (tx_set_ic) -+ XGMAC_SET_BITS_LE(rdesc->desc2, TX_NORMAL_DESC2, IC, 1); -+ -+ /* Save the Tx info to report back during cleanup */ -+ rdata->tx.packets = packet->tx_packets; -+ rdata->tx.bytes = packet->tx_bytes; -+ -+ /* In case the Tx DMA engine is running, make sure everything -+ * is written to the descriptor(s) before setting the OWN bit -+ * for the first descriptor -+ */ -+ wmb(); -+ -+ /* Set OWN bit for the first descriptor */ -+ rdata = XGBE_GET_DESC_DATA(ring, start_index); -+ rdesc = rdata->rdesc; -+ XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN, 1); -+ -+#ifdef XGMAC_ENABLE_TX_DESC_DUMP -+ xgbe_a0_dump_tx_desc(ring, start_index, packet->rdesc_count, 1); -+#endif -+ -+ /* Make sure ownership is written to the descriptor */ -+ wmb(); -+ -+ ring->cur = cur_index + 1; -+ if (!packet->skb->xmit_more || -+ netif_xmit_stopped(netdev_get_tx_queue(pdata->netdev, -+ channel->queue_index))) -+ xgbe_tx_start_xmit(channel, ring); -+ else -+ ring->tx.xmit_more = 1; -+ -+ DBGPR(" %s: descriptors %u to %u written\n", -+ channel->name, start_index & (ring->rdesc_count - 1), -+ (ring->cur - 1) & (ring->rdesc_count - 1)); -+ -+ DBGPR("<--xgbe_dev_xmit\n"); -+} -+ -+static int xgbe_dev_read(struct xgbe_channel *channel) -+{ -+ struct xgbe_ring *ring = channel->rx_ring; -+ struct xgbe_ring_data *rdata; -+ struct xgbe_ring_desc *rdesc; -+ struct xgbe_packet_data *packet = &ring->packet_data; -+ struct net_device *netdev = channel->pdata->netdev; -+ unsigned int err, etlt, l34t; -+ -+ DBGPR("-->xgbe_dev_read: cur = %d\n", ring->cur); -+ -+ rdata = XGBE_GET_DESC_DATA(ring, ring->cur); -+ rdesc = rdata->rdesc; -+ -+ /* Check for data availability */ -+ if (XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, OWN)) -+ return 1; -+ -+ /* Make sure descriptor fields are read after reading the OWN bit */ -+ rmb(); -+ -+#ifdef XGMAC_ENABLE_RX_DESC_DUMP -+ xgbe_a0_dump_rx_desc(ring, rdesc, ring->cur); -+#endif -+ -+ if (XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, CTXT)) { -+ /* Timestamp Context Descriptor */ -+ xgbe_get_rx_tstamp(packet, rdesc); -+ -+ XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, -+ CONTEXT, 1); -+ XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, -+ CONTEXT_NEXT, 0); -+ return 0; -+ } -+ -+ /* Normal Descriptor, be sure Context Descriptor bit is off */ -+ XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, CONTEXT, 0); -+ -+ /* Indicate if a Context Descriptor is next */ -+ if (XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, CDA)) -+ XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, -+ CONTEXT_NEXT, 1); -+ -+ /* Get the header length */ -+ if (XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, FD)) -+ rdata->rx.hdr_len = XGMAC_GET_BITS_LE(rdesc->desc2, -+ RX_NORMAL_DESC2, HL); -+ -+ /* Get the RSS hash */ -+ if (XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, RSV)) { -+ XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, -+ RSS_HASH, 1); -+ -+ packet->rss_hash = le32_to_cpu(rdesc->desc1); -+ -+ l34t = XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, L34T); -+ switch (l34t) { -+ case RX_DESC3_L34T_IPV4_TCP: -+ case RX_DESC3_L34T_IPV4_UDP: -+ case RX_DESC3_L34T_IPV6_TCP: -+ case RX_DESC3_L34T_IPV6_UDP: -+ packet->rss_hash_type = PKT_HASH_TYPE_L4; -+ break; -+ default: -+ packet->rss_hash_type = PKT_HASH_TYPE_L3; -+ } -+ } -+ -+ /* Get the packet length */ -+ rdata->rx.len = XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, PL); -+ -+ if (!XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, LD)) { -+ /* Not all the data has been transferred for this packet */ -+ XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, -+ INCOMPLETE, 1); -+ return 0; -+ } -+ -+ /* This is the last of the data for this packet */ -+ XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, -+ INCOMPLETE, 0); -+ -+ /* Set checksum done indicator as appropriate */ -+ if (channel->pdata->netdev->features & NETIF_F_RXCSUM) -+ XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, -+ CSUM_DONE, 1); -+ -+ /* Check for errors (only valid in last descriptor) */ -+ err = XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, ES); -+ etlt = XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, ETLT); -+ DBGPR(" err=%u, etlt=%#x\n", err, etlt); -+ -+ if (!err || !etlt) { -+ /* No error if err is 0 or etlt is 0 */ -+ if ((etlt == 0x09) && -+ (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)) { -+ XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, -+ VLAN_CTAG, 1); -+ packet->vlan_ctag = XGMAC_GET_BITS_LE(rdesc->desc0, -+ RX_NORMAL_DESC0, -+ OVT); -+ DBGPR(" vlan-ctag=0x%04x\n", packet->vlan_ctag); -+ } -+ } else { -+ if ((etlt == 0x05) || (etlt == 0x06)) -+ XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, -+ CSUM_DONE, 0); -+ else -+ XGMAC_SET_BITS(packet->errors, RX_PACKET_ERRORS, -+ FRAME, 1); -+ } -+ -+ DBGPR("<--xgbe_dev_read: %s - descriptor=%u (cur=%d)\n", channel->name, -+ ring->cur & (ring->rdesc_count - 1), ring->cur); -+ -+ return 0; -+} -+ -+static int xgbe_is_context_desc(struct xgbe_ring_desc *rdesc) -+{ -+ /* Rx and Tx share CTXT bit, so check TDES3.CTXT bit */ -+ return XGMAC_GET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, CTXT); -+} -+ -+static int xgbe_is_last_desc(struct xgbe_ring_desc *rdesc) -+{ -+ /* Rx and Tx share LD bit, so check TDES3.LD bit */ -+ return XGMAC_GET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, LD); -+} -+ -+static int xgbe_enable_int(struct xgbe_channel *channel, -+ enum xgbe_int int_id) -+{ -+ unsigned int dma_ch_ier; -+ -+ dma_ch_ier = XGMAC_DMA_IOREAD(channel, DMA_CH_IER); -+ -+ switch (int_id) { -+ case XGMAC_INT_DMA_CH_SR_TI: -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1); -+ break; -+ case XGMAC_INT_DMA_CH_SR_TPS: -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TXSE, 1); -+ break; -+ case XGMAC_INT_DMA_CH_SR_TBU: -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TBUE, 1); -+ break; -+ case XGMAC_INT_DMA_CH_SR_RI: -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1); -+ break; -+ case XGMAC_INT_DMA_CH_SR_RBU: -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 1); -+ break; -+ case XGMAC_INT_DMA_CH_SR_RPS: -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RSE, 1); -+ break; -+ case XGMAC_INT_DMA_CH_SR_TI_RI: -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1); -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1); -+ break; -+ case XGMAC_INT_DMA_CH_SR_FBE: -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, FBEE, 1); -+ break; -+ case XGMAC_INT_DMA_ALL: -+ dma_ch_ier |= channel->saved_ier; -+ break; -+ default: -+ return -1; -+ } -+ -+ XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, dma_ch_ier); -+ -+ return 0; -+} -+ -+static int xgbe_disable_int(struct xgbe_channel *channel, -+ enum xgbe_int int_id) -+{ -+ unsigned int dma_ch_ier; -+ -+ dma_ch_ier = XGMAC_DMA_IOREAD(channel, DMA_CH_IER); -+ -+ switch (int_id) { -+ case XGMAC_INT_DMA_CH_SR_TI: -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 0); -+ break; -+ case XGMAC_INT_DMA_CH_SR_TPS: -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TXSE, 0); -+ break; -+ case XGMAC_INT_DMA_CH_SR_TBU: -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TBUE, 0); -+ break; -+ case XGMAC_INT_DMA_CH_SR_RI: -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 0); -+ break; -+ case XGMAC_INT_DMA_CH_SR_RBU: -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 0); -+ break; -+ case XGMAC_INT_DMA_CH_SR_RPS: -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RSE, 0); -+ break; -+ case XGMAC_INT_DMA_CH_SR_TI_RI: -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 0); -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 0); -+ break; -+ case XGMAC_INT_DMA_CH_SR_FBE: -+ XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, FBEE, 0); -+ break; -+ case XGMAC_INT_DMA_ALL: -+ channel->saved_ier = dma_ch_ier & XGBE_DMA_INTERRUPT_MASK; -+ dma_ch_ier &= ~XGBE_DMA_INTERRUPT_MASK; -+ break; -+ default: -+ return -1; -+ } -+ -+ XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, dma_ch_ier); -+ -+ return 0; -+} -+ -+static int xgbe_exit(struct xgbe_prv_data *pdata) -+{ -+ unsigned int count = 2000; -+ -+ DBGPR("-->xgbe_exit\n"); -+ -+ /* Issue a software reset */ -+ XGMAC_IOWRITE_BITS(pdata, DMA_MR, SWR, 1); -+ usleep_range(10, 15); -+ -+ /* Poll Until Poll Condition */ -+ while (count-- && XGMAC_IOREAD_BITS(pdata, DMA_MR, SWR)) -+ usleep_range(500, 600); -+ -+ if (!count) -+ return -EBUSY; -+ -+ DBGPR("<--xgbe_exit\n"); -+ -+ return 0; -+} -+ -+static int xgbe_flush_tx_queues(struct xgbe_prv_data *pdata) -+{ -+ unsigned int i, count; -+ -+ if (XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER) < 0x21) -+ return 0; -+ -+ for (i = 0; i < pdata->tx_q_count; i++) -+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, FTQ, 1); -+ -+ /* Poll Until Poll Condition */ -+ for (i = 0; i < pdata->tx_q_count; i++) { -+ count = 2000; -+ while (count-- && XGMAC_MTL_IOREAD_BITS(pdata, i, -+ MTL_Q_TQOMR, FTQ)) -+ usleep_range(500, 600); -+ -+ if (!count) -+ return -EBUSY; -+ } -+ -+ return 0; -+} -+ -+static void xgbe_config_dma_bus(struct xgbe_prv_data *pdata) -+{ -+ /* Set enhanced addressing mode */ -+ XGMAC_IOWRITE_BITS(pdata, DMA_SBMR, EAME, 1); -+ -+ /* Set the System Bus mode */ -+ XGMAC_IOWRITE_BITS(pdata, DMA_SBMR, UNDEF, 1); -+ XGMAC_IOWRITE_BITS(pdata, DMA_SBMR, BLEN_256, 1); -+} -+ -+static void xgbe_config_dma_cache(struct xgbe_prv_data *pdata) -+{ -+ unsigned int arcache, awcache; -+ -+ arcache = 0; -+ XGMAC_SET_BITS(arcache, DMA_AXIARCR, DRC, pdata->arcache); -+ XGMAC_SET_BITS(arcache, DMA_AXIARCR, DRD, pdata->axdomain); -+ XGMAC_SET_BITS(arcache, DMA_AXIARCR, TEC, pdata->arcache); -+ XGMAC_SET_BITS(arcache, DMA_AXIARCR, TED, pdata->axdomain); -+ XGMAC_SET_BITS(arcache, DMA_AXIARCR, THC, pdata->arcache); -+ XGMAC_SET_BITS(arcache, DMA_AXIARCR, THD, pdata->axdomain); -+ XGMAC_IOWRITE(pdata, DMA_AXIARCR, arcache); -+ -+ awcache = 0; -+ XGMAC_SET_BITS(awcache, DMA_AXIAWCR, DWC, pdata->awcache); -+ XGMAC_SET_BITS(awcache, DMA_AXIAWCR, DWD, pdata->axdomain); -+ XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RPC, pdata->awcache); -+ XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RPD, pdata->axdomain); -+ XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RHC, pdata->awcache); -+ XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RHD, pdata->axdomain); -+ XGMAC_SET_BITS(awcache, DMA_AXIAWCR, TDC, pdata->awcache); -+ XGMAC_SET_BITS(awcache, DMA_AXIAWCR, TDD, pdata->axdomain); -+ XGMAC_IOWRITE(pdata, DMA_AXIAWCR, awcache); -+} -+ -+static void xgbe_config_mtl_mode(struct xgbe_prv_data *pdata) -+{ -+ unsigned int i; -+ -+ /* Set Tx to weighted round robin scheduling algorithm */ -+ XGMAC_IOWRITE_BITS(pdata, MTL_OMR, ETSALG, MTL_ETSALG_WRR); -+ -+ /* Set Tx traffic classes to use WRR algorithm with equal weights */ -+ for (i = 0; i < pdata->hw_feat.tc_cnt; i++) { -+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_ETSCR, TSA, -+ MTL_TSA_ETS); -+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_QWR, QW, 1); -+ } -+ -+ /* Set Rx to strict priority algorithm */ -+ XGMAC_IOWRITE_BITS(pdata, MTL_OMR, RAA, MTL_RAA_SP); -+} -+ -+static unsigned int xgbe_calculate_per_queue_fifo(unsigned int fifo_size, -+ unsigned int queue_count) -+{ -+ unsigned int q_fifo_size = 0; -+ enum xgbe_mtl_fifo_size p_fifo = XGMAC_MTL_FIFO_SIZE_256; -+ -+ /* Calculate Tx/Rx fifo share per queue */ -+ switch (fifo_size) { -+ case 0: -+ q_fifo_size = XGBE_FIFO_SIZE_B(128); -+ break; -+ case 1: -+ q_fifo_size = XGBE_FIFO_SIZE_B(256); -+ break; -+ case 2: -+ q_fifo_size = XGBE_FIFO_SIZE_B(512); -+ break; -+ case 3: -+ q_fifo_size = XGBE_FIFO_SIZE_KB(1); -+ break; -+ case 4: -+ q_fifo_size = XGBE_FIFO_SIZE_KB(2); -+ break; -+ case 5: -+ q_fifo_size = XGBE_FIFO_SIZE_KB(4); -+ break; -+ case 6: -+ q_fifo_size = XGBE_FIFO_SIZE_KB(8); -+ break; -+ case 7: -+ q_fifo_size = XGBE_FIFO_SIZE_KB(16); -+ break; -+ case 8: -+ q_fifo_size = XGBE_FIFO_SIZE_KB(32); -+ break; -+ case 9: -+ q_fifo_size = XGBE_FIFO_SIZE_KB(64); -+ break; -+ case 10: -+ q_fifo_size = XGBE_FIFO_SIZE_KB(128); -+ break; -+ case 11: -+ q_fifo_size = XGBE_FIFO_SIZE_KB(256); -+ break; -+ } -+ -+ /* The configured value is not the actual amount of fifo RAM */ -+ q_fifo_size = min_t(unsigned int, XGBE_FIFO_MAX, q_fifo_size); -+ -+ q_fifo_size = q_fifo_size / queue_count; -+ -+ /* Set the queue fifo size programmable value */ -+ if (q_fifo_size >= XGBE_FIFO_SIZE_KB(256)) -+ p_fifo = XGMAC_MTL_FIFO_SIZE_256K; -+ else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(128)) -+ p_fifo = XGMAC_MTL_FIFO_SIZE_128K; -+ else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(64)) -+ p_fifo = XGMAC_MTL_FIFO_SIZE_64K; -+ else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(32)) -+ p_fifo = XGMAC_MTL_FIFO_SIZE_32K; -+ else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(16)) -+ p_fifo = XGMAC_MTL_FIFO_SIZE_16K; -+ else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(8)) -+ p_fifo = XGMAC_MTL_FIFO_SIZE_8K; -+ else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(4)) -+ p_fifo = XGMAC_MTL_FIFO_SIZE_4K; -+ else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(2)) -+ p_fifo = XGMAC_MTL_FIFO_SIZE_2K; -+ else if (q_fifo_size >= XGBE_FIFO_SIZE_KB(1)) -+ p_fifo = XGMAC_MTL_FIFO_SIZE_1K; -+ else if (q_fifo_size >= XGBE_FIFO_SIZE_B(512)) -+ p_fifo = XGMAC_MTL_FIFO_SIZE_512; -+ else if (q_fifo_size >= XGBE_FIFO_SIZE_B(256)) -+ p_fifo = XGMAC_MTL_FIFO_SIZE_256; -+ -+ return p_fifo; -+} -+ -+static void xgbe_config_tx_fifo_size(struct xgbe_prv_data *pdata) -+{ -+ enum xgbe_mtl_fifo_size fifo_size; -+ unsigned int i; -+ -+ fifo_size = xgbe_calculate_per_queue_fifo(pdata->hw_feat.tx_fifo_size, -+ pdata->tx_q_count); -+ -+ for (i = 0; i < pdata->tx_q_count; i++) -+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TQS, fifo_size); -+ -+ netdev_notice(pdata->netdev, "%d Tx queues, %d byte fifo per queue\n", -+ pdata->tx_q_count, ((fifo_size + 1) * 256)); -+} -+ -+static void xgbe_config_rx_fifo_size(struct xgbe_prv_data *pdata) -+{ -+ enum xgbe_mtl_fifo_size fifo_size; -+ unsigned int i; -+ -+ fifo_size = xgbe_calculate_per_queue_fifo(pdata->hw_feat.rx_fifo_size, -+ pdata->rx_q_count); -+ -+ for (i = 0; i < pdata->rx_q_count; i++) -+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RQS, fifo_size); -+ -+ netdev_notice(pdata->netdev, "%d Rx queues, %d byte fifo per queue\n", -+ pdata->rx_q_count, ((fifo_size + 1) * 256)); -+} -+ -+static void xgbe_config_queue_mapping(struct xgbe_prv_data *pdata) -+{ -+ unsigned int qptc, qptc_extra, queue; -+ unsigned int prio_queues; -+ unsigned int ppq, ppq_extra, prio; -+ unsigned int mask; -+ unsigned int i, j, reg, reg_val; -+ -+ /* Map the MTL Tx Queues to Traffic Classes -+ * Note: Tx Queues >= Traffic Classes -+ */ -+ qptc = pdata->tx_q_count / pdata->hw_feat.tc_cnt; -+ qptc_extra = pdata->tx_q_count % pdata->hw_feat.tc_cnt; -+ -+ for (i = 0, queue = 0; i < pdata->hw_feat.tc_cnt; i++) { -+ for (j = 0; j < qptc; j++) { -+ DBGPR(" TXq%u mapped to TC%u\n", queue, i); -+ XGMAC_MTL_IOWRITE_BITS(pdata, queue, MTL_Q_TQOMR, -+ Q2TCMAP, i); -+ pdata->q2tc_map[queue++] = i; -+ } -+ -+ if (i < qptc_extra) { -+ DBGPR(" TXq%u mapped to TC%u\n", queue, i); -+ XGMAC_MTL_IOWRITE_BITS(pdata, queue, MTL_Q_TQOMR, -+ Q2TCMAP, i); -+ pdata->q2tc_map[queue++] = i; -+ } -+ } -+ -+ /* Map the 8 VLAN priority values to available MTL Rx queues */ -+ prio_queues = min_t(unsigned int, IEEE_8021QAZ_MAX_TCS, -+ pdata->rx_q_count); -+ ppq = IEEE_8021QAZ_MAX_TCS / prio_queues; -+ ppq_extra = IEEE_8021QAZ_MAX_TCS % prio_queues; -+ -+ reg = MAC_RQC2R; -+ reg_val = 0; -+ for (i = 0, prio = 0; i < prio_queues;) { -+ mask = 0; -+ for (j = 0; j < ppq; j++) { -+ DBGPR(" PRIO%u mapped to RXq%u\n", prio, i); -+ mask |= (1 << prio); -+ pdata->prio2q_map[prio++] = i; -+ } -+ -+ if (i < ppq_extra) { -+ DBGPR(" PRIO%u mapped to RXq%u\n", prio, i); -+ mask |= (1 << prio); -+ pdata->prio2q_map[prio++] = i; -+ } -+ -+ reg_val |= (mask << ((i++ % MAC_RQC2_Q_PER_REG) << 3)); -+ -+ if ((i % MAC_RQC2_Q_PER_REG) && (i != prio_queues)) -+ continue; -+ -+ XGMAC_IOWRITE(pdata, reg, reg_val); -+ reg += MAC_RQC2_INC; -+ reg_val = 0; -+ } -+ -+ /* Select dynamic mapping of MTL Rx queue to DMA Rx channel */ -+ reg = MTL_RQDCM0R; -+ reg_val = 0; -+ for (i = 0; i < pdata->rx_q_count;) { -+ reg_val |= (0x80 << ((i++ % MTL_RQDCM_Q_PER_REG) << 3)); -+ -+ if ((i % MTL_RQDCM_Q_PER_REG) && (i != pdata->rx_q_count)) -+ continue; -+ -+ XGMAC_IOWRITE(pdata, reg, reg_val); -+ -+ reg += MTL_RQDCM_INC; -+ reg_val = 0; -+ } -+} -+ -+static void xgbe_config_flow_control_threshold(struct xgbe_prv_data *pdata) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < pdata->rx_q_count; i++) { -+ /* Activate flow control when less than 4k left in fifo */ -+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RFA, 2); -+ -+ /* De-activate flow control when more than 6k left in fifo */ -+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RFD, 4); -+ } -+} -+ -+static void xgbe_config_mac_address(struct xgbe_prv_data *pdata) -+{ -+ xgbe_set_mac_address(pdata, pdata->netdev->dev_addr); -+ -+ /* Filtering is done using perfect filtering and hash filtering */ -+ if (pdata->hw_feat.hash_table_size) { -+ XGMAC_IOWRITE_BITS(pdata, MAC_PFR, HPF, 1); -+ XGMAC_IOWRITE_BITS(pdata, MAC_PFR, HUC, 1); -+ XGMAC_IOWRITE_BITS(pdata, MAC_PFR, HMC, 1); -+ } -+} -+ -+static void xgbe_config_jumbo_enable(struct xgbe_prv_data *pdata) -+{ -+ unsigned int val; -+ -+ val = (pdata->netdev->mtu > XGMAC_STD_PACKET_MTU) ? 1 : 0; -+ -+ XGMAC_IOWRITE_BITS(pdata, MAC_RCR, JE, val); -+} -+ -+static void xgbe_config_mac_speed(struct xgbe_prv_data *pdata) -+{ -+ switch (pdata->phy_speed) { -+ case SPEED_10000: -+ xgbe_set_xgmii_speed(pdata); -+ break; -+ -+ case SPEED_2500: -+ xgbe_set_gmii_2500_speed(pdata); -+ break; -+ -+ case SPEED_1000: -+ xgbe_set_gmii_speed(pdata); -+ break; -+ } -+} -+ -+static void xgbe_config_checksum_offload(struct xgbe_prv_data *pdata) -+{ -+ if (pdata->netdev->features & NETIF_F_RXCSUM) -+ xgbe_enable_rx_csum(pdata); -+ else -+ xgbe_disable_rx_csum(pdata); -+} -+ -+static void xgbe_config_vlan_support(struct xgbe_prv_data *pdata) -+{ -+ /* Indicate that VLAN Tx CTAGs come from context descriptors */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_VLANIR, CSVL, 0); -+ XGMAC_IOWRITE_BITS(pdata, MAC_VLANIR, VLTI, 1); -+ -+ /* Set the current VLAN Hash Table register value */ -+ xgbe_update_vlan_hash_table(pdata); -+ -+ if (pdata->netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER) -+ xgbe_enable_rx_vlan_filtering(pdata); -+ else -+ xgbe_disable_rx_vlan_filtering(pdata); -+ -+ if (pdata->netdev->features & NETIF_F_HW_VLAN_CTAG_RX) -+ xgbe_enable_rx_vlan_stripping(pdata); -+ else -+ xgbe_disable_rx_vlan_stripping(pdata); -+} -+ -+static u64 xgbe_mmc_read(struct xgbe_prv_data *pdata, unsigned int reg_lo) -+{ -+ bool read_hi; -+ u64 val; -+ -+ switch (reg_lo) { -+ /* These registers are always 64 bit */ -+ case MMC_TXOCTETCOUNT_GB_LO: -+ case MMC_TXOCTETCOUNT_G_LO: -+ case MMC_RXOCTETCOUNT_GB_LO: -+ case MMC_RXOCTETCOUNT_G_LO: -+ read_hi = true; -+ break; -+ -+ default: -+ read_hi = false; -+ }; -+ -+ val = XGMAC_IOREAD(pdata, reg_lo); -+ -+ if (read_hi) -+ val |= ((u64)XGMAC_IOREAD(pdata, reg_lo + 4) << 32); -+ -+ return val; -+} -+ -+static void xgbe_tx_mmc_int(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_mmc_stats *stats = &pdata->mmc_stats; -+ unsigned int mmc_isr = XGMAC_IOREAD(pdata, MMC_TISR); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXOCTETCOUNT_GB)) -+ stats->txoctetcount_gb += -+ xgbe_mmc_read(pdata, MMC_TXOCTETCOUNT_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXFRAMECOUNT_GB)) -+ stats->txframecount_gb += -+ xgbe_mmc_read(pdata, MMC_TXFRAMECOUNT_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXBROADCASTFRAMES_G)) -+ stats->txbroadcastframes_g += -+ xgbe_mmc_read(pdata, MMC_TXBROADCASTFRAMES_G_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXMULTICASTFRAMES_G)) -+ stats->txmulticastframes_g += -+ xgbe_mmc_read(pdata, MMC_TXMULTICASTFRAMES_G_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX64OCTETS_GB)) -+ stats->tx64octets_gb += -+ xgbe_mmc_read(pdata, MMC_TX64OCTETS_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX65TO127OCTETS_GB)) -+ stats->tx65to127octets_gb += -+ xgbe_mmc_read(pdata, MMC_TX65TO127OCTETS_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX128TO255OCTETS_GB)) -+ stats->tx128to255octets_gb += -+ xgbe_mmc_read(pdata, MMC_TX128TO255OCTETS_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX256TO511OCTETS_GB)) -+ stats->tx256to511octets_gb += -+ xgbe_mmc_read(pdata, MMC_TX256TO511OCTETS_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX512TO1023OCTETS_GB)) -+ stats->tx512to1023octets_gb += -+ xgbe_mmc_read(pdata, MMC_TX512TO1023OCTETS_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX1024TOMAXOCTETS_GB)) -+ stats->tx1024tomaxoctets_gb += -+ xgbe_mmc_read(pdata, MMC_TX1024TOMAXOCTETS_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXUNICASTFRAMES_GB)) -+ stats->txunicastframes_gb += -+ xgbe_mmc_read(pdata, MMC_TXUNICASTFRAMES_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXMULTICASTFRAMES_GB)) -+ stats->txmulticastframes_gb += -+ xgbe_mmc_read(pdata, MMC_TXMULTICASTFRAMES_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXBROADCASTFRAMES_GB)) -+ stats->txbroadcastframes_g += -+ xgbe_mmc_read(pdata, MMC_TXBROADCASTFRAMES_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXUNDERFLOWERROR)) -+ stats->txunderflowerror += -+ xgbe_mmc_read(pdata, MMC_TXUNDERFLOWERROR_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXOCTETCOUNT_G)) -+ stats->txoctetcount_g += -+ xgbe_mmc_read(pdata, MMC_TXOCTETCOUNT_G_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXFRAMECOUNT_G)) -+ stats->txframecount_g += -+ xgbe_mmc_read(pdata, MMC_TXFRAMECOUNT_G_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXPAUSEFRAMES)) -+ stats->txpauseframes += -+ xgbe_mmc_read(pdata, MMC_TXPAUSEFRAMES_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXVLANFRAMES_G)) -+ stats->txvlanframes_g += -+ xgbe_mmc_read(pdata, MMC_TXVLANFRAMES_G_LO); -+} -+ -+static void xgbe_rx_mmc_int(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_mmc_stats *stats = &pdata->mmc_stats; -+ unsigned int mmc_isr = XGMAC_IOREAD(pdata, MMC_RISR); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXFRAMECOUNT_GB)) -+ stats->rxframecount_gb += -+ xgbe_mmc_read(pdata, MMC_RXFRAMECOUNT_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXOCTETCOUNT_GB)) -+ stats->rxoctetcount_gb += -+ xgbe_mmc_read(pdata, MMC_RXOCTETCOUNT_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXOCTETCOUNT_G)) -+ stats->rxoctetcount_g += -+ xgbe_mmc_read(pdata, MMC_RXOCTETCOUNT_G_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXBROADCASTFRAMES_G)) -+ stats->rxbroadcastframes_g += -+ xgbe_mmc_read(pdata, MMC_RXBROADCASTFRAMES_G_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXMULTICASTFRAMES_G)) -+ stats->rxmulticastframes_g += -+ xgbe_mmc_read(pdata, MMC_RXMULTICASTFRAMES_G_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXCRCERROR)) -+ stats->rxcrcerror += -+ xgbe_mmc_read(pdata, MMC_RXCRCERROR_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXRUNTERROR)) -+ stats->rxrunterror += -+ xgbe_mmc_read(pdata, MMC_RXRUNTERROR); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXJABBERERROR)) -+ stats->rxjabbererror += -+ xgbe_mmc_read(pdata, MMC_RXJABBERERROR); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXUNDERSIZE_G)) -+ stats->rxundersize_g += -+ xgbe_mmc_read(pdata, MMC_RXUNDERSIZE_G); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXOVERSIZE_G)) -+ stats->rxoversize_g += -+ xgbe_mmc_read(pdata, MMC_RXOVERSIZE_G); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX64OCTETS_GB)) -+ stats->rx64octets_gb += -+ xgbe_mmc_read(pdata, MMC_RX64OCTETS_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX65TO127OCTETS_GB)) -+ stats->rx65to127octets_gb += -+ xgbe_mmc_read(pdata, MMC_RX65TO127OCTETS_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX128TO255OCTETS_GB)) -+ stats->rx128to255octets_gb += -+ xgbe_mmc_read(pdata, MMC_RX128TO255OCTETS_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX256TO511OCTETS_GB)) -+ stats->rx256to511octets_gb += -+ xgbe_mmc_read(pdata, MMC_RX256TO511OCTETS_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX512TO1023OCTETS_GB)) -+ stats->rx512to1023octets_gb += -+ xgbe_mmc_read(pdata, MMC_RX512TO1023OCTETS_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX1024TOMAXOCTETS_GB)) -+ stats->rx1024tomaxoctets_gb += -+ xgbe_mmc_read(pdata, MMC_RX1024TOMAXOCTETS_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXUNICASTFRAMES_G)) -+ stats->rxunicastframes_g += -+ xgbe_mmc_read(pdata, MMC_RXUNICASTFRAMES_G_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXLENGTHERROR)) -+ stats->rxlengtherror += -+ xgbe_mmc_read(pdata, MMC_RXLENGTHERROR_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXOUTOFRANGETYPE)) -+ stats->rxoutofrangetype += -+ xgbe_mmc_read(pdata, MMC_RXOUTOFRANGETYPE_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXPAUSEFRAMES)) -+ stats->rxpauseframes += -+ xgbe_mmc_read(pdata, MMC_RXPAUSEFRAMES_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXFIFOOVERFLOW)) -+ stats->rxfifooverflow += -+ xgbe_mmc_read(pdata, MMC_RXFIFOOVERFLOW_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXVLANFRAMES_GB)) -+ stats->rxvlanframes_gb += -+ xgbe_mmc_read(pdata, MMC_RXVLANFRAMES_GB_LO); -+ -+ if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXWATCHDOGERROR)) -+ stats->rxwatchdogerror += -+ xgbe_mmc_read(pdata, MMC_RXWATCHDOGERROR); -+} -+ -+static void xgbe_read_mmc_stats(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_mmc_stats *stats = &pdata->mmc_stats; -+ -+ /* Freeze counters */ -+ XGMAC_IOWRITE_BITS(pdata, MMC_CR, MCF, 1); -+ -+ stats->txoctetcount_gb += -+ xgbe_mmc_read(pdata, MMC_TXOCTETCOUNT_GB_LO); -+ -+ stats->txframecount_gb += -+ xgbe_mmc_read(pdata, MMC_TXFRAMECOUNT_GB_LO); -+ -+ stats->txbroadcastframes_g += -+ xgbe_mmc_read(pdata, MMC_TXBROADCASTFRAMES_G_LO); -+ -+ stats->txmulticastframes_g += -+ xgbe_mmc_read(pdata, MMC_TXMULTICASTFRAMES_G_LO); -+ -+ stats->tx64octets_gb += -+ xgbe_mmc_read(pdata, MMC_TX64OCTETS_GB_LO); -+ -+ stats->tx65to127octets_gb += -+ xgbe_mmc_read(pdata, MMC_TX65TO127OCTETS_GB_LO); -+ -+ stats->tx128to255octets_gb += -+ xgbe_mmc_read(pdata, MMC_TX128TO255OCTETS_GB_LO); -+ -+ stats->tx256to511octets_gb += -+ xgbe_mmc_read(pdata, MMC_TX256TO511OCTETS_GB_LO); -+ -+ stats->tx512to1023octets_gb += -+ xgbe_mmc_read(pdata, MMC_TX512TO1023OCTETS_GB_LO); -+ -+ stats->tx1024tomaxoctets_gb += -+ xgbe_mmc_read(pdata, MMC_TX1024TOMAXOCTETS_GB_LO); -+ -+ stats->txunicastframes_gb += -+ xgbe_mmc_read(pdata, MMC_TXUNICASTFRAMES_GB_LO); -+ -+ stats->txmulticastframes_gb += -+ xgbe_mmc_read(pdata, MMC_TXMULTICASTFRAMES_GB_LO); -+ -+ stats->txbroadcastframes_g += -+ xgbe_mmc_read(pdata, MMC_TXBROADCASTFRAMES_GB_LO); -+ -+ stats->txunderflowerror += -+ xgbe_mmc_read(pdata, MMC_TXUNDERFLOWERROR_LO); -+ -+ stats->txoctetcount_g += -+ xgbe_mmc_read(pdata, MMC_TXOCTETCOUNT_G_LO); -+ -+ stats->txframecount_g += -+ xgbe_mmc_read(pdata, MMC_TXFRAMECOUNT_G_LO); -+ -+ stats->txpauseframes += -+ xgbe_mmc_read(pdata, MMC_TXPAUSEFRAMES_LO); -+ -+ stats->txvlanframes_g += -+ xgbe_mmc_read(pdata, MMC_TXVLANFRAMES_G_LO); -+ -+ stats->rxframecount_gb += -+ xgbe_mmc_read(pdata, MMC_RXFRAMECOUNT_GB_LO); -+ -+ stats->rxoctetcount_gb += -+ xgbe_mmc_read(pdata, MMC_RXOCTETCOUNT_GB_LO); -+ -+ stats->rxoctetcount_g += -+ xgbe_mmc_read(pdata, MMC_RXOCTETCOUNT_G_LO); -+ -+ stats->rxbroadcastframes_g += -+ xgbe_mmc_read(pdata, MMC_RXBROADCASTFRAMES_G_LO); -+ -+ stats->rxmulticastframes_g += -+ xgbe_mmc_read(pdata, MMC_RXMULTICASTFRAMES_G_LO); -+ -+ stats->rxcrcerror += -+ xgbe_mmc_read(pdata, MMC_RXCRCERROR_LO); -+ -+ stats->rxrunterror += -+ xgbe_mmc_read(pdata, MMC_RXRUNTERROR); -+ -+ stats->rxjabbererror += -+ xgbe_mmc_read(pdata, MMC_RXJABBERERROR); -+ -+ stats->rxundersize_g += -+ xgbe_mmc_read(pdata, MMC_RXUNDERSIZE_G); -+ -+ stats->rxoversize_g += -+ xgbe_mmc_read(pdata, MMC_RXOVERSIZE_G); -+ -+ stats->rx64octets_gb += -+ xgbe_mmc_read(pdata, MMC_RX64OCTETS_GB_LO); -+ -+ stats->rx65to127octets_gb += -+ xgbe_mmc_read(pdata, MMC_RX65TO127OCTETS_GB_LO); -+ -+ stats->rx128to255octets_gb += -+ xgbe_mmc_read(pdata, MMC_RX128TO255OCTETS_GB_LO); -+ -+ stats->rx256to511octets_gb += -+ xgbe_mmc_read(pdata, MMC_RX256TO511OCTETS_GB_LO); -+ -+ stats->rx512to1023octets_gb += -+ xgbe_mmc_read(pdata, MMC_RX512TO1023OCTETS_GB_LO); -+ -+ stats->rx1024tomaxoctets_gb += -+ xgbe_mmc_read(pdata, MMC_RX1024TOMAXOCTETS_GB_LO); -+ -+ stats->rxunicastframes_g += -+ xgbe_mmc_read(pdata, MMC_RXUNICASTFRAMES_G_LO); -+ -+ stats->rxlengtherror += -+ xgbe_mmc_read(pdata, MMC_RXLENGTHERROR_LO); -+ -+ stats->rxoutofrangetype += -+ xgbe_mmc_read(pdata, MMC_RXOUTOFRANGETYPE_LO); -+ -+ stats->rxpauseframes += -+ xgbe_mmc_read(pdata, MMC_RXPAUSEFRAMES_LO); -+ -+ stats->rxfifooverflow += -+ xgbe_mmc_read(pdata, MMC_RXFIFOOVERFLOW_LO); -+ -+ stats->rxvlanframes_gb += -+ xgbe_mmc_read(pdata, MMC_RXVLANFRAMES_GB_LO); -+ -+ stats->rxwatchdogerror += -+ xgbe_mmc_read(pdata, MMC_RXWATCHDOGERROR); -+ -+ /* Un-freeze counters */ -+ XGMAC_IOWRITE_BITS(pdata, MMC_CR, MCF, 0); -+} -+ -+static void xgbe_config_mmc(struct xgbe_prv_data *pdata) -+{ -+ /* Set counters to reset on read */ -+ XGMAC_IOWRITE_BITS(pdata, MMC_CR, ROR, 1); -+ -+ /* Reset the counters */ -+ XGMAC_IOWRITE_BITS(pdata, MMC_CR, CR, 1); -+} -+ -+static void xgbe_prepare_tx_stop(struct xgbe_prv_data *pdata, -+ struct xgbe_channel *channel) -+{ -+ unsigned int tx_dsr, tx_pos, tx_qidx; -+ unsigned int tx_status; -+ unsigned long tx_timeout; -+ -+ /* Calculate the status register to read and the position within */ -+ if (channel->queue_index < DMA_DSRX_FIRST_QUEUE) { -+ tx_dsr = DMA_DSR0; -+ tx_pos = (channel->queue_index * DMA_DSR_Q_WIDTH) + -+ DMA_DSR0_TPS_START; -+ } else { -+ tx_qidx = channel->queue_index - DMA_DSRX_FIRST_QUEUE; -+ -+ tx_dsr = DMA_DSR1 + ((tx_qidx / DMA_DSRX_QPR) * DMA_DSRX_INC); -+ tx_pos = ((tx_qidx % DMA_DSRX_QPR) * DMA_DSR_Q_WIDTH) + -+ DMA_DSRX_TPS_START; -+ } -+ -+ /* The Tx engine cannot be stopped if it is actively processing -+ * descriptors. Wait for the Tx engine to enter the stopped or -+ * suspended state. Don't wait forever though... -+ */ -+ tx_timeout = jiffies + (XGBE_DMA_STOP_TIMEOUT * HZ); -+ while (time_before(jiffies, tx_timeout)) { -+ tx_status = XGMAC_IOREAD(pdata, tx_dsr); -+ tx_status = GET_BITS(tx_status, tx_pos, DMA_DSR_TPS_WIDTH); -+ if ((tx_status == DMA_TPS_STOPPED) || -+ (tx_status == DMA_TPS_SUSPENDED)) -+ break; -+ -+ usleep_range(500, 1000); -+ } -+ -+ if (!time_before(jiffies, tx_timeout)) -+ netdev_info(pdata->netdev, -+ "timed out waiting for Tx DMA channel %u to stop\n", -+ channel->queue_index); -+} -+ -+static void xgbe_enable_tx(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ /* Enable each Tx DMA channel */ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->tx_ring) -+ break; -+ -+ XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, ST, 1); -+ } -+ -+ /* Enable each Tx queue */ -+ for (i = 0; i < pdata->tx_q_count; i++) -+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TXQEN, -+ MTL_Q_ENABLED); -+ -+ /* Enable MAC Tx */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_TCR, TE, 1); -+} -+ -+static void xgbe_disable_tx(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ /* Prepare for Tx DMA channel stop */ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->tx_ring) -+ break; -+ -+ xgbe_prepare_tx_stop(pdata, channel); -+ } -+ -+ /* Disable MAC Tx */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_TCR, TE, 0); -+ -+ /* Disable each Tx queue */ -+ for (i = 0; i < pdata->tx_q_count; i++) -+ XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TXQEN, 0); -+ -+ /* Disable each Tx DMA channel */ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->tx_ring) -+ break; -+ -+ XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, ST, 0); -+ } -+} -+ -+static void xgbe_enable_rx(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int reg_val, i; -+ -+ /* Enable each Rx DMA channel */ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->rx_ring) -+ break; -+ -+ XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 1); -+ } -+ -+ /* Enable each Rx queue */ -+ reg_val = 0; -+ for (i = 0; i < pdata->rx_q_count; i++) -+ reg_val |= (0x02 << (i << 1)); -+ XGMAC_IOWRITE(pdata, MAC_RQC0R, reg_val); -+ -+ /* Enable MAC Rx */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_RCR, DCRCC, 1); -+ XGMAC_IOWRITE_BITS(pdata, MAC_RCR, CST, 1); -+ XGMAC_IOWRITE_BITS(pdata, MAC_RCR, ACS, 1); -+ XGMAC_IOWRITE_BITS(pdata, MAC_RCR, RE, 1); -+} -+ -+static void xgbe_disable_rx(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ /* Disable MAC Rx */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_RCR, DCRCC, 0); -+ XGMAC_IOWRITE_BITS(pdata, MAC_RCR, CST, 0); -+ XGMAC_IOWRITE_BITS(pdata, MAC_RCR, ACS, 0); -+ XGMAC_IOWRITE_BITS(pdata, MAC_RCR, RE, 0); -+ -+ /* Disable each Rx queue */ -+ XGMAC_IOWRITE(pdata, MAC_RQC0R, 0); -+ -+ /* Disable each Rx DMA channel */ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->rx_ring) -+ break; -+ -+ XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 0); -+ } -+} -+ -+static void xgbe_powerup_tx(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ /* Enable each Tx DMA channel */ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->tx_ring) -+ break; -+ -+ XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, ST, 1); -+ } -+ -+ /* Enable MAC Tx */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_TCR, TE, 1); -+} -+ -+static void xgbe_powerdown_tx(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ /* Prepare for Tx DMA channel stop */ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->tx_ring) -+ break; -+ -+ xgbe_prepare_tx_stop(pdata, channel); -+ } -+ -+ /* Disable MAC Tx */ -+ XGMAC_IOWRITE_BITS(pdata, MAC_TCR, TE, 0); -+ -+ /* Disable each Tx DMA channel */ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->tx_ring) -+ break; -+ -+ XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, ST, 0); -+ } -+} -+ -+static void xgbe_powerup_rx(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ /* Enable each Rx DMA channel */ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->rx_ring) -+ break; -+ -+ XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 1); -+ } -+} -+ -+static void xgbe_powerdown_rx(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ /* Disable each Rx DMA channel */ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->rx_ring) -+ break; -+ -+ XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 0); -+ } -+} -+ -+static int xgbe_init(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_desc_if *desc_if = &pdata->desc_if; -+ int ret; -+ -+ DBGPR("-->xgbe_init\n"); -+ -+ /* Flush Tx queues */ -+ ret = xgbe_flush_tx_queues(pdata); -+ if (ret) -+ return ret; -+ -+ /* -+ * Initialize DMA related features -+ */ -+ xgbe_config_dma_bus(pdata); -+ xgbe_config_dma_cache(pdata); -+ xgbe_config_osp_mode(pdata); -+ xgbe_config_pblx8(pdata); -+ xgbe_config_tx_pbl_val(pdata); -+ xgbe_config_rx_pbl_val(pdata); -+ xgbe_config_rx_coalesce(pdata); -+ xgbe_config_tx_coalesce(pdata); -+ xgbe_config_rx_buffer_size(pdata); -+ xgbe_config_tso_mode(pdata); -+ xgbe_config_sph_mode(pdata); -+ xgbe_config_rss(pdata); -+ desc_if->wrapper_tx_desc_init(pdata); -+ desc_if->wrapper_rx_desc_init(pdata); -+ xgbe_enable_dma_interrupts(pdata); -+ -+ /* -+ * Initialize MTL related features -+ */ -+ xgbe_config_mtl_mode(pdata); -+ xgbe_config_queue_mapping(pdata); -+ xgbe_config_tsf_mode(pdata, pdata->tx_sf_mode); -+ xgbe_config_rsf_mode(pdata, pdata->rx_sf_mode); -+ xgbe_config_tx_threshold(pdata, pdata->tx_threshold); -+ xgbe_config_rx_threshold(pdata, pdata->rx_threshold); -+ xgbe_config_tx_fifo_size(pdata); -+ xgbe_config_rx_fifo_size(pdata); -+ xgbe_config_flow_control_threshold(pdata); -+ /*TODO: Error Packet and undersized good Packet forwarding enable -+ (FEP and FUP) -+ */ -+ xgbe_config_dcb_tc(pdata); -+ xgbe_config_dcb_pfc(pdata); -+ xgbe_enable_mtl_interrupts(pdata); -+ -+ /* -+ * Initialize MAC related features -+ */ -+ xgbe_config_mac_address(pdata); -+ xgbe_config_jumbo_enable(pdata); -+ xgbe_config_flow_control(pdata); -+ xgbe_config_mac_speed(pdata); -+ xgbe_config_checksum_offload(pdata); -+ xgbe_config_vlan_support(pdata); -+ xgbe_config_mmc(pdata); -+ xgbe_enable_mac_interrupts(pdata); -+ -+ DBGPR("<--xgbe_init\n"); -+ -+ return 0; -+} -+ -+void xgbe_a0_init_function_ptrs_dev(struct xgbe_hw_if *hw_if) -+{ -+ DBGPR("-->xgbe_a0_init_function_ptrs\n"); -+ -+ hw_if->tx_complete = xgbe_tx_complete; -+ -+ hw_if->set_promiscuous_mode = xgbe_set_promiscuous_mode; -+ hw_if->set_all_multicast_mode = xgbe_set_all_multicast_mode; -+ hw_if->add_mac_addresses = xgbe_add_mac_addresses; -+ hw_if->set_mac_address = xgbe_set_mac_address; -+ -+ hw_if->enable_rx_csum = xgbe_enable_rx_csum; -+ hw_if->disable_rx_csum = xgbe_disable_rx_csum; -+ -+ hw_if->enable_rx_vlan_stripping = xgbe_enable_rx_vlan_stripping; -+ hw_if->disable_rx_vlan_stripping = xgbe_disable_rx_vlan_stripping; -+ hw_if->enable_rx_vlan_filtering = xgbe_enable_rx_vlan_filtering; -+ hw_if->disable_rx_vlan_filtering = xgbe_disable_rx_vlan_filtering; -+ hw_if->update_vlan_hash_table = xgbe_update_vlan_hash_table; -+ -+ hw_if->read_mmd_regs = xgbe_read_mmd_regs; -+ hw_if->write_mmd_regs = xgbe_write_mmd_regs; -+ -+ hw_if->set_gmii_speed = xgbe_set_gmii_speed; -+ hw_if->set_gmii_2500_speed = xgbe_set_gmii_2500_speed; -+ hw_if->set_xgmii_speed = xgbe_set_xgmii_speed; -+ -+ hw_if->enable_tx = xgbe_enable_tx; -+ hw_if->disable_tx = xgbe_disable_tx; -+ hw_if->enable_rx = xgbe_enable_rx; -+ hw_if->disable_rx = xgbe_disable_rx; -+ -+ hw_if->powerup_tx = xgbe_powerup_tx; -+ hw_if->powerdown_tx = xgbe_powerdown_tx; -+ hw_if->powerup_rx = xgbe_powerup_rx; -+ hw_if->powerdown_rx = xgbe_powerdown_rx; -+ -+ hw_if->dev_xmit = xgbe_dev_xmit; -+ hw_if->dev_read = xgbe_dev_read; -+ hw_if->enable_int = xgbe_enable_int; -+ hw_if->disable_int = xgbe_disable_int; -+ hw_if->init = xgbe_init; -+ hw_if->exit = xgbe_exit; -+ -+ /* Descriptor related Sequences have to be initialized here */ -+ hw_if->tx_desc_init = xgbe_tx_desc_init; -+ hw_if->rx_desc_init = xgbe_rx_desc_init; -+ hw_if->tx_desc_reset = xgbe_tx_desc_reset; -+ hw_if->rx_desc_reset = xgbe_rx_desc_reset; -+ hw_if->is_last_desc = xgbe_is_last_desc; -+ hw_if->is_context_desc = xgbe_is_context_desc; -+ hw_if->tx_start_xmit = xgbe_tx_start_xmit; -+ -+ /* For FLOW ctrl */ -+ hw_if->config_tx_flow_control = xgbe_config_tx_flow_control; -+ hw_if->config_rx_flow_control = xgbe_config_rx_flow_control; -+ -+ /* For RX coalescing */ -+ hw_if->config_rx_coalesce = xgbe_config_rx_coalesce; -+ hw_if->config_tx_coalesce = xgbe_config_tx_coalesce; -+ hw_if->usec_to_riwt = xgbe_usec_to_riwt; -+ hw_if->riwt_to_usec = xgbe_riwt_to_usec; -+ -+ /* For RX and TX threshold config */ -+ hw_if->config_rx_threshold = xgbe_config_rx_threshold; -+ hw_if->config_tx_threshold = xgbe_config_tx_threshold; -+ -+ /* For RX and TX Store and Forward Mode config */ -+ hw_if->config_rsf_mode = xgbe_config_rsf_mode; -+ hw_if->config_tsf_mode = xgbe_config_tsf_mode; -+ -+ /* For TX DMA Operating on Second Frame config */ -+ hw_if->config_osp_mode = xgbe_config_osp_mode; -+ -+ /* For RX and TX PBL config */ -+ hw_if->config_rx_pbl_val = xgbe_config_rx_pbl_val; -+ hw_if->get_rx_pbl_val = xgbe_get_rx_pbl_val; -+ hw_if->config_tx_pbl_val = xgbe_config_tx_pbl_val; -+ hw_if->get_tx_pbl_val = xgbe_get_tx_pbl_val; -+ hw_if->config_pblx8 = xgbe_config_pblx8; -+ -+ /* For MMC statistics support */ -+ hw_if->tx_mmc_int = xgbe_tx_mmc_int; -+ hw_if->rx_mmc_int = xgbe_rx_mmc_int; -+ hw_if->read_mmc_stats = xgbe_read_mmc_stats; -+ -+ /* For PTP config */ -+ hw_if->config_tstamp = xgbe_config_tstamp; -+ hw_if->update_tstamp_addend = xgbe_update_tstamp_addend; -+ hw_if->set_tstamp_time = xgbe_set_tstamp_time; -+ hw_if->get_tstamp_time = xgbe_get_tstamp_time; -+ hw_if->get_tx_tstamp = xgbe_get_tx_tstamp; -+ -+ /* For Data Center Bridging config */ -+ hw_if->config_dcb_tc = xgbe_config_dcb_tc; -+ hw_if->config_dcb_pfc = xgbe_config_dcb_pfc; -+ -+ /* For Receive Side Scaling */ -+ hw_if->enable_rss = xgbe_enable_rss; -+ hw_if->disable_rss = xgbe_disable_rss; -+ hw_if->set_rss_hash_key = xgbe_set_rss_hash_key; -+ hw_if->set_rss_lookup_table = xgbe_set_rss_lookup_table; -+ -+ DBGPR("<--xgbe_a0_init_function_ptrs\n"); -+} -diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-drv.c b/drivers/net/ethernet/amd/xgbe-a0/xgbe-drv.c -new file mode 100644 -index 0000000..ca4af9e ---- /dev/null -+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-drv.c -@@ -0,0 +1,2218 @@ -+/* -+ * AMD 10Gb Ethernet driver -+ * -+ * This file is available to you under your choice of the following two -+ * licenses: -+ * -+ * License 1: GPLv2 -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * -+ * This file is free software; you may copy, redistribute and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation, either version 2 of the License, or (at -+ * your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program. If not, see . -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * -+ * License 2: Modified BSD -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions are met: -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * * Neither the name of Advanced Micro Devices, Inc. nor the -+ * names of its contributors may be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY -+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "xgbe.h" -+#include "xgbe-common.h" -+ -+static int xgbe_one_poll(struct napi_struct *, int); -+static int xgbe_all_poll(struct napi_struct *, int); -+static void xgbe_set_rx_mode(struct net_device *); -+ -+static int xgbe_alloc_channels(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel_mem, *channel; -+ struct xgbe_ring *tx_ring, *rx_ring; -+ unsigned int count, i; -+ int ret = -ENOMEM; -+ -+ count = max_t(unsigned int, pdata->tx_ring_count, pdata->rx_ring_count); -+ -+ channel_mem = kcalloc(count, sizeof(struct xgbe_channel), GFP_KERNEL); -+ if (!channel_mem) -+ goto err_channel; -+ -+ tx_ring = kcalloc(pdata->tx_ring_count, sizeof(struct xgbe_ring), -+ GFP_KERNEL); -+ if (!tx_ring) -+ goto err_tx_ring; -+ -+ rx_ring = kcalloc(pdata->rx_ring_count, sizeof(struct xgbe_ring), -+ GFP_KERNEL); -+ if (!rx_ring) -+ goto err_rx_ring; -+ -+ for (i = 0, channel = channel_mem; i < count; i++, channel++) { -+ snprintf(channel->name, sizeof(channel->name), "channel-%d", i); -+ channel->pdata = pdata; -+ channel->queue_index = i; -+ channel->dma_regs = pdata->xgmac_regs + DMA_CH_BASE + -+ (DMA_CH_INC * i); -+ -+ if (pdata->per_channel_irq) { -+ /* Get the DMA interrupt (offset 1) */ -+ ret = platform_get_irq(pdata->pdev, i + 1); -+ if (ret < 0) { -+ netdev_err(pdata->netdev, -+ "platform_get_irq %u failed\n", -+ i + 1); -+ goto err_irq; -+ } -+ -+ channel->dma_irq = ret; -+ } -+ -+ if (i < pdata->tx_ring_count) { -+ spin_lock_init(&tx_ring->lock); -+ channel->tx_ring = tx_ring++; -+ } -+ -+ if (i < pdata->rx_ring_count) { -+ spin_lock_init(&rx_ring->lock); -+ channel->rx_ring = rx_ring++; -+ } -+ -+ DBGPR(" %s: queue=%u, dma_regs=%p, dma_irq=%d, tx=%p, rx=%p\n", -+ channel->name, channel->queue_index, channel->dma_regs, -+ channel->dma_irq, channel->tx_ring, channel->rx_ring); -+ } -+ -+ pdata->channel = channel_mem; -+ pdata->channel_count = count; -+ -+ return 0; -+ -+err_irq: -+ kfree(rx_ring); -+ -+err_rx_ring: -+ kfree(tx_ring); -+ -+err_tx_ring: -+ kfree(channel_mem); -+ -+err_channel: -+ return ret; -+} -+ -+static void xgbe_free_channels(struct xgbe_prv_data *pdata) -+{ -+ if (!pdata->channel) -+ return; -+ -+ kfree(pdata->channel->rx_ring); -+ kfree(pdata->channel->tx_ring); -+ kfree(pdata->channel); -+ -+ pdata->channel = NULL; -+ pdata->channel_count = 0; -+} -+ -+static inline unsigned int xgbe_tx_avail_desc(struct xgbe_ring *ring) -+{ -+ return (ring->rdesc_count - (ring->cur - ring->dirty)); -+} -+ -+static inline unsigned int xgbe_rx_dirty_desc(struct xgbe_ring *ring) -+{ -+ return (ring->cur - ring->dirty); -+} -+ -+static int xgbe_maybe_stop_tx_queue(struct xgbe_channel *channel, -+ struct xgbe_ring *ring, unsigned int count) -+{ -+ struct xgbe_prv_data *pdata = channel->pdata; -+ -+ if (count > xgbe_tx_avail_desc(ring)) { -+ DBGPR(" Tx queue stopped, not enough descriptors available\n"); -+ netif_stop_subqueue(pdata->netdev, channel->queue_index); -+ ring->tx.queue_stopped = 1; -+ -+ /* If we haven't notified the hardware because of xmit_more -+ * support, tell it now -+ */ -+ if (ring->tx.xmit_more) -+ pdata->hw_if.tx_start_xmit(channel, ring); -+ -+ return NETDEV_TX_BUSY; -+ } -+ -+ return 0; -+} -+ -+static int xgbe_calc_rx_buf_size(struct net_device *netdev, unsigned int mtu) -+{ -+ unsigned int rx_buf_size; -+ -+ if (mtu > XGMAC_JUMBO_PACKET_MTU) { -+ netdev_alert(netdev, "MTU exceeds maximum supported value\n"); -+ return -EINVAL; -+ } -+ -+ rx_buf_size = mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; -+ rx_buf_size = clamp_val(rx_buf_size, XGBE_RX_MIN_BUF_SIZE, PAGE_SIZE); -+ -+ rx_buf_size = (rx_buf_size + XGBE_RX_BUF_ALIGN - 1) & -+ ~(XGBE_RX_BUF_ALIGN - 1); -+ -+ return rx_buf_size; -+} -+ -+static void xgbe_enable_rx_tx_ints(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ struct xgbe_channel *channel; -+ enum xgbe_int int_id; -+ unsigned int i; -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (channel->tx_ring && channel->rx_ring) -+ int_id = XGMAC_INT_DMA_CH_SR_TI_RI; -+ else if (channel->tx_ring) -+ int_id = XGMAC_INT_DMA_CH_SR_TI; -+ else if (channel->rx_ring) -+ int_id = XGMAC_INT_DMA_CH_SR_RI; -+ else -+ continue; -+ -+ hw_if->enable_int(channel, int_id); -+ } -+} -+ -+static void xgbe_disable_rx_tx_ints(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ struct xgbe_channel *channel; -+ enum xgbe_int int_id; -+ unsigned int i; -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (channel->tx_ring && channel->rx_ring) -+ int_id = XGMAC_INT_DMA_CH_SR_TI_RI; -+ else if (channel->tx_ring) -+ int_id = XGMAC_INT_DMA_CH_SR_TI; -+ else if (channel->rx_ring) -+ int_id = XGMAC_INT_DMA_CH_SR_RI; -+ else -+ continue; -+ -+ hw_if->disable_int(channel, int_id); -+ } -+} -+ -+static irqreturn_t xgbe_isr(int irq, void *data) -+{ -+ struct xgbe_prv_data *pdata = data; -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ struct xgbe_channel *channel; -+ unsigned int dma_isr, dma_ch_isr; -+ unsigned int mac_isr, mac_tssr; -+ unsigned int i; -+ -+ /* The DMA interrupt status register also reports MAC and MTL -+ * interrupts. So for polling mode, we just need to check for -+ * this register to be non-zero -+ */ -+ dma_isr = XGMAC_IOREAD(pdata, DMA_ISR); -+ if (!dma_isr) -+ goto isr_done; -+ -+ DBGPR(" DMA_ISR = %08x\n", dma_isr); -+ -+ for (i = 0; i < pdata->channel_count; i++) { -+ if (!(dma_isr & (1 << i))) -+ continue; -+ -+ channel = pdata->channel + i; -+ -+ dma_ch_isr = XGMAC_DMA_IOREAD(channel, DMA_CH_SR); -+ DBGPR(" DMA_CH%u_ISR = %08x\n", i, dma_ch_isr); -+ -+ /* The TI or RI interrupt bits may still be set even if using -+ * per channel DMA interrupts. Check to be sure those are not -+ * enabled before using the private data napi structure. -+ */ -+ if (!pdata->per_channel_irq && -+ (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, TI) || -+ XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RI))) { -+ if (napi_schedule_prep(&pdata->napi)) { -+ /* Disable Tx and Rx interrupts */ -+ xgbe_disable_rx_tx_ints(pdata); -+ -+ /* Turn on polling */ -+ __napi_schedule(&pdata->napi); -+ } -+ } -+ -+ /* Restart the device on a Fatal Bus Error */ -+ if (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, FBE)) -+ schedule_work(&pdata->restart_work); -+ -+ /* Clear all interrupt signals */ -+ XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_ch_isr); -+ } -+ -+ if (XGMAC_GET_BITS(dma_isr, DMA_ISR, MACIS)) { -+ mac_isr = XGMAC_IOREAD(pdata, MAC_ISR); -+ -+ if (XGMAC_GET_BITS(mac_isr, MAC_ISR, MMCTXIS)) -+ hw_if->tx_mmc_int(pdata); -+ -+ if (XGMAC_GET_BITS(mac_isr, MAC_ISR, MMCRXIS)) -+ hw_if->rx_mmc_int(pdata); -+ -+ if (XGMAC_GET_BITS(mac_isr, MAC_ISR, TSIS)) { -+ mac_tssr = XGMAC_IOREAD(pdata, MAC_TSSR); -+ -+ if (XGMAC_GET_BITS(mac_tssr, MAC_TSSR, TXTSC)) { -+ /* Read Tx Timestamp to clear interrupt */ -+ pdata->tx_tstamp = -+ hw_if->get_tx_tstamp(pdata); -+ schedule_work(&pdata->tx_tstamp_work); -+ } -+ } -+ } -+ -+ DBGPR(" DMA_ISR = %08x\n", XGMAC_IOREAD(pdata, DMA_ISR)); -+ -+isr_done: -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t xgbe_dma_isr(int irq, void *data) -+{ -+ struct xgbe_channel *channel = data; -+ -+ /* Per channel DMA interrupts are enabled, so we use the per -+ * channel napi structure and not the private data napi structure -+ */ -+ if (napi_schedule_prep(&channel->napi)) { -+ /* Disable Tx and Rx interrupts */ -+ disable_irq_nosync(channel->dma_irq); -+ -+ /* Turn on polling */ -+ __napi_schedule(&channel->napi); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static enum hrtimer_restart xgbe_tx_timer(struct hrtimer *timer) -+{ -+ struct xgbe_channel *channel = container_of(timer, -+ struct xgbe_channel, -+ tx_timer); -+ struct xgbe_prv_data *pdata = channel->pdata; -+ struct napi_struct *napi; -+ -+ DBGPR("-->xgbe_tx_timer\n"); -+ -+ napi = (pdata->per_channel_irq) ? &channel->napi : &pdata->napi; -+ -+ if (napi_schedule_prep(napi)) { -+ /* Disable Tx and Rx interrupts */ -+ if (pdata->per_channel_irq) -+ disable_irq(channel->dma_irq); -+ else -+ xgbe_disable_rx_tx_ints(pdata); -+ -+ /* Turn on polling */ -+ __napi_schedule(napi); -+ } -+ -+ channel->tx_timer_active = 0; -+ -+ DBGPR("<--xgbe_tx_timer\n"); -+ -+ return HRTIMER_NORESTART; -+} -+ -+static void xgbe_init_tx_timers(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ DBGPR("-->xgbe_init_tx_timers\n"); -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->tx_ring) -+ break; -+ -+ DBGPR(" %s adding tx timer\n", channel->name); -+ hrtimer_init(&channel->tx_timer, CLOCK_MONOTONIC, -+ HRTIMER_MODE_REL); -+ channel->tx_timer.function = xgbe_tx_timer; -+ } -+ -+ DBGPR("<--xgbe_init_tx_timers\n"); -+} -+ -+static void xgbe_stop_tx_timers(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ DBGPR("-->xgbe_stop_tx_timers\n"); -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->tx_ring) -+ break; -+ -+ DBGPR(" %s deleting tx timer\n", channel->name); -+ channel->tx_timer_active = 0; -+ hrtimer_cancel(&channel->tx_timer); -+ } -+ -+ DBGPR("<--xgbe_stop_tx_timers\n"); -+} -+ -+void xgbe_a0_get_all_hw_features(struct xgbe_prv_data *pdata) -+{ -+ unsigned int mac_hfr0, mac_hfr1, mac_hfr2; -+ struct xgbe_hw_features *hw_feat = &pdata->hw_feat; -+ -+ DBGPR("-->xgbe_a0_get_all_hw_features\n"); -+ -+ mac_hfr0 = XGMAC_IOREAD(pdata, MAC_HWF0R); -+ mac_hfr1 = XGMAC_IOREAD(pdata, MAC_HWF1R); -+ mac_hfr2 = XGMAC_IOREAD(pdata, MAC_HWF2R); -+ -+ memset(hw_feat, 0, sizeof(*hw_feat)); -+ -+ hw_feat->version = XGMAC_IOREAD(pdata, MAC_VR); -+ -+ /* Hardware feature register 0 */ -+ hw_feat->gmii = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, GMIISEL); -+ hw_feat->vlhash = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, VLHASH); -+ hw_feat->sma = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, SMASEL); -+ hw_feat->rwk = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, RWKSEL); -+ hw_feat->mgk = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, MGKSEL); -+ hw_feat->mmc = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, MMCSEL); -+ hw_feat->aoe = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, ARPOFFSEL); -+ hw_feat->ts = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TSSEL); -+ hw_feat->eee = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, EEESEL); -+ hw_feat->tx_coe = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TXCOESEL); -+ hw_feat->rx_coe = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, RXCOESEL); -+ hw_feat->addn_mac = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, -+ ADDMACADRSEL); -+ hw_feat->ts_src = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TSSTSSEL); -+ hw_feat->sa_vlan_ins = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, SAVLANINS); -+ -+ /* Hardware feature register 1 */ -+ hw_feat->rx_fifo_size = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, -+ RXFIFOSIZE); -+ hw_feat->tx_fifo_size = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, -+ TXFIFOSIZE); -+ hw_feat->dcb = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, DCBEN); -+ hw_feat->sph = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, SPHEN); -+ hw_feat->tso = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, TSOEN); -+ hw_feat->dma_debug = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, DBGMEMA); -+ hw_feat->rss = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, RSSEN); -+ hw_feat->tc_cnt = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, NUMTC); -+ hw_feat->hash_table_size = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, -+ HASHTBLSZ); -+ hw_feat->l3l4_filter_num = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, -+ L3L4FNUM); -+ -+ /* Hardware feature register 2 */ -+ hw_feat->rx_q_cnt = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, RXQCNT); -+ hw_feat->tx_q_cnt = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, TXQCNT); -+ hw_feat->rx_ch_cnt = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, RXCHCNT); -+ hw_feat->tx_ch_cnt = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, TXCHCNT); -+ hw_feat->pps_out_num = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, PPSOUTNUM); -+ hw_feat->aux_snap_num = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, AUXSNAPNUM); -+ -+ /* Translate the Hash Table size into actual number */ -+ switch (hw_feat->hash_table_size) { -+ case 0: -+ break; -+ case 1: -+ hw_feat->hash_table_size = 64; -+ break; -+ case 2: -+ hw_feat->hash_table_size = 128; -+ break; -+ case 3: -+ hw_feat->hash_table_size = 256; -+ break; -+ } -+ -+ /* The Queue, Channel and TC counts are zero based so increment them -+ * to get the actual number -+ */ -+ hw_feat->rx_q_cnt++; -+ hw_feat->tx_q_cnt++; -+ hw_feat->rx_ch_cnt++; -+ hw_feat->tx_ch_cnt++; -+ hw_feat->tc_cnt++; -+ -+#define XGBE_TC_CNT 2 -+ hw_feat->tc_cnt = XGBE_TC_CNT; -+ -+ DBGPR("<--xgbe_a0_get_all_hw_features\n"); -+} -+ -+static void xgbe_napi_enable(struct xgbe_prv_data *pdata, unsigned int add) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ if (pdata->per_channel_irq) { -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (add) -+ netif_napi_add(pdata->netdev, &channel->napi, -+ xgbe_one_poll, NAPI_POLL_WEIGHT); -+ -+ napi_enable(&channel->napi); -+ } -+ } else { -+ if (add) -+ netif_napi_add(pdata->netdev, &pdata->napi, -+ xgbe_all_poll, NAPI_POLL_WEIGHT); -+ -+ napi_enable(&pdata->napi); -+ } -+} -+ -+static void xgbe_napi_disable(struct xgbe_prv_data *pdata, unsigned int del) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ if (pdata->per_channel_irq) { -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ napi_disable(&channel->napi); -+ -+ if (del) -+ netif_napi_del(&channel->napi); -+ } -+ } else { -+ napi_disable(&pdata->napi); -+ -+ if (del) -+ netif_napi_del(&pdata->napi); -+ } -+} -+ -+static int xgbe_request_irqs(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ struct net_device *netdev = pdata->netdev; -+ unsigned int i; -+ int ret; -+ -+ ret = devm_request_irq(pdata->dev, pdata->dev_irq, xgbe_isr, 0, -+ netdev->name, pdata); -+ if (ret) { -+ netdev_alert(netdev, "error requesting irq %d\n", -+ pdata->dev_irq); -+ return ret; -+ } -+ -+ if (!pdata->per_channel_irq) -+ return 0; -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ snprintf(channel->dma_irq_name, -+ sizeof(channel->dma_irq_name) - 1, -+ "%s-TxRx-%u", netdev_name(netdev), -+ channel->queue_index); -+ -+ ret = devm_request_irq(pdata->dev, channel->dma_irq, -+ xgbe_dma_isr, 0, -+ channel->dma_irq_name, channel); -+ if (ret) { -+ netdev_alert(netdev, "error requesting irq %d\n", -+ channel->dma_irq); -+ goto err_irq; -+ } -+ } -+ -+ return 0; -+ -+err_irq: -+ /* Using an unsigned int, 'i' will go to UINT_MAX and exit */ -+ for (i--, channel--; i < pdata->channel_count; i--, channel--) -+ devm_free_irq(pdata->dev, channel->dma_irq, channel); -+ -+ devm_free_irq(pdata->dev, pdata->dev_irq, pdata); -+ -+ return ret; -+} -+ -+static void xgbe_free_irqs(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ devm_free_irq(pdata->dev, pdata->dev_irq, pdata); -+ -+ if (!pdata->per_channel_irq) -+ return; -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) -+ devm_free_irq(pdata->dev, channel->dma_irq, channel); -+} -+ -+void xgbe_a0_init_tx_coalesce(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ -+ DBGPR("-->xgbe_a0_init_tx_coalesce\n"); -+ -+ pdata->tx_usecs = XGMAC_INIT_DMA_TX_USECS; -+ pdata->tx_frames = XGMAC_INIT_DMA_TX_FRAMES; -+ -+ hw_if->config_tx_coalesce(pdata); -+ -+ DBGPR("<--xgbe_a0_init_tx_coalesce\n"); -+} -+ -+void xgbe_a0_init_rx_coalesce(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ -+ DBGPR("-->xgbe_a0_init_rx_coalesce\n"); -+ -+ pdata->rx_riwt = hw_if->usec_to_riwt(pdata, XGMAC_INIT_DMA_RX_USECS); -+ pdata->rx_frames = XGMAC_INIT_DMA_RX_FRAMES; -+ -+ hw_if->config_rx_coalesce(pdata); -+ -+ DBGPR("<--xgbe_a0_init_rx_coalesce\n"); -+} -+ -+static void xgbe_free_tx_data(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_desc_if *desc_if = &pdata->desc_if; -+ struct xgbe_channel *channel; -+ struct xgbe_ring *ring; -+ struct xgbe_ring_data *rdata; -+ unsigned int i, j; -+ -+ DBGPR("-->xgbe_free_tx_data\n"); -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ ring = channel->tx_ring; -+ if (!ring) -+ break; -+ -+ for (j = 0; j < ring->rdesc_count; j++) { -+ rdata = XGBE_GET_DESC_DATA(ring, j); -+ desc_if->unmap_rdata(pdata, rdata); -+ } -+ } -+ -+ DBGPR("<--xgbe_free_tx_data\n"); -+} -+ -+static void xgbe_free_rx_data(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_desc_if *desc_if = &pdata->desc_if; -+ struct xgbe_channel *channel; -+ struct xgbe_ring *ring; -+ struct xgbe_ring_data *rdata; -+ unsigned int i, j; -+ -+ DBGPR("-->xgbe_free_rx_data\n"); -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ ring = channel->rx_ring; -+ if (!ring) -+ break; -+ -+ for (j = 0; j < ring->rdesc_count; j++) { -+ rdata = XGBE_GET_DESC_DATA(ring, j); -+ desc_if->unmap_rdata(pdata, rdata); -+ } -+ } -+ -+ DBGPR("<--xgbe_free_rx_data\n"); -+} -+ -+static void xgbe_adjust_link(struct net_device *netdev) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ struct phy_device *phydev = pdata->phydev; -+ int new_state = 0; -+ -+ if (!phydev) -+ return; -+ -+ if (phydev->link) { -+ /* Flow control support */ -+ if (pdata->pause_autoneg) { -+ if (phydev->pause || phydev->asym_pause) { -+ pdata->tx_pause = 1; -+ pdata->rx_pause = 1; -+ } else { -+ pdata->tx_pause = 0; -+ pdata->rx_pause = 0; -+ } -+ } -+ -+ if (pdata->tx_pause != pdata->phy_tx_pause) { -+ hw_if->config_tx_flow_control(pdata); -+ pdata->phy_tx_pause = pdata->tx_pause; -+ } -+ -+ if (pdata->rx_pause != pdata->phy_rx_pause) { -+ hw_if->config_rx_flow_control(pdata); -+ pdata->phy_rx_pause = pdata->rx_pause; -+ } -+ -+ /* Speed support */ -+ if (phydev->speed != pdata->phy_speed) { -+ new_state = 1; -+ -+ switch (phydev->speed) { -+ case SPEED_10000: -+ hw_if->set_xgmii_speed(pdata); -+ break; -+ -+ case SPEED_2500: -+ hw_if->set_gmii_2500_speed(pdata); -+ break; -+ -+ case SPEED_1000: -+ hw_if->set_gmii_speed(pdata); -+ break; -+ } -+ pdata->phy_speed = phydev->speed; -+ } -+ -+ if (phydev->link != pdata->phy_link) { -+ new_state = 1; -+ pdata->phy_link = 1; -+ } -+ } else if (pdata->phy_link) { -+ new_state = 1; -+ pdata->phy_link = 0; -+ pdata->phy_speed = SPEED_UNKNOWN; -+ } -+ -+ if (new_state) -+ phy_print_status(phydev); -+} -+ -+static int xgbe_phy_init(struct xgbe_prv_data *pdata) -+{ -+ struct net_device *netdev = pdata->netdev; -+ struct phy_device *phydev = pdata->phydev; -+ int ret; -+ -+ pdata->phy_link = -1; -+ pdata->phy_speed = SPEED_UNKNOWN; -+ pdata->phy_tx_pause = pdata->tx_pause; -+ pdata->phy_rx_pause = pdata->rx_pause; -+ -+ ret = phy_connect_direct(netdev, phydev, &xgbe_adjust_link, -+ pdata->phy_mode); -+ if (ret) { -+ netdev_err(netdev, "phy_connect_direct failed\n"); -+ return ret; -+ } -+ -+ if (!phydev->drv || (phydev->drv->phy_id == 0)) { -+ netdev_err(netdev, "phy_id not valid\n"); -+ ret = -ENODEV; -+ goto err_phy_connect; -+ } -+ DBGPR(" phy_connect_direct succeeded for PHY %s, link=%d\n", -+ dev_name(&phydev->dev), phydev->link); -+ -+ return 0; -+ -+err_phy_connect: -+ phy_disconnect(phydev); -+ -+ return ret; -+} -+ -+static void xgbe_phy_exit(struct xgbe_prv_data *pdata) -+{ -+ if (!pdata->phydev) -+ return; -+ -+ phy_disconnect(pdata->phydev); -+} -+ -+int xgbe_a0_powerdown(struct net_device *netdev, unsigned int caller) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ unsigned long flags; -+ -+ DBGPR("-->xgbe_a0_powerdown\n"); -+ -+ if (!netif_running(netdev) || -+ (caller == XGMAC_IOCTL_CONTEXT && pdata->power_down)) { -+ netdev_alert(netdev, "Device is already powered down\n"); -+ DBGPR("<--xgbe_a0_powerdown\n"); -+ return -EINVAL; -+ } -+ -+ spin_lock_irqsave(&pdata->lock, flags); -+ -+ if (caller == XGMAC_DRIVER_CONTEXT) -+ netif_device_detach(netdev); -+ -+ netif_tx_stop_all_queues(netdev); -+ -+ hw_if->powerdown_tx(pdata); -+ hw_if->powerdown_rx(pdata); -+ -+ xgbe_napi_disable(pdata, 0); -+ -+ phy_stop(pdata->phydev); -+ -+ pdata->power_down = 1; -+ -+ spin_unlock_irqrestore(&pdata->lock, flags); -+ -+ DBGPR("<--xgbe_a0_powerdown\n"); -+ -+ return 0; -+} -+ -+int xgbe_a0_powerup(struct net_device *netdev, unsigned int caller) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ unsigned long flags; -+ -+ DBGPR("-->xgbe_a0_powerup\n"); -+ -+ if (!netif_running(netdev) || -+ (caller == XGMAC_IOCTL_CONTEXT && !pdata->power_down)) { -+ netdev_alert(netdev, "Device is already powered up\n"); -+ DBGPR("<--xgbe_a0_powerup\n"); -+ return -EINVAL; -+ } -+ -+ spin_lock_irqsave(&pdata->lock, flags); -+ -+ pdata->power_down = 0; -+ -+ phy_start(pdata->phydev); -+ -+ xgbe_napi_enable(pdata, 0); -+ -+ hw_if->powerup_tx(pdata); -+ hw_if->powerup_rx(pdata); -+ -+ if (caller == XGMAC_DRIVER_CONTEXT) -+ netif_device_attach(netdev); -+ -+ netif_tx_start_all_queues(netdev); -+ -+ spin_unlock_irqrestore(&pdata->lock, flags); -+ -+ DBGPR("<--xgbe_a0_powerup\n"); -+ -+ return 0; -+} -+ -+static int xgbe_start(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ struct net_device *netdev = pdata->netdev; -+ int ret; -+ -+ DBGPR("-->xgbe_start\n"); -+ -+ xgbe_set_rx_mode(netdev); -+ -+ hw_if->init(pdata); -+ -+ phy_start(pdata->phydev); -+ -+ xgbe_napi_enable(pdata, 1); -+ -+ ret = xgbe_request_irqs(pdata); -+ if (ret) -+ goto err_napi; -+ -+ hw_if->enable_tx(pdata); -+ hw_if->enable_rx(pdata); -+ -+ xgbe_init_tx_timers(pdata); -+ -+ netif_tx_start_all_queues(netdev); -+ -+ DBGPR("<--xgbe_start\n"); -+ -+ return 0; -+ -+err_napi: -+ xgbe_napi_disable(pdata, 1); -+ -+ phy_stop(pdata->phydev); -+ -+ hw_if->exit(pdata); -+ -+ return ret; -+} -+ -+static void xgbe_stop(struct xgbe_prv_data *pdata) -+{ -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ struct xgbe_channel *channel; -+ struct net_device *netdev = pdata->netdev; -+ struct netdev_queue *txq; -+ unsigned int i; -+ -+ DBGPR("-->xgbe_stop\n"); -+ -+ netif_tx_stop_all_queues(netdev); -+ -+ xgbe_stop_tx_timers(pdata); -+ -+ hw_if->disable_tx(pdata); -+ hw_if->disable_rx(pdata); -+ -+ xgbe_free_irqs(pdata); -+ -+ xgbe_napi_disable(pdata, 1); -+ -+ phy_stop(pdata->phydev); -+ -+ hw_if->exit(pdata); -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ if (!channel->tx_ring) -+ continue; -+ -+ txq = netdev_get_tx_queue(netdev, channel->queue_index); -+ netdev_tx_reset_queue(txq); -+ } -+ -+ DBGPR("<--xgbe_stop\n"); -+} -+ -+static void xgbe_restart_dev(struct xgbe_prv_data *pdata) -+{ -+ DBGPR("-->xgbe_restart_dev\n"); -+ -+ /* If not running, "restart" will happen on open */ -+ if (!netif_running(pdata->netdev)) -+ return; -+ -+ xgbe_stop(pdata); -+ -+ xgbe_free_tx_data(pdata); -+ xgbe_free_rx_data(pdata); -+ -+ xgbe_start(pdata); -+ -+ DBGPR("<--xgbe_restart_dev\n"); -+} -+ -+static void xgbe_restart(struct work_struct *work) -+{ -+ struct xgbe_prv_data *pdata = container_of(work, -+ struct xgbe_prv_data, -+ restart_work); -+ -+ rtnl_lock(); -+ -+ xgbe_restart_dev(pdata); -+ -+ rtnl_unlock(); -+} -+ -+static void xgbe_tx_tstamp(struct work_struct *work) -+{ -+ struct xgbe_prv_data *pdata = container_of(work, -+ struct xgbe_prv_data, -+ tx_tstamp_work); -+ struct skb_shared_hwtstamps hwtstamps; -+ u64 nsec; -+ unsigned long flags; -+ -+ if (pdata->tx_tstamp) { -+ nsec = timecounter_cyc2time(&pdata->tstamp_tc, -+ pdata->tx_tstamp); -+ -+ memset(&hwtstamps, 0, sizeof(hwtstamps)); -+ hwtstamps.hwtstamp = ns_to_ktime(nsec); -+ skb_tstamp_tx(pdata->tx_tstamp_skb, &hwtstamps); -+ } -+ -+ dev_kfree_skb_any(pdata->tx_tstamp_skb); -+ -+ spin_lock_irqsave(&pdata->tstamp_lock, flags); -+ pdata->tx_tstamp_skb = NULL; -+ spin_unlock_irqrestore(&pdata->tstamp_lock, flags); -+} -+ -+static int xgbe_get_hwtstamp_settings(struct xgbe_prv_data *pdata, -+ struct ifreq *ifreq) -+{ -+ if (copy_to_user(ifreq->ifr_data, &pdata->tstamp_config, -+ sizeof(pdata->tstamp_config))) -+ return -EFAULT; -+ -+ return 0; -+} -+ -+static int xgbe_set_hwtstamp_settings(struct xgbe_prv_data *pdata, -+ struct ifreq *ifreq) -+{ -+ struct hwtstamp_config config; -+ unsigned int mac_tscr; -+ -+ if (copy_from_user(&config, ifreq->ifr_data, sizeof(config))) -+ return -EFAULT; -+ -+ if (config.flags) -+ return -EINVAL; -+ -+ mac_tscr = 0; -+ -+ switch (config.tx_type) { -+ case HWTSTAMP_TX_OFF: -+ break; -+ -+ case HWTSTAMP_TX_ON: -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); -+ break; -+ -+ default: -+ return -ERANGE; -+ } -+ -+ switch (config.rx_filter) { -+ case HWTSTAMP_FILTER_NONE: -+ break; -+ -+ case HWTSTAMP_FILTER_ALL: -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENALL, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); -+ break; -+ -+ /* PTP v2, UDP, any kind of event packet */ -+ case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); -+ /* PTP v1, UDP, any kind of event packet */ -+ case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); -+ break; -+ -+ /* PTP v2, UDP, Sync packet */ -+ case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); -+ /* PTP v1, UDP, Sync packet */ -+ case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); -+ break; -+ -+ /* PTP v2, UDP, Delay_req packet */ -+ case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); -+ /* PTP v1, UDP, Delay_req packet */ -+ case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); -+ break; -+ -+ /* 802.AS1, Ethernet, any kind of event packet */ -+ case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); -+ break; -+ -+ /* 802.AS1, Ethernet, Sync packet */ -+ case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); -+ break; -+ -+ /* 802.AS1, Ethernet, Delay_req packet */ -+ case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); -+ break; -+ -+ /* PTP v2/802.AS1, any layer, any kind of event packet */ -+ case HWTSTAMP_FILTER_PTP_V2_EVENT: -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); -+ break; -+ -+ /* PTP v2/802.AS1, any layer, Sync packet */ -+ case HWTSTAMP_FILTER_PTP_V2_SYNC: -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); -+ break; -+ -+ /* PTP v2/802.AS1, any layer, Delay_req packet */ -+ case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1); -+ XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1); -+ break; -+ -+ default: -+ return -ERANGE; -+ } -+ -+ pdata->hw_if.config_tstamp(pdata, mac_tscr); -+ -+ memcpy(&pdata->tstamp_config, &config, sizeof(config)); -+ -+ return 0; -+} -+ -+static void xgbe_prep_tx_tstamp(struct xgbe_prv_data *pdata, -+ struct sk_buff *skb, -+ struct xgbe_packet_data *packet) -+{ -+ unsigned long flags; -+ -+ if (XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, PTP)) { -+ spin_lock_irqsave(&pdata->tstamp_lock, flags); -+ if (pdata->tx_tstamp_skb) { -+ /* Another timestamp in progress, ignore this one */ -+ XGMAC_SET_BITS(packet->attributes, -+ TX_PACKET_ATTRIBUTES, PTP, 0); -+ } else { -+ pdata->tx_tstamp_skb = skb_get(skb); -+ skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; -+ } -+ spin_unlock_irqrestore(&pdata->tstamp_lock, flags); -+ } -+ -+ if (!XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, PTP)) -+ skb_tx_timestamp(skb); -+} -+ -+static void xgbe_prep_vlan(struct sk_buff *skb, struct xgbe_packet_data *packet) -+{ -+ if (skb_vlan_tag_present(skb)) -+ packet->vlan_ctag = skb_vlan_tag_get(skb); -+} -+ -+static int xgbe_prep_tso(struct sk_buff *skb, struct xgbe_packet_data *packet) -+{ -+ int ret; -+ -+ if (!XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, -+ TSO_ENABLE)) -+ return 0; -+ -+ ret = skb_cow_head(skb, 0); -+ if (ret) -+ return ret; -+ -+ packet->header_len = skb_transport_offset(skb) + tcp_hdrlen(skb); -+ packet->tcp_header_len = tcp_hdrlen(skb); -+ packet->tcp_payload_len = skb->len - packet->header_len; -+ packet->mss = skb_shinfo(skb)->gso_size; -+ DBGPR(" packet->header_len=%u\n", packet->header_len); -+ DBGPR(" packet->tcp_header_len=%u, packet->tcp_payload_len=%u\n", -+ packet->tcp_header_len, packet->tcp_payload_len); -+ DBGPR(" packet->mss=%u\n", packet->mss); -+ -+ /* Update the number of packets that will ultimately be transmitted -+ * along with the extra bytes for each extra packet -+ */ -+ packet->tx_packets = skb_shinfo(skb)->gso_segs; -+ packet->tx_bytes += (packet->tx_packets - 1) * packet->header_len; -+ -+ return 0; -+} -+ -+static int xgbe_is_tso(struct sk_buff *skb) -+{ -+ if (skb->ip_summed != CHECKSUM_PARTIAL) -+ return 0; -+ -+ if (!skb_is_gso(skb)) -+ return 0; -+ -+ DBGPR(" TSO packet to be processed\n"); -+ -+ return 1; -+} -+ -+static void xgbe_packet_info(struct xgbe_prv_data *pdata, -+ struct xgbe_ring *ring, struct sk_buff *skb, -+ struct xgbe_packet_data *packet) -+{ -+ struct skb_frag_struct *frag; -+ unsigned int context_desc; -+ unsigned int len; -+ unsigned int i; -+ -+ packet->skb = skb; -+ -+ context_desc = 0; -+ packet->rdesc_count = 0; -+ -+ packet->tx_packets = 1; -+ packet->tx_bytes = skb->len; -+ -+ if (xgbe_is_tso(skb)) { -+ /* TSO requires an extra descriptor if mss is different */ -+ if (skb_shinfo(skb)->gso_size != ring->tx.cur_mss) { -+ context_desc = 1; -+ packet->rdesc_count++; -+ } -+ -+ /* TSO requires an extra descriptor for TSO header */ -+ packet->rdesc_count++; -+ -+ XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, -+ TSO_ENABLE, 1); -+ XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, -+ CSUM_ENABLE, 1); -+ } else if (skb->ip_summed == CHECKSUM_PARTIAL) -+ XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, -+ CSUM_ENABLE, 1); -+ -+ if (skb_vlan_tag_present(skb)) { -+ /* VLAN requires an extra descriptor if tag is different */ -+ if (skb_vlan_tag_get(skb) != ring->tx.cur_vlan_ctag) -+ /* We can share with the TSO context descriptor */ -+ if (!context_desc) { -+ context_desc = 1; -+ packet->rdesc_count++; -+ } -+ -+ XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, -+ VLAN_CTAG, 1); -+ } -+ -+ if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && -+ (pdata->tstamp_config.tx_type == HWTSTAMP_TX_ON)) -+ XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, -+ PTP, 1); -+ -+ for (len = skb_headlen(skb); len;) { -+ packet->rdesc_count++; -+ len -= min_t(unsigned int, len, XGBE_TX_MAX_BUF_SIZE); -+ } -+ -+ for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { -+ frag = &skb_shinfo(skb)->frags[i]; -+ for (len = skb_frag_size(frag); len; ) { -+ packet->rdesc_count++; -+ len -= min_t(unsigned int, len, XGBE_TX_MAX_BUF_SIZE); -+ } -+ } -+} -+ -+static int xgbe_open(struct net_device *netdev) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct xgbe_desc_if *desc_if = &pdata->desc_if; -+ int ret; -+ -+ DBGPR("-->xgbe_open\n"); -+ -+ /* Initialize the phy */ -+ ret = xgbe_phy_init(pdata); -+ if (ret) -+ return ret; -+ -+ /* Enable the clocks */ -+ ret = clk_prepare_enable(pdata->sysclk); -+ if (ret) { -+ netdev_alert(netdev, "dma clk_prepare_enable failed\n"); -+ goto err_phy_init; -+ } -+ -+ ret = clk_prepare_enable(pdata->ptpclk); -+ if (ret) { -+ netdev_alert(netdev, "ptp clk_prepare_enable failed\n"); -+ goto err_sysclk; -+ } -+ -+ /* Calculate the Rx buffer size before allocating rings */ -+ ret = xgbe_calc_rx_buf_size(netdev, netdev->mtu); -+ if (ret < 0) -+ goto err_ptpclk; -+ pdata->rx_buf_size = ret; -+ -+ /* Allocate the channel and ring structures */ -+ ret = xgbe_alloc_channels(pdata); -+ if (ret) -+ goto err_ptpclk; -+ -+ /* Allocate the ring descriptors and buffers */ -+ ret = desc_if->alloc_ring_resources(pdata); -+ if (ret) -+ goto err_channels; -+ -+ /* Initialize the device restart and Tx timestamp work struct */ -+ INIT_WORK(&pdata->restart_work, xgbe_restart); -+ INIT_WORK(&pdata->tx_tstamp_work, xgbe_tx_tstamp); -+ -+ ret = xgbe_start(pdata); -+ if (ret) -+ goto err_rings; -+ -+ DBGPR("<--xgbe_open\n"); -+ -+ return 0; -+ -+err_rings: -+ desc_if->free_ring_resources(pdata); -+ -+err_channels: -+ xgbe_free_channels(pdata); -+ -+err_ptpclk: -+ clk_disable_unprepare(pdata->ptpclk); -+ -+err_sysclk: -+ clk_disable_unprepare(pdata->sysclk); -+ -+err_phy_init: -+ xgbe_phy_exit(pdata); -+ -+ return ret; -+} -+ -+static int xgbe_close(struct net_device *netdev) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct xgbe_desc_if *desc_if = &pdata->desc_if; -+ -+ DBGPR("-->xgbe_close\n"); -+ -+ /* Stop the device */ -+ xgbe_stop(pdata); -+ -+ /* Free the ring descriptors and buffers */ -+ desc_if->free_ring_resources(pdata); -+ -+ /* Free the channel and ring structures */ -+ xgbe_free_channels(pdata); -+ -+ /* Disable the clocks */ -+ clk_disable_unprepare(pdata->ptpclk); -+ clk_disable_unprepare(pdata->sysclk); -+ -+ /* Release the phy */ -+ xgbe_phy_exit(pdata); -+ -+ DBGPR("<--xgbe_close\n"); -+ -+ return 0; -+} -+ -+static int xgbe_xmit(struct sk_buff *skb, struct net_device *netdev) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ struct xgbe_desc_if *desc_if = &pdata->desc_if; -+ struct xgbe_channel *channel; -+ struct xgbe_ring *ring; -+ struct xgbe_packet_data *packet; -+ struct netdev_queue *txq; -+ int ret; -+ -+ DBGPR("-->xgbe_xmit: skb->len = %d\n", skb->len); -+ -+ channel = pdata->channel + skb->queue_mapping; -+ txq = netdev_get_tx_queue(netdev, channel->queue_index); -+ ring = channel->tx_ring; -+ packet = &ring->packet_data; -+ -+ ret = NETDEV_TX_OK; -+ -+ if (skb->len == 0) { -+ netdev_err(netdev, "empty skb received from stack\n"); -+ dev_kfree_skb_any(skb); -+ goto tx_netdev_return; -+ } -+ -+ /* Calculate preliminary packet info */ -+ memset(packet, 0, sizeof(*packet)); -+ xgbe_packet_info(pdata, ring, skb, packet); -+ -+ /* Check that there are enough descriptors available */ -+ ret = xgbe_maybe_stop_tx_queue(channel, ring, packet->rdesc_count); -+ if (ret) -+ goto tx_netdev_return; -+ -+ ret = xgbe_prep_tso(skb, packet); -+ if (ret) { -+ netdev_err(netdev, "error processing TSO packet\n"); -+ dev_kfree_skb_any(skb); -+ goto tx_netdev_return; -+ } -+ xgbe_prep_vlan(skb, packet); -+ -+ if (!desc_if->map_tx_skb(channel, skb)) { -+ dev_kfree_skb_any(skb); -+ goto tx_netdev_return; -+ } -+ -+ xgbe_prep_tx_tstamp(pdata, skb, packet); -+ -+ /* Report on the actual number of bytes (to be) sent */ -+ netdev_tx_sent_queue(txq, packet->tx_bytes); -+ -+ /* Configure required descriptor fields for transmission */ -+ hw_if->dev_xmit(channel); -+ -+#ifdef XGMAC_ENABLE_TX_PKT_DUMP -+ xgbe_a0_print_pkt(netdev, skb, true); -+#endif -+ -+ /* Stop the queue in advance if there may not be enough descriptors */ -+ xgbe_maybe_stop_tx_queue(channel, ring, XGBE_TX_MAX_DESCS); -+ -+ ret = NETDEV_TX_OK; -+ -+tx_netdev_return: -+ return ret; -+} -+ -+static void xgbe_set_rx_mode(struct net_device *netdev) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ unsigned int pr_mode, am_mode; -+ -+ DBGPR("-->xgbe_set_rx_mode\n"); -+ -+ pr_mode = ((netdev->flags & IFF_PROMISC) != 0); -+ am_mode = ((netdev->flags & IFF_ALLMULTI) != 0); -+ -+ hw_if->set_promiscuous_mode(pdata, pr_mode); -+ hw_if->set_all_multicast_mode(pdata, am_mode); -+ -+ hw_if->add_mac_addresses(pdata); -+ -+ DBGPR("<--xgbe_set_rx_mode\n"); -+} -+ -+static int xgbe_set_mac_address(struct net_device *netdev, void *addr) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ struct sockaddr *saddr = addr; -+ -+ DBGPR("-->xgbe_set_mac_address\n"); -+ -+ if (!is_valid_ether_addr(saddr->sa_data)) -+ return -EADDRNOTAVAIL; -+ -+ memcpy(netdev->dev_addr, saddr->sa_data, netdev->addr_len); -+ -+ hw_if->set_mac_address(pdata, netdev->dev_addr); -+ -+ DBGPR("<--xgbe_set_mac_address\n"); -+ -+ return 0; -+} -+ -+static int xgbe_ioctl(struct net_device *netdev, struct ifreq *ifreq, int cmd) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ int ret; -+ -+ switch (cmd) { -+ case SIOCGHWTSTAMP: -+ ret = xgbe_get_hwtstamp_settings(pdata, ifreq); -+ break; -+ -+ case SIOCSHWTSTAMP: -+ ret = xgbe_set_hwtstamp_settings(pdata, ifreq); -+ break; -+ -+ default: -+ ret = -EOPNOTSUPP; -+ } -+ -+ return ret; -+} -+ -+static int xgbe_change_mtu(struct net_device *netdev, int mtu) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ int ret; -+ -+ DBGPR("-->xgbe_change_mtu\n"); -+ -+ ret = xgbe_calc_rx_buf_size(netdev, mtu); -+ if (ret < 0) -+ return ret; -+ -+ pdata->rx_buf_size = ret; -+ netdev->mtu = mtu; -+ -+ xgbe_restart_dev(pdata); -+ -+ DBGPR("<--xgbe_change_mtu\n"); -+ -+ return 0; -+} -+ -+static struct rtnl_link_stats64 *xgbe_get_stats64(struct net_device *netdev, -+ struct rtnl_link_stats64 *s) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct xgbe_mmc_stats *pstats = &pdata->mmc_stats; -+ -+ DBGPR("-->%s\n", __func__); -+ -+ pdata->hw_if.read_mmc_stats(pdata); -+ -+ s->rx_packets = pstats->rxframecount_gb; -+ s->rx_bytes = pstats->rxoctetcount_gb; -+ s->rx_errors = pstats->rxframecount_gb - -+ pstats->rxbroadcastframes_g - -+ pstats->rxmulticastframes_g - -+ pstats->rxunicastframes_g; -+ s->multicast = pstats->rxmulticastframes_g; -+ s->rx_length_errors = pstats->rxlengtherror; -+ s->rx_crc_errors = pstats->rxcrcerror; -+ s->rx_fifo_errors = pstats->rxfifooverflow; -+ -+ s->tx_packets = pstats->txframecount_gb; -+ s->tx_bytes = pstats->txoctetcount_gb; -+ s->tx_errors = pstats->txframecount_gb - pstats->txframecount_g; -+ s->tx_dropped = netdev->stats.tx_dropped; -+ -+ DBGPR("<--%s\n", __func__); -+ -+ return s; -+} -+ -+static int xgbe_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, -+ u16 vid) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ -+ DBGPR("-->%s\n", __func__); -+ -+ set_bit(vid, pdata->active_vlans); -+ hw_if->update_vlan_hash_table(pdata); -+ -+ DBGPR("<--%s\n", __func__); -+ -+ return 0; -+} -+ -+static int xgbe_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, -+ u16 vid) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ -+ DBGPR("-->%s\n", __func__); -+ -+ clear_bit(vid, pdata->active_vlans); -+ hw_if->update_vlan_hash_table(pdata); -+ -+ DBGPR("<--%s\n", __func__); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_NET_POLL_CONTROLLER -+static void xgbe_poll_controller(struct net_device *netdev) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct xgbe_channel *channel; -+ unsigned int i; -+ -+ DBGPR("-->xgbe_poll_controller\n"); -+ -+ if (pdata->per_channel_irq) { -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) -+ xgbe_dma_isr(channel->dma_irq, channel); -+ } else { -+ disable_irq(pdata->dev_irq); -+ xgbe_isr(pdata->dev_irq, pdata); -+ enable_irq(pdata->dev_irq); -+ } -+ -+ DBGPR("<--xgbe_poll_controller\n"); -+} -+#endif /* End CONFIG_NET_POLL_CONTROLLER */ -+ -+static int xgbe_setup_tc(struct net_device *netdev, u8 tc) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ unsigned int offset, queue; -+ u8 i; -+ -+ if (tc && (tc != pdata->hw_feat.tc_cnt)) -+ return -EINVAL; -+ -+ if (tc) { -+ netdev_set_num_tc(netdev, tc); -+ for (i = 0, queue = 0, offset = 0; i < tc; i++) { -+ while ((queue < pdata->tx_q_count) && -+ (pdata->q2tc_map[queue] == i)) -+ queue++; -+ -+ DBGPR(" TC%u using TXq%u-%u\n", i, offset, queue - 1); -+ netdev_set_tc_queue(netdev, i, queue - offset, offset); -+ offset = queue; -+ } -+ } else { -+ netdev_reset_tc(netdev); -+ } -+ -+ return 0; -+} -+ -+static int xgbe_set_features(struct net_device *netdev, -+ netdev_features_t features) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ netdev_features_t rxhash, rxcsum, rxvlan, rxvlan_filter; -+ int ret = 0; -+ -+ rxhash = pdata->netdev_features & NETIF_F_RXHASH; -+ rxcsum = pdata->netdev_features & NETIF_F_RXCSUM; -+ rxvlan = pdata->netdev_features & NETIF_F_HW_VLAN_CTAG_RX; -+ rxvlan_filter = pdata->netdev_features & NETIF_F_HW_VLAN_CTAG_FILTER; -+ -+ if ((features & NETIF_F_RXHASH) && !rxhash) -+ ret = hw_if->enable_rss(pdata); -+ else if (!(features & NETIF_F_RXHASH) && rxhash) -+ ret = hw_if->disable_rss(pdata); -+ if (ret) -+ return ret; -+ -+ if ((features & NETIF_F_RXCSUM) && !rxcsum) -+ hw_if->enable_rx_csum(pdata); -+ else if (!(features & NETIF_F_RXCSUM) && rxcsum) -+ hw_if->disable_rx_csum(pdata); -+ -+ if ((features & NETIF_F_HW_VLAN_CTAG_RX) && !rxvlan) -+ hw_if->enable_rx_vlan_stripping(pdata); -+ else if (!(features & NETIF_F_HW_VLAN_CTAG_RX) && rxvlan) -+ hw_if->disable_rx_vlan_stripping(pdata); -+ -+ if ((features & NETIF_F_HW_VLAN_CTAG_FILTER) && !rxvlan_filter) -+ hw_if->enable_rx_vlan_filtering(pdata); -+ else if (!(features & NETIF_F_HW_VLAN_CTAG_FILTER) && rxvlan_filter) -+ hw_if->disable_rx_vlan_filtering(pdata); -+ -+ pdata->netdev_features = features; -+ -+ DBGPR("<--xgbe_set_features\n"); -+ -+ return 0; -+} -+ -+static const struct net_device_ops xgbe_netdev_ops = { -+ .ndo_open = xgbe_open, -+ .ndo_stop = xgbe_close, -+ .ndo_start_xmit = xgbe_xmit, -+ .ndo_set_rx_mode = xgbe_set_rx_mode, -+ .ndo_set_mac_address = xgbe_set_mac_address, -+ .ndo_validate_addr = eth_validate_addr, -+ .ndo_do_ioctl = xgbe_ioctl, -+ .ndo_change_mtu = xgbe_change_mtu, -+ .ndo_get_stats64 = xgbe_get_stats64, -+ .ndo_vlan_rx_add_vid = xgbe_vlan_rx_add_vid, -+ .ndo_vlan_rx_kill_vid = xgbe_vlan_rx_kill_vid, -+#ifdef CONFIG_NET_POLL_CONTROLLER -+ .ndo_poll_controller = xgbe_poll_controller, -+#endif -+ .ndo_setup_tc = xgbe_setup_tc, -+ .ndo_set_features = xgbe_set_features, -+}; -+ -+struct net_device_ops *xgbe_a0_get_netdev_ops(void) -+{ -+ return (struct net_device_ops *)&xgbe_netdev_ops; -+} -+ -+static void xgbe_rx_refresh(struct xgbe_channel *channel) -+{ -+ struct xgbe_prv_data *pdata = channel->pdata; -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ struct xgbe_desc_if *desc_if = &pdata->desc_if; -+ struct xgbe_ring *ring = channel->rx_ring; -+ struct xgbe_ring_data *rdata; -+ -+ while (ring->dirty != ring->cur) { -+ rdata = XGBE_GET_DESC_DATA(ring, ring->dirty); -+ -+ /* Reset rdata values */ -+ desc_if->unmap_rdata(pdata, rdata); -+ -+ if (desc_if->map_rx_buffer(pdata, ring, rdata)) -+ break; -+ -+ hw_if->rx_desc_reset(rdata); -+ -+ ring->dirty++; -+ } -+ -+ /* Update the Rx Tail Pointer Register with address of -+ * the last cleaned entry */ -+ rdata = XGBE_GET_DESC_DATA(ring, ring->dirty - 1); -+ XGMAC_DMA_IOWRITE(channel, DMA_CH_RDTR_LO, -+ lower_32_bits(rdata->rdesc_dma)); -+} -+ -+static struct sk_buff *xgbe_create_skb(struct xgbe_prv_data *pdata, -+ struct xgbe_ring_data *rdata, -+ unsigned int *len) -+{ -+ struct net_device *netdev = pdata->netdev; -+ struct sk_buff *skb; -+ u8 *packet; -+ unsigned int copy_len; -+ -+ skb = netdev_alloc_skb_ip_align(netdev, rdata->rx.hdr.dma_len); -+ if (!skb) -+ return NULL; -+ -+ packet = page_address(rdata->rx.hdr.pa.pages) + -+ rdata->rx.hdr.pa.pages_offset; -+ copy_len = (rdata->rx.hdr_len) ? rdata->rx.hdr_len : *len; -+ copy_len = min(rdata->rx.hdr.dma_len, copy_len); -+ skb_copy_to_linear_data(skb, packet, copy_len); -+ skb_put(skb, copy_len); -+ -+ *len -= copy_len; -+ -+ return skb; -+} -+ -+static int xgbe_tx_poll(struct xgbe_channel *channel) -+{ -+ struct xgbe_prv_data *pdata = channel->pdata; -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ struct xgbe_desc_if *desc_if = &pdata->desc_if; -+ struct xgbe_ring *ring = channel->tx_ring; -+ struct xgbe_ring_data *rdata; -+ struct xgbe_ring_desc *rdesc; -+ struct net_device *netdev = pdata->netdev; -+ struct netdev_queue *txq; -+ int processed = 0; -+ unsigned int tx_packets = 0, tx_bytes = 0; -+ -+ DBGPR("-->xgbe_tx_poll\n"); -+ -+ /* Nothing to do if there isn't a Tx ring for this channel */ -+ if (!ring) -+ return 0; -+ -+ txq = netdev_get_tx_queue(netdev, channel->queue_index); -+ -+ while ((processed < XGBE_TX_DESC_MAX_PROC) && -+ (ring->dirty != ring->cur)) { -+ rdata = XGBE_GET_DESC_DATA(ring, ring->dirty); -+ rdesc = rdata->rdesc; -+ -+ if (!hw_if->tx_complete(rdesc)) -+ break; -+ -+ /* Make sure descriptor fields are read after reading the OWN -+ * bit */ -+ rmb(); -+ -+#ifdef XGMAC_ENABLE_TX_DESC_DUMP -+ xgbe_a0_dump_tx_desc(ring, ring->dirty, 1, 0); -+#endif -+ -+ if (hw_if->is_last_desc(rdesc)) { -+ tx_packets += rdata->tx.packets; -+ tx_bytes += rdata->tx.bytes; -+ } -+ -+ /* Free the SKB and reset the descriptor for re-use */ -+ desc_if->unmap_rdata(pdata, rdata); -+ hw_if->tx_desc_reset(rdata); -+ -+ processed++; -+ ring->dirty++; -+ } -+ -+ if (!processed) -+ return 0; -+ -+ netdev_tx_completed_queue(txq, tx_packets, tx_bytes); -+ -+ if ((ring->tx.queue_stopped == 1) && -+ (xgbe_tx_avail_desc(ring) > XGBE_TX_DESC_MIN_FREE)) { -+ ring->tx.queue_stopped = 0; -+ netif_tx_wake_queue(txq); -+ } -+ -+ DBGPR("<--xgbe_tx_poll: processed=%d\n", processed); -+ -+ return processed; -+} -+ -+static int xgbe_rx_poll(struct xgbe_channel *channel, int budget) -+{ -+ struct xgbe_prv_data *pdata = channel->pdata; -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ struct xgbe_ring *ring = channel->rx_ring; -+ struct xgbe_ring_data *rdata; -+ struct xgbe_packet_data *packet; -+ struct net_device *netdev = pdata->netdev; -+ struct napi_struct *napi; -+ struct sk_buff *skb; -+ struct skb_shared_hwtstamps *hwtstamps; -+ unsigned int incomplete, error, context_next, context; -+ unsigned int len, put_len, max_len; -+ unsigned int received = 0; -+ int packet_count = 0; -+ -+ DBGPR("-->xgbe_rx_poll: budget=%d\n", budget); -+ -+ /* Nothing to do if there isn't a Rx ring for this channel */ -+ if (!ring) -+ return 0; -+ -+ napi = (pdata->per_channel_irq) ? &channel->napi : &pdata->napi; -+ -+ rdata = XGBE_GET_DESC_DATA(ring, ring->cur); -+ packet = &ring->packet_data; -+ while (packet_count < budget) { -+ DBGPR(" cur = %d\n", ring->cur); -+ -+ /* First time in loop see if we need to restore state */ -+ if (!received && rdata->state_saved) { -+ incomplete = rdata->state.incomplete; -+ context_next = rdata->state.context_next; -+ skb = rdata->state.skb; -+ error = rdata->state.error; -+ len = rdata->state.len; -+ } else { -+ memset(packet, 0, sizeof(*packet)); -+ incomplete = 0; -+ context_next = 0; -+ skb = NULL; -+ error = 0; -+ len = 0; -+ } -+ -+read_again: -+ rdata = XGBE_GET_DESC_DATA(ring, ring->cur); -+ -+ if (xgbe_rx_dirty_desc(ring) > (XGBE_RX_DESC_CNT >> 3)) -+ xgbe_rx_refresh(channel); -+ -+ if (hw_if->dev_read(channel)) -+ break; -+ -+ received++; -+ ring->cur++; -+ -+ incomplete = XGMAC_GET_BITS(packet->attributes, -+ RX_PACKET_ATTRIBUTES, -+ INCOMPLETE); -+ context_next = XGMAC_GET_BITS(packet->attributes, -+ RX_PACKET_ATTRIBUTES, -+ CONTEXT_NEXT); -+ context = XGMAC_GET_BITS(packet->attributes, -+ RX_PACKET_ATTRIBUTES, -+ CONTEXT); -+ -+ /* Earlier error, just drain the remaining data */ -+ if ((incomplete || context_next) && error) -+ goto read_again; -+ -+ if (error || packet->errors) { -+ if (packet->errors) -+ DBGPR("Error in received packet\n"); -+ dev_kfree_skb(skb); -+ goto next_packet; -+ } -+ -+ if (!context) { -+ put_len = rdata->rx.len - len; -+ len += put_len; -+ -+ if (!skb) { -+ dma_sync_single_for_cpu(pdata->dev, -+ rdata->rx.hdr.dma, -+ rdata->rx.hdr.dma_len, -+ DMA_FROM_DEVICE); -+ -+ skb = xgbe_create_skb(pdata, rdata, &put_len); -+ if (!skb) { -+ error = 1; -+ goto skip_data; -+ } -+ } -+ -+ if (put_len) { -+ dma_sync_single_for_cpu(pdata->dev, -+ rdata->rx.buf.dma, -+ rdata->rx.buf.dma_len, -+ DMA_FROM_DEVICE); -+ -+ skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, -+ rdata->rx.buf.pa.pages, -+ rdata->rx.buf.pa.pages_offset, -+ put_len, rdata->rx.buf.dma_len); -+ rdata->rx.buf.pa.pages = NULL; -+ } -+ } -+ -+skip_data: -+ if (incomplete || context_next) -+ goto read_again; -+ -+ if (!skb) -+ goto next_packet; -+ -+ /* Be sure we don't exceed the configured MTU */ -+ max_len = netdev->mtu + ETH_HLEN; -+ if (!(netdev->features & NETIF_F_HW_VLAN_CTAG_RX) && -+ (skb->protocol == htons(ETH_P_8021Q))) -+ max_len += VLAN_HLEN; -+ -+ if (skb->len > max_len) { -+ DBGPR("packet length exceeds configured MTU\n"); -+ dev_kfree_skb(skb); -+ goto next_packet; -+ } -+ -+#ifdef XGMAC_ENABLE_RX_PKT_DUMP -+ xgbe_a0_print_pkt(netdev, skb, false); -+#endif -+ -+ skb_checksum_none_assert(skb); -+ if (XGMAC_GET_BITS(packet->attributes, -+ RX_PACKET_ATTRIBUTES, CSUM_DONE)) -+ skb->ip_summed = CHECKSUM_UNNECESSARY; -+ -+ if (XGMAC_GET_BITS(packet->attributes, -+ RX_PACKET_ATTRIBUTES, VLAN_CTAG)) -+ __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), -+ packet->vlan_ctag); -+ -+ if (XGMAC_GET_BITS(packet->attributes, -+ RX_PACKET_ATTRIBUTES, RX_TSTAMP)) { -+ u64 nsec; -+ -+ nsec = timecounter_cyc2time(&pdata->tstamp_tc, -+ packet->rx_tstamp); -+ hwtstamps = skb_hwtstamps(skb); -+ hwtstamps->hwtstamp = ns_to_ktime(nsec); -+ } -+ -+ if (XGMAC_GET_BITS(packet->attributes, -+ RX_PACKET_ATTRIBUTES, RSS_HASH)) -+ skb_set_hash(skb, packet->rss_hash, -+ packet->rss_hash_type); -+ -+ skb->dev = netdev; -+ skb->protocol = eth_type_trans(skb, netdev); -+ skb_record_rx_queue(skb, channel->queue_index); -+ skb_mark_napi_id(skb, napi); -+ -+ netdev->last_rx = jiffies; -+ napi_gro_receive(napi, skb); -+ -+next_packet: -+ packet_count++; -+ } -+ -+ /* Check if we need to save state before leaving */ -+ if (received && (incomplete || context_next)) { -+ rdata = XGBE_GET_DESC_DATA(ring, ring->cur); -+ rdata->state_saved = 1; -+ rdata->state.incomplete = incomplete; -+ rdata->state.context_next = context_next; -+ rdata->state.skb = skb; -+ rdata->state.len = len; -+ rdata->state.error = error; -+ } -+ -+ DBGPR("<--xgbe_rx_poll: packet_count = %d\n", packet_count); -+ -+ return packet_count; -+} -+ -+static int xgbe_one_poll(struct napi_struct *napi, int budget) -+{ -+ struct xgbe_channel *channel = container_of(napi, struct xgbe_channel, -+ napi); -+ int processed = 0; -+ -+ DBGPR("-->xgbe_one_poll: budget=%d\n", budget); -+ -+ /* Cleanup Tx ring first */ -+ xgbe_tx_poll(channel); -+ -+ /* Process Rx ring next */ -+ processed = xgbe_rx_poll(channel, budget); -+ -+ /* If we processed everything, we are done */ -+ if (processed < budget) { -+ /* Turn off polling */ -+ napi_complete(napi); -+ -+ /* Enable Tx and Rx interrupts */ -+ enable_irq(channel->dma_irq); -+ } -+ -+ DBGPR("<--xgbe_one_poll: received = %d\n", processed); -+ -+ return processed; -+} -+ -+static int xgbe_all_poll(struct napi_struct *napi, int budget) -+{ -+ struct xgbe_prv_data *pdata = container_of(napi, struct xgbe_prv_data, -+ napi); -+ struct xgbe_channel *channel; -+ int ring_budget; -+ int processed, last_processed; -+ unsigned int i; -+ -+ DBGPR("-->xgbe_all_poll: budget=%d\n", budget); -+ -+ processed = 0; -+ ring_budget = budget / pdata->rx_ring_count; -+ do { -+ last_processed = processed; -+ -+ channel = pdata->channel; -+ for (i = 0; i < pdata->channel_count; i++, channel++) { -+ /* Cleanup Tx ring first */ -+ xgbe_tx_poll(channel); -+ -+ /* Process Rx ring next */ -+ if (ring_budget > (budget - processed)) -+ ring_budget = budget - processed; -+ processed += xgbe_rx_poll(channel, ring_budget); -+ } -+ } while ((processed < budget) && (processed != last_processed)); -+ -+ /* If we processed everything, we are done */ -+ if (processed < budget) { -+ /* Turn off polling */ -+ napi_complete(napi); -+ -+ /* Enable Tx and Rx interrupts */ -+ xgbe_enable_rx_tx_ints(pdata); -+ } -+ -+ DBGPR("<--xgbe_all_poll: received = %d\n", processed); -+ -+ return processed; -+} -+ -+void xgbe_a0_dump_tx_desc(struct xgbe_ring *ring, unsigned int idx, -+ unsigned int count, unsigned int flag) -+{ -+ struct xgbe_ring_data *rdata; -+ struct xgbe_ring_desc *rdesc; -+ -+ while (count--) { -+ rdata = XGBE_GET_DESC_DATA(ring, idx); -+ rdesc = rdata->rdesc; -+ pr_alert("TX_NORMAL_DESC[%d %s] = %08x:%08x:%08x:%08x\n", idx, -+ (flag == 1) ? "QUEUED FOR TX" : "TX BY DEVICE", -+ le32_to_cpu(rdesc->desc0), le32_to_cpu(rdesc->desc1), -+ le32_to_cpu(rdesc->desc2), le32_to_cpu(rdesc->desc3)); -+ idx++; -+ } -+} -+ -+void xgbe_a0_dump_rx_desc(struct xgbe_ring *ring, struct xgbe_ring_desc *desc, -+ unsigned int idx) -+{ -+ pr_alert("RX_NORMAL_DESC[%d RX BY DEVICE] = %08x:%08x:%08x:%08x\n", idx, -+ le32_to_cpu(desc->desc0), le32_to_cpu(desc->desc1), -+ le32_to_cpu(desc->desc2), le32_to_cpu(desc->desc3)); -+} -+ -+void xgbe_a0_print_pkt(struct net_device *netdev, struct sk_buff *skb, bool tx_rx) -+{ -+ struct ethhdr *eth = (struct ethhdr *)skb->data; -+ unsigned char *buf = skb->data; -+ unsigned char buffer[128]; -+ unsigned int i, j; -+ -+ netdev_alert(netdev, "\n************** SKB dump ****************\n"); -+ -+ netdev_alert(netdev, "%s packet of %d bytes\n", -+ (tx_rx ? "TX" : "RX"), skb->len); -+ -+ netdev_alert(netdev, "Dst MAC addr: %pM\n", eth->h_dest); -+ netdev_alert(netdev, "Src MAC addr: %pM\n", eth->h_source); -+ netdev_alert(netdev, "Protocol: 0x%04hx\n", ntohs(eth->h_proto)); -+ -+ for (i = 0, j = 0; i < skb->len;) { -+ j += snprintf(buffer + j, sizeof(buffer) - j, "%02hhx", -+ buf[i++]); -+ -+ if ((i % 32) == 0) { -+ netdev_alert(netdev, " 0x%04x: %s\n", i - 32, buffer); -+ j = 0; -+ } else if ((i % 16) == 0) { -+ buffer[j++] = ' '; -+ buffer[j++] = ' '; -+ } else if ((i % 4) == 0) { -+ buffer[j++] = ' '; -+ } -+ } -+ if (i % 32) -+ netdev_alert(netdev, " 0x%04x: %s\n", i - (i % 32), buffer); -+ -+ netdev_alert(netdev, "\n************** SKB dump ****************\n"); -+} -diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-ethtool.c b/drivers/net/ethernet/amd/xgbe-a0/xgbe-ethtool.c -new file mode 100644 -index 0000000..165ff1c ---- /dev/null -+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-ethtool.c -@@ -0,0 +1,616 @@ -+/* -+ * AMD 10Gb Ethernet driver -+ * -+ * This file is available to you under your choice of the following two -+ * licenses: -+ * -+ * License 1: GPLv2 -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * -+ * This file is free software; you may copy, redistribute and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation, either version 2 of the License, or (at -+ * your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program. If not, see . -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * -+ * License 2: Modified BSD -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions are met: -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * * Neither the name of Advanced Micro Devices, Inc. nor the -+ * names of its contributors may be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY -+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+#include -+#include -+#include -+ -+#include "xgbe.h" -+#include "xgbe-common.h" -+ -+struct xgbe_stats { -+ char stat_string[ETH_GSTRING_LEN]; -+ int stat_size; -+ int stat_offset; -+}; -+ -+#define XGMAC_MMC_STAT(_string, _var) \ -+ { _string, \ -+ FIELD_SIZEOF(struct xgbe_mmc_stats, _var), \ -+ offsetof(struct xgbe_prv_data, mmc_stats._var), \ -+ } -+ -+static const struct xgbe_stats xgbe_gstring_stats[] = { -+ XGMAC_MMC_STAT("tx_bytes", txoctetcount_gb), -+ XGMAC_MMC_STAT("tx_packets", txframecount_gb), -+ XGMAC_MMC_STAT("tx_unicast_packets", txunicastframes_gb), -+ XGMAC_MMC_STAT("tx_broadcast_packets", txbroadcastframes_gb), -+ XGMAC_MMC_STAT("tx_multicast_packets", txmulticastframes_gb), -+ XGMAC_MMC_STAT("tx_vlan_packets", txvlanframes_g), -+ XGMAC_MMC_STAT("tx_64_byte_packets", tx64octets_gb), -+ XGMAC_MMC_STAT("tx_65_to_127_byte_packets", tx65to127octets_gb), -+ XGMAC_MMC_STAT("tx_128_to_255_byte_packets", tx128to255octets_gb), -+ XGMAC_MMC_STAT("tx_256_to_511_byte_packets", tx256to511octets_gb), -+ XGMAC_MMC_STAT("tx_512_to_1023_byte_packets", tx512to1023octets_gb), -+ XGMAC_MMC_STAT("tx_1024_to_max_byte_packets", tx1024tomaxoctets_gb), -+ XGMAC_MMC_STAT("tx_underflow_errors", txunderflowerror), -+ XGMAC_MMC_STAT("tx_pause_frames", txpauseframes), -+ -+ XGMAC_MMC_STAT("rx_bytes", rxoctetcount_gb), -+ XGMAC_MMC_STAT("rx_packets", rxframecount_gb), -+ XGMAC_MMC_STAT("rx_unicast_packets", rxunicastframes_g), -+ XGMAC_MMC_STAT("rx_broadcast_packets", rxbroadcastframes_g), -+ XGMAC_MMC_STAT("rx_multicast_packets", rxmulticastframes_g), -+ XGMAC_MMC_STAT("rx_vlan_packets", rxvlanframes_gb), -+ XGMAC_MMC_STAT("rx_64_byte_packets", rx64octets_gb), -+ XGMAC_MMC_STAT("rx_65_to_127_byte_packets", rx65to127octets_gb), -+ XGMAC_MMC_STAT("rx_128_to_255_byte_packets", rx128to255octets_gb), -+ XGMAC_MMC_STAT("rx_256_to_511_byte_packets", rx256to511octets_gb), -+ XGMAC_MMC_STAT("rx_512_to_1023_byte_packets", rx512to1023octets_gb), -+ XGMAC_MMC_STAT("rx_1024_to_max_byte_packets", rx1024tomaxoctets_gb), -+ XGMAC_MMC_STAT("rx_undersize_packets", rxundersize_g), -+ XGMAC_MMC_STAT("rx_oversize_packets", rxoversize_g), -+ XGMAC_MMC_STAT("rx_crc_errors", rxcrcerror), -+ XGMAC_MMC_STAT("rx_crc_errors_small_packets", rxrunterror), -+ XGMAC_MMC_STAT("rx_crc_errors_giant_packets", rxjabbererror), -+ XGMAC_MMC_STAT("rx_length_errors", rxlengtherror), -+ XGMAC_MMC_STAT("rx_out_of_range_errors", rxoutofrangetype), -+ XGMAC_MMC_STAT("rx_fifo_overflow_errors", rxfifooverflow), -+ XGMAC_MMC_STAT("rx_watchdog_errors", rxwatchdogerror), -+ XGMAC_MMC_STAT("rx_pause_frames", rxpauseframes), -+}; -+ -+#define XGBE_STATS_COUNT ARRAY_SIZE(xgbe_gstring_stats) -+ -+static void xgbe_get_strings(struct net_device *netdev, u32 stringset, u8 *data) -+{ -+ int i; -+ -+ DBGPR("-->%s\n", __func__); -+ -+ switch (stringset) { -+ case ETH_SS_STATS: -+ for (i = 0; i < XGBE_STATS_COUNT; i++) { -+ memcpy(data, xgbe_gstring_stats[i].stat_string, -+ ETH_GSTRING_LEN); -+ data += ETH_GSTRING_LEN; -+ } -+ break; -+ } -+ -+ DBGPR("<--%s\n", __func__); -+} -+ -+static void xgbe_get_ethtool_stats(struct net_device *netdev, -+ struct ethtool_stats *stats, u64 *data) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ u8 *stat; -+ int i; -+ -+ DBGPR("-->%s\n", __func__); -+ -+ pdata->hw_if.read_mmc_stats(pdata); -+ for (i = 0; i < XGBE_STATS_COUNT; i++) { -+ stat = (u8 *)pdata + xgbe_gstring_stats[i].stat_offset; -+ *data++ = *(u64 *)stat; -+ } -+ -+ DBGPR("<--%s\n", __func__); -+} -+ -+static int xgbe_get_sset_count(struct net_device *netdev, int stringset) -+{ -+ int ret; -+ -+ DBGPR("-->%s\n", __func__); -+ -+ switch (stringset) { -+ case ETH_SS_STATS: -+ ret = XGBE_STATS_COUNT; -+ break; -+ -+ default: -+ ret = -EOPNOTSUPP; -+ } -+ -+ DBGPR("<--%s\n", __func__); -+ -+ return ret; -+} -+ -+static void xgbe_get_pauseparam(struct net_device *netdev, -+ struct ethtool_pauseparam *pause) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ -+ DBGPR("-->xgbe_get_pauseparam\n"); -+ -+ pause->autoneg = pdata->pause_autoneg; -+ pause->tx_pause = pdata->tx_pause; -+ pause->rx_pause = pdata->rx_pause; -+ -+ DBGPR("<--xgbe_get_pauseparam\n"); -+} -+ -+static int xgbe_set_pauseparam(struct net_device *netdev, -+ struct ethtool_pauseparam *pause) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct phy_device *phydev = pdata->phydev; -+ int ret = 0; -+ -+ DBGPR("-->xgbe_set_pauseparam\n"); -+ -+ DBGPR(" autoneg = %d, tx_pause = %d, rx_pause = %d\n", -+ pause->autoneg, pause->tx_pause, pause->rx_pause); -+ -+ pdata->pause_autoneg = pause->autoneg; -+ if (pause->autoneg) { -+ phydev->advertising |= ADVERTISED_Pause; -+ phydev->advertising |= ADVERTISED_Asym_Pause; -+ -+ } else { -+ phydev->advertising &= ~ADVERTISED_Pause; -+ phydev->advertising &= ~ADVERTISED_Asym_Pause; -+ -+ pdata->tx_pause = pause->tx_pause; -+ pdata->rx_pause = pause->rx_pause; -+ } -+ -+ if (netif_running(netdev)) -+ ret = phy_start_aneg(phydev); -+ -+ DBGPR("<--xgbe_set_pauseparam\n"); -+ -+ return ret; -+} -+ -+static int xgbe_get_settings(struct net_device *netdev, -+ struct ethtool_cmd *cmd) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ int ret; -+ -+ DBGPR("-->xgbe_get_settings\n"); -+ -+ if (!pdata->phydev) -+ return -ENODEV; -+ -+ ret = phy_ethtool_gset(pdata->phydev, cmd); -+ cmd->transceiver = XCVR_EXTERNAL; -+ -+ DBGPR("<--xgbe_get_settings\n"); -+ -+ return ret; -+} -+ -+static int xgbe_set_settings(struct net_device *netdev, -+ struct ethtool_cmd *cmd) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct phy_device *phydev = pdata->phydev; -+ u32 speed; -+ int ret; -+ -+ DBGPR("-->xgbe_set_settings\n"); -+ -+ if (!pdata->phydev) -+ return -ENODEV; -+ -+ speed = ethtool_cmd_speed(cmd); -+ -+ if (cmd->phy_address != phydev->addr) -+ return -EINVAL; -+ -+ if ((cmd->autoneg != AUTONEG_ENABLE) && -+ (cmd->autoneg != AUTONEG_DISABLE)) -+ return -EINVAL; -+ -+ if (cmd->autoneg == AUTONEG_DISABLE) { -+ switch (speed) { -+ case SPEED_10000: -+ case SPEED_2500: -+ case SPEED_1000: -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ if (cmd->duplex != DUPLEX_FULL) -+ return -EINVAL; -+ } -+ -+ cmd->advertising &= phydev->supported; -+ if ((cmd->autoneg == AUTONEG_ENABLE) && !cmd->advertising) -+ return -EINVAL; -+ -+ ret = 0; -+ phydev->autoneg = cmd->autoneg; -+ phydev->speed = speed; -+ phydev->duplex = cmd->duplex; -+ phydev->advertising = cmd->advertising; -+ -+ if (cmd->autoneg == AUTONEG_ENABLE) -+ phydev->advertising |= ADVERTISED_Autoneg; -+ else -+ phydev->advertising &= ~ADVERTISED_Autoneg; -+ -+ if (netif_running(netdev)) -+ ret = phy_start_aneg(phydev); -+ -+ DBGPR("<--xgbe_set_settings\n"); -+ -+ return ret; -+} -+ -+static void xgbe_get_drvinfo(struct net_device *netdev, -+ struct ethtool_drvinfo *drvinfo) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct xgbe_hw_features *hw_feat = &pdata->hw_feat; -+ -+ strlcpy(drvinfo->driver, XGBE_DRV_NAME, sizeof(drvinfo->driver)); -+ strlcpy(drvinfo->version, XGBE_DRV_VERSION, sizeof(drvinfo->version)); -+ strlcpy(drvinfo->bus_info, dev_name(pdata->dev), -+ sizeof(drvinfo->bus_info)); -+ snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), "%d.%d.%d", -+ XGMAC_GET_BITS(hw_feat->version, MAC_VR, USERVER), -+ XGMAC_GET_BITS(hw_feat->version, MAC_VR, DEVID), -+ XGMAC_GET_BITS(hw_feat->version, MAC_VR, SNPSVER)); -+ drvinfo->n_stats = XGBE_STATS_COUNT; -+} -+ -+static int xgbe_get_coalesce(struct net_device *netdev, -+ struct ethtool_coalesce *ec) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ unsigned int riwt; -+ -+ DBGPR("-->xgbe_get_coalesce\n"); -+ -+ memset(ec, 0, sizeof(struct ethtool_coalesce)); -+ -+ riwt = pdata->rx_riwt; -+ ec->rx_coalesce_usecs = hw_if->riwt_to_usec(pdata, riwt); -+ ec->rx_max_coalesced_frames = pdata->rx_frames; -+ -+ ec->tx_coalesce_usecs = pdata->tx_usecs; -+ ec->tx_max_coalesced_frames = pdata->tx_frames; -+ -+ DBGPR("<--xgbe_get_coalesce\n"); -+ -+ return 0; -+} -+ -+static int xgbe_set_coalesce(struct net_device *netdev, -+ struct ethtool_coalesce *ec) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ unsigned int rx_frames, rx_riwt, rx_usecs; -+ unsigned int tx_frames, tx_usecs; -+ -+ DBGPR("-->xgbe_set_coalesce\n"); -+ -+ /* Check for not supported parameters */ -+ if ((ec->rx_coalesce_usecs_irq) || -+ (ec->rx_max_coalesced_frames_irq) || -+ (ec->tx_coalesce_usecs_irq) || -+ (ec->tx_max_coalesced_frames_irq) || -+ (ec->stats_block_coalesce_usecs) || -+ (ec->use_adaptive_rx_coalesce) || -+ (ec->use_adaptive_tx_coalesce) || -+ (ec->pkt_rate_low) || -+ (ec->rx_coalesce_usecs_low) || -+ (ec->rx_max_coalesced_frames_low) || -+ (ec->tx_coalesce_usecs_low) || -+ (ec->tx_max_coalesced_frames_low) || -+ (ec->pkt_rate_high) || -+ (ec->rx_coalesce_usecs_high) || -+ (ec->rx_max_coalesced_frames_high) || -+ (ec->tx_coalesce_usecs_high) || -+ (ec->tx_max_coalesced_frames_high) || -+ (ec->rate_sample_interval)) -+ return -EOPNOTSUPP; -+ -+ /* Can only change rx-frames when interface is down (see -+ * rx_descriptor_init in xgbe-dev.c) -+ */ -+ rx_frames = pdata->rx_frames; -+ if (rx_frames != ec->rx_max_coalesced_frames && netif_running(netdev)) { -+ netdev_alert(netdev, -+ "interface must be down to change rx-frames\n"); -+ return -EINVAL; -+ } -+ -+ rx_riwt = hw_if->usec_to_riwt(pdata, ec->rx_coalesce_usecs); -+ rx_frames = ec->rx_max_coalesced_frames; -+ -+ /* Use smallest possible value if conversion resulted in zero */ -+ if (ec->rx_coalesce_usecs && !rx_riwt) -+ rx_riwt = 1; -+ -+ /* Check the bounds of values for Rx */ -+ if (rx_riwt > XGMAC_MAX_DMA_RIWT) { -+ rx_usecs = hw_if->riwt_to_usec(pdata, XGMAC_MAX_DMA_RIWT); -+ netdev_alert(netdev, "rx-usec is limited to %d usecs\n", -+ rx_usecs); -+ return -EINVAL; -+ } -+ if (rx_frames > pdata->rx_desc_count) { -+ netdev_alert(netdev, "rx-frames is limited to %d frames\n", -+ pdata->rx_desc_count); -+ return -EINVAL; -+ } -+ -+ tx_usecs = ec->tx_coalesce_usecs; -+ tx_frames = ec->tx_max_coalesced_frames; -+ -+ /* Check the bounds of values for Tx */ -+ if (tx_frames > pdata->tx_desc_count) { -+ netdev_alert(netdev, "tx-frames is limited to %d frames\n", -+ pdata->tx_desc_count); -+ return -EINVAL; -+ } -+ -+ pdata->rx_riwt = rx_riwt; -+ pdata->rx_frames = rx_frames; -+ hw_if->config_rx_coalesce(pdata); -+ -+ pdata->tx_usecs = tx_usecs; -+ pdata->tx_frames = tx_frames; -+ hw_if->config_tx_coalesce(pdata); -+ -+ DBGPR("<--xgbe_set_coalesce\n"); -+ -+ return 0; -+} -+ -+static int xgbe_get_rxnfc(struct net_device *netdev, -+ struct ethtool_rxnfc *rxnfc, u32 *rule_locs) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ -+ switch (rxnfc->cmd) { -+ case ETHTOOL_GRXRINGS: -+ rxnfc->data = pdata->rx_ring_count; -+ break; -+ default: -+ return -EOPNOTSUPP; -+ } -+ -+ return 0; -+} -+ -+static u32 xgbe_get_rxfh_key_size(struct net_device *netdev) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ -+ return sizeof(pdata->rss_key); -+} -+ -+static u32 xgbe_get_rxfh_indir_size(struct net_device *netdev) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ -+ return ARRAY_SIZE(pdata->rss_table); -+} -+ -+static int xgbe_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, -+ u8 *hfunc) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ unsigned int i; -+ -+ if (indir) { -+ for (i = 0; i < ARRAY_SIZE(pdata->rss_table); i++) -+ indir[i] = XGMAC_GET_BITS(pdata->rss_table[i], -+ MAC_RSSDR, DMCH); -+ } -+ -+ if (key) -+ memcpy(key, pdata->rss_key, sizeof(pdata->rss_key)); -+ -+ if (hfunc) -+ *hfunc = ETH_RSS_HASH_TOP; -+ -+ return 0; -+} -+ -+static int xgbe_set_rxfh(struct net_device *netdev, const u32 *indir, -+ const u8 *key, const u8 hfunc) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ unsigned int ret; -+ -+ if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) -+ return -EOPNOTSUPP; -+ -+ if (indir) { -+ ret = hw_if->set_rss_lookup_table(pdata, indir); -+ if (ret) -+ return ret; -+ } -+ -+ if (key) { -+ ret = hw_if->set_rss_hash_key(pdata, key); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int xgbe_get_ts_info(struct net_device *netdev, -+ struct ethtool_ts_info *ts_info) -+{ -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ -+ ts_info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | -+ SOF_TIMESTAMPING_RX_SOFTWARE | -+ SOF_TIMESTAMPING_SOFTWARE | -+ SOF_TIMESTAMPING_TX_HARDWARE | -+ SOF_TIMESTAMPING_RX_HARDWARE | -+ SOF_TIMESTAMPING_RAW_HARDWARE; -+ -+ if (pdata->ptp_clock) -+ ts_info->phc_index = ptp_clock_index(pdata->ptp_clock); -+ else -+ ts_info->phc_index = -1; -+ -+ ts_info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON); -+ ts_info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | -+ (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) | -+ (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | -+ (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | -+ (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | -+ (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | -+ (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) | -+ (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) | -+ (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) | -+ (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | -+ (1 << HWTSTAMP_FILTER_ALL); -+ -+ return 0; -+} -+ -+static const struct ethtool_ops xgbe_ethtool_ops = { -+ .get_settings = xgbe_get_settings, -+ .set_settings = xgbe_set_settings, -+ .get_drvinfo = xgbe_get_drvinfo, -+ .get_link = ethtool_op_get_link, -+ .get_coalesce = xgbe_get_coalesce, -+ .set_coalesce = xgbe_set_coalesce, -+ .get_pauseparam = xgbe_get_pauseparam, -+ .set_pauseparam = xgbe_set_pauseparam, -+ .get_strings = xgbe_get_strings, -+ .get_ethtool_stats = xgbe_get_ethtool_stats, -+ .get_sset_count = xgbe_get_sset_count, -+ .get_rxnfc = xgbe_get_rxnfc, -+ .get_rxfh_key_size = xgbe_get_rxfh_key_size, -+ .get_rxfh_indir_size = xgbe_get_rxfh_indir_size, -+ .get_rxfh = xgbe_get_rxfh, -+ .set_rxfh = xgbe_set_rxfh, -+ .get_ts_info = xgbe_get_ts_info, -+}; -+ -+struct ethtool_ops *xgbe_a0_get_ethtool_ops(void) -+{ -+ return (struct ethtool_ops *)&xgbe_ethtool_ops; -+} -diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-main.c b/drivers/net/ethernet/amd/xgbe-a0/xgbe-main.c -new file mode 100644 -index 0000000..deb8551 ---- /dev/null -+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-main.c -@@ -0,0 +1,618 @@ -+/* -+ * AMD 10Gb Ethernet driver -+ * -+ * This file is available to you under your choice of the following two -+ * licenses: -+ * -+ * License 1: GPLv2 -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * -+ * This file is free software; you may copy, redistribute and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation, either version 2 of the License, or (at -+ * your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program. If not, see . -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * -+ * License 2: Modified BSD -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions are met: -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * * Neither the name of Advanced Micro Devices, Inc. nor the -+ * names of its contributors may be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY -+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "xgbe.h" -+#include "xgbe-common.h" -+ -+MODULE_AUTHOR("Tom Lendacky "); -+MODULE_LICENSE("Dual BSD/GPL"); -+MODULE_VERSION(XGBE_DRV_VERSION); -+MODULE_DESCRIPTION(XGBE_DRV_DESC); -+ -+unsigned int speed = 0; -+module_param(speed, uint, 0444); -+MODULE_PARM_DESC(speed, " Select operating speed (1=1GbE, 2=2.5GbE, 10=10GbE, any other value implies auto-negotiation"); -+ -+static void xgbe_default_config(struct xgbe_prv_data *pdata) -+{ -+ DBGPR("-->xgbe_default_config\n"); -+ -+ pdata->pblx8 = DMA_PBL_X8_ENABLE; -+ pdata->tx_sf_mode = MTL_TSF_ENABLE; -+ pdata->tx_threshold = MTL_TX_THRESHOLD_64; -+ pdata->tx_pbl = DMA_PBL_16; -+ pdata->tx_osp_mode = DMA_OSP_ENABLE; -+ pdata->rx_sf_mode = MTL_RSF_DISABLE; -+ pdata->rx_threshold = MTL_RX_THRESHOLD_64; -+ pdata->rx_pbl = DMA_PBL_16; -+ pdata->pause_autoneg = 1; -+ pdata->tx_pause = 1; -+ pdata->rx_pause = 1; -+ pdata->phy_speed = SPEED_UNKNOWN; -+ pdata->power_down = 0; -+ -+ if (speed == 10) { -+ pdata->default_autoneg = AUTONEG_DISABLE; -+ pdata->default_speed = SPEED_10000; -+ } else if (speed == 2) { -+ pdata->default_autoneg = AUTONEG_DISABLE; -+ pdata->default_speed = SPEED_2500; -+ } else if (speed == 1) { -+ pdata->default_autoneg = AUTONEG_DISABLE; -+ pdata->default_speed = SPEED_1000; -+ } else { -+ pdata->default_autoneg = AUTONEG_ENABLE; -+ pdata->default_speed = SPEED_10000; -+ } -+ -+ DBGPR("<--xgbe_default_config\n"); -+} -+ -+static void xgbe_init_all_fptrs(struct xgbe_prv_data *pdata) -+{ -+ xgbe_a0_init_function_ptrs_dev(&pdata->hw_if); -+ xgbe_a0_init_function_ptrs_desc(&pdata->desc_if); -+} -+ -+#ifdef CONFIG_ACPI -+static int xgbe_acpi_support(struct xgbe_prv_data *pdata) -+{ -+ struct device *dev = pdata->dev; -+ u32 property; -+ int ret; -+ -+ /* Obtain the system clock setting */ -+ ret = device_property_read_u32(dev, XGBE_ACPI_DMA_FREQ, &property); -+ if (ret) { -+ dev_err(dev, "unable to obtain %s property\n", -+ XGBE_ACPI_DMA_FREQ); -+ return ret; -+ } -+ pdata->sysclk_rate = property; -+ -+ /* Obtain the PTP clock setting */ -+ ret = device_property_read_u32(dev, XGBE_ACPI_PTP_FREQ, &property); -+ if (ret) { -+ dev_err(dev, "unable to obtain %s property\n", -+ XGBE_ACPI_PTP_FREQ); -+ return ret; -+ } -+ pdata->ptpclk_rate = property; -+ -+ return 0; -+} -+#else /* CONFIG_ACPI */ -+static int xgbe_acpi_support(struct xgbe_prv_data *pdata) -+{ -+ return -EINVAL; -+} -+#endif /* CONFIG_ACPI */ -+ -+#ifdef CONFIG_OF -+static int xgbe_of_support(struct xgbe_prv_data *pdata) -+{ -+ struct device *dev = pdata->dev; -+ -+ /* Obtain the system clock setting */ -+ pdata->sysclk = devm_clk_get(dev, XGBE_DMA_CLOCK); -+ if (IS_ERR(pdata->sysclk)) { -+ dev_err(dev, "dma devm_clk_get failed\n"); -+ return PTR_ERR(pdata->sysclk); -+ } -+ pdata->sysclk_rate = clk_get_rate(pdata->sysclk); -+ -+ /* Obtain the PTP clock setting */ -+ pdata->ptpclk = devm_clk_get(dev, XGBE_PTP_CLOCK); -+ if (IS_ERR(pdata->ptpclk)) { -+ dev_err(dev, "ptp devm_clk_get failed\n"); -+ return PTR_ERR(pdata->ptpclk); -+ } -+ pdata->ptpclk_rate = clk_get_rate(pdata->ptpclk); -+ -+ return 0; -+} -+#else /* CONFIG_OF */ -+static int xgbe_of_support(struct xgbe_prv_data *pdata) -+{ -+ return -EINVAL; -+} -+#endif /*CONFIG_OF */ -+ -+static int xgbe_probe(struct platform_device *pdev) -+{ -+ struct xgbe_prv_data *pdata; -+ struct xgbe_hw_if *hw_if; -+ struct xgbe_desc_if *desc_if; -+ struct net_device *netdev; -+ struct device *dev = &pdev->dev; -+ struct resource *res; -+ const char *phy_mode; -+ unsigned int i; -+ int ret; -+ -+ DBGPR("--> xgbe_probe\n"); -+ -+ netdev = alloc_etherdev_mq(sizeof(struct xgbe_prv_data), -+ XGBE_MAX_DMA_CHANNELS); -+ if (!netdev) { -+ dev_err(dev, "alloc_etherdev failed\n"); -+ ret = -ENOMEM; -+ goto err_alloc; -+ } -+ SET_NETDEV_DEV(netdev, dev); -+ pdata = netdev_priv(netdev); -+ pdata->netdev = netdev; -+ pdata->pdev = pdev; -+ pdata->adev = ACPI_COMPANION(dev); -+ pdata->dev = dev; -+ platform_set_drvdata(pdev, netdev); -+ -+ spin_lock_init(&pdata->lock); -+ mutex_init(&pdata->xpcs_mutex); -+ mutex_init(&pdata->rss_mutex); -+ spin_lock_init(&pdata->tstamp_lock); -+ -+ /* Check if we should use ACPI or DT */ -+ pdata->use_acpi = (!pdata->adev || acpi_disabled) ? 0 : 1; -+ -+ /* Set and validate the number of descriptors for a ring */ -+ BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_TX_DESC_CNT); -+ pdata->tx_desc_count = XGBE_TX_DESC_CNT; -+ if (pdata->tx_desc_count & (pdata->tx_desc_count - 1)) { -+ dev_err(dev, "tx descriptor count (%d) is not valid\n", -+ pdata->tx_desc_count); -+ ret = -EINVAL; -+ goto err_io; -+ } -+ BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_RX_DESC_CNT); -+ pdata->rx_desc_count = XGBE_RX_DESC_CNT; -+ if (pdata->rx_desc_count & (pdata->rx_desc_count - 1)) { -+ dev_err(dev, "rx descriptor count (%d) is not valid\n", -+ pdata->rx_desc_count); -+ ret = -EINVAL; -+ goto err_io; -+ } -+ -+ /* Obtain the mmio areas for the device */ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ pdata->xgmac_regs = devm_ioremap_resource(dev, res); -+ if (IS_ERR(pdata->xgmac_regs)) { -+ dev_err(dev, "xgmac ioremap failed\n"); -+ ret = PTR_ERR(pdata->xgmac_regs); -+ goto err_io; -+ } -+ DBGPR(" xgmac_regs = %p\n", pdata->xgmac_regs); -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1); -+ pdata->xpcs_regs = devm_ioremap_resource(dev, res); -+ if (IS_ERR(pdata->xpcs_regs)) { -+ dev_err(dev, "xpcs ioremap failed\n"); -+ ret = PTR_ERR(pdata->xpcs_regs); -+ goto err_io; -+ } -+ DBGPR(" xpcs_regs = %p\n", pdata->xpcs_regs); -+ -+ /* Retrieve the MAC address */ -+ ret = device_property_read_u8_array(dev, XGBE_MAC_ADDR_PROPERTY, -+ pdata->mac_addr, -+ sizeof(pdata->mac_addr)); -+ if (ret || !is_valid_ether_addr(pdata->mac_addr)) { -+ dev_err(dev, "invalid %s property\n", XGBE_MAC_ADDR_PROPERTY); -+ if (!ret) -+ ret = -EINVAL; -+ goto err_io; -+ } -+ -+ /* Retrieve the PHY mode - it must be "xgmii" */ -+ ret = device_property_read_string(dev, XGBE_PHY_MODE_PROPERTY, -+ &phy_mode); -+ if (ret || strcmp(phy_mode, phy_modes(PHY_INTERFACE_MODE_XGMII))) { -+ dev_err(dev, "invalid %s property\n", XGBE_PHY_MODE_PROPERTY); -+ if (!ret) -+ ret = -EINVAL; -+ goto err_io; -+ } -+ pdata->phy_mode = PHY_INTERFACE_MODE_XGMII; -+ -+ /* Check for per channel interrupt support */ -+ if (device_property_present(dev, XGBE_DMA_IRQS_PROPERTY)) -+ pdata->per_channel_irq = 1; -+ -+ /* Obtain device settings unique to ACPI/OF */ -+ if (pdata->use_acpi) -+ ret = xgbe_acpi_support(pdata); -+ else -+ ret = xgbe_of_support(pdata); -+ if (ret) -+ goto err_io; -+ -+ /* Set the DMA coherency values */ -+ pdata->coherent = device_dma_is_coherent(pdata->dev); -+ if (pdata->coherent) { -+ pdata->axdomain = XGBE_DMA_OS_AXDOMAIN; -+ pdata->arcache = XGBE_DMA_OS_ARCACHE; -+ pdata->awcache = XGBE_DMA_OS_AWCACHE; -+ } else { -+ pdata->axdomain = XGBE_DMA_SYS_AXDOMAIN; -+ pdata->arcache = XGBE_DMA_SYS_ARCACHE; -+ pdata->awcache = XGBE_DMA_SYS_AWCACHE; -+ } -+ -+ /* Set the DMA mask */ -+ if (!dev->dma_mask) -+ dev->dma_mask = &dev->coherent_dma_mask; -+ ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40)); -+ if (ret) { -+ dev_err(dev, "dma_set_mask_and_coherent failed\n"); -+ goto err_io; -+ } -+ -+ /* Get the device interrupt */ -+ ret = platform_get_irq(pdev, 0); -+ if (ret < 0) { -+ dev_err(dev, "platform_get_irq 0 failed\n"); -+ goto err_io; -+ } -+ pdata->dev_irq = ret; -+ -+ netdev->irq = pdata->dev_irq; -+ netdev->base_addr = (unsigned long)pdata->xgmac_regs; -+ memcpy(netdev->dev_addr, pdata->mac_addr, netdev->addr_len); -+ -+ /* Set all the function pointers */ -+ xgbe_init_all_fptrs(pdata); -+ hw_if = &pdata->hw_if; -+ desc_if = &pdata->desc_if; -+ -+ /* Issue software reset to device */ -+ hw_if->exit(pdata); -+ -+ /* Populate the hardware features */ -+ xgbe_a0_get_all_hw_features(pdata); -+ -+ /* Set default configuration data */ -+ xgbe_default_config(pdata); -+ -+ /* Calculate the number of Tx and Rx rings to be created -+ * -Tx (DMA) Channels map 1-to-1 to Tx Queues so set -+ * the number of Tx queues to the number of Tx channels -+ * enabled -+ * -Rx (DMA) Channels do not map 1-to-1 so use the actual -+ * number of Rx queues -+ */ -+ pdata->tx_ring_count = min_t(unsigned int, num_online_cpus(), -+ pdata->hw_feat.tx_ch_cnt); -+ pdata->tx_q_count = pdata->tx_ring_count; -+ ret = netif_set_real_num_tx_queues(netdev, pdata->tx_ring_count); -+ if (ret) { -+ dev_err(dev, "error setting real tx queue count\n"); -+ goto err_io; -+ } -+ -+ pdata->rx_ring_count = min_t(unsigned int, -+ netif_get_num_default_rss_queues(), -+ pdata->hw_feat.rx_ch_cnt); -+ pdata->rx_q_count = pdata->hw_feat.rx_q_cnt; -+ ret = netif_set_real_num_rx_queues(netdev, pdata->rx_ring_count); -+ if (ret) { -+ dev_err(dev, "error setting real rx queue count\n"); -+ goto err_io; -+ } -+ -+ /* Initialize RSS hash key and lookup table */ -+ netdev_rss_key_fill(pdata->rss_key, sizeof(pdata->rss_key)); -+ -+ for (i = 0; i < XGBE_RSS_MAX_TABLE_SIZE; i++) -+ XGMAC_SET_BITS(pdata->rss_table[i], MAC_RSSDR, DMCH, -+ i % pdata->rx_ring_count); -+ -+ XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, IP2TE, 1); -+ XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, TCP4TE, 1); -+ XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, UDP4TE, 1); -+ -+ /* Prepare to regsiter with MDIO */ -+ pdata->mii_bus_id = kasprintf(GFP_KERNEL, "%s", pdev->name); -+ if (!pdata->mii_bus_id) { -+ dev_err(dev, "failed to allocate mii bus id\n"); -+ ret = -ENOMEM; -+ goto err_io; -+ } -+ ret = xgbe_a0_mdio_register(pdata); -+ if (ret) -+ goto err_bus_id; -+ -+ /* Set device operations */ -+ netdev->netdev_ops = xgbe_a0_get_netdev_ops(); -+ netdev->ethtool_ops = xgbe_a0_get_ethtool_ops(); -+#ifdef CONFIG_AMD_XGBE_DCB -+ netdev->dcbnl_ops = xgbe_a0_get_dcbnl_ops(); -+#endif -+ -+ /* Set device features */ -+ netdev->hw_features = NETIF_F_SG | -+ NETIF_F_IP_CSUM | -+ NETIF_F_IPV6_CSUM | -+ NETIF_F_RXCSUM | -+ NETIF_F_TSO | -+ NETIF_F_TSO6 | -+ NETIF_F_GRO | -+ NETIF_F_HW_VLAN_CTAG_RX | -+ NETIF_F_HW_VLAN_CTAG_TX | -+ NETIF_F_HW_VLAN_CTAG_FILTER; -+ -+ if (pdata->hw_feat.rss) -+ netdev->hw_features |= NETIF_F_RXHASH; -+ -+ netdev->vlan_features |= NETIF_F_SG | -+ NETIF_F_IP_CSUM | -+ NETIF_F_IPV6_CSUM | -+ NETIF_F_TSO | -+ NETIF_F_TSO6; -+ -+ netdev->features |= netdev->hw_features; -+ pdata->netdev_features = netdev->features; -+ -+ netdev->priv_flags |= IFF_UNICAST_FLT; -+ -+ xgbe_a0_init_rx_coalesce(pdata); -+ xgbe_a0_init_tx_coalesce(pdata); -+ -+ netif_carrier_off(netdev); -+ ret = register_netdev(netdev); -+ if (ret) { -+ dev_err(dev, "net device registration failed\n"); -+ goto err_reg_netdev; -+ } -+ -+ xgbe_a0_ptp_register(pdata); -+ -+ xgbe_a0_debugfs_init(pdata); -+ -+ netdev_notice(netdev, "net device enabled\n"); -+ -+ DBGPR("<-- xgbe_probe\n"); -+ -+ return 0; -+ -+err_reg_netdev: -+ xgbe_a0_mdio_unregister(pdata); -+ -+err_bus_id: -+ kfree(pdata->mii_bus_id); -+ -+err_io: -+ free_netdev(netdev); -+ -+err_alloc: -+ dev_notice(dev, "net device not enabled\n"); -+ -+ return ret; -+} -+ -+static int xgbe_remove(struct platform_device *pdev) -+{ -+ struct net_device *netdev = platform_get_drvdata(pdev); -+ struct xgbe_prv_data *pdata = netdev_priv(netdev); -+ -+ DBGPR("-->xgbe_remove\n"); -+ -+ xgbe_a0_debugfs_exit(pdata); -+ -+ xgbe_a0_ptp_unregister(pdata); -+ -+ unregister_netdev(netdev); -+ -+ xgbe_a0_mdio_unregister(pdata); -+ -+ kfree(pdata->mii_bus_id); -+ -+ free_netdev(netdev); -+ -+ DBGPR("<--xgbe_remove\n"); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PM -+static int xgbe_suspend(struct device *dev) -+{ -+ struct net_device *netdev = dev_get_drvdata(dev); -+ int ret; -+ -+ DBGPR("-->xgbe_suspend\n"); -+ -+ if (!netif_running(netdev)) { -+ DBGPR("<--xgbe_dev_suspend\n"); -+ return -EINVAL; -+ } -+ -+ ret = xgbe_a0_powerdown(netdev, XGMAC_DRIVER_CONTEXT); -+ -+ DBGPR("<--xgbe_suspend\n"); -+ -+ return ret; -+} -+ -+static int xgbe_resume(struct device *dev) -+{ -+ struct net_device *netdev = dev_get_drvdata(dev); -+ int ret; -+ -+ DBGPR("-->xgbe_resume\n"); -+ -+ if (!netif_running(netdev)) { -+ DBGPR("<--xgbe_dev_resume\n"); -+ return -EINVAL; -+ } -+ -+ ret = xgbe_a0_powerup(netdev, XGMAC_DRIVER_CONTEXT); -+ -+ DBGPR("<--xgbe_resume\n"); -+ -+ return ret; -+} -+#endif /* CONFIG_PM */ -+ -+#ifdef CONFIG_ACPI -+static const struct acpi_device_id xgbe_a0_acpi_match[] = { -+ { "AMDI8000", 0 }, -+ {}, -+}; -+ -+MODULE_DEVICE_TABLE(acpi, xgbe_a0_acpi_match); -+#endif -+ -+#ifdef CONFIG_OF -+static const struct of_device_id xgbe_a0_of_match[] = { -+ { .compatible = "amd,xgbe-seattle-v0a", }, -+ {}, -+}; -+ -+MODULE_DEVICE_TABLE(of, xgbe_a0_of_match); -+#endif -+ -+static SIMPLE_DEV_PM_OPS(xgbe_pm_ops, xgbe_suspend, xgbe_resume); -+ -+static struct platform_driver xgbe_a0_driver = { -+ .driver = { -+ .name = "amd-xgbe-a0", -+#ifdef CONFIG_ACPI -+ .acpi_match_table = xgbe_a0_acpi_match, -+#endif -+#ifdef CONFIG_OF -+ .of_match_table = xgbe_a0_of_match, -+#endif -+ .pm = &xgbe_pm_ops, -+ }, -+ .probe = xgbe_probe, -+ .remove = xgbe_remove, -+}; -+ -+module_platform_driver(xgbe_a0_driver); -diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-mdio.c b/drivers/net/ethernet/amd/xgbe-a0/xgbe-mdio.c -new file mode 100644 -index 0000000..b84d048 ---- /dev/null -+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-mdio.c -@@ -0,0 +1,312 @@ -+/* -+ * AMD 10Gb Ethernet driver -+ * -+ * This file is available to you under your choice of the following two -+ * licenses: -+ * -+ * License 1: GPLv2 -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * -+ * This file is free software; you may copy, redistribute and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation, either version 2 of the License, or (at -+ * your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program. If not, see . -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * -+ * License 2: Modified BSD -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions are met: -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * * Neither the name of Advanced Micro Devices, Inc. nor the -+ * names of its contributors may be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY -+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include "xgbe.h" -+#include "xgbe-common.h" -+ -+static int xgbe_mdio_read(struct mii_bus *mii, int prtad, int mmd_reg) -+{ -+ struct xgbe_prv_data *pdata = mii->priv; -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ int mmd_data; -+ -+ DBGPR_MDIO("-->xgbe_mdio_read: prtad=%#x mmd_reg=%#x\n", -+ prtad, mmd_reg); -+ -+ mmd_data = hw_if->read_mmd_regs(pdata, prtad, mmd_reg); -+ -+ DBGPR_MDIO("<--xgbe_mdio_read: mmd_data=%#x\n", mmd_data); -+ -+ return mmd_data; -+} -+ -+static int xgbe_mdio_write(struct mii_bus *mii, int prtad, int mmd_reg, -+ u16 mmd_val) -+{ -+ struct xgbe_prv_data *pdata = mii->priv; -+ struct xgbe_hw_if *hw_if = &pdata->hw_if; -+ int mmd_data = mmd_val; -+ -+ DBGPR_MDIO("-->xgbe_mdio_write: prtad=%#x mmd_reg=%#x mmd_data=%#x\n", -+ prtad, mmd_reg, mmd_data); -+ -+ hw_if->write_mmd_regs(pdata, prtad, mmd_reg, mmd_data); -+ -+ DBGPR_MDIO("<--xgbe_mdio_write\n"); -+ -+ return 0; -+} -+ -+void xgbe_a0_dump_phy_registers(struct xgbe_prv_data *pdata) -+{ -+ struct device *dev = pdata->dev; -+ struct phy_device *phydev = pdata->mii->phy_map[XGBE_PRTAD]; -+ int i; -+ -+ dev_alert(dev, "\n************* PHY Reg dump **********************\n"); -+ -+ dev_alert(dev, "PCS Control Reg (%#04x) = %#04x\n", MDIO_CTRL1, -+ XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1)); -+ dev_alert(dev, "PCS Status Reg (%#04x) = %#04x\n", MDIO_STAT1, -+ XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1)); -+ dev_alert(dev, "Phy Id (PHYS ID 1 %#04x)= %#04x\n", MDIO_DEVID1, -+ XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVID1)); -+ dev_alert(dev, "Phy Id (PHYS ID 2 %#04x)= %#04x\n", MDIO_DEVID2, -+ XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVID2)); -+ dev_alert(dev, "Devices in Package (%#04x)= %#04x\n", MDIO_DEVS1, -+ XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVS1)); -+ dev_alert(dev, "Devices in Package (%#04x)= %#04x\n", MDIO_DEVS2, -+ XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVS2)); -+ -+ dev_alert(dev, "Auto-Neg Control Reg (%#04x) = %#04x\n", MDIO_CTRL1, -+ XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_CTRL1)); -+ dev_alert(dev, "Auto-Neg Status Reg (%#04x) = %#04x\n", MDIO_STAT1, -+ XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_STAT1)); -+ dev_alert(dev, "Auto-Neg Ad Reg 1 (%#04x) = %#04x\n", -+ MDIO_AN_ADVERTISE, -+ XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE)); -+ dev_alert(dev, "Auto-Neg Ad Reg 2 (%#04x) = %#04x\n", -+ MDIO_AN_ADVERTISE + 1, -+ XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1)); -+ dev_alert(dev, "Auto-Neg Ad Reg 3 (%#04x) = %#04x\n", -+ MDIO_AN_ADVERTISE + 2, -+ XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2)); -+ dev_alert(dev, "Auto-Neg Completion Reg (%#04x) = %#04x\n", -+ MDIO_AN_COMP_STAT, -+ XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_COMP_STAT)); -+ -+ dev_alert(dev, "MMD Device Mask = %#x\n", -+ phydev->c45_ids.devices_in_package); -+ for (i = 0; i < ARRAY_SIZE(phydev->c45_ids.device_ids); i++) -+ dev_alert(dev, " MMD %d: ID = %#08x\n", i, -+ phydev->c45_ids.device_ids[i]); -+ -+ dev_alert(dev, "\n*************************************************\n"); -+} -+ -+int xgbe_a0_mdio_register(struct xgbe_prv_data *pdata) -+{ -+ struct mii_bus *mii; -+ struct phy_device *phydev; -+ int ret = 0; -+ -+ DBGPR("-->xgbe_a0_mdio_register\n"); -+ -+ mii = mdiobus_alloc(); -+ if (!mii) { -+ dev_err(pdata->dev, "mdiobus_alloc failed\n"); -+ return -ENOMEM; -+ } -+ -+ /* Register on the MDIO bus (don't probe any PHYs) */ -+ mii->name = XGBE_PHY_NAME; -+ mii->read = xgbe_mdio_read; -+ mii->write = xgbe_mdio_write; -+ snprintf(mii->id, sizeof(mii->id), "%s", pdata->mii_bus_id); -+ mii->priv = pdata; -+ mii->phy_mask = ~0; -+ mii->parent = pdata->dev; -+ ret = mdiobus_register(mii); -+ if (ret) { -+ dev_err(pdata->dev, "mdiobus_register failed\n"); -+ goto err_mdiobus_alloc; -+ } -+ DBGPR(" mdiobus_register succeeded for %s\n", pdata->mii_bus_id); -+ -+ /* Probe the PCS using Clause 45 */ -+ phydev = get_phy_device(mii, XGBE_PRTAD, true); -+ if (IS_ERR(phydev) || !phydev || -+ !phydev->c45_ids.device_ids[MDIO_MMD_PCS]) { -+ dev_err(pdata->dev, "get_phy_device failed\n"); -+ ret = phydev ? PTR_ERR(phydev) : -ENOLINK; -+ goto err_mdiobus_register; -+ } -+ request_module(MDIO_MODULE_PREFIX MDIO_ID_FMT, -+ MDIO_ID_ARGS(phydev->c45_ids.device_ids[MDIO_MMD_PCS])); -+ -+ ret = phy_device_register(phydev); -+ if (ret) { -+ dev_err(pdata->dev, "phy_device_register failed\n"); -+ goto err_phy_device; -+ } -+ if (!phydev->dev.driver) { -+ dev_err(pdata->dev, "phy driver probe failed\n"); -+ ret = -EIO; -+ goto err_phy_device; -+ } -+ -+ /* Add a reference to the PHY driver so it can't be unloaded */ -+ pdata->phy_module = phydev->dev.driver->owner; -+ if (!try_module_get(pdata->phy_module)) { -+ dev_err(pdata->dev, "try_module_get failed\n"); -+ ret = -EIO; -+ goto err_phy_device; -+ } -+ -+ pdata->mii = mii; -+ pdata->mdio_mmd = MDIO_MMD_PCS; -+ -+ phydev->autoneg = pdata->default_autoneg; -+ if (phydev->autoneg == AUTONEG_DISABLE) { -+ phydev->speed = pdata->default_speed; -+ phydev->duplex = DUPLEX_FULL; -+ -+ phydev->advertising &= ~ADVERTISED_Autoneg; -+ } -+ -+ pdata->phydev = phydev; -+ -+ DBGPHY_REGS(pdata); -+ -+ DBGPR("<--xgbe_a0_mdio_register\n"); -+ -+ return 0; -+ -+err_phy_device: -+ phy_device_free(phydev); -+ -+err_mdiobus_register: -+ mdiobus_unregister(mii); -+ -+err_mdiobus_alloc: -+ mdiobus_free(mii); -+ -+ return ret; -+} -+ -+void xgbe_a0_mdio_unregister(struct xgbe_prv_data *pdata) -+{ -+ DBGPR("-->xgbe_a0_mdio_unregister\n"); -+ -+ pdata->phydev = NULL; -+ -+ module_put(pdata->phy_module); -+ pdata->phy_module = NULL; -+ -+ mdiobus_unregister(pdata->mii); -+ pdata->mii->priv = NULL; -+ -+ mdiobus_free(pdata->mii); -+ pdata->mii = NULL; -+ -+ DBGPR("<--xgbe_a0_mdio_unregister\n"); -+} -diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe-ptp.c b/drivers/net/ethernet/amd/xgbe-a0/xgbe-ptp.c -new file mode 100644 -index 0000000..1016aeb ---- /dev/null -+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe-ptp.c -@@ -0,0 +1,278 @@ -+/* -+ * AMD 10Gb Ethernet driver -+ * -+ * This file is available to you under your choice of the following two -+ * licenses: -+ * -+ * License 1: GPLv2 -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * -+ * This file is free software; you may copy, redistribute and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation, either version 2 of the License, or (at -+ * your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program. If not, see . -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * -+ * License 2: Modified BSD -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions are met: -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * * Neither the name of Advanced Micro Devices, Inc. nor the -+ * names of its contributors may be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY -+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include "xgbe.h" -+#include "xgbe-common.h" -+ -+static cycle_t xgbe_cc_read(const struct cyclecounter *cc) -+{ -+ struct xgbe_prv_data *pdata = container_of(cc, -+ struct xgbe_prv_data, -+ tstamp_cc); -+ u64 nsec; -+ -+ nsec = pdata->hw_if.get_tstamp_time(pdata); -+ -+ return nsec; -+} -+ -+static int xgbe_adjfreq(struct ptp_clock_info *info, s32 delta) -+{ -+ struct xgbe_prv_data *pdata = container_of(info, -+ struct xgbe_prv_data, -+ ptp_clock_info); -+ unsigned long flags; -+ u64 adjust; -+ u32 addend, diff; -+ unsigned int neg_adjust = 0; -+ -+ if (delta < 0) { -+ neg_adjust = 1; -+ delta = -delta; -+ } -+ -+ adjust = pdata->tstamp_addend; -+ adjust *= delta; -+ diff = div_u64(adjust, 1000000000UL); -+ -+ addend = (neg_adjust) ? pdata->tstamp_addend - diff : -+ pdata->tstamp_addend + diff; -+ -+ spin_lock_irqsave(&pdata->tstamp_lock, flags); -+ -+ pdata->hw_if.update_tstamp_addend(pdata, addend); -+ -+ spin_unlock_irqrestore(&pdata->tstamp_lock, flags); -+ -+ return 0; -+} -+ -+static int xgbe_adjtime(struct ptp_clock_info *info, s64 delta) -+{ -+ struct xgbe_prv_data *pdata = container_of(info, -+ struct xgbe_prv_data, -+ ptp_clock_info); -+ unsigned long flags; -+ -+ spin_lock_irqsave(&pdata->tstamp_lock, flags); -+ timecounter_adjtime(&pdata->tstamp_tc, delta); -+ spin_unlock_irqrestore(&pdata->tstamp_lock, flags); -+ -+ return 0; -+} -+ -+static int xgbe_gettime(struct ptp_clock_info *info, struct timespec64 *ts) -+{ -+ struct xgbe_prv_data *pdata = container_of(info, -+ struct xgbe_prv_data, -+ ptp_clock_info); -+ unsigned long flags; -+ u64 nsec; -+ -+ spin_lock_irqsave(&pdata->tstamp_lock, flags); -+ -+ nsec = timecounter_read(&pdata->tstamp_tc); -+ -+ spin_unlock_irqrestore(&pdata->tstamp_lock, flags); -+ -+ *ts = ns_to_timespec64(nsec); -+ -+ return 0; -+} -+ -+static int xgbe_settime(struct ptp_clock_info *info, const struct timespec64 *ts) -+{ -+ struct xgbe_prv_data *pdata = container_of(info, -+ struct xgbe_prv_data, -+ ptp_clock_info); -+ unsigned long flags; -+ u64 nsec; -+ -+ nsec = timespec64_to_ns(ts); -+ -+ spin_lock_irqsave(&pdata->tstamp_lock, flags); -+ -+ timecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc, nsec); -+ -+ spin_unlock_irqrestore(&pdata->tstamp_lock, flags); -+ -+ return 0; -+} -+ -+static int xgbe_enable(struct ptp_clock_info *info, -+ struct ptp_clock_request *request, int on) -+{ -+ return -EOPNOTSUPP; -+} -+ -+void xgbe_a0_ptp_register(struct xgbe_prv_data *pdata) -+{ -+ struct ptp_clock_info *info = &pdata->ptp_clock_info; -+ struct ptp_clock *clock; -+ struct cyclecounter *cc = &pdata->tstamp_cc; -+ u64 dividend; -+ -+ snprintf(info->name, sizeof(info->name), "%s", -+ netdev_name(pdata->netdev)); -+ info->owner = THIS_MODULE; -+ info->max_adj = pdata->ptpclk_rate; -+ info->adjfreq = xgbe_adjfreq; -+ info->adjtime = xgbe_adjtime; -+ info->gettime64 = xgbe_gettime; -+ info->settime64 = xgbe_settime; -+ info->enable = xgbe_enable; -+ -+ clock = ptp_clock_register(info, pdata->dev); -+ if (IS_ERR(clock)) { -+ dev_err(pdata->dev, "ptp_clock_register failed\n"); -+ return; -+ } -+ -+ pdata->ptp_clock = clock; -+ -+ /* Calculate the addend: -+ * addend = 2^32 / (PTP ref clock / 50Mhz) -+ * = (2^32 * 50Mhz) / PTP ref clock -+ */ -+ dividend = 50000000; -+ dividend <<= 32; -+ pdata->tstamp_addend = div_u64(dividend, pdata->ptpclk_rate); -+ -+ /* Setup the timecounter */ -+ cc->read = xgbe_cc_read; -+ cc->mask = CLOCKSOURCE_MASK(64); -+ cc->mult = 1; -+ cc->shift = 0; -+ -+ timecounter_init(&pdata->tstamp_tc, &pdata->tstamp_cc, -+ ktime_to_ns(ktime_get_real())); -+ -+ /* Disable all timestamping to start */ -+ XGMAC_IOWRITE(pdata, MAC_TCR, 0); -+ pdata->tstamp_config.tx_type = HWTSTAMP_TX_OFF; -+ pdata->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; -+} -+ -+void xgbe_a0_ptp_unregister(struct xgbe_prv_data *pdata) -+{ -+ if (pdata->ptp_clock) -+ ptp_clock_unregister(pdata->ptp_clock); -+} -diff --git a/drivers/net/ethernet/amd/xgbe-a0/xgbe.h b/drivers/net/ethernet/amd/xgbe-a0/xgbe.h -new file mode 100644 -index 0000000..04c00d2 ---- /dev/null -+++ b/drivers/net/ethernet/amd/xgbe-a0/xgbe.h -@@ -0,0 +1,868 @@ -+/* -+ * AMD 10Gb Ethernet driver -+ * -+ * This file is available to you under your choice of the following two -+ * licenses: -+ * -+ * License 1: GPLv2 -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * -+ * This file is free software; you may copy, redistribute and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation, either version 2 of the License, or (at -+ * your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program. If not, see . -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * -+ * License 2: Modified BSD -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions are met: -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * * Neither the name of Advanced Micro Devices, Inc. nor the -+ * names of its contributors may be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY -+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * This file incorporates work covered by the following copyright and -+ * permission notice: -+ * The Synopsys DWC ETHER XGMAC Software Driver and documentation -+ * (hereinafter "Software") is an unsupported proprietary work of Synopsys, -+ * Inc. unless otherwise expressly agreed to in writing between Synopsys -+ * and you. -+ * -+ * The Software IS NOT an item of Licensed Software or Licensed Product -+ * under any End User Software License Agreement or Agreement for Licensed -+ * Product with Synopsys or any supplement thereto. Permission is hereby -+ * granted, free of charge, to any person obtaining a copy of this software -+ * annotated with this license and the Software, to deal in the Software -+ * without restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or sell copies -+ * of the Software, and to permit persons to whom the Software is furnished -+ * to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice shall be included -+ * in all copies or substantial portions of the Software. -+ * -+ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" -+ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED -+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A -+ * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS -+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -+ * THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+#ifndef __XGBE_H__ -+#define __XGBE_H__ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define XGBE_DRV_NAME "amd-xgbe" -+#define XGBE_DRV_VERSION "0.0.0-a" -+#define XGBE_DRV_DESC "AMD 10 Gigabit Ethernet Driver" -+ -+/* Descriptor related defines */ -+#define XGBE_TX_DESC_CNT 512 -+#define XGBE_TX_DESC_MIN_FREE (XGBE_TX_DESC_CNT >> 3) -+#define XGBE_TX_DESC_MAX_PROC (XGBE_TX_DESC_CNT >> 1) -+#define XGBE_RX_DESC_CNT 512 -+ -+#define XGBE_TX_MAX_BUF_SIZE (0x3fff & ~(64 - 1)) -+ -+/* Descriptors required for maximum contigous TSO/GSO packet */ -+#define XGBE_TX_MAX_SPLIT ((GSO_MAX_SIZE / XGBE_TX_MAX_BUF_SIZE) + 1) -+ -+/* Maximum possible descriptors needed for an SKB: -+ * - Maximum number of SKB frags -+ * - Maximum descriptors for contiguous TSO/GSO packet -+ * - Possible context descriptor -+ * - Possible TSO header descriptor -+ */ -+#define XGBE_TX_MAX_DESCS (MAX_SKB_FRAGS + XGBE_TX_MAX_SPLIT + 2) -+ -+#define XGBE_RX_MIN_BUF_SIZE (ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN) -+#define XGBE_RX_BUF_ALIGN 64 -+#define XGBE_SKB_ALLOC_SIZE 256 -+#define XGBE_SPH_HDSMS_SIZE 2 /* Keep in sync with SKB_ALLOC_SIZE */ -+ -+#define XGBE_MAX_DMA_CHANNELS 16 -+#define XGBE_MAX_QUEUES 16 -+#define XGBE_DMA_STOP_TIMEOUT 5 -+ -+/* DMA cache settings - Outer sharable, write-back, write-allocate */ -+#define XGBE_DMA_OS_AXDOMAIN 0x2 -+#define XGBE_DMA_OS_ARCACHE 0xb -+#define XGBE_DMA_OS_AWCACHE 0xf -+ -+/* DMA cache settings - System, no caches used */ -+#define XGBE_DMA_SYS_AXDOMAIN 0x3 -+#define XGBE_DMA_SYS_ARCACHE 0x0 -+#define XGBE_DMA_SYS_AWCACHE 0x0 -+ -+#define XGBE_DMA_INTERRUPT_MASK 0x31c7 -+ -+#define XGMAC_MIN_PACKET 60 -+#define XGMAC_STD_PACKET_MTU 1500 -+#define XGMAC_MAX_STD_PACKET 1518 -+#define XGMAC_JUMBO_PACKET_MTU 9000 -+#define XGMAC_MAX_JUMBO_PACKET 9018 -+ -+/* MDIO bus phy name */ -+#define XGBE_PHY_NAME "amd_xgbe_phy_a0" -+#define XGBE_PRTAD 0 -+ -+/* Common property names */ -+#define XGBE_MAC_ADDR_PROPERTY "mac-address" -+#define XGBE_PHY_MODE_PROPERTY "phy-mode" -+#define XGBE_DMA_IRQS_PROPERTY "amd,per-channel-interrupt" -+ -+/* Device-tree clock names */ -+#define XGBE_DMA_CLOCK "dma_clk" -+#define XGBE_PTP_CLOCK "ptp_clk" -+ -+/* ACPI property names */ -+#define XGBE_ACPI_DMA_FREQ "amd,dma-freq" -+#define XGBE_ACPI_PTP_FREQ "amd,ptp-freq" -+ -+/* Timestamp support - values based on 50MHz PTP clock -+ * 50MHz => 20 nsec -+ */ -+#define XGBE_TSTAMP_SSINC 20 -+#define XGBE_TSTAMP_SNSINC 0 -+ -+/* Driver PMT macros */ -+#define XGMAC_DRIVER_CONTEXT 1 -+#define XGMAC_IOCTL_CONTEXT 2 -+ -+#define XGBE_FIFO_MAX 81920 -+#define XGBE_FIFO_SIZE_B(x) (x) -+#define XGBE_FIFO_SIZE_KB(x) (x * 1024) -+ -+#define XGBE_TC_MIN_QUANTUM 10 -+ -+/* Helper macro for descriptor handling -+ * Always use XGBE_GET_DESC_DATA to access the descriptor data -+ * since the index is free-running and needs to be and-ed -+ * with the descriptor count value of the ring to index to -+ * the proper descriptor data. -+ */ -+#define XGBE_GET_DESC_DATA(_ring, _idx) \ -+ ((_ring)->rdata + \ -+ ((_idx) & ((_ring)->rdesc_count - 1))) -+ -+/* Default coalescing parameters */ -+#define XGMAC_INIT_DMA_TX_USECS 50 -+#define XGMAC_INIT_DMA_TX_FRAMES 25 -+ -+#define XGMAC_MAX_DMA_RIWT 0xff -+#define XGMAC_INIT_DMA_RX_USECS 30 -+#define XGMAC_INIT_DMA_RX_FRAMES 25 -+ -+/* Flow control queue count */ -+#define XGMAC_MAX_FLOW_CONTROL_QUEUES 8 -+ -+/* Maximum MAC address hash table size (256 bits = 8 bytes) */ -+#define XGBE_MAC_HASH_TABLE_SIZE 8 -+ -+/* Receive Side Scaling */ -+#define XGBE_RSS_HASH_KEY_SIZE 40 -+#define XGBE_RSS_MAX_TABLE_SIZE 256 -+#define XGBE_RSS_LOOKUP_TABLE_TYPE 0 -+#define XGBE_RSS_HASH_KEY_TYPE 1 -+ -+struct xgbe_prv_data; -+ -+struct xgbe_packet_data { -+ struct sk_buff *skb; -+ -+ unsigned int attributes; -+ -+ unsigned int errors; -+ -+ unsigned int rdesc_count; -+ unsigned int length; -+ -+ unsigned int header_len; -+ unsigned int tcp_header_len; -+ unsigned int tcp_payload_len; -+ unsigned short mss; -+ -+ unsigned short vlan_ctag; -+ -+ u64 rx_tstamp; -+ -+ u32 rss_hash; -+ enum pkt_hash_types rss_hash_type; -+ -+ unsigned int tx_packets; -+ unsigned int tx_bytes; -+}; -+ -+/* Common Rx and Tx descriptor mapping */ -+struct xgbe_ring_desc { -+ __le32 desc0; -+ __le32 desc1; -+ __le32 desc2; -+ __le32 desc3; -+}; -+ -+/* Page allocation related values */ -+struct xgbe_page_alloc { -+ struct page *pages; -+ unsigned int pages_len; -+ unsigned int pages_offset; -+ -+ dma_addr_t pages_dma; -+}; -+ -+/* Ring entry buffer data */ -+struct xgbe_buffer_data { -+ struct xgbe_page_alloc pa; -+ struct xgbe_page_alloc pa_unmap; -+ -+ dma_addr_t dma; -+ unsigned int dma_len; -+}; -+ -+/* Tx-related ring data */ -+struct xgbe_tx_ring_data { -+ unsigned int packets; /* BQL packet count */ -+ unsigned int bytes; /* BQL byte count */ -+}; -+ -+/* Rx-related ring data */ -+struct xgbe_rx_ring_data { -+ struct xgbe_buffer_data hdr; /* Header locations */ -+ struct xgbe_buffer_data buf; /* Payload locations */ -+ -+ unsigned short hdr_len; /* Length of received header */ -+ unsigned short len; /* Length of received packet */ -+}; -+ -+/* Structure used to hold information related to the descriptor -+ * and the packet associated with the descriptor (always use -+ * use the XGBE_GET_DESC_DATA macro to access this data from the ring) -+ */ -+struct xgbe_ring_data { -+ struct xgbe_ring_desc *rdesc; /* Virtual address of descriptor */ -+ dma_addr_t rdesc_dma; /* DMA address of descriptor */ -+ -+ struct sk_buff *skb; /* Virtual address of SKB */ -+ dma_addr_t skb_dma; /* DMA address of SKB data */ -+ unsigned int skb_dma_len; /* Length of SKB DMA area */ -+ -+ struct xgbe_tx_ring_data tx; /* Tx-related data */ -+ struct xgbe_rx_ring_data rx; /* Rx-related data */ -+ -+ unsigned int interrupt; /* Interrupt indicator */ -+ -+ unsigned int mapped_as_page; -+ -+ /* Incomplete receive save location. If the budget is exhausted -+ * or the last descriptor (last normal descriptor or a following -+ * context descriptor) has not been DMA'd yet the current state -+ * of the receive processing needs to be saved. -+ */ -+ unsigned int state_saved; -+ struct { -+ unsigned int incomplete; -+ unsigned int context_next; -+ struct sk_buff *skb; -+ unsigned int len; -+ unsigned int error; -+ } state; -+}; -+ -+struct xgbe_ring { -+ /* Ring lock - used just for TX rings at the moment */ -+ spinlock_t lock; -+ -+ /* Per packet related information */ -+ struct xgbe_packet_data packet_data; -+ -+ /* Virtual/DMA addresses and count of allocated descriptor memory */ -+ struct xgbe_ring_desc *rdesc; -+ dma_addr_t rdesc_dma; -+ unsigned int rdesc_count; -+ -+ /* Array of descriptor data corresponding the descriptor memory -+ * (always use the XGBE_GET_DESC_DATA macro to access this data) -+ */ -+ struct xgbe_ring_data *rdata; -+ -+ /* Page allocation for RX buffers */ -+ struct xgbe_page_alloc rx_hdr_pa; -+ struct xgbe_page_alloc rx_buf_pa; -+ -+ /* Ring index values -+ * cur - Tx: index of descriptor to be used for current transfer -+ * Rx: index of descriptor to check for packet availability -+ * dirty - Tx: index of descriptor to check for transfer complete -+ * Rx: index of descriptor to check for buffer reallocation -+ */ -+ unsigned int cur; -+ unsigned int dirty; -+ -+ /* Coalesce frame count used for interrupt bit setting */ -+ unsigned int coalesce_count; -+ -+ union { -+ struct { -+ unsigned int queue_stopped; -+ unsigned int xmit_more; -+ unsigned short cur_mss; -+ unsigned short cur_vlan_ctag; -+ } tx; -+ }; -+} ____cacheline_aligned; -+ -+/* Structure used to describe the descriptor rings associated with -+ * a DMA channel. -+ */ -+struct xgbe_channel { -+ char name[16]; -+ -+ /* Address of private data area for device */ -+ struct xgbe_prv_data *pdata; -+ -+ /* Queue index and base address of queue's DMA registers */ -+ unsigned int queue_index; -+ void __iomem *dma_regs; -+ -+ /* Per channel interrupt irq number */ -+ int dma_irq; -+ char dma_irq_name[IFNAMSIZ + 32]; -+ -+ /* Netdev related settings */ -+ struct napi_struct napi; -+ -+ unsigned int saved_ier; -+ -+ unsigned int tx_timer_active; -+ struct hrtimer tx_timer; -+ -+ struct xgbe_ring *tx_ring; -+ struct xgbe_ring *rx_ring; -+} ____cacheline_aligned; -+ -+enum xgbe_int { -+ XGMAC_INT_DMA_CH_SR_TI, -+ XGMAC_INT_DMA_CH_SR_TPS, -+ XGMAC_INT_DMA_CH_SR_TBU, -+ XGMAC_INT_DMA_CH_SR_RI, -+ XGMAC_INT_DMA_CH_SR_RBU, -+ XGMAC_INT_DMA_CH_SR_RPS, -+ XGMAC_INT_DMA_CH_SR_TI_RI, -+ XGMAC_INT_DMA_CH_SR_FBE, -+ XGMAC_INT_DMA_ALL, -+}; -+ -+enum xgbe_int_state { -+ XGMAC_INT_STATE_SAVE, -+ XGMAC_INT_STATE_RESTORE, -+}; -+ -+enum xgbe_mtl_fifo_size { -+ XGMAC_MTL_FIFO_SIZE_256 = 0x00, -+ XGMAC_MTL_FIFO_SIZE_512 = 0x01, -+ XGMAC_MTL_FIFO_SIZE_1K = 0x03, -+ XGMAC_MTL_FIFO_SIZE_2K = 0x07, -+ XGMAC_MTL_FIFO_SIZE_4K = 0x0f, -+ XGMAC_MTL_FIFO_SIZE_8K = 0x1f, -+ XGMAC_MTL_FIFO_SIZE_16K = 0x3f, -+ XGMAC_MTL_FIFO_SIZE_32K = 0x7f, -+ XGMAC_MTL_FIFO_SIZE_64K = 0xff, -+ XGMAC_MTL_FIFO_SIZE_128K = 0x1ff, -+ XGMAC_MTL_FIFO_SIZE_256K = 0x3ff, -+}; -+ -+struct xgbe_mmc_stats { -+ /* Tx Stats */ -+ u64 txoctetcount_gb; -+ u64 txframecount_gb; -+ u64 txbroadcastframes_g; -+ u64 txmulticastframes_g; -+ u64 tx64octets_gb; -+ u64 tx65to127octets_gb; -+ u64 tx128to255octets_gb; -+ u64 tx256to511octets_gb; -+ u64 tx512to1023octets_gb; -+ u64 tx1024tomaxoctets_gb; -+ u64 txunicastframes_gb; -+ u64 txmulticastframes_gb; -+ u64 txbroadcastframes_gb; -+ u64 txunderflowerror; -+ u64 txoctetcount_g; -+ u64 txframecount_g; -+ u64 txpauseframes; -+ u64 txvlanframes_g; -+ -+ /* Rx Stats */ -+ u64 rxframecount_gb; -+ u64 rxoctetcount_gb; -+ u64 rxoctetcount_g; -+ u64 rxbroadcastframes_g; -+ u64 rxmulticastframes_g; -+ u64 rxcrcerror; -+ u64 rxrunterror; -+ u64 rxjabbererror; -+ u64 rxundersize_g; -+ u64 rxoversize_g; -+ u64 rx64octets_gb; -+ u64 rx65to127octets_gb; -+ u64 rx128to255octets_gb; -+ u64 rx256to511octets_gb; -+ u64 rx512to1023octets_gb; -+ u64 rx1024tomaxoctets_gb; -+ u64 rxunicastframes_g; -+ u64 rxlengtherror; -+ u64 rxoutofrangetype; -+ u64 rxpauseframes; -+ u64 rxfifooverflow; -+ u64 rxvlanframes_gb; -+ u64 rxwatchdogerror; -+}; -+ -+struct xgbe_hw_if { -+ int (*tx_complete)(struct xgbe_ring_desc *); -+ -+ int (*set_promiscuous_mode)(struct xgbe_prv_data *, unsigned int); -+ int (*set_all_multicast_mode)(struct xgbe_prv_data *, unsigned int); -+ int (*add_mac_addresses)(struct xgbe_prv_data *); -+ int (*set_mac_address)(struct xgbe_prv_data *, u8 *addr); -+ -+ int (*enable_rx_csum)(struct xgbe_prv_data *); -+ int (*disable_rx_csum)(struct xgbe_prv_data *); -+ -+ int (*enable_rx_vlan_stripping)(struct xgbe_prv_data *); -+ int (*disable_rx_vlan_stripping)(struct xgbe_prv_data *); -+ int (*enable_rx_vlan_filtering)(struct xgbe_prv_data *); -+ int (*disable_rx_vlan_filtering)(struct xgbe_prv_data *); -+ int (*update_vlan_hash_table)(struct xgbe_prv_data *); -+ -+ int (*read_mmd_regs)(struct xgbe_prv_data *, int, int); -+ void (*write_mmd_regs)(struct xgbe_prv_data *, int, int, int); -+ int (*set_gmii_speed)(struct xgbe_prv_data *); -+ int (*set_gmii_2500_speed)(struct xgbe_prv_data *); -+ int (*set_xgmii_speed)(struct xgbe_prv_data *); -+ -+ void (*enable_tx)(struct xgbe_prv_data *); -+ void (*disable_tx)(struct xgbe_prv_data *); -+ void (*enable_rx)(struct xgbe_prv_data *); -+ void (*disable_rx)(struct xgbe_prv_data *); -+ -+ void (*powerup_tx)(struct xgbe_prv_data *); -+ void (*powerdown_tx)(struct xgbe_prv_data *); -+ void (*powerup_rx)(struct xgbe_prv_data *); -+ void (*powerdown_rx)(struct xgbe_prv_data *); -+ -+ int (*init)(struct xgbe_prv_data *); -+ int (*exit)(struct xgbe_prv_data *); -+ -+ int (*enable_int)(struct xgbe_channel *, enum xgbe_int); -+ int (*disable_int)(struct xgbe_channel *, enum xgbe_int); -+ void (*dev_xmit)(struct xgbe_channel *); -+ int (*dev_read)(struct xgbe_channel *); -+ void (*tx_desc_init)(struct xgbe_channel *); -+ void (*rx_desc_init)(struct xgbe_channel *); -+ void (*rx_desc_reset)(struct xgbe_ring_data *); -+ void (*tx_desc_reset)(struct xgbe_ring_data *); -+ int (*is_last_desc)(struct xgbe_ring_desc *); -+ int (*is_context_desc)(struct xgbe_ring_desc *); -+ void (*tx_start_xmit)(struct xgbe_channel *, struct xgbe_ring *); -+ -+ /* For FLOW ctrl */ -+ int (*config_tx_flow_control)(struct xgbe_prv_data *); -+ int (*config_rx_flow_control)(struct xgbe_prv_data *); -+ -+ /* For RX coalescing */ -+ int (*config_rx_coalesce)(struct xgbe_prv_data *); -+ int (*config_tx_coalesce)(struct xgbe_prv_data *); -+ unsigned int (*usec_to_riwt)(struct xgbe_prv_data *, unsigned int); -+ unsigned int (*riwt_to_usec)(struct xgbe_prv_data *, unsigned int); -+ -+ /* For RX and TX threshold config */ -+ int (*config_rx_threshold)(struct xgbe_prv_data *, unsigned int); -+ int (*config_tx_threshold)(struct xgbe_prv_data *, unsigned int); -+ -+ /* For RX and TX Store and Forward Mode config */ -+ int (*config_rsf_mode)(struct xgbe_prv_data *, unsigned int); -+ int (*config_tsf_mode)(struct xgbe_prv_data *, unsigned int); -+ -+ /* For TX DMA Operate on Second Frame config */ -+ int (*config_osp_mode)(struct xgbe_prv_data *); -+ -+ /* For RX and TX PBL config */ -+ int (*config_rx_pbl_val)(struct xgbe_prv_data *); -+ int (*get_rx_pbl_val)(struct xgbe_prv_data *); -+ int (*config_tx_pbl_val)(struct xgbe_prv_data *); -+ int (*get_tx_pbl_val)(struct xgbe_prv_data *); -+ int (*config_pblx8)(struct xgbe_prv_data *); -+ -+ /* For MMC statistics */ -+ void (*rx_mmc_int)(struct xgbe_prv_data *); -+ void (*tx_mmc_int)(struct xgbe_prv_data *); -+ void (*read_mmc_stats)(struct xgbe_prv_data *); -+ -+ /* For Timestamp config */ -+ int (*config_tstamp)(struct xgbe_prv_data *, unsigned int); -+ void (*update_tstamp_addend)(struct xgbe_prv_data *, unsigned int); -+ void (*set_tstamp_time)(struct xgbe_prv_data *, unsigned int sec, -+ unsigned int nsec); -+ u64 (*get_tstamp_time)(struct xgbe_prv_data *); -+ u64 (*get_tx_tstamp)(struct xgbe_prv_data *); -+ -+ /* For Data Center Bridging config */ -+ void (*config_dcb_tc)(struct xgbe_prv_data *); -+ void (*config_dcb_pfc)(struct xgbe_prv_data *); -+ -+ /* For Receive Side Scaling */ -+ int (*enable_rss)(struct xgbe_prv_data *); -+ int (*disable_rss)(struct xgbe_prv_data *); -+ int (*set_rss_hash_key)(struct xgbe_prv_data *, const u8 *); -+ int (*set_rss_lookup_table)(struct xgbe_prv_data *, const u32 *); -+}; -+ -+struct xgbe_desc_if { -+ int (*alloc_ring_resources)(struct xgbe_prv_data *); -+ void (*free_ring_resources)(struct xgbe_prv_data *); -+ int (*map_tx_skb)(struct xgbe_channel *, struct sk_buff *); -+ int (*map_rx_buffer)(struct xgbe_prv_data *, struct xgbe_ring *, -+ struct xgbe_ring_data *); -+ void (*unmap_rdata)(struct xgbe_prv_data *, struct xgbe_ring_data *); -+ void (*wrapper_tx_desc_init)(struct xgbe_prv_data *); -+ void (*wrapper_rx_desc_init)(struct xgbe_prv_data *); -+}; -+ -+/* This structure contains flags that indicate what hardware features -+ * or configurations are present in the device. -+ */ -+struct xgbe_hw_features { -+ /* HW Version */ -+ unsigned int version; -+ -+ /* HW Feature Register0 */ -+ unsigned int gmii; /* 1000 Mbps support */ -+ unsigned int vlhash; /* VLAN Hash Filter */ -+ unsigned int sma; /* SMA(MDIO) Interface */ -+ unsigned int rwk; /* PMT remote wake-up packet */ -+ unsigned int mgk; /* PMT magic packet */ -+ unsigned int mmc; /* RMON module */ -+ unsigned int aoe; /* ARP Offload */ -+ unsigned int ts; /* IEEE 1588-2008 Adavanced Timestamp */ -+ unsigned int eee; /* Energy Efficient Ethernet */ -+ unsigned int tx_coe; /* Tx Checksum Offload */ -+ unsigned int rx_coe; /* Rx Checksum Offload */ -+ unsigned int addn_mac; /* Additional MAC Addresses */ -+ unsigned int ts_src; /* Timestamp Source */ -+ unsigned int sa_vlan_ins; /* Source Address or VLAN Insertion */ -+ -+ /* HW Feature Register1 */ -+ unsigned int rx_fifo_size; /* MTL Receive FIFO Size */ -+ unsigned int tx_fifo_size; /* MTL Transmit FIFO Size */ -+ unsigned int adv_ts_hi; /* Advance Timestamping High Word */ -+ unsigned int dcb; /* DCB Feature */ -+ unsigned int sph; /* Split Header Feature */ -+ unsigned int tso; /* TCP Segmentation Offload */ -+ unsigned int dma_debug; /* DMA Debug Registers */ -+ unsigned int rss; /* Receive Side Scaling */ -+ unsigned int tc_cnt; /* Number of Traffic Classes */ -+ unsigned int hash_table_size; /* Hash Table Size */ -+ unsigned int l3l4_filter_num; /* Number of L3-L4 Filters */ -+ -+ /* HW Feature Register2 */ -+ unsigned int rx_q_cnt; /* Number of MTL Receive Queues */ -+ unsigned int tx_q_cnt; /* Number of MTL Transmit Queues */ -+ unsigned int rx_ch_cnt; /* Number of DMA Receive Channels */ -+ unsigned int tx_ch_cnt; /* Number of DMA Transmit Channels */ -+ unsigned int pps_out_num; /* Number of PPS outputs */ -+ unsigned int aux_snap_num; /* Number of Aux snapshot inputs */ -+}; -+ -+struct xgbe_prv_data { -+ struct net_device *netdev; -+ struct platform_device *pdev; -+ struct acpi_device *adev; -+ struct device *dev; -+ -+ /* ACPI or DT flag */ -+ unsigned int use_acpi; -+ -+ /* XGMAC/XPCS related mmio registers */ -+ void __iomem *xgmac_regs; /* XGMAC CSRs */ -+ void __iomem *xpcs_regs; /* XPCS MMD registers */ -+ -+ /* Overall device lock */ -+ spinlock_t lock; -+ -+ /* XPCS indirect addressing mutex */ -+ struct mutex xpcs_mutex; -+ -+ /* RSS addressing mutex */ -+ struct mutex rss_mutex; -+ -+ int dev_irq; -+ unsigned int per_channel_irq; -+ -+ struct xgbe_hw_if hw_if; -+ struct xgbe_desc_if desc_if; -+ -+ /* AXI DMA settings */ -+ unsigned int coherent; -+ unsigned int axdomain; -+ unsigned int arcache; -+ unsigned int awcache; -+ -+ /* Rings for Tx/Rx on a DMA channel */ -+ struct xgbe_channel *channel; -+ unsigned int channel_count; -+ unsigned int tx_ring_count; -+ unsigned int tx_desc_count; -+ unsigned int rx_ring_count; -+ unsigned int rx_desc_count; -+ -+ unsigned int tx_q_count; -+ unsigned int rx_q_count; -+ -+ /* Tx/Rx common settings */ -+ unsigned int pblx8; -+ -+ /* Tx settings */ -+ unsigned int tx_sf_mode; -+ unsigned int tx_threshold; -+ unsigned int tx_pbl; -+ unsigned int tx_osp_mode; -+ -+ /* Rx settings */ -+ unsigned int rx_sf_mode; -+ unsigned int rx_threshold; -+ unsigned int rx_pbl; -+ -+ /* Tx coalescing settings */ -+ unsigned int tx_usecs; -+ unsigned int tx_frames; -+ -+ /* Rx coalescing settings */ -+ unsigned int rx_riwt; -+ unsigned int rx_frames; -+ -+ /* Current Rx buffer size */ -+ unsigned int rx_buf_size; -+ -+ /* Flow control settings */ -+ unsigned int pause_autoneg; -+ unsigned int tx_pause; -+ unsigned int rx_pause; -+ -+ /* Receive Side Scaling settings */ -+ u8 rss_key[XGBE_RSS_HASH_KEY_SIZE]; -+ u32 rss_table[XGBE_RSS_MAX_TABLE_SIZE]; -+ u32 rss_options; -+ -+ /* MDIO settings */ -+ struct module *phy_module; -+ char *mii_bus_id; -+ struct mii_bus *mii; -+ int mdio_mmd; -+ struct phy_device *phydev; -+ int default_autoneg; -+ int default_speed; -+ -+ /* Current PHY settings */ -+ phy_interface_t phy_mode; -+ int phy_link; -+ int phy_speed; -+ unsigned int phy_tx_pause; -+ unsigned int phy_rx_pause; -+ -+ /* Netdev related settings */ -+ unsigned char mac_addr[ETH_ALEN]; -+ netdev_features_t netdev_features; -+ struct napi_struct napi; -+ struct xgbe_mmc_stats mmc_stats; -+ -+ /* Filtering support */ -+ unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; -+ -+ /* Device clocks */ -+ struct clk *sysclk; -+ unsigned long sysclk_rate; -+ struct clk *ptpclk; -+ unsigned long ptpclk_rate; -+ -+ /* Timestamp support */ -+ spinlock_t tstamp_lock; -+ struct ptp_clock_info ptp_clock_info; -+ struct ptp_clock *ptp_clock; -+ struct hwtstamp_config tstamp_config; -+ struct cyclecounter tstamp_cc; -+ struct timecounter tstamp_tc; -+ unsigned int tstamp_addend; -+ struct work_struct tx_tstamp_work; -+ struct sk_buff *tx_tstamp_skb; -+ u64 tx_tstamp; -+ -+ /* DCB support */ -+ struct ieee_ets *ets; -+ struct ieee_pfc *pfc; -+ unsigned int q2tc_map[XGBE_MAX_QUEUES]; -+ unsigned int prio2q_map[IEEE_8021QAZ_MAX_TCS]; -+ -+ /* Hardware features of the device */ -+ struct xgbe_hw_features hw_feat; -+ -+ /* Device restart work structure */ -+ struct work_struct restart_work; -+ -+ /* Keeps track of power mode */ -+ unsigned int power_down; -+ -+#ifdef CONFIG_DEBUG_FS -+ struct dentry *xgbe_debugfs; -+ -+ unsigned int debugfs_xgmac_reg; -+ -+ unsigned int debugfs_xpcs_mmd; -+ unsigned int debugfs_xpcs_reg; -+#endif -+}; -+ -+/* Function prototypes*/ -+ -+void xgbe_a0_init_function_ptrs_dev(struct xgbe_hw_if *); -+void xgbe_a0_init_function_ptrs_desc(struct xgbe_desc_if *); -+struct net_device_ops *xgbe_a0_get_netdev_ops(void); -+struct ethtool_ops *xgbe_a0_get_ethtool_ops(void); -+#ifdef CONFIG_AMD_XGBE_DCB -+const struct dcbnl_rtnl_ops *xgbe_a0_get_dcbnl_ops(void); -+#endif -+ -+int xgbe_a0_mdio_register(struct xgbe_prv_data *); -+void xgbe_a0_mdio_unregister(struct xgbe_prv_data *); -+void xgbe_a0_dump_phy_registers(struct xgbe_prv_data *); -+void xgbe_a0_ptp_register(struct xgbe_prv_data *); -+void xgbe_a0_ptp_unregister(struct xgbe_prv_data *); -+void xgbe_a0_dump_tx_desc(struct xgbe_ring *, unsigned int, unsigned int, -+ unsigned int); -+void xgbe_a0_dump_rx_desc(struct xgbe_ring *, struct xgbe_ring_desc *, -+ unsigned int); -+void xgbe_a0_print_pkt(struct net_device *, struct sk_buff *, bool); -+void xgbe_a0_get_all_hw_features(struct xgbe_prv_data *); -+int xgbe_a0_powerup(struct net_device *, unsigned int); -+int xgbe_a0_powerdown(struct net_device *, unsigned int); -+void xgbe_a0_init_rx_coalesce(struct xgbe_prv_data *); -+void xgbe_a0_init_tx_coalesce(struct xgbe_prv_data *); -+ -+#ifdef CONFIG_DEBUG_FS -+void xgbe_a0_debugfs_init(struct xgbe_prv_data *); -+void xgbe_a0_debugfs_exit(struct xgbe_prv_data *); -+#else -+static inline void xgbe_a0_debugfs_init(struct xgbe_prv_data *pdata) {} -+static inline void xgbe_a0_debugfs_exit(struct xgbe_prv_data *pdata) {} -+#endif /* CONFIG_DEBUG_FS */ -+ -+/* NOTE: Uncomment for TX and RX DESCRIPTOR DUMP in KERNEL LOG */ -+#if 0 -+#define XGMAC_ENABLE_TX_DESC_DUMP -+#define XGMAC_ENABLE_RX_DESC_DUMP -+#endif -+ -+/* NOTE: Uncomment for TX and RX PACKET DUMP in KERNEL LOG */ -+#if 0 -+#define XGMAC_ENABLE_TX_PKT_DUMP -+#define XGMAC_ENABLE_RX_PKT_DUMP -+#endif -+ -+/* NOTE: Uncomment for function trace log messages in KERNEL LOG */ -+#if 0 -+#define YDEBUG -+#define YDEBUG_MDIO -+#endif -+ -+/* For debug prints */ -+#ifdef YDEBUG -+#define DBGPR(x...) pr_alert(x) -+#define DBGPHY_REGS(x...) xgbe_a0_dump_phy_registers(x) -+#else -+#define DBGPR(x...) do { } while (0) -+#define DBGPHY_REGS(x...) do { } while (0) -+#endif -+ -+#ifdef YDEBUG_MDIO -+#define DBGPR_MDIO(x...) pr_alert(x) -+#else -+#define DBGPR_MDIO(x...) do { } while (0) -+#endif -+ -+#endif --- -2.4.5 - diff --git a/amd-xgbe-phy-a0-Add-support-for-XGBE-PHY-on-A0.patch b/amd-xgbe-phy-a0-Add-support-for-XGBE-PHY-on-A0.patch deleted file mode 100644 index c24edad0a..000000000 --- a/amd-xgbe-phy-a0-Add-support-for-XGBE-PHY-on-A0.patch +++ /dev/null @@ -1,1870 +0,0 @@ -From a3e660ae9fdeb53000eceeaf393e03cd087e37f7 Mon Sep 17 00:00:00 2001 -From: Tom Lendacky -Date: Tue, 17 Mar 2015 10:58:38 -0500 -Subject: [PATCH 2/2] amd-xgbe-phy-a0: Add support for XGBE PHY on A0 - -Add XGBE phy driver support for A0 hardware. - -Signed-off-by: Tom Lendacky -[Add back AMD_XGBE_PHY removed upstream for B0 driver] -Signed-off-by: Mark Salter ---- - drivers/net/phy/Kconfig | 7 + - drivers/net/phy/Makefile | 1 + - drivers/net/phy/amd-xgbe-phy-a0.c | 1814 +++++++++++++++++++++++++++++++++++++ - 3 files changed, 1822 insertions(+) - create mode 100644 drivers/net/phy/amd-xgbe-phy-a0.c - -diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig -index cb86d7a..a3138b1 100644 ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -24,6 +24,13 @@ config AMD_PHY - ---help--- - Currently supports the am79c874 - -+config AMD_XGBE_PHY -+ tristate "Driver for the AMD 10GbE (amd-xgbe) PHYs" -+ depends on (OF || ACPI) && HAS_IOMEM -+ depends on ARM64 || COMPILE_TEST -+ ---help--- -+ Currently supports the AMD 10GbE PHY -+ - config MARVELL_PHY - tristate "Drivers for Marvell PHYs" - ---help--- -diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile -index fcc25a0..6ebb9ba 100644 ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -29,6 +29,7 @@ obj-$(CONFIG_MDIO_OCTEON) += mdio-octeon.o - obj-$(CONFIG_MICREL_KS8995MA) += spi_ks8995.o - obj-$(CONFIG_AT803X_PHY) += at803x.o - obj-$(CONFIG_AMD_PHY) += amd.o -+obj-$(CONFIG_AMD_XGBE_PHY) += amd-xgbe-phy-a0.o - obj-$(CONFIG_MDIO_BUS_MUX) += mdio-mux.o - obj-$(CONFIG_MDIO_BUS_MUX_GPIO) += mdio-mux-gpio.o - obj-$(CONFIG_MDIO_BUS_MUX_MMIOREG) += mdio-mux-mmioreg.o -diff --git a/drivers/net/phy/amd-xgbe-phy-a0.c b/drivers/net/phy/amd-xgbe-phy-a0.c -new file mode 100644 -index 0000000..c352d5c ---- /dev/null -+++ b/drivers/net/phy/amd-xgbe-phy-a0.c -@@ -0,0 +1,1814 @@ -+/* -+ * AMD 10Gb Ethernet PHY driver -+ * -+ * This file is available to you under your choice of the following two -+ * licenses: -+ * -+ * License 1: GPLv2 -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * -+ * This file is free software; you may copy, redistribute and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation, either version 2 of the License, or (at -+ * your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program. If not, see . -+ * -+ * -+ * License 2: Modified BSD -+ * -+ * Copyright (c) 2014 Advanced Micro Devices, Inc. -+ * All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions are met: -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * * Neither the name of Advanced Micro Devices, Inc. nor the -+ * names of its contributors may be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY -+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+MODULE_AUTHOR("Tom Lendacky "); -+MODULE_LICENSE("Dual BSD/GPL"); -+MODULE_VERSION("0.0.0-a"); -+MODULE_DESCRIPTION("AMD 10GbE (amd-xgbe) PHY driver"); -+ -+#define XGBE_PHY_ID 0x7996ced0 -+#define XGBE_PHY_MASK 0xfffffff0 -+ -+#define XGBE_PHY_SERDES_RETRY 32 -+#define XGBE_PHY_CHANNEL_PROPERTY "amd,serdes-channel" -+#define XGBE_PHY_SPEEDSET_PROPERTY "amd,speed-set" -+#define XGBE_PHY_BLWC_PROPERTY "amd,serdes-blwc" -+#define XGBE_PHY_CDR_RATE_PROPERTY "amd,serdes-cdr-rate" -+#define XGBE_PHY_PQ_SKEW_PROPERTY "amd,serdes-pq-skew" -+#define XGBE_PHY_TX_AMP_PROPERTY "amd,serdes-tx-amp" -+ -+#define XGBE_PHY_SPEEDS 3 -+#define XGBE_PHY_SPEED_1000 0 -+#define XGBE_PHY_SPEED_2500 1 -+#define XGBE_PHY_SPEED_10000 2 -+ -+#define XGBE_AN_INT_CMPLT 0x01 -+#define XGBE_AN_INC_LINK 0x02 -+#define XGBE_AN_PG_RCV 0x04 -+#define XGBE_AN_INT_MASK 0x07 -+ -+#define XNP_MCF_NULL_MESSAGE 0x001 -+#define XNP_ACK_PROCESSED BIT(12) -+#define XNP_MP_FORMATTED BIT(13) -+#define XNP_NP_EXCHANGE BIT(15) -+ -+#define XGBE_PHY_RATECHANGE_COUNT 500 -+ -+#define XGBE_PHY_KR_TRAINING_START 0x01 -+#define XGBE_PHY_KR_TRAINING_ENABLE 0x02 -+ -+#define XGBE_PHY_FEC_ENABLE 0x01 -+#define XGBE_PHY_FEC_FORWARD 0x02 -+#define XGBE_PHY_FEC_MASK 0x03 -+ -+#ifndef MDIO_PMA_10GBR_PMD_CTRL -+#define MDIO_PMA_10GBR_PMD_CTRL 0x0096 -+#endif -+ -+#ifndef MDIO_PMA_10GBR_FEC_ABILITY -+#define MDIO_PMA_10GBR_FEC_ABILITY 0x00aa -+#endif -+ -+#ifndef MDIO_PMA_10GBR_FEC_CTRL -+#define MDIO_PMA_10GBR_FEC_CTRL 0x00ab -+#endif -+ -+#ifndef MDIO_AN_XNP -+#define MDIO_AN_XNP 0x0016 -+#endif -+ -+#ifndef MDIO_AN_LPX -+#define MDIO_AN_LPX 0x0019 -+#endif -+ -+#ifndef MDIO_AN_INTMASK -+#define MDIO_AN_INTMASK 0x8001 -+#endif -+ -+#ifndef MDIO_AN_INT -+#define MDIO_AN_INT 0x8002 -+#endif -+ -+#ifndef MDIO_AN_KR_CTRL -+#define MDIO_AN_KR_CTRL 0x8003 -+#endif -+ -+#ifndef MDIO_CTRL1_SPEED1G -+#define MDIO_CTRL1_SPEED1G (MDIO_CTRL1_SPEED10G & ~BMCR_SPEED100) -+#endif -+ -+#ifndef MDIO_KR_CTRL_PDETECT -+#define MDIO_KR_CTRL_PDETECT 0x01 -+#endif -+ -+#define GET_BITS(_var, _index, _width) \ -+ (((_var) >> (_index)) & ((0x1 << (_width)) - 1)) -+ -+#define SET_BITS(_var, _index, _width, _val) \ -+do { \ -+ (_var) &= ~(((0x1 << (_width)) - 1) << (_index)); \ -+ (_var) |= (((_val) & ((0x1 << (_width)) - 1)) << (_index)); \ -+} while (0) -+ -+#define XCMU_IOREAD(_priv, _reg) \ -+ ioread16((_priv)->cmu_regs + _reg) -+ -+#define XCMU_IOWRITE(_priv, _reg, _val) \ -+ iowrite16((_val), (_priv)->cmu_regs + _reg) -+ -+#define XRXTX_IOREAD(_priv, _reg) \ -+ ioread16((_priv)->rxtx_regs + _reg) -+ -+#define XRXTX_IOREAD_BITS(_priv, _reg, _field) \ -+ GET_BITS(XRXTX_IOREAD((_priv), _reg), \ -+ _reg##_##_field##_INDEX, \ -+ _reg##_##_field##_WIDTH) -+ -+#define XRXTX_IOWRITE(_priv, _reg, _val) \ -+ iowrite16((_val), (_priv)->rxtx_regs + _reg) -+ -+#define XRXTX_IOWRITE_BITS(_priv, _reg, _field, _val) \ -+do { \ -+ u16 reg_val = XRXTX_IOREAD((_priv), _reg); \ -+ SET_BITS(reg_val, \ -+ _reg##_##_field##_INDEX, \ -+ _reg##_##_field##_WIDTH, (_val)); \ -+ XRXTX_IOWRITE((_priv), _reg, reg_val); \ -+} while (0) -+ -+/* SerDes CMU register offsets */ -+#define CMU_REG15 0x003c -+#define CMU_REG16 0x0040 -+ -+/* SerDes CMU register entry bit positions and sizes */ -+#define CMU_REG16_TX_RATE_CHANGE_BASE 15 -+#define CMU_REG16_RX_RATE_CHANGE_BASE 14 -+#define CMU_REG16_RATE_CHANGE_DECR 2 -+ -+/* SerDes RxTx register offsets */ -+#define RXTX_REG2 0x0008 -+#define RXTX_REG3 0x000c -+#define RXTX_REG5 0x0014 -+#define RXTX_REG6 0x0018 -+#define RXTX_REG20 0x0050 -+#define RXTX_REG53 0x00d4 -+#define RXTX_REG114 0x01c8 -+#define RXTX_REG115 0x01cc -+#define RXTX_REG142 0x0238 -+ -+/* SerDes RxTx register entry bit positions and sizes */ -+#define RXTX_REG2_RESETB_INDEX 15 -+#define RXTX_REG2_RESETB_WIDTH 1 -+#define RXTX_REG3_TX_DATA_RATE_INDEX 14 -+#define RXTX_REG3_TX_DATA_RATE_WIDTH 2 -+#define RXTX_REG3_TX_WORD_MODE_INDEX 11 -+#define RXTX_REG3_TX_WORD_MODE_WIDTH 3 -+#define RXTX_REG5_TXAMP_CNTL_INDEX 7 -+#define RXTX_REG5_TXAMP_CNTL_WIDTH 4 -+#define RXTX_REG6_RX_DATA_RATE_INDEX 9 -+#define RXTX_REG6_RX_DATA_RATE_WIDTH 2 -+#define RXTX_REG6_RX_WORD_MODE_INDEX 11 -+#define RXTX_REG6_RX_WORD_MODE_WIDTH 3 -+#define RXTX_REG20_BLWC_ENA_INDEX 2 -+#define RXTX_REG20_BLWC_ENA_WIDTH 1 -+#define RXTX_REG53_RX_PLLSELECT_INDEX 15 -+#define RXTX_REG53_RX_PLLSELECT_WIDTH 1 -+#define RXTX_REG53_TX_PLLSELECT_INDEX 14 -+#define RXTX_REG53_TX_PLLSELECT_WIDTH 1 -+#define RXTX_REG53_PI_SPD_SEL_CDR_INDEX 10 -+#define RXTX_REG53_PI_SPD_SEL_CDR_WIDTH 4 -+#define RXTX_REG114_PQ_REG_INDEX 9 -+#define RXTX_REG114_PQ_REG_WIDTH 7 -+#define RXTX_REG115_FORCE_LAT_CAL_START_INDEX 2 -+#define RXTX_REG115_FORCE_LAT_CAL_START_WIDTH 1 -+#define RXTX_REG115_FORCE_SUM_CAL_START_INDEX 1 -+#define RXTX_REG115_FORCE_SUM_CAL_START_WIDTH 1 -+#define RXTX_REG142_SUM_CALIB_DONE_INDEX 15 -+#define RXTX_REG142_SUM_CALIB_DONE_WIDTH 1 -+#define RXTX_REG142_SUM_CALIB_ERR_INDEX 14 -+#define RXTX_REG142_SUM_CALIB_ERR_WIDTH 1 -+#define RXTX_REG142_LAT_CALIB_DONE_INDEX 11 -+#define RXTX_REG142_LAT_CALIB_DONE_WIDTH 1 -+ -+#define RXTX_FULL_RATE 0x0 -+#define RXTX_HALF_RATE 0x1 -+#define RXTX_FIFTH_RATE 0x3 -+#define RXTX_66BIT_WORD 0x7 -+#define RXTX_10BIT_WORD 0x1 -+#define RXTX_10G_BLWC 0x0 -+#define RXTX_1G_BLWC 0x1 -+#define RXTX_10G_TX_AMP 0xa -+#define RXTX_1G_TX_AMP 0xf -+#define RXTX_10G_CDR 0x7 -+#define RXTX_1G_CDR 0x2 -+#define RXTX_10G_PLL 0x1 -+#define RXTX_1G_PLL 0x0 -+#define RXTX_10G_PQ 0x1e -+#define RXTX_1G_PQ 0xa -+ -+DEFINE_SPINLOCK(cmu_lock); -+ -+static const u32 amd_xgbe_phy_serdes_blwc[] = { -+ RXTX_1G_BLWC, -+ RXTX_1G_BLWC, -+ RXTX_10G_BLWC, -+}; -+ -+static const u32 amd_xgbe_phy_serdes_cdr_rate[] = { -+ RXTX_1G_CDR, -+ RXTX_1G_CDR, -+ RXTX_10G_CDR, -+}; -+ -+static const u32 amd_xgbe_phy_serdes_pq_skew[] = { -+ RXTX_1G_PQ, -+ RXTX_1G_PQ, -+ RXTX_10G_PQ, -+}; -+ -+static const u32 amd_xgbe_phy_serdes_tx_amp[] = { -+ RXTX_1G_TX_AMP, -+ RXTX_1G_TX_AMP, -+ RXTX_10G_TX_AMP, -+}; -+ -+enum amd_xgbe_phy_an { -+ AMD_XGBE_AN_READY = 0, -+ AMD_XGBE_AN_PAGE_RECEIVED, -+ AMD_XGBE_AN_INCOMPAT_LINK, -+ AMD_XGBE_AN_COMPLETE, -+ AMD_XGBE_AN_NO_LINK, -+ AMD_XGBE_AN_ERROR, -+}; -+ -+enum amd_xgbe_phy_rx { -+ AMD_XGBE_RX_BPA = 0, -+ AMD_XGBE_RX_XNP, -+ AMD_XGBE_RX_COMPLETE, -+ AMD_XGBE_RX_ERROR, -+}; -+ -+enum amd_xgbe_phy_mode { -+ AMD_XGBE_MODE_KR, -+ AMD_XGBE_MODE_KX, -+}; -+ -+enum amd_xgbe_phy_speedset { -+ AMD_XGBE_PHY_SPEEDSET_1000_10000 = 0, -+ AMD_XGBE_PHY_SPEEDSET_2500_10000, -+}; -+ -+struct amd_xgbe_phy_priv { -+ struct platform_device *pdev; -+ struct acpi_device *adev; -+ struct device *dev; -+ -+ struct phy_device *phydev; -+ -+ /* SerDes related mmio resources */ -+ struct resource *rxtx_res; -+ struct resource *cmu_res; -+ -+ /* SerDes related mmio registers */ -+ void __iomem *rxtx_regs; /* SerDes Rx/Tx CSRs */ -+ void __iomem *cmu_regs; /* SerDes CMU CSRs */ -+ -+ int an_irq; -+ char an_irq_name[IFNAMSIZ + 32]; -+ struct work_struct an_irq_work; -+ unsigned int an_irq_allocated; -+ -+ unsigned int serdes_channel; -+ unsigned int speed_set; -+ -+ /* Maintain link status for re-starting auto-negotiation */ -+ unsigned int link; -+ -+ /* SerDes UEFI configurable settings. -+ * Switching between modes/speeds requires new values for some -+ * SerDes settings. The values can be supplied as device -+ * properties in array format. The first array entry is for -+ * 1GbE, second for 2.5GbE and third for 10GbE -+ */ -+ u32 serdes_blwc[XGBE_PHY_SPEEDS]; -+ u32 serdes_cdr_rate[XGBE_PHY_SPEEDS]; -+ u32 serdes_pq_skew[XGBE_PHY_SPEEDS]; -+ u32 serdes_tx_amp[XGBE_PHY_SPEEDS]; -+ -+ /* Auto-negotiation state machine support */ -+ struct mutex an_mutex; -+ enum amd_xgbe_phy_an an_result; -+ enum amd_xgbe_phy_an an_state; -+ enum amd_xgbe_phy_rx kr_state; -+ enum amd_xgbe_phy_rx kx_state; -+ struct work_struct an_work; -+ struct workqueue_struct *an_workqueue; -+ unsigned int an_supported; -+ unsigned int parallel_detect; -+ unsigned int fec_ability; -+ -+ unsigned int lpm_ctrl; /* CTRL1 for resume */ -+}; -+ -+static int amd_xgbe_an_disable_kr_training(struct phy_device *phydev) -+{ -+ int ret; -+ -+ ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL); -+ if (ret < 0) -+ return ret; -+ -+ ret &= ~XGBE_PHY_KR_TRAINING_ENABLE; -+ phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, ret); -+ -+ return 0; -+} -+ -+static int amd_xgbe_phy_pcs_power_cycle(struct phy_device *phydev) -+{ -+ int ret; -+ -+ ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1); -+ if (ret < 0) -+ return ret; -+ -+ ret |= MDIO_CTRL1_LPOWER; -+ phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, ret); -+ -+ usleep_range(75, 100); -+ -+ ret &= ~MDIO_CTRL1_LPOWER; -+ phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, ret); -+ -+ return 0; -+} -+ -+static void amd_xgbe_phy_serdes_start_ratechange(struct phy_device *phydev) -+{ -+ struct amd_xgbe_phy_priv *priv = phydev->priv; -+ u16 val, mask; -+ -+ /* Assert Rx and Tx ratechange in CMU_reg16 */ -+ val = XCMU_IOREAD(priv, CMU_REG16); -+ -+ mask = (1 << (CMU_REG16_TX_RATE_CHANGE_BASE - -+ (priv->serdes_channel * CMU_REG16_RATE_CHANGE_DECR))) | -+ (1 << (CMU_REG16_RX_RATE_CHANGE_BASE - -+ (priv->serdes_channel * CMU_REG16_RATE_CHANGE_DECR))); -+ val |= mask; -+ -+ XCMU_IOWRITE(priv, CMU_REG16, val); -+} -+ -+static void amd_xgbe_phy_serdes_complete_ratechange(struct phy_device *phydev) -+{ -+ struct amd_xgbe_phy_priv *priv = phydev->priv; -+ u16 val, mask; -+ unsigned int wait; -+ -+ /* Release Rx and Tx ratechange for proper channel in CMU_reg16 */ -+ val = XCMU_IOREAD(priv, CMU_REG16); -+ -+ mask = (1 << (CMU_REG16_TX_RATE_CHANGE_BASE - -+ (priv->serdes_channel * CMU_REG16_RATE_CHANGE_DECR))) | -+ (1 << (CMU_REG16_RX_RATE_CHANGE_BASE - -+ (priv->serdes_channel * CMU_REG16_RATE_CHANGE_DECR))); -+ val &= ~mask; -+ -+ XCMU_IOWRITE(priv, CMU_REG16, val); -+ -+ /* Wait for Rx and Tx ready in CMU_reg15 */ -+ mask = (1 << priv->serdes_channel) | -+ (1 << (priv->serdes_channel + 8)); -+ wait = XGBE_PHY_RATECHANGE_COUNT; -+ while (wait--) { -+ udelay(50); -+ -+ val = XCMU_IOREAD(priv, CMU_REG15); -+ if ((val & mask) == mask) -+ return; -+ } -+ -+ netdev_dbg(phydev->attached_dev, "SerDes rx/tx not ready (%#hx)\n", -+ val); -+} -+ -+static int amd_xgbe_phy_xgmii_mode(struct phy_device *phydev) -+{ -+ struct amd_xgbe_phy_priv *priv = phydev->priv; -+ int ret; -+ -+ /* Disable KR training */ -+ ret = amd_xgbe_an_disable_kr_training(phydev); -+ if (ret < 0) -+ return ret; -+ -+ /* Set PCS to KR/10G speed */ -+ ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL2); -+ if (ret < 0) -+ return ret; -+ -+ ret &= ~MDIO_PCS_CTRL2_TYPE; -+ ret |= MDIO_PCS_CTRL2_10GBR; -+ phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL2, ret); -+ -+ ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1); -+ if (ret < 0) -+ return ret; -+ -+ ret &= ~MDIO_CTRL1_SPEEDSEL; -+ ret |= MDIO_CTRL1_SPEED10G; -+ phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, ret); -+ -+ ret = amd_xgbe_phy_pcs_power_cycle(phydev); -+ if (ret < 0) -+ return ret; -+ -+ /* Set SerDes to 10G speed */ -+ spin_lock(&cmu_lock); -+ -+ amd_xgbe_phy_serdes_start_ratechange(phydev); -+ -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG3, TX_DATA_RATE, RXTX_FULL_RATE); -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG3, TX_WORD_MODE, RXTX_66BIT_WORD); -+ -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG5, TXAMP_CNTL, -+ priv->serdes_tx_amp[XGBE_PHY_SPEED_10000]); -+ -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG6, RX_DATA_RATE, RXTX_FULL_RATE); -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG6, RX_WORD_MODE, RXTX_66BIT_WORD); -+ -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG20, BLWC_ENA, -+ priv->serdes_blwc[XGBE_PHY_SPEED_10000]); -+ -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG53, RX_PLLSELECT, RXTX_10G_PLL); -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG53, TX_PLLSELECT, RXTX_10G_PLL); -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG53, PI_SPD_SEL_CDR, -+ priv->serdes_cdr_rate[XGBE_PHY_SPEED_10000]); -+ -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG114, PQ_REG, -+ priv->serdes_pq_skew[XGBE_PHY_SPEED_10000]); -+ -+ amd_xgbe_phy_serdes_complete_ratechange(phydev); -+ -+ spin_unlock(&cmu_lock); -+ -+ return 0; -+} -+ -+static int amd_xgbe_phy_gmii_2500_mode(struct phy_device *phydev) -+{ -+ struct amd_xgbe_phy_priv *priv = phydev->priv; -+ int ret; -+ -+ /* Disable KR training */ -+ ret = amd_xgbe_an_disable_kr_training(phydev); -+ if (ret < 0) -+ return ret; -+ -+ /* Set PCS to KX/1G speed */ -+ ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL2); -+ if (ret < 0) -+ return ret; -+ -+ ret &= ~MDIO_PCS_CTRL2_TYPE; -+ ret |= MDIO_PCS_CTRL2_10GBX; -+ phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL2, ret); -+ -+ ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1); -+ if (ret < 0) -+ return ret; -+ -+ ret &= ~MDIO_CTRL1_SPEEDSEL; -+ ret |= MDIO_CTRL1_SPEED1G; -+ phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, ret); -+ -+ ret = amd_xgbe_phy_pcs_power_cycle(phydev); -+ if (ret < 0) -+ return ret; -+ -+ /* Set SerDes to 2.5G speed */ -+ spin_lock(&cmu_lock); -+ -+ amd_xgbe_phy_serdes_start_ratechange(phydev); -+ -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG3, TX_DATA_RATE, RXTX_HALF_RATE); -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG3, TX_WORD_MODE, RXTX_10BIT_WORD); -+ -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG5, TXAMP_CNTL, -+ priv->serdes_tx_amp[XGBE_PHY_SPEED_2500]); -+ -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG6, RX_DATA_RATE, RXTX_HALF_RATE); -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG6, RX_WORD_MODE, RXTX_10BIT_WORD); -+ -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG20, BLWC_ENA, -+ priv->serdes_blwc[XGBE_PHY_SPEED_2500]); -+ -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG53, RX_PLLSELECT, RXTX_1G_PLL); -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG53, TX_PLLSELECT, RXTX_1G_PLL); -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG53, PI_SPD_SEL_CDR, -+ priv->serdes_cdr_rate[XGBE_PHY_SPEED_2500]); -+ -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG114, PQ_REG, -+ priv->serdes_pq_skew[XGBE_PHY_SPEED_2500]); -+ -+ amd_xgbe_phy_serdes_complete_ratechange(phydev); -+ -+ spin_unlock(&cmu_lock); -+ -+ return 0; -+} -+ -+static int amd_xgbe_phy_gmii_mode(struct phy_device *phydev) -+{ -+ struct amd_xgbe_phy_priv *priv = phydev->priv; -+ int ret; -+ -+ /* Disable KR training */ -+ ret = amd_xgbe_an_disable_kr_training(phydev); -+ if (ret < 0) -+ return ret; -+ -+ /* Set PCS to KX/1G speed */ -+ ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL2); -+ if (ret < 0) -+ return ret; -+ -+ ret &= ~MDIO_PCS_CTRL2_TYPE; -+ ret |= MDIO_PCS_CTRL2_10GBX; -+ phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL2, ret); -+ -+ ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1); -+ if (ret < 0) -+ return ret; -+ -+ ret &= ~MDIO_CTRL1_SPEEDSEL; -+ ret |= MDIO_CTRL1_SPEED1G; -+ phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, ret); -+ -+ ret = amd_xgbe_phy_pcs_power_cycle(phydev); -+ if (ret < 0) -+ return ret; -+ -+ /* Set SerDes to 1G speed */ -+ spin_lock(&cmu_lock); -+ -+ amd_xgbe_phy_serdes_start_ratechange(phydev); -+ -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG3, TX_DATA_RATE, RXTX_FIFTH_RATE); -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG3, TX_WORD_MODE, RXTX_10BIT_WORD); -+ -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG5, TXAMP_CNTL, -+ priv->serdes_tx_amp[XGBE_PHY_SPEED_1000]); -+ -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG6, RX_DATA_RATE, RXTX_FIFTH_RATE); -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG6, RX_WORD_MODE, RXTX_10BIT_WORD); -+ -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG20, BLWC_ENA, -+ priv->serdes_blwc[XGBE_PHY_SPEED_1000]); -+ -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG53, RX_PLLSELECT, RXTX_1G_PLL); -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG53, TX_PLLSELECT, RXTX_1G_PLL); -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG53, PI_SPD_SEL_CDR, -+ priv->serdes_cdr_rate[XGBE_PHY_SPEED_1000]); -+ -+ XRXTX_IOWRITE_BITS(priv, RXTX_REG114, PQ_REG, -+ priv->serdes_pq_skew[XGBE_PHY_SPEED_1000]); -+ -+ amd_xgbe_phy_serdes_complete_ratechange(phydev); -+ -+ spin_unlock(&cmu_lock); -+ -+ return 0; -+} -+ -+static int amd_xgbe_phy_cur_mode(struct phy_device *phydev, -+ enum amd_xgbe_phy_mode *mode) -+{ -+ int ret; -+ -+ ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL2); -+ if (ret < 0) -+ return ret; -+ -+ if ((ret & MDIO_PCS_CTRL2_TYPE) == MDIO_PCS_CTRL2_10GBR) -+ *mode = AMD_XGBE_MODE_KR; -+ else -+ *mode = AMD_XGBE_MODE_KX; -+ -+ return 0; -+} -+ -+static bool amd_xgbe_phy_in_kr_mode(struct phy_device *phydev) -+{ -+ enum amd_xgbe_phy_mode mode; -+ -+ if (amd_xgbe_phy_cur_mode(phydev, &mode)) -+ return false; -+ -+ return (mode == AMD_XGBE_MODE_KR); -+} -+ -+static int amd_xgbe_phy_switch_mode(struct phy_device *phydev) -+{ -+ struct amd_xgbe_phy_priv *priv = phydev->priv; -+ int ret; -+ -+ /* If we are in KR switch to KX, and vice-versa */ -+ if (amd_xgbe_phy_in_kr_mode(phydev)) { -+ if (priv->speed_set == AMD_XGBE_PHY_SPEEDSET_1000_10000) -+ ret = amd_xgbe_phy_gmii_mode(phydev); -+ else -+ ret = amd_xgbe_phy_gmii_2500_mode(phydev); -+ } else { -+ ret = amd_xgbe_phy_xgmii_mode(phydev); -+ } -+ -+ return ret; -+} -+ -+static int amd_xgbe_phy_set_mode(struct phy_device *phydev, -+ enum amd_xgbe_phy_mode mode) -+{ -+ enum amd_xgbe_phy_mode cur_mode; -+ int ret; -+ -+ ret = amd_xgbe_phy_cur_mode(phydev, &cur_mode); -+ if (ret) -+ return ret; -+ -+ if (mode != cur_mode) -+ ret = amd_xgbe_phy_switch_mode(phydev); -+ -+ return ret; -+} -+ -+static int amd_xgbe_phy_set_an(struct phy_device *phydev, bool enable, -+ bool restart) -+{ -+ int ret; -+ -+ ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); -+ if (ret < 0) -+ return ret; -+ -+ ret &= ~MDIO_AN_CTRL1_ENABLE; -+ -+ if (enable) -+ ret |= MDIO_AN_CTRL1_ENABLE; -+ -+ if (restart) -+ ret |= MDIO_AN_CTRL1_RESTART; -+ -+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1, ret); -+ -+ return 0; -+} -+ -+static int amd_xgbe_phy_restart_an(struct phy_device *phydev) -+{ -+ return amd_xgbe_phy_set_an(phydev, true, true); -+} -+ -+static int amd_xgbe_phy_disable_an(struct phy_device *phydev) -+{ -+ return amd_xgbe_phy_set_an(phydev, false, false); -+} -+ -+static enum amd_xgbe_phy_an amd_xgbe_an_tx_training(struct phy_device *phydev, -+ enum amd_xgbe_phy_rx *state) -+{ -+ struct amd_xgbe_phy_priv *priv = phydev->priv; -+ int ad_reg, lp_reg, ret; -+ -+ *state = AMD_XGBE_RX_COMPLETE; -+ -+ /* If we're not in KR mode then we're done */ -+ if (!amd_xgbe_phy_in_kr_mode(phydev)) -+ return AMD_XGBE_AN_PAGE_RECEIVED; -+ -+ /* Enable/Disable FEC */ -+ ad_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2); -+ if (ad_reg < 0) -+ return AMD_XGBE_AN_ERROR; -+ -+ lp_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA + 2); -+ if (lp_reg < 0) -+ return AMD_XGBE_AN_ERROR; -+ -+ ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_FEC_CTRL); -+ if (ret < 0) -+ return AMD_XGBE_AN_ERROR; -+ -+ ret &= ~XGBE_PHY_FEC_MASK; -+ if ((ad_reg & 0xc000) && (lp_reg & 0xc000)) -+ ret |= priv->fec_ability; -+ -+ phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_FEC_CTRL, ret); -+ -+ /* Start KR training */ -+ ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL); -+ if (ret < 0) -+ return AMD_XGBE_AN_ERROR; -+ -+ if (ret & XGBE_PHY_KR_TRAINING_ENABLE) { -+ ret |= XGBE_PHY_KR_TRAINING_START; -+ phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, -+ ret); -+ } -+ -+ return AMD_XGBE_AN_PAGE_RECEIVED; -+} -+ -+static enum amd_xgbe_phy_an amd_xgbe_an_tx_xnp(struct phy_device *phydev, -+ enum amd_xgbe_phy_rx *state) -+{ -+ u16 msg; -+ -+ *state = AMD_XGBE_RX_XNP; -+ -+ msg = XNP_MCF_NULL_MESSAGE; -+ msg |= XNP_MP_FORMATTED; -+ -+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_XNP + 2, 0); -+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_XNP + 1, 0); -+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_XNP, msg); -+ -+ return AMD_XGBE_AN_PAGE_RECEIVED; -+} -+ -+static enum amd_xgbe_phy_an amd_xgbe_an_rx_bpa(struct phy_device *phydev, -+ enum amd_xgbe_phy_rx *state) -+{ -+ unsigned int link_support; -+ int ret, ad_reg, lp_reg; -+ -+ /* Read Base Ability register 2 first */ -+ ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA + 1); -+ if (ret < 0) -+ return AMD_XGBE_AN_ERROR; -+ -+ /* Check for a supported mode, otherwise restart in a different one */ -+ link_support = amd_xgbe_phy_in_kr_mode(phydev) ? 0x80 : 0x20; -+ if (!(ret & link_support)) -+ return AMD_XGBE_AN_INCOMPAT_LINK; -+ -+ /* Check Extended Next Page support */ -+ ad_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE); -+ if (ad_reg < 0) -+ return AMD_XGBE_AN_ERROR; -+ -+ lp_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA); -+ if (lp_reg < 0) -+ return AMD_XGBE_AN_ERROR; -+ -+ return ((ad_reg & XNP_NP_EXCHANGE) || (lp_reg & XNP_NP_EXCHANGE)) ? -+ amd_xgbe_an_tx_xnp(phydev, state) : -+ amd_xgbe_an_tx_training(phydev, state); -+} -+ -+static enum amd_xgbe_phy_an amd_xgbe_an_rx_xnp(struct phy_device *phydev, -+ enum amd_xgbe_phy_rx *state) -+{ -+ int ad_reg, lp_reg; -+ -+ /* Check Extended Next Page support */ -+ ad_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_XNP); -+ if (ad_reg < 0) -+ return AMD_XGBE_AN_ERROR; -+ -+ lp_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPX); -+ if (lp_reg < 0) -+ return AMD_XGBE_AN_ERROR; -+ -+ return ((ad_reg & XNP_NP_EXCHANGE) || (lp_reg & XNP_NP_EXCHANGE)) ? -+ amd_xgbe_an_tx_xnp(phydev, state) : -+ amd_xgbe_an_tx_training(phydev, state); -+} -+ -+static enum amd_xgbe_phy_an amd_xgbe_an_page_received(struct phy_device *phydev) -+{ -+ struct amd_xgbe_phy_priv *priv = phydev->priv; -+ enum amd_xgbe_phy_rx *state; -+ int ret; -+ -+ state = amd_xgbe_phy_in_kr_mode(phydev) ? &priv->kr_state -+ : &priv->kx_state; -+ -+ switch (*state) { -+ case AMD_XGBE_RX_BPA: -+ ret = amd_xgbe_an_rx_bpa(phydev, state); -+ break; -+ -+ case AMD_XGBE_RX_XNP: -+ ret = amd_xgbe_an_rx_xnp(phydev, state); -+ break; -+ -+ default: -+ ret = AMD_XGBE_AN_ERROR; -+ } -+ -+ return ret; -+} -+ -+static enum amd_xgbe_phy_an amd_xgbe_an_incompat_link(struct phy_device *phydev) -+{ -+ struct amd_xgbe_phy_priv *priv = phydev->priv; -+ int ret; -+ -+ /* Be sure we aren't looping trying to negotiate */ -+ if (amd_xgbe_phy_in_kr_mode(phydev)) { -+ priv->kr_state = AMD_XGBE_RX_ERROR; -+ -+ if (!(phydev->supported & SUPPORTED_1000baseKX_Full) && -+ !(phydev->supported & SUPPORTED_2500baseX_Full)) -+ return AMD_XGBE_AN_NO_LINK; -+ -+ if (priv->kx_state != AMD_XGBE_RX_BPA) -+ return AMD_XGBE_AN_NO_LINK; -+ } else { -+ priv->kx_state = AMD_XGBE_RX_ERROR; -+ -+ if (!(phydev->supported & SUPPORTED_10000baseKR_Full)) -+ return AMD_XGBE_AN_NO_LINK; -+ -+ if (priv->kr_state != AMD_XGBE_RX_BPA) -+ return AMD_XGBE_AN_NO_LINK; -+ } -+ -+ ret = amd_xgbe_phy_disable_an(phydev); -+ if (ret) -+ return AMD_XGBE_AN_ERROR; -+ -+ ret = amd_xgbe_phy_switch_mode(phydev); -+ if (ret) -+ return AMD_XGBE_AN_ERROR; -+ -+ ret = amd_xgbe_phy_restart_an(phydev); -+ if (ret) -+ return AMD_XGBE_AN_ERROR; -+ -+ return AMD_XGBE_AN_INCOMPAT_LINK; -+} -+ -+static irqreturn_t amd_xgbe_an_isr(int irq, void *data) -+{ -+ struct amd_xgbe_phy_priv *priv = (struct amd_xgbe_phy_priv *)data; -+ -+ /* Interrupt reason must be read and cleared outside of IRQ context */ -+ disable_irq_nosync(priv->an_irq); -+ -+ queue_work(priv->an_workqueue, &priv->an_irq_work); -+ -+ return IRQ_HANDLED; -+} -+ -+static void amd_xgbe_an_irq_work(struct work_struct *work) -+{ -+ struct amd_xgbe_phy_priv *priv = container_of(work, -+ struct amd_xgbe_phy_priv, -+ an_irq_work); -+ -+ /* Avoid a race between enabling the IRQ and exiting the work by -+ * waiting for the work to finish and then queueing it -+ */ -+ flush_work(&priv->an_work); -+ queue_work(priv->an_workqueue, &priv->an_work); -+} -+ -+static void amd_xgbe_an_state_machine(struct work_struct *work) -+{ -+ struct amd_xgbe_phy_priv *priv = container_of(work, -+ struct amd_xgbe_phy_priv, -+ an_work); -+ struct phy_device *phydev = priv->phydev; -+ enum amd_xgbe_phy_an cur_state = priv->an_state; -+ int int_reg, int_mask; -+ -+ mutex_lock(&priv->an_mutex); -+ -+ /* Read the interrupt */ -+ int_reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT); -+ if (!int_reg) -+ goto out; -+ -+next_int: -+ if (int_reg < 0) { -+ priv->an_state = AMD_XGBE_AN_ERROR; -+ int_mask = XGBE_AN_INT_MASK; -+ } else if (int_reg & XGBE_AN_PG_RCV) { -+ priv->an_state = AMD_XGBE_AN_PAGE_RECEIVED; -+ int_mask = XGBE_AN_PG_RCV; -+ } else if (int_reg & XGBE_AN_INC_LINK) { -+ priv->an_state = AMD_XGBE_AN_INCOMPAT_LINK; -+ int_mask = XGBE_AN_INC_LINK; -+ } else if (int_reg & XGBE_AN_INT_CMPLT) { -+ priv->an_state = AMD_XGBE_AN_COMPLETE; -+ int_mask = XGBE_AN_INT_CMPLT; -+ } else { -+ priv->an_state = AMD_XGBE_AN_ERROR; -+ int_mask = 0; -+ } -+ -+ /* Clear the interrupt to be processed */ -+ int_reg &= ~int_mask; -+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT, int_reg); -+ -+ priv->an_result = priv->an_state; -+ -+again: -+ cur_state = priv->an_state; -+ -+ switch (priv->an_state) { -+ case AMD_XGBE_AN_READY: -+ priv->an_supported = 0; -+ break; -+ -+ case AMD_XGBE_AN_PAGE_RECEIVED: -+ priv->an_state = amd_xgbe_an_page_received(phydev); -+ priv->an_supported++; -+ break; -+ -+ case AMD_XGBE_AN_INCOMPAT_LINK: -+ priv->an_supported = 0; -+ priv->parallel_detect = 0; -+ priv->an_state = amd_xgbe_an_incompat_link(phydev); -+ break; -+ -+ case AMD_XGBE_AN_COMPLETE: -+ priv->parallel_detect = priv->an_supported ? 0 : 1; -+ netdev_dbg(phydev->attached_dev, "%s successful\n", -+ priv->an_supported ? "Auto negotiation" -+ : "Parallel detection"); -+ break; -+ -+ case AMD_XGBE_AN_NO_LINK: -+ break; -+ -+ default: -+ priv->an_state = AMD_XGBE_AN_ERROR; -+ } -+ -+ if (priv->an_state == AMD_XGBE_AN_NO_LINK) { -+ /* Disable auto-negotiation for now - it will be -+ * re-enabled once a link is established -+ */ -+ amd_xgbe_phy_disable_an(phydev); -+ -+ int_reg = 0; -+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT, 0); -+ } else if (priv->an_state == AMD_XGBE_AN_ERROR) { -+ netdev_err(phydev->attached_dev, -+ "error during auto-negotiation, state=%u\n", -+ cur_state); -+ -+ int_reg = 0; -+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT, 0); -+ } -+ -+ if (priv->an_state >= AMD_XGBE_AN_COMPLETE) { -+ priv->an_result = priv->an_state; -+ priv->an_state = AMD_XGBE_AN_READY; -+ priv->kr_state = AMD_XGBE_RX_BPA; -+ priv->kx_state = AMD_XGBE_RX_BPA; -+ } -+ -+ if (cur_state != priv->an_state) -+ goto again; -+ -+ if (int_reg) -+ goto next_int; -+ -+out: -+ enable_irq(priv->an_irq); -+ -+ mutex_unlock(&priv->an_mutex); -+} -+ -+static int amd_xgbe_an_init(struct phy_device *phydev) -+{ -+ int ret; -+ -+ /* Set up Advertisement register 3 first */ -+ ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2); -+ if (ret < 0) -+ return ret; -+ -+ if (phydev->supported & SUPPORTED_10000baseR_FEC) -+ ret |= 0xc000; -+ else -+ ret &= ~0xc000; -+ -+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2, ret); -+ -+ /* Set up Advertisement register 2 next */ -+ ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1); -+ if (ret < 0) -+ return ret; -+ -+ if (phydev->supported & SUPPORTED_10000baseKR_Full) -+ ret |= 0x80; -+ else -+ ret &= ~0x80; -+ -+ if ((phydev->supported & SUPPORTED_1000baseKX_Full) || -+ (phydev->supported & SUPPORTED_2500baseX_Full)) -+ ret |= 0x20; -+ else -+ ret &= ~0x20; -+ -+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1, ret); -+ -+ /* Set up Advertisement register 1 last */ -+ ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE); -+ if (ret < 0) -+ return ret; -+ -+ if (phydev->supported & SUPPORTED_Pause) -+ ret |= 0x400; -+ else -+ ret &= ~0x400; -+ -+ if (phydev->supported & SUPPORTED_Asym_Pause) -+ ret |= 0x800; -+ else -+ ret &= ~0x800; -+ -+ /* We don't intend to perform XNP */ -+ ret &= ~XNP_NP_EXCHANGE; -+ -+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE, ret); -+ -+ return 0; -+} -+ -+static int amd_xgbe_phy_soft_reset(struct phy_device *phydev) -+{ -+ int count, ret; -+ -+ ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1); -+ if (ret < 0) -+ return ret; -+ -+ ret |= MDIO_CTRL1_RESET; -+ phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, ret); -+ -+ count = 50; -+ do { -+ msleep(20); -+ ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1); -+ if (ret < 0) -+ return ret; -+ } while ((ret & MDIO_CTRL1_RESET) && --count); -+ -+ if (ret & MDIO_CTRL1_RESET) -+ return -ETIMEDOUT; -+ -+ /* Disable auto-negotiation for now */ -+ ret = amd_xgbe_phy_disable_an(phydev); -+ if (ret < 0) -+ return ret; -+ -+ /* Clear auto-negotiation interrupts */ -+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT, 0); -+ -+ return 0; -+} -+ -+static int amd_xgbe_phy_config_init(struct phy_device *phydev) -+{ -+ struct amd_xgbe_phy_priv *priv = phydev->priv; -+ struct net_device *netdev = phydev->attached_dev; -+ int ret; -+ -+ if (!priv->an_irq_allocated) { -+ /* Allocate the auto-negotiation workqueue and interrupt */ -+ snprintf(priv->an_irq_name, sizeof(priv->an_irq_name) - 1, -+ "%s-pcs", netdev_name(netdev)); -+ -+ priv->an_workqueue = -+ create_singlethread_workqueue(priv->an_irq_name); -+ if (!priv->an_workqueue) { -+ netdev_err(netdev, "phy workqueue creation failed\n"); -+ return -ENOMEM; -+ } -+ -+ ret = devm_request_irq(priv->dev, priv->an_irq, -+ amd_xgbe_an_isr, 0, priv->an_irq_name, -+ priv); -+ if (ret) { -+ netdev_err(netdev, "phy irq request failed\n"); -+ destroy_workqueue(priv->an_workqueue); -+ return ret; -+ } -+ -+ priv->an_irq_allocated = 1; -+ } -+ -+ ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_FEC_ABILITY); -+ if (ret < 0) -+ return ret; -+ priv->fec_ability = ret & XGBE_PHY_FEC_MASK; -+ -+ /* Initialize supported features */ -+ phydev->supported = SUPPORTED_Autoneg; -+ phydev->supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause; -+ phydev->supported |= SUPPORTED_Backplane; -+ phydev->supported |= SUPPORTED_10000baseKR_Full; -+ switch (priv->speed_set) { -+ case AMD_XGBE_PHY_SPEEDSET_1000_10000: -+ phydev->supported |= SUPPORTED_1000baseKX_Full; -+ break; -+ case AMD_XGBE_PHY_SPEEDSET_2500_10000: -+ phydev->supported |= SUPPORTED_2500baseX_Full; -+ break; -+ } -+ -+ if (priv->fec_ability & XGBE_PHY_FEC_ENABLE) -+ phydev->supported |= SUPPORTED_10000baseR_FEC; -+ -+ phydev->advertising = phydev->supported; -+ -+ /* Set initial mode - call the mode setting routines -+ * directly to insure we are properly configured -+ */ -+ if (phydev->supported & SUPPORTED_10000baseKR_Full) -+ ret = amd_xgbe_phy_xgmii_mode(phydev); -+ else if (phydev->supported & SUPPORTED_1000baseKX_Full) -+ ret = amd_xgbe_phy_gmii_mode(phydev); -+ else if (phydev->supported & SUPPORTED_2500baseX_Full) -+ ret = amd_xgbe_phy_gmii_2500_mode(phydev); -+ else -+ ret = -EINVAL; -+ if (ret < 0) -+ return ret; -+ -+ /* Set up advertisement registers based on current settings */ -+ ret = amd_xgbe_an_init(phydev); -+ if (ret) -+ return ret; -+ -+ /* Enable auto-negotiation interrupts */ -+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INTMASK, 0x07); -+ -+ return 0; -+} -+ -+static int amd_xgbe_phy_setup_forced(struct phy_device *phydev) -+{ -+ int ret; -+ -+ /* Disable auto-negotiation */ -+ ret = amd_xgbe_phy_disable_an(phydev); -+ if (ret < 0) -+ return ret; -+ -+ /* Validate/Set specified speed */ -+ switch (phydev->speed) { -+ case SPEED_10000: -+ ret = amd_xgbe_phy_set_mode(phydev, AMD_XGBE_MODE_KR); -+ break; -+ -+ case SPEED_2500: -+ case SPEED_1000: -+ ret = amd_xgbe_phy_set_mode(phydev, AMD_XGBE_MODE_KX); -+ break; -+ -+ default: -+ ret = -EINVAL; -+ } -+ -+ if (ret < 0) -+ return ret; -+ -+ /* Validate duplex mode */ -+ if (phydev->duplex != DUPLEX_FULL) -+ return -EINVAL; -+ -+ phydev->pause = 0; -+ phydev->asym_pause = 0; -+ -+ return 0; -+} -+ -+static int __amd_xgbe_phy_config_aneg(struct phy_device *phydev) -+{ -+ struct amd_xgbe_phy_priv *priv = phydev->priv; -+ u32 mmd_mask = phydev->c45_ids.devices_in_package; -+ int ret; -+ -+ if (phydev->autoneg != AUTONEG_ENABLE) -+ return amd_xgbe_phy_setup_forced(phydev); -+ -+ /* Make sure we have the AN MMD present */ -+ if (!(mmd_mask & MDIO_DEVS_AN)) -+ return -EINVAL; -+ -+ /* Disable auto-negotiation interrupt */ -+ disable_irq(priv->an_irq); -+ -+ /* Start auto-negotiation in a supported mode */ -+ if (phydev->supported & SUPPORTED_10000baseKR_Full) -+ ret = amd_xgbe_phy_set_mode(phydev, AMD_XGBE_MODE_KR); -+ else if ((phydev->supported & SUPPORTED_1000baseKX_Full) || -+ (phydev->supported & SUPPORTED_2500baseX_Full)) -+ ret = amd_xgbe_phy_set_mode(phydev, AMD_XGBE_MODE_KX); -+ else -+ ret = -EINVAL; -+ if (ret < 0) { -+ enable_irq(priv->an_irq); -+ return ret; -+ } -+ -+ /* Disable and stop any in progress auto-negotiation */ -+ ret = amd_xgbe_phy_disable_an(phydev); -+ if (ret < 0) -+ return ret; -+ -+ /* Clear any auto-negotitation interrupts */ -+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_INT, 0); -+ -+ priv->an_result = AMD_XGBE_AN_READY; -+ priv->an_state = AMD_XGBE_AN_READY; -+ priv->kr_state = AMD_XGBE_RX_BPA; -+ priv->kx_state = AMD_XGBE_RX_BPA; -+ -+ /* Re-enable auto-negotiation interrupt */ -+ enable_irq(priv->an_irq); -+ -+ /* Set up advertisement registers based on current settings */ -+ ret = amd_xgbe_an_init(phydev); -+ if (ret) -+ return ret; -+ -+ /* Enable and start auto-negotiation */ -+ ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_KR_CTRL); -+ if (ret < 0) -+ return ret; -+ -+ ret |= MDIO_KR_CTRL_PDETECT; -+ phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_KR_CTRL, ret); -+ -+ return amd_xgbe_phy_restart_an(phydev); -+} -+ -+static int amd_xgbe_phy_config_aneg(struct phy_device *phydev) -+{ -+ struct amd_xgbe_phy_priv *priv = phydev->priv; -+ int ret; -+ -+ mutex_lock(&priv->an_mutex); -+ -+ ret = __amd_xgbe_phy_config_aneg(phydev); -+ -+ mutex_unlock(&priv->an_mutex); -+ -+ return ret; -+} -+ -+static int amd_xgbe_phy_aneg_done(struct phy_device *phydev) -+{ -+ struct amd_xgbe_phy_priv *priv = phydev->priv; -+ -+ return (priv->an_result == AMD_XGBE_AN_COMPLETE); -+} -+ -+static int amd_xgbe_phy_update_link(struct phy_device *phydev) -+{ -+ struct amd_xgbe_phy_priv *priv = phydev->priv; -+ unsigned int check_again, autoneg; -+ int ret; -+ -+ /* If we're doing auto-negotiation don't report link down */ -+ if (priv->an_state != AMD_XGBE_AN_READY) { -+ phydev->link = 1; -+ return 0; -+ } -+ -+ /* Since the device can be in the wrong mode when a link is -+ * (re-)established (cable connected after the interface is -+ * up, etc.), the link status may report no link. If there -+ * is no link, try switching modes and checking the status -+ * again if auto negotiation is enabled. -+ */ -+ check_again = (phydev->autoneg == AUTONEG_ENABLE) ? 1 : 0; -+again: -+ /* Link status is latched low, so read once to clear -+ * and then read again to get current state -+ */ -+ ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1); -+ if (ret < 0) -+ return ret; -+ -+ ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1); -+ if (ret < 0) -+ return ret; -+ -+ phydev->link = (ret & MDIO_STAT1_LSTATUS) ? 1 : 0; -+ -+ if (!phydev->link) { -+ if (check_again) { -+ ret = amd_xgbe_phy_switch_mode(phydev); -+ if (ret < 0) -+ return ret; -+ check_again = 0; -+ goto again; -+ } -+ } -+ -+ autoneg = (phydev->link && !priv->link) ? 1 : 0; -+ priv->link = phydev->link; -+ if (autoneg) { -+ /* Link is (back) up, re-start auto-negotiation */ -+ ret = amd_xgbe_phy_config_aneg(phydev); -+ if (ret < 0) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int amd_xgbe_phy_read_status(struct phy_device *phydev) -+{ -+ struct amd_xgbe_phy_priv *priv = phydev->priv; -+ u32 mmd_mask = phydev->c45_ids.devices_in_package; -+ int ret, ad_ret, lp_ret; -+ -+ ret = amd_xgbe_phy_update_link(phydev); -+ if (ret) -+ return ret; -+ -+ if ((phydev->autoneg == AUTONEG_ENABLE) && -+ !priv->parallel_detect) { -+ if (!(mmd_mask & MDIO_DEVS_AN)) -+ return -EINVAL; -+ -+ if (!amd_xgbe_phy_aneg_done(phydev)) -+ return 0; -+ -+ /* Compare Advertisement and Link Partner register 1 */ -+ ad_ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE); -+ if (ad_ret < 0) -+ return ad_ret; -+ lp_ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA); -+ if (lp_ret < 0) -+ return lp_ret; -+ -+ ad_ret &= lp_ret; -+ phydev->pause = (ad_ret & 0x400) ? 1 : 0; -+ phydev->asym_pause = (ad_ret & 0x800) ? 1 : 0; -+ -+ /* Compare Advertisement and Link Partner register 2 */ -+ ad_ret = phy_read_mmd(phydev, MDIO_MMD_AN, -+ MDIO_AN_ADVERTISE + 1); -+ if (ad_ret < 0) -+ return ad_ret; -+ lp_ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA + 1); -+ if (lp_ret < 0) -+ return lp_ret; -+ -+ ad_ret &= lp_ret; -+ if (ad_ret & 0x80) { -+ phydev->speed = SPEED_10000; -+ ret = amd_xgbe_phy_set_mode(phydev, AMD_XGBE_MODE_KR); -+ if (ret) -+ return ret; -+ } else { -+ switch (priv->speed_set) { -+ case AMD_XGBE_PHY_SPEEDSET_1000_10000: -+ phydev->speed = SPEED_1000; -+ break; -+ -+ case AMD_XGBE_PHY_SPEEDSET_2500_10000: -+ phydev->speed = SPEED_2500; -+ break; -+ } -+ -+ ret = amd_xgbe_phy_set_mode(phydev, AMD_XGBE_MODE_KX); -+ if (ret) -+ return ret; -+ } -+ -+ phydev->duplex = DUPLEX_FULL; -+ } else { -+ if (amd_xgbe_phy_in_kr_mode(phydev)) { -+ phydev->speed = SPEED_10000; -+ } else { -+ switch (priv->speed_set) { -+ case AMD_XGBE_PHY_SPEEDSET_1000_10000: -+ phydev->speed = SPEED_1000; -+ break; -+ -+ case AMD_XGBE_PHY_SPEEDSET_2500_10000: -+ phydev->speed = SPEED_2500; -+ break; -+ } -+ } -+ phydev->duplex = DUPLEX_FULL; -+ phydev->pause = 0; -+ phydev->asym_pause = 0; -+ } -+ -+ return 0; -+} -+ -+static int amd_xgbe_phy_suspend(struct phy_device *phydev) -+{ -+ struct amd_xgbe_phy_priv *priv = phydev->priv; -+ int ret; -+ -+ mutex_lock(&phydev->lock); -+ -+ ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1); -+ if (ret < 0) -+ goto unlock; -+ -+ priv->lpm_ctrl = ret; -+ -+ ret |= MDIO_CTRL1_LPOWER; -+ phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, ret); -+ -+ ret = 0; -+ -+unlock: -+ mutex_unlock(&phydev->lock); -+ -+ return ret; -+} -+ -+static int amd_xgbe_phy_resume(struct phy_device *phydev) -+{ -+ struct amd_xgbe_phy_priv *priv = phydev->priv; -+ -+ mutex_lock(&phydev->lock); -+ -+ priv->lpm_ctrl &= ~MDIO_CTRL1_LPOWER; -+ phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, priv->lpm_ctrl); -+ -+ mutex_unlock(&phydev->lock); -+ -+ return 0; -+} -+ -+static unsigned int amd_xgbe_phy_resource_count(struct platform_device *pdev, -+ unsigned int type) -+{ -+ unsigned int count; -+ int i; -+ -+ for (i = 0, count = 0; i < pdev->num_resources; i++) { -+ struct resource *r = &pdev->resource[i]; -+ -+ if (type == resource_type(r)) -+ count++; -+ } -+ -+ return count; -+} -+ -+static int amd_xgbe_phy_probe(struct phy_device *phydev) -+{ -+ struct amd_xgbe_phy_priv *priv; -+ struct platform_device *phy_pdev; -+ struct device *dev, *phy_dev; -+ unsigned int phy_resnum, phy_irqnum; -+ int ret; -+ -+ if (!phydev->bus || !phydev->bus->parent) -+ return -EINVAL; -+ -+ dev = phydev->bus->parent; -+ -+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ priv->pdev = to_platform_device(dev); -+ priv->adev = ACPI_COMPANION(dev); -+ priv->dev = dev; -+ priv->phydev = phydev; -+ mutex_init(&priv->an_mutex); -+ INIT_WORK(&priv->an_irq_work, amd_xgbe_an_irq_work); -+ INIT_WORK(&priv->an_work, amd_xgbe_an_state_machine); -+ -+ if (!priv->adev || acpi_disabled) { -+ struct device_node *bus_node; -+ struct device_node *phy_node; -+ -+ bus_node = priv->dev->of_node; -+ phy_node = of_parse_phandle(bus_node, "phy-handle", 0); -+ if (!phy_node) { -+ dev_err(dev, "unable to parse phy-handle\n"); -+ ret = -EINVAL; -+ goto err_priv; -+ } -+ -+ phy_pdev = of_find_device_by_node(phy_node); -+ of_node_put(phy_node); -+ -+ if (!phy_pdev) { -+ dev_err(dev, "unable to obtain phy device\n"); -+ ret = -EINVAL; -+ goto err_priv; -+ } -+ -+ phy_resnum = 0; -+ phy_irqnum = 0; -+ } else { -+ /* In ACPI, the XGBE and PHY resources are the grouped -+ * together with the PHY resources at the end -+ */ -+ phy_pdev = priv->pdev; -+ phy_resnum = amd_xgbe_phy_resource_count(phy_pdev, -+ IORESOURCE_MEM) - 2; -+ phy_irqnum = amd_xgbe_phy_resource_count(phy_pdev, -+ IORESOURCE_IRQ) - 1; -+ } -+ phy_dev = &phy_pdev->dev; -+ -+ /* Get the device mmio areas */ -+ priv->rxtx_res = platform_get_resource(phy_pdev, IORESOURCE_MEM, -+ phy_resnum++); -+ priv->rxtx_regs = devm_ioremap_resource(dev, priv->rxtx_res); -+ if (IS_ERR(priv->rxtx_regs)) { -+ dev_err(dev, "rxtx ioremap failed\n"); -+ ret = PTR_ERR(priv->rxtx_regs); -+ goto err_put; -+ } -+ -+ /* All xgbe phy devices share the CMU registers so retrieve -+ * the resource and do the ioremap directly rather than -+ * the devm_ioremap_resource call -+ */ -+ priv->cmu_res = platform_get_resource(phy_pdev, IORESOURCE_MEM, -+ phy_resnum++); -+ if (!priv->cmu_res) { -+ dev_err(dev, "cmu invalid resource\n"); -+ ret = -EINVAL; -+ goto err_rxtx; -+ } -+ priv->cmu_regs = devm_ioremap_nocache(dev, priv->cmu_res->start, -+ resource_size(priv->cmu_res)); -+ if (!priv->cmu_regs) { -+ dev_err(dev, "cmu ioremap failed\n"); -+ ret = -ENOMEM; -+ goto err_rxtx; -+ } -+ -+ /* Get the auto-negotiation interrupt */ -+ ret = platform_get_irq(phy_pdev, phy_irqnum); -+ if (ret < 0) { -+ dev_err(dev, "platform_get_irq failed\n"); -+ goto err_cmu; -+ } -+ if (priv->adev && !acpi_disabled && !phy_irqnum) { -+ struct irq_data *d = irq_get_irq_data(ret); -+ if (!d) { -+ dev_err(dev, "unable to set AN interrupt\n"); -+ ret = -EINVAL; -+ goto err_cmu; -+ } -+ -+#ifdef CONFIG_ACPI -+ ret = acpi_register_gsi(dev, d->hwirq - 2, -+ ACPI_LEVEL_SENSITIVE, ACPI_ACTIVE_HIGH); -+#else -+ ret = -EINVAL; -+#endif -+ if (ret < 0) { -+ dev_err(dev, "unable to set AN interrupt\n"); -+ goto err_cmu; -+ } -+ } -+ priv->an_irq = ret; -+ -+ /* Get the device serdes channel property */ -+ ret = device_property_read_u32(phy_dev, XGBE_PHY_CHANNEL_PROPERTY, -+ &priv->serdes_channel); -+ if (ret) { -+ dev_err(dev, "invalid %s property\n", -+ XGBE_PHY_CHANNEL_PROPERTY); -+ goto err_cmu; -+ } -+ -+ /* Get the device speed set property */ -+ ret = device_property_read_u32(phy_dev, XGBE_PHY_SPEEDSET_PROPERTY, -+ &priv->speed_set); -+ if (ret) { -+ dev_err(dev, "invalid %s property\n", -+ XGBE_PHY_SPEEDSET_PROPERTY); -+ goto err_cmu; -+ } -+ -+ switch (priv->speed_set) { -+ case AMD_XGBE_PHY_SPEEDSET_1000_10000: -+ case AMD_XGBE_PHY_SPEEDSET_2500_10000: -+ break; -+ default: -+ dev_err(dev, "invalid %s property\n", -+ XGBE_PHY_SPEEDSET_PROPERTY); -+ ret = -EINVAL; -+ goto err_cmu; -+ } -+ -+ if (device_property_present(phy_dev, XGBE_PHY_BLWC_PROPERTY)) { -+ ret = device_property_read_u32_array(phy_dev, -+ XGBE_PHY_BLWC_PROPERTY, -+ priv->serdes_blwc, -+ XGBE_PHY_SPEEDS); -+ if (ret) { -+ dev_err(dev, "invalid %s property\n", -+ XGBE_PHY_BLWC_PROPERTY); -+ goto err_cmu; -+ } -+ } else { -+ memcpy(priv->serdes_blwc, amd_xgbe_phy_serdes_blwc, -+ sizeof(priv->serdes_blwc)); -+ } -+ -+ if (device_property_present(phy_dev, XGBE_PHY_CDR_RATE_PROPERTY)) { -+ ret = device_property_read_u32_array(phy_dev, -+ XGBE_PHY_CDR_RATE_PROPERTY, -+ priv->serdes_cdr_rate, -+ XGBE_PHY_SPEEDS); -+ if (ret) { -+ dev_err(dev, "invalid %s property\n", -+ XGBE_PHY_CDR_RATE_PROPERTY); -+ goto err_cmu; -+ } -+ } else { -+ memcpy(priv->serdes_cdr_rate, amd_xgbe_phy_serdes_cdr_rate, -+ sizeof(priv->serdes_cdr_rate)); -+ } -+ -+ if (device_property_present(phy_dev, XGBE_PHY_PQ_SKEW_PROPERTY)) { -+ ret = device_property_read_u32_array(phy_dev, -+ XGBE_PHY_PQ_SKEW_PROPERTY, -+ priv->serdes_pq_skew, -+ XGBE_PHY_SPEEDS); -+ if (ret) { -+ dev_err(dev, "invalid %s property\n", -+ XGBE_PHY_PQ_SKEW_PROPERTY); -+ goto err_cmu; -+ } -+ } else { -+ memcpy(priv->serdes_pq_skew, amd_xgbe_phy_serdes_pq_skew, -+ sizeof(priv->serdes_pq_skew)); -+ } -+ -+ if (device_property_present(phy_dev, XGBE_PHY_TX_AMP_PROPERTY)) { -+ ret = device_property_read_u32_array(phy_dev, -+ XGBE_PHY_TX_AMP_PROPERTY, -+ priv->serdes_tx_amp, -+ XGBE_PHY_SPEEDS); -+ if (ret) { -+ dev_err(dev, "invalid %s property\n", -+ XGBE_PHY_TX_AMP_PROPERTY); -+ goto err_cmu; -+ } -+ } else { -+ memcpy(priv->serdes_tx_amp, amd_xgbe_phy_serdes_tx_amp, -+ sizeof(priv->serdes_tx_amp)); -+ } -+ -+ priv->link = 1; -+ -+ phydev->priv = priv; -+ -+ if (!priv->adev || acpi_disabled) -+ platform_device_put(phy_pdev); -+ -+ return 0; -+ -+err_cmu: -+ devm_iounmap(dev, priv->cmu_regs); -+ -+err_rxtx: -+ devm_iounmap(dev, priv->rxtx_regs); -+ devm_release_mem_region(dev, priv->rxtx_res->start, -+ resource_size(priv->rxtx_res)); -+ -+err_put: -+ if (!priv->adev || acpi_disabled) -+ platform_device_put(phy_pdev); -+ -+err_priv: -+ devm_kfree(dev, priv); -+ -+ return ret; -+} -+ -+static void amd_xgbe_phy_remove(struct phy_device *phydev) -+{ -+ struct amd_xgbe_phy_priv *priv = phydev->priv; -+ struct device *dev = priv->dev; -+ -+ if (priv->an_irq_allocated) { -+ devm_free_irq(dev, priv->an_irq, priv); -+ -+ flush_workqueue(priv->an_workqueue); -+ destroy_workqueue(priv->an_workqueue); -+ } -+ -+ devm_iounmap(dev, priv->cmu_regs); -+ -+ devm_iounmap(dev, priv->rxtx_regs); -+ devm_release_mem_region(dev, priv->rxtx_res->start, -+ resource_size(priv->rxtx_res)); -+ -+ devm_kfree(dev, priv); -+} -+ -+static int amd_xgbe_match_phy_device(struct phy_device *phydev) -+{ -+ return phydev->c45_ids.device_ids[MDIO_MMD_PCS] == XGBE_PHY_ID; -+} -+ -+static struct phy_driver amd_xgbe_phy_a0_driver[] = { -+ { -+ .phy_id = XGBE_PHY_ID, -+ .phy_id_mask = XGBE_PHY_MASK, -+ .name = "AMD XGBE PHY A0", -+ .features = 0, -+ .probe = amd_xgbe_phy_probe, -+ .remove = amd_xgbe_phy_remove, -+ .soft_reset = amd_xgbe_phy_soft_reset, -+ .config_init = amd_xgbe_phy_config_init, -+ .suspend = amd_xgbe_phy_suspend, -+ .resume = amd_xgbe_phy_resume, -+ .config_aneg = amd_xgbe_phy_config_aneg, -+ .aneg_done = amd_xgbe_phy_aneg_done, -+ .read_status = amd_xgbe_phy_read_status, -+ .match_phy_device = amd_xgbe_match_phy_device, -+ .driver = { -+ .owner = THIS_MODULE, -+ }, -+ }, -+}; -+ -+module_phy_driver(amd_xgbe_phy_a0_driver); -+ -+static struct mdio_device_id __maybe_unused amd_xgbe_phy_a0_ids[] = { -+ { XGBE_PHY_ID, XGBE_PHY_MASK }, -+ { } -+}; -+MODULE_DEVICE_TABLE(mdio, amd_xgbe_phy_a0_ids); --- -2.4.5 - diff --git a/antenna_select.patch b/antenna_select.patch new file mode 100644 index 000000000..15763e9bc --- /dev/null +++ b/antenna_select.patch @@ -0,0 +1,227 @@ +From c18d8f5095715c56bb3cd9cba64242542632054b Mon Sep 17 00:00:00 2001 +From: Larry Finger +Date: Wed, 16 Mar 2016 13:33:34 -0500 +Subject: rtlwifi: rtl8723be: Add antenna select module parameter + +A number of new laptops have been delivered with only a single antenna. +In principle, this is OK; however, a problem arises when the on-board +EEPROM is programmed to use the other antenna connection. The option +of opening the computer and moving the connector is not always possible +as it will void the warranty in some cases. In addition, this solution +breaks the Windows driver when the box dual boots Linux and Windows. + +A fix involving a new module parameter has been developed. This commit +adds the new parameter and implements the changes needed for the driver. + +Signed-off-by: Larry Finger +Cc: Stable [V4.0+] +Signed-off-by: Kalle Valo +--- + drivers/net/wireless/realtek/rtlwifi/rtl8723be/hw.c | 5 +++++ + drivers/net/wireless/realtek/rtlwifi/rtl8723be/sw.c | 3 +++ + drivers/net/wireless/realtek/rtlwifi/wifi.h | 3 +++ + 3 files changed, 11 insertions(+) + +diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8723be/hw.c b/drivers/net/wireless/realtek/rtlwifi/rtl8723be/hw.c +index c983d2f..5a3df91 100644 +--- a/drivers/net/wireless/realtek/rtlwifi/rtl8723be/hw.c ++++ b/drivers/net/wireless/realtek/rtlwifi/rtl8723be/hw.c +@@ -2684,6 +2684,7 @@ void rtl8723be_read_bt_coexist_info_from_hwpg(struct ieee80211_hw *hw, + bool auto_load_fail, u8 *hwinfo) + { + struct rtl_priv *rtlpriv = rtl_priv(hw); ++ struct rtl_mod_params *mod_params = rtlpriv->cfg->mod_params; + u8 value; + u32 tmpu_32; + +@@ -2702,6 +2703,10 @@ void rtl8723be_read_bt_coexist_info_from_hwpg(struct ieee80211_hw *hw, + rtlpriv->btcoexist.btc_info.ant_num = ANT_X2; + } + ++ /* override ant_num / ant_path */ ++ if (mod_params->ant_sel) ++ rtlpriv->btcoexist.btc_info.ant_num = ++ (mod_params->ant_sel == 1 ? ANT_X2 : ANT_X1); + } + + void rtl8723be_bt_reg_init(struct ieee80211_hw *hw) +diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8723be/sw.c b/drivers/net/wireless/realtek/rtlwifi/rtl8723be/sw.c +index a78eaed..2101793 100644 +--- a/drivers/net/wireless/realtek/rtlwifi/rtl8723be/sw.c ++++ b/drivers/net/wireless/realtek/rtlwifi/rtl8723be/sw.c +@@ -273,6 +273,7 @@ static struct rtl_mod_params rtl8723be_mod_params = { + .msi_support = false, + .disable_watchdog = false, + .debug = DBG_EMERG, ++ .ant_sel = 0, + }; + + static struct rtl_hal_cfg rtl8723be_hal_cfg = { +@@ -394,6 +395,7 @@ module_param_named(fwlps, rtl8723be_mod_params.fwctrl_lps, bool, 0444); + module_param_named(msi, rtl8723be_mod_params.msi_support, bool, 0444); + module_param_named(disable_watchdog, rtl8723be_mod_params.disable_watchdog, + bool, 0444); ++module_param_named(ant_sel, rtl8723be_mod_params.ant_sel, int, 0444); + MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n"); + MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n"); + MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n"); +@@ -402,6 +404,7 @@ MODULE_PARM_DESC(msi, "Set to 1 to use MSI interrupts mode (default 0)\n"); + MODULE_PARM_DESC(debug, "Set debug level (0-5) (default 0)"); + MODULE_PARM_DESC(disable_watchdog, + "Set to 1 to disable the watchdog (default 0)\n"); ++MODULE_PARM_DESC(ant_sel, "Set to 1 or 2 to force antenna number (default 0)\n"); + + static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume); + +diff --git a/drivers/net/wireless/realtek/rtlwifi/wifi.h b/drivers/net/wireless/realtek/rtlwifi/wifi.h +index 554d814..93bd7fc 100644 +--- a/drivers/net/wireless/realtek/rtlwifi/wifi.h ++++ b/drivers/net/wireless/realtek/rtlwifi/wifi.h +@@ -2246,6 +2246,9 @@ struct rtl_mod_params { + + /* default 0: 1 means do not disable interrupts */ + bool int_clear; ++ ++ /* select antenna */ ++ int ant_sel; + }; + + struct rtl_hal_usbint_cfg { +-- +cgit v0.12 + +From baa1702290953295e421f0f433e2b1ff4815827c Mon Sep 17 00:00:00 2001 +From: Larry Finger +Date: Wed, 16 Mar 2016 13:33:35 -0500 +Subject: rtlwifi: btcoexist: Implement antenna selection + +The previous patch added an option to rtl8723be to manually select the +antenna for those cases when only a single antenna is present, and the +on-board EEPROM is incorrectly programmed. This patch implements the +necessary changes in the Bluetooth coexistence driver. + +Signed-off-by: Larry Finger +Cc: Stable [V4.0+] +Signed-off-by: Kalle Valo +--- + .../realtek/rtlwifi/btcoexist/halbtc8723b2ant.c | 9 ++++++-- + .../realtek/rtlwifi/btcoexist/halbtcoutsrc.c | 27 +++++++++++++++++++++- + .../realtek/rtlwifi/btcoexist/halbtcoutsrc.h | 2 +- + .../wireless/realtek/rtlwifi/btcoexist/rtl_btc.c | 5 +++- + 4 files changed, 38 insertions(+), 5 deletions(-) + +diff --git a/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b2ant.c b/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b2ant.c +index c43ab59..77cbd10 100644 +--- a/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b2ant.c ++++ b/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b2ant.c +@@ -1203,7 +1203,6 @@ static void btc8723b2ant_set_ant_path(struct btc_coexist *btcoexist, + + /* Force GNT_BT to low */ + btcoexist->btc_write_1byte_bitmask(btcoexist, 0x765, 0x18, 0x0); +- btcoexist->btc_write_2byte(btcoexist, 0x948, 0x0); + + if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) { + /* tell firmware "no antenna inverse" */ +@@ -1211,19 +1210,25 @@ static void btc8723b2ant_set_ant_path(struct btc_coexist *btcoexist, + h2c_parameter[1] = 1; /* ext switch type */ + btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, + h2c_parameter); ++ btcoexist->btc_write_2byte(btcoexist, 0x948, 0x0); + } else { + /* tell firmware "antenna inverse" */ + h2c_parameter[0] = 1; + h2c_parameter[1] = 1; /* ext switch type */ + btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, + h2c_parameter); ++ btcoexist->btc_write_2byte(btcoexist, 0x948, 0x280); + } + } + + /* ext switch setting */ + if (use_ext_switch) { + /* fixed internal switch S1->WiFi, S0->BT */ +- btcoexist->btc_write_2byte(btcoexist, 0x948, 0x0); ++ if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) ++ btcoexist->btc_write_2byte(btcoexist, 0x948, 0x0); ++ else ++ btcoexist->btc_write_2byte(btcoexist, 0x948, 0x280); ++ + switch (antpos_type) { + case BTC_ANT_WIFI_AT_MAIN: + /* ext switch main at wifi */ +diff --git a/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c b/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c +index b2791c8..babd149 100644 +--- a/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c ++++ b/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c +@@ -965,13 +965,38 @@ void exhalbtc_set_chip_type(u8 chip_type) + } + } + +-void exhalbtc_set_ant_num(u8 type, u8 ant_num) ++void exhalbtc_set_ant_num(struct rtl_priv *rtlpriv, u8 type, u8 ant_num) + { + if (BT_COEX_ANT_TYPE_PG == type) { + gl_bt_coexist.board_info.pg_ant_num = ant_num; + gl_bt_coexist.board_info.btdm_ant_num = ant_num; ++ /* The antenna position: ++ * Main (default) or Aux for pgAntNum=2 && btdmAntNum =1. ++ * The antenna position should be determined by ++ * auto-detect mechanism. ++ * The following is assumed to main, ++ * and those must be modified ++ * if y auto-detect mechanism is ready ++ */ ++ if ((gl_bt_coexist.board_info.pg_ant_num == 2) && ++ (gl_bt_coexist.board_info.btdm_ant_num == 1)) ++ gl_bt_coexist.board_info.btdm_ant_pos = ++ BTC_ANTENNA_AT_MAIN_PORT; ++ else ++ gl_bt_coexist.board_info.btdm_ant_pos = ++ BTC_ANTENNA_AT_MAIN_PORT; + } else if (BT_COEX_ANT_TYPE_ANTDIV == type) { + gl_bt_coexist.board_info.btdm_ant_num = ant_num; ++ gl_bt_coexist.board_info.btdm_ant_pos = ++ BTC_ANTENNA_AT_MAIN_PORT; ++ } else if (type == BT_COEX_ANT_TYPE_DETECTED) { ++ gl_bt_coexist.board_info.btdm_ant_num = ant_num; ++ if (rtlpriv->cfg->mod_params->ant_sel == 1) ++ gl_bt_coexist.board_info.btdm_ant_pos = ++ BTC_ANTENNA_AT_AUX_PORT; ++ else ++ gl_bt_coexist.board_info.btdm_ant_pos = ++ BTC_ANTENNA_AT_MAIN_PORT; + } + } + +diff --git a/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h b/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h +index 0a903ea..f41ca57 100644 +--- a/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h ++++ b/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h +@@ -535,7 +535,7 @@ void exhalbtc_set_bt_patch_version(u16 bt_hci_version, u16 bt_patch_version); + void exhalbtc_update_min_bt_rssi(char bt_rssi); + void exhalbtc_set_bt_exist(bool bt_exist); + void exhalbtc_set_chip_type(u8 chip_type); +-void exhalbtc_set_ant_num(u8 type, u8 ant_num); ++void exhalbtc_set_ant_num(struct rtl_priv *rtlpriv, u8 type, u8 ant_num); + void exhalbtc_display_bt_coex_info(struct btc_coexist *btcoexist); + void exhalbtc_signal_compensation(struct btc_coexist *btcoexist, + u8 *rssi_wifi, u8 *rssi_bt); +diff --git a/drivers/net/wireless/realtek/rtlwifi/btcoexist/rtl_btc.c b/drivers/net/wireless/realtek/rtlwifi/btcoexist/rtl_btc.c +index b9b0cb7..d3fd921 100644 +--- a/drivers/net/wireless/realtek/rtlwifi/btcoexist/rtl_btc.c ++++ b/drivers/net/wireless/realtek/rtlwifi/btcoexist/rtl_btc.c +@@ -72,7 +72,10 @@ void rtl_btc_init_hal_vars(struct rtl_priv *rtlpriv) + __func__, bt_type); + exhalbtc_set_chip_type(bt_type); + +- exhalbtc_set_ant_num(BT_COEX_ANT_TYPE_PG, ant_num); ++ if (rtlpriv->cfg->mod_params->ant_sel == 1) ++ exhalbtc_set_ant_num(rtlpriv, BT_COEX_ANT_TYPE_DETECTED, 1); ++ else ++ exhalbtc_set_ant_num(rtlpriv, BT_COEX_ANT_TYPE_PG, ant_num); + } + + void rtl_btc_init_hw_config(struct rtl_priv *rtlpriv) +-- +cgit v0.12 + diff --git a/arm64-avoid-needing-console-to-enable-serial-console.patch b/arm64-avoid-needing-console-to-enable-serial-console.patch index e8cc7bbe0..3c639a0a3 100644 --- a/arm64-avoid-needing-console-to-enable-serial-console.patch +++ b/arm64-avoid-needing-console-to-enable-serial-console.patch @@ -1,4 +1,4 @@ -From ede02df9a481ba07348e6fd4393ba2e273ef16d8 Mon Sep 17 00:00:00 2001 +From ce7a9e482dcf66d155e74b39ada1708cf6d9cb25 Mon Sep 17 00:00:00 2001 From: Mark Salter Date: Wed, 25 Mar 2015 14:17:50 -0400 Subject: [PATCH] arm64: avoid needing console= to enable serial console @@ -11,17 +11,17 @@ firmware. Signed-off-by: Mark Salter --- - arch/arm64/kernel/setup.c | 19 +++++++++++++++++++ - 1 file changed, 19 insertions(+) + arch/arm64/kernel/setup.c | 20 ++++++++++++++++++++ + 1 file changed, 20 insertions(+) diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c -index 8119479..ea9ff80 100644 +index 9dc67769b6a4..dfac33b47423 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c -@@ -381,3 +381,22 @@ static int __init topology_init(void) +@@ -417,3 +417,22 @@ static int __init register_kernel_offset_dumper(void) return 0; } - subsys_initcall(topology_init); + __initcall(register_kernel_offset_dumper); + +/* + * Temporary hack to avoid need for console= on command line diff --git a/block-blkg_destroy_all-should-clear-q-root_blkg-and-.patch b/block-blkg_destroy_all-should-clear-q-root_blkg-and-.patch deleted file mode 100644 index be5eddebc..000000000 --- a/block-blkg_destroy_all-should-clear-q-root_blkg-and-.patch +++ /dev/null @@ -1,64 +0,0 @@ -From a08748fb2221ef03d54071e5ddfcc1b0cee6961c Mon Sep 17 00:00:00 2001 -From: Tejun Heo -Date: Sat, 5 Sep 2015 15:47:36 -0400 -Subject: [PATCH] block: blkg_destroy_all() should clear q->root_blkg and - ->root_rl.blkg - -While making the root blkg unconditional, ec13b1d6f0a0 ("blkcg: always -create the blkcg_gq for the root blkcg") removed the part which clears -q->root_blkg and ->root_rl.blkg during q exit. This leaves the two -pointers dangling after blkg_destroy_all(). blk-throttle exit path -performs blkg traversals and dereferences ->root_blkg and can lead to -the following oops. - - BUG: unable to handle kernel NULL pointer dereference at 0000000000000558 - IP: [] __blkg_lookup+0x26/0x70 - ... - task: ffff88001b4e2580 ti: ffff88001ac0c000 task.ti: ffff88001ac0c000 - RIP: 0010:[] [] __blkg_lookup+0x26/0x70 - ... - Call Trace: - [] blk_throtl_drain+0x5a/0x110 - [] blkcg_drain_queue+0x18/0x20 - [] __blk_drain_queue+0xc0/0x170 - [] blk_queue_bypass_start+0x61/0x80 - [] blkcg_deactivate_policy+0x39/0x100 - [] blk_throtl_exit+0x38/0x50 - [] blkcg_exit_queue+0x3e/0x50 - [] blk_release_queue+0x1e/0xc0 - ... - -While the bug is a straigh-forward use-after-free bug, it is tricky to -reproduce because blkg release is RCU protected and the rest of exit -path usually finishes before RCU grace period. - -This patch fixes the bug by updating blkg_destro_all() to clear -q->root_blkg and ->root_rl.blkg. - -Signed-off-by: Tejun Heo -Reported-by: "Richard W.M. Jones" -Reported-by: Josh Boyer -Link: http://lkml.kernel.org/g/CA+5PVA5rzQ0s4723n5rHBcxQa9t0cW8BPPBekr_9aMRoWt2aYg@mail.gmail.com -Fixes: ec13b1d6f0a0 ("blkcg: always create the blkcg_gq for the root blkcg") -Cc: stable@vger.kernel.org # v4.2+ ---- - block/blk-cgroup.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/block/blk-cgroup.c b/block/blk-cgroup.c -index d6283b3f5db5..9cc48d1d7abb 100644 ---- a/block/blk-cgroup.c -+++ b/block/blk-cgroup.c -@@ -387,6 +387,9 @@ static void blkg_destroy_all(struct request_queue *q) - blkg_destroy(blkg); - spin_unlock(&blkcg->lock); - } -+ -+ q->root_blkg = NULL; -+ q->root_rl.blkg = NULL; - } - - /* --- -2.4.3 - diff --git a/bpf-fix-branch-offset-adjustment-on-backjumps-after-.patch b/bpf-fix-branch-offset-adjustment-on-backjumps-after-.patch deleted file mode 100644 index fc5a1a504..000000000 --- a/bpf-fix-branch-offset-adjustment-on-backjumps-after-.patch +++ /dev/null @@ -1,92 +0,0 @@ -From a1b14d27ed0965838350f1377ff97c93ee383492 Mon Sep 17 00:00:00 2001 -From: Daniel Borkmann -Date: Wed, 10 Feb 2016 16:47:11 +0100 -Subject: [PATCH] bpf: fix branch offset adjustment on backjumps after patching - ctx expansion - -When ctx access is used, the kernel often needs to expand/rewrite -instructions, so after that patching, branch offsets have to be -adjusted for both forward and backward jumps in the new eBPF program, -but for backward jumps it fails to account the delta. Meaning, for -example, if the expansion happens exactly on the insn that sits at -the jump target, it doesn't fix up the back jump offset. - -Analysis on what the check in adjust_branches() is currently doing: - - /* adjust offset of jmps if necessary */ - if (i < pos && i + insn->off + 1 > pos) - insn->off += delta; - else if (i > pos && i + insn->off + 1 < pos) - insn->off -= delta; - -First condition (forward jumps): - - Before: After: - - insns[0] insns[0] - insns[1] <--- i/insn insns[1] <--- i/insn - insns[2] <--- pos insns[P] <--- pos - insns[3] insns[P] `------| delta - insns[4] <--- target_X insns[P] `-----| - insns[5] insns[3] - insns[4] <--- target_X - insns[5] - -First case is if we cross pos-boundary and the jump instruction was -before pos. This is handeled correctly. I.e. if i == pos, then this -would mean our jump that we currently check was the patchlet itself -that we just injected. Since such patchlets are self-contained and -have no awareness of any insns before or after the patched one, the -delta is correctly not adjusted. Also, for the second condition in -case of i + insn->off + 1 == pos, means we jump to that newly patched -instruction, so no offset adjustment are needed. That part is correct. - -Second condition (backward jumps): - - Before: After: - - insns[0] insns[0] - insns[1] <--- target_X insns[1] <--- target_X - insns[2] <--- pos <-- target_Y insns[P] <--- pos <-- target_Y - insns[3] insns[P] `------| delta - insns[4] <--- i/insn insns[P] `-----| - insns[5] insns[3] - insns[4] <--- i/insn - insns[5] - -Second interesting case is where we cross pos-boundary and the jump -instruction was after pos. Backward jump with i == pos would be -impossible and pose a bug somewhere in the patchlet, so the first -condition checking i > pos is okay only by itself. However, i + -insn->off + 1 < pos does not always work as intended to trigger the -adjustment. It works when jump targets would be far off where the -delta wouldn't matter. But, for example, where the fixed insn->off -before pointed to pos (target_Y), it now points to pos + delta, so -that additional room needs to be taken into account for the check. -This means that i) both tests here need to be adjusted into pos + delta, -and ii) for the second condition, the test needs to be <= as pos -itself can be a target in the backjump, too. - -Fixes: 9bac3d6d548e ("bpf: allow extended BPF programs access skb fields") -Signed-off-by: Daniel Borkmann -Signed-off-by: David S. Miller ---- - kernel/bpf/verifier.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/kernel/bpf/verifier.c b/kernel/bpf/verifier.c -index d1d3e8f57de9..2e7f7ab739e4 100644 ---- a/kernel/bpf/verifier.c -+++ b/kernel/bpf/verifier.c -@@ -2082,7 +2082,7 @@ static void adjust_branches(struct bpf_prog *prog, int pos, int delta) - /* adjust offset of jmps if necessary */ - if (i < pos && i + insn->off + 1 > pos) - insn->off += delta; -- else if (i > pos && i + insn->off + 1 < pos) -+ else if (i > pos + delta && i + insn->off + 1 <= pos + delta) - insn->off -= delta; - } - } --- -2.5.0 - diff --git a/cfg80211-wext-fix-message-ordering.patch b/cfg80211-wext-fix-message-ordering.patch deleted file mode 100644 index 8d3cdfdda..000000000 --- a/cfg80211-wext-fix-message-ordering.patch +++ /dev/null @@ -1,83 +0,0 @@ -From cb150b9d23be6ee7f3a0fff29784f1c5b5ac514d Mon Sep 17 00:00:00 2001 -From: Johannes Berg -Date: Wed, 27 Jan 2016 13:29:34 +0100 -Subject: cfg80211/wext: fix message ordering - -Since cfg80211 frequently takes actions from its netdev notifier -call, wireless extensions messages could still be ordered badly -since the wext netdev notifier, since wext is built into the -kernel, runs before the cfg80211 netdev notifier. For example, -the following can happen: - -5: wlan1: mtu 1500 qdisc mq state DOWN group default - link/ether 02:00:00:00:01:00 brd ff:ff:ff:ff:ff:ff -5: wlan1: - link/ether - -when setting the interface down causes the wext message. - -To also fix this, export the wireless_nlevent_flush() function -and also call it from the cfg80211 notifier. - -Cc: stable@vger.kernel.org -Signed-off-by: Johannes Berg ---- - include/net/iw_handler.h | 6 ++++++ - net/wireless/core.c | 2 ++ - net/wireless/wext-core.c | 3 ++- - 3 files changed, 10 insertions(+), 1 deletion(-) - -diff --git a/include/net/iw_handler.h b/include/net/iw_handler.h -index 8f81bbb..e0f4109 100644 ---- a/include/net/iw_handler.h -+++ b/include/net/iw_handler.h -@@ -439,6 +439,12 @@ int dev_get_wireless_info(char *buffer, char **start, off_t offset, int length); - /* Send a single event to user space */ - void wireless_send_event(struct net_device *dev, unsigned int cmd, - union iwreq_data *wrqu, const char *extra); -+#ifdef CONFIG_WEXT_CORE -+/* flush all previous wext events - if work is done from netdev notifiers */ -+void wireless_nlevent_flush(void); -+#else -+static inline void wireless_nlevent_flush(void) {} -+#endif - - /* We may need a function to send a stream of events to user space. - * More on that later... */ -diff --git a/net/wireless/core.c b/net/wireless/core.c -index b091551..8f0bac7 100644 ---- a/net/wireless/core.c -+++ b/net/wireless/core.c -@@ -1147,6 +1147,8 @@ static int cfg80211_netdev_notifier_call(struct notifier_block *nb, - return NOTIFY_DONE; - } - -+ wireless_nlevent_flush(); -+ - return NOTIFY_OK; - } - -diff --git a/net/wireless/wext-core.c b/net/wireless/wext-core.c -index 87dd619..b50ee5d 100644 ---- a/net/wireless/wext-core.c -+++ b/net/wireless/wext-core.c -@@ -342,7 +342,7 @@ static const int compat_event_type_size[] = { - - /* IW event code */ - --static void wireless_nlevent_flush(void) -+void wireless_nlevent_flush(void) - { - struct sk_buff *skb; - struct net *net; -@@ -355,6 +355,7 @@ static void wireless_nlevent_flush(void) - GFP_KERNEL); - } - } -+EXPORT_SYMBOL_GPL(wireless_nlevent_flush); - - static int wext_netdev_notifier_call(struct notifier_block *nb, - unsigned long state, void *ptr) --- -cgit v0.12 - diff --git a/config-arm-generic b/config-arm-generic index 399bfaf23..5b03071db 100644 --- a/config-arm-generic +++ b/config-arm-generic @@ -17,10 +17,6 @@ CONFIG_CC_STACKPROTECTOR=y # CONFIG_BIG_LITTLE is not set # CONFIG_IWMMXT is not set -CONFIG_PWM=y -CONFIG_PWM_SYSFS=y -# CONFIG_PWM_FSL_FTM is not set - CONFIG_RESET_CONTROLLER=y CONFIG_RESET_GPIO=y @@ -42,19 +38,22 @@ CONFIG_HAVE_PERF_USER_STACK_DUMP=y CONFIG_ARM_PMU=y +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set + # ARM AMBA generic HW CONFIG_ARM_AMBA=y CONFIG_KERNEL_MODE_NEON=y CONFIG_ARM_CCI=y CONFIG_ARM_CCN=y CONFIG_ARM_CCI400_PMU=y -CONFIG_ARM_CCI500_PMU=y +CONFIG_ARM_CCI5xx_PMU=y CONFIG_ARM_DMA_USE_IOMMU=y CONFIG_ARM_DMA_IOMMU_ALIGNMENT=8 CONFIG_ARM_GIC=y CONFIG_ARM_GIC_V2M=y CONFIG_ARM_GIC_V3=y CONFIG_ARM_GIC_V3_ITS=y +# CONFIG_HISILICON_IRQ_MBIGEN is not set CONFIG_ARM_GLOBAL_TIMER=y CONFIG_ARM_SMMU=y CONFIG_MMC_ARMMMCI=y @@ -75,9 +74,13 @@ CONFIG_CRYPTO_AES_ARM_BS=y CONFIG_CRYPTO_SHA1_ARM=y CONFIG_CRYPTO_SHA256_ARM=y CONFIG_CRYPTO_SHA1_ARM_NEON=y -CONFIG_CRYPTO_SHA512_ARM_NEON=y CONFIG_CRYPTO_SHA512_ARM=y +# EDAC +CONFIG_EDAC=y +CONFIG_EDAC_MM_EDAC=m +CONFIG_EDAC_LEGACY_SYSFS=y + # ARM VExpress CONFIG_ARCH_VEXPRESS=y CONFIG_MFD_VEXPRESS_SYSREG=y @@ -113,6 +116,8 @@ CONFIG_ROCKCHIP_IOMMU=y CONFIG_ROCKCHIP_THERMAL=m CONFIG_DRM_ROCKCHIP=m CONFIG_ROCKCHIP_DW_HDMI=m +CONFIG_ROCKCHIP_DW_MIPI_DSI=y +CONFIG_ROCKCHIP_INNO_HDMI=m CONFIG_PHY_ROCKCHIP_USB=m CONFIG_DWMAC_ROCKCHIP=m CONFIG_SND_SOC_ROCKCHIP=m @@ -122,9 +127,54 @@ CONFIG_SND_SOC_ROCKCHIP_RT5645=m CONFIG_SND_SOC_ROCKCHIP_SPDIF=m CONFIG_REGULATOR_ACT8865=m CONFIG_ROCKCHIP_PM_DOMAINS=y +CONFIG_CRYPTO_DEV_ROCKCHIP=m +CONFIG_ROCKCHIP_EFUSE=m +CONFIG_PHY_ROCKCHIP_EMMC=m +CONFIG_PHY_ROCKCHIP_DP=m +CONFIG_ROCKCHIP_MBOX=y # Tegra -# CONFIG_TEGRA_AHB is not set +CONFIG_TEGRA_MC=y +CONFIG_TEGRA124_EMC=y +CONFIG_TEGRA_IOMMU_SMMU=y +CONFIG_TEGRA_AHB=y +CONFIG_TEGRA20_APB_DMA=y +CONFIG_TRUSTED_FOUNDATIONS=y +CONFIG_SERIAL_TEGRA=y +CONFIG_PCI_TEGRA=y +CONFIG_AHCI_TEGRA=m +CONFIG_MMC_SDHCI_TEGRA=m +CONFIG_TEGRA_WATCHDOG=m +CONFIG_I2C_TEGRA=m +CONFIG_SPI_TEGRA114=m +CONFIG_PWM_TEGRA=m +CONFIG_KEYBOARD_TEGRA=m +CONFIG_USB_EHCI_TEGRA=m +CONFIG_RTC_DRV_TEGRA=m +CONFIG_ARM_TEGRA_DEVFREQ=m +CONFIG_ARM_TEGRA124_CPUFREQ=m +CONFIG_TEGRA_SOCTHERM=m + +CONFIG_TEGRA_HOST1X=m +CONFIG_TEGRA_HOST1X_FIREWALL=y +CONFIG_DRM_TEGRA=m +# CONFIG_DRM_TEGRA_DEBUG is not set +CONFIG_DRM_TEGRA_STAGING=y +CONFIG_NOUVEAU_PLATFORM_DRIVER=y +CONFIG_SND_HDA_TEGRA=m + +# CONFIG_ARM_TEGRA20_CPUFREQ is not set +# CONFIG_MFD_NVEC is not set + +# Virt +CONFIG_PARAVIRT=y +CONFIG_PARAVIRT_TIME_ACCOUNTING=y + +CONFIG_EFI=y +CONFIG_EFI_VARS=y +CONFIG_EFIVAR_FS=y +CONFIG_EFI_VARS_PSTORE=y +CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y # Power management / thermal / cpu scaling # CONFIG_ARM_CPUIDLE is not set @@ -148,7 +198,7 @@ CONFIG_OF_NET=y CONFIG_OF_OVERLAY=y CONFIG_OF_PCI_IRQ=m CONFIG_OF_PCI=m -# CONFIG_PCI_HOST_GENERIC is not set +CONFIG_PCI_HOST_GENERIC=y # CONFIG_PCIE_IPROC is not set CONFIG_OF_RESERVED_MEM=y CONFIG_OF_RESOLVE=y @@ -167,36 +217,119 @@ CONFIG_ARM_MHU=m # CONFIG_PL320_MBOX is not set CONFIG_ARM_SCPI_PROTOCOL=m +# NVMem +CONFIG_NVMEM=m + +# SPI +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_GPIO=m +CONFIG_SPI_SPIDEV=m +CONFIG_SPI_BITBANG=m +CONFIG_SPI_DESIGNWARE=m +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPI_SUN4I is not set +# CONFIG_SPI_SUN6I is not set +# CONFIG_SPI_TEGRA20_SFLASH is not set +# CONFIG_SPI_TEGRA20_SLINK is not set +# CONFIG_SPI_ZYNQMP_GQSPI is not set + +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +# CONFIG_PWM_FSL_FTM is not set + # USB CONFIG_USB_OHCI_HCD_PLATFORM=m CONFIG_USB_EHCI_HCD_PLATFORM=m CONFIG_USB_XHCI_PLATFORM=m +CONFIG_USB_ULPI=y + +# usb gadget +CONFIG_USB_OTG=y +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +CONFIG_USB_GADGET=m +CONFIG_USB_GADGET_VBUS_DRAW=100 +CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 +CONFIG_U_SERIAL_CONSOLE=y +CONFIG_USB_MUSB_HDRC=m +CONFIG_USB_MUSB_DUAL_ROLE=y +CONFIG_USB_MUSB_DSPS=m +# CONFIG_MUSB_PIO_ONLY is not set +# CONFIG_USB_MUSB_TUSB6010 is not set +# CONFIG_USB_MUSB_UX500 is not set +CONFIG_USB_GPIO_VBUS=m +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_F_TCM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_OBEX=y +# CONFIG_USB_CONFIGFS_RNDIS is not set +CONFIG_USB_CONFIGFS_SERIAL=y +# CONFIG_USB_CONFIGFS_F_LB_SS is not set +# CONFIG_USB_CONFIGFS_F_FS is not set +# CONFIG_USB_CONFIGFS_F_UAC1 is not set +# CONFIG_USB_CONFIGFS_F_UAC2 is not set +# CONFIG_USB_CONFIGFS_F_MIDI is not set +# CONFIG_USB_CONFIGFS_F_HID is not set +# CONFIG_USB_CONFIGFS_F_UVC is not set +# CONFIG_USB_CONFIGFS_F_PRINTER is not set + +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +# CONFIG_USB_GADGET_XILINX is not set +# CONFIG_USB_FUSB300 is not set +# CONFIG_USB_FOTG210_UDC is not set +# CONFIG_USB_R8A66597 is not set +# CONFIG_USB_PXA27X is not set +# CONFIG_USB_MV_UDC is not set +# CONFIG_USB_MV_U3D is not set +# CONFIG_USB_BDC_UDC is not set +# CONFIG_USB_M66592 is not set +# CONFIG_USB_AMD5536UDC is not set +# CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set +# CONFIG_USB_DUMMY_HCD is not set +# CONFIG_USB_ZERO_HNPTEST is not set # MMC/SD CONFIG_MMC_SPI=m CONFIG_MMC_SDHCI_OF_ARASAN=m +# LCD Panels +CONFIG_DRM_PANEL=y +CONFIG_DRM_PANEL_SIMPLE=m +CONFIG_DRM_PANEL_LG_LG4573=m +CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=m +CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m +CONFIG_DRM_PANEL_SHARP_LS043T1LE01=m +CONFIG_DRM_PANEL_SAMSUNG_LD9040=m +CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m + # Designware (used by numerous devices) CONFIG_MMC_DW=m CONFIG_MMC_DW_PLTFM=m -CONFIG_MMC_DW_IDMAC=y CONFIG_MMC_DW_K3=m CONFIG_MMC_DW_PCI=m CONFIG_SPI_DW_MMIO=m CONFIG_SPI_DW_PCI=m # CONFIG_SPI_DW_MID_DMA is not set -# CONFIG_MMC_DW_IDMAC is not set # CONFIG_MMC_QCOM_DML is not set CONFIG_USB_DWC2=m CONFIG_USB_DWC2_DUAL_ROLE=y -CONFIG_USB_DWC2_PLATFORM=m CONFIG_USB_DWC2_PCI=m # CONFIG_USB_DWC2_DEBUG is not set # CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set CONFIG_USB_DWC3=m CONFIG_USB_DWC3_DUAL_ROLE=y CONFIG_USB_DWC3_PCI=m -# CONFIG_USB_DWC3_DEBUG is not set +CONFIG_USB_DWC3_OF_SIMPLE=m CONFIG_USB_DWC3_ULPI=y CONFIG_DW_WATCHDOG=m CONFIG_PCIE_DW=y @@ -210,10 +343,12 @@ CONFIG_EXTCON=m CONFIG_EXTCON_GPIO=m CONFIG_EXTCON_ADC_JACK=m CONFIG_EXTCON_USB_GPIO=m +# CONFIG_EXTCON_MAX3355 is not set # CONFIG_EXTCON_SM5502 is not set # CONFIG_EXTCON_RT8973A is not set # MTD +# CONFIG_MTD_AFS_PARTS is not set CONFIG_MTD_BLKDEVS=m CONFIG_MTD_BLOCK=m CONFIG_MTD_CFI=m @@ -249,7 +384,7 @@ CONFIG_PINMUX=y CONFIG_PINCONF=y CONFIG_PINCTRL=y CONFIG_GENERIC_PINCONF=y -CONFIG_PINCTRL_SINGLE=m +CONFIG_PINCTRL_SINGLE=y #i2c CONFIG_I2C_ARB_GPIO_CHALLENGE=m @@ -261,6 +396,7 @@ CONFIG_I2C_MUX_PINCTRL=m CONFIG_I2C_MUX_PCA9541=m CONFIG_I2C_MUX_PCA954x=m CONFIG_I2C_MUX_REG=m +CONFIG_I2C_MV64XXX=m # spi CONFIG_SPI_PL022=m @@ -292,11 +428,6 @@ CONFIG_CMA_SIZE_SEL_MBYTES=y CONFIG_CMA_ALIGNMENT=8 CONFIG_CMA_AREAS=7 -# EDAC -CONFIG_EDAC=y -CONFIG_EDAC_MM_EDAC=m -CONFIG_EDAC_LEGACY_SYSFS=y - # VFIO CONFIG_VFIO_PLATFORM=m CONFIG_VFIO_AMBA=m @@ -316,8 +447,6 @@ CONFIG_VFIO_AMBA=m # CONFIG_CADENCE_WATCHDOG is not set # CONFIG_DRM_ARMADA is not set -# CONFIG_DRM_TEGRA is not set -# CONFIG_SHMOBILE_IOMMU is not set # CONFIG_COMMON_CLK_SI570 is not set # CONFIG_COMMON_CLK_QCOM is not set @@ -391,6 +520,7 @@ CONFIG_NET_VENDOR_MELLANOX=y # drm # CONFIG_DRM_VMWGFX is not set # CONFIG_DRM_MSM_DSI is not set +# CONFIG_DRM_HDLCD is not set # CONFIG_IMX_IPUV3_CORE is not set # CONFIG_DEBUG_SET_MODULE_RONX is not set diff --git a/config-arm64 b/config-arm64 index d2a723230..e461c8cb2 100644 --- a/config-arm64 +++ b/config-arm64 @@ -9,19 +9,25 @@ CONFIG_SCHED_SMT=y # arm64 only SoCs CONFIG_ARCH_HISI=y CONFIG_ARCH_SEATTLE=y +CONFIG_ARCH_SUNXI=y +CONFIG_ARCH_TEGRA=y CONFIG_ARCH_XGENE=y +# CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_BCM_IPROC is not set # CONFIG_ARCH_BERLIN is not set -# CONFIG_ARCH_EXYNOS7 is not set -# CONFIG_ARCH_FSL_LS2085A is not set +# CONFIG_ARCH_EXYNOS is not set # CONFIG_ARCH_LAYERSCAPE is not set # CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MVEBU is not set # CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_RENESAS is not set # CONFIG_ARCH_SPRD is not set # CONFIG_ARCH_STRATIX10 is not set -# CONFIG_ARCH_TEGRA is not set # CONFIG_ARCH_THUNDER is not set +# CONFIG_ARCH_VULCAN is not set # CONFIG_ARCH_ZYNQMP is not set +# CONFIG_ARCH_UNIPHIER is not set # Erratum CONFIG_ARM64_ERRATUM_826319=y @@ -33,6 +39,7 @@ CONFIG_ARM64_ERRATUM_843419=y CONFIG_ARM64_ERRATUM_834220=y CONFIG_CAVIUM_ERRATUM_22375=y CONFIG_CAVIUM_ERRATUM_23154=y +CONFIG_CAVIUM_ERRATUM_27456=y # AMBA / VExpress # CONFIG_RTC_DRV_PL030 is not set @@ -47,6 +54,14 @@ CONFIG_ARM64_64K_PAGES=y CONFIG_ARM64_HW_AFDBM=y CONFIG_ARM64_PAN=y CONFIG_ARM64_LSE_ATOMICS=y +CONFIG_ARM64_VHE=y +CONFIG_ARM64_UAO=y + +# Have ARM team revisit +# CONFIG_RELOCATABLE is not set +# CONFIG_RANDOMIZE_BASE is not set + +CONFIG_ARM64_ACPI_PARKING_PROTOCOL=y CONFIG_BCMA_POSSIBLE=y CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 @@ -63,19 +78,16 @@ CONFIG_HVC_DRIVER=y CONFIG_HZ=100 CONFIG_KVM=y -CONFIG_KVM_ARM_MAX_VCPUS=16 CONFIG_RCU_FANOUT=64 CONFIG_SPARSE_IRQ=y CONFIG_SPARSEMEM_VMEMMAP=y +# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set + # CONFIG_SYS_HYPERVISOR is not set -CONFIG_EFI=y -CONFIG_EFI_VARS=y -CONFIG_EFIVAR_FS=y -CONFIG_EFI_VARS_PSTORE=y -CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y +CONFIG_ARM_SBSA_WATCHDOG=m CONFIG_RTC_DRV_EFI=y CONFIG_ACPI=y @@ -115,7 +127,7 @@ CONFIG_POWER_RESET_XGENE=y CONFIG_COMMON_CLK_XGENE=y CONFIG_AHCI_XGENE=y CONFIG_PHY_XGENE=y -CONFIG_NET_XGENE=y +CONFIG_NET_XGENE=m CONFIG_RTC_DRV_XGENE=m CONFIG_HW_RANDOM_XGENE=m CONFIG_GPIO_XGENE=y @@ -125,6 +137,75 @@ CONFIG_EDAC_XGENE=m CONFIG_PCI_XGENE=y CONFIG_PCI_XGENE_MSI=y CONFIG_I2C_XGENE_SLIMPRO=m +CONFIG_XGENE_SLIMPRO_MBOX=m + +# AMD Seattle +CONFIG_NET_SB1000=y +CONFIG_AMD_XGBE=m +CONFIG_AMD_XGBE_DCB=y +CONFIG_VFIO_PLATFORM_AMDXGBE_RESET=m +CONFIG_PINCTRL_AMD=y + +# HiSilicon +CONFIG_HISILICON_IRQ_MBIGEN=y +CONFIG_COMMON_CLK_HI6220=y +CONFIG_PCI_HISI=y +CONFIG_POWER_RESET_HISI=y +CONFIG_HISI_THERMAL=m +CONFIG_STUB_CLK_HI6220=y +CONFIG_REGULATOR_HI655X=m +CONFIG_PHY_HI6220_USB=m +CONFIG_COMMON_RESET_HI6220=m +CONFIG_HI6220_MBOX=m + +# Tegra +CONFIG_ARCH_TEGRA_132_SOC=y +CONFIG_ARCH_TEGRA_210_SOC=y + +# AllWinner +CONFIG_MACH_SUN50I=y +CONFIG_SUNXI_RSB=m +CONFIG_AHCI_SUNXI=m +CONFIG_NET_VENDOR_ALLWINNER=y +# CONFIG_SUN4I_EMAC is not set +# CONFIG_MDIO_SUN4I is not set +# CONFIG_KEYBOARD_SUN4I_LRADC is not set +# CONFIG_TOUCHSCREEN_SUN4I is not set +# CONFIG_SERIO_SUN4I_PS2 is not set +CONFIG_SUNXI_WATCHDOG=m +CONFIG_MFD_SUN6I_PRCM=y +CONFIG_IR_SUNXI=m +CONFIG_MMC_SUNXI=m +CONFIG_RTC_DRV_SUN6I=m +CONFIG_PWM_SUN4I=m +# CONFIG_PHY_SUN4I_USB is not set +# CONFIG_PHY_SUN9I_USB is not set +CONFIG_NVMEM_SUNXI_SID=m + +# ThunderX +# CONFIG_MDIO_OCTEON is not set +# CONFIG_MDIO_THUNDER is not set +# CONFIG_PCI_HOST_THUNDER_PEM is not set +# CONFIG_PCI_HOST_THUNDER_ECAM is not set + +CONFIG_DMI=y +CONFIG_DMIID=y +CONFIG_DMI_SYSFS=y + +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_SATA_AHCI_SEATTLE=m + +CONFIG_LIBNVDIMM=m +CONFIG_BTT=y +CONFIG_ND_BTT=m +CONFIG_ND_BLK=m + +# CONFIG_PMIC_OPREGION is not set +# CONFIG_DEBUG_RODATA is not set + +CONFIG_DEBUG_SECTION_MISMATCH=y + +# CONFIG_SND_SOC is not set # busted build for various reasons # uses pci_* for some reason to allocate DMA buffers @@ -137,46 +218,7 @@ CONFIG_I2C_XGENE_SLIMPRO=m # CONFIG_HOTPLUG_PCI_SHPC is not set -# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set - -# CONFIG_PNP_DEBUG_MESSAGES is not set - -# AMD Seattle -CONFIG_NET_SB1000=y -CONFIG_AMD_XGBE=m -CONFIG_AMD_XGBE_PHY=m -# CONFIG_AMD_XGBE_DCB is not set -# CONFIG_VFIO_PLATFORM_AMDXGBE_RESET is not set -CONFIG_PINCTRL_AMD=y - -# HiSilicon -CONFIG_POWER_RESET_HISI=y -CONFIG_HISI_THERMAL=m -CONFIG_STUB_CLK_HI6220=y -CONFIG_PCI_HISI=y - -# ThunderX -# CONFIG_MDIO_OCTEON is not set - -# CONFIG_IMX_THERMAL is not set - -CONFIG_DMI=y -CONFIG_DMIID=y -CONFIG_DMI_SYSFS=y - -CONFIG_SATA_AHCI_PLATFORM=y - -CONFIG_LIBNVDIMM=m -CONFIG_BTT=y -CONFIG_ND_BTT=m -CONFIG_ND_BLK=m - -# CONFIG_SND_SOC is not set - -# CONFIG_PMIC_OPREGION is not set -# CONFIG_DEBUG_RODATA is not set - -CONFIG_DEBUG_SECTION_MISMATCH=y - # CONFIG_FSL_MC_BUS is not set # CONFIG_FUJITSU_ES is not set +# CONFIG_IMX_THERMAL is not set +# CONFIG_PNP_DEBUG_MESSAGES is not set diff --git a/config-armv7 b/config-armv7 index eaa6d4ebf..bcf054c3e 100644 --- a/config-armv7 +++ b/config-armv7 @@ -3,11 +3,11 @@ # CONFIG_ARCH_BERLIN is not set # CONFIG_ARCH_KEYSTONE is not set CONFIG_ARCH_MXC=y +CONFIG_ARCH_MMP=y CONFIG_ARCH_OMAP3=y CONFIG_ARCH_OMAP4=y CONFIG_ARCH_QCOM=y CONFIG_ARCH_TEGRA=y -CONFIG_ARCH_U8500=y CONFIG_ARCH_ZYNQ=y # These are supported in the LPAE kernel @@ -64,7 +64,6 @@ CONFIG_TWL4030_WATCHDOG=m CONFIG_BATTERY_TWL4030_MADC=m CONFIG_BATTERY_BQ27XXX=m CONFIG_BATTERY_BQ27XXX_I2C=y -CONFIG_BATTERY_BQ27XXX_PLATFORM=y CONFIG_OMAP_USB2=m CONFIG_OMAP_CONTROL_PHY=m CONFIG_TI_PIPE3=m @@ -106,12 +105,8 @@ CONFIG_RTC_DRV_PALMAS=m CONFIG_OMAP5_DSS_HDMI=y CONFIG_COMMON_CLK_PALMAS=m CONFIG_INPUT_PALMAS_PWRBUTTON=m +CONFIG_PALMAS_GPADC=m -CONFIG_WL_TI=y -CONFIG_WLCORE_SDIO=m -CONFIG_WLCORE_SPI=m -CONFIG_WL18XX=m -CONFIG_WILINK_PLATFORM_DATA=y CONFIG_MFD_WL1273_CORE=m CONFIG_NFC_WILINK=m @@ -143,6 +138,7 @@ CONFIG_PWM_TIECAP=m CONFIG_PWM_TIEHRPWM=m CONFIG_PWM_TWL=m CONFIG_PWM_TWL_LED=m +CONFIG_PWM_OMAP_DMTIMER=m CONFIG_CRYPTO_DEV_OMAP_SHAM=m CONFIG_CRYPTO_DEV_OMAP_AES=m @@ -211,7 +207,6 @@ CONFIG_SND_SOC_TLV320AIC31XX=m CONFIG_SND_SOC_TPA6130A2=m CONFIG_SND_SOC_TWL4030=m CONFIG_SND_SOC_TWL6040=m -CONFIG_SND_SOC_PCM1792A=m CONFIG_RADIO_WL128X=m CONFIG_OMAP_REMOTEPROC=m @@ -241,6 +236,7 @@ CONFIG_TI_CPSW_ALE=m CONFIG_TI_CPTS=y CONFIG_TI_EMIF=m CONFIG_DRM_TILCDC=m +# CONFIG_COMMON_CLK_TI_ADPLL is not set # We only need this until the BBB dts is actually updated CONFIG_DRM_TILCDC_SLAVE_COMPAT=y CONFIG_SPI_DAVINCI=m @@ -261,11 +257,12 @@ CONFIG_INPUT_TPS65218_PWRBUTTON=m CONFIG_VIDEO_AM437X_VPFE=m CONFIG_UIO_PRUSS=m CONFIG_WKUP_M3_RPROC=m +CONFIG_WKUP_M3_IPC=m # Builtin needed for BBone White CONFIG_MFD_TPS65217=y CONFIG_REGULATOR_TPS65217=y -CONFOG_CHARGER_TPS65217=m +CONFIG_CHARGER_TPS65217=m CONFIG_BACKLIGHT_TPS65217=m CONFIG_REGULATOR_TPS65217=m @@ -298,15 +295,17 @@ CONFIG_REGULATOR_QCOM_SPMI=m CONFIG_APQ_GCC_8084=m CONFIG_APQ_MMCC_8084=m CONFIG_IPQ_GCC_806X=m +CONFIG_IPQ_GCC_4019=m CONFIG_MSM_GCC_8660=m CONFIG_MSM_GCC_8960=m CONFIG_MSM_MMCC_8960=m CONFIG_MSM_GCC_8974=m CONFIG_MSM_MMCC_8974=m +CONFIG_MSM_GCC_8996=m +CONFIG_MSM_MMCC_8996=m CONFIG_HW_RANDOM_MSM=m CONFIG_I2C_QUP=m CONFIG_SPI_QUP=m -CONFIG_GPIO_MSM_V2=m CONFIG_POWER_RESET_MSM=y CONFIG_USB_MSM_OTG=m CONFIG_MMC_SDHCI_MSM=m @@ -316,11 +315,9 @@ CONFIG_QCOM_GSBI=m CONFIG_QCOM_PM=y CONFIG_PHY_QCOM_APQ8064_SATA=m CONFIG_PHY_QCOM_IPQ806X_SATA=m -CONFIG_USB_DWC3_QCOM=m CONFIG_DWMAC_IPQ806X=m CONFIG_CRYPTO_DEV_QCE=m CONFIG_DRM_MSM=m -CONFIG_DRM_MSM_FBDEV=y CONFIG_USB_EHCI_MSM=m CONFIG_MFD_PM8XXX=m CONFIG_KEYBOARD_PMIC8XXX=m @@ -335,7 +332,6 @@ CONFIG_SPMI=m CONFIG_SPMI_MSM_PMIC_ARB=m CONFIG_QCOM_SPMI_IADC=m CONFIG_QCOM_SPMI_VADC=m -CONFIG_LEDS_PM8941_WLED=m CONFIG_SND_SOC_QCOM=m CONFIG_SND_SOC_LPASS_CPU=m CONFIG_SND_SOC_LPASS_PLATFORM=m @@ -348,7 +344,13 @@ CONFIG_QCOM_SMD=m CONFIG_QCOM_SMD_RPM=m CONFIG_QCOM_SMEM=m CONFIG_REGULATOR_QCOM_SMD_RPM=m -# CONFIG_QCOM_SMEM is not set +CONFIG_QCOM_SMEM=m +CONFIG_QCOM_QFPROM=m +CONFIG_QCOM_WCNSS_CTRL=m +CONFIG_QCOM_SMSM=y +CONFIG_QCOM_SMP2P=m +CONFIG_PCIE_QCOM=y +CONFIG_MTD_NAND_QCOM=m # i.MX # CONFIG_MXC_DEBUG_BOARD is not set @@ -376,7 +378,6 @@ CONFIG_USB_EHCI_MXC=m CONFIG_USB_CHIPIDEA=m CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y -# CONFIG_USB_CHIPIDEA_DEBUG is not set CONFIG_USB_FSL_USB2=m CONFIG_NET_VENDOR_FREESCALE=y # CONFIG_GIANFAR is not set @@ -419,6 +420,7 @@ CONFIG_FB_MXS=m # CONFIG_FB_MX3 is not set # CONFIG_FB_IMX is not set CONFIG_TOUCHSCREEN_IMX6UL_TSC=m +CONFIG_NVMEM_IMX_OCOTP=m CONFIG_SND_IMX_SOC=m CONFIG_SND_SOC_FSL_ASOC_CARD=m @@ -458,15 +460,17 @@ CONFIG_RTC_DRV_MXC=m CONFIG_PWM_IMX=m CONFIG_DRM_IMX=m -CONFIG_DRM_IMX_FB_HELPER=m CONFIG_DRM_IMX_HDMI=m CONFIG_IMX_IPUV3_CORE=m CONFIG_DRM_IMX_IPUV3=m CONFIG_DRM_IMX_LDB=m CONFIG_DRM_IMX_PARALLEL_DISPLAY=m CONFIG_DRM_IMX_TVE=m +CONFIG_DRM_ETNAVIV=m +# CONFIG_DRM_ETNAVIV_REGISTER_LOGGING is not set CONFIG_VIDEO_CODA=m +CONFIG_IMX7D_ADC=m CONFIG_SENSORS_MC13783_ADC=m CONFIG_REGULATOR_ANATOP=m CONFIG_REGULATOR_MC13783=m @@ -503,6 +507,24 @@ CONFIG_REGULATOR_DA9055=m # picoxcell # CONFIG_CRYPTO_DEV_PICOXCELL is not set +# MMP XO 1.75 +# CONFIG_MACH_BROWNSTONE is not set +# CONFIG_MACH_FLINT is not set +# CONFIG_MACH_MARVELL_JASPER is not set +CONFIG_MACH_MMP2_DT=y +CONFIG_SERIAL_PXA=y +CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_KEYBOARD_PXA27x=y +CONFIG_I2C_PXA=m +# CONFIG_I2C_PXA_SLAVE is not set +CONFIG_SND_MMP_SOC=y +CONFIG_SND_PXA910_SOC=m +CONFIG_MMC_SDHCI_PXAV2=m +CONFIG_MMP_PDMA=y +CONFIG_MMP_TDMA=y +CONFIG_PXA_DMA=y +CONFIG_SERIO_OLPC_APSP=m + # Exynos 4 CONFIG_ARCH_EXYNOS4=y CONFIG_SOC_EXYNOS4212=y @@ -512,46 +534,6 @@ CONFIG_AK8975=m CONFIG_CM36651=m CONFIG_KEYBOARD_SAMSUNG=m -# ST Ericsson -CONFIG_MACH_HREFV60=y -CONFIG_MACH_SNOWBALL=y - -CONFIG_ABX500_CORE=y -# CONFIG_ARM_U8500_CPUIDLE is not set -CONFIG_UX500_DEBUG_UART=2 -CONFIG_AB8500_CORE=y -CONFIG_STE_DMA40=y -CONFIG_HSEM_U8500=m -CONFIG_PINCTRL_ABX500=y -CONFIG_PINCTRL_AB8500=y -CONFIG_I2C_NOMADIK=m -CONFIG_KEYBOARD_NOMADIK=m -CONFIG_DB8500_CPUFREQ_COOLING=m -CONFIG_DB8500_THERMAL=y -CONFIG_UX500_WATCHDOG=m -CONFIG_AHCI_ST=m -CONFIG_INPUT_AB8500_PONKEY=m -CONFIG_REGULATOR_AB8500=y -CONFIG_AB8500_USB=m -CONFIG_USB_MUSB_UX500=m -# CONFIG_USB_UX500_DMA is not set -CONFIG_RTC_DRV_AB8500=m -CONFIG_PWM_AB8500=m -CONFIG_SND_SOC_UX500=m -CONFIG_SND_SOC_UX500_PLAT_DMA=m -CONFIG_SND_SOC_UX500_MACH_MOP500=m -CONFIG_CLKSRC_DBX500_PRCMU=y -CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK=y -CONFIG_CRYPTO_DEV_UX500=m -CONFIG_CRYPTO_DEV_UX500_CRYP=m -CONFIG_CRYPTO_DEV_UX500_HASH=m -CONFIG_SENSORS_LIS3_I2C=m -CONFIG_AB8500_BM=y -CONFIG_AB8500_GPADC=y -CONFIG_SENSORS_AB8500=m -CONFIG_STE_MODEM_RPROC=m -CONFIG_STIH415_RESET=y - # Allwinner CONFIG_MACH_SUN4I=y CONFIG_MACH_SUN5I=y @@ -584,9 +566,6 @@ CONFIG_MFD_TPS6586X=y CONFIG_GPIO_TPS6586X=y CONFIG_RTC_DRV_TPS6586X=m -# OLPC XO -CONFIG_SERIO_OLPC_APSP=m - # Zynq-7xxx CONFIG_SERIAL_UARTLITE=y CONFIG_SERIAL_UARTLITE_CONSOLE=y @@ -611,17 +590,15 @@ CONFIG_XILINX_VDMA=m CONFIG_SND_SOC_ADI=m CONFIG_SND_SOC_ADI_AXI_I2S=m CONFIG_SND_SOC_ADI_AXI_SPDIF=m -CONFIG_XILLYBUS=m -CONFIG_XILLYBUS_PCIE=m CONFIG_XILLYBUS_OF=m CONFIG_GS_FPGABOOT=m CONFIG_USB_GADGET_XILINX=m CONFIG_PCIE_XILINX=y CONFIG_CADENCE_WATCHDOG=m CONFIG_REGULATOR_ISL9305=m -CONFIG_EDAC_SYNOPSYS=m CONFIG_PINCTRL_ZYNQ=y CONFIG_AXI_DMAC=m +CONFIG_EDAC_SYNOPSYS=m # Multi function devices CONFIG_MFD_88PM800=m diff --git a/config-armv7-generic b/config-armv7-generic index 285b4dca0..ed26d946e 100644 --- a/config-armv7-generic +++ b/config-armv7-generic @@ -19,6 +19,7 @@ CONFIG_ARM_UNWIND=y CONFIG_ARM_THUMB=y CONFIG_ARM_THUMBEE=y CONFIG_ARM_ASM_UNIFIED=y +CONFIG_ARM_PATCH_IDIV=y CONFIG_ARM_CPU_TOPOLOGY=y CONFIG_ARM_DMA_MEM_BUFFERABLE=y CONFIG_SWP_EMULATE=y @@ -47,26 +48,50 @@ CONFIG_CPU_SW_DOMAIN_PAN=y # CONFIG_XIP_KERNEL is not set # CONFIG_ARM_VIRT_EXT is not set +# CONFIG_DEBUG_RODATA is not set +# CONFIG_DEBUG_ALIGN_RODATA is not set + # Platforms enabled/disabled globally on ARMv7 +CONFIG_ARCH_BCM=y +CONFIG_ARCH_BCM2835=y CONFIG_ARCH_EXYNOS=y CONFIG_ARCH_HIGHBANK=y CONFIG_ARCH_SUNXI=y CONFIG_ARCH_TEGRA=y CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA=y CONFIG_ARCH_VIRT=y -# CONFIG_ARCH_BCM is not set +# CONFIG_ARCH_ARTPEC is not set +# CONFIG_ARCH_BCM_CYGNUS is not set +# CONFIG_ARCH_BCM_NSP is not set +# CONFIG_ARCH_BCM_5301X is not set +# CONFIG_ARCH_BCM_281XX is not set +# CONFIG_ARCH_BCM_21664 is not set +# CONFIG_ARCH_BCM_63XX is not set +# CONFIG_ARCH_BRCMSTB is not set +# CONFIG_ARCH_BERLIN is not set +# CONFIG_ARCH_BCM_CYGNUS is not set +# CONFIG_ARCH_BCM_NSP is not set +# CONFIG_ARCH_BCM_5301X is not set +# CONFIG_ARCH_BCM_281XX is not set +# CONFIG_ARCH_BCM_21664 is not set +# CONFIG_ARCH_BCM_63XX is not set +# CONFIG_ARCH_BRCMSTB is not set # CONFIG_ARCH_BERLIN is not set # CONFIG_ARCH_HI3xxx is not set # CONFIG_ARCH_HISI is not set # CONFIG_ARCH_MEDIATEK is not set # CONFIG_ARCH_MESON is not set +# CONFIG_ARCH_MMP is not set # CONFIG_ARCH_QCOM is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_RENESAS is not set # CONFIG_ARCH_S5PV210 is not set # CONFIG_ARCH_SHMOBILE_MULTI is not set # CONFIG_ARCH_SIRF is not set # CONFIG_ARCH_SOCFPGA is not set # CONFIG_PLAT_SPEAR is not set # CONFIG_ARCH_STI is not set +# CONFIG_ARCH_TANGO is not set # CONFIG_ARCH_U8500 is not set # CONFIG_ARCH_VEXPRESS_SPC is not set # CONFIG_ARCH_WM8850 is not set @@ -141,7 +166,6 @@ CONFIG_LSM_MMAP_MIN_ADDR=32768 CONFIG_XZ_DEC_ARM=y -CONFIG_PCI_HOST_GENERIC=y # CONFIG_PCI_LAYERSCAPE is not set # Do NOT enable this, it breaks stuff and makes things go slow # CONFIG_UACCESS_WITH_MEMCPY is not set @@ -165,8 +189,6 @@ CONFIG_RTC_DRV_PL030=y CONFIG_AMBA_PL08X=y CONFIG_SND_ARMAACI=m -CONFIG_EDAC=y - # highbank CONFIG_EDAC_HIGHBANK_MC=m CONFIG_EDAC_HIGHBANK_L2=m @@ -183,12 +205,12 @@ CONFIG_MACH_SUN6I=y CONFIG_MACH_SUN7I=y CONFIG_MACH_SUN8I=y # CONFIG_MACH_SUN9I is not set +# CONFIG_MACH_SUN50I is not set CONFIG_SUNXI_SRAM=y CONFIG_DMA_SUN4I=m CONFIG_DMA_SUN6I=m CONFIG_SUNXI_WATCHDOG=m CONFIG_NET_VENDOR_ALLWINNER=y -CONFIG_EEPROM_SUNXI_SID=m CONFIG_RTC_DRV_SUNXI=m CONFIG_PHY_SUN4I_USB=m # CONFIG_PHY_SUN9I_USB is not set @@ -201,6 +223,8 @@ CONFIG_GPIO_PCA953X=m CONFIG_GPIO_PCF857X=m CONFIG_TOUCHSCREEN_SUN4I=m CONFIG_MFD_AXP20X=y +CONFIG_MFD_AXP20X_I2C=m +CONFIG_MFD_AXP20X_RSB=m CONFIG_AXP20X_POWER=m CONFIG_INPUT_AXP20X_PEK=m CONFIG_REGULATOR_AXP20X=m @@ -218,10 +242,32 @@ CONFIG_MTD_NAND_SUNXI=m CONFIG_SERIO_SUN4I_PS2=m CONFIG_KEYBOARD_SUN4I_LRADC=m CONFIG_PWM_SUN4I=m +CONFIG_CAN_SUN4I=m CONFIG_USB_MUSB_SUNXI=m CONFIG_CRYPTO_DEV_SUN4I_SS=m CONFIG_SND_SUN4I_CODEC=m +CONFIG_SND_SUN4I_SPDIF=m CONFIG_SUNXI_RSB=m +CONFIG_NVMEM_SUNXI_SID=m + +# BCM 283x +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_8250_BCM2835AUX=y +CONFIG_DMA_BCM2835=m +# CONFIG_MMC_SDHCI_BCM2835 is not set +CONFIG_MMC_SDHCI_IPROC=m +CONFIG_BCM2835_MBOX=m +CONFIG_PWM_BCM2835=m +CONFIG_HW_RANDOM_BCM2835=m +CONFIG_I2C_BCM2835=m +CONFIG_SPI_BCM2835=m +CONFIG_SPI_BCM2835AUX=m +CONFIG_BCM2835_WDT=m +CONFIG_SND_BCM2835_SOC_I2S=m +CONFIG_DRM_VC4=m +CONFIG_RASPBERRYPI_FIRMWARE=y +CONFIG_RASPBERRYPI_POWER=y # Exynos CONFIG_ARCH_EXYNOS3=y @@ -237,7 +283,6 @@ CONFIG_SOC_EXYNOS5800=y CONFIG_SERIAL_SAMSUNG=y CONFIG_SERIAL_SAMSUNG_CONSOLE=y CONFIG_ARM_EXYNOS5440_CPUFREQ=m -CONFIG_ARM_EXYNOS_CPU_FREQ_BOOST_SW=y # CONFIG_ARM_EXYNOS_CPUIDLE is not set CONFIG_ARM_EXYNOS5_BUS_DEVFREQ=m # CONFIG_EXYNOS5420_MCPM not set @@ -254,6 +299,7 @@ CONFIG_MMC_DW_EXYNOS=m # CONFIG_EXYNOS_IOMMU is not set CONFIG_PCI_EXYNOS=y CONFIG_PHY_EXYNOS5_USBDRD=m +CONFIG_SAMSUNG_USBPHY=m CONFIG_PHY_SAMSUNG_USB2=m CONFIG_USB_EHCI_EXYNOS=m CONFIG_USB_OHCI_EXYNOS=m @@ -293,9 +339,8 @@ CONFIG_DRM_EXYNOS_ROTATOR=y CONFIG_DRM_EXYNOS_VIDI=y CONFIG_DRM_EXYNOS_MIXER=y CONFIG_PHY_EXYNOS_DP_VIDEO=m -# CONFIG_FB_S3C is not set CONFIG_PHY_EXYNOS_MIPI_VIDEO=m -CONFIG_PHY_EXYNOS_DP_VIDEO=m +# CONFIG_FB_S3C is not set CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS=y CONFIG_VIDEO_EXYNOS_FIMC_LITE=m CONFIG_VIDEO_EXYNOS4_FIMC_IS=m @@ -333,51 +378,20 @@ CONFIG_CHARGER_MAX8997=m CONFIG_LEDS_MAX8997=m CONFIG_RTC_DRV_MAX8997=m CONFIG_RTC_DRV_MAX77686=m -CONFIG_RTC_DRV_MAX77802=m CONFIG_EXTCON_MAX8997=m # Tegra CONFIG_ARCH_TEGRA_114_SOC=y CONFIG_ARCH_TEGRA_124_SOC=y -CONFIG_ARM_TEGRA_CPUFREQ=y -CONFIG_TRUSTED_FOUNDATIONS=y -CONFIG_SERIAL_TEGRA=y -CONFIG_PCI_TEGRA=y -CONFIG_AHCI_TEGRA=m -CONFIG_TEGRA_IOMMU_SMMU=y -CONFIG_MMC_SDHCI_TEGRA=m -CONFIG_TEGRA_WATCHDOG=m -CONFIG_I2C_TEGRA=m -CONFIG_TEGRA_AHB=y -CONFIG_TEGRA20_APB_DMA=y -CONFIG_SPI_TEGRA114=m -CONFIG_PWM_TEGRA=m -CONFIG_KEYBOARD_TEGRA=m -CONFIG_USB_EHCI_TEGRA=m -CONFIG_RTC_DRV_TEGRA=m CONFIG_SND_SOC_TEGRA=m -CONFIG_SND_SOC_TEGRA_MAX98090=m -CONFIG_SND_SOC_TEGRA_RT5640=m CONFIG_SND_SOC_TEGRA30_AHUB=m CONFIG_SND_SOC_TEGRA30_I2S=m +CONFIG_SND_SOC_TEGRA_MAX98090=m +CONFIG_SND_SOC_TEGRA_RT5640=m CONFIG_SND_SOC_TEGRA_RT5677=m -CONFIG_SND_HDA_TEGRA=m -CONFIG_TEGRA_HOST1X=m -CONFIG_TEGRA_HOST1X_FIREWALL=y -CONFIG_DRM_TEGRA=m -CONFIG_DRM_TEGRA_FBDEV=y -# CONFIG_DRM_TEGRA_DEBUG is not set -CONFIG_DRM_TEGRA_STAGING=y -CONFIG_NOUVEAU_PLATFORM_DRIVER=y CONFIG_AD525X_DPOT=m CONFIG_AD525X_DPOT_I2C=m CONFIG_AD525X_DPOT_SPI=m -CONFIG_TEGRA_SOCTHERM=m -CONFIG_TEGRA_MC=y -CONFIG_TEGRA124_EMC=y -CONFIG_ARM_TEGRA_DEVFREQ=m -# CONFIG_ARM_TEGRA20_CPUFREQ is not set -CONFIG_ARM_TEGRA124_CPUFREQ=m # Jetson TK1 CONFIG_PINCTRL_AS3722=y @@ -420,6 +434,7 @@ CONFIG_RTC_DRV_ISL12057=m CONFIG_RTC_DRV_MV=m CONFIG_RTC_DRV_ARMADA38X=m CONFIG_MVNETA=m +CONFIG_MVNETA_BM_ENABLE=m CONFIG_GPIO_MVEBU=y CONFIG_MVEBU_CLK_CORE=y CONFIG_MVEBU_CLK_COREDIV=y @@ -445,18 +460,20 @@ CONFIG_RTC_DRV_ARMADA38X=m # CONFIG_CACHE_FEROCEON_L2 is not set # CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set CONFIG_LEDS_NS2=m +CONFIG_SERIAL_MVEBU_UART=y +# CONFIG_SERIAL_MVEBU_CONSOLE is not set # DRM panels CONFIG_DRM_PANEL=y CONFIG_DRM_PANEL_SIMPLE=m -CONFIG_DRM_PANEL_LD9040=m -CONFIG_DRM_PANEL_S6E8AA0=m CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m +CONFIG_DRM_PANEL_SHARP_LS043T1LE01=m CONFIG_DRM_PANEL_LG_LG4573=m CONFIG_DRM_PANEL_SAMSUNG_LD9040=m +CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=m CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m CONFIG_DRM_DW_HDMI=m -# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set +CONFIG_DRM_DW_HDMI_AHB_AUDIO=m # regmap CONFIG_REGMAP_SPI=m @@ -464,62 +481,10 @@ CONFIG_REGMAP_SPMI=m CONFIG_REGMAP_MMIO=m CONFIG_REGMAP_IRQ=y -# usb -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -CONFIG_USB_ULPI=y +# usb net CONFIG_AX88796=m CONFIG_AX88796_93CX6=y -# usb gadget -CONFIG_USB_OTG=y -CONFIG_USB_GADGET=m -CONFIG_USB_GADGET_VBUS_DRAW=100 -CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 -CONFIG_USB_MUSB_HDRC=m -CONFIG_USB_MUSB_DUAL_ROLE=y -CONFIG_USB_MUSB_DSPS=m -# CONFIG_MUSB_PIO_ONLY is not set -# CONFIG_USB_MUSB_TUSB6010 is not set -# CONFIG_USB_MUSB_UX500 is not set -CONFIG_USB_GPIO_VBUS=m -CONFIG_USB_CONFIGFS=m -CONFIG_USB_CONFIGFS_ACM=y -CONFIG_USB_CONFIGFS_ECM=y -CONFIG_USB_CONFIGFS_ECM_SUBSET=y -CONFIG_USB_CONFIGFS_EEM=y -CONFIG_USB_CONFIGFS_MASS_STORAGE=y -CONFIG_USB_CONFIGFS_NCM=y -CONFIG_USB_CONFIGFS_OBEX=y -# CONFIG_USB_CONFIGFS_RNDIS is not set -CONFIG_USB_CONFIGFS_SERIAL=y -# CONFIG_USB_CONFIGFS_F_LB_SS is not set -# CONFIG_USB_CONFIGFS_F_FS is not set -# CONFIG_USB_CONFIGFS_F_UAC1 is not set -# CONFIG_USB_CONFIGFS_F_UAC2 is not set -# CONFIG_USB_CONFIGFS_F_MIDI is not set -# CONFIG_USB_CONFIGFS_F_HID is not set -# CONFIG_USB_CONFIGFS_F_UVC is not set -# CONFIG_USB_CONFIGFS_F_PRINTER is not set - -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -# CONFIG_USB_GADGET_DEBUG_FS is not set -# CONFIG_USB_FUSB300 is not set -# CONFIG_USB_FOTG210_UDC is not set -# CONFIG_USB_R8A66597 is not set -# CONFIG_USB_PXA27X is not set -# CONFIG_USB_MV_UDC is not set -# CONFIG_USB_MV_U3D is not set -# CONFIG_USB_BDC_UDC is not set -# CONFIG_USB_M66592 is not set -# CONFIG_USB_AMD5536UDC is not set -# CONFIG_USB_NET2272 is not set -# CONFIG_USB_NET2280 is not set -# CONFIG_USB_GOKU is not set -# CONFIG_USB_EG20T is not set -# CONFIG_USB_DUMMY_HCD is not set -# CONFIG_USB_ZERO_HNPTEST is not set - # Multifunction Devices CONFIG_MFD_TPS65090=y CONFIG_MFD_TPS65910=y @@ -551,6 +516,8 @@ CONFIG_MFD_TPS65912_SPI=y # CONFIG_PINCTRL_IPQ8064 is not set # CONFIG_PINCTRL_MSM8960 is not set # CONFIG_PINCTRL_MSM8660 is not set +# CONFIG_PINCTRL_MSM8996 is not set +# CONFIG_PINCTRL_IPQ4019 is not set # GPIO # CONFIG_GPIO_EM is not set @@ -573,29 +540,6 @@ CONFIG_KEYBOARD_MATRIX=m # CONFIG_GPIO_RCAR is not set CONFIG_W1_MASTER_GPIO=m -# SPI -CONFIG_SPI=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_GPIO=m -CONFIG_SPI_SPIDEV=m -CONFIG_SPI_ALTERA=m -CONFIG_SPI_BITBANG=m -CONFIG_SPI_BUTTERFLY=m -CONFIG_SPI_DESIGNWARE=m -CONFIG_SPI_LM70_LLP=m -CONFIG_SPI_OC_TINY=m -CONFIG_SPI_SC18IS602=m -CONFIG_SPI_TLE62X0=m -CONFIG_SPI_XCOMM=m -# CONFIG_SPI_FSL_SPI is not set -# CONFIG_SPI_CADENCE is not set -# CONFIG_SPI_ZYNQMP_GQSPI is not set - -CONFIG_NFC_NCI_SPI=y - -# i2c -CONFIG_I2C_MV64XXX=m - # HW crypto and rng # CONFIG_CRYPTO_SHA1_ARM_CE is not set # CONFIG_CRYPTO_SHA2_ARM_CE is not set @@ -603,7 +547,6 @@ CONFIG_I2C_MV64XXX=m # CONFIG_CRYPTO_GHASH_ARM_CE is not set # DMA -CONFIG_TI_PRIV_EDMA=y CONFIG_TI_EDMA=y # MTD @@ -627,6 +570,7 @@ CONFIG_MTD_NAND_PXA3xx=m CONFIG_MTD_NAND_RICOH=m CONFIG_MTD_NAND_TMIO=m # CONFIG_MTD_NAND_BRCMNAND is not set +# CONFIG_MTD_MT81xx_NOR is not set CONFIG_MTD_SPI_NOR=m # CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set CONFIG_MTD_SPINAND_MT29F=m @@ -644,7 +588,6 @@ CONFIG_SND_SOC_AC97_CODEC=y # RTC CONFIG_RTC_DRV_DS1305=m CONFIG_RTC_DRV_DS1390=m -CONFIG_RTC_DRV_DS3234=m CONFIG_RTC_DRV_M41T93=m CONFIG_RTC_DRV_M41T94=m CONFIG_RTC_DRV_MAX6902=m @@ -681,6 +624,8 @@ CONFIG_REGULATOR_MAX8660=m CONFIG_REGULATOR_MAX8952=m CONFIG_REGULATOR_MAX8973=m CONFIG_REGULATOR_PFUZE100=m +CONFIG_REGULATOR_PV88060=m +CONFIG_REGULATOR_PV88090=m CONFIG_REGULATOR_TPS51632=m CONFIG_REGULATOR_TPS62360=m CONFIG_REGULATOR_TPS65023=m @@ -723,7 +668,6 @@ CONFIG_SENSORS_ADCXX=m CONFIG_SENSORS_ADS7871=m CONFIG_SENSORS_BH1780=m CONFIG_SENSORS_GPIO_FAN=m -CONFIG_SENSORS_HTU21=m CONFIG_SENSORS_ISL29018=m CONFIG_SENSORS_ISL29028=m CONFIG_SENSORS_LIS3_SPI=m @@ -731,7 +675,6 @@ CONFIG_SENSORS_LM70=m CONFIG_SENSORS_MAX1111=m CONFIG_MPL115=m CONFIG_MPL3115=m -CONFIG_DHT11=m CONFIG_SI7005=m CONFIG_SI7020=m @@ -778,7 +721,6 @@ CONFIG_LIBERTAS_SPI=m CONFIG_P54_SPI=m CONFIG_P54_SPI_DEFAULT_EEPROM=n CONFIG_MICREL_KS8995MA=m -CONFIG_IEEE802154_AT86RF230=m CONFIG_IEEE802154_MRF24J40=m CONFIG_ARM_KPROBES_TEST=m @@ -830,7 +772,6 @@ CONFIG_R8188EU=m # CONFIG_CAN_TI_HECC is not set # CONFIG_CAN_FLEXCAN is not set # CONFIG_CAN_RCAR is not set -# CONFIG_CAN_MCP251X is not set # Needs work/investigation # CONFIG_ARM_KPROBES_TEST is not set @@ -864,7 +805,6 @@ CONFIG_R8188EU=m # CONFIG_SERIAL_BCM63XX is not set # CONFIG_SERIAL_STM32 is not set # CONFIG_FB_XILINX is not set -# CONFIG_USB_GADGET_XILINX is not set # CONFIG_BRCMSTB_GISB_ARB is not set # CONFIG_SUNGEM is not set # CONFIG_FB_SAVAGE is not set @@ -896,18 +836,17 @@ CONFIG_R8188EU=m # CONFIG_SND_SOC_APQ8016_SBC is not set # CONFIG_SND_SOC_TAS571X is not set -# Debug options. We need to deal with them at some point like x86 -# CONFIG_DEBUG_USER is not set -# CONFIG_DEBUG_LL is not set -# CONFIG_DEBUG_PINCTRL is not set -# CONFIG_DMADEVICES_VDEBUG is not set -# CONFIG_DMADEVICES_DEBUG is not set -# CONFIG_OMAP2_DSS_DEBUG is not set -# CONFIG_CRYPTO_DEV_UX500_DEBUG is not set -# CONFIG_AB8500_DEBUG is not set -# CONFIG_ARM_KERNMEM_PERMS is not set - # CONFIG_VFIO_PLATFORM_AMDXGBE_RESET is not set # Altera? # CONFIG_PCIE_ALTERA is not set + +# Debug options. We need to deal with them at some point like x86 +# CONFIG_DEBUG_USER is not set +# CONFIG_DMADEVICES_VDEBUG is not set +# CONFIG_DMADEVICES_DEBUG is not set +# CONFIG_SERIAL_SAMSUNG_DEBUG is not set +# CONFIG_OMAP2_DSS_DEBUG is not set +# CONFIG_CRYPTO_DEV_UX500_DEBUG is not set +# CONFIG_AB8500_DEBUG is not set +# CONFIG_DEBUG_LL is not set diff --git a/config-armv7-lpae b/config-armv7-lpae index 483c49960..96d49e88a 100644 --- a/config-armv7-lpae +++ b/config-armv7-lpae @@ -27,7 +27,6 @@ CONFIG_ARM_ERRATA_773022=y CONFIG_KVM=y CONFIG_KVM_ARM_HOST=y -CONFIG_KVM_ARM_MAX_VCPUS=8 # CONFIG_XEN is not set CONFIG_XEN_FBDEV_FRONTEND=y @@ -62,6 +61,7 @@ CONFIG_KEYSTONE_IRQ=m CONFIG_PCI_KEYSTONE=y CONFIG_MTD_NAND_DAVINCI=m CONFIG_GPIO_SYSCON=m +CONFIG_TI_MESSAGE_MANAGER=m # Tegra (non A15 device options) # CONFIG_ARCH_TEGRA_2x_SOC is not set @@ -71,7 +71,6 @@ CONFIG_GPIO_SYSCON=m # CONFIG_SPI_TEGRA20_SFLASH is not set # CONFIG_SPI_TEGRA20_SLINK is not set # CONFIG_MFD_MAX8907 is not set -# CONFIG_MFD_NVEC is not set # CONFIG_SND_SOC_TEGRA_ALC5632 is not set # CONFIG_SND_SOC_TEGRA_TRIMSLICE is not set # CONFIG_SND_SOC_TEGRA_WM8753 is not set @@ -80,4 +79,5 @@ CONFIG_GPIO_SYSCON=m # CONFIG_SND_SOC_TEGRA20_AC97 is not set # CONFIG_SND_SOC_TEGRA20_DAS is not set # CONFIG_SND_SOC_TEGRA20_SPDIF is not set -# CONFIG_SND_SOC_TEGRA_RT5677 is not set +# CONFIG_DRM_OMAP is not set +# CONFIG_AM335X_PHY_USB is not set diff --git a/config-debug b/config-debug index d733183a2..821ff17b9 100644 --- a/config-debug +++ b/config-debug @@ -112,6 +112,8 @@ CONFIG_DETECT_HUNG_TASK=y CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_WQ_WATCHDOG=y + CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y CONFIG_DEBUG_KMEMLEAK=y @@ -125,4 +127,4 @@ CONFIG_EDAC_DEBUG=y CONFIG_SPI_DEBUG=y -CONFIG_X86_DEBUG_STATIC_CPU_HAS=y +CONFIG_DEBUG_VM_PGFLAGS=y diff --git a/config-generic b/config-generic index 508543b4f..d569139e6 100644 --- a/config-generic +++ b/config-generic @@ -69,7 +69,6 @@ CONFIG_NET_NS=y CONFIG_USER_NS=y CONFIG_POSIX_MQUEUE=y -CONFIG_KDBUS=m # CONFIG_PREEMPT_NONE is not set CONFIG_PREEMPT_VOLUNTARY=y # CONFIG_PREEMPT is not set @@ -109,7 +108,9 @@ CONFIG_PCIE_ECRC=y CONFIG_PCIEAER_INJECT=m CONFIG_HOTPLUG_PCI=y # CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set CONFIG_HOTPLUG_PCI_PCIE=y +# CONFIG_PCIE_DW_PLAT is not set # CONFIG_SGI_IOC4 is not set @@ -134,7 +135,6 @@ CONFIG_SDIO_UART=m # CONFIG_MMC_TEST is not set # CONFIG_MMC_DEBUG is not set # https://lists.fedoraproject.org/pipermail/kernel/2014-February/004889.html -# CONFIG_MMC_CLKGATE is not set CONFIG_MMC_BLOCK=m CONFIG_MMC_BLOCK_MINORS=8 CONFIG_MMC_BLOCK_BOUNCE=y @@ -178,17 +178,15 @@ CONFIG_INFINIBAND_USER_MAD=m CONFIG_INFINIBAND_USER_ACCESS=m CONFIG_INFINIBAND_ON_DEMAND_PAGING=y # Deprecated and moved to staging -# CONFIG_INFINIBAND_IPATH is not set CONFIG_INFINIBAND_ISER=m CONFIG_INFINIBAND_ISERT=m # Deprecated and moved to staging -# CONFIG_INFINIBAND_AMSO1100 is not set -# CONFIG_INFINIBAND_AMSO1100_DEBUG is not set CONFIG_INFINIBAND_CXGB3=m CONFIG_INFINIBAND_CXGB4=m CONFIG_SCSI_CXGB3_ISCSI=m CONFIG_SCSI_CXGB4_ISCSI=m # CONFIG_INFINIBAND_CXGB3_DEBUG is not set +CONFIG_INFINIBAND_I40IW=m CONFIG_INFINIBAND_NES=m # CONFIG_INFINIBAND_NES_DEBUG is not set CONFIG_INFINIBAND_QIB=m @@ -196,6 +194,8 @@ CONFIG_INFINIBAND_QIB_DCA=y CONFIG_INFINIBAND_OCRDMA=m CONFIG_INFINIBAND_USNIC=m +CONFIG_INFINIBAND_RDMAVT=m + # # Executable file formats # @@ -211,9 +211,9 @@ CONFIG_BINFMT_MISC=m # CONFIG_COMMON_CLK_SI5351 is not set # CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_COMMON_CLK_CS2000_CP is not set # CONFIG_COMMON_CLK_PWM is not set # CONFIG_COMMON_CLK_CDCE925 is not set -# CONFIG_COMMON_CLK_HI6220 is not set # # @@ -223,6 +223,9 @@ CONFIG_FW_LOADER=y # CONFIG_TEST_FIRMWARE is not set # CONFIG_FIRMWARE_IN_KERNEL is not set CONFIG_EXTRA_FIRMWARE="" +CONFIG_FW_CFG_SYSFS=m +# CONFIG_FW_CFG_SYSFS_CMDLINE is not set + # Give this a try in rawhide for now # CONFIG_FW_LOADER_USER_HELPER is not set @@ -249,8 +252,10 @@ CONFIG_REGMAP_I2C=m # CONFIG_SPI_XILINX is not set # CONFIG_SPI_DESIGNWARE is not set # CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_LOOPBACK_TEST is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_AXI_SPI_ENGINE is not set # CONFIG_SPMI is not set @@ -369,9 +374,7 @@ CONFIG_BLK_DEV_FD=m # CONFIG_PARIDE is not set CONFIG_ZRAM=m # CONFIG_ZRAM_LZ4_COMPRESS is not set -# CONFIG_ZRAM_DEBUG is not set -CONFIG_BLK_CPQ_DA=m CONFIG_BLK_CPQ_CISS_DA=m CONFIG_CISS_SCSI_TAPE=y CONFIG_BLK_DEV_DAC960=m @@ -384,6 +387,7 @@ CONFIG_BLK_DEV_LOOP_MIN_COUNT=0 # CONFIG_BLK_DEV_CRYPTOLOOP is not set CONFIG_BLK_DEV_NBD=m CONFIG_BLK_DEV_NVME=m +# CONFIG_BLK_DEV_NVME_SCSI is not set CONFIG_BLK_DEV_SKD=m # 64-bit only but easier to put here CONFIG_BLK_DEV_OSD=m CONFIG_BLK_DEV_RAM=m @@ -510,10 +514,8 @@ CONFIG_SCSI_MVSAS=m CONFIG_SCSI_MVSAS_TASKLET=y CONFIG_SCSI_MPT2SAS=m CONFIG_SCSI_MPT2SAS_MAX_SGE=128 -CONFIG_SCSI_MPT2SAS_LOGGING=y CONFIG_SCSI_MPT3SAS=m CONFIG_SCSI_MPT3SAS_MAX_SGE=128 -CONFIG_SCSI_MPT3SAS_LOGGING=y CONFIG_SCSI_UFSHCD=m CONFIG_SCSI_UFSHCD_PCI=m @@ -547,6 +549,7 @@ CONFIG_SCSI_AM53C974=m # CONFIG_SCSI_EATA_PIO is not set # CONFIG_SCSI_FUTURE_DOMAIN is not set CONFIG_SCSI_GDTH=m +# CONFIG_SCSI_HISI_SAS is not set CONFIG_SCSI_HPTIOP=m CONFIG_SCSI_IPS=m CONFIG_SCSI_INIA100=m @@ -700,7 +703,6 @@ CONFIG_DM_MULTIPATH=m CONFIG_DM_SNAPSHOT=y CONFIG_DM_THIN_PROVISIONING=m CONFIG_DM_CACHE=m -CONFIG_DM_CACHE_MQ=m CONFIG_DM_CACHE_SMQ=m CONFIG_DM_CACHE_CLEANER=m # CONFIG_DM_ERA is not set @@ -713,6 +715,7 @@ CONFIG_DM_MULTIPATH_ST=m CONFIG_DM_RAID=m CONFIG_DM_FLAKEY=m CONFIG_DM_VERITY=m +CONFIG_DM_VERITY_FEC=y CONFIG_DM_SWITCH=m CONFIG_DM_LOG_WRITES=m @@ -742,7 +745,6 @@ CONFIG_FIREWIRE_NOSY=m # I2O device support # # CONFIG_I2O is not set -# CONFIG_I2O_LCT_NOTIFY_ON_CHANGES is not set # # Virtualization support drivers @@ -753,11 +755,12 @@ CONFIG_FIREWIRE_NOSY=m # CONFIG_NET=y -CONFIG_NETLINK_MMAP=y CONFIG_NETLINK_DIAG=m CONFIG_BPF_JIT=y +CONFIG_INET_DIAG_DESTROY=y + CONFIG_TCP_CONG_ADVANCED=y CONFIG_TCP_CONG_BIC=m CONFIG_TCP_CONG_CUBIC=y @@ -786,7 +789,6 @@ CONFIG_UNIX_DIAG=m CONFIG_NET_KEY=m CONFIG_NET_KEY_MIGRATE=y CONFIG_INET=y -CONFIG_INET_LRO=y CONFIG_INET_TUNNEL=m CONFIG_INET_DIAG=m CONFIG_INET_UDP_DIAG=m @@ -810,8 +812,8 @@ CONFIG_SYN_COOKIES=y CONFIG_NET_IPVTI=m CONFIG_NET_FOU=m CONFIG_NET_FOU_IP_TUNNELS=y -CONFIG_GENEVE_CORE=m CONFIG_GENEVE=m +CONFIG_MACSEC=m CONFIG_INET_AH=m CONFIG_INET_ESP=m CONFIG_INET_IPCOMP=m @@ -897,7 +899,6 @@ CONFIG_NETFILTER_INGRESS=y CONFIG_NETFILTER_NETLINK=m CONFIG_NETFILTER_NETLINK_ACCT=m CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NETFILTER_NETLINK_QUEUE_CT=y CONFIG_NETFILTER_NETLINK_LOG=m # CONFIG_NETFILTER_NETLINK_GLUE_CT is not set CONFIG_NETFILTER_XTABLES=y @@ -1087,6 +1088,9 @@ CONFIG_NFT_REDIR_IPV4=m CONFIG_NFT_REDIR_IPV6=m CONFIG_NFT_REJECT=m CONFIG_NFT_COMPAT=m +CONFIG_NF_DUP_NETDEV=m +CONFIG_NFT_DUP_NETDEV=m +CONFIG_NFT_FWD_NETDEV=m CONFIG_NF_TABLES_IPV4=m CONFIG_NF_DUP_IPV4=m @@ -1271,6 +1275,9 @@ CONFIG_NET_ACT_SKBEDIT=m CONFIG_NET_ACT_VLAN=m CONFIG_NET_ACT_BPF=m CONFIG_NET_ACT_CONNMARK=m +CONFIG_NET_ACT_IFE=m +CONFIG_NET_IFE_SKBMARK=m +CONFIG_NET_IFE_SKBPRIO=m CONFIG_DCB=y CONFIG_DNS_RESOLVER=m @@ -1279,10 +1286,10 @@ CONFIG_BATMAN_ADV_BLA=y CONFIG_BATMAN_ADV_DAT=y CONFIG_BATMAN_ADV_NC=y CONFIG_BATMAN_ADV_MCAST=y +CONFIG_BATMAN_ADV_BATMAN_V=y # CONFIG_BATMAN_ADV_DEBUG is not set CONFIG_OPENVSWITCH=m -CONFIG_OPENVSWITCH_CONNTRACK=y CONFIG_OPENVSWITCH_GRE=y CONFIG_OPENVSWITCH_VXLAN=y CONFIG_OPENVSWITCH_GENEVE=y @@ -1375,7 +1382,10 @@ CONFIG_L2TP_ETH=m # CONFIG_CAIF is not set +CONFIG_AF_KCM=m + CONFIG_LWTUNNEL=y +CONFIG_NET_DEVLINK=m CONFIG_RFKILL=m CONFIG_RFKILL_GPIO=m @@ -1404,7 +1414,6 @@ CONFIG_PCNET32=m CONFIG_AMD8111_ETH=m CONFIG_PCMCIA_NMCLAN=m # CONFIG_AMD_XGBE is not set -# CONFIG_AMD_XGBE_PHY is not set CONFIG_NET_VENDOR_ARC=y CONFIG_ARC_EMAC=m @@ -1433,6 +1442,7 @@ CONFIG_CHELSIO_T4=m CONFIG_CHELSIO_T4VF=m CONFIG_CHELSIO_T4_DCB=y # CONFIG_CHELSIO_T4_FCOE is not set +# CONFIG_CHELSIO_T4_UWIRE is not set CONFIG_NET_VENDOR_CISCO=y CONFIG_ENIC=m @@ -1495,6 +1505,7 @@ CONFIG_I40E=m CONFIG_I40E_VXLAN=y # CONFIG_I40E_DCB is not set # CONFIG_I40E_FCOE is not set +CONFIG_I40E_GENEVE=y CONFIG_I40EVF=m CONFIG_FM10K=m # CONFIG_FM10K_VXLAN is not set @@ -1524,6 +1535,10 @@ CONFIG_NET_VENDOR_NATSEMI=y CONFIG_NATSEMI=m CONFIG_NS83820=m +CONFIG_NET_VENDOR_NETRONOME=y +CONFIG_NFP_NETVF=m +CONFIG_NFP_NET_DEBUG=n + CONFIG_NET_VENDOR_8390=y CONFIG_PCMCIA_AXNET=m CONFIG_NE2K_PCI=m @@ -1634,6 +1649,7 @@ CONFIG_MICROCHIP_PHY=m CONFIG_FIXED_PHY=y CONFIG_MDIO_BITBANG=m CONFIG_MDIO_BCM_UNIMAC=m +# CONFIG_MDIO_THUNDER is not set CONFIG_NATIONAL_PHY=m CONFIG_ICPLUS_PHY=m CONFIG_BCM63XX_PHY=m @@ -1667,6 +1683,7 @@ CONFIG_BNX2=m CONFIG_BNX2X=m CONFIG_BNX2X_SRIOV=y CONFIG_BNX2X_VXLAN=y +CONFIG_BNX2X_GENEVE=y CONFIG_CNIC=m CONFIG_FEALNX=m CONFIG_ETHOC=m @@ -1682,7 +1699,6 @@ CONFIG_JME=m # CONFIG_NET_VENDOR_AURORA is not set # -# CONFIG_IP1000 is not set CONFIG_MLX4_CORE=m CONFIG_MLX4_EN=m CONFIG_MLX4_EN_DCB=y @@ -1690,8 +1706,14 @@ CONFIG_MLX4_EN_VXLAN=y CONFIG_MLX4_INFINIBAND=m CONFIG_MLX5_CORE=m CONFIG_MLX5_CORE_EN=y +CONFIG_MLX5_CORE_EN_DCB=y +CONFIG_MLX5_CORE_EN_VXLAN=y CONFIG_MLX5_INFINIBAND=m -# CONFIG_MLXSW_CORE is not set +CONFIG_MLXSW_CORE=m +CONFIG_MLXSW_CORE_HWMON=y +CONFIG_MLXSW_PCI=m +CONFIG_MLXSW_SWITCHX2=m +CONFIG_MLXSW_SPECTRUM=m # CONFIG_MLX4_DEBUG is not set # CONFIG_SFC is not set @@ -1726,7 +1748,6 @@ CONFIG_WLAN=y CONFIG_WIRELESS=y CONFIG_CFG80211=m CONFIG_CFG80211_WEXT=y -# CONFIG_CFG80211_REG_DEBUG is not set CONFIG_CFG80211_DEBUGFS=y # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set CONFIG_CFG80211_DEFAULT_PS=y @@ -1750,9 +1771,10 @@ CONFIG_MAC80211_DEBUGFS=y # CONFIG_WIMAX is not set +# CONFIG_WLAN_VENDOR_ADMTEK is not set # CONFIG_ADM8211 is not set +CONFIG_WLAN_VENDOR_ATH=y CONFIG_ATH_COMMON=m -CONFIG_ATH_CARDS=m CONFIG_ATH5K=m CONFIG_ATH5K_DEBUG=y # CONFIG_ATH5K_TRACER is not set @@ -1769,6 +1791,7 @@ CONFIG_ATH9K_AHB=y CONFIG_ATH9K_DEBUGFS=y CONFIG_ATH9K_HTC=m CONFIG_ATH9K_BTCOEX_SUPPORT=y +# CONFIG_ATH9K_HWRNG is not set # CONFIG_ATH9K_HTC_DEBUGFS is not set # CONFIG_ATH9K_STATION_STATISTICS is not set # CONFIG_ATH9K_WOW is not set @@ -1777,6 +1800,7 @@ CONFIG_ATH9K_BTCOEX_SUPPORT=y # CONFIG_ATH10K=m CONFIG_ATH10K_PCI=m +# CONFIG_ATH10K_AHB is not set # CONFIG_ATH10K_DEBUG is not set # CONFIG_ATH10K_TRACING is not set # CONFIG_ATH_TRACEPOINTS is not set @@ -1790,12 +1814,15 @@ CONFIG_CARL9170=m CONFIG_CARL9170_LEDS=y # CONFIG_CARL9170_HWRNG is not set CONFIG_AT76C50X_USB=m +# CONFIG_WLAN_VENDOR_CISCO is not set # CONFIG_AIRO is not set # CONFIG_AIRO_CS is not set +# CONFIG_WLAN_VENDOR_ATMEL is not set # CONFIG_ATMEL is not set +CONFIG_WLAN_VENDOR_INTERSIL=y +CONFIG_WLAN_VENDOR_BROADCOM=y CONFIG_NET_VENDOR_BROADCOM=y CONFIG_B43=m -CONFIG_B43_PCMCIA=y CONFIG_B43_SDIO=y CONFIG_B43_BCMA=y CONFIG_B43_BCMA_PIO=y @@ -1829,6 +1856,7 @@ CONFIG_PCMCIA_HERMES=m CONFIG_ORINOCO_USB=m # CONFIG_TMD_HERMES is not set # CONFIG_PCMCIA_SPECTRUM is not set +CONFIG_WLAN_VENDOR_ST=y CONFIG_CW1200=m CONFIG_CW1200_WLAN_SDIO=m CONFIG_CW1200_WLAN_SPI=m @@ -1838,6 +1866,7 @@ CONFIG_CW1200_WLAN_SPI=m # CONFIG_IPW2100_DEBUG is not set # CONFIG_IPW2200_DEBUG is not set # CONFIG_LIBIPW_DEBUG is not set +CONFIG_WLAN_VENDOR_MARVELL=y CONFIG_LIBERTAS=m CONFIG_LIBERTAS_USB=m CONFIG_LIBERTAS_CS=m @@ -1849,11 +1878,13 @@ CONFIG_LIBERTAS_MESH=y CONFIG_BNXT=m CONFIG_BNXT_SRIOV=y +CONFIG_WLAN_VENDOR_INTEL=y CONFIG_IWLWIFI=m CONFIG_IWLDVM=m CONFIG_IWLMVM=m # CONFIG_IWLWIFI_BCAST_FILTERING is not set # CONFIG_IWLWIFI_UAPSD is not set +CONFIG_IWLWIFI_PCIE_RTPM=y CONFIG_IWLWIFI_DEBUG=y CONFIG_IWLWIFI_DEBUGFS=y @@ -1873,6 +1904,7 @@ CONFIG_P54_PCI=m CONFIG_MWL8K=m # CONFIG_PRISM54 is not set # CONFIG_PCMCIA_WL3501 is not set +CONFIG_WLAN_VENDOR_RSI=y CONFIG_RSI_91X=m CONFIG_RSI_DEBUGFS=y CONFIG_RSI_SDIO=m @@ -1880,8 +1912,9 @@ CONFIG_RSI_USB=m CONFIG_RT2X00=m CONFIG_RT2X00_LIB_DEBUGFS=y # CONFIG_RT2X00_DEBUG is not set -CONFIG_WL_MEDIATEK=y +CONFIG_WLAN_VENDOR_MEDIATEK=y CONFIG_MT7601U=m +CONFIG_WLAN_VENDOR_RALINK=y CONFIG_RT2400PCI=m CONFIG_RT2500PCI=m CONFIG_RT61PCI=m @@ -1901,6 +1934,7 @@ CONFIG_RT2800PCI_RT53XX=y CONFIG_RT73USB=m CONFIG_RTL8180=m CONFIG_RTL8187=m +CONFIG_WLAN_VENDOR_ZYDAS=y # CONFIG_USB_ZD1201 is not set # CONFIG_USB_NET_SR9800 is not set CONFIG_USB_NET_RNDIS_WLAN=m @@ -1908,17 +1942,22 @@ CONFIG_USB_NET_KALMIA=m CONFIG_USB_NET_QMI_WWAN=m CONFIG_USB_NET_SMSC75XX=m CONFIG_USB_NET_CH9200=m -# CONFIG_WL_TI is not set CONFIG_ZD1211RW=m # CONFIG_ZD1211RW_DEBUG is not set +CONFIG_WLAN_VENDOR_TI=y +CONFIG_WILINK_PLATFORM_DATA=y +CONFIG_WLCORE=m +CONFIG_WLCORE_SDIO=m +CONFIG_WLCORE_SPI=m CONFIG_WL12XX=m - CONFIG_WL1251=m -CONFIG_WL1251_SPI=m CONFIG_WL1251_SDIO=m +CONFIG_WL1251_SPI=m +CONFIG_WL18XX=m CONFIG_RTL_CARDS=m +CONFIG_WLAN_VENDOR_REALTEK=y CONFIG_RTLWIFI=m CONFIG_RTL8192CE=m CONFIG_RTL8192SE=m @@ -1930,8 +1969,8 @@ CONFIG_RTL8723BE=m CONFIG_RTL8188EE=m CONFIG_RTL8821AE=m CONFIG_RTL8XXXU=m -# Untested is intentionally disabled in stable branches -# CONFIG_RTL8XXXU_UNTESTED is not set +# NOTE! This should be disabled when branching to stable +CONFIG_RTL8XXXU_UNTESTED=y CONFIG_MWIFIEX=m CONFIG_MWIFIEX_SDIO=m @@ -1945,10 +1984,11 @@ CONFIG_IEEE802154_DRIVERS=m CONFIG_IEEE802154_FAKELB=m CONFIG_IEEE802154_ATUSB=m CONFIG_IEEE802154_CC2520=m -# CONFIG_IEEE802154_AT86RF230 is not set +CONFIG_IEEE802154_AT86RF230=m +# CONFIG_IEEE802154_AT86RF230_DEBUGFS is not set +# CONFIG_IEEE802154_ADF7242 is not set # CONFIG_IEEE802154_MRF24J40 is not set # CONFIG_IEEE802154_NL802154_EXPERIMENTAL is not set -# CONFIG_IEEE802154_AT86RF230_DEBUGFS is not set CONFIG_MAC802154=m CONFIG_NET_MPLS_GSO=m @@ -1966,7 +2006,13 @@ CONFIG_6LOWPAN_NHC_IPV6=m CONFIG_6LOWPAN_NHC_MOBILITY=m CONFIG_6LOWPAN_NHC_ROUTING=m CONFIG_6LOWPAN_NHC_UDP=m - +CONFIG_6LOWPAN_DEBUGFS=y +CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m +CONFIG_6LOWPAN_GHC_UDP=m +CONFIG_6LOWPAN_GHC_ICMPV6=m +CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m +CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m +CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m # # Token Ring devices @@ -2017,6 +2063,7 @@ CONFIG_CAN_PEAK_PCIEC=y CONFIG_CAN_PEAK_USB=m CONFIG_CAN_KVASER_PCI=m CONFIG_CAN_KVASER_USB=m +# CONFIG_CAN_MCP251X is not set CONFIG_CAN_PLX_PCI=m # CONFIG_CAN_TSCAN1 is not set CONFIG_CAN_C_CAN=m @@ -2031,7 +2078,7 @@ CONFIG_CAN_GS_USB=m CONFIG_CAN_8DEV_USB=m CONFIG_CAN_SOFTING=m # CONFIG_CAN_SOFTING_CS is not set -CONFIG_CAN_SUN4I=m +CONFIG_CAN_IFI_CANFD=m CONFIG_NETROM=m CONFIG_ROSE=m @@ -2065,13 +2112,15 @@ CONFIG_NFC_MICROREAD_I2C=m CONFIG_NFC_TRF7970A=m CONFIG_NFC_ST21NFCA=m CONFIG_NFC_ST21NFCA_I2C=m -# CONFIG_NFC_ST21NFCB is not set -# CONFIG_NFC_ST21NFCB_I2C is not set -# CONFIG_NFC_NXP_NCI is not set +# CONFIG_NFC_ST95HF is not set +CONFIG_NFC_NXP_NCI=m +CONFIG_NFC_NXP_NCI_I2C=m # CONFIG_NFC_NCI_SPI is not set # CONFIG_NFC_NCI_UART is not set # CONFIG_NFC_ST_NCI is not set +# CONFIG_NFC_ST_NCI_I2C is not set # CONFIG_NFC_S3FWRN5_I2C is not set +# CONFIG_NFC_ST_NCI_SPI is not set # CONFIG_NFC_FDP is not set # CONFIG_NFC_MRVL_I2C is not set # CONFIG_NFC_MRVL_SPI is not set @@ -2122,6 +2171,7 @@ CONFIG_BT_BREDR=y CONFIG_BT_HS=y CONFIG_BT_LE=y CONFIG_BT_6LOWPAN=m +CONFIG_BT_LEDS=y # CONFIG_BT_SELFTEST is not set # CONFIG_BT_DEBUGFS is not set CONFIG_BT_SCO=y @@ -2149,6 +2199,7 @@ CONFIG_BT_HCIUART_3WIRE=y CONFIG_BT_HCIUART_INTEL=y CONFIG_BT_HCIUART_BCM=y CONFIG_BT_HCIUART_QCA=y +CONFIG_BT_HCIUART_AG6XX=y CONFIG_BT_HCIDTL1=m CONFIG_BT_HCIBT3C=m CONFIG_BT_HCIBLUECARD=m @@ -2442,6 +2493,7 @@ CONFIG_TOUCHSCREEN_DYNAPRO=m CONFIG_TOUCHSCREEN_EDT_FT5X06=m CONFIG_TOUCHSCREEN_EETI=m CONFIG_TOUCHSCREEN_EGALAX=m +CONFIG_TOUCHSCREEN_EGALAX_SERIAL=m CONFIG_TOUCHSCREEN_ELAN=m CONFIG_TOUCHSCREEN_ELO=m CONFIG_TOUCHSCREEN_FUJITSU=m @@ -2456,6 +2508,7 @@ CONFIG_TOUCHSCREEN_MK712=m CONFIG_TOUCHSCREEN_PENMOUNT=m # CONFIG_TOUCHSCREEN_SUR40 is not set # CONFIG_TOUCHSCREEN_TPS6507X is not set +CONFIG_TOUCHSCREEN_TS4800=m CONFIG_TOUCHSCREEN_TSC_SERIO=m CONFIG_TOUCHSCREEN_TSC2007=m CONFIG_TOUCHSCREEN_TOUCHIT213=m @@ -2487,6 +2540,7 @@ CONFIG_TOUCHSCREEN_ZFORCE=m # CONFIG_TOUCHSCREEN_FT6236 is not set # CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set # CONFIG_TOUCHSCREEN_TSC2004 is not set +# CONFIG_TOUCHSCREEN_MELFAS_MIP4 is not set CONFIG_INPUT_MISC=y CONFIG_INPUT_E3X0_BUTTON=m @@ -2511,6 +2565,13 @@ CONFIG_INPUT_MPU3050=m CONFIG_INPUT_KXTJ9=m # CONFIG_INPUT_KXTJ9_POLLED_MODE is not set +CONFIG_RMI4_CORE=m +CONFIG_RMI4_I2C=m +CONFIG_RMI4_F11=y +CONFIG_RMI4_F12=y +CONFIG_RMI4_F30=y +CONFIG_RMI4_SPI=m + # # Character devices # @@ -2560,10 +2621,12 @@ CONFIG_SERIAL_8250_DW=y # CONFIG_SERIAL_8250_INGENIC is not set CONFIG_SERIAL_8250_RT288X=y CONFIG_SERIAL_8250_MID=y +CONFIG_SERIAL_8250_MOXA=m CONFIG_CYCLADES=m # CONFIG_CYZ_INTR is not set # CONFIG_MOXA_INTELLIO is not set # CONFIG_MOXA_SMARTIO is not set +# CONFIG_SERIAL_MVEBU_UART is not set # CONFIG_ISI is not set # CONFIG_RIO is not set CONFIG_SERIAL_JSM=m @@ -2613,6 +2676,7 @@ CONFIG_I2C_CHARDEV=m # CONFIG_I2C_MUX_PCA9541 is not set # CONFIG_I2C_MUX_PINCTRL is not set # CONFIG_I2C_MUX_REG is not set +# CONFIG_I2C_DEMUX_PINCTRL is not set # CONFIG_I2C_CADENCE is not set # @@ -2715,7 +2779,6 @@ CONFIG_SENSORS_GL518SM=m CONFIG_SENSORS_GL520SM=m CONFIG_SENSORS_HDAPS=m # CONFIG_SENSORS_HIH6130 is not set -# CONFIG_SENSORS_HTU21 is not set # CONFIG_SENSORS_I5K_AMB is not set # FIXME: IBMAEM x86 only? CONFIG_SENSORS_IBMAEM=m @@ -2741,6 +2804,7 @@ CONFIG_SENSORS_LM93=m CONFIG_SENSORS_LM95234=m CONFIG_SENSORS_LTC4245=m CONFIG_SENSORS_LTC2945=m +CONFIG_SENSORS_LTC2990=m CONFIG_SENSORS_LTC4222=m CONFIG_SENSORS_LTC4260=m CONFIG_SENSORS_MAX1619=m @@ -2836,6 +2900,7 @@ CONFIG_SENSORS_MAX16064=m CONFIG_SENSORS_MAX20751=m CONFIG_SENSORS_LM25066=m CONFIG_SENSORS_LTC2978=m +CONFIG_SENSORS_LTC3815=m CONFIG_SENSORS_MAX34440=m CONFIG_SENSORS_MAX8688=m CONFIG_SENSORS_MAX1668=m @@ -2852,10 +2917,13 @@ CONFIG_IIO_BUFFER_CB=y # CONFIG_IIO_KFIFO_BUF is not set CONFIG_IIO_TRIGGERED_BUFFER=m CONFIG_IIO_TRIGGER=y +CONFIG_IIO_SW_TRIGGER=y CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 CONFIG_IIO_INTERRUPT_TRIGGER=m CONFIG_HID_SENSOR_IIO_COMMON=m CONFIG_HID_SENSOR_IIO_TRIGGER=m +CONFIG_IIO_CONFIGFS=m +# CONFIG_IIO_HRTIMER_TRIGGER is not set # CONFIG_IIO_SYSFS_TRIGGER is not set # CONFIG_IIO_SSP_SENSORHUB is not set # CONFIG_AD5446 is not set @@ -2883,9 +2951,13 @@ CONFIG_STK3310=m # CONFIG_TSL4531 is not set # CONFIG_NAU7802 is not set # CONFIG_TI_ADC081C is not set +# CONFIG_TI_ADC0832 is not set +# CONFIG_TI_ADS8688 is not set +# CONFIG_TI_ADS1015 is not set # CONFIG_TI_ADC128S052 is not set # CONFIG_VIPERBOARD_ADC is not set # CONFIG_VF610_ADC is not set +# CONFIG_VF610_DAC is not set # CONFIG_CC10001_ADC is not set # CONFIG_INV_MPU6050_IIO is not set CONFIG_IIO_ST_GYRO_3AXIS=m @@ -2908,9 +2980,11 @@ CONFIG_ACPI_ALS=m # CONFIG_HID_SENSOR_PRESS is not set # CONFIG_IIO_ST_PRESS is not set # CONFIG_KXSD9 is not set +# CONFIG_MMA7455_I2C is not set # CONFIG_MMA8452 is not set # CONFIG_MMA9551 is not set # CONFIG_MMA9553 is not set +# CONFIG_MXC6255 is not set # CONFIG_STK8312 is not set # CONFIG_STK8BA50 is not set # CONFIG_AD7266 is not set @@ -2930,6 +3004,7 @@ CONFIG_ACPI_ALS=m # CONFIG_AD5624R_SPI is not set # CONFIG_AD5686 is not set # CONFIG_AD5755 is not set +# CONFIG_AD5761 is not set # CONFIG_AD5764 is not set # CONFIG_AD5791 is not set # CONFIG_AD7303 is not set @@ -2945,10 +3020,15 @@ CONFIG_ACPI_ALS=m # CONFIG_BMG160 is not set # CONFIG_ADIS16400 is not set # CONFIG_ADIS16480 is not set -# CONFIG_DHT11 is not set +CONFIG_DHT11=m +# CONFIG_INV_MPU6050_I2C is not set +# CONFIG_INV_MPU6050_SPI is not set # CONFIG_MPL3115 is not set # CONFIG_MS5611 is not set # CONFIG_MPL115 is not set +# CONFIG_MPL115_I2C is not set +# CONFIG_MPL115_SPI is not set +# CONFIG_TPL0102 is not set # CONFIG_SI7005 is not set # CONFIG_SI7020 is not set # CONFIG_AS3935 is not set @@ -2957,6 +3037,9 @@ CONFIG_KXCJK1013=m # CONFIG_ISL29125 is not set # CONFIG_JSA1212 is not set CONFIG_RPR0521=m +# CONFIG_AFE4403 is not set +# CONFIG_AFE4404 is not set +CONFIG_MAX30100=m CONFIG_OPT3001=m CONFIG_PA12203001=m # CONFIG_TCS3414 is not set @@ -2965,6 +3048,9 @@ CONFIG_PA12203001=m # CONFIG_MCP4922 is not set # CONFIG_MAX1027 is not set # CONFIG_MXC4005 is not set +# CONFIG_IAQCORE is not set +# CONFIG_ATLAS_PH_SENSOR is not set +# CONFIG_INA2XX_ADC is not set # CONFIG_VZ89X is not set # CONFIG_HDC100X is not set # CONFIG_HTU21 is not set @@ -2976,6 +3062,7 @@ CONFIG_PA12203001=m # CONFIG_TSYS01 is not set # CONFIG_TSYS02D is not set # CONFIG_HI8435 is not set +# CONFIG_IMX7D_ADC is not set # staging IIO drivers # CONFIG_AD7291 is not set @@ -2991,7 +3078,6 @@ CONFIG_PA12203001=m # CONFIG_SENSORS_ISL29028 is not set # CONFIG_SENSORS_HMC5843 is not set # CONFIG_SENSORS_HMC5843_SPI is not set -# CONFIG_IIO_PERIODIC_RTC_TRIGGER is not set # CONFIG_IIO_SIMPLE_DUMMY is not set # CONFIG_ADIS16201 is not set # CONFIG_ADIS16203 is not set @@ -3026,6 +3112,7 @@ CONFIG_PA12203001=m # CONFIG_SRAM is not set # CONFIG_TI_DAC7512 is not set # CONFIG_BMP085_SPI is not set +# CONFIG_MMA7455_SPI is not set # CONFIG_LATTICE_ECP3_CONFIG is not set CONFIG_W1=m @@ -3071,6 +3158,7 @@ CONFIG_IPMI_POWEROFF=m # CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y +CONFIG_WATCHDOG_SYSFS=y # CONFIG_WATCHDOG_NOWAYOUT is not set CONFIG_SOFT_WATCHDOG=m CONFIG_WDTPCI=m @@ -3102,6 +3190,7 @@ CONFIG_W83977F_WDT=m CONFIG_PCIPCWATCHDOG=m CONFIG_USBPCWATCHDOG=m # CONFIG_SBC_EPX_C3_WATCHDOG is not set +# CONFIG_TS4800_WATCHDOG is not set CONFIG_WM8350_WATCHDOG=m CONFIG_WM831X_WATCHDOG=m # CONFIG_MAX63XX_WATCHDOG is not set @@ -3111,6 +3200,9 @@ CONFIG_WM831X_WATCHDOG=m # CONFIG_XILINX_WATCHDOG is not set # CONFIG_CADENCE_WATCHDOG is not set # CONFIG_BCM7038_WDT is not set +# CONFIG_ZIIRAVE_WATCHDOG is not set +# CONFIG_EBC_C384_WDT is not set +# CONFIG_NI903X_WDT is not set CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_TIMERIOMEM=m @@ -3130,6 +3222,7 @@ CONFIG_RTC_INTF_DEV=y CONFIG_RTC_DRV_CMOS=y CONFIG_RTC_DRV_ABX80X=m CONFIG_RTC_DRV_DS1307=m +CONFIG_RTC_DRV_DS1307_HWMON=y CONFIG_RTC_DRV_DS1511=m CONFIG_RTC_DRV_DS1553=m CONFIG_RTC_DRV_DS1685_FAMILY=m @@ -3161,6 +3254,7 @@ CONFIG_RTC_DRV_V3020=m CONFIG_RTC_DRV_DS2404=m CONFIG_RTC_DRV_STK17TA8=m # CONFIG_RTC_DRV_S35390A is not set +CONFIG_RTC_DRV_RX8010=m CONFIG_RTC_DRV_RX8581=m CONFIG_RTC_DRV_RX8025=m CONFIG_RTC_DRV_DS1286=m @@ -3174,13 +3268,14 @@ CONFIG_RTC_DRV_MSM6242=m CONFIG_RTC_DRV_RP5C01=m CONFIG_RTC_DRV_EM3027=m CONFIG_RTC_DRV_RV3029C2=m +CONFIG_RTC_DRV_RV3029_HWMON=y CONFIG_RTC_DRV_PCF50633=m CONFIG_RTC_DRV_DS3232=m CONFIG_RTC_DRV_ISL12022=m CONFIG_RTC_DRV_MCP795=m CONFIG_RTC_DRV_RX4581=m +# CONFIG_RTC_DRV_RX6110 is not set CONFIG_RTC_DRV_PCF2123=m -CONFIG_RTC_DRV_DS3234=m CONFIG_RTC_DRV_RS5C348=m CONFIG_RTC_DRV_R9701=m CONFIG_RTC_DRV_MAX6902=m @@ -3223,6 +3318,7 @@ CONFIG_VGA_ARB_MAX_GPUS=16 CONFIG_DRM=m +CONFIG_DRM_DP_AUX_CHARDEV=y CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_LOAD_EDID_FIRMWARE=y CONFIG_DRM_AST=m # do not enable on f17 or older @@ -3231,19 +3327,19 @@ CONFIG_DRM_CIRRUS_QEMU=m # do not enable on f17 or older # CONFIG_DRM_R128 is not set CONFIG_DRM_RADEON=m CONFIG_DRM_RADEON_USERPTR=y -# CONFIG_DRM_RADEON_UMS is not set CONFIG_DRM_AMDGPU=m +CONFIG_DRM_AMD_ACP=y # CONFIG_DRM_AMDGPU_CIK is not set CONFIG_DRM_AMDGPU_USERPTR=y +CONFIG_DRM_AMD_POWERPLAY=y # CONFIG_DRM_I810 is not set # CONFIG_DRM_MGA is not set CONFIG_DRM_MGAG200=m # do not enable on f17 or older # CONFIG_DRM_SIS is not set # CONFIG_DRM_SAVAGE is not set CONFIG_DRM_I915=m -CONFIG_DRM_I915_KMS=y -CONFIG_DRM_I915_FBDEV=y # CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT is not set +CONFIG_DRM_I915_USERPTR=y CONFIG_DRM_VIA=m CONFIG_DRM_NOUVEAU=m CONFIG_NOUVEAU_DEBUG=5 @@ -3261,11 +3357,8 @@ CONFIG_DRM_VMWGFX_FBCON=y CONFIG_DRM_QXL=m CONFIG_DRM_BOCHS=m CONFIG_DRM_VIRTIO_GPU=m -CONFIG_DRM_PTN3460=m -CONFIG_DRM_PS8622=m # CONFIG_DRM_PANEL is not set # CONFIG_DRM_PANEL_SIMPLE is not set -# CONFIG_DRM_PANEL_S6E8AA0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set CONFIG_DRM_VGEM=m @@ -3281,6 +3374,9 @@ CONFIG_MWAVE=m CONFIG_RAW_DRIVER=y CONFIG_MAX_RAW_DEVS=8192 CONFIG_HANGCHECK_TIMER=m +CONFIG_XILLYBUS=m +CONFIG_XILLYBUS_PCIE=m +# CONFIG_XILLYBUS_OF is not set CONFIG_MEDIA_USB_SUPPORT=y CONFIG_MEDIA_PCI_SUPPORT=y @@ -3342,6 +3438,10 @@ CONFIG_VIDEO_CX231XX=m CONFIG_VIDEO_CX231XX_ALSA=m CONFIG_VIDEO_CX231XX_DVB=m CONFIG_VIDEO_CX231XX_RC=y +CONFIG_VIDEO_GO7007=m +CONFIG_VIDEO_GO7007_USB=m +CONFIG_VIDEO_GO7007_LOADER=m +CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m CONFIG_VIDEO_HEXIUM_ORION=m CONFIG_VIDEO_HEXIUM_GEMINI=m CONFIG_VIDEO_IVTV=m @@ -3354,6 +3454,7 @@ CONFIG_VIDEO_SAA6588=m CONFIG_VIDEO_SAA7134=m CONFIG_VIDEO_SAA7134_ALSA=m CONFIG_VIDEO_SAA7134_DVB=m +CONFIG_VIDEO_SAA7134_GO7007=m CONFIG_VIDEO_SAA7134_RC=y CONFIG_VIDEO_SOLO6X10=m CONFIG_VIDEO_USBVISION=m @@ -3735,7 +3836,6 @@ CONFIG_SND_LX6464ES=m CONFIG_SND_HDA_INTEL=y CONFIG_SND_HDA_INPUT_BEEP=y CONFIG_SND_HDA_INPUT_BEEP_MODE=0 -CONFIG_SND_HDA_INPUT_JACK=y CONFIG_SND_HDA_PATCH_LOADER=y CONFIG_SND_HDA_HWDEP=y CONFIG_SND_HDA_CODEC_REALTEK=y @@ -3810,7 +3910,6 @@ CONFIG_SND_USB_VARIAX=m CONFIG_SND_FIREWIRE=y CONFIG_SND_ISIGHT=m -CONFIG_SND_SCS1X=m CONFIG_SND_DICE=m CONFIG_SND_OXFW=m CONFIG_SND_FIREWORKS=m @@ -4000,6 +4099,7 @@ CONFIG_HID_APPLEIR=m CONFIG_HID_LENOVO=m CONFIG_HID_CORSAIR=m CONFIG_HID_GFRM=m +CONFIG_HID_CMEDIA=m # # USB Imaging devices @@ -4223,10 +4323,8 @@ CONFIG_USB_ULPI_BUS=m # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set # CONFIG_PHY_TUSB1210 is not set -# CONFIG_AM335X_PHY_USB is not set # CONFIG_SAMSUNG_USBPHY is not set # CONFIG_BCM_KONA_USB2_PHY is not set -# CONFIG_USB_RCAR_PHY is not set CONFIG_USB_ATM=m CONFIG_USB_CXACRU=m # CONFIG_USB_C67X00_HCD is not set @@ -4235,6 +4333,7 @@ CONFIG_USB_EMI26=m CONFIG_USB_FTDI_ELAN=m # CONFIG_USB_GADGET is not set # CONFIG_USB_DWC3 is not set +# CONFIG_USB_DWC3_OF_SIMPLE is not set # CONFIG_USB_GADGETFS is not set # CONFIG_USB_OXU210HP_HCD is not set CONFIG_USB_IOWARRIOR=m @@ -4266,7 +4365,7 @@ CONFIG_USB_STKWEBCAM=m # CONFIG_USB_TEST is not set # CONFIG_USB_EHSET_TEST_FIXTURE is not set CONFIG_USB_TRANCEVIBRATOR=m -CONFIG_USB_U132_HCD=m +# CONFIG_USB_U132_HCD is not set CONFIG_USB_UEAGLEATM=m CONFIG_USB_XUSBATM=m @@ -4346,6 +4445,8 @@ CONFIG_MFD_VIPERBOARD=m # CONFIG_MFD_CROS_EC is not set # CONFIG_MFD_SI476X_CORE is not set # CONFIG_MFD_TPS65912 is not set +# CONFIG_MFD_TPS65912_SPI is not set +# CONFIG_MFD_TPS65912_I2C is not set # CONFIG_MFD_SYSCON is not set # CONFIG_MFD_DA9063 is not set # CONFIG_MFD_DLN2 is not set @@ -4355,7 +4456,6 @@ CONFIG_MFD_VIPERBOARD=m # CONFIG_MFD_TPS65218 is not set # CONFIG_MFD_WM831X_SPI is not set # CONFIG_MFD_ARIZONA_SPI is not set -# CONFIG_MFD_TPS65912_SPI is not set # CONFIG_MFD_MC13XXX_SPI is not set # CONFIG_MFD_DA9052_SPI is not set # CONFIG_MFD_MENF21BMC is not set @@ -4370,12 +4470,23 @@ CONFIG_MFD_VIPERBOARD=m # CONFIG_EZX_PCAP is not set # CONFIG_INTEL_SOC_PMIC is not set # CONFIG_MFD_ATMEL_FLEXCOM is not set +# CONFIG_TS4800_IRQ is not set +# CONFIG_MFD_ACT8945A is not set +# CONFIG_MFD_AXP20X_I2C is not set +# CONFIG_MFD_AXP20X_RSB is not set +# CONFIG_MFD_88PM800 is not set +# CONFIG_MFD_88PM805 is not set +# CONFIG_MFD_MAX77686 is not set +# CONFIG_MFD_MAX8907 is not set +# CONFIG_MFD_TPS65086 is not set # # File systems # CONFIG_MISC_FILESYSTEMS=y +# CONFIG_FS_ENCRYPTION is not set + # ext4 is used for ext2 and ext3 filesystems # CONFIG_EXT2_FS is not set # CONFIG_EXT3_FS is not set @@ -4410,6 +4521,7 @@ CONFIG_QUOTA_NETLINK_INTERFACE=y # CONFIG_QFMT_V1 is not set CONFIG_QFMT_V2=y CONFIG_QUOTACTL=y +# CONFIG_MANDATORY_FILE_LOCKING is not set CONFIG_DNOTIFY=y # Autofsv3 is obsolete. # systemd is dependant upon AUTOFS, so build it in. @@ -4452,6 +4564,7 @@ CONFIG_MSDOS_FS=m CONFIG_VFAT_FS=m CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="ascii" +# CONFIG_FAT_DEFAULT_UTF8 is not set # CONFIG_NTFS_FS is not set # @@ -4471,6 +4584,7 @@ CONFIG_DEBUG_FS=y # # Miscellaneous filesystems # +CONFIG_ORANGEFS_FS=m # CONFIG_ADFS_FS is not set CONFIG_AFFS_FS=m CONFIG_ECRYPT_FS=m @@ -4537,6 +4651,8 @@ CONFIG_NFSD_V3=y CONFIG_NFSD_V3_ACL=y CONFIG_NFSD_V4=y CONFIG_NFSD_PNFS=y +CONFIG_NFSD_BLOCKLAYOUT=y +CONFIG_NFSD_SCSILAYOUT=y CONFIG_NFSD_V4_SECURITY_LABEL=y CONFIG_NFS_FSCACHE=y # CONFIG_NFS_USE_LEGACY_DNS is not set @@ -4690,8 +4806,7 @@ CONFIG_NLS_ASCII=y # Profiling support # CONFIG_PROFILING=y -CONFIG_OPROFILE=m -CONFIG_OPROFILE_EVENT_MULTIPLEX=y +# CONFIG_OPROFILE is not set # # Kernel hacking @@ -4706,14 +4821,15 @@ CONFIG_DEBUG_INFO_VTA=y # CONFIG_DEBUG_INFO_SPLIT is not set # CONFIG_DEBUG_INFO_DWARF4 is not set CONFIG_FRAME_POINTER=y +CONFIG_STACK_VALIDATION=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set # CONFIG_DEBUG_DRIVER is not set CONFIG_HEADERS_CHECK=y # CONFIG_LKDTM is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_NOTIFIER_ERROR_INJECTION is not set # CONFIG_READABLE_ASM is not set -# CONFIG_RT_MUTEX_TESTER is not set # CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set # CONFIG_DEBUG_LOCKDEP is not set # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set @@ -4727,6 +4843,10 @@ CONFIG_HEADERS_CHECK=y # This breaks booting until the module patches are in-tree # CONFIG_DEBUG_KOBJECT_RELEASE is not set # +# This just changes a default enable with workqueue.debug_force_rr_cpu +# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set +# +# CONFIG_KCOV is not set # # These debug options are deliberatly left on (even in 'make release' kernels). # They aren't that much of a performance impact, and the value @@ -4764,6 +4884,7 @@ CONFIG_LATENCYTOP=y # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set CONFIG_EARLY_PRINTK_DBGP=y # CONFIG_PAGE_POISONING is not set +# CONFIG_DEBUG_PAGE_REF is not set CONFIG_CRASH=m CONFIG_CRASH_DUMP=y # CONFIG_GCOV_KERNEL is not set @@ -4775,6 +4896,10 @@ CONFIG_KGDB_LOW_LEVEL_TRAP=y # CONFIG_KGDB_TESTS_ON_BOOT is not set # CONFIG_GDB_SCRIPTS is not set +# CONFIG_UBSAN is not set +# CONFIG_UBSAN_ALIGNMENT is not set +# CONFIG_UBSAN_SANITIZE_ALL is not set + # # Security options @@ -4797,13 +4922,13 @@ CONFIG_SECURITY_SELINUX_AVC_STATS=y # CONFIG_SECURITY_TOMOYO is not set # CONFIG_SECURITY_APPARMOR is not set CONFIG_SECURITY_YAMA=y -CONFIG_SECURITY_YAMA_STACKED=y CONFIG_AUDIT=y CONFIG_AUDITSYSCALL=y # http://lists.fedoraproject.org/pipermail/kernel/2013-February/004125.html CONFIG_SECCOMP=y CONFIG_STRICT_DEVMEM=y +CONFIG_IO_STRICT_DEVMEM=y # @@ -4912,7 +5037,6 @@ CONFIG_CRC8=m CONFIG_CORDIC=m # CONFIG_DDR is not set -CONFIG_CRYPTO_ZLIB=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=m @@ -4995,7 +5119,6 @@ CONFIG_CGROUP_SCHED=y CONFIG_MEMCG=y CONFIG_MEMCG_SWAP=y CONFIG_MEMCG_SWAP_ENABLED=y -CONFIG_MEMCG_KMEM=y # CONFIG_CGROUP_HUGETLB is not set CONFIG_CGROUP_PERF=y CONFIG_CGROUP_NET_PRIO=y @@ -5103,7 +5226,6 @@ CONFIG_SND_SIMPLE_CARD=m CONFIG_SND_DESIGNWARE_I2S=m CONFIG_SND_SOC_ALL_CODECS=m CONFIG_SND_SOC_DMIC=m -CONFIG_SND_SOC_HDMI_CODEC=m CONFIG_SND_SOC_SPDIF=m CONFIG_SND_DMAENGINE_PCM=m CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y @@ -5119,9 +5241,13 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_CS4271 is not set # CONFIG_SND_SOC_CS42XX8_I2C is not set # CONFIG_SND_SOC_PCM1681 is not set -# CONFIG_SND_SOC_PCM1792A is not set +# CONFIG_SND_SOC_PCM179X is not set +# CONFIG_SND_SOC_PCM3168A_I2C is not set +# CONFIG_SND_SOC_PCM3168A_SPI is not set # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_PCM179X_I2C is not set +# CONFIG_SND_SOC_PCM179X_SPI is not set # CONFIG_SND_SOC_QCOM is not set # CONFIG_SND_SOC_SGTL5000 is not set # CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set @@ -5144,6 +5270,7 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_WM8804_SPI is not set # CONFIG_SND_SOC_WM8903 is not set # CONFIG_SND_SOC_WM8962 is not set +# CONFIG_SND_SOC_WM8974 is not set # CONFIG_SND_SOC_TPA6130A2 is not set # CONFIG_SND_SOC_FSL_ASRC is not set # CONFIG_SND_SOC_FSL_ESAI is not set @@ -5171,6 +5298,7 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_CS42L51_I2C is not set # CONFIG_SND_SOC_CS4271_I2C is not set # CONFIG_SND_SOC_CS4271_SPI is not set +# CONFIG_SND_SOC_RT5616 is not set # CONFIG_SND_SOC_RT5631 is not set # CONFIG_SND_SOC_TFA9879 is not set # CONFIG_SND_SOC_TLV320AIC23_I2C is not set @@ -5181,7 +5309,9 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_GTM601 is not set # CONFIG_SND_SOC_STI_SAS is not set -# +# CONFIG_SND_SOC_INNO_RK3036 is not set +# CONFIG_SND_SOC_IMG is not set +CONFIG_SND_SOC_AMD_ACP=m CONFIG_BALLOON_COMPACTION=y CONFIG_COMPACTION=y @@ -5210,7 +5340,6 @@ CONFIG_LEDS_DELL_NETBOOKS=m # CONFIG_LEDS_LP8501 is not set # CONFIG_LEDS_LP8860 is not set # CONFIG_LEDS_PCA963X is not set -# CONFIG_LEDS_PM8941_WLED is not set # CONFIG_LEDS_SYSCON is not set CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=m @@ -5226,6 +5355,7 @@ CONFIG_LEDS_CLEVO_MAIL=m CONFIG_LEDS_INTEL_SS4200=m CONFIG_LEDS_LM3530=m # CONFIG_LEDS_LM3642 is not set +# CONFIG_LEDS_IS31FL32XX is not set CONFIG_LEDS_BLINKM=m CONFIG_LEDS_LP3944=m CONFIG_LEDS_LT3593=m @@ -5256,6 +5386,8 @@ CONFIG_ASYNC_TX_DMA=y # CONFIG_HSU_DMA_PCI is not set # CONFIG_XGENE_DMA is not set # CONFIG_INTEL_IDMA64 is not set +# CONFIG_QCOM_HIDMA_MGMT is not set +# CONFIG_QCOM_HIDMA is not set CONFIG_UNUSED_SYMBOLS=y @@ -5395,7 +5527,8 @@ CONFIG_INPUT_GP2A=m # CONFIG_INTEL_MENLOW is not set CONFIG_ENCLOSURE_SERVICES=m -CONFIG_IPWIRELESS=m +# Disable temporarily while I (pbr) work out why this filters properly when build with rpmbuild but not in koji +# CONFIG_IPWIRELESS is not set CONFIG_MEMSTICK=m # CONFIG_MEMSTICK_DEBUG is not set @@ -5430,7 +5563,7 @@ CONFIG_NET_DSA=m CONFIG_NET_DSA_HWMON=y CONFIG_NET_DSA_MV88E6060=m CONFIG_NET_DSA_MV88E6131=m -CONFIG_NET_DSA_MV88E6123_61_65=m +CONFIG_NET_DSA_MV88E6123=m CONFIG_NET_DSA_MV88E6171=m CONFIG_NET_DSA_MV88E6352=m CONFIG_NET_DSA_BCM_SF2=m @@ -5472,7 +5605,6 @@ CONFIG_STAGING_MEDIA=y # CONFIG_VIDEO_DT3155 is not set # CONFIG_TI_ST is not set # CONFIG_FB_XGI is not set -# CONFIG_VIDEO_GO7007 is not set # CONFIG_I2C_BCM2048 is not set # CONFIG_DT3155 is not set # CONFIG_PRISM2_USB is not set @@ -5498,9 +5630,7 @@ CONFIG_R8723AU=m # Jes Sorensen maintains this (rhbz 1100162) # CONFIG_SOLO6X10 is not set # CONFIG_LTE_GDM724X is not set CONFIG_R8712U=m # Larry Finger maintains this (rhbz 699618) -# CONFIG_FT1000 is not set # CONFIG_SPEAKUP is not set -# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set CONFIG_ALTERA_STAPL=m # CONFIG_DVB_CXD2099 is not set # CONFIG_DVB_RTL2832_SDR is not set @@ -5511,11 +5641,8 @@ CONFIG_USBIP_HOST=m # CONFIG_USBIP_DEBUG is not set # CONFIG_INTEL_MEI is not set # CONFIG_VT6655 is not set -# CONFIG_USB_WPAN_HCD is not set -# CONFIG_WIMAX_GDM72XX is not set # CONFIG_IPACK_BUS is not set # CONFIG_LUSTRE_FS is not set -# CONFIG_XILLYBUS is not set # CONFIG_DGAP is not set # CONFIG_DGNC is not set # CONFIG_RTS5208 is not set @@ -5525,11 +5652,12 @@ CONFIG_USBIP_HOST=m # CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set # CONFIG_DVB_MN88472 is not set # CONFIG_DVB_MN88473 is not set -# CONFIG_FB_SM7XX is not set # CONFIG_FB_TFT is not set # CONFIG_FB_SM750 is not set # CONFIG_STAGING_RDMA is not set -# CONFIG_WILC1000_DRIVER is not set +# CONFIG_WILC1000_SDIO is not set +# CONFIG_WILC1000_SPI is not set +# CONFIG_LNET is not set # END OF STAGING # @@ -5553,7 +5681,6 @@ CONFIG_LSM_MMAP_MIN_ADDR=65536 CONFIG_STRIP_ASM_SYMS=y -# CONFIG_RCU_FANOUT_EXACT is not set CONFIG_RCU_FAST_NO_HZ=y CONFIG_RCU_NOCB_CPU=y CONFIG_RCU_NOCB_CPU_ALL=y @@ -5565,9 +5692,7 @@ CONFIG_RCU_TORTURE_TEST_SLOW_INIT_DELAY=3 # CONFIG_RCU_TORTURE_TEST_SLOW_CLEANUP is not set # CONFIG_RCU_TRACE is not set # CONFIG_RCU_EQS_DEBUG is not set -# CONFIG_RCU_CPU_STALL_INFO is not set # CONFIG_TASKS_RCU is not set -# CONFIG_RCU_USER_QS is not set CONFIG_RCU_KTHREAD_PRIO=0 CONFIG_SPARSE_RCU_POINTER=y # CONFIG_RCU_EXPERT is not set @@ -5606,7 +5731,7 @@ CONFIG_ZBUD=y CONFIG_ZSMALLOC=y # CONFIG_ZSMALLOC_STAT is not set # CONFIG_PGTABLE_MAPPING is not set - +# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set # CONFIG_IDLE_PAGE_TRACKING is not set # CONFIG_MDIO_GPIO is not set @@ -5627,7 +5752,6 @@ CONFIG_GPIO_SYSFS=y # CONFIG_GPIO_CS5535 is not set # CONFIG_GPIO_ADNP is not set # CONFIG_GPIO_ADP5588 is not set -# CONFIG_GPIO_IT8761E is not set # CONFIG SB105x is not set # CONFIG_GPIO_SYSCON is not set # CONFIG_GPIO_TS5500 is not set @@ -5660,6 +5784,13 @@ CONFIG_GPIO_VIPERBOARD=m # CONFIG_GPIO_AMDPT is not set # CONFIG_GPIO_104_IDIO_16 is not set # CONFIG_GPIO_IT87 is not set +# CONFIG_GPIO_TPIC2810 is not set +# CONFIG_GPIO_MPC8XXX is not set +# CONFIG_GPIO_PISOSR is not set +# CONFIG_GPIO_TS4800 is not set +# CONFIG_GPIO_TPS65218 is not set +# CONFIG_GPIO_104_DIO_48E is not set +# CONFIG_GPIO_WS16C48 is not set # FIXME: Why? @@ -5702,12 +5833,15 @@ CONFIG_PSTORE_RAM=m # CONFIG_TEST_RHASHTABLE is not set # CONFIG_TEST_STATIC_KEYS is not set # CONFIG_TEST_PRINTF is not set +# CONFIG_TEST_BITMAP is not set # CONFIG_AVERAGE is not set # CONFIG_VMXNET3 is not set # CONFIG_SIGMA is not set +# CONFIG_GOLDFISH is not set + CONFIG_CHROME_PLATFORMS=y CONFIG_BCMA=m @@ -5761,11 +5895,23 @@ CONFIG_POWERCAP=y # CONFIG_CPUFREQ_DT is not set -# CONFIG_MODULE_SIG is not set +CONFIG_MODULE_SIG=y +CONFIG_MODULE_SIG_ALL=y +# CONFIG_MODULE_SIG_SHA1 is not set +CONFIG_MODULE_SIG_SHA256=y +# CONFIG_MODULE_SIG_FORCE is not set +CONFIG_MODULE_SIG_KEY="certs/signing_key.pem" +CONFIG_SYSTEM_TRUSTED_KEYS="" +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS7_TEST_KEY is not set +CONFIG_SIGNED_PE_FILE_VERIFICATION=y +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYSTEM_BLACKLIST_KEYRING=y +# CONFIG_MODULE_SIG_UEFI is not set +# CONFIG_EFI_SIGNATURE_LIST_PARSER is not set # FIXME: Revisit this to see if we can use it instead of the spec file stuff # CONFIG_MODULE_COMPRESS is not set -# CONFIG_SYSTEM_TRUSTED_KEYRING is not set -# CONFIG_SYSTEM_BLACKLIST_KEYRING is not set # CONFIG_RTC_DRV_EFI is not set # CONFIG_NET_XGENE is not set diff --git a/config-nodebug b/config-nodebug index 65e8accd1..5a4319a57 100644 --- a/config-nodebug +++ b/config-nodebug @@ -112,6 +112,7 @@ CONFIG_KDB_CONTINUE_CATASTROPHIC=0 # CONFIG_DETECT_HUNG_TASK is not set CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +# CONFIG_WQ_WATCHDOG is not set # CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK is not set @@ -126,4 +127,4 @@ CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF=y # CONFIG_SPI_DEBUG is not set -# CONFIG_X86_DEBUG_STATIC_CPU_HAS is not set +# CONFIG_DEBUG_VM_PGFLAGS is not set diff --git a/config-powerpc64-generic b/config-powerpc64-generic index b543cfbb6..de387d570 100644 --- a/config-powerpc64-generic +++ b/config-powerpc64-generic @@ -7,7 +7,6 @@ CONFIG_PPC_PSERIES=y # CONFIG_PPC_83xx is not set # CONFIG_PPC_86xx is not set # CONFIG_PPC_CELL is not set -# CONFIG_PPC_CELL_QPACE is not set # CONFIG_PPC_IBM_CELL_BLADE is not set # CONFIG_PPC_MAPLE is not set # CONFIG_PPC_PASEMI is not set @@ -54,12 +53,12 @@ CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y CONFIG_PPC_64K_PAGES=y CONFIG_PPC_SUBPAGE_PROT=y CONFIG_SCHED_SMT=y -# CONFIG_TUNE_CELL is not set CONFIG_MEMORY_HOTPLUG=y CONFIG_MEMORY_HOTREMOVE=y CONFIG_PPC64_SUPPORTS_MEMORY_FAILURE=y CONFIG_CGROUP_HUGETLB=y +CONFIG_MEM_SOFT_DIRTY=y CONFIG_RCU_FANOUT=64 CONFIG_RCU_FANOUT_LEAF=16 @@ -74,14 +73,12 @@ CONFIG_PSERIES_CPUIDLE=y CONFIG_HW_RANDOM_PSERIES=m CONFIG_CRYPTO_DEV_NX=y -CONFIG_CRYPTO_842=m CONFIG_CRYPTO_DEV_NX_ENCRYPT=m CONFIG_CRYPTO_DEV_NX_COMPRESS=m CONFIG_CRYPTO_DEV_NX_COMPRESS_PSERIES=m CONFIG_CRYPTO_DEV_NX_COMPRESS_POWERNV=m -CONFIG_CRYPTO_DEV_NX_COMPRESS_CRYPTO=m CONFIG_CRYPTO_DEV_VMX=y -# CONFIG_CRYPTO_DEV_VMX_ENCRYPT is not set +CONFIG_CRYPTO_DEV_VMX_ENCRYPT=m CONFIG_XZ_DEC_POWERPC=y @@ -129,7 +126,6 @@ CONFIG_CXL=m CONFIG_CXLFLASH=m CONFIG_IBMEBUS=y CONFIG_EHEA=m -CONFIG_INFINIBAND_EHCA=m CONFIG_PPC_ICSWX=y # CONFIG_PPC_ICSWX_PID is not set # CONFIG_PPC_ICSWX_USE_SIGILL is not set @@ -200,7 +196,6 @@ CONFIG_CAPI_EICON=y # CONFIG_BLK_DEV_PLATFORM is not set # Stuff which wants bus_to_virt() or virt_to_bus() -# CONFIG_BLK_CPQ_DA is not set # CONFIG_VIDEO_ZORAN is not set # CONFIG_ATM_HORIZON is not set # CONFIG_ATM_FIRESTREAM is not set @@ -222,7 +217,6 @@ CONFIG_USB_OHCI_HCD_PPC_OF_LE=y # CONFIG_MACINTOSH_DRIVERS is not set # CONFIG_EDAC_CPC925 is not set -CONFIG_SPU_FS_64K_LS=y CONFIG_EDAC=y CONFIG_EDAC_MM_EDAC=m @@ -291,7 +285,6 @@ CONFIG_SIMPLE_GPIO=y # CONFIG_PS3_VRAM is not set CONFIG_MDIO_GPIO=m CONFIG_SERIAL_OF_PLATFORM=m -# CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL is not set # CONFIG_DEBUG_GPIO is not set CONFIG_GPIO_PCA953X=m CONFIG_GPIO_PCF857X=m @@ -352,6 +345,7 @@ CONFIG_I2C_MPC=m # CONFIG_IBM_EMAC is not set # CONFIG_NET_VENDOR_PASEMI is not set # CONFIG_NET_VENDOR_TOSHIBA is not set +CONFIG_IBMVNIC=m CONFIG_MDIO_OCTEON=m diff --git a/config-powerpc64le b/config-powerpc64le index 7d9f3fc3a..ec80e8bf4 100644 --- a/config-powerpc64le +++ b/config-powerpc64le @@ -2,5 +2,7 @@ CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_POWER7_CPU=y +CONFIG_DISABLE_MPROFILE_KERNEL=y + # https://fedoraproject.org/wiki/Features/Checkpoint_Restore CONFIG_CHECKPOINT_RESTORE=y diff --git a/config-s390x b/config-s390x index a41d95ac4..d1ed636d9 100644 --- a/config-s390x +++ b/config-s390x @@ -62,9 +62,9 @@ CONFIG_SCLP_TTY=y CONFIG_SCLP_CONSOLE=y CONFIG_SCLP_VT220_TTY=y CONFIG_SCLP_VT220_CONSOLE=y -CONFIG_SCLP_CPI=m CONFIG_SCLP_ASYNC=m CONFIG_SCLP_ASYNC_ID="000000000" +CONFIG_SCLP_OFB=y CONFIG_S390_TAPE=m CONFIG_S390_TAPE_3590=m diff --git a/config-x86-32-generic b/config-x86-32-generic index 865fb9004..ddc9f3047 100644 --- a/config-x86-32-generic +++ b/config-x86-32-generic @@ -40,6 +40,7 @@ CONFIG_HIGHMEM4G=y # CONFIG_HIGHMEM64G is not set CONFIG_HIGHMEM=y CONFIG_HIGHPTE=y +CONFIG_ZONE_DMA=y # CONFIG_MATH_EMULATION is not set @@ -81,7 +82,6 @@ CONFIG_X86_LONGRUN=y # e_powersaver is dangerous # CONFIG_X86_E_POWERSAVER is not set -CONFIG_X86_HT=y # CONFIG_4KSTACKS is not set @@ -123,7 +123,6 @@ CONFIG_CRYPTO_TWOFISH_586=m CONFIG_VIDEO_CAFE_CCIC=m -CONFIG_XEN_MAX_DOMAIN_MEMORY=8 CONFIG_MTD_NAND_CAFE=m @@ -184,13 +183,6 @@ CONFIG_MFD_CS5535=m # I2O enabled only for 32-bit x86, disabled for PAE kernel CONFIG_I2O=m -CONFIG_I2O_BLOCK=m -CONFIG_I2O_SCSI=m -CONFIG_I2O_PROC=m -CONFIG_I2O_CONFIG=y -CONFIG_I2O_EXT_ADAPTEC=y -CONFIG_I2O_CONFIG_OLD_IOCTL=y -CONFIG_I2O_BUS=m CONFIG_INPUT_PWM_BEEPER=m CONFIG_BACKLIGHT_PWM=m @@ -219,4 +211,5 @@ CONFIG_OF=y # CONFIG_COMMON_CLK_SI570 is not set # CONFIG_COMMON_CLK_QCOM is not set # CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set +# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set # CONFIG_KEYBOARD_BCM is not set diff --git a/config-x86-generic b/config-x86-generic index 646378bb7..06ddcd1a0 100644 --- a/config-x86-generic +++ b/config-x86-generic @@ -13,11 +13,10 @@ CONFIG_HPET_TIMER=y CONFIG_I8K=m CONFIG_SONYPI_COMPAT=y CONFIG_MICROCODE=y -CONFIG_MICROCODE_EARLY=y CONFIG_MICROCODE_INTEL=y -CONFIG_MICROCODE_INTEL_EARLY=y CONFIG_MICROCODE_AMD=y -CONFIG_MICROCODE_AMD_EARLY=y + +CONFIG_PERF_EVENTS_AMD_POWER=m CONFIG_X86_MSR=y CONFIG_X86_CPUID=y @@ -71,9 +70,7 @@ CONFIG_X86_MPPARSE=y CONFIG_MMIOTRACE=y # CONFIG_MMIOTRACE_TEST is not set # CONFIG_DEBUG_PER_CPU_MAPS is not set -CONFIG_DEBUG_RODATA=y -# Generating too many warnings while waiting for fixes -# CONFIG_DEBUG_WX is not set +CONFIG_DEBUG_WX=y CONFIG_DEBUG_STACKOVERFLOW=y CONFIG_ACPI=y @@ -139,11 +136,16 @@ CONFIG_CRYPTO_DEV_CCP_DD=m CONFIG_CRYPTO_DEV_CCP_CRYPTO=m CONFIG_CRYPTO_DEV_QAT_DH895xCC=m CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=m +CONFIG_CRYPTO_DEV_QAT_C3XXX=m +CONFIG_CRYPTO_DEV_QAT_C62X=m +CONFIG_CRYPTO_DEV_QAT_C3XXXVF=m +CONFIG_CRYPTO_DEV_QAT_C62XVF=m CONFIG_GENERIC_ISA_DMA=y CONFIG_PCI_MMCONFIG=y CONFIG_PCI_BIOS=y +CONFIG_VMD=m CONFIG_HOTPLUG_PCI_COMPAQ=m # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set @@ -176,6 +178,7 @@ CONFIG_I2C_VIA=m CONFIG_I2C_VIAPRO=m CONFIG_I2C_DESIGNWARE_CORE=m CONFIG_I2C_DESIGNWARE_PLATFORM=m +CONFIG_I2C_DESIGNWARE_BAYTRAIL=y #rhbz 997149 # CONFIG_DELL_RBU is not set @@ -202,7 +205,6 @@ CONFIG_EDAC_I7300=m CONFIG_EDAC_I7CORE=m CONFIG_EDAC_R82600=m CONFIG_EDAC_X38=m -CONFIG_EDAC_MCE_INJ=m CONFIG_EDAC_DECODE_MCE=m CONFIG_EDAC_LEGACY_SYSFS=y CONFIG_EDAC_IE31200=m @@ -222,7 +224,9 @@ CONFIG_X86_PLATFORM_DEVICES=y CONFIG_AMILO_RFKILL=m CONFIG_ASUS_LAPTOP=m +CONFIG_ASUS_WIRELESS=m CONFIG_COMPAL_LAPTOP=m +CONFIG_DELL_SMBIOS=m CONFIG_DELL_LAPTOP=m CONFIG_DELL_RBTN=m CONFIG_CHROMEOS_LAPTOP=m @@ -232,6 +236,7 @@ CONFIG_FUJITSU_TABLET=m CONFIG_FUJITSU_LAPTOP=m # CONFIG_FUJITSU_LAPTOP_DEBUG is not set CONFIG_IDEAPAD_LAPTOP=m +CONFIG_INTEL_HID_EVENT=m CONFIG_MSI_LAPTOP=m CONFIG_PANASONIC_LAPTOP=m CONFIG_SAMSUNG_LAPTOP=m @@ -312,18 +317,18 @@ CONFIG_INPUT_XEN_KBDDEV_FRONTEND=m CONFIG_XEN_SELFBALLOONING=y CONFIG_XEN_PCIDEV_BACKEND=m CONFIG_XEN_ACPI_PROCESSOR=m -# CONFIG_XEN_SCSI_FRONTEND is not set -# CONFIG_XEN_SCSI_BACKEND is not set +CONFIG_XEN_SCSI_FRONTEND=m +CONFIG_XEN_SCSI_BACKEND=m CONFIG_XEN_SYMS=y CONFIG_SPI=y CONFIG_SPI_MASTER=y CONFIG_SPI_PXA2XX=m -# CONFIG_CAN_MCP251X is not set # CONFIG_SPI_CADENCE is not set # CONFIG_SPI_ZYNQMP_GQSPI is not set # CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set # CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set CONFIG_MTD_ESB2ROM=m CONFIG_MTD_CK804XROM=m @@ -413,6 +418,7 @@ CONFIG_LPC_ICH=m CONFIG_GPIO_ICH=m # CONFIG_GPIO_LYNXPOINT is not set # CONFIG_GPIO_F7188X is not set +# CONFIG_GPIO_104_IDI_48 is not set # These should all go away with IC2_ACPI is fixed # CONFIG_MFD_AS3711 is not set @@ -474,6 +480,7 @@ CONFIG_CRYPTO_CRC32_PCLMUL=m CONFIG_HP_ACCEL=m CONFIG_SURFACE_PRO3_BUTTON=m +CONFIG_INTEL_PUNIT_IPC=m # CONFIG_RAPIDIO is not set @@ -481,7 +488,7 @@ CONFIG_SCHED_SMT=y CONFIG_CC_STACKPROTECTOR=y CONFIG_CC_STACKPROTECTOR_STRONG=y CONFIG_RELOCATABLE=y -# CONFIG_RANDOMIZE_BASE is not set # revisit this +CONFIG_RANDOMIZE_BASE=y CONFIG_HYPERV=m CONFIG_HYPERV_UTILS=m @@ -491,6 +498,8 @@ CONFIG_HYPERV_STORAGE=m CONFIG_HYPERV_BALLOON=m CONFIG_FB_HYPERV=m CONFIG_HYPERV_KEYBOARD=m +# This is x86_64 only, but we'll lump it here anyway +CONFIG_PCI_HYPERV=m # Depends on HOTPLUG_PCI_PCIE CONFIG_BLK_DEV_PCIESSD_MTIP32XX=m @@ -504,6 +513,7 @@ CONFIG_RCU_FANOUT_LEAF=16 CONFIG_INTEL_MEI=m CONFIG_INTEL_MEI_ME=m CONFIG_INTEL_MEI_TXE=m +CONFIG_INTEL_MEI_WDT=m CONFIG_NFC_MEI_PHY=m CONFIG_NFC_PN544_MEI=m @@ -519,6 +529,7 @@ CONFIG_X86_INTEL_LPSS=y CONFIG_IDMA64=m # CONFIG_X86_AMD_PLATFORM_DEVICE is not set +# CONFIG_X86_INTEL_MID is not set # CONFIG_MFD_INTEL_QUARK_I2C_GPIO is not set CONFIG_MFD_INTEL_LPSS_ACPI=m @@ -536,6 +547,9 @@ CONFIG_PINCTRL_CHERRYVIEW=y CONFIG_PINCTRL_SUNRISEPOINT=m CONFIG_PINCTRL_BROXTON=m +# I have no idea why this is x86-specific +CONFIG_E1000E_HWTS=y + #baytrail/cherrytrail stuff CONFIG_KEYBOARD_GPIO=m CONFIG_INPUT_SOC_BUTTON_ARRAY=m @@ -545,15 +559,19 @@ CONFIG_SND_SOC_INTEL_HASWELL_MACH=m CONFIG_SND_SOC_INTEL_BROADWELL_MACH=m CONFIG_SND_SOC_INTEL_BAYTRAIL=m CONFIG_SND_SOC_INTEL_BYT_RT5640_MACH=m +CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH=m CONFIG_SND_SOC_INTEL_BYT_MAX98090_MACH=m CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH=m CONFIG_SND_SOC_INTEL_CHT_BSW_RT5672_MACH=m CONFIG_SND_SOC_INTEL_CHT_BSW_RT5645_MACH=m CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH=m CONFIG_SND_SOC_INTEL_SKL_RT286_MACH=m +CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH=m +CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH=m CONFIG_SND_SOC_AC97_CODEC=m # CONFIG_SND_SOC_TAS571X is not set # CONFIG_SND_SUN4I_CODEC is not set +# CONFIG_SND_SUN4I_SPDIF is not set # CONFIG_INTEL_POWERCLAMP is not set CONFIG_X86_PKG_TEMP_THERMAL=m @@ -569,18 +587,7 @@ CONFIG_MOUSE_PS2_VMMOUSE=y CONFIG_XZ_DEC_X86=y CONFIG_MPILIB=y -CONFIG_PKCS7_MESSAGE_PARSER=y -# CONFIG_PKCS7_TEST_KEY is not set -CONFIG_SIGNED_PE_FILE_VERIFICATION=y -CONFIG_SYSTEM_TRUSTED_KEYRING=y -CONFIG_SYSTEM_BLACKLIST_KEYRING=y -CONFIG_MODULE_SIG=y -CONFIG_MODULE_SIG_ALL=y -# CONFIG_MODULE_SIG_SHA1 is not set -CONFIG_MODULE_SIG_SHA256=y -# CONFIG_MODULE_SIG_FORCE is not set -CONFIG_MODULE_SIG_KEY="certs/signing_key.pem" -CONFIG_SYSTEM_TRUSTED_KEYS="" + CONFIG_EFI_SECURE_BOOT_SIG_ENFORCE=y CONFIG_EFI_SIGNATURE_LIST_PARSER=y diff --git a/config-x86_64-generic b/config-x86_64-generic index 9d13391fc..b6037709c 100644 --- a/config-x86_64-generic +++ b/config-x86_64-generic @@ -26,6 +26,8 @@ CONFIG_PHYSICAL_ALIGN=0x1000000 # https://lists.fedoraproject.org/pipermail/kernel/2013-December/004753.html CONFIG_DEFAULT_MMAP_MIN_ADDR=65536 +CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS=y + # enable the 32-bit entry point for Baytrail CONFIG_EFI_MIXED=y @@ -63,6 +65,9 @@ CONFIG_INTEL_MIC_BUS=m CONFIG_INTEL_MIC_X100_DMA=m CONFIG_MIC_COSM=m +CONFIG_VOP_BUS=m +CONFIG_VOP=m + # SHPC has half-arsed PCI probing, which makes it load on too many systems CONFIG_HOTPLUG_PCI_SHPC=m @@ -113,7 +118,7 @@ CONFIG_SPARSEMEM_VMEMMAP=y # CONFIG_MOVABLE_NODE is not set CONFIG_MEMORY_HOTPLUG=y # CONFIG_ARCH_MEMORY_PROBE is not set -# CONFIG_MEMORY_HOTREMOVE is not set +CONFIG_MEMORY_HOTREMOVE=y # CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set # CONFIG_BLK_DEV_CMD640 is not set @@ -130,7 +135,6 @@ CONFIG_SGI_GRU=m # CONFIG_VIDEO_CAFE_CCIC is not set -CONFIG_XEN_MAX_DOMAIN_MEMORY=128 # CONFIG_XEN_BALLOON_MEMORY_HOTPLUG is not set CONFIG_XEN_DEV_EVTCHN=m CONFIG_XEN_SYS_HYPERVISOR=y @@ -156,7 +160,6 @@ CONFIG_X86_X2APIC=y CONFIG_SPARSE_IRQ=y CONFIG_RCU_FANOUT=64 -# CONFIG_RCU_USER_QS is not set CONFIG_INTEL_TXT=y @@ -176,14 +179,15 @@ CONFIG_THUNDERBOLT=m CONFIG_NTB=m CONFIG_NTB_NETDEV=m +CONFIG_NTB_AMD=m CONFIG_NTB_INTEL=m CONFIG_NTB_PINGPONG=m +CONFIG_NTB_PERF=m CONFIG_NTB_TOOL=m CONFIG_NTB_TRANSPORT=m # 10GigE # -CONFIG_IP1000=m CONFIG_SFC=m CONFIG_SFC_MCDI_MON=y CONFIG_SFC_SRIOV=y @@ -212,3 +216,17 @@ CONFIG_CMA=y # CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set CONFIG_CMA_AREAS=7 + +# Changes for persistent memory devices +# ZONE_DMA and ZONE_DEVICE can now co-exist +CONFIG_ZONE_DMA=y +CONFIG_ZONE_DEVICE=y +CONFIG_NVDIMM_PFN=y +CONFIG_ND_PFN=m + +# Staging +CONFIG_STAGING_RDMA=y +CONFIG_INFINIBAND_HFI1=m +# CONFIG_HFI1_DEBUG_SDMA_ORDER is not set +CONFIG_HFI1_VERBS_31BIT_PSN=y +# CONFIG_SDMA_VERBOSITY is not set diff --git a/dcache-Handle-escaped-paths-in-prepend_path.patch b/dcache-Handle-escaped-paths-in-prepend_path.patch deleted file mode 100644 index d5040607d..000000000 --- a/dcache-Handle-escaped-paths-in-prepend_path.patch +++ /dev/null @@ -1,65 +0,0 @@ -From c0ea161a6e7158281f64bc6d41126da43cb08f14 Mon Sep 17 00:00:00 2001 -From: "Eric W. Biederman" -Date: Sat, 15 Aug 2015 13:36:12 -0500 -Subject: [PATCH 1/2] dcache: Handle escaped paths in prepend_path - -commit cde93be45a8a90d8c264c776fab63487b5038a65 upstream. - -A rename can result in a dentry that by walking up d_parent -will never reach it's mnt_root. For lack of a better term -I call this an escaped path. - -prepend_path is called by four different functions __d_path, -d_absolute_path, d_path, and getcwd. - -__d_path only wants to see paths are connected to the root it passes -in. So __d_path needs prepend_path to return an error. - -d_absolute_path similarly wants to see paths that are connected to -some root. Escaped paths are not connected to any mnt_root so -d_absolute_path needs prepend_path to return an error greater -than 1. So escaped paths will be treated like paths on lazily -unmounted mounts. - -getcwd needs to prepend "(unreachable)" so getcwd also needs -prepend_path to return an error. - -d_path is the interesting hold out. d_path just wants to print -something, and does not care about the weird cases. Which raises -the question what should be printed? - -Given that / should result in -ENOENT I -believe it is desirable for escaped paths to be printed as empty -paths. As there are not really any meaninful path components when -considered from the perspective of a mount tree. - -So tweak prepend_path to return an empty path with an new error -code of 3 when it encounters an escaped path. - -Signed-off-by: "Eric W. Biederman" -Signed-off-by: Al Viro ---- - fs/dcache.c | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/fs/dcache.c b/fs/dcache.c -index 9b5fe503f6cb..e3b44ca75a1b 100644 ---- a/fs/dcache.c -+++ b/fs/dcache.c -@@ -2926,6 +2926,13 @@ restart: - - if (dentry == vfsmnt->mnt_root || IS_ROOT(dentry)) { - struct mount *parent = ACCESS_ONCE(mnt->mnt_parent); -+ /* Escaped? */ -+ if (dentry != vfsmnt->mnt_root) { -+ bptr = *buffer; -+ blen = *buflen; -+ error = 3; -+ break; -+ } - /* Global root? */ - if (mnt != parent) { - dentry = ACCESS_ONCE(mnt->mnt_mountpoint); --- -2.4.3 - diff --git a/disable-CONFIG_EXPERT-for-ZONE_DMA.patch b/disable-CONFIG_EXPERT-for-ZONE_DMA.patch new file mode 100644 index 000000000..784cf2035 --- /dev/null +++ b/disable-CONFIG_EXPERT-for-ZONE_DMA.patch @@ -0,0 +1,43 @@ +From 78bd7226c92c8309d1c6c1378f1224dcd591b49f Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team +Date: Fri, 22 Jan 2016 13:03:36 -0600 +Subject: [PATCH] Make ZONE_DMA not depend on CONFIG_EXPERT + +Disable the requirement on CONFIG_EXPERT for ZONE_DMA and ZONE_DEVICE so +that we can enable NVDIMM_PFN and ND_PFN + +Signed-off-by: Justin Forbes +--- + arch/x86/Kconfig | 2 +- + mm/Kconfig | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig +index 3c74b549ea9a..8a5b7b8cc425 100644 +--- a/arch/x86/Kconfig ++++ b/arch/x86/Kconfig +@@ -318,7 +318,7 @@ source "kernel/Kconfig.freezer" + menu "Processor type and features" + + config ZONE_DMA +- bool "DMA memory allocation support" if EXPERT ++ bool "DMA memory allocation support" + default y + help + DMA memory allocation support allows devices with less than 32-bit +diff --git a/mm/Kconfig b/mm/Kconfig +index 05efa6a5199e..c1a01e50c293 100644 +--- a/mm/Kconfig ++++ b/mm/Kconfig +@@ -650,7 +650,7 @@ config IDLE_PAGE_TRACKING + See Documentation/vm/idle_page_tracking.txt for more details. + + config ZONE_DEVICE +- bool "Device memory (pmem, etc...) hotplug support" if EXPERT ++ bool "Device memory (pmem, etc...) hotplug support" + depends on MEMORY_HOTPLUG + depends on MEMORY_HOTREMOVE + depends on SPARSEMEM_VMEMMAP +-- +2.5.0 + diff --git a/drm-i915-shut-up-gen8-SDE-irq-dmesg-noise-again.patch b/drm-i915-shut-up-gen8-SDE-irq-dmesg-noise-again.patch deleted file mode 100644 index cd53bf71c..000000000 --- a/drm-i915-shut-up-gen8-SDE-irq-dmesg-noise-again.patch +++ /dev/null @@ -1,68 +0,0 @@ -From 41ed5ee704b784a4fca02787311d59c243563013 Mon Sep 17 00:00:00 2001 -From: Jani Nikula -Date: Thu, 7 Jan 2016 10:29:10 +0200 -Subject: [PATCH] drm/i915: shut up gen8+ SDE irq dmesg noise, again - -We still keep getting - -[ 4.249930] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)! - -This reverts - -commit 820da7ae46332fa709b171eb7ba57cbd023fa6df -Author: Jani Nikula -Date: Wed Nov 25 16:47:23 2015 +0200 - - Revert "drm/i915: shut up gen8+ SDE irq dmesg noise" - -which in itself is a revert, so this is just doing - -commit 97e5ed1111dcc5300a0f59a55248cd243937a8ab -Author: Daniel Vetter -Date: Fri Oct 23 10:56:12 2015 +0200 - - drm/i915: shut up gen8+ SDE irq dmesg noise - -all over again. I'll stop pretending I understand what's going on like I -did when I thought I'd fixed this for good in - -commit 6a39d7c986be4fd18eb019e9cdbf774ec36c9f77 -Author: Jani Nikula -Date: Wed Nov 25 16:47:22 2015 +0200 - - drm/i915: fix the SDE irq dmesg warnings properly - -Reported-by: Chris Wilson -Reference: http://mid.gmane.org/20151213124945.GA5715@nuc-i3427.alporthouse.com -Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92084 -Cc: drm-intel-fixes@lists.freedesktop.org -Fixes: 820da7ae4633 ("Revert "drm/i915: shut up gen8+ SDE irq dmesg noise"") -Signed-off-by: Jani Nikula ---- - drivers/gpu/drm/i915/i915_irq.c | 10 +++++++--- - 1 file changed, 7 insertions(+), 3 deletions(-) - -diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c -index 0d228f909dcb..0f42a2782afc 100644 ---- a/drivers/gpu/drm/i915/i915_irq.c -+++ b/drivers/gpu/drm/i915/i915_irq.c -@@ -2354,9 +2354,13 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg) - spt_irq_handler(dev, pch_iir); - else - cpt_irq_handler(dev, pch_iir); -- } else -- DRM_ERROR("The master control interrupt lied (SDE)!\n"); -- -+ } else { -+ /* -+ * Like on previous PCH there seems to be something -+ * fishy going on with forwarding PCH interrupts. -+ */ -+ DRM_DEBUG_DRIVER("The master control interrupt lied (SDE)!\n"); -+ } - } - - I915_WRITE_FW(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL); --- -2.5.0 - diff --git a/drm-vmwgfx-Allow-dropped-masters-render-node-like-ac.patch b/drm-vmwgfx-Allow-dropped-masters-render-node-like-ac.patch deleted file mode 100644 index 70204e5e9..000000000 --- a/drm-vmwgfx-Allow-dropped-masters-render-node-like-ac.patch +++ /dev/null @@ -1,60 +0,0 @@ -From a19afebb883f2a02ecf4b8d5a114ce6957a59238 Mon Sep 17 00:00:00 2001 -From: Thomas Hellstrom -Date: Wed, 26 Aug 2015 05:49:21 -0700 -Subject: [PATCH 2/2] drm/vmwgfx: Allow dropped masters render-node like access - on legacy nodes v2 - -Applications like gnome-shell may try to render after dropping master -privileges. Since the driver should now be safe against this scenario, -allow those applications to use their legacy node like a render node. - -v2: Add missing return statement. - -Signed-off-by: Thomas Hellstrom -Reviewed-by: Sinclair Yeh ---- - drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 7 ++++++- - drivers/gpu/drm/vmwgfx/vmwgfx_surface.c | 6 ++++++ - 2 files changed, 12 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c -index a4766acd0ea2..d022b509f1ac 100644 ---- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c -+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c -@@ -993,10 +993,15 @@ static struct vmw_master *vmw_master_check(struct drm_device *dev, - } - - /* -- * Check if we were previously master, but now dropped. -+ * Check if we were previously master, but now dropped. In that -+ * case, allow at least render node functionality. - */ - if (vmw_fp->locked_master) { - mutex_unlock(&dev->master_mutex); -+ -+ if (flags & DRM_RENDER_ALLOW) -+ return NULL; -+ - DRM_ERROR("Dropped master trying to access ioctl that " - "requires authentication.\n"); - return ERR_PTR(-EACCES); -diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c -index 4d0c98edeb6a..7fc3e8abd0c4 100644 ---- a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c -+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c -@@ -906,6 +906,12 @@ vmw_surface_handle_reference(struct vmw_private *dev_priv, - "surface reference.\n"); - return -EACCES; - } -+ if (ACCESS_ONCE(vmw_fpriv(file_priv)->locked_master)) { -+ DRM_ERROR("Locked master refused legacy " -+ "surface reference.\n"); -+ return -EACCES; -+ } -+ - handle = u_handle; - } - --- -2.4.3 - diff --git a/filter-aarch64.sh b/filter-aarch64.sh old mode 100755 new mode 100644 index dae47aaa3..139d1791d --- a/filter-aarch64.sh +++ b/filter-aarch64.sh @@ -9,6 +9,8 @@ # modifications to the overrides below. If something should be removed across # all arches, remove it in the default instead of per-arch. -driverdirs="atm auxdisplay bcma bluetooth fmc infiniband isdn leds media memstick message mmc mtd nfc ntb pcmcia platform power ssb staging uio uwb" +driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick message mmc mtd mwave nfc ntb pcmcia platform power ssb staging uio uwb w1" -singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user" +ethdrvs="3com adaptec arc alteon atheros broadcom cadence calxeda chelsio cisco dec dlink emulex icplus marvell micrel myricom neterion nvidia oki-semi packetengines qlogic rdc renesas sfc silan sis smsc stmicro sun tehuti ti via wiznet xircom" + +singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target" diff --git a/filter-armv7hl.sh b/filter-armv7hl.sh old mode 100755 new mode 100644 index 5803dd01f..6de77659a --- a/filter-armv7hl.sh +++ b/filter-armv7hl.sh @@ -9,6 +9,10 @@ # modifications to the overrides below. If something should be removed across # all arches, remove it in the default instead of per-arch. -driverdirs="atm auxdisplay bcma bluetooth fmc infiniband isdn media memstick message nfc ntb pcmcia platform ssb staging uio uwb" +driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn media memstick message mwave nfc ntb pcmcia platform ssb staging uio uwb w1" -singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user" +ethdrvs="3com adaptec alteon altera amd atheros broadcom cadence chelsio cisco dec dlink emulex icplus mellanox micrel myricom natsemi neterion nvidia oki-semi packetengines qlogic rdc renesas sfc silan sis sun tehuti via wiznet xircom" + +drmdrvs="amd armada bridge ast exynos i2c imx mgag200 msm omapdrm panel nouveau radeon rockchip tegra tilcdc via" + +singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target" diff --git a/filter-i686.sh b/filter-i686.sh old mode 100755 new mode 100644 index 784ab37e4..dc6f42f5a --- a/filter-i686.sh +++ b/filter-i686.sh @@ -9,6 +9,6 @@ # modifications to the overrides below. If something should be removed across # all arches, remove it in the default instead of per-arch. -driverdirs="atm auxdisplay bcma bluetooth fmc infiniband isdn leds media memstick mfd mmc mtd nfc ntb pcmcia platform power ssb staging uio uwb" +driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick mfd mmc mtd mwave nfc ntb pcmcia platform power ssb staging uio uwb w1" -singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject hid-sensor-hub hid-sensor-magn-3d hid-sensor-incl-3d hid-sensor-gyro-3d hid-sensor-iio-common hid-sensor-accel-3d hid-sensor-trigger hid-sensor-als hid-sensor-rotation target_core_user" +singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject hid-sensor-hub hid-sensor-magn-3d hid-sensor-incl-3d hid-sensor-gyro-3d hid-sensor-iio-common hid-sensor-accel-3d hid-sensor-trigger hid-sensor-als hid-sensor-rotation target_core_user sbp_target" diff --git a/filter-modules.sh b/filter-modules.sh index 31b78ce29..ef86416d1 100755 --- a/filter-modules.sh +++ b/filter-modules.sh @@ -14,25 +14,27 @@ # listed here. # Set the default dirs/modules to filter out -driverdirs="atm auxdisplay bcma bluetooth fmc iio infiniband isdn leds media memstick mfd mmc mtd nfc ntb pcmcia platform power ssb staging uio uwb" +driverdirs="atm auxdisplay bcma bluetooth firewire fmc iio infiniband isdn leds media memstick mfd mmc mtd nfc ntb pcmcia platform power ssb staging tty uio uwb w1" + +chardrvs="mwave pcmcia" netdrvs="appletalk can dsa hamradio ieee802154 irda ppp slip usb wireless" ethdrvs="3com adaptec alteon amd atheros broadcom cadence calxeda chelsio cisco dec dlink emulex icplus marvell mellanox neterion nvidia oki-semi packetengines qlogic rdc renesas sfc silan sis smsc stmicro sun tehuti ti wiznet xircom" +inputdrvs="gameport tablet touchscreen" + scsidrvs="aacraid aic7xxx aic94xx be2iscsi bfa bnx2i bnx2fc csiostor cxgbi esas2r fcoe fnic isci libsas lpfc megaraid mpt2sas mpt3sas mvsas pm8001 qla2xxx qla4xxx sym53c8xx_2 ufs" -ttydrvs="ipwireless" - -usbdrvs="atm wusbcore" +usbdrvs="atm image misc serial wusbcore" fsdrvs="affs befs coda cramfs dlm ecryptfs hfs hfsplus jfs minix ncpfs nilfs2 ocfs2 reiserfs romfs squashfs sysv ubifs udf ufs" -netprots="appletalk atm ax25 batman-adv bluetooth can dccp dsa ieee802154 irda l2tp mac80211 mac802154 netrom nfc rds rfkill rose sctp wireless" +netprots="6lowpan appletalk atm ax25 batman-adv bluetooth can dccp dsa ieee802154 irda l2tp mac80211 mac802154 mpls netrom nfc rds rfkill rose sctp wireless" -drmdrvs="ast gma500 mgag200 via nouveau" +drmdrvs="amd ast gma500 i2c i915 mgag200 nouveau radeon via " -singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject hid-sensor-hub target_core_user" +singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject hid-sensor-hub target_core_user sbp_target" # Grab the arch-specific filter list overrides source ./filter-$2.sh @@ -83,6 +85,12 @@ do filter_dir $1 drivers/net/${netdrv} done +# Filter the char drivers +for char in ${chardrvs} +do + filter_dir $1 drivers/char/${input} +done + # Filter the ethernet drivers for eth in ${ethdrvs} do @@ -95,10 +103,10 @@ do filter_dir $1 drivers/scsi/${scsi} done -# TTY -for tty in ${ttydrvs} +# Input +for input in ${inputdrvs} do - filter_dir $1 drivers/tty/${tty} + filter_dir $1 drivers/input/${input} done # USB diff --git a/filter-ppc64.sh b/filter-ppc64.sh old mode 100755 new mode 100644 index 8001e0944..e4990bbcb --- a/filter-ppc64.sh +++ b/filter-ppc64.sh @@ -9,6 +9,6 @@ # modifications to the overrides below. If something should be removed across # all arches, remove it in the default instead of per-arch. -driverdirs="atm auxdisplay bcma bluetooth fmc infiniband isdn leds media memstick message mmc mtd nfc ntb pcmcia platform power ssb staging uio uwb" +driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick message mmc mtd mwave nfc ntb pcmcia platform power ssb staging uio uwb w1" -singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user" +singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target" diff --git a/filter-ppc64le.sh b/filter-ppc64le.sh old mode 100755 new mode 100644 index c8948c94d..e44c88ec5 --- a/filter-ppc64le.sh +++ b/filter-ppc64le.sh @@ -9,6 +9,6 @@ # modifications to the overrides below. If something should be removed across # all arches, remove it in the default instead of per-arch. -driverdirs="atm auxdisplay bcma bluetooth fmc infiniband isdn leds media memstick message mmc mtd nfc ntb pcmcia platform power ssb staging uio uwb" +driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick message mmc mtd mwave nfc ntb pcmcia platform power ssb staging uio uwb w1" -singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user" +singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target" diff --git a/filter-ppc64p7.sh b/filter-ppc64p7.sh old mode 100755 new mode 100644 index 32c43a489..b499f0e69 --- a/filter-ppc64p7.sh +++ b/filter-ppc64p7.sh @@ -9,6 +9,6 @@ # modifications to the overrides below. If something should be removed across # all arches, remove it in the default instead of per-arch. -driverdirs="atm auxdisplay bcma bluetooth fmc infiniband isdn leds media memstick message mmc mtd nfc ntb pcmcia platform power ssb staging uio uwb" +driverdirs="atm auxdisplay bcma bluetooth firewire fmc infiniband isdn leds media memstick message mmc mtd mwave nfc ntb pcmcia platform power ssb staging uio uwb w1" -singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user" +singlemods="ntb_netdev iscsi_ibft iscsi_boot_sysfs megaraid pmcraid qla1280 9pnet_rdma rpcrdma hid-picolcd hid-prodikeys hwa-hc hwpoison-inject target_core_user sbp_target" diff --git a/filter-s390x.sh b/filter-s390x.sh old mode 100755 new mode 100644 diff --git a/filter-x86_64.sh b/filter-x86_64.sh old mode 100755 new mode 100644 diff --git a/fs-hugetlbfs-inode.c-fix-bugs-in-hugetlb_vmtruncate_.patch b/fs-hugetlbfs-inode.c-fix-bugs-in-hugetlb_vmtruncate_.patch deleted file mode 100644 index 90bf05310..000000000 --- a/fs-hugetlbfs-inode.c-fix-bugs-in-hugetlb_vmtruncate_.patch +++ /dev/null @@ -1,86 +0,0 @@ -From 9aacdd354d197ad64685941b36d28ea20ab88757 Mon Sep 17 00:00:00 2001 -From: Mike Kravetz -Date: Fri, 15 Jan 2016 16:57:37 -0800 -Subject: [PATCH] fs/hugetlbfs/inode.c: fix bugs in hugetlb_vmtruncate_list() - -Hillf Danton noticed bugs in the hugetlb_vmtruncate_list routine. The -argument end is of type pgoff_t. It was being converted to a vaddr -offset and passed to unmap_hugepage_range. However, end was also being -used as an argument to the vma_interval_tree_foreach controlling loop. -In addition, the conversion of end to vaddr offset was incorrect. - -hugetlb_vmtruncate_list is called as part of a file truncate or -fallocate hole punch operation. - -When truncating a hugetlbfs file, this bug could prevent some pages from -being unmapped. This is possible if there are multiple vmas mapping the -file, and there is a sufficiently sized hole between the mappings. The -size of the hole between two vmas (A,B) must be such that the starting -virtual address of B is greater than (ending virtual address of A << -PAGE_SHIFT). In this case, the pages in B would not be unmapped. If -pages are not properly unmapped during truncate, the following BUG is -hit: - - kernel BUG at fs/hugetlbfs/inode.c:428! - -In the fallocate hole punch case, this bug could prevent pages from -being unmapped as in the truncate case. However, for hole punch the -result is that unmapped pages will not be removed during the operation. -For hole punch, it is also possible that more pages than desired will be -unmapped. This unnecessary unmapping will cause page faults to -reestablish the mappings on subsequent page access. - -Fixes: 1bfad99ab (" hugetlbfs: hugetlb_vmtruncate_list() needs to take a range")Reported-by: Hillf Danton -Signed-off-by: Mike Kravetz -Cc: Hugh Dickins -Cc: Naoya Horiguchi -Cc: Davidlohr Bueso -Cc: Dave Hansen -Cc: [4.3] -Signed-off-by: Andrew Morton -Signed-off-by: Linus Torvalds ---- - fs/hugetlbfs/inode.c | 19 +++++++++++-------- - 1 file changed, 11 insertions(+), 8 deletions(-) - -diff --git a/fs/hugetlbfs/inode.c b/fs/hugetlbfs/inode.c -index bbc333b01ca3..9c07d2d754c9 100644 ---- a/fs/hugetlbfs/inode.c -+++ b/fs/hugetlbfs/inode.c -@@ -463,6 +463,7 @@ hugetlb_vmdelete_list(struct rb_root *root, pgoff_t start, pgoff_t end) - */ - vma_interval_tree_foreach(vma, root, start, end ? end : ULONG_MAX) { - unsigned long v_offset; -+ unsigned long v_end; - - /* - * Can the expression below overflow on 32-bit arches? -@@ -475,15 +476,17 @@ hugetlb_vmdelete_list(struct rb_root *root, pgoff_t start, pgoff_t end) - else - v_offset = 0; - -- if (end) { -- end = ((end - start) << PAGE_SHIFT) + -- vma->vm_start + v_offset; -- if (end > vma->vm_end) -- end = vma->vm_end; -- } else -- end = vma->vm_end; -+ if (!end) -+ v_end = vma->vm_end; -+ else { -+ v_end = ((end - vma->vm_pgoff) << PAGE_SHIFT) -+ + vma->vm_start; -+ if (v_end > vma->vm_end) -+ v_end = vma->vm_end; -+ } - -- unmap_hugepage_range(vma, vma->vm_start + v_offset, end, NULL); -+ unmap_hugepage_range(vma, vma->vm_start + v_offset, v_end, -+ NULL); - } - } - --- -2.5.0 - diff --git a/geekbox-v4-device-tree-support.patch b/geekbox-v4-device-tree-support.patch new file mode 100644 index 000000000..77c1e5c28 --- /dev/null +++ b/geekbox-v4-device-tree-support.patch @@ -0,0 +1,464 @@ +From 4d321bf15d2d5e5b1b674f2a26a1c5202090a800 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Thu, 17 Mar 2016 15:19:04 +0000 +Subject: [PATCH] geekbox v4 patchset + +--- + Documentation/devicetree/bindings/arm/rockchip.txt | 9 + + arch/arm64/boot/dts/rockchip/Makefile | 2 + + arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi | 2 +- + .../dts/rockchip/rk3368-geekbox-landingship.dts | 57 ++++ + arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts | 319 +++++++++++++++++++++ + arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 2 +- + 6 files changed, 389 insertions(+), 2 deletions(-) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-geekbox-landingship.dts + create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts + +diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt +index 078c14f..ae84f4e 100644 +--- a/Documentation/devicetree/bindings/arm/rockchip.txt ++++ b/Documentation/devicetree/bindings/arm/rockchip.txt +@@ -87,6 +87,15 @@ Rockchip platforms device tree bindings + "google,veyron-speedy-rev3", "google,veyron-speedy-rev2", + "google,veyron-speedy", "google,veyron", "rockchip,rk3288"; + ++- GeekBuying GeekBox: ++ Required root node properties: ++ - compatible = "geekbuying,geekbox", "rockchip,rk3368"; ++ ++- GeekBuying Landingship with GeekBox module: ++ Required root node properties: ++ - compatible = "geekbuying,geekbox-landingship", ++ "geekbuying,geekbox", "rockchip,rk3368"; ++ + - Rockchip RK3368 evb: + Required root node properties: + - compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368"; +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index e3f0b5f..201bcd9 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -1,4 +1,6 @@ + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox-landingship.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb + + always := $(dtb-y) +diff --git a/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi +index 8c219cc..e4ceb53 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi +@@ -48,7 +48,7 @@ + stdout-path = "serial2:115200n8"; + }; + +- memory { ++ memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3368-geekbox-landingship.dts b/arch/arm64/boot/dts/rockchip/rk3368-geekbox-landingship.dts +new file mode 100644 +index 0000000..a28ace9 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3368-geekbox-landingship.dts +@@ -0,0 +1,57 @@ ++/* ++ * Copyright (c) 2016 Andreas Färber ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++#include "rk3368-geekbox.dts" ++ ++/ { ++ model = "GeekBox on Landingship"; ++ compatible = "geekbuying,geekbox-landingship", ++ "geekbuying,geekbox", "rockchip,rk3368"; ++}; ++ ++&i2c1 { ++ status = "disabled"; ++}; ++ ++&i2c2 { ++ status = "okay"; ++}; +diff --git a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts +new file mode 100644 +index 0000000..46cdddf +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts +@@ -0,0 +1,319 @@ ++/* ++ * Copyright (c) 2016 Andreas Färber ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "rk3368.dtsi" ++#include ++ ++/ { ++ model = "GeekBox"; ++ compatible = "geekbuying,geekbox", "rockchip,rk3368"; ++ ++ chosen { ++ stdout-path = "serial2:115200n8"; ++ }; ++ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0 0x80000000>; ++ }; ++ ++ ext_gmac: gmac-clk { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "ext_gmac"; ++ #clock-cells = <0>; ++ }; ++ ++ ir: ir-receiver { ++ compatible = "gpio-ir-receiver"; ++ gpios = <&gpio3 30 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&ir_int>; ++ }; ++ ++ keys: gpio-keys { ++ compatible = "gpio-keys"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwr_key>; ++ ++ power { ++ gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; ++ label = "GPIO Power"; ++ linux,code = ; ++ wakeup-source; ++ }; ++ }; ++ ++ leds: gpio-leds { ++ compatible = "gpio-leds"; ++ ++ blue { ++ gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; ++ label = "geekbox:blue:led"; ++ default-state = "on"; ++ }; ++ ++ red { ++ gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; ++ label = "geekbox:red:led"; ++ default-state = "off"; ++ }; ++ }; ++ ++ vcc_sys: vcc-sys-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++}; ++ ++&emmc { ++ status = "okay"; ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ clock-frequency = <150000000>; ++ disable-wp; ++ keep-power-in-suspend; ++ non-removable; ++ num-slots = <1>; ++ vmmc-supply = <&vcc_io>; ++ vqmmc-supply = <&vcc18_flash>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>; ++}; ++ ++&gmac { ++ status = "okay"; ++ phy-supply = <&vcc_lan>; ++ phy-mode = "rgmii"; ++ clock_in_out = "input"; ++ assigned-clocks = <&cru SCLK_MAC>; ++ assigned-clock-parents = <&ext_gmac>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ tx_delay = <0x30>; ++ rx_delay = <0x10>; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ rk808: pmic@1b { ++ compatible = "rockchip,rk808"; ++ reg = <0x1b>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int>, <&pmic_sleep>; ++ interrupt-parent = <&gpio0>; ++ interrupts = <5 IRQ_TYPE_LEVEL_LOW>; ++ rockchip,system-power-controller; ++ vcc1-supply = <&vcc_sys>; ++ vcc2-supply = <&vcc_sys>; ++ vcc3-supply = <&vcc_sys>; ++ vcc4-supply = <&vcc_sys>; ++ vcc6-supply = <&vcc_sys>; ++ vcc7-supply = <&vcc_sys>; ++ vcc8-supply = <&vcc_io>; ++ vcc9-supply = <&vcc_sys>; ++ vcc10-supply = <&vcc_sys>; ++ vcc11-supply = <&vcc_sys>; ++ vcc12-supply = <&vcc_io>; ++ clock-output-names = "xin32k", "rk808-clkout2"; ++ #clock-cells = <1>; ++ ++ regulators { ++ vdd_cpu: DCDC_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <700000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-name = "vdd_cpu"; ++ }; ++ ++ vdd_log: DCDC_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <700000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-name = "vdd_log"; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_ddr"; ++ }; ++ ++ vcc_io: DCDC_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc_io"; ++ }; ++ ++ vcc18_flash: LDO_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc18_flash"; ++ }; ++ ++ vcc33_lcd: LDO_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc33_lcd"; ++ }; ++ ++ vdd_10: LDO_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ regulator-name = "vdd_10"; ++ }; ++ ++ vcca_18: LDO_REG4 { ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca_18"; ++ }; ++ ++ vccio_sd: LDO_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_sd"; ++ }; ++ ++ vdd10_lcd: LDO_REG6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ regulator-name = "vdd10_lcd"; ++ }; ++ ++ vcc_18: LDO_REG7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_18"; ++ }; ++ ++ vcc18_lcd: LDO_REG8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc18_lcd"; ++ }; ++ ++ vcc_sd: SWITCH_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_sd"; ++ }; ++ ++ vcc_lan: SWITCH_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_lan"; ++ }; ++ }; ++ }; ++}; ++ ++&pinctrl { ++ ir { ++ ir_int: ir-int { ++ rockchip,pins = <3 30 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ keys { ++ pwr_key: pwr-key { ++ rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_sleep: pmic-sleep { ++ rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>; ++ }; ++ ++ pmic_int: pmic-int { ++ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&tsadc { ++ status = "okay"; ++ rockchip,hw-tshut-mode = <0>; /* CRU */ ++ rockchip,hw-tshut-polarity = <1>; /* high */ ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_otg { ++ status = "okay"; ++}; ++ ++&wdt { ++ status = "okay"; ++}; +diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts +index 104cbee..9548129 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts +@@ -51,7 +51,7 @@ + stdout-path = "serial2:115200n8"; + }; + +- memory { ++ memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; +-- +2.5.0 + diff --git a/iSCSI-let-session-recovery_tmo-sysfs-writes-persist.patch b/iSCSI-let-session-recovery_tmo-sysfs-writes-persist.patch deleted file mode 100644 index 174cccb02..000000000 --- a/iSCSI-let-session-recovery_tmo-sysfs-writes-persist.patch +++ /dev/null @@ -1,89 +0,0 @@ -From 9c8108a4d3a837c51a29f28229a06d97654eaeb6 Mon Sep 17 00:00:00 2001 -From: Chris Leech -Date: Tue, 16 Jun 2015 16:07:13 -0700 -Subject: iSCSI: let session recovery_tmo sysfs writes persist across recovery - -The iSCSI session recovery_tmo setting is writeable in sysfs, but it's -also set every time a connection is established when parameters are set -from iscsid over netlink. That results in the timeout being reset to -the default value after every recovery. - -The DM multipath tools want to use the sysfs interface to lower the -default timeout when there are multiple paths to fail over. It has -caused confusion that we have a writeable sysfs value that seem to keep -resetting itself. - -This patch adds an in-kernel flag that gets set once a sysfs write -occurs, and then ignores netlink parameter setting once it's been -modified via the sysfs interface. My thinking here is that the sysfs -interface is much simpler for external tools to influence the session -timeout, but if we're going to allow it to be modified directly we -should ensure that setting is maintained. - -Signed-off-by: Chris Leech -Reviewed-by: Mike Christie -Signed-off-by: James Bottomley - -diff --git a/drivers/scsi/scsi_transport_iscsi.c b/drivers/scsi/scsi_transport_iscsi.c -index 55647aa..4c25539 100644 ---- a/drivers/scsi/scsi_transport_iscsi.c -+++ b/drivers/scsi/scsi_transport_iscsi.c -@@ -2042,6 +2042,7 @@ iscsi_alloc_session(struct Scsi_Host *shost, struct iscsi_transport *transport, - session->transport = transport; - session->creator = -1; - session->recovery_tmo = 120; -+ session->recovery_tmo_sysfs_override = false; - session->state = ISCSI_SESSION_FREE; - INIT_DELAYED_WORK(&session->recovery_work, session_recovery_timedout); - INIT_LIST_HEAD(&session->sess_list); -@@ -2786,7 +2787,8 @@ iscsi_set_param(struct iscsi_transport *transport, struct iscsi_uevent *ev) - switch (ev->u.set_param.param) { - case ISCSI_PARAM_SESS_RECOVERY_TMO: - sscanf(data, "%d", &value); -- session->recovery_tmo = value; -+ if (!session->recovery_tmo_sysfs_override) -+ session->recovery_tmo = value; - break; - default: - err = transport->set_param(conn, ev->u.set_param.param, -@@ -4049,13 +4051,15 @@ store_priv_session_##field(struct device *dev, \ - if ((session->state == ISCSI_SESSION_FREE) || \ - (session->state == ISCSI_SESSION_FAILED)) \ - return -EBUSY; \ -- if (strncmp(buf, "off", 3) == 0) \ -+ if (strncmp(buf, "off", 3) == 0) { \ - session->field = -1; \ -- else { \ -+ session->field##_sysfs_override = true; \ -+ } else { \ - val = simple_strtoul(buf, &cp, 0); \ - if (*cp != '\0' && *cp != '\n') \ - return -EINVAL; \ - session->field = val; \ -+ session->field##_sysfs_override = true; \ - } \ - return count; \ - } -@@ -4066,6 +4070,7 @@ store_priv_session_##field(struct device *dev, \ - static ISCSI_CLASS_ATTR(priv_sess, field, S_IRUGO | S_IWUSR, \ - show_priv_session_##field, \ - store_priv_session_##field) -+ - iscsi_priv_session_rw_attr(recovery_tmo, "%d"); - - static struct attribute *iscsi_session_attrs[] = { -diff --git a/include/scsi/scsi_transport_iscsi.h b/include/scsi/scsi_transport_iscsi.h -index 2555ee5..6183d20 100644 ---- a/include/scsi/scsi_transport_iscsi.h -+++ b/include/scsi/scsi_transport_iscsi.h -@@ -241,6 +241,7 @@ struct iscsi_cls_session { - - /* recovery fields */ - int recovery_tmo; -+ bool recovery_tmo_sysfs_override; - struct delayed_work recovery_work; - - unsigned int target_id; --- -cgit v0.10.2 - diff --git a/input-silence-i8042-noise.patch b/input-silence-i8042-noise.patch deleted file mode 100644 index f8651b3e9..000000000 --- a/input-silence-i8042-noise.patch +++ /dev/null @@ -1,62 +0,0 @@ -From: Peter Jones -Date: Thu, 25 Sep 2008 16:23:33 -0400 -Subject: [PATCH] input: silence i8042 noise - -Don't print an error message just because there's no i8042 chip. -Some systems, such as EFI-based Apple systems, won't necessarily have an -i8042 to initialize. We shouldn't be printing an error message in this -case, since not detecting the chip is the correct behavior. - -Bugzilla: N/A -Upstream-status: Fedora mustard ---- - drivers/base/power/main.c | 2 -- - drivers/input/serio/i8042.c | 1 - - net/can/af_can.c | 8 ++------ - 3 files changed, 2 insertions(+), 9 deletions(-) - -diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c -index 9717d5f20139..a3101d2fd936 100644 ---- a/drivers/base/power/main.c -+++ b/drivers/base/power/main.c -@@ -122,8 +122,6 @@ void device_pm_unlock(void) - */ - void device_pm_add(struct device *dev) - { -- pr_debug("PM: Adding info for %s:%s\n", -- dev->bus ? dev->bus->name : "No Bus", dev_name(dev)); - mutex_lock(&dpm_list_mtx); - if (dev->parent && dev->parent->power.is_prepared) - dev_warn(dev, "parent %s should not be sleeping\n", -diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c -index 986a71c614b0..bfb0b2280df0 100644 ---- a/drivers/input/serio/i8042.c -+++ b/drivers/input/serio/i8042.c -@@ -871,7 +871,6 @@ static int __init i8042_check_aux(void) - static int i8042_controller_check(void) - { - if (i8042_flush()) { -- pr_err("No controller found\n"); - return -ENODEV; - } - -diff --git a/net/can/af_can.c b/net/can/af_can.c -index 32d710eaf1fc..af4a20b86ee7 100644 ---- a/net/can/af_can.c -+++ b/net/can/af_can.c -@@ -155,13 +155,9 @@ static int can_create(struct net *net, struct socket *sock, int protocol, - err = request_module("can-proto-%d", protocol); - - /* -- * In case of error we only print a message but don't -- * return the error code immediately. Below we will -- * return -EPROTONOSUPPORT -+ * In case of error we but don't return the error code immediately. -+ * Below we will return -EPROTONOSUPPORT - */ -- if (err) -- printk_ratelimited(KERN_ERR "can: request_module " -- "(can-proto-%d) failed.\n", protocol); - - cp = can_get_proto(protocol); - } diff --git a/ipv4-fib-don-t-warn-when-primary-address-is-missing-.patch b/ipv4-fib-don-t-warn-when-primary-address-is-missing-.patch new file mode 100644 index 000000000..9e4cf4e0e --- /dev/null +++ b/ipv4-fib-don-t-warn-when-primary-address-is-missing-.patch @@ -0,0 +1,40 @@ +From 9f79323a0aebccb9915ab8f4b7dcf531578b9cf9 Mon Sep 17 00:00:00 2001 +From: Paolo Abeni +Date: Thu, 21 Apr 2016 20:23:31 -0400 +Subject: [PATCH] ipv4/fib: don't warn when primary address is missing if + in_dev is dead + +After commit fbd40ea0180a ("ipv4: Don't do expensive useless work +during inetdev destroy.") when deleting an interface, +fib_del_ifaddr() can be executed without any primary address +present on the dead interface. + +The above is safe, but triggers some "bug: prim == NULL" warnings. + +This commit avoids warning if the in_dev is dead + +Signed-off-by: Paolo Abeni +--- + net/ipv4/fib_frontend.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/net/ipv4/fib_frontend.c b/net/ipv4/fib_frontend.c +index 8a9246deccfe..63566ec54794 100644 +--- a/net/ipv4/fib_frontend.c ++++ b/net/ipv4/fib_frontend.c +@@ -904,7 +904,11 @@ void fib_del_ifaddr(struct in_ifaddr *ifa, struct in_ifaddr *iprim) + if (ifa->ifa_flags & IFA_F_SECONDARY) { + prim = inet_ifa_byprefix(in_dev, any, ifa->ifa_mask); + if (!prim) { +- pr_warn("%s: bug: prim == NULL\n", __func__); ++ /* if the device has been deleted, we don't perform ++ * address promotion ++ */ ++ if (!in_dev->dead) ++ pr_warn("%s: bug: prim == NULL\n", __func__); + return; + } + if (iprim && iprim != prim) { +-- +2.5.5 + diff --git a/iw_cxgb3-Fix-incorrectly-returning-error-on-success.patch b/iw_cxgb3-Fix-incorrectly-returning-error-on-success.patch deleted file mode 100644 index 9c517cf49..000000000 --- a/iw_cxgb3-Fix-incorrectly-returning-error-on-success.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 67f1aee6f45059fd6b0f5b0ecb2c97ad0451f6b3 Mon Sep 17 00:00:00 2001 -From: Hariprasad S -Date: Fri, 11 Dec 2015 13:59:17 +0530 -Subject: [PATCH] iw_cxgb3: Fix incorrectly returning error on success - -The cxgb3_*_send() functions return NET_XMIT_ values, which are -positive integers values. So don't treat positive return values -as an error. - -Signed-off-by: Steve Wise -Signed-off-by: Hariprasad Shenai -Signed-off-by: Doug Ledford ---- - drivers/infiniband/hw/cxgb3/iwch_cm.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/infiniband/hw/cxgb3/iwch_cm.c b/drivers/infiniband/hw/cxgb3/iwch_cm.c -index cb78b1e9bcd9..f504ba73e5dc 100644 ---- a/drivers/infiniband/hw/cxgb3/iwch_cm.c -+++ b/drivers/infiniband/hw/cxgb3/iwch_cm.c -@@ -149,7 +149,7 @@ static int iwch_l2t_send(struct t3cdev *tdev, struct sk_buff *skb, struct l2t_en - error = l2t_send(tdev, skb, l2e); - if (error < 0) - kfree_skb(skb); -- return error; -+ return error < 0 ? error : 0; - } - - int iwch_cxgb3_ofld_send(struct t3cdev *tdev, struct sk_buff *skb) -@@ -165,7 +165,7 @@ int iwch_cxgb3_ofld_send(struct t3cdev *tdev, struct sk_buff *skb) - error = cxgb3_ofld_send(tdev, skb); - if (error < 0) - kfree_skb(skb); -- return error; -+ return error < 0 ? error : 0; - } - - static void release_tid(struct t3cdev *tdev, u32 hwtid, struct sk_buff *skb) --- -2.5.0 - diff --git a/kbuild-AFTER_LINK.patch b/kbuild-AFTER_LINK.patch index 805b6eef8..7e8cba5b9 100644 --- a/kbuild-AFTER_LINK.patch +++ b/kbuild-AFTER_LINK.patch @@ -111,7 +111,7 @@ index dacf71a..72cbefd 100755 --- a/scripts/link-vmlinux.sh +++ b/scripts/link-vmlinux.sh @@ -65,6 +65,10 @@ vmlinux_link() - -lutil -lrt ${1} + -lutil -lrt -lpthread ${1} rm -f linux fi + if [ -n "${AFTER_LINK}" ]; then diff --git a/kernel.spec b/kernel.spec index d13fde7be..2c703bb78 100644 --- a/kernel.spec +++ b/kernel.spec @@ -11,10 +11,12 @@ Summary: The Linux kernel # Sign modules on x86. Make sure the config files match this setting if more # architectures are added. %ifarch %{ix86} x86_64 +%global signkernel 1 %global signmodules 1 %global zipmodules 1 %else -%global signmodules 0 +%global signkernel 0 +%global signmodules 1 %global zipmodules 0 %endif @@ -46,13 +48,13 @@ Summary: The Linux kernel # base_sublevel is the kernel version we're starting with and patching # on top of -- for example, 3.1-rc7-git1 starts with a 3.0 base, # which yields a base_sublevel of 0. -%define base_sublevel 4 +%define base_sublevel 6 ## If this is a released kernel ## %if 0%{?released_kernel} # Do we have a -stable update to apply? -%define stable_update 2 +%define stable_update 0 # Set rpm version accordingly %if 0%{?stable_update} %define stablerev %{stable_update} @@ -90,6 +92,7 @@ Summary: The Linux kernel %define with_debug %{?_without_debug: 0} %{?!_without_debug: 1} # kernel-headers %define with_headers %{?_without_headers: 0} %{?!_without_headers: 1} +%define with_cross_headers %{?_without_cross_headers: 0} %{?!_without_cross_headers: 1} # perf %define with_perf %{?_without_perf: 0} %{?!_without_perf: 1} # tools @@ -227,6 +230,7 @@ Summary: The Linux kernel %ifarch noarch %define with_up 0 %define with_headers 0 +%define with_cross_headers 0 %define with_tools 0 %define with_perf 0 %define all_arch_configs kernel-%{version}-*.config @@ -291,6 +295,7 @@ Summary: The Linux kernel # just like we used to only build them on i386 for x86 %ifnarch armv7hl %define with_headers 0 +%define with_cross_headers 0 %define with_perf 0 %define with_tools 0 %endif @@ -342,7 +347,7 @@ Summary: The Linux kernel # Packages that need to be installed before the kernel is, because the %%post # scripts use them. # -%define kernel_prereq fileutils, systemd >= 203-2 +%define kernel_prereq coreutils, systemd >= 203-2, /usr/bin/kernel-install %define initrd_prereq dracut >= 027 @@ -388,14 +393,12 @@ BuildRequires: rpm-build, elfutils %define debuginfo_args --strict-build-id -r %endif -%ifarch %{ix86} x86_64 -# MODULE_SIG is enabled in config-x86-generic and needs these: +%if %{signkernel}%{signmodules} BuildRequires: openssl openssl-devel -%endif - -%if %{signmodules} +%if %{signkernel} BuildRequires: pesign >= 0.10-4 %endif +%endif %if %{with_cross} BuildRequires: binutils-%{_build_arch}-linux-gnu, gcc-%{_build_arch}-linux-gnu @@ -494,21 +497,31 @@ Source5005: kbuild-AFTER_LINK.patch # Standalone patches -Patch451: lib-cpumask-Make-CPUMASK_OFFSTACK-usable-without-deb.patch +Patch420: arm64-avoid-needing-console-to-enable-serial-console.patch -Patch452: amd-xgbe-a0-Add-support-for-XGBE-on-A0.patch +Patch421: arm64-acpi-drop-expert-patch.patch -Patch453: amd-xgbe-phy-a0-Add-support-for-XGBE-PHY-on-A0.patch +# http://www.spinics.net/lists/arm-kernel/msg490981.html +Patch422: geekbox-v4-device-tree-support.patch -Patch454: arm64-avoid-needing-console-to-enable-serial-console.patch +# http://www.spinics.net/lists/arm-kernel/msg483898.html +Patch423: Initial-AllWinner-A64-and-PINE64-support.patch -Patch456: arm64-acpi-drop-expert-patch.patch +# http://www.spinics.net/lists/linux-tegra/msg26029.html +Patch426: usb-phy-tegra-Add-38.4MHz-clock-table-entry.patch -Patch457: ARM-tegra-usb-no-reset.patch +# http://patchwork.ozlabs.org/patch/587554/ +Patch430: ARM-tegra-usb-no-reset.patch -Patch460: mfd-wm8994-Ensure-that-the-whole-MFD-is-built-into-a.patch +# http://www.spinics.net/lists/linux-tegra/msg25152.html +Patch431: Fix-tegra-to-use-stdout-path-for-serial-console.patch -Patch463: arm-i.MX6-Utilite-device-dtb.patch +Patch432: arm-i.MX6-Utilite-device-dtb.patch + +# mvebu DSA switch fixes +# http://www.spinics.net/lists/netdev/msg370841.html http://www.spinics.net/lists/netdev/msg370842.html + +Patch460: lib-cpumask-Make-CPUMASK_OFFSTACK-usable-without-deb.patch Patch466: input-kill-stupid-messages.patch @@ -582,54 +595,32 @@ Patch501: Input-synaptics-pin-3-touches-when-the-firmware-repo.patch Patch502: firmware-Drop-WARN-from-usermodehelper_read_trylock-.patch -Patch503: drm-i915-turn-off-wc-mmaps.patch +# Patch503: drm-i915-turn-off-wc-mmaps.patch Patch508: kexec-uefi-copy-secure_boot-flag-in-boot-params.patch -#CVE-2015-7833 rhbz 1270158 1270160 -Patch567: usbvision-fix-crash-on-detecting-device-with-invalid.patch - -#rhbz 1287819 -Patch570: HID-multitouch-enable-palm-rejection-if-device-imple.patch - #rhbz 1286293 Patch571: ideapad-laptop-Add-Lenovo-ideapad-Y700-17ISK-to-no_h.patch -#rhbz 1288687 -Patch572: alua_fix.patch +#Required for some persistent memory options +Patch641: disable-CONFIG_EXPERT-for-ZONE_DMA.patch -#CVE-2015-8709 rhbz 1295287 1295288 -Patch603: ptrace-being-capable-wrt-a-process-requires-mapped-u.patch +#CVE-2016-3134 rhbz 1317383 1317384 +Patch665: netfilter-x_tables-deal-with-bogus-nextoffset-values.patch -Patch604: drm-i915-shut-up-gen8-SDE-irq-dmesg-noise-again.patch +#rhbz 1309487 +Patch701: antenna_select.patch -#rhbz 1083853 -Patch610: PNP-Add-Broadwell-to-Intel-MCH-size-workaround.patch +#CVE-2016-4482 rhbz 1332931 1332932 +Patch706: USB-usbfs-fix-potential-infoleak-in-devio.patch -#rhbz 1300955 -Patch640: PNP-Add-Haswell-ULT-to-Intel-MCH-size-workaround.patch +#CVE-2016-4569 rhbz 1334643 1334645 +Patch714: ALSA-timer-Fix-leak-in-SNDRV_TIMER_IOCTL_PARAMS.patch +Patch715: ALSA-timer-Fix-leak-in-events-via-snd_timer_user_cca.patch +Patch716: ALSA-timer-Fix-leak-in-events-via-snd_timer_user_tin.patch -#rhbz 1278942 -Patch643: media-ivtv-avoid-going-past-input-audio-array.patch - -#rhbz 1302037 -Patch644: wext-fix-message-delay-ordering.patch -Patch645: cfg80211-wext-fix-message-ordering.patch - -#rhbz 1255325 -Patch646: HID-sony-do-not-bail-out-when-the-sixaxis-refuses-th.patch - -#CVE-2016-0617 rhbz 1305803 1305804 -Patch648: fs-hugetlbfs-inode.c-fix-bugs-in-hugetlb_vmtruncate_.patch - -#CVE-2016-2383 rhbz 1308452 1308453 -Patch650: bpf-fix-branch-offset-adjustment-on-backjumps-after-.patch - -#rhbz 1306987 -Patch651: Input-elantech-mark-protocols-v2-and-v3-as-semi-mt.patch - -#CVE-2015-8812 rhbz 1303532 1309548 -Patch653: iw_cxgb3-Fix-incorrectly-returning-error-on-success.patch +#CVE-2016-3713 rhbz 1332139 1336410 +Patch717: KVM-MTRR-remove-MSR-0x2f8.patch # END OF PATCH DEFINITIONS @@ -655,6 +646,7 @@ Requires(pre): %{kernel_prereq}\ Requires(pre): %{initrd_prereq}\ Requires(pre): linux-firmware >= 20150904-56.git6ebf5d57\ Requires(preun): systemd >= 200\ +Conflicts: xfsprogs < 4.3.0-1\ Conflicts: xorg-x11-drv-vmmouse < 13.0.99\ %{expand:%%{?kernel%{?1:_%{1}}_conflicts:Conflicts: %%{kernel%{?1:_%{1}}_conflicts}}}\ %{expand:%%{?kernel%{?1:_%{1}}_obsoletes:Obsoletes: %%{kernel%{?1:_%{1}}_obsoletes}}}\ @@ -682,6 +674,17 @@ header files define structures and constants that are needed for building most standard programs and are also needed for rebuilding the glibc package. +%package cross-headers +Summary: Header files for the Linux kernel for use by cross-glibc +Group: Development/System +%description cross-headers +Kernel-cross-headers includes the C header files that specify the interface +between the Linux kernel and userspace libraries and programs. The +header files define structures and constants that are needed for +building most standard programs and are also needed for rebuilding the +cross-glibc package. + + %package bootwrapper Summary: Boot wrapper files for generating combined kernel + initrd images Group: Development/System @@ -693,6 +696,7 @@ files combining both kernel and initial ramdisk. %package debuginfo-common-%{_target_cpu} Summary: Kernel source files used by %{name}-debuginfo packages Group: Development/Debug +Provides: installonlypkg(kernel) %description debuginfo-common-%{_target_cpu} This package is required by %{name}-debuginfo subpackages. It provides the kernel source files common to all builds. @@ -809,6 +813,7 @@ Summary: Debug information for package %{name}%{?1:-%{1}}\ Group: Development/Debug\ Requires: %{name}-debuginfo-common-%{_target_cpu} = %{version}-%{release}\ Provides: %{name}%{?1:-%{1}}-debuginfo-%{_target_cpu} = %{version}-%{release}\ +Provides: installonlypkg(kernel)\ AutoReqProv: no\ %description %{?1:%{1}-}debuginfo\ This package provides debug information for package %{name}%{?1:-%{1}}.\ @@ -830,7 +835,8 @@ Provides: kernel-devel = %{version}-%{release}%{?1:+%{1}}\ Provides: kernel-devel-uname-r = %{KVERREL}%{?variant}%{?1:+%{1}}\ Provides: installonlypkg(kernel)\ AutoReqProv: no\ -Requires(pre): /usr/bin/find\ +Requires(pre): findutils\ +Requires: findutils\ Requires: perl\ %description %{?1:%{1}-}devel\ This package provides kernel headers and makefiles sufficient to build modules\ @@ -888,6 +894,7 @@ summary: kernel meta-package for the %{1} kernel\ group: system environment/kernel\ Requires: kernel-%{1}-core-uname-r = %{KVERREL}%{?variant}+%{1}\ Requires: kernel-%{1}-modules-uname-r = %{KVERREL}%{?variant}+%{1}\ +Provides: installonlypkg(kernel)\ %description %{1}\ The meta-package for the %{1} kernel\ %{nil} @@ -902,6 +909,7 @@ The meta-package for the %{1} kernel\ Summary: %{variant_summary}\ Group: System Environment/Kernel\ Provides: kernel-%{?1:%{1}-}core-uname-r = %{KVERREL}%{?variant}%{?1:+%{1}}\ +Provides: installonlypkg(kernel)\ %{expand:%%kernel_reqprovconf}\ %if %{?1:1} %{!?1:0} \ %{expand:%%kernel_meta_package %{?1:%{1}}}\ @@ -1333,7 +1341,7 @@ BuildKernel() { make -s mrproper cp configs/$Config .config - %if %{signmodules} + %if %{signkernel}%{signmodules} cp %{SOURCE11} certs/. %endif @@ -1370,7 +1378,7 @@ BuildKernel() { cp arch/$Arch/boot/zImage.stub $RPM_BUILD_ROOT/%{image_install_path}/zImage.stub-$KernelVer || : cp arch/$Arch/boot/zImage.stub $RPM_BUILD_ROOT/lib/modules/$KernelVer/zImage.stub-$KernelVer || : fi - %if %{signmodules} + %if %{signkernel} # Sign the image if we're using EFI %pesign -s -i $KernelImage -o vmlinuz.signed if [ ! -s vmlinuz.signed ]; then @@ -1432,6 +1440,9 @@ BuildKernel() { rm -rf $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/include cp .config $RPM_BUILD_ROOT/lib/modules/$KernelVer/build cp -a scripts $RPM_BUILD_ROOT/lib/modules/$KernelVer/build + if [ -f tools/objtool/objtool ]; then + cp -a tools/objtool/objtool $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/tools/objtool/ || : + fi if [ -d arch/$Arch/scripts ]; then cp -a arch/$Arch/scripts $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/arch/%{_arch} || : fi @@ -1455,9 +1466,35 @@ BuildKernel() { if [ -d arch/%{asmarch}/mach-${Flavour}/include ]; then cp -a --parents arch/%{asmarch}/mach-${Flavour}/include $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ fi + # include a few files for 'make prepare' + cp -a --parents arch/arm/tools/gen-mach-types $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/arm/tools/mach-types $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + %endif cp -a include $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/include - +%ifarch %{ix86} x86_64 + # files for 'make prepare' to succeed with kernel-devel + cp -a --parents arch/x86/entry/syscalls/syscall_32.tbl $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/x86/entry/syscalls/syscalltbl.sh $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/x86/entry/syscalls/syscallhdr.sh $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/x86/entry/syscalls/syscall_64.tbl $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/x86/tools/relocs_32.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/x86/tools/relocs_64.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/x86/tools/relocs.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/x86/tools/relocs_common.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/x86/tools/relocs.h $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents tools/include/tools/le_byteshift.h $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/x86/purgatory/purgatory.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/x86/purgatory/sha256.h $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/x86/purgatory/sha256.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/x86/purgatory/stack.S $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/x86/purgatory/string.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/x86/purgatory/setup-x86_64.S $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/x86/purgatory/entry64.S $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/x86/boot/string.h $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/x86/boot/string.c $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ + cp -a --parents arch/x86/boot/ctype.h $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/ +%endif # Make sure the Makefile and version.h have a matching timestamp so that # external modules can be built touch -r $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/Makefile $RPM_BUILD_ROOT/lib/modules/$KernelVer/build/include/generated/uapi/linux/version.h @@ -1745,11 +1782,40 @@ find $RPM_BUILD_ROOT/usr/include \ %endif +%if %{with_cross_headers} +mkdir -p $RPM_BUILD_ROOT/usr/tmp-headers +make ARCH=%{hdrarch} INSTALL_HDR_PATH=$RPM_BUILD_ROOT/usr/tmp-headers headers_install_all + +find $RPM_BUILD_ROOT/usr/tmp-headers/include \ + \( -name .install -o -name .check -o \ + -name ..install.cmd -o -name ..check.cmd \) | xargs rm -f + +# Copy all the architectures we care about to their respective asm directories +for arch in arm arm64 powerpc s390 x86 ; do +mkdir -p $RPM_BUILD_ROOT/usr/${arch}-linux-gnu/include +mv $RPM_BUILD_ROOT/usr/tmp-headers/include/asm-${arch} $RPM_BUILD_ROOT/usr/${arch}-linux-gnu/include/asm +cp -a $RPM_BUILD_ROOT/usr/tmp-headers/include/asm-generic $RPM_BUILD_ROOT/usr/${arch}-linux-gnu/include/. +done + +# Remove the rest of the architectures +rm -rf $RPM_BUILD_ROOT/usr/tmp-headers/include/arch* +rm -rf $RPM_BUILD_ROOT/usr/tmp-headers/include/asm-* + +# Copy the rest of the headers over +for arch in arm arm64 powerpc s390 x86 ; do +cp -a $RPM_BUILD_ROOT/usr/tmp-headers/include/* $RPM_BUILD_ROOT/usr/${arch}-linux-gnu/include/. +done + +rm -rf $RPM_BUILD_ROOT/usr/tmp-headers +%endif + %if %{with_perf} # perf tool binary and supporting scripts/binaries %{perf_make} DESTDIR=$RPM_BUILD_ROOT lib=%{_lib} install-bin install-traceevent-plugins # remove the 'trace' symlink. rm -f %{buildroot}%{_bindir}/trace +# remove the perf-tips +rm -rf %{buildroot}%{_docdir}/perf-tip # python-perf extension %{perf_make} DESTDIR=$RPM_BUILD_ROOT install-python_ext @@ -1929,6 +1995,12 @@ fi /usr/include/* %endif +%if %{with_cross_headers} +%files cross-headers +%defattr(-,root,root) +/usr/*-linux-gnu/include/* +%endif + %if %{with_bootwrapper} %files bootwrapper %defattr(-,root,root) @@ -2046,6 +2118,7 @@ fi %defattr(-,root,root)\ %{expand:%%files %{?2:%{2}-}devel}\ %defattr(-,root,root)\ +%defverify(not mtime)\ /usr/src/kernels/%{KVERREL}%{?2:+%{2}}\ %{expand:%%files %{?2:%{2}-}modules-extra}\ %defattr(-,root,root)\ @@ -2074,6 +2147,11 @@ fi # # %changelog +* Tue May 17 2016 Josh Boyer +- Linux v4.6 +- Disable CONFIG_DEBUG_VM_PGFLAGS on non debug kernels (rhbz 1335173) +- CVE-2016-3713 kvm: out-of-bounds access in set_var_mtrr_msr (rhbz 1332139 1336410) + * Thu Feb 18 2016 Josh Boyer - CVE-2015-8812 cxgb3 use after free (rhbz 1303532 1309548) @@ -2193,1917 +2271,6 @@ fi - Build in ARM generic crypto optomisation modules - Minor ARM updates -* Wed Oct 07 2015 Josh Boyer -- Increase the default number of runtime UARTS (rhbz 1264383) - -* Wed Oct 07 2015 Justin M. Forbes -- Enable CONFIG_ACPI_REV_OVERRIDE_POSSIBLE for Dell XPS sound (rhbz 1255070) -- Enable CONFIG_X86_NUMACHIP - -* Mon Oct 05 2015 Laura Abbott -- Stop stack smash for several DVB devices (rhbz 1265978) -- Make headphone work with with T550 + Dock (rhbz 1268037) - -* Mon Oct 05 2015 Justin M. Forbes -- Linux v4.2.3 -- Netdev fix race in resq_queue_unlink - -* Fri Oct 02 2015 Josh Boyer -- CVE-2015-7613 Unauthorized access to IPC via SysV shm (rhbz 1268270 1268273) - -* Thu Oct 01 2015 Josh Boyer -- CVE-2015-2925 Don't allow bind mount escape (rhbz 1209367 1209373) - -* Tue Sep 29 2015 Justin M. Forbes -- - Linux v4.2.2 - -* Mon Sep 28 2015 Peter Robinson -- Add upstream patch to fix a Allwinner regulator loading as a module - -* Thu Sep 24 2015 Josh Boyer -- CVE-2015-5257 Null ptr deref in usb whiteheat driver (rhbz 1265607 1265612) - -* Mon Sep 21 2015 Justin M. Forbes - 4.2.1-300 -- Linux v4.2.1 - -* Fri Sep 18 2015 Josh Boyer -- Fix oops in 32-bit kernel on 64-bit AMD cpus (rhbz 1263762) - -* Tue Sep 15 2015 Josh Boyer -- CVE-2015-6937 net: rds null pointer (rhbz 1263139 1263140) - -* Wed Sep 9 2015 Peter Robinson -- Minor ARMv7/aarch64 config updates - -* Tue Sep 08 2015 Josh Boyer -- Fix oops in blk layer (rhbz 1237136) - -* Fri Sep 04 2015 Justin M. Forbes -- Bump linux-firmware require for amdgpu (rhbz 1259542) - -* Wed Sep 02 2015 Justin M. Forbes -- Make flush_workqueue() available again to non GPL modules (rhbz 1259231) - -* Tue Sep 1 2015 Laura Abbott - 4.2.0-200 -- Linux v4.2 - -* Thu Aug 27 2015 Josh Boyer -- Fix vmware driver issues from Thomas Hellström (rhbz 1227193) -- Add patch from Hans de Goede to fix nv46 based cards (rhbz 1257534) -- Add patch from Jonathon Jongsma to fix modes in qxl (rhbz 1212201) - -* Wed Aug 26 2015 Peter Robinson -- Disable CRYPTO_DEV_VMX_ENCRYPT on PPC for now to fix Power 8 boot (rhbz 1237089) - -* Tue Aug 25 2015 Laura Abbott -- Fix x2apic refactoring breakage (rhbz 1224764) - -* Tue Aug 25 2015 Laura Abbott -- Correct the sdhci DMA leak patch to actually compile (oops) - -* Tue Aug 25 2015 Laura Abbott -- Fix DMA leak from sdhci (rhbz 1256281) - -* Tue Aug 25 2015 Josh Boyer -- CVE-2015-6666 x86_64 NT flag handling DoS (rhbz 1256746 1256753) - -* Fri Aug 21 2015 Josh Boyer -- Disable EFI_VARS (rhbz 1252137) - -* Thu Aug 20 2015 Josh Boyer -- Fix incorrect ext4 freezing behavior on non-journaled fs (rhbz 1250717) - -* Mon Aug 17 2015 Laura Abbott - 4.1.6-200 -- Linux v4.1.6 -- Actually apply the fix for rhbz 1253789 - -* Mon Aug 17 2015 Josh Boyer -- Fix iscsi issue (rhbz 1253789) - -* Sat Aug 15 2015 Josh Boyer -- Patch from Hans de Goede to add yoga 3 rfkill quirk (rhbz 1239050) - -* Tue Aug 11 2015 Peter Robinson -- Drop UACCESS_WITH_MEMCPY on ARMv7 as it's broken (rhbz 1250613) - -* Mon Aug 10 2015 Laura Abbott - 4.1.5-200 -- Linux v4.1.5 - -* Mon Aug 10 2015 Laura Abbott -- Fix use after free in HID input (rhbz 1251877 1251880 1250279 1248741) - -* Tue Aug 04 2015 Josh Boyer -- Patch from Nicholas Kudriavtsev for Acer Switch 12 Fn keys (rhbz 1244511) - -* Tue Aug 4 2015 Peter Robinson -- Back port AMD Seattle a0 4.1 NIC driver update - -* Mon Aug 03 2015 Josh Boyer - 4.1.4-200 -- Linux v4.1.4 -- CVE-2015-5697 info leak in md driver (rhbz 1249011 1249013) - -* Wed Jul 29 2015 Laura Abbott - 4.1.3-201 -- tag and build for CVE fixes - -* Mon Jul 27 2015 Laura Abbott -- CVE-2015-3290 CVE-2015-3291 NMI issues (rhbz 1243465 1245927) - -* Mon Jul 27 2015 Josh Boyer -- CVE-2015-1333 add_key memory leak (rhbz 1244171) - -* Thu Jul 23 2015 Laura Abbott -- Fix warning from pcmcia (rhbz 1180920 1206724) - -* Wed Jul 22 2015 Laura Abbott - 4.1.3-200 -- Add patches for Ideapad RF switches (rhbz 1192270) - -* Wed Jul 22 2015 Laura Abbott -- Linux v4.1.3 - -* Wed Jul 15 2015 Laura Abbott - 4.1.2-200 -- Linux v4.1.2 rebase - -* Fri Jul 10 2015 Laura Abbott - 4.0.8-300 -- Linux v4.0.8 - -* Tue Jul 07 2015 Josh Boyer -- Drop incorrect patches for now (rhbz 1212230) - -* Mon Jun 29 2015 Laura Abbott - 4.0.7-300 -- Linux v4.0.7 - -* Tue Jun 23 2015 Justin M. Forbes - 4.0.6-300 -- Linux v4.0.6 - -* Thu Jun 18 2015 Josh Boyer -- Add patch to fix touchpad issues on Razer machines (rhbz 1227891) - -* Fri Jun 12 2015 Josh Boyer -- CVE-2015-XXXX kvm: NULL ptr deref in kvm_apic_has_events (rhbz 1230770 1230774) - -* Thu Jun 11 2015 Josh Boyer -- Backport fixes for synaptic 3 finger tap (rhbz 1212230) -- Backport btrfs fixes queued for stable (rhbz 1217191) - -* Tue Jun 09 2015 Josh Boyer -- Fix touchpad for Thinkpad S540 (rhbz 1223051) - -* Mon Jun 08 2015 Josh Boyer -- Linux v4.0.5 - -* Thu Jun 04 2015 Josh Boyer -- Backport commit to fix block spew (rhbz 1226621) -- Add patch to fix SMT guests on POWER7 (rhbz 1227877) -- Add patch to turn of WC mmaps on i915 from airlied (rhbz 1226743) - -* Wed Jun 03 2015 Laura Abbott -- Fix del_timer_sync in mwifiex - -* Wed Jun 03 2015 Laura Abbott -- Drop that blasted firwmare warning until we get a real fix (rhbz 1133378) - -* Wed Jun 03 2015 Laura Abbott -- Fix auditing of canonical mode (rhbz 1188695) - -* Wed Jun 03 2015 Josh Boyer -- CVE-2015-1420 fhandle race condition (rhbz 1187534 1227417) - -* Tue Jun 02 2015 Laura Abbott -- Fix fd_do_rw error (rhbz 1218882) - -* Tue Jun 02 2015 Josh Boyer -- Fix middle button issues on external Lenovo keyboards (rhbz 1225563) - -* Thu May 28 2015 Josh Boyer -- Add quirk for Mac Pro backlight (rhbz 1217249) - -* Thu May 28 2015 Josh Boyer - 4.0.4-303 -- Add patch to avoid vmmouse being classified as a joystic (rhbz 1214474) - -* Wed May 27 2015 Josh Boyer -4.0.4-302 -- Apply queued fixes for crasher reported by Alex Larsson -- Enable in-kernel vmmouse driver (rhbz 1214474) - -* Tue May 26 2015 Laura Abbott -- Fix signed division error (rhbz 1200353) - -* Tue May 26 2015 Josh Boyer -- Backport patch to fix might_sleep splat (rhbz 1220519) - -* Thu May 21 2015 Josh Boyer - 4.0.4-301 -- Add patch to fix discard on md RAID0 (rhbz 1223332) -- Add submitted stable fix for i915 flickering on ilk (rhbz 1218688) - -* Mon May 18 2015 Laura Abbott -- Re-add the v4l2 query caps patch which was dropped - -* Mon May 18 2015 Josh Boyer -- Fix incorrect bandwidth on some Chicony webcams - -* Mon May 18 2015 Justin M. Forbes - 4.0.4-300 -- Linux v4.0.4 - -* Fri May 15 2015 Laura Abbott -- Fix DVB oops (rhbz 1220118) - -* Thu May 14 2015 Justin M. Forbes - 4.0.3-301 -- Disable i915 verbose state checks - -* Thu May 14 2015 Josh Boyer -- Fix non-empty dir removal in overlayfs (rhbz 1220915) - -* Wed May 13 2015 Laura Abbott -- Fix spew from KVM switch (rhbz 1219343) - -* Wed May 13 2015 Justin M. Forbes - 4.0.3-300 -- Linux v4.0.3 - -* Sat May 9 2015 Peter Robinson -- Minor ARMv7 updates - -* Thu May 07 2015 Justin M. Forbes - 4.0.2-300 -- Linux v4.0.2 (rhbz 1182816) - -* Tue May 05 2015 Josh Boyer -- Backport patch to blacklist TRIM on all Samsung 8xx series SSDs (rhbz 1218662) -- CVE-2015-3636 ping-sockets use-after-free privilege escalation (rhbz 1218074 1218110) - -* Thu Apr 30 2015 Josh Boyer -- Fix backlight on various Toshiba machines (rhbz 1206036 1215989) - -* Wed Apr 29 2015 Justin M. Forbes - 4.0.1-300 -- Linux v4.0.1 - -* Tue Apr 28 2015 Justin M. Forbes -- Fix up boot times for live images (rhbz 1210857) - -* Mon Apr 27 2015 Josh Boyer -- Backport NFS DIO fixes from 4.1 (rhbz 1211017 1211013) - -* Fri Apr 24 2015 Josh Boyer -- CVE-2015-3339 race condition between chown and execve (rhbz 1214030) -- Fix iscsi with QNAP devices (rhbz 1208999) - -* Wed Apr 22 2015 Peter Robinson -- Fix RTC on TrimSlice -- Enable all sound modules for TrimSlice (also needed for other devices) - -* Mon Apr 20 2015 Laura Abbott -- Fix sound issues (rhbz 1188741) - -* Fri Apr 17 2015 Josh Boyer -- Add support for touchpad on Google Pixel 2 (rhbz 1209088) -- Allow disabling raw mode in logitech-hidpp (rhbz 1210801) - -* Wed Apr 15 2015 Josh Boyer -- Add patch to fix tty closure race (rhbz 1208953) - -* Sun Apr 12 2015 Josh Boyer - 4.0.0-1 -- Linux v4.0 - -* Fri Apr 10 2015 Josh Boyer - 4.0.0-0.rc7.git2.1 -- Linux v4.0-rc7-42-ge5e02de0665e - -* Thu Apr 09 2015 Josh Boyer - 4.0.0-0.rc7.git1.1 -- Linux v4.0-rc7-30-g20624d17963c - -* Thu Apr 02 2015 Josh Boyer - 4.0.0-0.rc6.git2.1 -- Linux v4.0-rc6-101-g0a4812798fae - -* Thu Apr 02 2015 Josh Boyer -- DoS against IPv6 stacks due to improper handling of RA (rhbz 1203712 1208491) - -* Wed Apr 01 2015 Josh Boyer - 4.0.0-0.rc6.git1.1 -- Linux v4.0-rc6-31-gd4039314d0b1 -- CVE-2015-2150 xen: NMIs triggerable by guests (rhbz 1196266 1200397) - -* Tue Mar 31 2015 Josh Boyer -- Enable MLX4_EN_VXLAN (rhbz 1207728) - -* Mon Mar 30 2015 Josh Boyer - 4.0.0-0.rc6.git0.1 -- Linux v4.0-rc6 - -* Fri Mar 27 2015 Josh Boyer - 4.0.0-0.rc5.git4.1 -- Linux v4.0-rc5-96-g3c435c1e472b -- Fixes hangs due to i915 issues (rhbz 1204050 1206056) - -* Thu Mar 26 2015 Josh Boyer - 4.0.0-0.rc5.git3.1 -- Linux v4.0-rc5-80-g4c4fe4c24782 - -* Wed Mar 25 2015 Peter Robinson -- Add aarch64 patches to fix mustang usb, seattle eth, and console settings - -* Wed Mar 25 2015 Josh Boyer - 4.0.0-0.rc5.git2.4 -- Add patches to fix a few more i915 hangs/oopses - -* Wed Mar 25 2015 Josh Boyer - 4.0.0-0.rc5.git2.1 -- Linux v4.0-rc5-53-gc875f421097a - -* Tue Mar 24 2015 Josh Boyer -- Fix ALPS v5 and v7 trackpads (rhbz 1203584) - -* Tue Mar 24 2015 Josh Boyer - 4.0.0-0.rc5.git1.3 -- Linux v4.0-rc5-25-g90a5a895cc8b -- Add some i915 fixes - -* Mon Mar 23 2015 Josh Boyer - 4.0.0-0.rc5.git0.3 -- Enable CONFIG_SND_BEBOB (rhbz 1204342) -- Validate iovec range in sys_sendto/sys_recvfrom -- Revert i915 commit that causes boot hangs on at least some headless machines -- Linux v4.0-rc5 - -* Fri Mar 20 2015 Josh Boyer - 4.0.0-0.rc4.git2.1 -- Linux v4.0-rc4-199-gb314acaccd7e -- Fix brightness on Lenovo Ideapad Z570 (rhbz 1187004) - -* Thu Mar 19 2015 Josh Boyer - 4.0.0-0.rc4.git1.3 -- Linux v4.0-rc4-88-g7b09ac704bac -- Rename arm64-xgbe-a0.patch - -* Thu Mar 19 2015 Peter Robinson -- Drop arm64 non upstream patch - -* Thu Mar 19 2015 Josh Boyer -- Add patch to fix high cpu usage on direct_read kernfs files (rhbz 1202362) - -* Wed Mar 18 2015 Jarod Wilson -- Fix kernel-uname-r Requires/Provides variant mismatches - -* Tue Mar 17 2015 Kyle McMartin - 4.0.0-0.rc4.git0.3 -- Update kernel-arm64.patch, move EDAC to arm-generic, add EDAC_XGENE on arm64. -- Add PCI_ECAM on generic, since it'll be selected most places anyway. - -* Mon Mar 16 2015 Jarod Wilson -- Fix bad variant usage in kernel dependencies - -* Mon Mar 16 2015 Josh Boyer - 4.0.0-0.rc4.git0.1 -- Linux v4.0-rc4 -- Drop arm64 RCU revert patch. Should be fixed properly upstream now. -- Disable debugging options. - -* Sun Mar 15 2015 Jarod Wilson -- Fix kernel-tools sub-packages for variant builds - -* Fri Mar 13 2015 Josh Boyer -- Fix esrt build on aarch64 - -* Fri Mar 13 2015 Kyle McMartin -- arm64-revert-tlb-rcu_table_free.patch: revert 5e5f6dc1 which - causes lockups on arm64 machines. -- Also revert ESRT on AArch64 for now. - -* Fri Mar 13 2015 Josh Boyer - 4.0.0-0.rc3.git2.1 -- Linux v4.0-rc3-148-gc202baf017ae -- Add patch to support clickpads (rhbz 1201532) - -* Thu Mar 12 2015 Josh Boyer -- CVE-2014-8159 infiniband: uverbs: unprotected physical memory access (rhbz 1181166 1200950) - -* Wed Mar 11 2015 Josh Boyer - 4.0.0-0.rc3.git1.1 -- Linux v4.0-rc3-111-gaffb8172de39 -- CVE-2015-2150 xen: NMIs triggerable by guests (rhbz 1196266 1200397) -- Patch series to fix Lenovo *40 and Carbon X1 touchpads (rhbz 1200777 1200778) -- Revert commit that added bad rpath to cpupower (rhbz 1199312) -- Reenable debugging options. - -* Mon Mar 09 2015 Josh Boyer - 4.0.0-0.rc3.git0.1 -- Linux v4.0-rc3 -- Disable debugging options. - -* Sun Mar 8 2015 Peter Robinson -- ARMv7: add patches to fix crash on boot for some devices on multiplatform - -* Fri Mar 06 2015 Josh Boyer - 4.0.0-0.rc2.git2.1 -- Linux v4.0-rc2-255-g5f237425f352 - -* Thu Mar 05 2015 Josh Boyer - 4.0.0-0.rc2.git1.1 -- Linux v4.0-rc2-150-g6587457b4b3d -- Reenable debugging options. - -* Wed Mar 04 2015 Josh Boyer -- Enable MLX4_EN on ppc64/aarch64 (rhbz 1198719) - -* Tue Mar 03 2015 Josh Boyer - 4.0.0-0.rc2.git0.1 -- Linux v4.0-rc2 -- Enable CONFIG_CM32181 for ALS on Carbon X1 -- Disable debugging options. - -* Tue Mar 03 2015 Josh Boyer - 4.0.0-0.rc1.git3.1 -- Linux v4.0-rc1-178-g023a6007a08d - -* Mon Mar 02 2015 Josh Boyer -- Add patch to fix nfsd soft lockup (rhbz 1185519) -- Enable ET131X driver (rhbz 1197842) -- Enable YAMA (rhbz 1196825) - -* Sat Feb 28 2015 Peter Robinson -- ARMv7 OMAP updates, fix panda boot - -* Fri Feb 27 2015 Josh Boyer - 4.0.0-0.rc1.git2.1 -- Linux v4.0-rc1-36-g4f671fe2f952 - -* Wed Feb 25 2015 Josh Boyer -- Add support for AR5B195 devices from Alexander Ploumistos (rhbz 1190947) - -* Tue Feb 24 2015 Josh Boyer - 4.0.0-0.rc1.git1.1 -- Linux v4.0-rc1-22-gb24e2bdde4af -- Reenable debugging options. - -* Tue Feb 24 2015 Richard W.M. Jones - 4.0.0-0.rc1.git0.2 -- Add patch to fix aarch64 KVM bug with module loading (rhbz 1194366). - -* Tue Feb 24 2015 Peter Robinson -- Minor ARM config update - -* Mon Feb 23 2015 Josh Boyer - 4.0.0-0.rc1.git0.1 -- Add patch for HID i2c from Seth Forshee (rhbz 1188439) - -* Mon Feb 23 2015 Josh Boyer -- Linux v4.0-rc1 -- CVE-2015-0275 ext4: fallocate zero range page size > block size BUG (rhbz 1193907 1195178) -- Disable debugging options. - -* Fri Feb 20 2015 Josh Boyer - 3.20.0-0.rc0.git10.1 -- Linux v3.19-8975-g3d883483dc0a -- Add patch to fix intermittent hangs in nouveau driver -- Move mtpspi and related mods to kernel-core for VMWare guests (rhbz 1194612) - -* Wed Feb 18 2015 Josh Boyer - 3.20.0-0.rc0.git9.1 -- Linux v3.19-8784-gb2b89ebfc0f0 - -* Wed Feb 18 2015 Kyle McMartin - 3.20.0-0.rc0.git8.2 -- kernel-arm64.patch: Revert dropping some of the xgene fixes we carried - against upstream. (#1193875) -- kernel-arm64-fix-psci-when-pg.patch: make it simpler. -- config-arm64: turn on CONFIG_DEBUG_SECTION_MISMATCH. - -* Wed Feb 18 2015 Josh Boyer - 3.20.0-0.rc0.git8.1 -- Linux v3.19-8217-gcc4f9c2a91b7 - -* Tue Feb 17 2015 Kyle McMartin - 3.20.0-0.rc0.git7.3 -- kernel-arm64.patch turned on. - -* Tue Feb 17 2015 Kyle McMartin - 3.20.0-0.rc0.git7.2 -- kernel-arm64.patch merge, but leave it off. -- kernel-arm64-fix-psci-when-pg.patch: when -pg (because of ftrace) is enabled - we must explicitly annotate which registers should be assigned, otherwise - gcc will do unexpected things behind our backs. - -* Tue Feb 17 2015 Josh Boyer - 3.20.0-0.rc0.git7.1 -- Linux v3.19-7478-g796e1c55717e -- DRM merge - -* Mon Feb 16 2015 Josh Boyer -- CVE-XXXX-XXXX potential memory corruption in vhost/scsi driver (rhbz 1189864 1192079) -- CVE-2015-1593 stack ASLR integer overflow (rhbz 1192519 1192520) - -* Mon Feb 16 2015 Peter Robinson -- Minor updates for ARMv7/ARM64 - -* Mon Feb 16 2015 Josh Boyer - 3.20.0-0.rc0.git6.1 -- Linux v3.19-6676-g1fa185ebcbce - -* Fri Feb 13 2015 Josh Boyer - 3.20.0-0.rc0.git5.1 -- Linux v3.19-5015-gc7d7b9867155 - -* Thu Feb 12 2015 Josh Boyer - 3.20.0-0.rc0.git4.1 -- Linux v3.19-4542-g8cc748aa76c9 - -* Thu Feb 12 2015 Josh Boyer - 3.20.0-0.rc0.git3.1 -- Linux v3.19-4020-gce01e871a1d4 - -* Wed Feb 11 2015 Josh Boyer - 3.20.0-0.rc0.git2.1 -- Linux v3.19-2595-gc5ce28df0e7c - -* Wed Feb 11 2015 Josh Boyer - 3.20.0-0.rc0.git1.1 -- Linux v3.19-463-g3e8c04eb1174 -- Reenable debugging options. -- Temporarily disable aarch64 patches - -* Mon Feb 09 2015 Josh Boyer - 3.19.0-1 -- Linux v3.19 - -* Sat Feb 07 2015 Josh Boyer - 3.19.0-0.rc7.git3.1 -- Linux v3.19-rc7-189-g26cdd1f76a88 - -* Thu Feb 5 2015 Peter Robinson -- Allwinner A23 (sun8i) SoC -- Move ARM usb platform options to arm-generic - -* Thu Feb 05 2015 Josh Boyer - 3.19.0-0.rc7.git2.1 -- Linux v3.19-rc7-32-g5ee0e962603e - -* Wed Feb 04 2015 Josh Boyer - 3.19.0-0.rc7.git1.1 -- Linux v3.19-rc7-22-gdc6d6844111d - -* Tue Feb 03 2015 Josh Boyer - 3.19.0-0.rc7.git0.3 -- Add patch to fix NFS backtrace (rhbz 1188638) - -* Mon Feb 02 2015 Josh Boyer - 3.19.0-0.rc7.git0.1 -- Linux v3.19-rc7 -- Disable debugging options. - -* Fri Jan 30 2015 Josh Boyer - 3.19.0-0.rc6.git3.1 -- Linux v3.19-rc6-142-g1c999c47a9f1 - -* Thu Jan 29 2015 Josh Boyer -- Backport patch from Rob Clark to toggle i915 state machine checks - -* Thu Jan 29 2015 Peter Robinson -- More ARMv7 updates -- A few more sound config cleanups - -* Wed Jan 28 2015 Josh Boyer - 3.19.0-0.rc6.git2.1 -- Linux v3.19-rc6-105-gc59c961ca511 - -* Tue Jan 27 2015 Josh Boyer -- Enable SND_SOC and the button array driver on x86 for Baytrail devices - -* Tue Jan 27 2015 Josh Boyer - 3.19.0-0.rc6.git1.1 -- Linux v3.19-rc6-21-g4adca1cbc4ce -- Reenable debugging options. - -* Mon Jan 26 2015 Josh Boyer - 3.19.0-0.rc6.git0.1 -- Linux v3.19-rc6 -- Remove symbolic link hunk from patch-3.19-rc6 (rbhz 1185928) -- Disable debugging options. - -* Thu Jan 22 2015 Josh Boyer - 3.19.0-0.rc5.git2.1 -- Linux v3.19-rc5-134-gf8de05ca38b7 - -* Wed Jan 21 2015 Josh Boyer - 3.19.0-0.rc5.git1.1 -- Linux v3.19-rc5-117-g5eb11d6b3f55 -- Reenable debugging options. - -* Tue Jan 20 2015 Peter Robinson -- More ARM config option cleanups - -* Mon Jan 19 2015 Josh Boyer - 3.19.0-0.rc5.git0.1 -- Linux v3.19-rc5 -- Disable debugging options. - -* Sat Jan 17 2015 Peter Robinson -- Move Rockchip to ARMv7 generic to support rk32xx on LPAE -- Enable Device Tree Overlays for dynamic DTB -- ARM config updates - -* Fri Jan 16 2015 Josh Boyer - 3.19.0-0.rc4.git4.1 -- Linux v3.19-rc4-155-gcb59670870d9 - -* Thu Jan 15 2015 Josh Boyer -- Re-enable BUILD_DOCSRC - -* Thu Jan 15 2015 Josh Boyer - 3.19.0-0.rc4.git3.1 -- Linux v3.19-rc4-141-gf800c25b7a76 - -* Wed Jan 14 2015 Josh Boyer - 3.19.0-0.rc4.git2.1 -- Linux v3.19-rc4-46-g188c901941ef -- Enable I40E_VXLAN (rhbz 1182116) - -* Tue Jan 13 2015 Peter Robinson -- Enable Checkpoint/Restore on ARMv7 (rhbz 1146995) - -* Tue Jan 13 2015 Josh Boyer -- Add installonlypkg(kernel) to kernel-devel subpackages (rhbz 1079906) - -* Tue Jan 13 2015 Josh Boyer - 3.19.0-0.rc4.git1.1 -- Linux v3.19-rc4-23-g971780b70194 -- Reenable debugging options. - -* Mon Jan 12 2015 Josh Boyer - 3.19.0-0.rc4.git0.1 -- Linux v3.19-rc4 -- Disable debugging options. - -* Mon Jan 12 2015 Josh Boyer -- Backlight fixes for Samsung and Dell machines (rhbz 1094948 1115713) -- Add various UAS quirks (rhbz 1124119) -- Add patch to fix loop in VDSO (rhbz 1178975) - -* Fri Jan 09 2015 Josh Boyer - 3.19.0-0.rc3.git2.1 -- Linux v3.19-rc3-69-g11c8f01b423b - -* Wed Jan 07 2015 Kyle McMartin - 3.19.0-0.rc3.git1.2 -- kernel-arm64.patch: fix up build... no idea if it works. - -* Wed Jan 07 2015 Josh Boyer -- CVE-2014-9529 memory corruption or panic during key gc (rhbz 1179813 1179853) - -* Wed Jan 07 2015 Josh Boyer - 3.19.0-0.rc3.git1.1 -- Linux v3.19-rc3-38-gbdec41963890 -- Enable POWERCAP and INTEL_RAPL options -- Reenable debugging options. - -* Tue Jan 06 2015 Josh Boyer -- Linux v3.19-rc3 - -* Mon Jan 05 2015 Josh Boyer -- Linux v3.19-rc2 -- Temporarily disable aarch64patches -- Happy New Year - -* Sun Dec 28 2014 Josh Boyer -- Enable F2FS (rhbz 972446) - -* Thu Dec 18 2014 Josh Boyer - 3.18.1-2 -- CVE-2014-8989 userns can bypass group restrictions (rhbz 1170684 1170688) -- Fix from Kyle McMartin for target_core_user uapi issue since it's enabled -- Fix dm-cache crash (rhbz 1168434) -- Fix blk-mq crash on CPU hotplug (rhbz 1175261) - -* Wed Dec 17 2014 Josh Boyer - 3.18.1-1 -- Linux v3.18.1 -- CVE-2014-XXXX isofs: infinite loop in CE record entries (rhbz 1175235 1175250) -- Enable TCM_USER (rhbz 1174986) -- Enable USBIP in modules-extra from Johnathan Dieter (rhbz 1169478) - -* Tue Dec 16 2014 Josh Boyer - 3.18.0-2 -- Add patch from Josh Stone to restore var-tracking via Kconfig (rhbz 1126580) - -* Mon Dec 15 2014 Josh Boyer -- Fix ppc64 boot with smt-enabled=off (rhbz 1173806) -- CVE-2014-8133 x86: espfix(64) bypass via set_thread_area and CLONE_SETTLS (rhbz 1172797 1174374) -- CVE-2014-8559 deadlock due to incorrect usage of rename_lock (rhbz 1159313 1173814) - -* Fri Dec 12 2014 Kyle McMartin -- build in ahci_platform on aarch64 temporarily. - -* Fri Dec 12 2014 Josh Boyer -- Remove pointless warning in cfg80211 (rhbz 1172543) - -* Thu Dec 11 2014 Kyle McMartin -- kernel-arm64.patch: update from git. - -* Wed Dec 10 2014 Josh Boyer -- Fix UAS crashes with Seagate and Fresco Logic drives (rhbz 1164945) -- CVE-2014-8134 fix espfix for 32-bit KVM paravirt guests (rhbz 1172765 1172769) - -* Tue Dec 09 2014 Josh Boyer - 3.18.0-1 -- Linux v3.18 - -* Fri Dec 05 2014 Josh Boyer - 3.18.0-0.rc7.git3.1 -- Linux v3.18-rc7-59-g56c67ce187a8 - -* Thu Dec 04 2014 Josh Boyer - 3.18.0-0.rc7.git2.1 -- Linux v3.18-rc7-48-g7cc78f8fa02c - -* Wed Dec 03 2014 Josh Boyer - 3.18.0-0.rc7.git1.1 -- Linux v3.18-rc7-3-g3a18ca061311 - -* Mon Dec 01 2014 Josh Boyer - 3.18.0-0.rc7.git0.1 -- Linux v3.18-rc7 - -* Thu Nov 27 2014 Josh Boyer - 3.18.0-0.rc6.git1.1 -- Linux v3.18-rc6-28-g3314bf6ba2ac -- Gobble Gobble - -* Mon Nov 24 2014 Josh Boyer -- Linux v3.18-rc6 -- Add quirk for Laser Mouse 6000 (rhbz 1165206) - -* Fri Nov 21 2014 Josh Boyer -- Move TPM drivers to main kernel package (rhbz 1164937) - -* Wed Nov 19 2014 Josh Boyer -- Disable SERIAL_8250 on s390x (rhbz 1158848) - -* Mon Nov 17 2014 Kyle McMartin - 3.18.0-0.rc5.git0.2 -- Re-merge kernel-arm64.patch - -* Mon Nov 17 2014 Josh Boyer - 3.18.0-0.rc5.git0.1 -- Linux v3.18-rc5 -- Disable debugging options. - -* Fri Nov 14 2014 Josh Boyer -- Enable I40EVF driver (rhbz 1164029) - -* Fri Nov 14 2014 Josh Boyer - 3.18.0-0.rc4.git2.1 -- Linux v3.18-rc4-184-gb23dc5a7cc6e - -* Thu Nov 13 2014 Josh Boyer -- Add patch for MS Surface Pro 3 Type Cover (rhbz 1135338) -- CVE-2014-7843 aarch64: copying from /dev/zero causes local DoS (rhbz 1163744 1163745) - -* Thu Nov 13 2014 Josh Boyer - 3.18.0-0.rc4.git1.1 -- Linux v3.18-rc4-52-g04689e749b7e -- Reenable debugging options. - -* Wed Nov 12 2014 Josh Boyer -- CVE-2014-7841 sctp: NULL ptr deref on malformed packet (rhbz 1163087 1163095) - -* Tue Nov 11 2014 Kyle McMartin - 3.18.0-0.rc4.git0.2 -- Re-enable kernel-arm64.patch, and fix up merge conflicts with 3.18-rc4 - -* Mon Nov 10 2014 Josh Boyer -- Fix Samsung pci-e SSD handling on some macbooks (rhbz 1161805) - -* Mon Nov 10 2014 Josh Boyer - 3.18.0-0.rc4.git0.1 -- Linux v3.18-rc4 -- Temporarily disable aarch64patches -- Disable debugging options. - -* Fri Nov 07 2014 Josh Boyer - 3.18.0-0.rc3.git4.1 -- Linux v3.18-rc3-82-ged78bb846e8b - -* Thu Nov 06 2014 Josh Boyer - 3.18.0-0.rc3.git3.1 -- Linux v3.18-rc3-68-g20f3963d8f48 - -* Wed Nov 05 2014 Josh Boyer - 3.18.0-0.rc3.git2.1 -- Linux v3.18-rc3-61-ga1cff6e25e6e - -* Tue Nov 04 2014 Josh Boyer - 3.18.0-0.rc3.git1.1 -- Linux v3.18-rc3-31-g980d0d51b1c9 -- Reenable debugging options. - -* Mon Nov 03 2014 Josh Boyer -- Enable CONFIG_KXCJK1013 -- Add driver for goodix touchscreen from Bastien Nocera - -* Mon Nov 03 2014 Josh Boyer - 3.18.0-0.rc3.git0.1 -- Linux v3.18-rc3 -- Disable debugging options. - -* Thu Oct 30 2014 Josh Boyer - 3.18.0-0.rc2.git3.1 -- Linux v3.18-rc2-106-ga7ca10f263d7 - -* Wed Oct 29 2014 Josh Boyer - 3.18.0-0.rc2.git2.1 -- Linux v3.18-rc2-53-g9f76628da20f - -* Tue Oct 28 2014 Josh Boyer -- Add quirk for rfkill on Yoga 3 machines (rhbz 1157327) - -* Tue Oct 28 2014 Josh Boyer - 3.18.0-0.rc2.git1.1 -- Linux v3.18-rc2-43-gf7e87a44ef60 -- Add two RCU patches to fix a deadlock and a hang -- Reenable debugging options. - -* Mon Oct 27 2014 Josh Boyer - 3.18.0-0.rc2.git0.1 -- Linux v3.18-rc2 -- Disable debugging options. - -* Sun Oct 26 2014 Peter Robinson -- Update ARM config options, some minor cleanups - -* Sun Oct 26 2014 Josh Boyer - 3.18.0-0.rc1.git4.1 -- Linux v3.18-rc1-422-g2cc91884b6b3 - -* Fri Oct 24 2014 Josh Boyer - 3.18.0-0.rc1.git3.3 -- CVE-2014-3610 kvm: noncanonical MSR writes (rhbz 1144883 1156543) -- CVE-2014-3611 kvm: PIT timer race condition (rhbz 1144878 1156537) -- CVE-2014-3646 kvm: vmx: invvpid vm exit not handled (rhbz 1144825 1156534) -- CVE-2014-8369 kvm: excessive pages un-pinning in kvm_iommu_map error path (rhbz 1156518 1156522) -- CVE-2014-8480 CVE-2014-8481 kvm: NULL pointer dereference during rip relative instruction emulation (rhbz 1156615 1156616) - -* Fri Oct 24 2014 Josh Boyer - 3.18.0-0.rc1.git3.1 -- Linux v3.18-rc1-280-g816fb4175c29 -- Add touchpad quirk for Fujitsu Lifebook A544/AH544 models (rhbz 1111138) - -* Wed Oct 22 2014 Josh Boyer - 3.18.0-0.rc1.git2.1 -- Linux v3.18-rc1-221-gc3351dfabf5c -- Add patch to fix wifi on X550VB machines (rhbz 1089731) - -* Tue Oct 21 2014 Josh Boyer -- Drop pinctrl qcom revert now that it's dependencies should be merged - -* Tue Oct 21 2014 Kyle McMartin - 3.18.0-0.rc1.git1.2 -- Re-enable kernel-arm64.patch after updating. -- CONFIG_SERIAL_8250_FINTEK moved to generic since it appears on x86-generic - and arm64 now. -- CONFIG_IMX_THERMAL=n added to config-arm64. -- arm64: disable BPF_JIT temporarily - -* Tue Oct 21 2014 Josh Boyer - 3.18.0-0.rc1.git1.1 -- Linux v3.18-rc1-68-gc2661b806092 -- Make LOG_BUF_SHIFT on arm64 the same as the rest of the arches (rhbz 1123327) -- Enable RTC PL031 driver on arm64 (rhbz 1123882) -- Reenable debugging options. - -* Mon Oct 20 2014 Josh Boyer - 3.18.0-0.rc1.git0.1 -- Linux v3.18-rc1 -- Disable debugging options. - -* Fri Oct 17 2014 Josh Boyer - 3.18.0-0.rc0.git9.4 -- CVE-2014-8086 ext4: race condition (rhbz 1151353 1152608) -- Enable B43_PHY_G to fix b43 driver regression (rhbz 1152502) - -* Wed Oct 15 2014 Josh Boyer - 3.18.0-0.rc0.git9.3 -- Revert Btrfs ro snapshot commit that causes filesystem corruption - -* Wed Oct 15 2014 Josh Boyer - 3.18.0-0.rc0.git9.1 -- Linux v3.17-9670-g0429fbc0bdc2 - -* Tue Oct 14 2014 Josh Boyer -- Add patches to fix elantech touchscreens (rhbz 1149509) - -* Tue Oct 14 2014 Josh Boyer - 3.18.0-0.rc0.git8.1 -- Linux v3.17-9283-g2d65a9f48fcd - -* Tue Oct 14 2014 Josh Boyer - 3.18.0-0.rc0.git7.1 -- Linux v3.17-8307-gf1d0d14120a8 - -* Mon Oct 13 2014 Peter Robinson -- Update armv7/aarch64 config options - -* Mon Oct 13 2014 Josh Boyer - 3.18.0-0.rc0.git6.1 -- Linux v3.17-7872-g5ff0b9e1a1da - -* Sun Oct 12 2014 Josh Boyer - 3.18.0-0.rc0.git5.1 -- Linux v3.17-7639-g90eac7eee2f4 - -* Sun Oct 12 2014 Josh Boyer -- Enable CONFIG_I2C_DESIGNWARE_PCI (rhbz 1045821) - -* Fri Oct 10 2014 Josh Boyer -- CVE-2014-7970 VFS: DoS with USER_NS (rhbz 1151095 1151484) - -* Fri Oct 10 2014 Josh Boyer - 3.18.0-0.rc0.git4.1 -- Linux v3.17-6136-gc798360cd143 - -* Thu Oct 09 2014 Josh Boyer - 3.18.0-0.rc0.git3.1 -- Linux v3.17-5585-g782d59c5dfc5 - -* Thu Oct 09 2014 Josh Boyer - 3.18.0-0.rc0.git2.1 -- Linux v3.17-5503-g35a9ad8af0bb - -* Wed Oct 08 2014 Josh Boyer - 3.18.0-0.rc0.git1.1 -- Linux v3.17-2860-gef0625b70dac -- Reenable debugging options. -- Temporarily disable aarch64patches -- Add patch to fix ATA blacklist - -* Tue Oct 07 2014 Josh Boyer -- Add patch to fix GFS2 regression (from Bob Peterson) - -* Mon Oct 06 2014 Kyle McMartin -- enable 64K pages on arm64... (presently) needed to boot on amd seattle - platforms due to physical memory being unreachable. - -* Mon Oct 06 2014 Josh Boyer - 3.17.0-1 -- Linux v3.17 - -* Fri Oct 03 2014 Josh Boyer - 3.17.0-0.rc7.git3.1 -- Linux v3.17-rc7-76-g58586869599f -- Various ppc64/ppc64le config changes - -* Thu Oct 02 2014 Josh Boyer - 3.17.0-0.rc7.git2.1 -- Linux v3.17-rc7-46-g50dddff3cb9a -- Cleanup dead Kconfig symbols in config-* from Paul Bolle - -* Wed Oct 01 2014 Kyle McMartin -- Update kernel-arm64.patch from git, again... enable AMD_XGBE on arm64. - -* Wed Oct 01 2014 Josh Boyer - 3.17.0-0.rc7.git1.1 -- Linux v3.17-rc7-6-gaad7fb916a10 - -* Tue Sep 30 2014 Kyle McMartin - 3.17.0-0.rc7.git0.2 -- Revert some v3.16 changes to mach-highbank which broke L2 cache enablement. - Will debug upstream separately, but we need F22/21 running there. (#1139762) - -* Tue Sep 30 2014 Peter Robinson -- Don't build Exynos4 on lpae kernel -- Add dts for BananaPi -- Minor ARM updates -- Build 6lowpan modules - -* Mon Sep 29 2014 Kyle McMartin -- Update kernel-arm64.patch from git. - -* Mon Sep 29 2014 Josh Boyer - 3.17.0-0.rc7.git0.1 -- Linux v3.17-rc7 - -* Wed Sep 24 2014 Josh Boyer - 3.17.0-0.rc6.git2.1 -- Linux v3.17-rc6-180-g452b6361c4d9 - -* Tue Sep 23 2014 Josh Boyer -- Fix return code when adding keys (rhbz 1145318) -- Add patch to fix XPS 13 touchpad issue (rhbz 1123584) - -* Tue Sep 23 2014 Josh Boyer - 3.17.0-0.rc6.git1.1 -- Linux v3.17-rc6-125-gf3670394c29f - -* Mon Sep 22 2014 Josh Boyer - 3.17.0-0.rc6.git0.1 -- Linux v3.17-rc6 -- Revert EFI GOT fixes as it causes boot failures -- Disable debugging options. - -* Fri Sep 19 2014 Josh Boyer - 3.17.0-0.rc5.git5.1 -- Linux v3.17-rc5-105-g598a0c7d0932 - -* Fri Sep 19 2014 Josh Boyer -- Disable NO_HZ_FULL again -- Enable early microcode loading (rhbz 1083716) - -* Fri Sep 19 2014 Josh Boyer - 3.17.0-0.rc5.git4.1 -- Linux v3.17-rc5-63-gd9773ceabfaf -- Enable infiniband on s390x - -* Thu Sep 18 2014 Josh Boyer - 3.17.0-0.rc5.git3.1 -- Linux v3.17-rc5-25-g8ba4caf1ee15 - -* Wed Sep 17 2014 Kyle McMartin -- I also like to live dangerously. (Re-enable RCU_FAST_NO_HZ which has been off - since April 2012. Also enable NO_HZ_FULL on x86_64.) -- I added zipped modules ages ago, remove it from TODO. - -* Wed Sep 17 2014 Josh Boyer - 3.17.0-0.rc5.git2.1 -- Linux v3.17-rc5-24-g37504a3be90b -- Fix vmwgfx header include (rhbz 1138759) - -* Tue Sep 16 2014 Josh Boyer - 3.17.0-0.rc5.git1.1 -- Linux v3.17-rc5-13-g2324067fa9a4 -- Reenable debugging options. - -* Mon Sep 15 2014 Josh Boyer - 3.17.0-0.rc5.git0.1 -- Linux v3.17-rc5 -- Disable debugging options. - -* Fri Sep 12 2014 Josh Boyer - 3.17.0-0.rc4.git4.1 -- Linux v3.17-rc4-244-g5874cfed0b04 - -* Thu Sep 11 2014 Josh Boyer -- Enable ACPI_I2C_OPREGION - -* Thu Sep 11 2014 Josh Boyer - 3.17.0-0.rc4.git3.1 -- Linux v3.17-rc4-168-g7ec62d421bdf -- Add support for touchpad in Asus X450 and X550 (rhbz 1110011) - -* Wed Sep 10 2014 Josh Boyer - 3.17.0-0.rc4.git2.1 -- Linux v3.17-rc4-158-ge874a5fe3efa -- Add patch to fix oops on keyring gc (rhbz 1116347) - -* Tue Sep 09 2014 Josh Boyer - 3.17.0-0.rc4.git1.1 -- Linux v3.17-rc4-140-g8c68face5548 -- Reenable debugging options. - -* Mon Sep 08 2014 Josh Boyer -- Remove ppc32 support - -* Mon Sep 8 2014 Peter Robinson -- Build tools on ppc64le (rhbz 1138884) -- Some minor ppc64 cleanups - -* Mon Sep 08 2014 Josh Boyer - 3.17.0-0.rc4.git0.1 -- Linux v3.17-rc4 -- Disable debugging options. - -* Fri Sep 05 2014 Josh Boyer - 3.17.0-0.rc3.git3.1 -- Linux v3.17-rc3-94-gb7fece1be8b1 - -* Thu Sep 04 2014 Josh Boyer - 3.17.0-0.rc3.git2.1 -- Linux v3.17-rc3-63-g44bf091f5089 -- Enable kexec bzImage signature verification (from Vivek Goyal) -- Add support for Wacom Cintiq Companion from Benjamin Tissoires (rhbz 1134969) - -* Wed Sep 03 2014 Josh Boyer - 3.17.0-0.rc3.git1.1 -- Linux v3.17-rc3-16-g955837d8f50e -- Reenable debugging options. - -* Tue Sep 02 2014 Josh Boyer -- Remove with_extra switch - -* Mon Sep 01 2014 Josh Boyer - 3.17.0-0.rc3.git0.1 -- Linux v3.17-rc3 -- Disable debugging options. - -* Fri Aug 29 2014 Josh Boyer - 3.17.0-0.rc2.git3.1 -- Linux v3.17-rc2-89-g59753a805499 - -* Thu Aug 28 2014 Josh Boyer -- Fix NFSv3 ACL regression (rhbz 1132786) - -* Thu Aug 28 2014 Josh Boyer - 3.17.0-0.rc2.git2.1 -- Linux v3.17-rc2-42-gf1bd473f95e0 -- Don't enable CONFIG_DEBUG_WW_MUTEX_SLOWPATH (rhbz 1114160) - -* Wed Aug 27 2014 Josh Boyer - 3.17.0-0.rc2.git1.1 -- Disable streams on via XHCI (rhbz 1132666) -- Linux v3.17-rc2-9-g68e370289c29 -- Reenable debugging options. - -* Tue Aug 26 2014 Peter Robinson -- Minor tegra updates due to incorrect nvidia kernel config options - -* Tue Aug 26 2014 Josh Boyer - 3.17.0-0.rc2.git0.1 -- Linux v3.17-rc2 -- Fixup ARM MFD options after I2C=y change -- Disable debugging options. - -* Tue Aug 26 2014 Peter Robinson -- Minor generic ARMv7 updates -- Build tegra on both LPAE and general ARMv7 kernels (thank srwarren RHBZ 1110963) -- Set CMA to 64mb on LPAE kernel (RHBZ 1127000) - -* Mon Aug 25 2014 Josh Boyer - 3.17.0-0.rc1.git4.1 -- Linux v3.17-rc1-231-g7be141d05549 -- Add patch to fix NFS oops on /proc removal (rhbz 1132368) - -* Fri Aug 22 2014 Josh Boyer -- Drop userns revert patch (rhbz 917708) - -* Fri Aug 22 2014 Josh Boyer - 3.17.0-0.rc1.git3.1 -- Linux v3.17-rc1-99-g5317821c0853 - -* Thu Aug 21 2014 Josh Boyer - 3.17.0-0.rc1.git2.1 -- Linux v3.17-rc1-51-g372b1dbdd1fb - -* Wed Aug 20 2014 Josh Boyer - 3.17.0-0.rc1.git1.1 -- Linux v3.17-rc1-22-g480cadc2b7e0 -- Reenable debugging options. - -* Mon Aug 18 2014 Josh Boyer - 3.17.0-0.rc1.git0.1 -- Linux v3.17-rc1 -- Disable debugging options. - -* Sat Aug 16 2014 Josh Boyer - 3.17.0-0.rc0.git7.1 -- Linux v3.16-11452-g88ec63d6f85c - -* Fri Aug 15 2014 Josh Boyer - 3.17.0-0.rc0.git6.1 -- Linux v3.16-11383-gc9d26423e56c - -* Thu Aug 14 2014 Kyle McMartin -- kernel-arm64: resynch with git head (no functional change) - -* Thu Aug 14 2014 Josh Boyer - 3.17.0-0.rc0.git5.1 -- Linux v3.16-10959-gf0094b28f303 - -* Wed Aug 13 2014 Peter Robinson -- 3.17 ARMv7 updates -- Cleanup some old removed options -- Disable legacy USB OTG (using new configfs equivilents) - -* Tue Aug 12 2014 Kyle McMartin 3.17.0-0.rc0.git4.2 -- tegra-powergate-header-move.patch: deal with armv7hl breakage -- nouveau_platform-fix.patch: handle nouveau_dev() removal - -* Tue Aug 12 2014 Josh Boyer - 3.17.0-0.rc0.git4.1 -- Add updated crash driver from Dave Anderson and re-enable - -* Tue Aug 12 2014 Kyle McMartin -- kernel-arm64.patch: fix up merge conflict and re-enable - -* Tue Aug 12 2014 Josh Boyer -- Linux v3.16-10473-gc8d6637d0497 - -* Sat Aug 09 2014 Josh Boyer - 3.17.0-0.rc0.git3.1 -- Linux v3.16-10013-gc309bfa9b481 -- Temporarily don't apply crash driver patch - -* Thu Aug 07 2014 Josh Boyer - 3.17.0-0.rc0.git2.1 -- Linux v3.16-7503-g33caee39925b - -* Tue Aug 05 2014 Kyle McMartin -- kernel-arm64.patch: fix up merge conflict and re-enable - -* Tue Aug 05 2014 Josh Boyer - 3.17.0-0.rc0.git1.1 -- Linux v3.16-3652-gf19107379dbc -- Reenable debugging options. - -* Mon Aug 04 2014 Josh Boyer - 3.16.0-1 -- Linux v3.16 -- Disable debugging options. - -* Sun Aug 3 2014 Peter Robinson -- Minor config updates for Armada and Sunxi ARM devices - -* Fri Aug 01 2014 Josh Boyer - 3.16.0-0.rc7.git4.1 -- Linux v3.16-rc7-84-g6f0928036bcb - -* Thu Jul 31 2014 Josh Boyer - 3.16.0-0.rc7.git3.1 -- Linux v3.16-rc7-76-g3a1122d26c62 - -* Wed Jul 30 2014 Kyle McMartin -- kernel-arm64.patch: fix up merge conflict and re-enable - -* Wed Jul 30 2014 Josh Boyer - 3.16.0-0.rc7.git2.1 -- Linux v3.16-rc7-64-g26bcd8b72563 -- Temporarily disable aarch64patches - -* Wed Jul 30 2014 Josh Boyer -- Apply different patch from Milan Broz to fix LUKS partitions (rhbz 1115120) - -* Tue Jul 29 2014 Kyle McMartin -- kernel-arm64.patch: update from upstream git. - -* Tue Jul 29 2014 Josh Boyer - 3.16.0-0.rc7.git1.1 -- Linux v3.16-rc7-7-g31dab719fa50 -- Reenable debugging options. - -* Mon Jul 28 2014 Josh Boyer -- Make sure acpi brightness_switch is disabled (like forever in Fedora) -- CVE-2014-5077 sctp: fix NULL ptr dereference (rhbz 1122982 1123696) - -* Mon Jul 28 2014 Josh Boyer - 3.16.0-0.rc7.git0.1 -- Linux v3.16-rc7 -- Disable debugging options. - -* Mon Jul 28 2014 Peter Robinson -- Add patch to fix loading of tegra drm using device tree - -* Sat Jul 26 2014 Josh Boyer - 3.16.0-0.rc6.git3.1 -- Linux v3.16-rc6-139-g9c5502189fa0 - -* Fri Jul 25 2014 Josh Boyer - 3.16.0-0.rc6.git2.1 -- Linux v3.16-rc6-118-g82e13c71bc65 -- Fix selinux sock_graft hook for AF_ALG address family (rhbz 1115120) - -* Thu Jul 24 2014 Kyle McMartin -- kernel-arm64.patch: update from upstream git. -- arm64: update config-arm64 to include PCI support. - -* Thu Jul 24 2014 Josh Boyer -- CVE-2014-5045 vfs: refcount issues during lazy umount on symlink (rhbz 1122471 1122482) -- Fix regression in sched_setparam (rhbz 1117942) - -* Tue Jul 22 2014 Justin M. Forbes - 3.16.0-0.rc6.git1.1 -- Linux v3.16-rc6-75-g15ba223 -- Reenable debugging options. - -* Mon Jul 21 2014 Justin M. Forbes - 3.16.0-0.rc6.git0.1 -- Linux v3.16-rc6 -- Disable debugging options. - -* Mon Jul 21 2014 Peter Robinson -- Minor ARMv7 config update - -* Thu Jul 17 2014 Josh Boyer - 3.16.0-0.rc5.git2.1 -- Linux v3.16-rc5-143-gb6603fe574af - -* Wed Jul 16 2014 Josh Boyer -- Enable hermes prism driver (rhbz 1120393) - -* Wed Jul 16 2014 Josh Boyer - 3.16.0-0.rc5.git1.1 -- Linux v3.16-rc5-130-g2da294474093 -- Reenable debugging options. - -* Mon Jul 14 2014 Josh Boyer - 3.16.0-0.rc5.git0.1 -- Linux v3.16-rc5 -- Fix i915 regression with external monitors (rhbz 1117008) -- Disable debugging options. - -* Sat Jul 12 2014 Tom Callaway -- Fix license handling (I hope) - -* Fri Jul 11 2014 Josh Boyer - 3.16.0-0.rc4.git3.1 -- Linux v3.16-rc4-120-g85d90faed31e - -* Thu Jul 10 2014 Peter Robinson -- Rebase Utilute and BeagleBone patches -- Minor ARM updates -- Enable ISL12057 RTC for ARM (NetGear ReadyNAS) - -* Wed Jul 09 2014 Josh Boyer - 3.16.0-0.rc4.git2.1 -- Linux v3.16-rc4-28-g163e40743f73 -- Fix bogus vdso .build-id links (rhbz 1117563) - -* Tue Jul 08 2014 Josh Boyer - 3.16.0-0.rc4.git1.1 -- Linux v3.16-rc4-20-g448bfad8a185 -- Reenable debugging options. - -* Sun Jul 06 2014 Josh Boyer - 3.16.0-0.rc4.git0.1 -- Linux v3.16-rc4 -- Disable debugging options. - -* Fri Jul 04 2014 Josh Boyer - 3.16.0-0.rc3.git3.1 -- Linux v3.16-rc3-149-g034a0f6b7db7 - -* Wed Jul 02 2014 Josh Boyer - 3.16.0-0.rc3.git2.1 -- Linux v3.16-rc3-62-gd92a333a65a1 -- Add patch to fix virt_blk oops (rhbz 1113805) - -* Wed Jul 02 2014 Kyle McMartin -- arm64: build-in ahci, ethernet, and rtc drivers. - -* Tue Jul 01 2014 Josh Boyer - 3.16.0-0.rc3.git1.1 -- Linux v3.16-rc3-6-g16874b2cb867 -- Reenable debugging options. - -* Tue Jul 1 2014 Peter Robinson -- Minor ARMv7 cleanup - -* Mon Jun 30 2014 Kyle McMartin -- kernel-arm64.patch, update from git. - -* Mon Jun 30 2014 Josh Boyer - 3.16.0-0.rc3.git0.1.1 -- Linux v3.16-rc3 -- Enable USB rtsx drivers (rhbz 1114229) -- Disable debugging options. - -* Fri Jun 27 2014 Josh Boyer - 3.16.0-0.rc2.git4.1 -- Linux v3.16-rc2-222-g3493860c76eb - -* Fri Jun 27 2014 Hans de Goede -- Add patch to fix wifi on lenove yoga 2 series (rhbz#1021036) - -* Thu Jun 26 2014 Josh Boyer -- Enable rtl8192ee (rhbz 1113422) - -* Thu Jun 26 2014 Kyle McMartin - 3.16.0-0.rc2.git3.2 -- Add kernel-arm64.patch, which contains AArch64 support destined for upstream. - ssh://git.fedorahosted.org/git/kernel-arm64.git is Mark Salter's source tree - integrating these patches on the devel branch. I've added a twiddle to the - top of the spec file to disable the aarch64 patchset, and also set aarch64 - to nobuildarches, so we still get kernel-headers, but no one accidentally - installs a non-booting kernel if the patchset causes rejects during a - rebase. - -* Thu Jun 26 2014 Josh Boyer -- Trimmed changelog, see fedpkg git for earlier history. - -* Thu Jun 26 2014 Josh Boyer - 3.16.0-0.rc2.git3.1 -- Linux v3.16-rc2-211-gd7933ab727ed - -* Wed Jun 25 2014 Josh Boyer - 3.16.0-0.rc2.git2.1 -- Linux v3.16-rc2-69-gd91d66e88ea9 - -* Wed Jun 25 2014 Josh Boyer -- Revert commit that breaks Wacom Intuos4 from Benjamin Tissoires - -* Tue Jun 24 2014 Josh Boyer - 3.16.0-0.rc2.git1.1 -- Linux v3.16-rc2-35-g8b8f5d971584 -- Reenable debugging options. - -* Mon Jun 23 2014 Josh Boyer -- CVE-2014-4508 BUG in x86_32 syscall auditing (rhbz 1111590 1112073) - -* Mon Jun 23 2014 Josh Boyer - 3.16.0-0.rc2.git0.1 -- Linux v3.16-rc2 -- Disable debugging options. - -* Sun Jun 22 2014 Peter Robinson -- Enable Exynos now it's finally multi platform capable -- Minor TI Keystone update -- ARM config cleanups - -* Fri Jun 20 2014 Josh Boyer -- Bring in intel_pstate regression fixes for BayTrail (rhbz 1111920) - -* Fri Jun 20 2014 Josh Boyer - 3.16.0-0.rc1.git4.1 -- Linux v3.16-rc1-215-g3c8fb5044583 - -* Thu Jun 19 2014 Josh Boyer - 3.16.0-0.rc1.git3.1 -- Linux v3.16-rc1-112-g894e552cfaa3 - -* Thu Jun 19 2014 Peter Robinson -- Add missing bits for NVIDIA Jetson TK1 (thanks Stephen Warren) - -* Wed Jun 18 2014 Josh Boyer - 3.16.0-0.rc1.git2.1 -- Linux v3.16-rc1-17-ge99cfa2d0634 - -* Tue Jun 17 2014 Dennis Gilmore -- when ipuv3 moved out of staging the config was renamed -- adjust the config to suit - -* Tue Jun 17 2014 Josh Boyer - 3.16.0-0.rc1.git1.1 -- Linux v3.16-rc1-2-gebe06187bf2a -- Reenable debugging options. - -* Mon Jun 16 2014 Peter Robinson -- Enable Qualcomm SoCs on ARM - -* Mon Jun 16 2014 Josh Boyer - 3.16.0-0.rc1.git0.1 -- Linux v3.16-rc1 -- Disable debugging options. - -* Mon Jun 16 2014 Peter Robinson -- ARM config updates for 3.16 - -* Sat Jun 14 2014 Josh Boyer - 3.16.0-0.rc0.git11.1 -- Linux v3.15-9930-g0e04c641b199 -- Enable CONFIG_RCU_NOCB_CPU(_ALL) (rbhz 1109113) - -* Fri Jun 13 2014 Peter Robinson -- Add patch to fix build failure on aarch64 - -* Fri Jun 13 2014 Josh Boyer - 3.16.0-0.rc0.git10.1 -- Linux v3.15-9837-g682b7c1c8ea8 - -* Fri Jun 13 2014 Josh Boyer - 3.16.0-0.rc0.git9.1 -- Linux v3.15-8981-g5c02c392cd23 - -* Fri Jun 13 2014 Josh Boyer - 3.16.0-0.rc0.git8.1 -- Linux v3.15-8835-g859862ddd2b6 - -* Fri Jun 13 2014 Josh Boyer - 3.16.0-0.rc0.git7.1 -- Linux v3.15-8556-gdfb945473ae8 - -* Fri Jun 13 2014 Josh Boyer - 3.16.0-0.rc0.git6.1 -- Linux v3.15-8351-g9ee4d7a65383 - -* Thu Jun 12 2014 Josh Boyer - 3.16.0-0.rc0.git5.1 -- Linux v3.15-8163-g5b174fd6472b - -* Thu Jun 12 2014 Josh Boyer - 3.16.0-0.rc0.git4.1 -- Linux v3.15-7926-gd53b47c08d8f - -* Thu Jun 12 2014 Josh Boyer - 3.16.0-0.rc0.git3.1 -- Linux v3.15-7378-g14208b0ec569 - -* Wed Jun 11 2014 Josh Boyer - 3.16.0-0.rc0.git2.1 -- Linux v3.15-7283-gda85d191f58a - -* Tue Jun 10 2014 Josh Boyer - 3.16.0-0.rc0.git1.1 -- Linux v3.15-7218-g3f17ea6dea8b -- Reenable debugging options. - -* Mon Jun 09 2014 Josh Boyer - 3.15.0-1 -- Linux v3.15 -- Disable debugging options. - -* Mon Jun 9 2014 Peter Robinson -- Enable USB_EHCI_HCD_ORION to fix USB on Marvell (fix boot for some devices) - -* Fri Jun 06 2014 Josh Boyer - 3.15.0-0.rc8.git4.1 -- CVE-2014-3940 missing check during hugepage migration (rhbz 1104097 1105042) -- Linux v3.15-rc8-81-g951e273060d1 - -* Thu Jun 05 2014 Josh Boyer - 3.15.0-0.rc8.git3.1 -- Linux v3.15-rc8-72-g54539cd217d6 - -* Wed Jun 04 2014 Josh Boyer - 3.15.0-0.rc8.git2.1 -- Linux v3.15-rc8-58-gd2cfd3105094 - -* Tue Jun 03 2014 Josh Boyer -- Add filter-ppc64p7.sh because ppc64p7 is an entirely separate RPM arch - -* Tue Jun 03 2014 Josh Boyer - 3.15.0-0.rc8.git1.2 -- Fixes from Hans de Goede for backlight and platform drivers on various - machines. (rhbz 1025690 1012674 1093171 1097436 861573) - -* Tue Jun 03 2014 Josh Boyer - 3.15.0-0.rc8.git1.1 -- Add patch to install libtraceevent plugins from Kyle McMartin -- Linux v3.15-rc8-53-gcae61ba37b4c -- Reenable debugging options. - -* Mon Jun 2 2014 Peter Robinson -- Minor ARM MMC config updates - -* Mon Jun 02 2014 Josh Boyer - 3.15.0-0.rc8.git0.1 -- Linux v3.15-rc8 -- Disable debugging options. - -* Sat May 31 2014 Josh Boyer - 3.15.0-0.rc7.git4.2 -- Add patch to fix dentry lockdep splat - -* Sat May 31 2014 Josh Boyer - 3.15.0-0.rc7.git4.1 -- Linux v3.15-rc7-102-g1487385edb55 - -* Fri May 30 2014 Josh Boyer - 3.15.0-0.rc7.git3.1 -- Linux v3.15-rc7-79-gfe45736f4134 -- Disable CARL9170 on ppc64le - -* Thu May 29 2014 Josh Boyer -- CVE-2014-3917 DoS with syscall auditing (rhbz 1102571 1102715) - -* Wed May 28 2014 Josh Boyer - 3.15.0-0.rc7.git2.1 -- Linux v3.15-rc7-53-g4efdedca9326 - -* Wed May 28 2014 Josh Boyer - 3.15.0-0.rc7.git1.1 -- Linux v3.15-rc7-40-gcd79bde29f00 -- Reenable debugging options. - -* Mon May 26 2014 Josh Boyer - 3.15.0-0.rc7.git0.1 -- Linux v3.15-rc7 -- Disable debugging options. - -* Sun May 25 2014 Josh Boyer - 3.15.0-0.rc6.git1.1 -- Linux v3.15-rc6-213-gdb1003f23189 -- Reenable debugging options. - -* Thu May 22 2014 Josh Boyer -- Enable CONFIG_R8723AU (rhbz 1100162) - -* Thu May 22 2014 Josh Boyer - 3.15.0-0.rc6.git0.1 -- Linux v3.15-rc6 -- Disable debugging options. - -* Wed May 21 2014 Josh Boyer - 3.15.0-0.rc5.git4.1 -- Linux v3.15-rc5-270-gfba69f042ad9 - -* Tue May 20 2014 Josh Boyer - 3.15.0-0.rc5.git3.1 -- Linux v3.15-rc5-157-g60b5f90d0fac - -* Mon May 19 2014 Dan Horák -- kernel metapackage shouldn't depend on subpackages we don't build - -* Thu May 15 2014 Josh Boyer - 3.15.0-0.rc5.git2.9 -- Fix build fail on s390x - -* Wed May 14 2014 Josh Boyer - 3.15.0-0.rc5.git2.8 -- Enable autoprov for kernel module Provides (rhbz 1058331) -- Enable xz compressed modules (from Kyle McMartin) - -* Tue May 13 2014 Josh Boyer -- Don't try and merge local config changes on arches we aren't building - -* Tue May 13 2014 Josh Boyer - 3.15.0-0.rc5.git2.1 -- Linux v3.15-rc5-77-g14186fea0cb0 - -* Mon May 12 2014 Josh Boyer - 3.15.0-0.rc5.git1.1 -- Linux v3.15-rc5-9-g7e338c9991ec -- Reenable debugging options. - -* Sat May 10 2014 Peter Robinson -- Enable Marvell Dove support -- Minor ARM cleanups -- Disable some unneed drivers on ARM - -* Sat May 10 2014 Josh Boyer - 3.15.0-0.rc5.git0.1 -- Linux v3.15-rc5 -- Disable debugging options. - -* Fri May 09 2014 Josh Boyer -- Move isofs to kernel-core - -* Fri May 09 2014 Josh Boyer - 3.15.0-0.rc4.git4.1 -- Linux v3.15-rc4-320-gafcf0a2d9289 - -* Thu May 08 2014 Josh Boyer - 3.15.0-0.rc4.git3.1 -- Linux v3.15-rc4-298-g9f1eb57dc706 - -* Wed May 07 2014 Josh Boyer - 3.15.0-0.rc4.git2.1 -- Linux v3.15-rc4-260-g38583f095c5a - -* Tue May 06 2014 Josh Boyer - 3.15.0-0.rc4.git1.1 -- Linux v3.15-rc4-202-g30321c7b658a -- Reenable debugging options. - -* Mon May 5 2014 Peter Robinson -- Fix some USB on ARM LPAE kernels - -* Mon May 05 2014 Kyle McMartin -- Install arch/arm/include/asm/xen headers on aarch64, since the headers in - arch/arm64/include/asm/xen reference them. - -* Mon May 05 2014 Josh Boyer - 3.15.0-0.rc4.git0.1 -- Linux v3.15-rc4 -- Disable debugging options. - -* Mon May 5 2014 Hans de Goede -- Add use_native_brightness quirk for the ThinkPad T530 (rhbz 1089545) - -* Sun May 4 2014 Peter Robinson -- General minor ARM cleanups - -* Sun May 04 2014 Josh Boyer -- Fix k-m-e requires on k-m-uname-r provides -- ONE MORE TIME WITH FEELING - -* Sat May 3 2014 Peter Robinson -- Disable OMAP-3 boards (use DT) and some minor omap3 config updates - -* Sat May 03 2014 Josh Boyer - 3.15.0-0.rc3.git5.1 -- Linux v3.15-rc3-159-g6c6ca9c2a5b9 - -* Sat May 03 2014 Josh Boyer -- Add patch to fix HID rmi driver from Benjamin Tissoires (rhbz 1090161) - -* Sat May 03 2014 Josh Boyer -- Fix up Provides on kernel-module variant packages -- Enable CONFIG_USB_UAS unconditionally per Hans - -* Fri May 02 2014 Josh Boyer - 3.15.0-0.rc3.git4.1 -- Linux v3.15-rc3-121-gb7270cce7db7 - -* Thu May 01 2014 Josh Boyer -- Rename kernel-drivers to kernel-modules -- Add kernel metapackages for all flavors, not just debug - -* Thu May 1 2014 Hans de Goede -- Add use_native_backlight quirk for 4 laptops (rhbz 983342 1093120) - -* Wed Apr 30 2014 Josh Boyer - 3.15.0-0.rc3.git3.1 -- Linux v3.15-rc3-82-g8aa9e85adac6 - -* Wed Apr 30 2014 Josh Boyer -- Add kernel-debug metapackage when debugbuildsenabled is set - -* Wed Apr 30 2014 Josh Boyer - 3.15.0-0.rc3.git2.1 -- Linux v3.15-rc3-62-ged8c37e158cb -- Drop noarch from ExclusiveArch. Nothing is built as noarch - -* Tue Apr 29 2014 Josh Boyer - 3.15.0-0.rc3.git1.10 -- Make depmod call fatal if it errors or warns - -* Tue Apr 29 2014 Josh Boyer -- Introduce kernel-core/kernel-drivers split for F21 Feature work - -* Tue Apr 29 2014 Josh Boyer - 3.15.0-0.rc3.git1.1 -- Linux v3.15-rc3-41-g2aafe1a4d451 -- Reenable debugging options. - -* Mon Apr 28 2014 Josh Boyer - 3.15.0-0.rc3.git0.1 -- Linux v3.15-rc3 -- Disable debugging options. - -* Fri Apr 25 2014 Peter Robinson -- Drop obsolete ARM LPAE patches - -* Fri Apr 25 2014 Josh Boyer -- Add patch from Will Woods to fix fanotify EOVERFLOW issue (rhbz 696821) -- Fix ACPI issue preventing boot on AMI firmware (rhbz 1090746) - -* Fri Apr 25 2014 Hans de Goede -- Add synaptics min-max quirk for ThinkPad Edge E431 (rhbz#1089689) - -* Fri Apr 25 2014 Hans de Goede -- Add a patch to add support for the mmc controller on sunxi ARM SoCs - -* Thu Apr 24 2014 Josh Boyer - 3.15.0-0.rc2.git3.1 -- Linux v3.15-rc2-107-g76429f1dedbc - -* Wed Apr 23 2014 Josh Boyer - 3.15.0-0.rc2.git2.1 -- Linux v3.15-rc2-69-g1aae31c8306e - -* Tue Apr 22 2014 Josh Boyer - 3.15.0-0.rc2.git1.1 -- Linux v3.15-rc2-42-g4d0fa8a0f012 -- Reenable debugging options. - -* Tue Apr 22 2014 Josh Boyer -- Add patch to fix Synaptics touchscreens and HID rmi driver (rhbz 1089583) - -* Mon Apr 21 2014 Josh Boyer - 3.15.0-0.rc2.git0.1 -- Linux v3.15-rc2 -- Disable debugging options. - -* Fri Apr 18 2014 Josh Boyer - 3.15.0-0.rc1.git4.1 -- Linux v3.15-rc1-137-g81cef0fe19e0 - -* Thu Apr 17 2014 Josh Boyer - 3.15.0-0.rc1.git3.1 -- Linux v3.15-rc1-113-g6ca2a88ad820 -- Build perf with unwind support via libdw (rhbz 1025603) - -* Thu Apr 17 2014 Hans de Goede -- Update min/max quirk patch to add a quirk for the ThinkPad L540 (rhbz1088588) - -* Thu Apr 17 2014 Peter Robinson -- Drop OMAP DRM hack to load encoder module now it fully supports DT (YAY!) - -* Wed Apr 16 2014 Josh Boyer - 3.15.0-0.rc1.git2.1 -- Linux v3.15-rc1-49-g10ec34fcb100 - -* Tue Apr 15 2014 Josh Boyer - 3.15.0-0.rc1.git1.1 -- Linux v3.15-rc1-12-g55101e2d6ce1 -- Reenable debugging options. - -* Mon Apr 14 2014 Josh Boyer - 3.15.0-0.rc1.git0.1 -- Linux v3.15-rc1 -- Disable debugging options. -- Turn SLUB_DEBUG off - -* Mon Apr 14 2014 Hans de Goede -- Add min/max quirks for various new Thinkpad touchpads (rhbz 1085582 1085697) - -* Mon Apr 14 2014 Peter Robinson -- Minor ARM config changes and cleanups for 3.15 merge window - -* Mon Apr 14 2014 Josh Boyer -- CVE-2014-2851 net ipv4 ping refcount issue in ping_init_sock (rhbz 1086730 1087420) - -* Sun Apr 13 2014 Josh Boyer - 3.15.0-0.rc0.git13.1 -- Linux v3.14-12812-g321d03c86732 - -* Fri Apr 11 2014 Josh Boyer - 3.15.0-0.rc0.git12.1 -- Linux v3.14-12380-g9e897e13bd46 -- Add queued urgent efi fixes (rhbz 1085349) - -* Thu Apr 10 2014 Josh Boyer - 3.15.0-0.rc0.git11.1 -- Linux v3.14-12376-g4ba85265790b - -* Thu Apr 10 2014 Josh Boyer -- Backported HID RMI driver for Haswell Dell XPS machines from Benjamin Tissoires (rhbz 1048314) - -* Wed Apr 09 2014 Josh Boyer - 3.15.0-0.rc0.git10.1 -- Linux v3.14-12042-g69cd9eba3886 - -* Wed Apr 09 2014 Josh Boyer -- CVE-2014-0155 KVM: BUG caused by invalid guest ioapic redirect table (rhbz 1081589 1085016) - -* Thu Apr 03 2014 Josh Boyer - 3.15.0-0.rc0.git9.1 -- Linux v3.14-7333-g59ecc26004e7 - -* Thu Apr 03 2014 Josh Boyer - 3.15.0-0.rc0.git8.1 -- Linux v3.14-7247-gcd6362befe4c - -* Wed Apr 02 2014 Josh Boyer - 3.15.0-0.rc0.git7.1 -- Linux v3.14-5146-g0f1b1e6d73cb - -* Wed Apr 02 2014 Josh Boyer - 3.15.0-0.rc0.git6.1 -- Linux v3.14-4600-g467cbd207abd - -* Wed Apr 02 2014 Josh Boyer - 3.15.0-0.rc0.git5.1 -- Linux v3.14-4555-gb33ce4429938 - -* Wed Apr 02 2014 Josh Boyer - 3.15.0-0.rc0.git4.1 -- Linux v3.14-4227-g3e75c6de1ac3 - -* Wed Apr 02 2014 Josh Boyer - 3.15.0-0.rc0.git3.1 -- Linux v3.14-3893-gc12e69c6aaf7 - -* Tue Apr 01 2014 Josh Boyer - 3.15.0-0.rc0.git2.1 -- CVE-2014-2678 net: rds: deref of NULL dev in rds_iw_laddr_check (rhbz 1083274 1083280) - -* Tue Apr 01 2014 Josh Boyer -- Linux v3.14-751-g683b6c6f82a6 - -* Tue Apr 01 2014 Josh Boyer - 3.15.0-0.rc0.git1.1 -- Linux v3.14-313-g918d80a13643 -- Reenable debugging options. -- Turn on SLUB_DEBUG - -* Mon Mar 31 2014 Josh Boyer - 3.14.0-1 -- Linux v3.14 -- Disable debugging options. - -* Mon Mar 31 2014 Hans de Goede -- Fix clicks getting lost with cypress_ps2 touchpads with recent - xorg-x11-drv-synaptics versions (bfdo#76341) - -* Fri Mar 28 2014 Josh Boyer - 3.14.0-0.rc8.git1.1 -- CVE-2014-2580 xen: netback crash trying to disable due to malformed packet (rhbz 1080084 1080086) -- CVE-2014-0077 vhost-net: insufficent big packet handling in handle_rx (rhbz 1064440 1081504) -- CVE-2014-0055 vhost-net: insufficent error handling in get_rx_bufs (rhbz 1062577 1081503) -- CVE-2014-2568 net: potential info leak when ubuf backed skbs are zero copied (rhbz 1079012 1079013) - -* Fri Mar 28 2014 Josh Boyer -- Linux v3.14-rc8-12-g75c5a52 -- Reenable debugging options. - -* Fri Mar 28 2014 Peter Robinson -- Enable Tegra 114/124 SoCs -- Re-enable OMAP cpufreq -- Re-enable CPSW PTP option - -* Thu Mar 27 2014 Josh Boyer -- Switch to CONFIG_TRANSPARENT_HUGEPAGE_MADVISE instead of always on - -* Tue Mar 25 2014 Josh Boyer - 3.14.0-0.rc8.git0.1 -- Linux v3.14-rc8 -- Disable debugging options. - -* Mon Mar 24 2014 Peter Robinson -- Update some generic ARM config options -- Build in TPS65217 for ARM non lpae kernels (fixes BBW booting) - -* Fri Mar 21 2014 Josh Boyer - 3.14.0-0.rc7.git2.1 -- Linux v3.14-rc7-59-g08edb33 - -* Wed Mar 19 2014 Josh Boyer - 3.14.0-0.rc7.git1.1 -- Linux v3.14-rc7-26-g4907cdc -- Reenable debugging options. - -* Tue Mar 18 2014 Josh Boyer -- Enable TEGRA_FBDEV (rhbz 1073960) - -* Mon Mar 17 2014 Josh Boyer -- Add bootwrapper for ppc64le - -* Mon Mar 17 2014 Josh Boyer - 3.14.0-0.rc7.git0.1 -- Linux v3.14-rc7 -- Disable debugging options. - -* Mon Mar 17 2014 Peter Robinson -- Build in Palmas regulator on ARM to fix ext MMC boot on OMAP5 - -* Fri Mar 14 2014 Josh Boyer - 3.14.0-0.rc6.git4.1 -- Linux v3.14-rc6-133-gc60f7d5 - -* Thu Mar 13 2014 Josh Boyer - 3.14.0-0.rc6.git3.1 -- Linux v3.14-rc6-41-gac9dc67 - -* Wed Mar 12 2014 Josh Boyer - 3.14.0-0.rc6.git2.1 -- Fix locking issue in iwldvm (rhbz 1046495) -- Linux v3.14-rc6-26-g33807f4 - -* Wed Mar 12 2014 Peter Robinson -- Add some general missing ARM drivers (mostly sound) -- ARM config tweaks and cleanups -- Update i.MX6 dtb - -* Tue Mar 11 2014 Josh Boyer - 3.14.0-0.rc6.git1.1 -- CVE-2014-2309 ipv6: crash due to router advertisment flooding (rhbz 1074471 1075064) -- Linux v3.14-rc6-17-g8712a00 -- Reenable debugging options. - -* Mon Mar 10 2014 Josh Boyer - 3.14.0-0.rc6.git0.1 -- Linux v3.14-rc6 -- Disable debugging options. - -* Fri Mar 07 2014 Josh Boyer -- Revert two xhci fixes that break USB mass storage (rhbz 1073180) - -* Thu Mar 06 2014 Josh Boyer -- Fix stale EC events on Samsung systems (rhbz 1003602) -- Add ppc64le support from Brent Baude (rhbz 1073102) -- Fix depmod error message from hci_vhci module (rhbz 1051748) -- Fix bogus WARN in iwlwifi (rhbz 1071998) - -* Wed Mar 05 2014 Josh Boyer - 3.14.0-0.rc5.git2.1 -- Linux v3.14-rc5-185-gc3bebc7 - -* Tue Mar 04 2014 Josh Boyer - 3.14.0-0.rc5.git1.1 -- Linux v3.14-rc5-43-g0c0bd34 -- Reenable debugging options. - -* Mon Mar 03 2014 Josh Boyer - 3.14.0-0.rc5.git0.1 -- Linux v3.14-rc5 -- Disable debugging options. - -* Fri Feb 28 2014 Josh Boyer - 3.14.0-0.rc4.git3.1 -- Linux v3.14-rc4-78-gd8efcf3 - -* Fri Feb 28 2014 Kyle McMartin -- Enable appropriate CONFIG_XZ_DEC_$arch options to ensure we can mount - squashfs images on supported architectures. - -* Fri Feb 28 2014 Josh Boyer -- CVE-2014-0102 keyctl_link can be used to cause an oops (rhbz 1071396) - -* Thu Feb 27 2014 Josh Boyer - 3.14.0-0.rc4.git2.1 -- Linux v3.14-rc4-45-gd2a0476 - -* Wed Feb 26 2014 Josh Boyer - 3.14.0-0.rc4.git1.1 -- Linux v3.14-rc4-34-g6dba6ec -- Reenable debugging options. - -* Wed Feb 26 2014 Peter Robinson -- Re-enable KVM on aarch64 now it builds again - -* Tue Feb 25 2014 Josh Boyer -- Fix mounting issues on cifs (rhbz 1068862) - -* Mon Feb 24 2014 Josh Boyer -- Fix lockdep issue in EHCI when using threaded IRQs (rhbz 1056170) - -* Mon Feb 24 2014 Josh Boyer - 3.14.0-0.rc4.git0.1 -- Linux v3.14-rc4 -- Disable debugging options. - -* Thu Feb 20 2014 Josh Boyer - 3.14.0-0.rc3.git5.1 -- Linux v3.14-rc3-219-gd158fc7 - -* Thu Feb 20 2014 Kyle McMartin -- armv7: disable CONFIG_DEBUG_SET_MODULE_RONX until debugged (rhbz#1067113) - -* Thu Feb 20 2014 Josh Boyer - 3.14.0-0.rc3.git4.1 -- Linux v3.14-rc3-184-ge95003c - -* Wed Feb 19 2014 Josh Boyer - 3.14.0-0.rc3.git3.1 -- Linux v3.14-rc3-168-g960dfc4 - -* Tue Feb 18 2014 Josh Boyer - 3.14.0-0.rc3.git2.1 -- Linux v3.14-rc3-43-g805937c - -* Tue Feb 18 2014 Josh Boyer - 3.14.0-0.rc3.git1.1 -- Linux v3.14-rc3-20-g60f76ea -- Reenable debugging options. -- Fix r8169 ethernet after suspend (rhbz 1054408) -- Enable INTEL_MIC drivers (rhbz 1064086) - -* Mon Feb 17 2014 Josh Boyer - 3.14.0-0.rc3.git0.1 -- Linux v3.14-rc3 -- Disable debugging options. -- Enable CONFIG_PPC_DENORMALIZATION (from Tony Breeds) - -* Fri Feb 14 2014 Josh Boyer - 3.14.0-0.rc2.git4.1 -- Linux v3.14-rc2-342-g5e57dc8 -- CVE-2014-0069 cifs: incorrect handling of bogus user pointers (rhbz 1064253 1062578) - -* Thu Feb 13 2014 Josh Boyer - 3.14.0-0.rc2.git3.1 -- Linux v3.14-rc2-271-g4675348 - -* Wed Feb 12 2014 Josh Boyer - 3.14.0-0.rc2.git2.1 -- Linux v3.14-rc2-267-g9398a10 - -* Wed Feb 12 2014 Josh Boyer -- Fix cgroup destroy oops (rhbz 1045755) -- Fix backtrace in amd_e400_idle (rhbz 1031296) - -* Tue Feb 11 2014 Josh Boyer - 3.14.0-0.rc2.git1.1 -- Linux v3.14-rc2-26-g6792dfe -- Reenable debugging options. - -* Mon Feb 10 2014 Josh Boyer - 3.14.0-0.rc2.git0.1 -- Linux v3.14-rc2 -- Disable debugging options. - -* Sun Feb 9 2014 Peter Robinson -- Enable CMA on aarch64 -- Disable KVM temporarily on aarch64 -- Minor ARM config updates and cleanups - -* Sun Feb 09 2014 Josh Boyer - 3.14.0-0.rc1.git5.1.1 -- Linux v3.14-rc1-182-g4944790 - -* Sat Feb 08 2014 Josh Boyer - 3.14.0-0.rc1.git4.1 -- Linux v3.14-rc1-150-g34a9bff - -* Fri Feb 07 2014 Josh Boyer - 3.14.0-0.rc1.git3.1 -- Linux v3.14-rc1-86-g9343224 - -* Thu Feb 06 2014 Josh Boyer - 3.14.0-0.rc1.git2.1 -- Linux v3.14-rc1-54-gef42c58 - -* Wed Feb 05 2014 Josh Boyer - 3.14.0-0.rc1.git1.1 -- Linux v3.14-rc1-13-g878a876 - -* Tue Feb 04 2014 Kyle McMartin -- Fix %all_arch_configs on aarch64. - -* Tue Feb 04 2014 Josh Boyer - 3.14.0-0.rc1.git0.2 -- Add NUMA oops patches -- Reenable debugging options. - -* Mon Feb 03 2014 Josh Boyer - 3.14.0-0.rc1.git0.1 -- Linux v3.14-rc1 -- Disable debugging options. -- Disable Xen on ARM temporarily as it doesn't build - -* Mon Feb 3 2014 Peter Robinson -- Re-enable modular Tegra DRM driver -- Add SD driver for ZYNQ SoCs - -* Fri Jan 31 2014 Josh Boyer - 3.14.0-0.rc0.git19.1 -- Linux v3.13-10637-ge7651b8 -- Enable ZRAM/ZSMALLOC (rhbz 1058072) -- Turn EXYNOS_HDMI back on now that it should build - -* Thu Jan 30 2014 Josh Boyer - 3.14.0-0.rc0.git18.1 -- Linux v3.13-10231-g53d8ab2 - -* Thu Jan 30 2014 Josh Boyer - 3.14.0-0.rc0.git17.1 -- Linux v3.13-10094-g9b0cd30 -- Add patches to fix imx-hdmi build, and fix kernfs lockdep oops (rhbz 1055105) - -* Thu Jan 30 2014 Josh Boyer - 3.14.0-0.rc0.git16.1 -- Linux v3.13-9240-g1329311 - -* Wed Jan 29 2014 Josh Boyer - 3.14.0-0.rc0.git15.1 -- Linux v3.13-9218-g0e47c96 - -* Tue Jan 28 2014 Josh Boyer - 3.14.0-0.rc0.git14.1 -- Linux v3.13-8905-g627f4b3 - -* Tue Jan 28 2014 Josh Boyer - 3.14.0-0.rc0.git13.1 -- Linux v3.13-8789-g54c0a4b -- Enable CONFIG_CC_STACKPROTECTOR_STRONG on x86 - -* Mon Jan 27 2014 Peter Robinson -- Build AllWinner (sunxi) on LPAE too (Cortex-A7 supports LPAE/KVM) - -* Mon Jan 27 2014 Josh Boyer - 3.14.0-0.rc0.git12.1 -- Linux v3.13-8631-gba635f8 - -* Mon Jan 27 2014 Josh Boyer - 3.14.0-0.rc0.git11.1 -- Linux v3.13-8598-g77d143d - -* Sat Jan 25 2014 Josh Boyer - 3.14.0-0.rc0.git10.1 -- Linux v3.13-8330-g4ba9920 - -* Sat Jan 25 2014 Josh Boyer - 3.14.0-0.rc0.git9.1 -- Linux v3.13-6058-g2d08cd0 -- Quiet incorrect usb phy error (rhbz 1057529) - -* Sat Jan 25 2014 Ville Skyttä -- Own the /lib/modules dir. - -* Sat Jan 25 2014 Peter Robinson -- Initial ARM config updates for 3.14 -- Disable highbank cpuidle driver -- Enable mtd-nand drivers on ARM -- Update CPU thermal scaling options for ARM - -* Fri Jan 24 2014 Josh Boyer - 3.14.0-0.rc0.git8.1 -- Linux v3.13-5617-g3aacd62 - -* Thu Jan 23 2014 Josh Boyer - 3.14.0-0.rc0.git7.1 -- Linux v3.13-4156-g90804ed - -* Thu Jan 23 2014 Josh Boyer - 3.14.0-0.rc0.git6.1.1 -- Revert fsnotify changes as they cause slab corruption for multiple people -- Linux v3.13-3995-g0dc3fd0 - -* Thu Jan 23 2014 Josh Boyer - 3.14.0-0.rc0.git5.1 -- Linux v3.13-3667-ge1ba845 - -* Wed Jan 22 2014 Josh Boyer - 3.14.0-0.rc0.git4.1 -- Linux v3.13-3477-gdf32e43 - -* Wed Jan 22 2014 Josh Boyer - 3.14.0-0.rc0.git3.1 -- Linux v3.13-3260-g03d11a0 - -* Wed Jan 22 2014 Josh Boyer - 3.14.0-0.rc0.git2.1 -- Linux v3.13-2502-gec513b1 - -* Tue Jan 21 2014 Josh Boyer - 3.14.0-0.rc0.git1.1 -- Linux v3.13-737-g7fe67a1 -- Reenable debugging options. Enable SLUB_DEBUG - -* Mon Jan 20 2014 Kyle McMartin -- Enable CONFIG_KVM on AArch64. - -* Mon Jan 20 2014 Josh Boyer - 3.13.0-1 -- Linux v3.13 -- Disable debugging options. -- Use versioned perf man pages tarball ### # The following Emacs magic makes C-c C-e use UTC dates. # Local Variables: diff --git a/media-ivtv-avoid-going-past-input-audio-array.patch b/media-ivtv-avoid-going-past-input-audio-array.patch deleted file mode 100644 index 42009eb71..000000000 --- a/media-ivtv-avoid-going-past-input-audio-array.patch +++ /dev/null @@ -1,29 +0,0 @@ -From d55ebd07b6c21a1c7e3e74f1b73b3b033cece2b5 Mon Sep 17 00:00:00 2001 -From: Mauro Carvalho Chehab -Date: Wed, 11 Nov 2015 09:27:42 -0200 -Subject: [PATCH] [media] ivtv: avoid going past input/audio array - -As reported by smatch: - drivers/media/pci/ivtv/ivtv-driver.c:832 ivtv_init_struct2() error: buffer overflow 'itv->card->video_inputs' 6 <= 6 - -Signed-off-by: Mauro Carvalho Chehab ---- - drivers/media/pci/ivtv/ivtv-driver.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/media/pci/ivtv/ivtv-driver.c b/drivers/media/pci/ivtv/ivtv-driver.c -index c2e60b4f292d..2bb10cd9ecfd 100644 ---- a/drivers/media/pci/ivtv/ivtv-driver.c -+++ b/drivers/media/pci/ivtv/ivtv-driver.c -@@ -826,7 +826,7 @@ static void ivtv_init_struct2(struct ivtv *itv) - IVTV_CARD_INPUT_VID_TUNER) - break; - } -- if (i == itv->nof_inputs) -+ if (i >= itv->nof_inputs) - i = 0; - itv->active_input = i; - itv->audio_input = itv->card->video_inputs[i].audio_index; --- -2.5.0 - diff --git a/mfd-wm8994-Ensure-that-the-whole-MFD-is-built-into-a.patch b/mfd-wm8994-Ensure-that-the-whole-MFD-is-built-into-a.patch deleted file mode 100644 index dfedd2ab0..000000000 --- a/mfd-wm8994-Ensure-that-the-whole-MFD-is-built-into-a.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 567a18f57213647e2c31bbdc7f6b8f9991d22fad Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Fri, 13 Nov 2015 19:03:29 +0000 -Subject: [PATCH] mfd: wm8994: Ensure that the whole MFD is built into a single - module - -Signed-off-by: Charles Keepax ---- - drivers/mfd/Makefile | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile -index a59e3fc..4a767ef 100644 ---- a/drivers/mfd/Makefile -+++ b/drivers/mfd/Makefile -@@ -61,7 +61,8 @@ wm8350-objs := wm8350-core.o wm8350-regmap.o wm8350-gpio.o - wm8350-objs += wm8350-irq.o - obj-$(CONFIG_MFD_WM8350) += wm8350.o - obj-$(CONFIG_MFD_WM8350_I2C) += wm8350-i2c.o --obj-$(CONFIG_MFD_WM8994) += wm8994-core.o wm8994-irq.o wm8994-regmap.o -+wm8994-objs := wm8994-core.o wm8994-irq.o wm8994-regmap.o -+obj-$(CONFIG_MFD_WM8994) += wm8994.o - - obj-$(CONFIG_TPS6105X) += tps6105x.o - obj-$(CONFIG_TPS65010) += tps65010.o --- -2.5.0 - diff --git a/mod-extra.list b/mod-extra.list index 9794fefb0..f5841c961 100644 --- a/mod-extra.list +++ b/mod-extra.list @@ -1,44 +1,125 @@ +6pack.ko +a3d.ko +act200l-sir.ko +actisys-sir.ko +adi.ko aer_inject.ko -tcp_bic.ko -tcp_westwood.ko -tcp_htcp.ko -tcp_highspeed.ko -tcp_hybla.ko -tcp_vegas.ko -tcp_scalable.ko -tcp_lp.ko -tcp_veno.ko -tcp_yeah.ko -tcp_illinois.ko +af_802154.ko +affs.ko +ali-ircc.ko +analog.ko +appletalk.ko +atm.ko +avma1_cs.ko +avm_cs.ko +avmfritz.ko +ax25.ko +b1.ko +bas_gigaset.ko +batman-adv.ko +baycom_par.ko +baycom_ser_fdx.ko +baycom_ser_hdx.ko +befs.ko +bpqether.ko +br2684.ko +capi.ko +c_can.ko +c_can_platform.ko +clip.ko +cobra.ko +coda.ko +cuse.ko +db9.ko dccp_diag.ko dccp_ipv4.ko dccp_ipv6.ko dccp.ko dccp_probe.ko +diva_idi.ko +divas.ko dlm.ko -sctp.ko -sctp_probe.ko -rds.ko -rds_rdma.ko -rds_tcp.ko -atm.ko -br2684.ko -clip.ko -lec.ko -pppoatm.ko +ds1wm.ko +ds2482.ko +ds2490.ko +dss1_divert.ko +elsa_cs.ko +ems_pci.ko +ems_usb.ko +esd_usb2.ko +esi-sir.ko +gamecon.ko +gf2k.ko +gfs2.ko +gigaset.ko +girbil-sir.ko +grip.ko +grip_mp.ko +guillemot.ko +hdlcdrv.ko +hfc4s8s_l1.ko +hfcmulti.ko +hfcpci.ko +hisax.ko +hwa-rc.ko +hysdn.ko +i2400m.ko +i2400m-sdio.ko +i2400m-usb.ko +ieee802154.ko +iforce.ko +interact.ko +ipddp.ko +ipx.ko +isdn.ko +joydump.ko +kingsun-sir.ko +ks959-sir.ko +ksdazzle-sir.ko +kvaser_pci.ko l2tp_core.ko l2tp_debugfs.ko l2tp_eth.ko l2tp_ip.ko l2tp_netlink.ko l2tp_ppp.ko -ipx.ko -appletalk.ko -ipddp.ko -wanrouter.ko +lec.ko +ma600-sir.ko +magellan.ko +mcp2120-sir.ko +mISDN_core.ko +mISDN_dsp.ko +mkiss.ko +mptbase.ko +mptctl.ko +mptfc.ko +nci.ko +ncpfs.ko +netjet.ko +netrom.ko +nfc.ko +nilfs2.ko +ocfs2_dlmfs.ko +ocfs2_dlm.ko +ocfs2.ko +ocfs2_nodemanager.ko +ocfs2_stackglue.ko +ocfs2_stack_o2cb.ko +ocfs2_stack_user.ko +old_belkin-sir.ko +orinoco_cs.ko +orinoco.ko +orinoco_nortel.ko +orinoco_pci.ko +orinoco_plx.ko +orinoco_usb.ko +plx_pci.ko pn_pep.ko -af_802154.ko -ieee802154.ko +pppoatm.ko +rds.ko +rds_rdma.ko +rds_tcp.ko +rose.ko sch_atm.ko sch_cbq.ko sch_choke.ko @@ -52,143 +133,61 @@ sch_qfq.ko sch_red.ko sch_sfb.ko sch_teql.ko -ax25.ko -netrom.ko -rose.ko -6pack.ko -baycom_par.ko -baycom_ser_fdx.ko -baycom_ser_hdx.ko -bpqether.ko -hdlcdrv.ko -mkiss.ko -yam.ko -slcan.ko -vcan.ko -c_can.ko -c_can_platform.ko -ems_pci.ko -kvaser_pci.ko -plx_pci.ko +sctp.ko +sctp_probe.ko +sidewinder.ko sja1000.ko sja1000_platform.ko +slcan.ko +slip.ko softing_cs.ko softing.ko -ems_usb.ko -esd_usb2.ko -nfc.ko -nci.ko -mptbase.ko -mptctl.ko -mptfc.ko -i2400m.ko -i2400m-usb.ko -i2400m-sdio.ko -hisax.ko -hysdn.ko -isdn.ko -mISDN_core.ko -mISDN_dsp.ko -capi.ko -dss1_divert.ko -bas_gigaset.ko -gigaset.ko -avm_cs.ko -b1.ko -diva_idi.ko -divas.ko -avmfritz.ko -hfcpci.ko -hfcmulti.ko -netjet.ko -w6692.ko -avma1_cs.ko -elsa_cs.ko -hfc4s8s_l1.ko -joydev.ko -a3d.ko -adi.ko -analog.ko -cobra.ko -db9.ko -gamecon.ko -gf2k.ko -grip.ko -grip_mp.ko -guillemot.ko -iforce.ko -interact.ko -joydump.ko -magellan.ko -sidewinder.ko spaceball.ko spaceorb.ko stinger.ko +sysv.ko +tcp_bic.ko +tcp_highspeed.ko +tcp_htcp.ko +tcp_hybla.ko +tcp_illinois.ko +tcp_lp.ko +tcp_scalable.ko +tcp_vegas.ko +tcp_veno.ko +tcp_westwood.ko +tcp_yeah.ko +tekram-sir.ko tmdc.ko +toim3232-sir.ko +trancevibrator.ko turbografx.ko twidjoy.ko -walkera0701.ko -warrior.ko -xpad.ko -zhenhua.ko -trancevibrator.ko -umc.ko -uwb.ko -whci.ko -hwa-rc.ko -gfs2.ko -ocfs2.ko -ocfs2_dlm.ko -ocfs2_dlmfs.ko -ocfs2_nodemanager.ko -ocfs2_stackglue.ko -ocfs2_stack_o2cb.ko -ocfs2_stack_user.ko -cuse.ko -affs.ko -befs.ko -sysv.ko +ubifs.ko ufs.ko -ncpfs.ko -coda.ko -act200l-sir.ko -ali-ircc.ko -esi-sir.ko -tekram-sir.ko -actisys-sir.ko -girbil-sir.ko -old_belkin-sir.ko -kingsun-sir.ko -ks959-sir.ko -ksdazzle-sir.ko -ma600-sir.ko -mcp2120-sir.ko -toim3232-sir.ko -slip.ko -nilfs2.ko -batman-adv.ko -wire.ko -ds1wm.ko -ds2490.ko -ds2482.ko -w1_ds2780.ko -w1_therm.ko +umc.ko +usbip-core.ko +usbip-host.ko +uwb.ko +vcan.ko +vhci-hcd.ko +w1_bq27000.ko +w1_ds2408.ko +w1_ds2423.ko +w1_ds2431.ko w1_ds2433.ko w1_ds2760.ko -w1_ds28e04.ko -w1_ds2408.ko +w1_ds2780.ko w1_ds2781.ko +w1_ds28e04.ko w1_smem.ko -w1_ds2431.ko -w1_ds2423.ko -w1_bq27000.ko -ubifs.ko -orinoco.ko -orinoco_cs.ko -orinoco_plx.ko -orinoco_pci.ko -orinoco_nortel.ko -orinoco_usb.ko -usbip-core.ko -vhci-hcd.ko -usbip-host.ko +w1_therm.ko +w6692.ko +walkera0701.ko +wanrouter.ko +warrior.ko +whci.ko +wire.ko +xpad.ko +yam.ko +zhenhua.ko diff --git a/net-inet-fix-race-in-reqsk_queue_unlink.patch b/net-inet-fix-race-in-reqsk_queue_unlink.patch deleted file mode 100644 index 744084314..000000000 --- a/net-inet-fix-race-in-reqsk_queue_unlink.patch +++ /dev/null @@ -1,76 +0,0 @@ -From patchwork Thu Oct 1 12:39:26 2015 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [net] inet: fix race in reqsk_queue_unlink() -From: Eric Dumazet -X-Patchwork-Id: 524966 -Message-Id: <1443703166.32531.47.camel@edumazet-glaptop2.roam.corp.google.com> -To: David Miller -Cc: netdev , Yuchung Cheng -Date: Thu, 01 Oct 2015 05:39:26 -0700 - -From: Eric Dumazet - -reqsk_timer_handler() tests if icsk_accept_queue.listen_opt -is NULL at its beginning. - -By the time it calls inet_csk_reqsk_queue_drop() and -reqsk_queue_unlink(), listener might have been closed and -inet_csk_listen_stop() had called reqsk_queue_yank_acceptq() -which sets icsk_accept_queue.listen_opt to NULL - -We therefore need to correctly check listen_opt being NULL -after holding syn_wait_lock for proper synchronization. - -Fixes: fa76ce7328b2 ("inet: get rid of central tcp/dccp listener timer") -Fixes: b357a364c57c ("inet: fix possible panic in reqsk_queue_unlink()") -Signed-off-by: Eric Dumazet -Cc: Yuchung Cheng ---- - net/ipv4/inet_connection_sock.c | 19 ++++++++++--------- - 1 file changed, 10 insertions(+), 9 deletions(-) - - - --- -To unsubscribe from this list: send the line "unsubscribe netdev" in -the body of a message to majordomo@vger.kernel.org -More majordomo info at http://vger.kernel.org/majordomo-info.html - -diff --git a/net/ipv4/inet_connection_sock.c b/net/ipv4/inet_connection_sock.c -index 7bb9c39e0a4d..61b45a17fc73 100644 ---- a/net/ipv4/inet_connection_sock.c -+++ b/net/ipv4/inet_connection_sock.c -@@ -577,21 +577,22 @@ EXPORT_SYMBOL(inet_rtx_syn_ack); - static bool reqsk_queue_unlink(struct request_sock_queue *queue, - struct request_sock *req) - { -- struct listen_sock *lopt = queue->listen_opt; - struct request_sock **prev; -+ struct listen_sock *lopt; - bool found = false; - - spin_lock(&queue->syn_wait_lock); -- -- for (prev = &lopt->syn_table[req->rsk_hash]; *prev != NULL; -- prev = &(*prev)->dl_next) { -- if (*prev == req) { -- *prev = req->dl_next; -- found = true; -- break; -+ lopt = queue->listen_opt; -+ if (lopt) { -+ for (prev = &lopt->syn_table[req->rsk_hash]; *prev != NULL; -+ prev = &(*prev)->dl_next) { -+ if (*prev == req) { -+ *prev = req->dl_next; -+ found = true; -+ break; -+ } - } - } -- - spin_unlock(&queue->syn_wait_lock); - if (timer_pending(&req->rsk_timer) && del_timer_sync(&req->rsk_timer)) - reqsk_put(req); diff --git a/netfilter-x_tables-deal-with-bogus-nextoffset-values.patch b/netfilter-x_tables-deal-with-bogus-nextoffset-values.patch new file mode 100644 index 000000000..ebfe1716f --- /dev/null +++ b/netfilter-x_tables-deal-with-bogus-nextoffset-values.patch @@ -0,0 +1,150 @@ +Subject: [PATCH nf] netfilter: x_tables: deal with bogus nextoffset values +From: Florian Westphal +Date: 2016-03-10 0:56:02 + +Ben Hawkes says: + + In the mark_source_chains function (net/ipv4/netfilter/ip_tables.c) it + is possible for a user-supplied ipt_entry structure to have a large + next_offset field. This field is not bounds checked prior to writing a + counter value at the supplied offset. + +Problem is that xt_entry_foreach() macro stops iterating once e->next_offset +is out of bounds, assuming this is the last entry. + +With malformed data thats not necessarily the case so we can +write outside of allocated area later as we might not have walked the +entire blob. + +Fix this by simplifying mark_source_chains -- it already has to check +if nextoff is in range to catch invalid jumps, so just do the check +when we move to a next entry as well. + +Signed-off-by: Florian Westphal +--- + net/ipv4/netfilter/arp_tables.c | 16 ++++++++-------- + net/ipv4/netfilter/ip_tables.c | 15 ++++++++------- + net/ipv6/netfilter/ip6_tables.c | 13 ++++++------- + 3 files changed, 22 insertions(+), 22 deletions(-) + +diff --git a/net/ipv4/netfilter/arp_tables.c b/net/ipv4/netfilter/arp_tables.c +index b488cac..5a0b591 100644 +--- a/net/ipv4/netfilter/arp_tables.c ++++ b/net/ipv4/netfilter/arp_tables.c +@@ -437,6 +437,10 @@ static int mark_source_chains(const struct xt_table_info *newinfo, + + /* Move along one */ + size = e->next_offset; ++ ++ if (pos + size > newinfo->size - sizeof(*e)) ++ return 0; ++ + e = (struct arpt_entry *) + (entry0 + pos + size); + e->counters.pcnt = pos; +@@ -447,14 +451,6 @@ static int mark_source_chains(const struct xt_table_info *newinfo, + if (strcmp(t->target.u.user.name, + XT_STANDARD_TARGET) == 0 && + newpos >= 0) { +- if (newpos > newinfo->size - +- sizeof(struct arpt_entry)) { +- duprintf("mark_source_chains: " +- "bad verdict (%i)\n", +- newpos); +- return 0; +- } +- + /* This a jump; chase it. */ + duprintf("Jump rule %u -> %u\n", + pos, newpos); +@@ -462,6 +458,10 @@ static int mark_source_chains(const struct xt_table_info *newinfo, + /* ... this is a fallthru */ + newpos = pos + e->next_offset; + } ++ ++ if (newpos > newinfo->size - sizeof(*e)) ++ return 0; ++ + e = (struct arpt_entry *) + (entry0 + newpos); + e->counters.pcnt = pos; +diff --git a/net/ipv4/netfilter/ip_tables.c b/net/ipv4/netfilter/ip_tables.c +index b99affa..ceb995f 100644 +--- a/net/ipv4/netfilter/ip_tables.c ++++ b/net/ipv4/netfilter/ip_tables.c +@@ -519,6 +519,10 @@ mark_source_chains(const struct xt_table_info *newinfo, + + /* Move along one */ + size = e->next_offset; ++ ++ if (pos + size > newinfo->size - sizeof(*e)) ++ return 0; ++ + e = (struct ipt_entry *) + (entry0 + pos + size); + e->counters.pcnt = pos; +@@ -529,13 +533,6 @@ mark_source_chains(const struct xt_table_info *newinfo, + if (strcmp(t->target.u.user.name, + XT_STANDARD_TARGET) == 0 && + newpos >= 0) { +- if (newpos > newinfo->size - +- sizeof(struct ipt_entry)) { +- duprintf("mark_source_chains: " +- "bad verdict (%i)\n", +- newpos); +- return 0; +- } + /* This a jump; chase it. */ + duprintf("Jump rule %u -> %u\n", + pos, newpos); +@@ -543,6 +540,10 @@ mark_source_chains(const struct xt_table_info *newinfo, + /* ... this is a fallthru */ + newpos = pos + e->next_offset; + } ++ ++ if (newpos > newinfo->size - sizeof(*e)) ++ return 0; ++ + e = (struct ipt_entry *) + (entry0 + newpos); + e->counters.pcnt = pos; +diff --git a/net/ipv6/netfilter/ip6_tables.c b/net/ipv6/netfilter/ip6_tables.c +index 99425cf..d88a794 100644 +--- a/net/ipv6/netfilter/ip6_tables.c ++++ b/net/ipv6/netfilter/ip6_tables.c +@@ -531,6 +531,8 @@ mark_source_chains(const struct xt_table_info *newinfo, + + /* Move along one */ + size = e->next_offset; ++ if (pos + size > newinfo->size - sizeof(*e)) ++ return 0; + e = (struct ip6t_entry *) + (entry0 + pos + size); + e->counters.pcnt = pos; +@@ -541,13 +543,6 @@ mark_source_chains(const struct xt_table_info *newinfo, + if (strcmp(t->target.u.user.name, + XT_STANDARD_TARGET) == 0 && + newpos >= 0) { +- if (newpos > newinfo->size - +- sizeof(struct ip6t_entry)) { +- duprintf("mark_source_chains: " +- "bad verdict (%i)\n", +- newpos); +- return 0; +- } + /* This a jump; chase it. */ + duprintf("Jump rule %u -> %u\n", + pos, newpos); +@@ -555,6 +550,10 @@ mark_source_chains(const struct xt_table_info *newinfo, + /* ... this is a fallthru */ + newpos = pos + e->next_offset; + } ++ ++ if (newpos > newinfo->size - sizeof(*e)) ++ return 0; ++ + e = (struct ip6t_entry *) + (entry0 + newpos); + e->counters.pcnt = pos; +-- +2.4.10 diff --git a/nv46-Change-mc-subdev-oclass-from-nv44-to-nv4c.patch b/nv46-Change-mc-subdev-oclass-from-nv44-to-nv4c.patch deleted file mode 100644 index a6996faa1..000000000 --- a/nv46-Change-mc-subdev-oclass-from-nv44-to-nv4c.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 16f4f5f0dc33698b841bce71cbc0dd991935b7e1 Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Thu, 23 Jul 2015 17:20:12 +0200 -Subject: [PATCH] nv46: Change mc subdev oclass from nv44 to nv4c - -MSI interrupts appear to not work for nv46 based cards. Change the mc -subdev oclass for these cards from nv44 to nv4c, the nv4c mc code is -identical to the nv44 mc code except that it does not use msi -(it does not define a msi_rearm callback). - -BugLink: https://bugs.freedesktop.org/show_bug.cgi?id=90435 -Signed-off-by: Hans de Goede -Signed-off-by: Ben Skeggs ---- - drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c -index c6301361d14f..b4ad791b4851 100644 ---- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c -+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c -@@ -265,7 +265,7 @@ nv40_identify(struct nvkm_device *device) - device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass; - device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; - device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass; -- device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass; -+ device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass; - device->oclass[NVDEV_SUBDEV_BUS ] = nv31_bus_oclass; - device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; - device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass; --- -2.4.3 - diff --git a/pinctrl-pinctrl-single-must-be-initialized-early.patch b/pinctrl-pinctrl-single-must-be-initialized-early.patch deleted file mode 100644 index 96f268243..000000000 --- a/pinctrl-pinctrl-single-must-be-initialized-early.patch +++ /dev/null @@ -1,34 +0,0 @@ -From: Pantelis Antoniou -Date: Sat, 15 Sep 2012 12:00:41 +0300 -Subject: [PATCH] pinctrl: pinctrl-single must be initialized early. - -When using pinctrl-single to handle i2c initialization, it has -to be done early. Whether this is the best way to do so, is an -exercise left to the reader. ---- - drivers/pinctrl/pinctrl-single.c | 12 +++++++++++- - 1 file changed, 11 insertions(+), 1 deletion(-) - -diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c -index 69e84427f913..f21cf4291476 100644 ---- a/drivers/pinctrl/pinctrl-single.c -+++ b/drivers/pinctrl/pinctrl-single.c -@@ -2025,7 +2025,17 @@ static struct platform_driver pcs_driver = { - #endif - }; - --module_platform_driver(pcs_driver); -+static int __init pcs_init(void) -+{ -+ return platform_driver_register(&pcs_driver); -+} -+postcore_initcall(pcs_init); -+ -+static void __exit pcs_exit(void) -+{ -+ platform_driver_unregister(&pcs_driver); -+} -+module_exit(pcs_exit); - - MODULE_AUTHOR("Tony Lindgren "); - MODULE_DESCRIPTION("One-register-per-pin type device tree based pinctrl driver"); diff --git a/ptrace-being-capable-wrt-a-process-requires-mapped-u.patch b/ptrace-being-capable-wrt-a-process-requires-mapped-u.patch deleted file mode 100644 index 55c3ab9d1..000000000 --- a/ptrace-being-capable-wrt-a-process-requires-mapped-u.patch +++ /dev/null @@ -1,108 +0,0 @@ -From 64a37c8197f4e1c2637cd80326f4649282176369 Mon Sep 17 00:00:00 2001 -From: Jann Horn -Date: Sat, 26 Dec 2015 03:52:31 +0100 -Subject: [PATCH] ptrace: being capable wrt a process requires mapped uids/gids - -ptrace_has_cap() checks whether the current process should be -treated as having a certain capability for ptrace checks -against another process. Until now, this was equivalent to -has_ns_capability(current, target_ns, CAP_SYS_PTRACE). - -However, if a root-owned process wants to enter a user -namespace for some reason without knowing who owns it and -therefore can't change to the namespace owner's uid and gid -before entering, as soon as it has entered the namespace, -the namespace owner can attach to it via ptrace and thereby -gain access to its uid and gid. - -While it is possible for the entering process to switch to -the uid of a claimed namespace owner before entering, -causing the attempt to enter to fail if the claimed uid is -wrong, this doesn't solve the problem of determining an -appropriate gid. - -With this change, the entering process can first enter the -namespace and then safely inspect the namespace's -properties, e.g. through /proc/self/{uid_map,gid_map}, -assuming that the namespace owner doesn't have access to -uid 0. - -Changed in v2: The caller needs to be capable in the -namespace into which tcred's uids/gids can be mapped. - -Signed-off-by: Jann Horn ---- - kernel/ptrace.c | 33 ++++++++++++++++++++++++++++----- - 1 file changed, 28 insertions(+), 5 deletions(-) - -diff --git a/kernel/ptrace.c b/kernel/ptrace.c -index 787320de68e0..407c382b45c8 100644 ---- a/kernel/ptrace.c -+++ b/kernel/ptrace.c -@@ -20,6 +20,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -207,12 +208,34 @@ static int ptrace_check_attach(struct task_struct *child, bool ignore_state) - return ret; - } - --static int ptrace_has_cap(struct user_namespace *ns, unsigned int mode) -+static bool ptrace_has_cap(const struct cred *tcred, unsigned int mode) - { -+ struct user_namespace *tns = tcred->user_ns; -+ -+ /* When a root-owned process enters a user namespace created by a -+ * malicious user, the user shouldn't be able to execute code under -+ * uid 0 by attaching to the root-owned process via ptrace. -+ * Therefore, similar to the capable_wrt_inode_uidgid() check, -+ * verify that all the uids and gids of the target process are -+ * mapped into a namespace below the current one in which the caller -+ * is capable. -+ * No fsuid/fsgid check because __ptrace_may_access doesn't do it -+ * either. -+ */ -+ while ( -+ !kuid_has_mapping(tns, tcred->euid) || -+ !kuid_has_mapping(tns, tcred->suid) || -+ !kuid_has_mapping(tns, tcred->uid) || -+ !kgid_has_mapping(tns, tcred->egid) || -+ !kgid_has_mapping(tns, tcred->sgid) || -+ !kgid_has_mapping(tns, tcred->gid)) { -+ tns = tns->parent; -+ } -+ - if (mode & PTRACE_MODE_NOAUDIT) -- return has_ns_capability_noaudit(current, ns, CAP_SYS_PTRACE); -+ return has_ns_capability_noaudit(current, tns, CAP_SYS_PTRACE); - else -- return has_ns_capability(current, ns, CAP_SYS_PTRACE); -+ return has_ns_capability(current, tns, CAP_SYS_PTRACE); - } - - /* Returns 0 on success, -errno on denial. */ -@@ -241,7 +264,7 @@ static int __ptrace_may_access(struct task_struct *task, unsigned int mode) - gid_eq(cred->gid, tcred->sgid) && - gid_eq(cred->gid, tcred->gid)) - goto ok; -- if (ptrace_has_cap(tcred->user_ns, mode)) -+ if (ptrace_has_cap(tcred, mode)) - goto ok; - rcu_read_unlock(); - return -EPERM; -@@ -252,7 +275,7 @@ ok: - dumpable = get_dumpable(task->mm); - rcu_read_lock(); - if (dumpable != SUID_DUMP_USER && -- !ptrace_has_cap(__task_cred(task)->user_ns, mode)) { -+ !ptrace_has_cap(__task_cred(task), mode)) { - rcu_read_unlock(); - return -EPERM; - } --- -2.5.0 - diff --git a/regulator-axp20x-module-alias.patch b/regulator-axp20x-module-alias.patch deleted file mode 100644 index f20c9b3d6..000000000 --- a/regulator-axp20x-module-alias.patch +++ /dev/null @@ -1,26 +0,0 @@ -From d4ea7d86457a8d0ea40ce77bdeda1fc966cc35ec Mon Sep 17 00:00:00 2001 -From: Ian Campbell -Date: Sat, 1 Aug 2015 18:13:25 +0100 -Subject: regulator: axp20x: Add module alias - -This allows the module to be autoloaded. - -Together with 07949bf9c63c ("cpufreq: dt: allow driver to boot -automatically") this is sufficient to allow a modular kernel (such -as Debian's) to enable cpufreq on a Cubietruck. - -Signed-off-by: Ian Campbell -Signed-off-by: Mark Brown - -diff --git a/drivers/regulator/axp20x-regulator.c b/drivers/regulator/axp20x-regulator.c -index 6468291..01bf347 100644 ---- a/drivers/regulator/axp20x-regulator.c -+++ b/drivers/regulator/axp20x-regulator.c -@@ -405,3 +405,4 @@ module_platform_driver(axp20x_regulator_driver); - MODULE_LICENSE("GPL v2"); - MODULE_AUTHOR("Carlo Caione "); - MODULE_DESCRIPTION("Regulator Driver for AXP20X PMIC"); -+MODULE_ALIAS("platform:axp20x-regulator"); --- -cgit v0.10.2 - diff --git a/si2157-Bounds-check-firmware.patch b/si2157-Bounds-check-firmware.patch deleted file mode 100644 index 284006160..000000000 --- a/si2157-Bounds-check-firmware.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 526fbce5b0e44c67a97c57656b3be9911f0a9b9b Mon Sep 17 00:00:00 2001 -From: Laura Abbott -Date: Tue, 29 Sep 2015 16:59:20 -0700 -Subject: [PATCH 2/2] si2157: Bounds check firmware -To: Antti Palosaari -To: Mauro Carvalho Chehab -Cc: Olli Salonen -Cc: linux-media@vger.kernel.org -Cc: linux-kernel@vger.kernel.org - -When reading the firmware and sending commands, the length -must be bounds checked to avoid overrunning the size of the command -buffer and smashing the stack if the firmware is not in the -expected format. Add the proper check. - -Cc: stable@kernel.org -Signed-off-by: Laura Abbott ---- - drivers/media/tuners/si2157.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/drivers/media/tuners/si2157.c b/drivers/media/tuners/si2157.c -index 5073821..ce157ed 100644 ---- a/drivers/media/tuners/si2157.c -+++ b/drivers/media/tuners/si2157.c -@@ -166,6 +166,10 @@ static int si2157_init(struct dvb_frontend *fe) - - for (remaining = fw->size; remaining > 0; remaining -= 17) { - len = fw->data[fw->size - remaining]; -+ if (len > SI2157_ARGLEN) { -+ dev_err(&client->dev, "Bad firmware length\n"); -+ goto err_release_firmware; -+ } - memcpy(cmd.args, &fw->data[(fw->size - remaining) + 1], len); - cmd.wlen = len; - cmd.rlen = 1; --- -2.4.3 - diff --git a/si2168-Bounds-check-firmware.patch b/si2168-Bounds-check-firmware.patch deleted file mode 100644 index e9c5bcc50..000000000 --- a/si2168-Bounds-check-firmware.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 43018528944fa4965a4048fee91d76b47dcaf60e Mon Sep 17 00:00:00 2001 -From: Laura Abbott -Date: Mon, 28 Sep 2015 14:10:34 -0700 -Subject: [PATCH 1/2] si2168: Bounds check firmware -To: Antti Palosaari -To: Mauro Carvalho Chehab -Cc: Olli Salonen -Cc: linux-media@vger.kernel.org -Cc: linux-kernel@vger.kernel.org -Cc: Stuart Auchterlonie - - -When reading the firmware and sending commands, the length must -be bounds checked to avoid overrunning the size of the command -buffer and smashing the stack if the firmware is not in the expected -format: - -si2168 11-0064: found a 'Silicon Labs Si2168-B40' -si2168 11-0064: downloading firmware from file 'dvb-demod-si2168-b40-01.fw' -si2168 11-0064: firmware download failed -95 -Kernel panic - not syncing: stack-protector: Kernel stack is corrupted in: ffffffffa085708f - -Add the proper check. - -Cc: stable@kernel.org -Reported-by: Stuart Auchterlonie -Reviewed-by: Antti Palosaari -Signed-off-by: Laura Abbott ---- - drivers/media/dvb-frontends/si2168.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/drivers/media/dvb-frontends/si2168.c b/drivers/media/dvb-frontends/si2168.c -index 81788c5..821a8f4 100644 ---- a/drivers/media/dvb-frontends/si2168.c -+++ b/drivers/media/dvb-frontends/si2168.c -@@ -502,6 +502,10 @@ static int si2168_init(struct dvb_frontend *fe) - /* firmware is in the new format */ - for (remaining = fw->size; remaining > 0; remaining -= 17) { - len = fw->data[fw->size - remaining]; -+ if (len > SI2168_ARGLEN) { -+ ret = -EINVAL; -+ break; -+ } - memcpy(cmd.args, &fw->data[(fw->size - remaining) + 1], len); - cmd.wlen = len; - cmd.rlen = 1; --- -2.4.3 - diff --git a/sources b/sources index e2256619c..34226deb0 100644 --- a/sources +++ b/sources @@ -1,3 +1,2 @@ -9a78fa2eb6c68ca5a40ed5af08142599 linux-4.4.tar.xz -dcbc8fe378a676d5d0dd208cf524e144 perf-man-4.4.tar.gz -abdfe599a4ea827f9975cf0631148e70 patch-4.4.2.xz +d2927020e24a76da4ab482a8bc3e9ef3 linux-4.6.tar.xz +fd23b14b9d474c3dfacb6e8ee82d3a51 perf-man-4.6.tar.gz diff --git a/usb-phy-tegra-Add-38.4MHz-clock-table-entry.patch b/usb-phy-tegra-Add-38.4MHz-clock-table-entry.patch new file mode 100644 index 000000000..2a44851d7 --- /dev/null +++ b/usb-phy-tegra-Add-38.4MHz-clock-table-entry.patch @@ -0,0 +1,53 @@ +From patchwork Wed Apr 6 07:54:05 2016 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: usb: phy: tegra: Add 38.4MHz clock table entry +From: Hunter Laux +X-Patchwork-Id: 606877 +Message-Id: <1459929245-23449-1-git-send-email-hunterlaux@gmail.com> +To: Stephen Warren , + Thierry Reding , + Alexandre Courbot , linux-tegra@vger.kernel.org +Cc: Hunter Laux +Date: Wed, 6 Apr 2016 00:54:05 -0700 + +The Tegra210 uses a 38.4MHz OSC. This clock table entry is required to +use the ehci phy on the Jetson TX1. + +The xtal_freq_count is actually a 12 bit value, so it should be a u16 +instead of u8. + +Signed-off-by: Hunter Laux +--- + drivers/usb/phy/phy-tegra-usb.c | 10 +++++++++- + 1 file changed, 9 insertions(+), 1 deletion(-) + +diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c +index 5fe4a57..f0431f0 100644 +--- a/drivers/usb/phy/phy-tegra-usb.c ++++ b/drivers/usb/phy/phy-tegra-usb.c +@@ -164,7 +164,7 @@ struct tegra_xtal_freq { + u8 enable_delay; + u8 stable_count; + u8 active_delay; +- u8 xtal_freq_count; ++ u16 xtal_freq_count; + u16 debounce; + }; + +@@ -201,6 +201,14 @@ static const struct tegra_xtal_freq tegra_freq_table[] = { + .xtal_freq_count = 0xFE, + .debounce = 0xFDE8, + }, ++ { ++ .freq = 38400000, ++ .enable_delay = 0x00, ++ .stable_count = 0x00, ++ .active_delay = 0x18, ++ .xtal_freq_count = 0x177, ++ .debounce = 0xBB80, ++ }, + }; + + static void set_pts(struct tegra_usb_phy *phy, u8 pts_val) diff --git a/usbvision-fix-crash-on-detecting-device-with-invalid.patch b/usbvision-fix-crash-on-detecting-device-with-invalid.patch deleted file mode 100644 index a03e37907..000000000 --- a/usbvision-fix-crash-on-detecting-device-with-invalid.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 2ea39fc263c6a7589e15edb7d2d1c89fa569be53 Mon Sep 17 00:00:00 2001 -From: Vladis Dronov -Date: Mon, 16 Nov 2015 15:55:11 -0200 -Subject: [PATCH] usbvision: fix crash on detecting device with invalid - configuration - -The usbvision driver crashes when a specially crafted usb device with invalid -number of interfaces or endpoints is detected. This fix adds checks that the -device has proper configuration expected by the driver. - -Reported-by: Ralf Spenneberg -Signed-off-by: Vladis Dronov -Signed-off-by: Mauro Carvalho Chehab ---- - drivers/media/usb/usbvision/usbvision-video.c | 16 +++++++++++++++- - 1 file changed, 15 insertions(+), 1 deletion(-) - -diff --git a/drivers/media/usb/usbvision/usbvision-video.c b/drivers/media/usb/usbvision/usbvision-video.c -index b693206f66dd..d1dc1a198e3e 100644 ---- a/drivers/media/usb/usbvision/usbvision-video.c -+++ b/drivers/media/usb/usbvision/usbvision-video.c -@@ -1463,9 +1463,23 @@ static int usbvision_probe(struct usb_interface *intf, - - if (usbvision_device_data[model].interface >= 0) - interface = &dev->actconfig->interface[usbvision_device_data[model].interface]->altsetting[0]; -- else -+ else if (ifnum < dev->actconfig->desc.bNumInterfaces) - interface = &dev->actconfig->interface[ifnum]->altsetting[0]; -+ else { -+ dev_err(&intf->dev, "interface %d is invalid, max is %d\n", -+ ifnum, dev->actconfig->desc.bNumInterfaces - 1); -+ ret = -ENODEV; -+ goto err_usb; -+ } -+ -+ if (interface->desc.bNumEndpoints < 2) { -+ dev_err(&intf->dev, "interface %d has %d endpoints, but must" -+ " have minimum 2\n", ifnum, interface->desc.bNumEndpoints); -+ ret = -ENODEV; -+ goto err_usb; -+ } - endpoint = &interface->endpoint[1].desc; -+ - if (!usb_endpoint_xfer_isoc(endpoint)) { - dev_err(&intf->dev, "%s: interface %d. has non-ISO endpoint!\n", - __func__, ifnum); --- -2.5.0 - diff --git a/vfs-Test-for-and-handle-paths-that-are-unreachable-f.patch b/vfs-Test-for-and-handle-paths-that-are-unreachable-f.patch deleted file mode 100644 index f9e7e6e61..000000000 --- a/vfs-Test-for-and-handle-paths-that-are-unreachable-f.patch +++ /dev/null @@ -1,110 +0,0 @@ -From 14588dfe2e411056df5ba85ef88ad51730a2fa0a Mon Sep 17 00:00:00 2001 -From: "Eric W. Biederman" -Date: Sat, 15 Aug 2015 20:27:13 -0500 -Subject: [PATCH 2/2] vfs: Test for and handle paths that are unreachable from - their mnt_root - -commit 397d425dc26da728396e66d392d5dcb8dac30c37 upstream. - -In rare cases a directory can be renamed out from under a bind mount. -In those cases without special handling it becomes possible to walk up -the directory tree to the root dentry of the filesystem and down -from the root dentry to every other file or directory on the filesystem. - -Like division by zero .. from an unconnected path can not be given -a useful semantic as there is no predicting at which path component -the code will realize it is unconnected. We certainly can not match -the current behavior as the current behavior is a security hole. - -Therefore when encounting .. when following an unconnected path -return -ENOENT. - -- Add a function path_connected to verify path->dentry is reachable - from path->mnt.mnt_root. AKA to validate that rename did not do - something nasty to the bind mount. - - To avoid races path_connected must be called after following a path - component to it's next path component. - -Signed-off-by: "Eric W. Biederman" -Signed-off-by: Al Viro ---- - fs/namei.c | 27 +++++++++++++++++++++++++-- - 1 file changed, 25 insertions(+), 2 deletions(-) - -diff --git a/fs/namei.c b/fs/namei.c -index 1c2105ed20c5..29b927938b8c 100644 ---- a/fs/namei.c -+++ b/fs/namei.c -@@ -560,6 +560,24 @@ static int __nd_alloc_stack(struct nameidata *nd) - return 0; - } - -+/** -+ * path_connected - Verify that a path->dentry is below path->mnt.mnt_root -+ * @path: nameidate to verify -+ * -+ * Rename can sometimes move a file or directory outside of a bind -+ * mount, path_connected allows those cases to be detected. -+ */ -+static bool path_connected(const struct path *path) -+{ -+ struct vfsmount *mnt = path->mnt; -+ -+ /* Only bind mounts can have disconnected paths */ -+ if (mnt->mnt_root == mnt->mnt_sb->s_root) -+ return true; -+ -+ return is_subdir(path->dentry, mnt->mnt_root); -+} -+ - static inline int nd_alloc_stack(struct nameidata *nd) - { - if (likely(nd->depth != EMBEDDED_LEVELS)) -@@ -1296,6 +1314,8 @@ static int follow_dotdot_rcu(struct nameidata *nd) - return -ECHILD; - nd->path.dentry = parent; - nd->seq = seq; -+ if (unlikely(!path_connected(&nd->path))) -+ return -ENOENT; - break; - } else { - struct mount *mnt = real_mount(nd->path.mnt); -@@ -1396,7 +1416,7 @@ static void follow_mount(struct path *path) - } - } - --static void follow_dotdot(struct nameidata *nd) -+static int follow_dotdot(struct nameidata *nd) - { - if (!nd->root.mnt) - set_root(nd); -@@ -1412,6 +1432,8 @@ static void follow_dotdot(struct nameidata *nd) - /* rare case of legitimate dget_parent()... */ - nd->path.dentry = dget_parent(nd->path.dentry); - dput(old); -+ if (unlikely(!path_connected(&nd->path))) -+ return -ENOENT; - break; - } - if (!follow_up(&nd->path)) -@@ -1419,6 +1441,7 @@ static void follow_dotdot(struct nameidata *nd) - } - follow_mount(&nd->path); - nd->inode = nd->path.dentry->d_inode; -+ return 0; - } - - /* -@@ -1634,7 +1657,7 @@ static inline int handle_dots(struct nameidata *nd, int type) - if (nd->flags & LOOKUP_RCU) { - return follow_dotdot_rcu(nd); - } else -- follow_dotdot(nd); -+ return follow_dotdot(nd); - } - return 0; - } --- -2.4.3 - diff --git a/vmwgfx-Rework-device-initialization.patch b/vmwgfx-Rework-device-initialization.patch deleted file mode 100644 index 183ba9c28..000000000 --- a/vmwgfx-Rework-device-initialization.patch +++ /dev/null @@ -1,890 +0,0 @@ -From c1d9b32d8ee2e97e2867fa759eb84d436cca0311 Mon Sep 17 00:00:00 2001 -From: Thomas Hellstrom -Date: Thu, 25 Jun 2015 10:47:43 -0700 -Subject: [PATCH 1/2] vmwgfx: Rework device initialization - -This commit reworks device initialization so that we always enable the -FIFO at driver load, deferring SVGA enable until either first modeset -or fbdev enable. -This should always leave the fifo properly enabled for render- and -control nodes. -In addition, -*) We disable the use of VRAM when SVGA is not enabled. -*) We simplify PM support so that we only throw out resources on hibernate, -not on suspend, since the device keeps its state on suspend. - -Signed-off-by: Thomas Hellstrom -Reviewed-by: Sinclair Yeh ---- - drivers/gpu/drm/vmwgfx/vmwgfx_context.c | 8 +- - drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 337 ++++++++++++++++++-------------- - drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 19 +- - drivers/gpu/drm/vmwgfx/vmwgfx_fb.c | 4 + - drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c | 12 +- - drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c | 1 + - drivers/gpu/drm/vmwgfx/vmwgfx_mob.c | 6 +- - drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 1 + - drivers/gpu/drm/vmwgfx/vmwgfx_shader.c | 4 +- - drivers/gpu/drm/vmwgfx/vmwgfx_surface.c | 12 +- - 10 files changed, 230 insertions(+), 174 deletions(-) - -diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_context.c b/drivers/gpu/drm/vmwgfx/vmwgfx_context.c -index 5ac92874404d..a8e370a55e90 100644 ---- a/drivers/gpu/drm/vmwgfx/vmwgfx_context.c -+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_context.c -@@ -140,7 +140,7 @@ static void vmw_hw_context_destroy(struct vmw_resource *res) - cmd->body.cid = cpu_to_le32(res->id); - - vmw_fifo_commit(dev_priv, sizeof(*cmd)); -- vmw_3d_resource_dec(dev_priv, false); -+ vmw_fifo_resource_dec(dev_priv); - } - - static int vmw_gb_context_init(struct vmw_private *dev_priv, -@@ -220,7 +220,7 @@ static int vmw_context_init(struct vmw_private *dev_priv, - cmd->body.cid = cpu_to_le32(res->id); - - vmw_fifo_commit(dev_priv, sizeof(*cmd)); -- (void) vmw_3d_resource_inc(dev_priv, false); -+ vmw_fifo_resource_inc(dev_priv); - vmw_resource_activate(res, vmw_hw_context_destroy); - return 0; - -@@ -281,7 +281,7 @@ static int vmw_gb_context_create(struct vmw_resource *res) - cmd->header.size = sizeof(cmd->body); - cmd->body.cid = res->id; - vmw_fifo_commit(dev_priv, sizeof(*cmd)); -- (void) vmw_3d_resource_inc(dev_priv, false); -+ vmw_fifo_resource_inc(dev_priv); - - return 0; - -@@ -414,7 +414,7 @@ static int vmw_gb_context_destroy(struct vmw_resource *res) - if (dev_priv->query_cid == res->id) - dev_priv->query_cid_valid = false; - vmw_resource_release_id(res); -- vmw_3d_resource_dec(dev_priv, false); -+ vmw_fifo_resource_dec(dev_priv); - - return 0; - } -diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c -index 620bb5cf617c..a4766acd0ea2 100644 ---- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c -+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c -@@ -339,24 +339,47 @@ static int vmw_dummy_query_bo_create(struct vmw_private *dev_priv) - return ret; - } - --static int vmw_request_device(struct vmw_private *dev_priv) -+/** -+ * vmw_request_device_late - Perform late device setup -+ * -+ * @dev_priv: Pointer to device private. -+ * -+ * This function performs setup of otables and enables large command -+ * buffer submission. These tasks are split out to a separate function -+ * because it reverts vmw_release_device_early and is intended to be used -+ * by an error path in the hibernation code. -+ */ -+static int vmw_request_device_late(struct vmw_private *dev_priv) - { - int ret; - -- ret = vmw_fifo_init(dev_priv, &dev_priv->fifo); -- if (unlikely(ret != 0)) { -- DRM_ERROR("Unable to initialize FIFO.\n"); -- return ret; -- } -- vmw_fence_fifo_up(dev_priv->fman); - if (dev_priv->has_mob) { - ret = vmw_otables_setup(dev_priv); - if (unlikely(ret != 0)) { - DRM_ERROR("Unable to initialize " - "guest Memory OBjects.\n"); -- goto out_no_mob; -+ return ret; - } - } -+ -+ return 0; -+} -+ -+static int vmw_request_device(struct vmw_private *dev_priv) -+{ -+ int ret; -+ -+ ret = vmw_fifo_init(dev_priv, &dev_priv->fifo); -+ if (unlikely(ret != 0)) { -+ DRM_ERROR("Unable to initialize FIFO.\n"); -+ return ret; -+ } -+ vmw_fence_fifo_up(dev_priv->fman); -+ -+ ret = vmw_request_device_late(dev_priv); -+ if (ret) -+ goto out_no_mob; -+ - ret = vmw_dummy_query_bo_create(dev_priv); - if (unlikely(ret != 0)) - goto out_no_query_bo; -@@ -364,15 +387,25 @@ static int vmw_request_device(struct vmw_private *dev_priv) - return 0; - - out_no_query_bo: -- if (dev_priv->has_mob) -+ if (dev_priv->has_mob) { -+ (void) ttm_bo_evict_mm(&dev_priv->bdev, VMW_PL_MOB); - vmw_otables_takedown(dev_priv); -+ } - out_no_mob: - vmw_fence_fifo_down(dev_priv->fman); - vmw_fifo_release(dev_priv, &dev_priv->fifo); - return ret; - } - --static void vmw_release_device(struct vmw_private *dev_priv) -+/** -+ * vmw_release_device_early - Early part of fifo takedown. -+ * -+ * @dev_priv: Pointer to device private struct. -+ * -+ * This is the first part of command submission takedown, to be called before -+ * buffer management is taken down. -+ */ -+static void vmw_release_device_early(struct vmw_private *dev_priv) - { - /* - * Previous destructions should've released -@@ -382,64 +415,24 @@ static void vmw_release_device(struct vmw_private *dev_priv) - BUG_ON(dev_priv->pinned_bo != NULL); - - ttm_bo_unref(&dev_priv->dummy_query_bo); -- if (dev_priv->has_mob) -+ if (dev_priv->has_mob) { -+ ttm_bo_evict_mm(&dev_priv->bdev, VMW_PL_MOB); - vmw_otables_takedown(dev_priv); -- vmw_fence_fifo_down(dev_priv->fman); -- vmw_fifo_release(dev_priv, &dev_priv->fifo); --} -- -- --/** -- * Increase the 3d resource refcount. -- * If the count was prevously zero, initialize the fifo, switching to svga -- * mode. Note that the master holds a ref as well, and may request an -- * explicit switch to svga mode if fb is not running, using @unhide_svga. -- */ --int vmw_3d_resource_inc(struct vmw_private *dev_priv, -- bool unhide_svga) --{ -- int ret = 0; -- -- mutex_lock(&dev_priv->release_mutex); -- if (unlikely(dev_priv->num_3d_resources++ == 0)) { -- ret = vmw_request_device(dev_priv); -- if (unlikely(ret != 0)) -- --dev_priv->num_3d_resources; -- } else if (unhide_svga) { -- vmw_write(dev_priv, SVGA_REG_ENABLE, -- vmw_read(dev_priv, SVGA_REG_ENABLE) & -- ~SVGA_REG_ENABLE_HIDE); - } -- -- mutex_unlock(&dev_priv->release_mutex); -- return ret; - } - - /** -- * Decrease the 3d resource refcount. -- * If the count reaches zero, disable the fifo, switching to vga mode. -- * Note that the master holds a refcount as well, and may request an -- * explicit switch to vga mode when it releases its refcount to account -- * for the situation of an X server vt switch to VGA with 3d resources -- * active. -+ * vmw_release_device_late - Late part of fifo takedown. -+ * -+ * @dev_priv: Pointer to device private struct. -+ * -+ * This is the last part of the command submission takedown, to be called when -+ * command submission is no longer needed. It may wait on pending fences. - */ --void vmw_3d_resource_dec(struct vmw_private *dev_priv, -- bool hide_svga) -+static void vmw_release_device_late(struct vmw_private *dev_priv) - { -- int32_t n3d; -- -- mutex_lock(&dev_priv->release_mutex); -- if (unlikely(--dev_priv->num_3d_resources == 0)) -- vmw_release_device(dev_priv); -- else if (hide_svga) -- vmw_write(dev_priv, SVGA_REG_ENABLE, -- vmw_read(dev_priv, SVGA_REG_ENABLE) | -- SVGA_REG_ENABLE_HIDE); -- -- n3d = (int32_t) dev_priv->num_3d_resources; -- mutex_unlock(&dev_priv->release_mutex); -- -- BUG_ON(n3d < 0); -+ vmw_fence_fifo_down(dev_priv->fman); -+ vmw_fifo_release(dev_priv, &dev_priv->fifo); - } - - /** -@@ -603,6 +596,7 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset) - spin_lock_init(&dev_priv->hw_lock); - spin_lock_init(&dev_priv->waiter_lock); - spin_lock_init(&dev_priv->cap_lock); -+ spin_lock_init(&dev_priv->svga_lock); - - for (i = vmw_res_context; i < vmw_res_max; ++i) { - idr_init(&dev_priv->res_idr[i]); -@@ -714,17 +708,6 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset) - dev_priv->active_master = &dev_priv->fbdev_master; - - -- ret = ttm_bo_device_init(&dev_priv->bdev, -- dev_priv->bo_global_ref.ref.object, -- &vmw_bo_driver, -- dev->anon_inode->i_mapping, -- VMWGFX_FILE_PAGE_OFFSET, -- false); -- if (unlikely(ret != 0)) { -- DRM_ERROR("Failed initializing TTM buffer object driver.\n"); -- goto out_err1; -- } -- - dev_priv->mmio_mtrr = arch_phys_wc_add(dev_priv->mmio_start, - dev_priv->mmio_size); - -@@ -787,13 +770,28 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset) - goto out_no_fman; - } - -+ ret = ttm_bo_device_init(&dev_priv->bdev, -+ dev_priv->bo_global_ref.ref.object, -+ &vmw_bo_driver, -+ dev->anon_inode->i_mapping, -+ VMWGFX_FILE_PAGE_OFFSET, -+ false); -+ if (unlikely(ret != 0)) { -+ DRM_ERROR("Failed initializing TTM buffer object driver.\n"); -+ goto out_no_bdev; -+ } - -+ /* -+ * Enable VRAM, but initially don't use it until SVGA is enabled and -+ * unhidden. -+ */ - ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM, - (dev_priv->vram_size >> PAGE_SHIFT)); - if (unlikely(ret != 0)) { - DRM_ERROR("Failed initializing memory manager for VRAM.\n"); - goto out_no_vram; - } -+ dev_priv->bdev.man[TTM_PL_VRAM].use_type = false; - - dev_priv->has_gmr = true; - if (((dev_priv->capabilities & (SVGA_CAP_GMR | SVGA_CAP_GMR2)) == 0) || -@@ -814,18 +812,18 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset) - } - } - -- vmw_kms_save_vga(dev_priv); -- -- /* Start kms and overlay systems, needs fifo. */ - ret = vmw_kms_init(dev_priv); - if (unlikely(ret != 0)) - goto out_no_kms; - vmw_overlay_init(dev_priv); - -+ ret = vmw_request_device(dev_priv); -+ if (ret) -+ goto out_no_fifo; -+ - if (dev_priv->enable_fb) { -- ret = vmw_3d_resource_inc(dev_priv, true); -- if (unlikely(ret != 0)) -- goto out_no_fifo; -+ vmw_fifo_resource_inc(dev_priv); -+ vmw_svga_enable(dev_priv); - vmw_fb_init(dev_priv); - } - -@@ -838,13 +836,14 @@ out_no_fifo: - vmw_overlay_close(dev_priv); - vmw_kms_close(dev_priv); - out_no_kms: -- vmw_kms_restore_vga(dev_priv); - if (dev_priv->has_mob) - (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_MOB); - if (dev_priv->has_gmr) - (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR); - (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM); - out_no_vram: -+ (void)ttm_bo_device_release(&dev_priv->bdev); -+out_no_bdev: - vmw_fence_manager_takedown(dev_priv->fman); - out_no_fman: - if (dev_priv->capabilities & SVGA_CAP_IRQMASK) -@@ -860,8 +859,6 @@ out_err4: - iounmap(dev_priv->mmio_virt); - out_err3: - arch_phys_wc_del(dev_priv->mmio_mtrr); -- (void)ttm_bo_device_release(&dev_priv->bdev); --out_err1: - vmw_ttm_global_release(dev_priv); - out_err0: - for (i = vmw_res_context; i < vmw_res_max; ++i) -@@ -883,18 +880,22 @@ static int vmw_driver_unload(struct drm_device *dev) - vfree(dev_priv->ctx.cmd_bounce); - if (dev_priv->enable_fb) { - vmw_fb_close(dev_priv); -- vmw_kms_restore_vga(dev_priv); -- vmw_3d_resource_dec(dev_priv, false); -+ vmw_fifo_resource_dec(dev_priv); -+ vmw_svga_disable(dev_priv); - } -+ - vmw_kms_close(dev_priv); - vmw_overlay_close(dev_priv); - -- if (dev_priv->has_mob) -- (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_MOB); - if (dev_priv->has_gmr) - (void)ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR); - (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM); - -+ vmw_release_device_early(dev_priv); -+ if (dev_priv->has_mob) -+ (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_MOB); -+ (void) ttm_bo_device_release(&dev_priv->bdev); -+ vmw_release_device_late(dev_priv); - vmw_fence_manager_takedown(dev_priv->fman); - if (dev_priv->capabilities & SVGA_CAP_IRQMASK) - drm_irq_uninstall(dev_priv->dev); -@@ -1148,27 +1149,13 @@ static int vmw_master_set(struct drm_device *dev, - struct vmw_master *vmaster = vmw_master(file_priv->master); - int ret = 0; - -- if (!dev_priv->enable_fb) { -- ret = vmw_3d_resource_inc(dev_priv, true); -- if (unlikely(ret != 0)) -- return ret; -- vmw_kms_save_vga(dev_priv); -- vmw_write(dev_priv, SVGA_REG_TRACES, 0); -- } -- - if (active) { - BUG_ON(active != &dev_priv->fbdev_master); - ret = ttm_vt_lock(&active->lock, false, vmw_fp->tfile); - if (unlikely(ret != 0)) -- goto out_no_active_lock; -+ return ret; - - ttm_lock_set_kill(&active->lock, true, SIGTERM); -- ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM); -- if (unlikely(ret != 0)) { -- DRM_ERROR("Unable to clean VRAM on " -- "master drop.\n"); -- } -- - dev_priv->active_master = NULL; - } - -@@ -1182,14 +1169,6 @@ static int vmw_master_set(struct drm_device *dev, - dev_priv->active_master = vmaster; - - return 0; -- --out_no_active_lock: -- if (!dev_priv->enable_fb) { -- vmw_kms_restore_vga(dev_priv); -- vmw_3d_resource_dec(dev_priv, true); -- vmw_write(dev_priv, SVGA_REG_TRACES, 1); -- } -- return ret; - } - - static void vmw_master_drop(struct drm_device *dev, -@@ -1214,16 +1193,9 @@ static void vmw_master_drop(struct drm_device *dev, - } - - ttm_lock_set_kill(&vmaster->lock, false, SIGTERM); -- vmw_execbuf_release_pinned_bo(dev_priv); - -- if (!dev_priv->enable_fb) { -- ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM); -- if (unlikely(ret != 0)) -- DRM_ERROR("Unable to clean VRAM on master drop.\n"); -- vmw_kms_restore_vga(dev_priv); -- vmw_3d_resource_dec(dev_priv, true); -- vmw_write(dev_priv, SVGA_REG_TRACES, 1); -- } -+ if (!dev_priv->enable_fb) -+ vmw_svga_disable(dev_priv); - - dev_priv->active_master = &dev_priv->fbdev_master; - ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM); -@@ -1233,6 +1205,74 @@ static void vmw_master_drop(struct drm_device *dev, - vmw_fb_on(dev_priv); - } - -+/** -+ * __vmw_svga_enable - Enable SVGA mode, FIFO and use of VRAM. -+ * -+ * @dev_priv: Pointer to device private struct. -+ * Needs the reservation sem to be held in non-exclusive mode. -+ */ -+void __vmw_svga_enable(struct vmw_private *dev_priv) -+{ -+ spin_lock(&dev_priv->svga_lock); -+ if (!dev_priv->bdev.man[TTM_PL_VRAM].use_type) { -+ vmw_write(dev_priv, SVGA_REG_ENABLE, SVGA_REG_ENABLE); -+ dev_priv->bdev.man[TTM_PL_VRAM].use_type = true; -+ } -+ spin_unlock(&dev_priv->svga_lock); -+} -+ -+/** -+ * vmw_svga_enable - Enable SVGA mode, FIFO and use of VRAM. -+ * -+ * @dev_priv: Pointer to device private struct. -+ */ -+void vmw_svga_enable(struct vmw_private *dev_priv) -+{ -+ ttm_read_lock(&dev_priv->reservation_sem, false); -+ __vmw_svga_enable(dev_priv); -+ ttm_read_unlock(&dev_priv->reservation_sem); -+} -+ -+/** -+ * __vmw_svga_disable - Disable SVGA mode and use of VRAM. -+ * -+ * @dev_priv: Pointer to device private struct. -+ * Needs the reservation sem to be held in exclusive mode. -+ * Will not empty VRAM. VRAM must be emptied by caller. -+ */ -+void __vmw_svga_disable(struct vmw_private *dev_priv) -+{ -+ spin_lock(&dev_priv->svga_lock); -+ if (dev_priv->bdev.man[TTM_PL_VRAM].use_type) { -+ dev_priv->bdev.man[TTM_PL_VRAM].use_type = false; -+ vmw_write(dev_priv, SVGA_REG_ENABLE, -+ SVGA_REG_ENABLE_ENABLE_HIDE); -+ } -+ spin_unlock(&dev_priv->svga_lock); -+} -+ -+/** -+ * vmw_svga_disable - Disable SVGA_MODE, and use of VRAM. Keep the fifo -+ * running. -+ * -+ * @dev_priv: Pointer to device private struct. -+ * Will empty VRAM. -+ */ -+void vmw_svga_disable(struct vmw_private *dev_priv) -+{ -+ ttm_write_lock(&dev_priv->reservation_sem, false); -+ spin_lock(&dev_priv->svga_lock); -+ if (dev_priv->bdev.man[TTM_PL_VRAM].use_type) { -+ dev_priv->bdev.man[TTM_PL_VRAM].use_type = false; -+ vmw_write(dev_priv, SVGA_REG_ENABLE, -+ SVGA_REG_ENABLE_ENABLE_HIDE); -+ spin_unlock(&dev_priv->svga_lock); -+ if (ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM)) -+ DRM_ERROR("Failed evicting VRAM buffers.\n"); -+ } else -+ spin_unlock(&dev_priv->svga_lock); -+ ttm_write_unlock(&dev_priv->reservation_sem); -+} - - static void vmw_remove(struct pci_dev *pdev) - { -@@ -1250,21 +1290,21 @@ static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val, - - switch (val) { - case PM_HIBERNATION_PREPARE: -- case PM_SUSPEND_PREPARE: - ttm_suspend_lock(&dev_priv->reservation_sem); - -- /** -+ /* - * This empties VRAM and unbinds all GMR bindings. - * Buffer contents is moved to swappable memory. - */ - vmw_execbuf_release_pinned_bo(dev_priv); - vmw_resource_evict_all(dev_priv); -+ vmw_release_device_early(dev_priv); - ttm_bo_swapout_all(&dev_priv->bdev); -- -+ vmw_fence_fifo_down(dev_priv->fman); - break; - case PM_POST_HIBERNATION: -- case PM_POST_SUSPEND: - case PM_POST_RESTORE: -+ vmw_fence_fifo_up(dev_priv->fman); - ttm_suspend_unlock(&dev_priv->reservation_sem); - - break; -@@ -1276,20 +1316,13 @@ static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val, - return 0; - } - --/** -- * These might not be needed with the virtual SVGA device. -- */ -- - static int vmw_pci_suspend(struct pci_dev *pdev, pm_message_t state) - { - struct drm_device *dev = pci_get_drvdata(pdev); - struct vmw_private *dev_priv = vmw_priv(dev); - -- if (dev_priv->num_3d_resources != 0) { -- DRM_INFO("Can't suspend or hibernate " -- "while 3D resources are active.\n"); -+ if (dev_priv->refuse_hibernation) - return -EBUSY; -- } - - pci_save_state(pdev); - pci_disable_device(pdev); -@@ -1321,56 +1354,62 @@ static int vmw_pm_resume(struct device *kdev) - return vmw_pci_resume(pdev); - } - --static int vmw_pm_prepare(struct device *kdev) -+static int vmw_pm_freeze(struct device *kdev) - { - struct pci_dev *pdev = to_pci_dev(kdev); - struct drm_device *dev = pci_get_drvdata(pdev); - struct vmw_private *dev_priv = vmw_priv(dev); - -- /** -- * Release 3d reference held by fbdev and potentially -- * stop fifo. -- */ - dev_priv->suspended = true; - if (dev_priv->enable_fb) -- vmw_3d_resource_dec(dev_priv, true); -- -- if (dev_priv->num_3d_resources != 0) { -- -- DRM_INFO("Can't suspend or hibernate " -- "while 3D resources are active.\n"); -+ vmw_fifo_resource_dec(dev_priv); - -+ if (atomic_read(&dev_priv->num_fifo_resources) != 0) { -+ DRM_ERROR("Can't hibernate while 3D resources are active.\n"); - if (dev_priv->enable_fb) -- vmw_3d_resource_inc(dev_priv, true); -+ vmw_fifo_resource_inc(dev_priv); -+ WARN_ON(vmw_request_device_late(dev_priv)); - dev_priv->suspended = false; - return -EBUSY; - } - -+ if (dev_priv->enable_fb) -+ __vmw_svga_disable(dev_priv); -+ -+ vmw_release_device_late(dev_priv); -+ - return 0; - } - --static void vmw_pm_complete(struct device *kdev) -+static int vmw_pm_restore(struct device *kdev) - { - struct pci_dev *pdev = to_pci_dev(kdev); - struct drm_device *dev = pci_get_drvdata(pdev); - struct vmw_private *dev_priv = vmw_priv(dev); -+ int ret; - - vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2); - (void) vmw_read(dev_priv, SVGA_REG_ID); - -- /** -- * Reclaim 3d reference held by fbdev and potentially -- * start fifo. -- */ - if (dev_priv->enable_fb) -- vmw_3d_resource_inc(dev_priv, false); -+ vmw_fifo_resource_inc(dev_priv); -+ -+ ret = vmw_request_device(dev_priv); -+ if (ret) -+ return ret; -+ -+ if (dev_priv->enable_fb) -+ __vmw_svga_enable(dev_priv); - - dev_priv->suspended = false; -+ -+ return 0; - } - - static const struct dev_pm_ops vmw_pm_ops = { -- .prepare = vmw_pm_prepare, -- .complete = vmw_pm_complete, -+ .freeze = vmw_pm_freeze, -+ .thaw = vmw_pm_restore, -+ .restore = vmw_pm_restore, - .suspend = vmw_pm_suspend, - .resume = vmw_pm_resume, - }; -diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h -index d26a6daa9719..a5f221eaf076 100644 ---- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h -+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h -@@ -484,6 +484,7 @@ struct vmw_private { - - bool stealth; - bool enable_fb; -+ spinlock_t svga_lock; - - /** - * Master management. -@@ -493,9 +494,10 @@ struct vmw_private { - struct vmw_master fbdev_master; - struct notifier_block pm_nb; - bool suspended; -+ bool refuse_hibernation; - - struct mutex release_mutex; -- uint32_t num_3d_resources; -+ atomic_t num_fifo_resources; - - /* - * Replace this with an rwsem as soon as we have down_xx_interruptible() -@@ -587,8 +589,9 @@ static inline uint32_t vmw_read(struct vmw_private *dev_priv, - return val; - } - --int vmw_3d_resource_inc(struct vmw_private *dev_priv, bool unhide_svga); --void vmw_3d_resource_dec(struct vmw_private *dev_priv, bool hide_svga); -+extern void vmw_svga_enable(struct vmw_private *dev_priv); -+extern void vmw_svga_disable(struct vmw_private *dev_priv); -+ - - /** - * GMR utilities - vmwgfx_gmr.c -@@ -1116,4 +1119,14 @@ static inline struct ttm_mem_global *vmw_mem_glob(struct vmw_private *dev_priv) - { - return (struct ttm_mem_global *) dev_priv->mem_global_ref.object; - } -+ -+static inline void vmw_fifo_resource_inc(struct vmw_private *dev_priv) -+{ -+ atomic_inc(&dev_priv->num_fifo_resources); -+} -+ -+static inline void vmw_fifo_resource_dec(struct vmw_private *dev_priv) -+{ -+ atomic_dec(&dev_priv->num_fifo_resources); -+} - #endif -diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c -index 0a474f391fad..0e062613a7db 100644 ---- a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c -+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c -@@ -596,7 +596,10 @@ int vmw_fb_off(struct vmw_private *vmw_priv) - - info = vmw_priv->fb_info; - par = info->par; -+ if (!par->bo_ptr) -+ return 0; - -+ vmw_kms_save_vga(vmw_priv); - spin_lock_irqsave(&par->dirty.lock, flags); - par->dirty.active = false; - spin_unlock_irqrestore(&par->dirty.lock, flags); -@@ -648,6 +651,7 @@ int vmw_fb_on(struct vmw_private *vmw_priv) - spin_lock_irqsave(&par->dirty.lock, flags); - par->dirty.active = true; - spin_unlock_irqrestore(&par->dirty.lock, flags); -+ vmw_kms_restore_vga(vmw_priv); - - err_no_buffer: - vmw_fb_set_par(info); -diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c -index 39f2b03888e7..cd5d9f3fe0e0 100644 ---- a/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c -+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c -@@ -98,7 +98,6 @@ int vmw_fifo_init(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo) - __le32 __iomem *fifo_mem = dev_priv->mmio_virt; - uint32_t max; - uint32_t min; -- uint32_t dummy; - - fifo->static_buffer_size = VMWGFX_FIFO_STATIC_SIZE; - fifo->static_buffer = vmalloc(fifo->static_buffer_size); -@@ -112,10 +111,6 @@ int vmw_fifo_init(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo) - mutex_init(&fifo->fifo_mutex); - init_rwsem(&fifo->rwsem); - -- /* -- * Allow mapping the first page read-only to user-space. -- */ -- - DRM_INFO("width %d\n", vmw_read(dev_priv, SVGA_REG_WIDTH)); - DRM_INFO("height %d\n", vmw_read(dev_priv, SVGA_REG_HEIGHT)); - DRM_INFO("bpp %d\n", vmw_read(dev_priv, SVGA_REG_BITS_PER_PIXEL)); -@@ -123,7 +118,9 @@ int vmw_fifo_init(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo) - dev_priv->enable_state = vmw_read(dev_priv, SVGA_REG_ENABLE); - dev_priv->config_done_state = vmw_read(dev_priv, SVGA_REG_CONFIG_DONE); - dev_priv->traces_state = vmw_read(dev_priv, SVGA_REG_TRACES); -- vmw_write(dev_priv, SVGA_REG_ENABLE, 1); -+ -+ vmw_write(dev_priv, SVGA_REG_ENABLE, SVGA_REG_ENABLE_ENABLE_HIDE); -+ vmw_write(dev_priv, SVGA_REG_TRACES, 0); - - min = 4; - if (dev_priv->capabilities & SVGA_CAP_EXTENDED_FIFO) -@@ -155,7 +152,8 @@ int vmw_fifo_init(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo) - atomic_set(&dev_priv->marker_seq, dev_priv->last_read_seqno); - iowrite32(dev_priv->last_read_seqno, fifo_mem + SVGA_FIFO_FENCE); - vmw_marker_queue_init(&fifo->marker_queue); -- return vmw_fifo_send_fence(dev_priv, &dummy); -+ -+ return 0; - } - - void vmw_fifo_ping_host(struct vmw_private *dev_priv, uint32_t reason) -diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c -index 5c289f748ab4..53579f278b63 100644 ---- a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c -+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c -@@ -280,6 +280,7 @@ static int vmw_ldu_crtc_set_config(struct drm_mode_set *set) - } - - vmw_fb_off(dev_priv); -+ vmw_svga_enable(dev_priv); - - crtc->primary->fb = fb; - encoder->crtc = crtc; -diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_mob.c b/drivers/gpu/drm/vmwgfx/vmwgfx_mob.c -index 04a64b8cd3cd..f06d60f41fa7 100644 ---- a/drivers/gpu/drm/vmwgfx/vmwgfx_mob.c -+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_mob.c -@@ -574,7 +574,7 @@ void vmw_mob_unbind(struct vmw_private *dev_priv, - vmw_fence_single_bo(bo, NULL); - ttm_bo_unreserve(bo); - } -- vmw_3d_resource_dec(dev_priv, false); -+ vmw_fifo_resource_dec(dev_priv); - } - - /* -@@ -627,7 +627,7 @@ int vmw_mob_bind(struct vmw_private *dev_priv, - mob->pt_level += VMW_MOBFMT_PTDEPTH_1 - SVGA3D_MOBFMT_PTDEPTH_1; - } - -- (void) vmw_3d_resource_inc(dev_priv, false); -+ vmw_fifo_resource_inc(dev_priv); - - cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd)); - if (unlikely(cmd == NULL)) { -@@ -648,7 +648,7 @@ int vmw_mob_bind(struct vmw_private *dev_priv, - return 0; - - out_no_cmd_space: -- vmw_3d_resource_dec(dev_priv, false); -+ vmw_fifo_resource_dec(dev_priv); - if (pt_set_up) - ttm_bo_unref(&mob->pt_bo); - -diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c -index 7dc591d04d9a..9e8eb364a6ac 100644 ---- a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c -+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c -@@ -332,6 +332,7 @@ static int vmw_sou_crtc_set_config(struct drm_mode_set *set) - } - - vmw_fb_off(dev_priv); -+ vmw_svga_enable(dev_priv); - - if (mode->hdisplay != crtc->mode.hdisplay || - mode->vdisplay != crtc->mode.vdisplay) { -diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c b/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c -index 6a4584a43aa6..6110a433ebfe 100644 ---- a/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c -+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c -@@ -165,7 +165,7 @@ static int vmw_gb_shader_create(struct vmw_resource *res) - cmd->body.type = shader->type; - cmd->body.sizeInBytes = shader->size; - vmw_fifo_commit(dev_priv, sizeof(*cmd)); -- (void) vmw_3d_resource_inc(dev_priv, false); -+ vmw_fifo_resource_inc(dev_priv); - - return 0; - -@@ -275,7 +275,7 @@ static int vmw_gb_shader_destroy(struct vmw_resource *res) - vmw_fifo_commit(dev_priv, sizeof(*cmd)); - mutex_unlock(&dev_priv->binding_mutex); - vmw_resource_release_id(res); -- vmw_3d_resource_dec(dev_priv, false); -+ vmw_fifo_resource_dec(dev_priv); - - return 0; - } -diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c -index 4ecdbf3e59da..4d0c98edeb6a 100644 ---- a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c -+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c -@@ -340,7 +340,7 @@ static void vmw_hw_surface_destroy(struct vmw_resource *res) - dev_priv->used_memory_size -= res->backup_size; - mutex_unlock(&dev_priv->cmdbuf_mutex); - } -- vmw_3d_resource_dec(dev_priv, false); -+ vmw_fifo_resource_dec(dev_priv); - } - - /** -@@ -576,14 +576,14 @@ static int vmw_surface_init(struct vmw_private *dev_priv, - - BUG_ON(res_free == NULL); - if (!dev_priv->has_mob) -- (void) vmw_3d_resource_inc(dev_priv, false); -+ vmw_fifo_resource_inc(dev_priv); - ret = vmw_resource_init(dev_priv, res, true, res_free, - (dev_priv->has_mob) ? &vmw_gb_surface_func : - &vmw_legacy_surface_func); - - if (unlikely(ret != 0)) { - if (!dev_priv->has_mob) -- vmw_3d_resource_dec(dev_priv, false); -+ vmw_fifo_resource_dec(dev_priv); - res_free(res); - return ret; - } -@@ -1028,7 +1028,7 @@ static int vmw_gb_surface_create(struct vmw_resource *res) - if (likely(res->id != -1)) - return 0; - -- (void) vmw_3d_resource_inc(dev_priv, false); -+ vmw_fifo_resource_inc(dev_priv); - ret = vmw_resource_alloc_id(res); - if (unlikely(ret != 0)) { - DRM_ERROR("Failed to allocate a surface id.\n"); -@@ -1068,7 +1068,7 @@ static int vmw_gb_surface_create(struct vmw_resource *res) - out_no_fifo: - vmw_resource_release_id(res); - out_no_id: -- vmw_3d_resource_dec(dev_priv, false); -+ vmw_fifo_resource_dec(dev_priv); - return ret; - } - -@@ -1213,7 +1213,7 @@ static int vmw_gb_surface_destroy(struct vmw_resource *res) - vmw_fifo_commit(dev_priv, sizeof(*cmd)); - mutex_unlock(&dev_priv->binding_mutex); - vmw_resource_release_id(res); -- vmw_3d_resource_dec(dev_priv, false); -+ vmw_fifo_resource_dec(dev_priv); - - return 0; - } --- -2.4.3 - diff --git a/watchdog-Disable-watchdog-on-virtual-machines.patch b/watchdog-Disable-watchdog-on-virtual-machines.patch index 11bce5bb7..0a988c189 100644 --- a/watchdog-Disable-watchdog-on-virtual-machines.patch +++ b/watchdog-Disable-watchdog-on-virtual-machines.patch @@ -25,9 +25,9 @@ index 18f34cf..6aadffe 100644 --- a/kernel/watchdog.c +++ b/kernel/watchdog.c @@ -20,6 +20,7 @@ - #include #include #include + #include +#include #include diff --git a/wext-fix-message-delay-ordering.patch b/wext-fix-message-delay-ordering.patch deleted file mode 100644 index 109b68da3..000000000 --- a/wext-fix-message-delay-ordering.patch +++ /dev/null @@ -1,122 +0,0 @@ -From 8bf862739a7786ae72409220914df960a0aa80d8 Mon Sep 17 00:00:00 2001 -From: Johannes Berg -Date: Wed, 27 Jan 2016 12:37:52 +0100 -Subject: wext: fix message delay/ordering - -Beniamino reported that he was getting an RTM_NEWLINK message for a -given interface, after the RTM_DELLINK for it. It turns out that the -message is a wireless extensions message, which was sent because the -interface had been connected and disconnection while it was deleted -caused a wext message. - -For its netlink messages, wext uses RTM_NEWLINK, but the message is -without all the regular rtnetlink attributes, so "ip monitor link" -prints just rudimentary information: - -5: wlan1: mtu 1500 qdisc mq state DOWN group default - link/ether 02:00:00:00:01:00 brd ff:ff:ff:ff:ff:ff -Deleted 5: wlan1: mtu 1500 qdisc noop state DOWN group default - link/ether 02:00:00:00:01:00 brd ff:ff:ff:ff:ff:ff -5: wlan1: - link/ether -(from my hwsim reproduction) - -This can cause userspace to get confused since it doesn't expect an -RTM_NEWLINK message after RTM_DELLINK. - -The reason for this is that wext schedules a worker to send out the -messages, and the scheduling delay can cause the messages to get out -to userspace in different order. - -To fix this, have wext register a netdevice notifier and flush out -any pending messages when netdevice state changes. This fixes any -ordering whenever the original message wasn't sent by a notifier -itself. - -Cc: stable@vger.kernel.org -Reported-by: Beniamino Galvani -Signed-off-by: Johannes Berg ---- - net/wireless/wext-core.c | 51 +++++++++++++++++++++++++++++++++++++----------- - 1 file changed, 40 insertions(+), 11 deletions(-) - -diff --git a/net/wireless/wext-core.c b/net/wireless/wext-core.c -index c8717c1..87dd619 100644 ---- a/net/wireless/wext-core.c -+++ b/net/wireless/wext-core.c -@@ -342,6 +342,39 @@ static const int compat_event_type_size[] = { - - /* IW event code */ - -+static void wireless_nlevent_flush(void) -+{ -+ struct sk_buff *skb; -+ struct net *net; -+ -+ ASSERT_RTNL(); -+ -+ for_each_net(net) { -+ while ((skb = skb_dequeue(&net->wext_nlevents))) -+ rtnl_notify(skb, net, 0, RTNLGRP_LINK, NULL, -+ GFP_KERNEL); -+ } -+} -+ -+static int wext_netdev_notifier_call(struct notifier_block *nb, -+ unsigned long state, void *ptr) -+{ -+ /* -+ * When a netdev changes state in any way, flush all pending messages -+ * to avoid them going out in a strange order, e.g. RTM_NEWLINK after -+ * RTM_DELLINK, or with IFF_UP after without IFF_UP during dev_close() -+ * or similar - all of which could otherwise happen due to delays from -+ * schedule_work(). -+ */ -+ wireless_nlevent_flush(); -+ -+ return NOTIFY_OK; -+} -+ -+static struct notifier_block wext_netdev_notifier = { -+ .notifier_call = wext_netdev_notifier_call, -+}; -+ - static int __net_init wext_pernet_init(struct net *net) - { - skb_queue_head_init(&net->wext_nlevents); -@@ -360,7 +393,12 @@ static struct pernet_operations wext_pernet_ops = { - - static int __init wireless_nlevent_init(void) - { -- return register_pernet_subsys(&wext_pernet_ops); -+ int err = register_pernet_subsys(&wext_pernet_ops); -+ -+ if (err) -+ return err; -+ -+ return register_netdevice_notifier(&wext_netdev_notifier); - } - - subsys_initcall(wireless_nlevent_init); -@@ -368,17 +406,8 @@ subsys_initcall(wireless_nlevent_init); - /* Process events generated by the wireless layer or the driver. */ - static void wireless_nlevent_process(struct work_struct *work) - { -- struct sk_buff *skb; -- struct net *net; -- - rtnl_lock(); -- -- for_each_net(net) { -- while ((skb = skb_dequeue(&net->wext_nlevents))) -- rtnl_notify(skb, net, 0, RTNLGRP_LINK, NULL, -- GFP_KERNEL); -- } -- -+ wireless_nlevent_flush(); - rtnl_unlock(); - } - --- -cgit v0.12 - diff --git a/x86-Lock-down-IO-port-access-when-module-security-is.patch b/x86-Lock-down-IO-port-access-when-module-security-is.patch index 708006c2e..185b1da99 100644 --- a/x86-Lock-down-IO-port-access-when-module-security-is.patch +++ b/x86-Lock-down-IO-port-access-when-module-security-is.patch @@ -1,8 +1,7 @@ -From 7a3cdd26e6d38031338a6cb591ec2f3faaa9234b Mon Sep 17 00:00:00 2001 +From 8010b5eb4680df797575e6306d4d891200e303ab Mon Sep 17 00:00:00 2001 From: Matthew Garrett Date: Thu, 8 Mar 2012 10:35:59 -0500 -Subject: [PATCH 03/20] x86: Lock down IO port access when module security is - enabled +Subject: [PATCH] x86: Lock down IO port access when module security is enabled IO port access would permit users to gain access to PCI configuration registers, which in turn (on a lot of hardware) give access to MMIO register @@ -16,7 +15,7 @@ Signed-off-by: Matthew Garrett 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/ioport.c b/arch/x86/kernel/ioport.c -index 37dae792dbbe..1ecc03ca3c15 100644 +index 589b3193f102..ab8372443efb 100644 --- a/arch/x86/kernel/ioport.c +++ b/arch/x86/kernel/ioport.c @@ -15,6 +15,7 @@ @@ -36,7 +35,7 @@ index 37dae792dbbe..1ecc03ca3c15 100644 return -EPERM; /* -@@ -103,7 +104,7 @@ SYSCALL_DEFINE1(iopl, unsigned int, level) +@@ -108,7 +109,7 @@ SYSCALL_DEFINE1(iopl, unsigned int, level) return -EINVAL; /* Trying to gain more privileges? */ if (level > old) { @@ -44,9 +43,9 @@ index 37dae792dbbe..1ecc03ca3c15 100644 + if (!capable(CAP_SYS_RAWIO) || secure_modules()) return -EPERM; } - regs->flags = (regs->flags & ~X86_EFLAGS_IOPL) | (level << 12); + regs->flags = (regs->flags & ~X86_EFLAGS_IOPL) | diff --git a/drivers/char/mem.c b/drivers/char/mem.c -index 6b1721f978c2..53fe675f9bd7 100644 +index 71025c2f6bbb..86e5bfa91563 100644 --- a/drivers/char/mem.c +++ b/drivers/char/mem.c @@ -27,6 +27,7 @@ @@ -68,5 +67,5 @@ index 6b1721f978c2..53fe675f9bd7 100644 return -EFAULT; while (count-- > 0 && i < 65536) { -- -2.4.3 +2.5.5