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Linux v3.4-rc2-269-g4166fb6

This commit is contained in:
Justin M. Forbes 2012-04-13 12:13:14 -05:00
parent 1ad219b123
commit 6033d950da
3 changed files with 4 additions and 76 deletions
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13
kernel.spec
View File

@ -95,7 +95,7 @@ Summary: The Linux kernel
# The rc snapshot level
%define rcrev 2
# The git snapshot level
%define gitrev 2
%define gitrev 3
# Set rpm version accordingly
%define rpmversion 3.%{upstream_sublevel}.0
%endif
@ -739,10 +739,6 @@ Patch21306: shlib_base_randomize.patch
#rhbz 806676 807632
Patch21385: libata-disable-runtime-pm-for-hotpluggable-port.patch
#rhbz 809014
Patch21390: x86-Use-correct-byte-sized-register-constraint-in-__xchg_op.patch
Patch21391: x86-Use-correct-byte-sized-register-constraint-in-__add.patch
Patch21400: unhandled-irqs-switch-to-polling.patch
Patch22000: weird-root-dentry-name-debug.patch
@ -1442,10 +1438,6 @@ ApplyPatch highbank-export-clock-functions.patch
#rhbz 806676 807632
ApplyPatch libata-disable-runtime-pm-for-hotpluggable-port.patch
#rhbz 809014
ApplyPatch x86-Use-correct-byte-sized-register-constraint-in-__xchg_op.patch
ApplyPatch x86-Use-correct-byte-sized-register-constraint-in-__add.patch
# END OF PATCH APPLICATIONS
%endif
@ -2306,6 +2298,9 @@ fi
# ||----w |
# || ||
%changelog
* Fri Apr 13 2012 Justin M. Forbes <jforbes@redhat.com> - 3.4.0-0.rc2.git3.1
- Linux v3.4-rc2-269-g4166fb6
* Thu Apr 12 2012 Justin M. Forbes <jforbes@redhat.com> - 3.4.0-0.rc2.git2.1
- Linux v3.4-rc2-174-gecca5c3

35
x86-Use-correct-byte-sized-register-constraint-in-__add.patch
View File

@ -1,35 +0,0 @@
From: H. Peter Anvin <hpa@zytor.com>
Date: Fri, 6 Apr 2012 16:30:57 +0000 (-0700)
Subject: x86: Use correct byte-sized register constraint in __add()
X-Git-Url: http://git.kernel.org/?p=linux%2Fkernel%2Fgit%2Ftip%2Ftip.git;a=commitdiff_plain;h=8c91c5325e107ec17e40a59a47c6517387d64eb7
x86: Use correct byte-sized register constraint in __add()
Similar to:
2ca052a x86: Use correct byte-sized register constraint in __xchg_op()
... the __add() macro also needs to use a "q" constraint in the
byte-sized case, lest we try to generate an illegal register.
Link: http://lkml.kernel.org/r/4F7A3315.501@goop.org
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Cc: Leigh Scott <leigh123linux@googlemail.com>
Cc: Thomas Reitmayr <treitmayr@devbase.at>
Cc: <stable@vger.kernel.org> v3.3
---
diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h
index bc18d0e..99480e5 100644
--- a/arch/x86/include/asm/cmpxchg.h
+++ b/arch/x86/include/asm/cmpxchg.h
@@ -173,7 +173,7 @@ extern void __add_wrong_size(void)
switch (sizeof(*(ptr))) { \
case __X86_CASE_B: \
asm volatile (lock "addb %b1, %0\n" \
- : "+m" (*(ptr)) : "ri" (inc) \
+ : "+m" (*(ptr)) : "qi" (inc) \
: "memory", "cc"); \
break; \
case __X86_CASE_W: \

32
x86-Use-correct-byte-sized-register-constraint-in-__xchg_op.patch
View File

@ -1,32 +0,0 @@
From: Jeremy Fitzhardinge <jeremy@goop.org>
Date: Mon, 2 Apr 2012 23:15:33 +0000 (-0700)
Subject: x86: Use correct byte-sized register constraint in __xchg_op()
X-Git-Url: http://git.kernel.org/?p=linux%2Fkernel%2Fgit%2Ftip%2Ftip.git;a=commitdiff_plain;h=2ca052a3710fac208eee690faefdeb8bbd4586a1
x86: Use correct byte-sized register constraint in __xchg_op()
x86-64 can access the low half of any register, but i386 can only do
it with a subset of registers. 'r' causes compilation failures on i386,
but 'q' expresses the constraint properly.
Signed-off-by: Jeremy Fitzhardinge <jeremy@goop.org>
Link: http://lkml.kernel.org/r/4F7A3315.501@goop.org
Reported-by: Leigh Scott <leigh123linux@googlemail.com>
Tested-by: Thomas Reitmayr <treitmayr@devbase.at>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Cc: <stable@vger.kernel.org> v3.3
---
diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h
index b3b7332..bc18d0e 100644
--- a/arch/x86/include/asm/cmpxchg.h
+++ b/arch/x86/include/asm/cmpxchg.h
@@ -43,7 +43,7 @@ extern void __add_wrong_size(void)
switch (sizeof(*(ptr))) { \
case __X86_CASE_B: \
asm volatile (lock #op "b %b0, %1\n" \
- : "+r" (__ret), "+m" (*(ptr)) \
+ : "+q" (__ret), "+m" (*(ptr)) \
: : "memory", "cc"); \
break; \
case __X86_CASE_W: \