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Add Intel patch from Lyude's MR 

Signed-off-by: Justin M. Forbes <jforbes@fedoraproject.org>
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Justin M. Forbes 2021-09-16 15:49:19 -05:00
parent cd7ebee28b
commit 5f8ea3dba2
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patch-5.13-redhat.patch
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@ -4590,3 +4590,44 @@ index 54d8d1ab577c..000000000000
-/* different name and/or type of the variable doesn't matter */
-char _license[] SEC("license") = "GPL";
-int _version SEC("version") = 1;
From 04fe164eacef2d9e6faac240e1c5537db88299ed Mon Sep 17 00:00:00 2001
From: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Date: Thu, 1 Apr 2021 20:02:37 +0300
Subject: [PATCH] drm/i915/display/psr: Disable DC3CO when the PSR2 is used
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Due to the changed sequence of activating/deactivating DC3CO, disable
DC3CO until the changed dc3co activating/deactivating sequence is applied.
References: https://gitlab.freedesktop.org/drm/intel/-/issues/3134
Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210401170237.40472-1-gwan-gyeong.mun@intel.com
---
drivers/gpu/drm/i915/display/intel_psr.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 8ada4f829cab..4cec6b4d7fb9 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -654,6 +654,13 @@ tgl_dc3co_exitline_compute_config(struct intel_dp *intel_dp,
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
u32 exit_scanlines;
+ /*
+ * FIXME: Due to the changed sequence of activating/deactivating DC3CO,
+ * disable DC3CO until the changed dc3co activating/deactivating sequence
+ * is applied. B.Specs:49196
+ */
+ return;
+
/*
* DMC's DC3CO exit mechanism has an issue with Selective Fecth
* TODO: when the issue is addressed, this restriction should be removed.
--
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