Add a possible i.MX6 sdhci fix, drop some old ARM patches, renumber patches
This commit is contained in:
Peter Robinson
parent
af9fe25b4c
commit
4a31f03885
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@ -1,56 +0,0 @@
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From patchwork Thu Feb 8 13:43:37 2018
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: [3/4] clk: bcm2835: De-assert/assert PLL reset signal when appropriate
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From: Boris Brezillon <boris.brezillon@bootlin.com>
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X-Patchwork-Id: 10207157
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Message-Id: <20180208134338.24590-3-boris.brezillon@bootlin.com>
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To: Florian Fainelli <f.fainelli@gmail.com>, Ray Jui <rjui@broadcom.com>,
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Scott Branden <sbranden@broadcom.com>,
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bcm-kernel-feedback-list@broadcom.com,
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Stephen Warren <swarren@wwwdotorg.org>,
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Lee Jones <lee@kernel.org>, Eric Anholt <eric@anholt.net>,
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linux-rpi-kernel@lists.infradead.org,
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Mike Turquette <mturquette@baylibre.com>,
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Stephen Boyd <sboyd@codeaurora.org>, linux-clk@vger.kernel.org
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Cc: Boris Brezillon <boris.brezillon@bootlin.com>, stable@vger.kernel.org
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Date: Thu, 8 Feb 2018 14:43:37 +0100
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In order to enable a PLL, not only the PLL has to be powered up and
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locked, but you also have to de-assert the reset signal. The last part
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was missing. Add it so PLLs that were not enabled by the FW/bootloader
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can be enabled from Linux.
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Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
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Cc: <stable@vger.kernel.org>
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Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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---
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drivers/clk/bcm/clk-bcm2835.c | 7 +++++++
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1 file changed, 7 insertions(+)
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diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
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index a07f6451694a..6c5d4a8e426c 100644
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -602,6 +602,9 @@ static void bcm2835_pll_off(struct clk_hw *hw)
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const struct bcm2835_pll_data *data = pll->data;
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spin_lock(&cprman->regs_lock);
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+ cprman_write(cprman, data->a2w_ctrl_reg,
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+ cprman_read(cprman, data->a2w_ctrl_reg) &
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+ ~A2W_PLL_CTRL_PRST_DISABLE);
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cprman_write(cprman, data->cm_ctrl_reg,
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cprman_read(cprman, data->cm_ctrl_reg) |
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CM_PLL_ANARST);
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@@ -640,6 +643,10 @@ static int bcm2835_pll_on(struct clk_hw *hw)
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cpu_relax();
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}
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+ cprman_write(cprman, data->a2w_ctrl_reg,
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+ cprman_read(cprman, data->a2w_ctrl_reg) |
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+ A2W_PLL_CTRL_PRST_DISABLE);
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+
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return 0;
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}
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@ -1,41 +0,0 @@
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From patchwork Thu Jan 18 12:34:18 2018
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: ARM: dts: imx6qdl-udoo: Disable usbh1 to avoid kernel hang
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From: Fabio Estevam <fabio.estevam@nxp.com>
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X-Patchwork-Id: 10173115
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Message-Id: <1516278858-15464-1-git-send-email-fabio.estevam@nxp.com>
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To: <shawnguo@kernel.org>
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Cc: maggu2810@gmail.com, peter.chen@nxp.com, mail@maciej.szmigiero.name,
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Fabio Estevam <fabio.estevam@nxp.com>, linux-arm-kernel@lists.infradead.org
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Date: Thu, 18 Jan 2018 10:34:18 -0200
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Currently the kernel hangs when USB Host1 is enabled due to the lack of
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support for controlling the USB hub clock and GPIO reset line.
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Peter Chen has made several attempts to fix this problem, but his series
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has not been applied yet, so better disable USB host1 for now to avoid
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the kernel hang.
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Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
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Acked-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
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Tested-by: Markus Rathgeb <maggu2810@gmail.com>
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---
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arch/arm/boot/dts/imx6qdl-udoo.dtsi | 3 ++-
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1 file changed, 2 insertions(+), 1 deletion(-)
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diff --git a/arch/arm/boot/dts/imx6qdl-udoo.dtsi b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
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index 4161b7d..1f0b9f6 100644
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--- a/arch/arm/boot/dts/imx6qdl-udoo.dtsi
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+++ b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
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@@ -274,7 +274,8 @@
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pinctrl-0 = <&pinctrl_usbh>;
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vbus-supply = <®_usb_h1_vbus>;
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clocks = <&clks IMX6QDL_CLK_CKO>;
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- status = "okay";
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+ /* currently USB support causes a kernel hang. Disable it for now */
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+ status = "disabled";
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};
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&usdhc3 {
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@ -1,100 +0,0 @@
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From bb3e08008c0e48fd4f51a0f0957eecae61a24d69 Mon Sep 17 00:00:00 2001
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From: Peter Robinson <pbrobinson@gmail.com>
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Date: Tue, 1 Nov 2016 09:35:30 +0000
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Subject: [PATCH] Revert "mmc: omap_hsmmc: Use dma_request_chan() for
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requesting DMA channel"
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This reverts commit 81eef6ca92014845d40e3f1310e42b7010303acc.
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---
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drivers/mmc/host/omap_hsmmc.c | 50 ++++++++++++++++++++++++++++++++++---------
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1 file changed, 40 insertions(+), 10 deletions(-)
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diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
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index 24ebc9a..3563321 100644
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--- a/drivers/mmc/host/omap_hsmmc.c
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+++ b/drivers/mmc/host/omap_hsmmc.c
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@@ -32,6 +32,7 @@
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#include <linux/of_irq.h>
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#include <linux/of_gpio.h>
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#include <linux/of_device.h>
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+#include <linux/omap-dmaengine.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/core.h>
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#include <linux/mmc/mmc.h>
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@@ -1992,6 +1993,8 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
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struct resource *res;
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int ret, irq;
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const struct of_device_id *match;
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+ dma_cap_mask_t mask;
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+ unsigned tx_req, rx_req;
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const struct omap_mmc_of_data *data;
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void __iomem *base;
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@@ -2121,17 +2124,44 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
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omap_hsmmc_conf_bus_power(host);
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- host->rx_chan = dma_request_chan(&pdev->dev, "rx");
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- if (IS_ERR(host->rx_chan)) {
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- dev_err(mmc_dev(host->mmc), "RX DMA channel request failed\n");
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- ret = PTR_ERR(host->rx_chan);
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+ if (!pdev->dev.of_node) {
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+ res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
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+ if (!res) {
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+ dev_err(mmc_dev(host->mmc), "cannot get DMA TX channel\n");
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+ ret = -ENXIO;
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+ goto err_irq;
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+ }
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+ tx_req = res->start;
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+
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+ res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
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+ if (!res) {
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+ dev_err(mmc_dev(host->mmc), "cannot get DMA RX channel\n");
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+ ret = -ENXIO;
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+ goto err_irq;
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+ }
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+ rx_req = res->start;
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+ }
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+
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+ dma_cap_zero(mask);
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+ dma_cap_set(DMA_SLAVE, mask);
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+
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+ host->rx_chan =
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+ dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
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+ &rx_req, &pdev->dev, "rx");
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+
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+ if (!host->rx_chan) {
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+ dev_err(mmc_dev(host->mmc), "unable to obtain RX DMA engine channel\n");
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+ ret = -ENXIO;
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goto err_irq;
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}
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- host->tx_chan = dma_request_chan(&pdev->dev, "tx");
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- if (IS_ERR(host->tx_chan)) {
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- dev_err(mmc_dev(host->mmc), "TX DMA channel request failed\n");
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- ret = PTR_ERR(host->tx_chan);
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+ host->tx_chan =
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+ dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
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+ &tx_req, &pdev->dev, "tx");
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+
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+ if (!host->tx_chan) {
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+ dev_err(mmc_dev(host->mmc), "unable to obtain TX DMA engine channel\n");
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+ ret = -ENXIO;
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goto err_irq;
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}
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@@ -2189,9 +2219,9 @@ err_slot_name:
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mmc_remove_host(mmc);
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err_irq:
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device_init_wakeup(&pdev->dev, false);
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- if (!IS_ERR_OR_NULL(host->tx_chan))
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+ if (host->tx_chan)
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dma_release_channel(host->tx_chan);
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- if (!IS_ERR_OR_NULL(host->rx_chan))
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+ if (host->rx_chan)
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dma_release_channel(host->rx_chan);
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pm_runtime_dont_use_autosuspend(host->dev);
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pm_runtime_put_sync(host->dev);
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--
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2.9.3
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@ -0,0 +1,238 @@
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From patchwork Thu Jun 28 07:31:36 2018
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: mmc: sdhci-esdhc-imx: support eMMC DDR mode when running at 3.3V
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From: Stefan Agner <stefan@agner.ch>
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X-Patchwork-Id: 10493185
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Message-Id: <20180628073136.21748-1-stefan@agner.ch>
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To: adrian.hunter@intel.com, ulf.hansson@linaro.org
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Cc: fabio.estevam@nxp.com, haibo.chen@nxp.com, aisheng.dong@nxp.com,
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michael@amarulasolutions.com, linux-mmc@vger.kernel.org,
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linux-kernel@vger.kernel.org, Stefan Agner <stefan@agner.ch>
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Date: Thu, 28 Jun 2018 09:31:36 +0200
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The uSDHC supports DDR modes for eMMC devices running at 3.3V. This
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allows to run eMMC with 3.3V signaling voltage at DDR52 mode:
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# cat /sys/kernel/debug/mmc1/ios
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clock: 52000000 Hz
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vdd: 21 (3.3 ~ 3.4 V)
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bus mode: 2 (push-pull)
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chip select: 0 (don't care)
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power mode: 2 (on)
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bus width: 3 (8 bits)
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timing spec: 8 (mmc DDR52)
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signal voltage: 0 (3.30 V)
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driver type: 0 (driver type B)
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Signed-off-by: Stefan Agner <stefan@agner.ch>
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---
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drivers/mmc/host/sdhci-esdhc-imx.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
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index b716b933f00a..6f444731754d 100644
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--- a/drivers/mmc/host/sdhci-esdhc-imx.c
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+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
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@@ -1324,7 +1324,7 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
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if (esdhc_is_usdhc(imx_data)) {
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host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
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- host->mmc->caps |= MMC_CAP_1_8V_DDR;
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+ host->mmc->caps |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;
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if (!(imx_data->socdata->flags & ESDHC_FLAG_HS200))
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host->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;
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From patchwork Thu Jun 28 08:13:29 2018
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: [1/3] mmc: sdhci-esdhc-imx: get rid of support_vsel
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From: Stefan Agner <stefan@agner.ch>
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X-Patchwork-Id: 10493269
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Message-Id: <20180628081331.13051-2-stefan@agner.ch>
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To: adrian.hunter@intel.com, ulf.hansson@linaro.org
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Cc: fabio.estevam@nxp.com, haibo.chen@nxp.com, aisheng.dong@nxp.com,
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michael@amarulasolutions.com, rmk+kernel@armlinux.org.uk,
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linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
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Stefan Agner <stefan@agner.ch>
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Date: Thu, 28 Jun 2018 10:13:29 +0200
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The field support_vsel is currently only used in the device tree
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case. Get rid of it. No change in behavior.
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Signed-off-by: Stefan Agner <stefan@agner.ch>
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---
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drivers/mmc/host/sdhci-esdhc-imx.c | 8 ++------
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include/linux/platform_data/mmc-esdhc-imx.h | 2 --
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2 files changed, 2 insertions(+), 8 deletions(-)
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diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
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index 6f444731754d..20a420b765b3 100644
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--- a/drivers/mmc/host/sdhci-esdhc-imx.c
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+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
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@@ -1145,18 +1145,14 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
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&boarddata->tuning_start_tap);
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if (of_find_property(np, "no-1-8-v", NULL))
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- boarddata->support_vsel = false;
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- else
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- boarddata->support_vsel = true;
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+ host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
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if (of_property_read_u32(np, "fsl,delay-line", &boarddata->delay_line))
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boarddata->delay_line = 0;
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mmc_of_parse_voltage(np, &host->ocr_mask);
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- /* sdr50 and sdr104 need work on 1.8v signal voltage */
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- if ((boarddata->support_vsel) && esdhc_is_usdhc(imx_data) &&
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- !IS_ERR(imx_data->pins_default)) {
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+ if (esdhc_is_usdhc(imx_data) && !IS_ERR(imx_data->pins_default)) {
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imx_data->pins_100mhz = pinctrl_lookup_state(imx_data->pinctrl,
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ESDHC_PINCTRL_STATE_100MHZ);
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imx_data->pins_200mhz = pinctrl_lookup_state(imx_data->pinctrl,
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diff --git a/include/linux/platform_data/mmc-esdhc-imx.h b/include/linux/platform_data/mmc-esdhc-imx.h
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index 7daa78a2f342..640dec8b5b0c 100644
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--- a/include/linux/platform_data/mmc-esdhc-imx.h
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+++ b/include/linux/platform_data/mmc-esdhc-imx.h
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@@ -34,7 +34,6 @@ enum cd_types {
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* @cd_gpio: gpio for card_detect interrupt
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* @wp_type: type of write_protect method (see wp_types enum above)
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* @cd_type: type of card_detect method (see cd_types enum above)
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- * @support_vsel: indicate it supports 1.8v switching
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*/
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struct esdhc_platform_data {
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@@ -43,7 +42,6 @@ struct esdhc_platform_data {
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enum wp_types wp_type;
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enum cd_types cd_type;
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int max_bus_width;
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- bool support_vsel;
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unsigned int delay_line;
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unsigned int tuning_step; /* The delay cell steps in tuning procedure */
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unsigned int tuning_start_tap; /* The start delay cell point in tuning procedure */
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From patchwork Thu Jun 28 08:13:30 2018
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: [2/3] mmc: sdhci: add quirk to prevent higher speed modes
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From: Stefan Agner <stefan@agner.ch>
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X-Patchwork-Id: 10493273
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Message-Id: <20180628081331.13051-3-stefan@agner.ch>
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To: adrian.hunter@intel.com, ulf.hansson@linaro.org
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Cc: fabio.estevam@nxp.com, haibo.chen@nxp.com, aisheng.dong@nxp.com,
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michael@amarulasolutions.com, rmk+kernel@armlinux.org.uk,
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linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
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Stefan Agner <stefan@agner.ch>
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Date: Thu, 28 Jun 2018 10:13:30 +0200
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Some hosts are capable of running higher speed modes but do not
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have the board support for it. Introduce a quirk which prevents
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the stack from using modes running at 100MHz or faster.
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Signed-off-by: Stefan Agner <stefan@agner.ch>
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---
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drivers/mmc/host/sdhci.c | 8 ++++++++
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drivers/mmc/host/sdhci.h | 2 ++
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2 files changed, 10 insertions(+)
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diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
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index 1c828e0e9905..8ac257dfaab3 100644
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--- a/drivers/mmc/host/sdhci.c
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+++ b/drivers/mmc/host/sdhci.c
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@@ -3749,6 +3749,14 @@ int sdhci_setup_host(struct sdhci_host *host)
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}
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}
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+ if (host->quirks2 & SDHCI_QUIRK2_NO_UHS_HS200_HS400) {
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+ host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
|
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+ SDHCI_SUPPORT_DDR50);
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+
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+ mmc->caps2 &= ~(MMC_CAP2_HSX00_1_8V | MMC_CAP2_HSX00_1_2V |
|
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+ MMC_CAP2_HS400_ES);
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+ }
|
||||
+
|
||||
if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V) {
|
||||
host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
|
||||
SDHCI_SUPPORT_DDR50);
|
||||
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
|
||||
index 23966f887da6..cb2433d6d61f 100644
|
||||
--- a/drivers/mmc/host/sdhci.h
|
||||
+++ b/drivers/mmc/host/sdhci.h
|
||||
@@ -450,6 +450,8 @@ struct sdhci_host {
|
||||
* obtainable timeout.
|
||||
*/
|
||||
#define SDHCI_QUIRK2_DISABLE_HW_TIMEOUT (1<<17)
|
||||
+/* Do not support any higher speeds (>50MHz) */
|
||||
+#define SDHCI_QUIRK2_NO_UHS_HS200_HS400 (1<<18)
|
||||
|
||||
int irq; /* Device IRQ */
|
||||
void __iomem *ioaddr; /* Mapped address */
|
||||
From patchwork Thu Jun 28 08:13:31 2018
|
||||
Content-Type: text/plain; charset="utf-8"
|
||||
MIME-Version: 1.0
|
||||
Content-Transfer-Encoding: 7bit
|
||||
Subject: [3/3] mmc: sdhci-esdhc-imx: prevent stack from using higher speed
|
||||
modes
|
||||
From: Stefan Agner <stefan@agner.ch>
|
||||
X-Patchwork-Id: 10493271
|
||||
Message-Id: <20180628081331.13051-4-stefan@agner.ch>
|
||||
To: adrian.hunter@intel.com, ulf.hansson@linaro.org
|
||||
Cc: fabio.estevam@nxp.com, haibo.chen@nxp.com, aisheng.dong@nxp.com,
|
||||
michael@amarulasolutions.com, rmk+kernel@armlinux.org.uk,
|
||||
linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
|
||||
Stefan Agner <stefan@agner.ch>
|
||||
Date: Thu, 28 Jun 2018 10:13:31 +0200
|
||||
|
||||
If pinctrl configurations for higher speed modes are missing, the
|
||||
stack currently uses the no 1.8V quirk. This comes close to what
|
||||
we need but not exactly: E.g. if a eMMC chip uses 1.8V signaling
|
||||
(by specifying a 1.8V only vqmmc-supply) while not providing any
|
||||
100MHz/200MHz pinctrl configurations then the SDHCI_QUIRK2_NO_1_8_V
|
||||
leads the stack to print signaling voltage switch failed errors
|
||||
continuously:
|
||||
mmc1: Switching to 3.3V signalling voltage failed
|
||||
|
||||
Presumably because the stack tries to use 3.3V signaling:
|
||||
|
||||
# cat /sys/kernel/debug/mmc1/ios
|
||||
...
|
||||
timing spec: 8 (mmc DDR52)
|
||||
signal voltage: 0 (3.30 V)
|
||||
...
|
||||
|
||||
With using SDHCI_QUIRK2_NO_UHS_HS200_HS400 we prevent the stack
|
||||
from choosing any modes require speeds higher than 52MHz while
|
||||
still allowing to select modes using 1.8V at lower speeds (e.g.
|
||||
DDR52):
|
||||
|
||||
# cat /sys/kernel/debug/mmc1/ios
|
||||
...
|
||||
timing spec: 8 (mmc DDR52)
|
||||
signal voltage: 1 (1.80 V)
|
||||
...
|
||||
|
||||
Signed-off-by: Stefan Agner <stefan@agner.ch>
|
||||
---
|
||||
drivers/mmc/host/sdhci-esdhc-imx.c | 4 ++--
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
|
||||
index 20a420b765b3..4a1c33018072 100644
|
||||
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
|
||||
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
|
||||
@@ -1165,10 +1165,10 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
|
||||
* fall back to not supporting uhs by specifying no
|
||||
* 1.8v quirk
|
||||
*/
|
||||
- host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
|
||||
+ host->quirks2 |= SDHCI_QUIRK2_NO_UHS_HS200_HS400;
|
||||
}
|
||||
} else {
|
||||
- host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
|
||||
+ host->quirks2 |= SDHCI_QUIRK2_NO_UHS_HS200_HS400;
|
||||
}
|
||||
|
||||
/* call to generic mmc_of_parse to support additional capabilities */
|
||||
|
|
@ -1,41 +0,0 @@
|
|||
From 90e388ca5d8bbee022f9ed5fc24137b31579fa6e Mon Sep 17 00:00:00 2001
|
||||
From: Peter Robinson <pbrobinson@gmail.com>
|
||||
Date: Wed, 22 Nov 2017 15:52:36 +0000
|
||||
Subject: [PATCH] Revert "arm64: allwinner: a64: pine64: Use dcdc1 regulator
|
||||
for mmc0"
|
||||
|
||||
This reverts commit 3f241bfa60bdc9c4fde63fa6664a8ce00fd668c6.
|
||||
---
|
||||
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 9 ++++++++-
|
||||
1 file changed, 8 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
|
||||
index d06e34b5d192..caf8b6fbe5e3 100644
|
||||
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
|
||||
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
|
||||
@@ -61,6 +61,13 @@
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
+
|
||||
+ reg_vcc3v3: vcc3v3 {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc3v3";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ };
|
||||
};
|
||||
|
||||
&ehci0 {
|
||||
@@ -84,7 +91,7 @@
|
||||
&mmc0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc0_pins>;
|
||||
- vmmc-supply = <®_dcdc1>;
|
||||
+ vmmc-supply = <®_vcc3v3>;
|
||||
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
|
||||
disable-wp;
|
||||
bus-width = <4>;
|
||||
--
|
||||
2.14.3
|
||||
|
||||
|
|
@ -1,55 +0,0 @@
|
|||
From 1b6867ee05d84cc6ec23b5ec0b78684187d3190a Mon Sep 17 00:00:00 2001
|
||||
From: Boris Brezillon <boris.brezillon@bootlin.com>
|
||||
Date: Wed, 7 Mar 2018 15:41:14 +0100
|
||||
Subject: [PATCH] clk: bcm2835: Make sure the PLL is gated before changing its
|
||||
rate
|
||||
|
||||
All bcm2835 PLLs should be gated before their rate can be changed.
|
||||
Setting CLK_SET_RATE_GATE will let the core enforce that, but this is
|
||||
not enough to make the code work in all situations. Indeed, the
|
||||
CLK_SET_RATE_GATE flag prevents a user from changing the rate while
|
||||
the clock is enabled, but this check only guarantees there's no Linux
|
||||
users. In our case, the clock might have been enabled by the
|
||||
bootloader/FW, and, because we have CLK_IGNORE_UNUSED set, Linux never
|
||||
disables the PLL. So we have to make sure the PLL is actually disabled
|
||||
before changing the rate.
|
||||
|
||||
Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
|
||||
Cc: <stable@vger.kernel.org>
|
||||
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
|
||||
---
|
||||
drivers/clk/bcm/clk-bcm2835.c | 14 +++++++++++++-
|
||||
1 file changed, 13 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
|
||||
index 6c5d4a8e426c..051ce769c109 100644
|
||||
--- a/drivers/clk/bcm/clk-bcm2835.c
|
||||
+++ b/drivers/clk/bcm/clk-bcm2835.c
|
||||
@@ -678,6 +678,18 @@ static int bcm2835_pll_set_rate(struct clk_hw *hw,
|
||||
u32 ana[4];
|
||||
int i;
|
||||
|
||||
+ /*
|
||||
+ * Normally, the CLK_SET_RATE_GATE flag prevents a user from changing
|
||||
+ * the rate while the clock is enabled, but this check only makes sure
|
||||
+ * there's no Linux users.
|
||||
+ * In our case, the clock might have been enabled by the bootloader/FW,
|
||||
+ * and, since CLK_IGNORE_UNUSED flag is set, Linux never disables it.
|
||||
+ * So we have to make sure the clk is actually disabled before changing
|
||||
+ * the rate.
|
||||
+ */
|
||||
+ if (bcm2835_pll_is_on(hw))
|
||||
+ bcm2835_pll_off(hw);
|
||||
+
|
||||
if (rate > data->max_fb_rate) {
|
||||
use_fb_prediv = true;
|
||||
rate /= 2;
|
||||
@@ -1318,7 +1330,7 @@ static struct clk_hw *bcm2835_register_pll(struct bcm2835_cprman *cprman,
|
||||
init.num_parents = 1;
|
||||
init.name = data->name;
|
||||
init.ops = &bcm2835_pll_clk_ops;
|
||||
- init.flags = CLK_IGNORE_UNUSED;
|
||||
+ init.flags = CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE;
|
||||
|
||||
pll = kzalloc(sizeof(*pll), GFP_KERNEL);
|
||||
if (!pll)
|
||||
17
kernel.spec
17
kernel.spec
|
|
@ -579,18 +579,16 @@ Patch304: ACPI-irq-Workaround-firmware-issue-on-X-Gene-based-m400.patch
|
|||
# https://patchwork.kernel.org/patch/9820417/
|
||||
Patch305: qcom-msm89xx-fixes.patch
|
||||
|
||||
# https://patchwork.kernel.org/patch/10173115/
|
||||
Patch306: arm-dts-imx6qdl-udoo-Disable-usbh1-to-avoid-kernel-hang.patch
|
||||
# https://patchwork.kernel.org/project/linux-mmc/list/?submitter=71861
|
||||
Patch306: sdhci-esdhc-imx-fixes.patch
|
||||
|
||||
Patch309: arm-tegra-fix-nouveau-crash.patch
|
||||
|
||||
Patch324: bcm283x-clk-audio-fixes.patch
|
||||
Patch307: arm-tegra-fix-nouveau-crash.patch
|
||||
|
||||
# Enabling Patches for the RPi3+
|
||||
Patch332: bcm2837-enable-pmu.patch
|
||||
Patch333: bcm2837-lan78xx-fixes.patch
|
||||
Patch330: bcm2837-enable-pmu.patch
|
||||
Patch331: bcm2837-lan78xx-fixes.patch
|
||||
|
||||
Patch335: bcm2835-cpufreq-add-CPU-frequency-control-driver.patch
|
||||
Patch332: bcm2835-cpufreq-add-CPU-frequency-control-driver.patch
|
||||
|
||||
# 400 - IBM (ppc/s390x) patches
|
||||
|
||||
|
|
@ -1843,6 +1841,9 @@ fi
|
|||
#
|
||||
#
|
||||
%changelog
|
||||
* Fri Jun 29 2018 Peter Robinson <pbrobinson@fedoraproject.org>
|
||||
- Add a possible i.MX6 sdhci fix
|
||||
|
||||
* Thu Jun 28 2018 Laura Abbott <labbott@redhat.com> - 4.18.0-0.rc2.git3.1
|
||||
- Linux v4.18-rc2-132-gf57494321cbf
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue