CVE-2012-2372 mm: 32bit PAE pmd walk vs populate SMP race (rhbz 822821 822825)
This commit is contained in:
Josh Boyer
parent
ecd02ebffc
commit
440886d090
11
kernel.spec
11
kernel.spec
@ -62,7 +62,7 @@ Summary: The Linux kernel
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# For non-released -rc kernels, this will be appended after the rcX and
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# For non-released -rc kernels, this will be appended after the rcX and
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# gitX tags, so a 3 here would become part of release "0.rcX.gitX.3"
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# gitX tags, so a 3 here would become part of release "0.rcX.gitX.3"
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#
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#
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%global baserelease 1
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%global baserelease 2
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%global fedora_build %{baserelease}
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%global fedora_build %{baserelease}
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# base_sublevel is the kernel version we're starting with and patching
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# base_sublevel is the kernel version we're starting with and patching
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@ -753,6 +753,9 @@ Patch22000: weird-root-dentry-name-debug.patch
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#selinux ptrace child permissions
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#selinux ptrace child permissions
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Patch22001: selinux-apply-different-permission-to-ptrace-child.patch
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Patch22001: selinux-apply-different-permission-to-ptrace-child.patch
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#rhbz 822825 822821 CVE-2012-2372
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Patch22021: mm-pmd_read_atomic-fix-32bit-PAE-pmd-walk-vs-pmd_populate-SMP-race-condition.patch
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# END OF PATCH DEFINITIONS
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# END OF PATCH DEFINITIONS
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%endif
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%endif
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@ -1451,6 +1454,9 @@ ApplyPatch highbank-export-clock-functions.patch
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#vgaarb patches. blame mjg59
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#vgaarb patches. blame mjg59
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ApplyPatch vgaarb-vga_default_device.patch
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ApplyPatch vgaarb-vga_default_device.patch
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#rhbz 822825 822821 CVE-2012-2372
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ApplyPatch mm-pmd_read_atomic-fix-32bit-PAE-pmd-walk-vs-pmd_populate-SMP-race-condition.patch
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# END OF PATCH APPLICATIONS
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# END OF PATCH APPLICATIONS
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%endif
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%endif
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@ -2301,6 +2307,9 @@ fi
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# ||----w |
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# ||----w |
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# || ||
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# || ||
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%changelog
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%changelog
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* Thu May 24 2012 Josh Boyer <jwboyer@redhat.com>
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- CVE-2012-2372 mm: 32bit PAE pmd walk vs populate SMP race (rhbz 822821 822825)
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* Thu May 24 2012 Peter Robinson <pbrobinson@fedoraproject.org>
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* Thu May 24 2012 Peter Robinson <pbrobinson@fedoraproject.org>
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- Don't build Nokia ARM device support
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- Don't build Nokia ARM device support
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@ -0,0 +1,272 @@
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Path: news.gmane.org!not-for-mail
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From: Andrea Arcangeli <aarcange@redhat.com>
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Newsgroups: gmane.linux.kernel.mm
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Subject: [PATCH] mm: pmd_read_atomic: fix 32bit PAE pmd walk vs pmd_populate SMP race condition
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Date: Thu, 24 May 2012 01:39:01 +0200
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Lines: 208
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Approved: news@gmane.org
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Message-ID: <1337816341-30743-1-git-send-email-aarcange@redhat.com>
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References: <20120518230028.GF32479@redhat.com>
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NNTP-Posting-Date: Wed, 23 May 2012 23:39:14 +0000 (UTC)
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Cc: Andrew Morton <akpm@linux-foundation.org>, Mel Gorman <mgorman@suse.de>,
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Hugh Dickins <hughd@google.com>, Larry Woodman <lwoodman@redhat.com>,
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Petr Matousek <pmatouse@redhat.com>,
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Ulrich Obergfell <uobergfe@redhat.com>, Rik van Riel <riel@redhat.com>
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Xref: news.gmane.org gmane.linux.kernel.mm:78936
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Archived-At: <http://permalink.gmane.org/gmane.linux.kernel.mm/78936>
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When holding the mmap_sem for reading, pmd_offset_map_lock should only
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run on a pmd_t that has been read atomically from the pmdp
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pointer, otherwise we may read only half of it leading to this crash.
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PID: 11679 TASK: f06e8000 CPU: 3 COMMAND: "do_race_2_panic"
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#0 [f06a9dd8] crash_kexec at c049b5ec
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#1 [f06a9e2c] oops_end at c083d1c2
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#2 [f06a9e40] no_context at c0433ded
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#3 [f06a9e64] bad_area_nosemaphore at c043401a
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#4 [f06a9e6c] __do_page_fault at c0434493
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#5 [f06a9eec] do_page_fault at c083eb45
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#6 [f06a9f04] error_code (via page_fault) at c083c5d5
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EAX: 01fb470c EBX: fff35000 ECX: 00000003 EDX: 00000100 EBP:
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00000000
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DS: 007b ESI: 9e201000 ES: 007b EDI: 01fb4700 GS: 00e0
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CS: 0060 EIP: c083bc14 ERR: ffffffff EFLAGS: 00010246
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#7 [f06a9f38] _spin_lock at c083bc14
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#8 [f06a9f44] sys_mincore at c0507b7d
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#9 [f06a9fb0] system_call at c083becd
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start len
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EAX: ffffffda EBX: 9e200000 ECX: 00001000 EDX: 6228537f
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DS: 007b ESI: 00000000 ES: 007b EDI: 003d0f00
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SS: 007b ESP: 62285354 EBP: 62285388 GS: 0033
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CS: 0073 EIP: 00291416 ERR: 000000da EFLAGS: 00000286
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This should be a longstanding bug affecting x86 32bit PAE without
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THP. Only archs with 64bit large pmd_t and 32bit unsigned long should
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be affected.
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With THP enabled the barrier() in
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pmd_none_or_trans_huge_or_clear_bad() would partly hide the bug when
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the pmd transition from none to stable, by forcing a re-read of the
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*pmd in pmd_offset_map_lock, but when THP is enabled a new set of
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problem arises by the fact could then transition freely in any of the
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none, pmd_trans_huge or pmd_trans_stable states. So making the barrier
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in pmd_none_or_trans_huge_or_clear_bad() unconditional isn't good idea
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and it would be a flakey solution.
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This should be fully fixed by introducing a pmd_read_atomic that reads
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the pmd in order with THP disabled, or by reading the pmd atomically
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with cmpxchg8b with THP enabled.
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Luckily this new race condition only triggers in the places that must
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already be covered by pmd_none_or_trans_huge_or_clear_bad() so the fix
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is localized there but this bug is not related to THP.
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NOTE: this can trigger on x86 32bit systems with PAE enabled with more
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than 4G of ram, otherwise the high part of the pmd will never risk to
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be truncated because it would be zero at all times, in turn so hiding
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the SMP race.
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This bug was discovered and fully debugged by Ulrich, quote:
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----
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[..]
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pmd_none_or_trans_huge_or_clear_bad() loads the content of edx and
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eax.
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496 static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t
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*pmd)
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497 {
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498 /* depend on compiler for an atomic pmd read */
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499 pmd_t pmdval = *pmd;
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// edi = pmd pointer
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0xc0507a74 <sys_mincore+548>: mov 0x8(%esp),%edi
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...
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// edx = PTE page table high address
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0xc0507a84 <sys_mincore+564>: mov 0x4(%edi),%edx
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...
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// eax = PTE page table low address
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0xc0507a8e <sys_mincore+574>: mov (%edi),%eax
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[..]
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Please note that the PMD is not read atomically. These are two "mov"
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instructions where the high order bits of the PMD entry are fetched
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first. Hence, the above machine code is prone to the following race.
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- The PMD entry {high|low} is 0x0000000000000000.
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The "mov" at 0xc0507a84 loads 0x00000000 into edx.
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- A page fault (on another CPU) sneaks in between the two "mov"
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instructions and instantiates the PMD.
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- The PMD entry {high|low} is now 0x00000003fda38067.
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The "mov" at 0xc0507a8e loads 0xfda38067 into eax.
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----
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Reported-by: Ulrich Obergfell <uobergfe@redhat.com>
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Signed-off-by: Andrea Arcangeli <aarcange@redhat.com>
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---
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arch/x86/include/asm/pgtable-3level.h | 50 +++++++++++++++++++++++++++++++++
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include/asm-generic/pgtable.h | 22 +++++++++++++-
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2 files changed, 70 insertions(+), 2 deletions(-)
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diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h
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index effff47..43876f1 100644
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--- a/arch/x86/include/asm/pgtable-3level.h
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+++ b/arch/x86/include/asm/pgtable-3level.h
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@@ -31,6 +31,56 @@ static inline void native_set_pte(pte_t *ptep, pte_t pte)
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ptep->pte_low = pte.pte_low;
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}
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+#define pmd_read_atomic pmd_read_atomic
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+/*
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+ * pte_offset_map_lock on 32bit PAE kernels was reading the pmd_t with
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+ * a "*pmdp" dereference done by gcc. Problem is, in certain places
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+ * where pte_offset_map_lock is called, concurrent page faults are
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+ * allowed, if the mmap_sem is hold for reading. An example is mincore
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+ * vs page faults vs MADV_DONTNEED. On the page fault side
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+ * pmd_populate rightfully does a set_64bit, but if we're reading the
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+ * pmd_t with a "*pmdp" on the mincore side, a SMP race can happen
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+ * because gcc will not read the 64bit of the pmd atomically. To fix
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+ * this all places running pmd_offset_map_lock() while holding the
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+ * mmap_sem in read mode, shall read the pmdp pointer using this
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+ * function to know if the pmd is null nor not, and in turn to know if
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+ * they can run pmd_offset_map_lock or pmd_trans_huge or other pmd
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+ * operations.
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+ *
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+ * Without THP if the mmap_sem is hold for reading, the
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+ * pmd can only transition from null to not null while pmd_read_atomic runs.
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+ * So there's no need of literally reading it atomically.
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+ *
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+ * With THP if the mmap_sem is hold for reading, the pmd can become
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+ * THP or null or point to a pte (and in turn become "stable") at any
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+ * time under pmd_read_atomic, so it's mandatory to read it atomically
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+ * with cmpxchg8b.
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+ */
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+#ifndef CONFIG_TRANSPARENT_HUGEPAGE
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+static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
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+{
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+ pmdval_t ret;
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+ u32 *tmp = (u32 *)pmdp;
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+
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+ ret = (pmdval_t) (*tmp);
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+ if (ret) {
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+ /*
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+ * If the low part is null, we must not read the high part
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+ * or we can end up with a partial pmd.
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+ */
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+ smp_rmb();
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+ ret |= ((pmdval_t)*(tmp + 1)) << 32;
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+ }
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+
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+ return (pmd_t) { ret };
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+}
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+#else /* CONFIG_TRANSPARENT_HUGEPAGE */
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+static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
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+{
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+ return (pmd_t) { atomic64_read((atomic64_t *)pmdp) };
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+}
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+#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
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+
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static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte)
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{
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set_64bit((unsigned long long *)(ptep), native_pte_val(pte));
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diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
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index 125c54e..fa596d9 100644
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--- a/include/asm-generic/pgtable.h
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+++ b/include/asm-generic/pgtable.h
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@@ -446,6 +446,18 @@ static inline int pmd_write(pmd_t pmd)
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#endif /* __HAVE_ARCH_PMD_WRITE */
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#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
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+#ifndef pmd_read_atomic
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+static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
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+{
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+ /*
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+ * Depend on compiler for an atomic pmd read. NOTE: this is
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+ * only going to work, if the pmdval_t isn't larger than
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+ * an unsigned long.
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+ */
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+ return *pmdp;
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+}
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+#endif
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+
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/*
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* This function is meant to be used by sites walking pagetables with
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* the mmap_sem hold in read mode to protect against MADV_DONTNEED and
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@@ -459,11 +471,17 @@ static inline int pmd_write(pmd_t pmd)
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* undefined so behaving like if the pmd was none is safe (because it
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* can return none anyway). The compiler level barrier() is critically
|
||||||
|
* important to compute the two checks atomically on the same pmdval.
|
||||||
|
+ *
|
||||||
|
+ * For 32bit kernels with a 64bit large pmd_t this automatically takes
|
||||||
|
+ * care of reading the pmd atomically to avoid SMP race conditions
|
||||||
|
+ * against pmd_populate() when the mmap_sem is hold for reading by the
|
||||||
|
+ * caller (a special atomic read not done by "gcc" as in the generic
|
||||||
|
+ * version above, is also needed when THP is disabled because the page
|
||||||
|
+ * fault can populate the pmd from under us).
|
||||||
|
*/
|
||||||
|
static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
|
||||||
|
{
|
||||||
|
- /* depend on compiler for an atomic pmd read */
|
||||||
|
- pmd_t pmdval = *pmd;
|
||||||
|
+ pmd_t pmdval = pmd_read_atomic(pmd);
|
||||||
|
/*
|
||||||
|
* The barrier will stabilize the pmdval in a register or on
|
||||||
|
* the stack so that it will stop changing under the code.
|
||||||
|
|
||||||
|
--
|
||||||
|
To unsubscribe, send a message with 'unsubscribe linux-mm' in
|
||||||
|
the body to majordomo@kvack.org. For more info on Linux MM,
|
||||||
|
see: http://www.linux-mm.org/ .
|
||||||
|
Fight unfair telecom internet charges in Canada: sign http://stopthemeter.ca/
|
||||||
|
Don't email: <a href=mailto:"dont@kvack.org"> email@kvack.org </a>
|
||||||
|
|
||||||
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Reference in New Issue
Block a user