From 42d57b05d4d637ef0082c68e6cbb6528e1c8808d Mon Sep 17 00:00:00 2001 From: Laura Abbott Date: Mon, 15 May 2017 12:41:31 -0700 Subject: [PATCH] Linux v4.11.1 rebase --- ...nable-the-Surface-3-Type-Cover-to-re.patch | 99 - 0001-Work-around-for-gcc7-and-arm64.patch | 62 - ...200-Black-screen-fix-for-G200e-rev-4.patch | 58 - ...-i2c-bcm2835-Debug-test-for-curr_msg.patch | 29 - ...nable-the-Surface-4-Type-Cover-Pro-J.patch | 83 - ...on-fix-out-of-bounds-memory-accesses.patch | 138 - ...nable-Surface-4-Type-Cover-Pro-non-J.patch | 88 - ...-sor-gf119-both-links-use-the-same-t.patch | 46 - ...-sor-gm107-training-pattern-register.patch | 195 - ...bc-Disable-on-HSW-by-default-for-now.patch | 55 - ...Fix-leak-in-SNDRV_TIMER_IOCTL_PARAMS.patch | 33 - ...eak-in-events-via-snd_timer_user_cca.patch | 34 - ...eak-in-events-via-snd_timer_user_tin.patch | 34 - ...tomatically-enforce-module-signature.patch | 217 - AllWinner-h3.patch | 1080 +++++ AllWinner-net-emac.patch | 4172 ++++++++--------- Armada-trace-build-fix.patch | 20 - CVE-2017-7477.patch | 73 + CVE-2017-7645.patch | 180 + ...o-use-stdout-path-for-serial-console.patch | 318 -- ...ial-AllWinner-A64-and-PINE64-support.patch | 1200 ----- KEYS-potential-uninitialized-variable.patch | 30 - ...sbfs-fix-potential-infoleak-in-devio.patch | 41 - arm-imx6-hummingboard2.patch | 413 +- arm-rk3288-tinker.patch | 573 +++ ...option-of-13-for-FORCE_MAX_ZONEORDER.patch | 29 + arm64-acpi-drop-expert-patch.patch | 21 - ...ing-console-to-enable-serial-console.patch | 46 - arm64-hikey-fixes.patch | 77 + arm64-pcie-acpi.patch | 1247 ----- arm64-pcie-quirks-xgene.patch | 508 -- baseconfig/CONFIG_ARCH_TEGRA_186_SOC | 1 - baseconfig/CONFIG_ARM64_PTDUMP | 1 - baseconfig/CONFIG_ARM_SCPI_PROTOCOL | 1 - baseconfig/CONFIG_BATTERY_GOLDFISH | 1 - baseconfig/CONFIG_BLK_DEBUG_FS | 1 + baseconfig/CONFIG_BLK_SED_OPAL | 1 + baseconfig/CONFIG_BT_HCIUART_NOKIA | 1 + baseconfig/CONFIG_CFG80211_CRDA_SUPPORT | 1 + baseconfig/CONFIG_CGROUP_RDMA | 1 + baseconfig/CONFIG_CHARGER_DETECTOR_MAX14656 | 1 + baseconfig/CONFIG_CHARGER_SBS | 1 + baseconfig/CONFIG_CM3605 | 1 + baseconfig/CONFIG_COMMON_CLK_HI3519 | 1 - baseconfig/CONFIG_COMMON_CLK_MT2701 | 1 - baseconfig/CONFIG_COMMON_CLK_MT2701_BDPSYS | 1 - baseconfig/CONFIG_COMMON_CLK_MT2701_ETHSYS | 1 - baseconfig/CONFIG_COMMON_CLK_MT2701_HIFSYS | 1 - baseconfig/CONFIG_COMMON_CLK_MT2701_IMGSYS | 1 - baseconfig/CONFIG_COMMON_CLK_MT2701_MMSYS | 1 - baseconfig/CONFIG_COMMON_CLK_MT2701_VDECSYS | 1 - baseconfig/CONFIG_COMMON_CLK_MT8135 | 1 - baseconfig/CONFIG_COMMON_CLK_MT8173 | 1 - baseconfig/CONFIG_COMMON_CLK_OXNAS | 1 - baseconfig/CONFIG_COMMON_CLK_VC5 | 1 + baseconfig/CONFIG_COMMON_RESET_HI3660 | 1 + baseconfig/CONFIG_CRYPTO_AES_TI | 1 + baseconfig/CONFIG_CRYPTO_CRC32_ARM_CE | 1 - baseconfig/CONFIG_CRYPTO_CRCT10DIF_ARM_CE | 1 - baseconfig/CONFIG_DEBUG_REFCOUNT | 1 + ...revisit this if performance isn't horrible | 1 + baseconfig/CONFIG_DEVPORT | 1 + ...CONFIG_DPM_WATCHDOG revisit this in debug} | 0 baseconfig/CONFIG_DRM_DEBUG_MM_SELFTEST | 1 + baseconfig/CONFIG_DRM_I2C_ADV7533 | 2 +- baseconfig/CONFIG_DRM_MALI_DISPLAY | 1 - baseconfig/CONFIG_DRM_TINYDRM | 1 + baseconfig/CONFIG_DVB_USB_ZD1301 | 1 + baseconfig/CONFIG_EEPROM_IDT_89HPESX | 1 + baseconfig/CONFIG_EMAC_ROCKCHIP | 1 - baseconfig/CONFIG_EXTCON_INTEL_INT3496 | 1 + baseconfig/CONFIG_FB_GOLDFISH | 1 - baseconfig/CONFIG_FSI | 1 + baseconfig/CONFIG_GPIO_EXAR | 1 + baseconfig/CONFIG_GPIO_PCI_IDIO_16 | 1 + baseconfig/CONFIG_GPIO_SYSFS | 2 +- baseconfig/CONFIG_GPIO_ZX | 1 - baseconfig/CONFIG_HX711 | 1 + baseconfig/CONFIG_IIO_ST_LSM6DSX | 1 + baseconfig/CONFIG_INET6_ESP_OFFLOAD | 1 + baseconfig/CONFIG_INET_ESP_OFFLOAD | 1 + baseconfig/CONFIG_INFINIBAND_BNXT_RE | 1 + baseconfig/CONFIG_INTEL_RDT_A | 1 - baseconfig/CONFIG_IPVTAP | 1 + baseconfig/CONFIG_IR_SPI | 1 + baseconfig/CONFIG_KEYBOARD_TM2_TOUCHKEY | 1 + baseconfig/CONFIG_KPROBE_EVENT | 1 - baseconfig/CONFIG_KPROBE_EVENTS | 1 + baseconfig/CONFIG_LEDS_BRIGHTNESS_HW_CHANGED | 1 + baseconfig/CONFIG_LPFC_NVME_INITIATOR | 1 + baseconfig/CONFIG_LPFC_NVME_TARGET | 1 + baseconfig/CONFIG_MAGIC_SYSRQ_SERIAL | 1 + baseconfig/CONFIG_MAX11100 | 1 + baseconfig/CONFIG_MAX5481 | 1 + baseconfig/CONFIG_MESON_GXL_PHY | 1 - baseconfig/CONFIG_MFD_CPCAP | 1 + baseconfig/CONFIG_MOUSE_PS2_VMMOUSE | 1 - baseconfig/CONFIG_MQ_IOSCHED_DEADLINE | 1 + baseconfig/CONFIG_NET_ACT_SAMPLE | 1 + baseconfig/CONFIG_NET_IFE | 1 + baseconfig/CONFIG_NET_L3_MASTER_DEV | 2 +- baseconfig/CONFIG_NET_VENDOR_AMAZON | 2 +- baseconfig/CONFIG_NET_VENDOR_AQUANTIA | 1 + baseconfig/CONFIG_NFP | 1 + baseconfig/CONFIG_NFP_DEBUG | 1 + baseconfig/CONFIG_NFT_SET_BITMAP | 1 + baseconfig/CONFIG_PARMAN | 1 + baseconfig/CONFIG_PC104 | 1 + baseconfig/CONFIG_PHY_QCOM_USB_HS | 1 + baseconfig/CONFIG_PHY_QCOM_USB_HSIC | 1 + baseconfig/CONFIG_PINCTRL_TI_IODELAY | 1 + baseconfig/CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT | 1 + baseconfig/CONFIG_PSAMPLE | 1 + baseconfig/CONFIG_PWRSEQ_SD8787 | 1 + baseconfig/CONFIG_QCOM_EBI2 | 1 - baseconfig/CONFIG_QEDF | 1 + baseconfig/CONFIG_RADIO_WL128X | 1 - baseconfig/CONFIG_REGULATOR_CPCAP | 1 + baseconfig/CONFIG_SENSORS_STTS751 | 1 + baseconfig/CONFIG_SERIAL_8250_EXAR | 1 + baseconfig/CONFIG_SERIAL_8250_PCI | 1 + baseconfig/CONFIG_SERIAL_DEV_BUS | 1 + baseconfig/CONFIG_SERIAL_DEV_CTRL_TTYPORT | 1 + baseconfig/CONFIG_SMC | 1 + baseconfig/CONFIG_SND_SIMPLE_SCU_CARD | 2 +- baseconfig/CONFIG_SND_SOC_NAU8540 | 1 + .../{arm/armv7 => }/CONFIG_SND_SOC_TAS571X | 0 baseconfig/CONFIG_SOC_ZTE | 1 + baseconfig/CONFIG_SRF08 | 1 + baseconfig/CONFIG_STATIC_USERMODEHELPER | 1 + baseconfig/CONFIG_TEGRA_GMI | 1 - baseconfig/CONFIG_TEST_PARMAN | 1 + baseconfig/CONFIG_TEST_SORT | 1 + baseconfig/CONFIG_TI_ADS7950 | 1 + baseconfig/CONFIG_TI_TLC4541 | 1 + baseconfig/CONFIG_TMP007 | 1 + baseconfig/CONFIG_TOUCHSCREEN_ZET6223 | 1 + baseconfig/CONFIG_UPROBE_EVENT | 1 - baseconfig/CONFIG_UPROBE_EVENTS | 1 + baseconfig/CONFIG_USB_CHIPIDEA_ULPI | 1 + baseconfig/CONFIG_USB_HUB_USB251XB | 1 + baseconfig/CONFIG_USB_SERIAL_UPD78F0730 | 1 + ...FT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT | 1 + .../CONFIG_VIDEO_IVTV_DEPRECATED_IOCTLS | 1 + baseconfig/CONFIG_VIDEO_SAMSUNG_S5P_CEC | 1 - baseconfig/CONFIG_VIRTIO_BLK_SCSI | 1 + baseconfig/CONFIG_W1_SLAVE_DS2405 | 1 + baseconfig/CONFIG_WW_MUTEX_SELFTEST | 1 + baseconfig/arm/CONFIG_AGP | 1 - .../{arm64 => }/CONFIG_COMMON_CLK_MAX77686 | 0 baseconfig/arm/CONFIG_CRYPTO_CHACHA20_NEON | 1 + baseconfig/arm/CONFIG_DMA_SUN6I | 1 + baseconfig/arm/{arm64 => }/CONFIG_DRM_MESON | 0 baseconfig/arm/CONFIG_DRM_NXP_PTN3460 | 1 + baseconfig/arm/CONFIG_DRM_PARADE_PS8622 | 1 + baseconfig/arm/CONFIG_DRM_TINYDRM | 1 + baseconfig/arm/CONFIG_DRM_VMWGFX | 1 - baseconfig/arm/CONFIG_DWMAC_DWC_QOS_ETH | 1 + .../arm/{armv7 => }/CONFIG_DWMAC_GENERIC | 0 baseconfig/arm/CONFIG_DWMAC_IPQ806X | 1 - baseconfig/arm/CONFIG_HAMRADIO | 1 - baseconfig/arm/CONFIG_I2C_TEGRA_BPMP | 1 + .../{armv7 => }/CONFIG_IOMMU_IO_PGTABLE_LPAE | 0 baseconfig/arm/{armv7 => }/CONFIG_LEDS_GPIO | 0 .../arm/{armv7 => }/CONFIG_LEDS_GPIO_REGISTER | 0 baseconfig/arm/{armv7 => }/CONFIG_LEDS_PWM | 0 baseconfig/arm/{armv7 => }/CONFIG_LEDS_SYSCON | 0 .../arm/{armv7 => }/CONFIG_LEDS_TRIGGER_CPU | 0 baseconfig/arm/CONFIG_MESON_SARADC | 1 + .../arm/{armv7 => }/CONFIG_MFD_MAX77686 | 0 baseconfig/arm/CONFIG_MMC_BCM2835 | 1 + baseconfig/arm/CONFIG_MTD_PHYSMAP_OF_GEMINI | 1 + baseconfig/arm/{armv7 => }/CONFIG_MVPP2 | 0 baseconfig/arm/CONFIG_PHY_QCOM_USB_HS | 1 + baseconfig/arm/CONFIG_PHY_QCOM_USB_HSIC | 1 + baseconfig/arm/CONFIG_PINCTRL_GEMINILAKE | 1 + baseconfig/arm/CONFIG_QCOM_IRQ_COMBINER | 1 + baseconfig/arm/CONFIG_QORIQ_CPUFREQ | 1 + .../arm/{armv7 => }/CONFIG_REGULATOR_MAX77686 | 0 .../arm/{armv7 => }/CONFIG_REGULATOR_MAX77802 | 0 baseconfig/arm/CONFIG_REGULATOR_PWM | 2 +- baseconfig/arm/CONFIG_RFKILL_REGULATOR | 1 - baseconfig/arm/CONFIG_SERIAL_NONSTANDARD | 1 + .../arm/{armv7 => }/CONFIG_SND_SOC_AC97_CODEC | 0 .../{armv7/armv7 => }/CONFIG_SND_SOC_ES8328 | 0 .../armv7 => }/CONFIG_SND_SOC_ES8328_I2C | 0 .../armv7 => }/CONFIG_SND_SOC_ES8328_SPI | 0 .../arm/CONFIG_SND_SOC_RK3288_HDMI_ANALOG | 1 + .../arm/CONFIG_SND_SOC_RK3399_GRU_SOUND | 1 + .../lpae => }/CONFIG_SND_SOC_TEGRA_ALC5632 | 0 .../lpae => }/CONFIG_SND_SOC_TEGRA_TRIMSLICE | 0 .../lpae => }/CONFIG_SND_SOC_TEGRA_WM8903 | 0 .../lpae => }/CONFIG_SND_SOC_TEGRA_WM9712 | 0 .../arm/{armv7 => }/CONFIG_SND_SOC_TS3A227E | 0 .../arm/{armv7 => }/CONFIG_STMMAC_PLATFORM | 0 baseconfig/{ => arm}/CONFIG_SUN50I_A64_CCU | 0 baseconfig/arm/CONFIG_SUN5I_CCU | 1 + baseconfig/{ => arm}/CONFIG_SUN6I_A31_CCU | 0 baseconfig/{ => arm}/CONFIG_SUN8I_A23_CCU | 0 baseconfig/{ => arm}/CONFIG_SUN8I_A33_CCU | 0 baseconfig/arm/CONFIG_SUN8I_H3_CCU | 1 + baseconfig/arm/CONFIG_SUN8I_V3S_CCU | 1 + baseconfig/arm/CONFIG_SUN9I_A80_CCU | 1 + baseconfig/{ => arm}/CONFIG_SUNXI_CCU | 0 baseconfig/arm/CONFIG_SYSCON_REBOOT_MODE | 1 + baseconfig/arm/CONFIG_TINYDRM_MI0283QT | 1 + baseconfig/arm/CONFIG_TINYDRM_MIPI_DBI | 1 + baseconfig/arm/arm64/CONFIG_ARCH_MESON | 1 - baseconfig/arm/arm64/CONFIG_ARCH_THUNDER2 | 1 + baseconfig/arm/arm64/CONFIG_ARM64_4K_PAGES | 1 + baseconfig/arm/arm64/CONFIG_ARM64_64K_PAGES | 1 - .../arm/arm64/CONFIG_ARMADA_AP806_SYSCON | 1 + baseconfig/arm/arm64/CONFIG_CAVIUM_CPT | 1 + baseconfig/arm/arm64/CONFIG_CHARGER_AXP20X | 1 + .../arm64}/CONFIG_COMMON_CLK_HI3516CV300 | 0 baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI3519 | 1 + baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI3660 | 1 + .../arm64}/CONFIG_COMMON_CLK_HI3798CV200 | 0 baseconfig/arm/arm64/CONFIG_COMMON_CLK_PWM | 1 + baseconfig/arm/arm64/CONFIG_COMPAT | 1 + baseconfig/arm/arm64/CONFIG_CRYPTO_AES_ARM64 | 1 + .../arm/arm64/CONFIG_CRYPTO_AES_ARM64_BS | 1 + baseconfig/arm/arm64/CONFIG_DEBUG_EFI | 1 + baseconfig/arm/arm64/CONFIG_DWMAC_IPQ806X | 1 + baseconfig/arm/arm64/CONFIG_DWMAC_SUN8I | 1 + baseconfig/arm/arm64/CONFIG_DWMAC_SUNXI | 1 + .../arm/arm64/CONFIG_FORCE_MAX_ZONEORDER | 1 + .../arm64/CONFIG_HISILICON_ERRATUM_161010101 | 1 + .../{ => arm/arm64}/CONFIG_MFD_SUN4I_GPADC | 0 baseconfig/arm/arm64/CONFIG_PHY_SUN4I_USB | 2 +- .../arm/arm64/CONFIG_QCOM_FALKOR_ERRATUM_1003 | 1 + .../arm/arm64/CONFIG_QCOM_FALKOR_ERRATUM_1009 | 1 + baseconfig/arm/arm64/CONFIG_QCOM_L2_PMU | 1 + .../arm64/CONFIG_QCOM_QDF2400_ERRATUM_0065 | 1 + .../arm/arm64/CONFIG_SATA_AHCI_PLATFORM | 1 - baseconfig/arm/arm64/CONFIG_SND_KIRKWOOD_SOC | 1 + baseconfig/arm/arm64/CONFIG_SND_SOC | 1 - .../arm/arm64/CONFIG_SND_SOC_APQ8016_SBC | 1 + baseconfig/arm/arm64/CONFIG_SND_SOC_QCOM | 1 + .../armv7 => arm64}/CONFIG_SND_SOC_SGTL5000 | 0 baseconfig/arm/arm64/CONFIG_SND_SOC_STORM | 1 + baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA | 1 + .../arm/arm64/CONFIG_SND_SOC_TEGRA_MAX98090 | 1 + .../arm/arm64/CONFIG_SND_SOC_TEGRA_RT5640 | 1 + .../arm/arm64/CONFIG_SND_SOC_TEGRA_RT5677 | 1 + .../arm/arm64/CONFIG_SND_SOC_TEGRA_SGTL5000 | 1 + .../CONFIG_SND_SOC_TEGRA_WM8753 | 0 baseconfig/arm/arm64/CONFIG_SND_SUN4I_I2S | 1 + baseconfig/arm/arm64/CONFIG_SND_SUN4I_SPDIF | 1 + baseconfig/arm/arm64/CONFIG_SND_SUN8I_CODEC | 1 + .../arm64}/CONFIG_SND_SUN8I_CODEC_ANALOG | 0 baseconfig/arm/arm64/CONFIG_SUN50I_A64_CCU | 1 + baseconfig/arm/arm64/CONFIG_SUN8I_EMAC | 1 - baseconfig/{ => arm/arm64}/CONFIG_TEGRA_IVC | 0 baseconfig/arm/arm64/CONFIG_VDSO | 1 + baseconfig/arm/armv7/CONFIG_ARCH_MESON | 1 - baseconfig/arm/armv7/CONFIG_CHARGER_AXP20X | 1 + .../arm/armv7/CONFIG_COMMON_CLK_MAX77686 | 1 - baseconfig/arm/armv7/CONFIG_DEBUG_RODATA | 1 - baseconfig/arm/armv7/CONFIG_DRM_MESON | 1 - baseconfig/arm/armv7/CONFIG_DRM_STI | 2 +- baseconfig/arm/armv7/CONFIG_DWMAC_SUN8I | 1 + .../{ => armv7}/CONFIG_FORCE_MAX_ZONEORDER | 0 baseconfig/arm/armv7/CONFIG_GPIO_EM | 1 - baseconfig/arm/armv7/CONFIG_IIO_CROS_EC_BARO | 1 + baseconfig/arm/armv7/CONFIG_MACH_MESON6 | 1 + baseconfig/arm/armv7/CONFIG_MACH_MESON8 | 1 + baseconfig/arm/armv7/CONFIG_MACH_MESON8B | 1 + .../arm/{ => armv7}/CONFIG_MFD_SUN4I_GPADC | 0 baseconfig/arm/armv7/CONFIG_PATA_PLATFORM | 1 - baseconfig/arm/armv7/CONFIG_PHY_EXYNOS_PCIE | 1 + baseconfig/arm/armv7/CONFIG_ROCKCHIP_CDN_DP | 1 + baseconfig/arm/armv7/CONFIG_RPMSG_CHAR | 1 + baseconfig/arm/armv7/CONFIG_SERIAL_ST_ASC | 1 + .../arm/armv7/CONFIG_SERIAL_ST_ASC_CONSOLE | 1 + .../arm/armv7/CONFIG_SND_SOC_RK3399_GRU_SOUND | 1 - baseconfig/arm/armv7/CONFIG_SND_SOC_SGTL5000 | 1 + .../arm/armv7/CONFIG_SND_SOC_TEGRA_SGTL5000 | 2 +- .../arm/armv7/CONFIG_SND_SOC_TEGRA_WM8753 | 1 + baseconfig/arm/armv7/CONFIG_SND_SUN8I_CODEC | 1 + .../{ => armv7}/CONFIG_SND_SUN8I_CODEC_ANALOG | 0 baseconfig/arm/armv7/CONFIG_SPI_PXA2XX | 1 - baseconfig/arm/armv7/CONFIG_STRICT_KERNEL_RWX | 1 + baseconfig/arm/armv7/CONFIG_STRICT_MODULE_RWX | 1 + baseconfig/arm/armv7/CONFIG_SUN5I_CCU | 1 + baseconfig/arm/armv7/CONFIG_SUN6I_A31_CCU | 1 + baseconfig/arm/armv7/CONFIG_SUN8I_A23_CCU | 1 + baseconfig/arm/armv7/CONFIG_SUN8I_A33_CCU | 1 + baseconfig/arm/armv7/CONFIG_SUN8I_EMAC | 1 - baseconfig/arm/armv7/CONFIG_SUN8I_V3S_CCU | 1 + baseconfig/arm/armv7/CONFIG_SUN9I_A80_CCU | 1 + baseconfig/arm/armv7/CONFIG_TEGRA_IVC | 1 + .../arm/armv7/CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS | 2 +- baseconfig/arm/armv7/armv7/CONFIG_AHCI_ST | 1 + baseconfig/arm/armv7/armv7/CONFIG_ARCH_STI | 1 + .../arm/armv7/armv7/CONFIG_ARM_STI_CPUFREQ | 1 + .../arm/armv7/armv7/CONFIG_ARM_TI_CPUFREQ | 1 + .../arm/armv7/armv7/CONFIG_DWMAC_IPQ806X | 1 + baseconfig/arm/armv7/armv7/CONFIG_DWMAC_STI | 1 + .../arm/armv7/armv7/CONFIG_HW_RANDOM_ST | 1 + .../armv7/armv7}/CONFIG_I2C_IMX_LPI2C | 0 baseconfig/arm/armv7/armv7/CONFIG_I2C_PXA | 1 - .../arm/armv7/armv7/CONFIG_I2C_PXA_SLAVE | 1 - baseconfig/arm/armv7/armv7/CONFIG_I2C_ST | 1 + .../armv7/armv7/CONFIG_KEYBOARD_ST_KEYSCAN | 1 + .../arm/armv7/armv7/CONFIG_MMC_SDHCI_ST | 1 + .../arm/armv7/armv7/CONFIG_OMAP_MUX_DEBUG | 1 - .../arm/armv7/armv7/CONFIG_PHY_MIPHY28LP | 1 + .../arm/armv7/armv7/CONFIG_PHY_MIPHY365X | 1 + .../arm/armv7/armv7/CONFIG_PHY_STIH407_USB | 1 + .../arm/armv7/armv7/CONFIG_PHY_STIH41X_USB | 1 + .../arm/armv7/armv7/CONFIG_POWER_RESET_ST | 1 + baseconfig/arm/armv7/armv7/CONFIG_PWM_STI | 1 + baseconfig/arm/armv7/armv7/CONFIG_RC_ST | 1 + .../arm/armv7/armv7/CONFIG_RTC_DRV_OMAP | 2 +- .../arm/armv7/armv7/CONFIG_RTC_DRV_ST_LPC | 1 + baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_STI | 1 + .../arm/armv7/armv7/CONFIG_SND_SOC_STI_SAS | 1 + .../armv7/armv7/CONFIG_SND_SOC_TEGRA_WM8753 | 1 - baseconfig/arm/armv7/armv7/CONFIG_SOC_STIH407 | 1 + baseconfig/arm/armv7/armv7/CONFIG_SOC_STIH415 | 1 + baseconfig/arm/armv7/armv7/CONFIG_SOC_STIH416 | 1 + baseconfig/arm/armv7/armv7/CONFIG_SPI_ST_SSC4 | 1 + baseconfig/arm/armv7/armv7/CONFIG_STI_MBOX | 1 + baseconfig/arm/armv7/armv7/CONFIG_ST_FDMA | 1 + .../arm/armv7/armv7/CONFIG_ST_LPC_WATCHDOG | 1 + .../arm/armv7/armv7/CONFIG_ST_REMOTEPROC | 1 + baseconfig/arm/armv7/armv7/CONFIG_ST_THERMAL | 1 + .../arm/armv7/armv7/CONFIG_ST_THERMAL_MEMMAP | 1 + .../arm/armv7/armv7/CONFIG_ST_THERMAL_SYSCFG | 1 + baseconfig/arm/armv7/armv7/CONFIG_TI_CPTS | 2 +- baseconfig/arm/armv7/armv7/CONFIG_TI_CPTS_MOD | 1 + baseconfig/arm/armv7/armv7/CONFIG_USB_DWC3_ST | 1 + .../arm/armv7/armv7/CONFIG_USB_EHCI_HCD_STI | 1 + .../arm/armv7/armv7/CONFIG_USB_OHCI_HCD_STI | 1 + .../arm/armv7/armv7/CONFIG_VIDEO_IMX_VDOA | 1 + .../armv7/CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS | 1 - .../arm/armv7/armv7/CONFIG_VIDEO_STI_BDISP | 1 + .../arm/armv7/armv7/CONFIG_VIDEO_STI_DELTA | 1 + .../armv7/armv7/CONFIG_VIDEO_STI_DELTA_DRIVER | 1 + .../armv7/armv7/CONFIG_VIDEO_STI_DELTA_MJPEG | 1 + .../arm/armv7/armv7/CONFIG_VIDEO_STI_HDMI_CEC | 1 + .../arm/armv7/armv7/CONFIG_VIDEO_STI_HVA | 1 + .../armv7/armv7/CONFIG_VIDEO_STI_HVA_DEBUGFS | 1 + baseconfig/arm/armv7/lpae/CONFIG_VDSO | 1 + baseconfig/powerpc/CONFIG_AGP | 2 +- baseconfig/powerpc/CONFIG_DEV_DAX | 1 + baseconfig/powerpc/CONFIG_DEV_DAX_PMEM | 1 + baseconfig/powerpc/CONFIG_GENWQE | 1 + .../CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY | 1 + baseconfig/powerpc/CONFIG_GPIO_SCH | 1 - baseconfig/powerpc/CONFIG_LEDS_TRIGGER_GPIO | 1 - baseconfig/powerpc/CONFIG_NR_DEV_DAX | 1 + .../powerpc/CONFIG_TRANSPARENT_HUGEPAGE | 2 +- .../CONFIG_TRANSPARENT_HUGEPAGE_MADVISE | 1 + baseconfig/powerpc/powerpc64/CONFIG_AGP | 1 + baseconfig/s390x/CONFIG_ALIM7101_WDT | 1 + baseconfig/s390x/CONFIG_ALTERA_STAPL | 1 + baseconfig/s390x/CONFIG_ALTERA_TSE | 1 + baseconfig/s390x/CONFIG_APDS9802ALS | 1 + baseconfig/s390x/CONFIG_BE2ISCSI | 1 + baseconfig/s390x/CONFIG_BLK_CPQ_CISS_DA | 1 + baseconfig/s390x/CONFIG_BLK_DEV_3W_XXXX_RAID | 1 + baseconfig/s390x/CONFIG_BLK_DEV_DAC960 | 1 + baseconfig/s390x/CONFIG_BLK_DEV_SKD | 1 + baseconfig/s390x/CONFIG_BLK_DEV_SX8 | 1 + baseconfig/s390x/CONFIG_BLK_DEV_UMEM | 1 + baseconfig/s390x/CONFIG_CAN | 1 + baseconfig/s390x/CONFIG_CHARGER_SMB347 | 1 + baseconfig/s390x/CONFIG_DMADEVICES | 1 + baseconfig/s390x/CONFIG_DNET | 1 + baseconfig/s390x/CONFIG_DP83640_PHY | 1 + baseconfig/s390x/CONFIG_ECHO | 1 + baseconfig/s390x/CONFIG_ENCLOSURE_SERVICES | 1 + baseconfig/s390x/CONFIG_ETHOC | 1 + baseconfig/s390x/CONFIG_FDDI | 1 + baseconfig/s390x/CONFIG_FEALNX | 1 + baseconfig/s390x/CONFIG_GENWQE | 1 + .../CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY | 1 + baseconfig/s390x/CONFIG_GPIOLIB | 1 + baseconfig/s390x/CONFIG_HID | 2 +- baseconfig/s390x/CONFIG_HIPPI | 1 + baseconfig/s390x/CONFIG_HWMON | 2 +- baseconfig/s390x/CONFIG_I2C_ALGOBIT | 1 + baseconfig/s390x/CONFIG_I2C_ALGOPCA | 1 + baseconfig/s390x/CONFIG_I2C_ALGOPCF | 1 + baseconfig/s390x/CONFIG_I2C_CHARDEV | 1 + baseconfig/s390x/CONFIG_I2C_COMPAT | 1 + baseconfig/s390x/CONFIG_I2C_DESIGNWARE_PCI | 1 + baseconfig/s390x/CONFIG_I2C_HID | 1 + baseconfig/s390x/CONFIG_I2C_PCA_PLATFORM | 1 + baseconfig/s390x/CONFIG_I2C_SIMTEC | 1 + baseconfig/s390x/CONFIG_I2C_SLAVE | 1 + baseconfig/s390x/CONFIG_I6300ESB_WDT | 1 + baseconfig/s390x/CONFIG_IIO | 1 + baseconfig/s390x/CONFIG_INFINIBAND_CXGB3 | 1 + baseconfig/s390x/CONFIG_INFINIBAND_CXGB4 | 1 + baseconfig/s390x/CONFIG_INFINIBAND_MTHCA | 1 + baseconfig/s390x/CONFIG_INFINIBAND_NES | 1 + baseconfig/s390x/CONFIG_INFINIBAND_OCRDMA | 1 + baseconfig/s390x/CONFIG_INFINIBAND_QIB | 1 + baseconfig/s390x/CONFIG_INPUT_FF_MEMLESS | 1 + baseconfig/s390x/CONFIG_INPUT_MOUSEDEV | 1 + baseconfig/s390x/CONFIG_INPUT_POLLDEV | 1 + baseconfig/s390x/CONFIG_INPUT_SPARSEKMAP | 1 + baseconfig/s390x/CONFIG_IP1000 | 1 + baseconfig/s390x/CONFIG_ISL29003 | 1 + baseconfig/s390x/CONFIG_ISL29020 | 1 + baseconfig/s390x/CONFIG_JME | 1 + baseconfig/s390x/CONFIG_MEGARAID_LEGACY | 1 + baseconfig/s390x/CONFIG_MEGARAID_NEWGEN | 1 + baseconfig/s390x/CONFIG_MEGARAID_SAS | 1 + baseconfig/s390x/CONFIG_MFD_CORE | 2 +- baseconfig/s390x/CONFIG_MLXSW_CORE | 1 + baseconfig/s390x/CONFIG_NET_CADENCE | 1 + baseconfig/s390x/CONFIG_NET_PACKET_ENGINE | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_3COM | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_8390 | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_ADAPTEC | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_AGERE | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_ALTEON | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_AMAZON | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_AMD | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_ATHEROS | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_BROADCOM | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_BROCADE | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_CHELSIO | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_CISCO | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_DEC | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_DLINK | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_EMULEX | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_EXAR | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_HP | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_MICREL | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_MYRI | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_NETRONOME | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_NVIDIA | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_OKI | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_QLOGIC | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_RDC | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_REALTEK | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_ROCKER | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_SEEQ | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_SILAN | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_SIS | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_SMSC | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_STMICRO | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_SUN | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_TEHUTI | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_TI | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_WIZNET | 1 + baseconfig/s390x/CONFIG_NET_VENDOR_XIRCOM | 1 + baseconfig/s390x/CONFIG_NEW_LEDS | 1 + baseconfig/s390x/CONFIG_NFC | 1 + baseconfig/s390x/CONFIG_NOZOMI | 1 + baseconfig/s390x/CONFIG_N_GSM | 1 + baseconfig/s390x/CONFIG_PCIPCWATCHDOG | 1 + baseconfig/s390x/CONFIG_PM_DEVFREQ | 1 + baseconfig/s390x/CONFIG_POWER_RESET | 1 + baseconfig/s390x/CONFIG_PWM | 1 + baseconfig/s390x/CONFIG_R3964 | 1 + baseconfig/s390x/CONFIG_RESET_CONTROLLER | 1 + baseconfig/s390x/CONFIG_RFKILL | 1 + baseconfig/s390x/CONFIG_RMI4_CORE | 1 + baseconfig/s390x/CONFIG_RMI4_F03 | 1 - baseconfig/s390x/CONFIG_SCSI_3W_9XXX | 1 + baseconfig/s390x/CONFIG_SCSI_3W_SAS | 1 + baseconfig/s390x/CONFIG_SCSI_AACRAID | 1 + baseconfig/s390x/CONFIG_SCSI_ACARD | 1 + baseconfig/s390x/CONFIG_SCSI_AIC79XX | 1 + baseconfig/s390x/CONFIG_SCSI_AIC7XXX | 1 + baseconfig/s390x/CONFIG_SCSI_AM53C974 | 1 + baseconfig/s390x/CONFIG_SCSI_ARCMSR | 1 + baseconfig/s390x/CONFIG_SCSI_BFA_FC | 1 + baseconfig/s390x/CONFIG_SCSI_BNX2X_FCOE | 1 + baseconfig/s390x/CONFIG_SCSI_BNX2_ISCSI | 1 + baseconfig/s390x/CONFIG_SCSI_CHELSIO_FCOE | 1 + baseconfig/s390x/CONFIG_SCSI_CXGB3_ISCSI | 1 + baseconfig/s390x/CONFIG_SCSI_CXGB4_ISCSI | 1 + baseconfig/s390x/CONFIG_SCSI_DC395x | 1 + baseconfig/s390x/CONFIG_SCSI_DH | 1 + baseconfig/s390x/CONFIG_SCSI_DMX3191D | 1 + baseconfig/s390x/CONFIG_SCSI_ESAS2R | 1 + baseconfig/s390x/CONFIG_SCSI_HPSA | 1 + baseconfig/s390x/CONFIG_SCSI_HPTIOP | 1 + baseconfig/s390x/CONFIG_SCSI_INIA100 | 1 + baseconfig/s390x/CONFIG_SCSI_INITIO | 1 + baseconfig/s390x/CONFIG_SCSI_IPS | 1 + baseconfig/s390x/CONFIG_SCSI_LPFC | 1 + baseconfig/s390x/CONFIG_SCSI_MPT2SAS | 1 + baseconfig/s390x/CONFIG_SCSI_MPT3SAS | 1 + baseconfig/s390x/CONFIG_SCSI_MVSAS | 1 + baseconfig/s390x/CONFIG_SCSI_MVUMI | 1 + baseconfig/s390x/CONFIG_SCSI_PM8001 | 1 + baseconfig/s390x/CONFIG_SCSI_PMCRAID | 1 + baseconfig/s390x/CONFIG_SCSI_QLA_FC | 1 + baseconfig/s390x/CONFIG_SCSI_QLA_ISCSI | 1 + baseconfig/s390x/CONFIG_SCSI_QLOGIC_1280 | 1 + baseconfig/s390x/CONFIG_SCSI_SNIC | 1 + baseconfig/s390x/CONFIG_SCSI_STEX | 1 + baseconfig/s390x/CONFIG_SCSI_SYM53C8XX_2 | 1 + baseconfig/s390x/CONFIG_SCSI_UFSHCD | 1 + baseconfig/s390x/CONFIG_SCSI_WD719X | 1 + baseconfig/s390x/CONFIG_SENSORS_APDS990X | 1 + baseconfig/s390x/CONFIG_SENSORS_BH1770 | 1 + baseconfig/s390x/CONFIG_SENSORS_LIS3LV02D | 1 + baseconfig/s390x/CONFIG_SENSORS_LIS3_I2C | 1 + baseconfig/s390x/CONFIG_SENSORS_TSL2550 | 1 + baseconfig/s390x/CONFIG_SERIAL_NONSTANDARD | 1 + baseconfig/s390x/CONFIG_SERIO_LIBPS2 | 1 + baseconfig/s390x/CONFIG_SERIO_SERPORT | 1 + baseconfig/s390x/CONFIG_SFC | 1 + baseconfig/s390x/CONFIG_UIO | 1 + baseconfig/s390x/CONFIG_WDTPCI | 1 + baseconfig/s390x/CONFIG_XILLYBUS | 1 + .../{ => x86}/CONFIG_CRYPTO_CRC32C_INTEL | 0 baseconfig/{ => x86}/CONFIG_DRM_I810 | 0 baseconfig/{ => x86}/CONFIG_DRM_I915 | 0 .../{ => x86}/CONFIG_DRM_I915_ALPHA_SUPPORT | 0 .../{ => x86}/CONFIG_DRM_I915_CAPTURE_ERROR | 0 .../{ => x86}/CONFIG_DRM_I915_COMPRESS_ERROR | 0 baseconfig/{ => x86}/CONFIG_DRM_I915_GVT | 0 .../{ => x86}/CONFIG_DRM_I915_GVT_KVMGT | 0 baseconfig/{ => x86}/CONFIG_DRM_I915_USERPTR | 0 baseconfig/{ => x86}/CONFIG_DRM_VMWGFX | 0 baseconfig/{ => x86}/CONFIG_DRM_VMWGFX_FBCON | 0 baseconfig/x86/CONFIG_ENA_ETHERNET | 1 + baseconfig/{ => x86}/CONFIG_FB_ARC | 0 baseconfig/{ => x86}/CONFIG_FB_GEODE | 0 baseconfig/{ => x86}/CONFIG_FB_HGA | 0 baseconfig/{ => x86}/CONFIG_FB_I810 | 0 baseconfig/{ => x86}/CONFIG_FB_I810_GTF | 0 baseconfig/{ => x86}/CONFIG_FB_I810_I2C | 0 baseconfig/{ => x86}/CONFIG_FB_LE80578 | 0 baseconfig/{ => x86}/CONFIG_FB_VGA16 | 0 baseconfig/{ => x86}/CONFIG_FB_VIA | 0 .../{ => x86}/CONFIG_FB_VIA_DIRECT_PROCFS | 0 baseconfig/{ => x86}/CONFIG_GPIO_AMD8111 | 0 baseconfig/{ => x86}/CONFIG_GPIO_CS5535 | 0 baseconfig/{ => x86}/CONFIG_GPIO_ML_IOH | 0 baseconfig/{ => x86}/CONFIG_GPIO_SCH | 0 baseconfig/{ => x86}/CONFIG_GPIO_VX855 | 0 baseconfig/x86/CONFIG_HDMI_LPE_AUDIO | 1 + baseconfig/{ => x86}/CONFIG_I2C_PXA | 0 baseconfig/{ => x86}/CONFIG_I2C_PXA_SLAVE | 0 baseconfig/{ => x86}/CONFIG_IB700_WDT | 0 baseconfig/{ => x86}/CONFIG_IBMASR | 0 baseconfig/{ => x86}/CONFIG_INTEL_MENLOW | 0 baseconfig/{ => x86}/CONFIG_LEDS_INTEL_SS4200 | 0 baseconfig/x86/CONFIG_MFD_AXP20X | 1 - baseconfig/x86/CONFIG_NIC7018_WDT | 1 + baseconfig/x86/CONFIG_PINCTRL_GEMINILAKE | 1 + baseconfig/x86/CONFIG_PTP_1588_CLOCK_KVM | 1 + baseconfig/x86/CONFIG_SERIAL_8250_LPSS | 1 + baseconfig/x86/CONFIG_SILEAD_DMI | 1 + baseconfig/x86/CONFIG_SND_SOC_ES8328 | 1 + baseconfig/x86/CONFIG_SND_SOC_ES8328_I2C | 1 + baseconfig/x86/CONFIG_SND_SOC_ES8328_SPI | 1 + baseconfig/x86/CONFIG_SND_SOC_NAU8540 | 1 + baseconfig/x86/CONFIG_SND_SOC_TAS571X | 1 - .../x86/{i686 => }/CONFIG_SND_SOC_TS3A227E | 0 baseconfig/x86/CONFIG_SND_X86 | 1 + baseconfig/{ => x86}/CONFIG_VMWARE_BALLOON | 0 baseconfig/{ => x86}/CONFIG_VMWARE_PVSCSI | 0 baseconfig/x86/{x86_64 => }/CONFIG_XEN_PVH | 0 baseconfig/x86/i686/CONFIG_I2C_PXA | 1 - baseconfig/x86/i686/CONFIG_LEDS_INTEL_SS4200 | 1 - baseconfig/x86/i686PAE/CONFIG_I2C_PXA | 1 - .../x86/i686PAE/CONFIG_LEDS_INTEL_SS4200 | 1 - .../x86/i686PAE/CONFIG_SND_SOC_TS3A227E | 1 - baseconfig/x86/x86_64/CONFIG_EDAC_PND2 | 1 + .../x86/x86_64/CONFIG_INTEL_TURBO_MAX_3 | 1 + baseconfig/x86/x86_64/CONFIG_SND_SOC_TS3A227E | 1 - bcm283x-VEC.patch | 58 - bcm283x-hdmi-audio.patch | 836 ++++ bcm283x-mmc-bcm2835.patch | 1932 ++++++++ bcm283x-mmc-imp-speed.patch | 107 - debugconfig/CONFIG_DEBUG_REFCOUNT | 1 + efi-Add-EFI_SECURE_BOOT-bit.patch | 43 - ...-image-security-database-GUID-defini.patch | 31 - ...ure-boot-if-shim-is-in-insecure-mode.patch | 58 - ...ECURE_BOOT_SIG_ENFORCE-depend-on-EFI.patch | 30 - efi-lockdown.patch | 1156 +---- ...dd-Lenovo-ideapad-Y700-17ISK-to-no_h.patch | 40 - ...arn-when-primary-address-is-missing-.patch | 40 - kernel-aarch64-debug.config | 254 +- kernel-aarch64.config | 254 +- kernel-armv7hl-debug.config | 257 +- kernel-armv7hl-lpae-debug.config | 217 +- kernel-armv7hl-lpae.config | 218 +- kernel-armv7hl.config | 258 +- kernel-i686-PAE.config | 141 +- kernel-i686-PAEdebug.config | 140 +- kernel-i686-debug.config | 140 +- kernel-i686.config | 141 +- kernel-ppc64-debug.config | 172 +- kernel-ppc64.config | 173 +- kernel-ppc64le-debug.config | 174 +- kernel-ppc64le.config | 175 +- kernel-ppc64p7-debug.config | 174 +- kernel-ppc64p7.config | 175 +- kernel-s390x-debug.config | 465 +- kernel-s390x.config | 466 +- kernel-x86_64-debug.config | 141 +- kernel-x86_64.config | 142 +- kernel.spec | 91 +- kvm-fix-page-struct-leak-in-handle_vmon.patch | 49 - ...omplete-state-update-on-APICv-on-off.patch | 112 - ...e-BUG-when-CONFIG_RC_CORE-CEC_CAP_RC.patch | 45 + powerpc-prom-Increase-RMA-size-to-512MB.patch | 52 + ...f-operation-on-asocs-with-threads-sl.patch | 66 - ...ux-allow-context-mounts-on-tmpfs-etc.patch | 57 - sources | 6 +- ti-bluetooth.patch | 2480 ++++++++++ ...infoleak-in-tipc_nl_compat_link_dump.patch | 32 - ...move-the-atomicity-from-ucount-count.patch | 89 - 616 files changed, 12699 insertions(+), 10670 deletions(-) delete mode 100644 0001-HID-multitouch-enable-the-Surface-3-Type-Cover-to-re.patch delete mode 100644 0001-Work-around-for-gcc7-and-arm64.patch delete mode 100644 0001-drm-mgag200-Black-screen-fix-for-G200e-rev-4.patch delete mode 100644 0001-i2c-bcm2835-Debug-test-for-curr_msg.patch delete mode 100644 0002-HID-multitouch-enable-the-Surface-4-Type-Cover-Pro-J.patch delete mode 100644 0002-drm-nouveau-fbcon-fix-out-of-bounds-memory-accesses.patch delete mode 100644 0003-HID-multitouch-enable-Surface-4-Type-Cover-Pro-non-J.patch delete mode 100644 0003-drm-nouveau-disp-sor-gf119-both-links-use-the-same-t.patch delete mode 100644 0004-drm-nouveau-disp-sor-gm107-training-pattern-register.patch delete mode 100644 0005-i915-fbc-Disable-on-HSW-by-default-for-now.patch delete mode 100644 ALSA-timer-Fix-leak-in-SNDRV_TIMER_IOCTL_PARAMS.patch delete mode 100644 ALSA-timer-Fix-leak-in-events-via-snd_timer_user_cca.patch delete mode 100644 ALSA-timer-Fix-leak-in-events-via-snd_timer_user_tin.patch delete mode 100644 Add-option-to-automatically-enforce-module-signature.patch create mode 100644 AllWinner-h3.patch delete mode 100644 Armada-trace-build-fix.patch create mode 100644 CVE-2017-7477.patch create mode 100644 CVE-2017-7645.patch delete mode 100644 Fix-tegra-to-use-stdout-path-for-serial-console.patch delete mode 100644 Initial-AllWinner-A64-and-PINE64-support.patch delete mode 100644 KEYS-potential-uninitialized-variable.patch delete mode 100644 USB-usbfs-fix-potential-infoleak-in-devio.patch create mode 100644 arm-rk3288-tinker.patch create mode 100644 arm64-Add-option-of-13-for-FORCE_MAX_ZONEORDER.patch delete mode 100644 arm64-acpi-drop-expert-patch.patch delete mode 100644 arm64-avoid-needing-console-to-enable-serial-console.patch create mode 100644 arm64-hikey-fixes.patch delete mode 100644 arm64-pcie-acpi.patch delete mode 100644 arm64-pcie-quirks-xgene.patch delete mode 100644 baseconfig/CONFIG_ARCH_TEGRA_186_SOC delete mode 100644 baseconfig/CONFIG_ARM64_PTDUMP delete mode 100644 baseconfig/CONFIG_ARM_SCPI_PROTOCOL delete mode 100644 baseconfig/CONFIG_BATTERY_GOLDFISH create mode 100644 baseconfig/CONFIG_BLK_DEBUG_FS create mode 100644 baseconfig/CONFIG_BLK_SED_OPAL create mode 100644 baseconfig/CONFIG_BT_HCIUART_NOKIA create mode 100644 baseconfig/CONFIG_CFG80211_CRDA_SUPPORT create mode 100644 baseconfig/CONFIG_CGROUP_RDMA create mode 100644 baseconfig/CONFIG_CHARGER_DETECTOR_MAX14656 create mode 100644 baseconfig/CONFIG_CHARGER_SBS create mode 100644 baseconfig/CONFIG_CM3605 delete mode 100644 baseconfig/CONFIG_COMMON_CLK_HI3519 delete mode 100644 baseconfig/CONFIG_COMMON_CLK_MT2701 delete mode 100644 baseconfig/CONFIG_COMMON_CLK_MT2701_BDPSYS delete mode 100644 baseconfig/CONFIG_COMMON_CLK_MT2701_ETHSYS delete mode 100644 baseconfig/CONFIG_COMMON_CLK_MT2701_HIFSYS delete mode 100644 baseconfig/CONFIG_COMMON_CLK_MT2701_IMGSYS delete mode 100644 baseconfig/CONFIG_COMMON_CLK_MT2701_MMSYS delete mode 100644 baseconfig/CONFIG_COMMON_CLK_MT2701_VDECSYS delete mode 100644 baseconfig/CONFIG_COMMON_CLK_MT8135 delete mode 100644 baseconfig/CONFIG_COMMON_CLK_MT8173 delete mode 100644 baseconfig/CONFIG_COMMON_CLK_OXNAS create mode 100644 baseconfig/CONFIG_COMMON_CLK_VC5 create mode 100644 baseconfig/CONFIG_COMMON_RESET_HI3660 create mode 100644 baseconfig/CONFIG_CRYPTO_AES_TI delete mode 100644 baseconfig/CONFIG_CRYPTO_CRC32_ARM_CE delete mode 100644 baseconfig/CONFIG_CRYPTO_CRCT10DIF_ARM_CE create mode 100644 baseconfig/CONFIG_DEBUG_REFCOUNT create mode 100644 baseconfig/CONFIG_DEBUG_VM_RB revisit this if performance isn't horrible create mode 100644 baseconfig/CONFIG_DEVPORT rename baseconfig/{CONFIG_DPM_WATCHDOG => CONFIG_DPM_WATCHDOG revisit this in debug} (100%) create mode 100644 baseconfig/CONFIG_DRM_DEBUG_MM_SELFTEST delete mode 100644 baseconfig/CONFIG_DRM_MALI_DISPLAY create mode 100644 baseconfig/CONFIG_DRM_TINYDRM create mode 100644 baseconfig/CONFIG_DVB_USB_ZD1301 create mode 100644 baseconfig/CONFIG_EEPROM_IDT_89HPESX delete mode 100644 baseconfig/CONFIG_EMAC_ROCKCHIP create mode 100644 baseconfig/CONFIG_EXTCON_INTEL_INT3496 delete mode 100644 baseconfig/CONFIG_FB_GOLDFISH create mode 100644 baseconfig/CONFIG_FSI create mode 100644 baseconfig/CONFIG_GPIO_EXAR create mode 100644 baseconfig/CONFIG_GPIO_PCI_IDIO_16 delete mode 100644 baseconfig/CONFIG_GPIO_ZX create mode 100644 baseconfig/CONFIG_HX711 create mode 100644 baseconfig/CONFIG_IIO_ST_LSM6DSX create mode 100644 baseconfig/CONFIG_INET6_ESP_OFFLOAD create mode 100644 baseconfig/CONFIG_INET_ESP_OFFLOAD create mode 100644 baseconfig/CONFIG_INFINIBAND_BNXT_RE delete mode 100644 baseconfig/CONFIG_INTEL_RDT_A create mode 100644 baseconfig/CONFIG_IPVTAP create mode 100644 baseconfig/CONFIG_IR_SPI create mode 100644 baseconfig/CONFIG_KEYBOARD_TM2_TOUCHKEY delete mode 100644 baseconfig/CONFIG_KPROBE_EVENT create mode 100644 baseconfig/CONFIG_KPROBE_EVENTS create mode 100644 baseconfig/CONFIG_LEDS_BRIGHTNESS_HW_CHANGED create mode 100644 baseconfig/CONFIG_LPFC_NVME_INITIATOR create mode 100644 baseconfig/CONFIG_LPFC_NVME_TARGET create mode 100644 baseconfig/CONFIG_MAGIC_SYSRQ_SERIAL create mode 100644 baseconfig/CONFIG_MAX11100 create mode 100644 baseconfig/CONFIG_MAX5481 delete mode 100644 baseconfig/CONFIG_MESON_GXL_PHY create mode 100644 baseconfig/CONFIG_MFD_CPCAP delete mode 100644 baseconfig/CONFIG_MOUSE_PS2_VMMOUSE create mode 100644 baseconfig/CONFIG_MQ_IOSCHED_DEADLINE create mode 100644 baseconfig/CONFIG_NET_ACT_SAMPLE create mode 100644 baseconfig/CONFIG_NET_IFE create mode 100644 baseconfig/CONFIG_NET_VENDOR_AQUANTIA create mode 100644 baseconfig/CONFIG_NFP create mode 100644 baseconfig/CONFIG_NFP_DEBUG create mode 100644 baseconfig/CONFIG_NFT_SET_BITMAP create mode 100644 baseconfig/CONFIG_PARMAN create mode 100644 baseconfig/CONFIG_PC104 create mode 100644 baseconfig/CONFIG_PHY_QCOM_USB_HS create mode 100644 baseconfig/CONFIG_PHY_QCOM_USB_HSIC create mode 100644 baseconfig/CONFIG_PINCTRL_TI_IODELAY create mode 100644 baseconfig/CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT create mode 100644 baseconfig/CONFIG_PSAMPLE create mode 100644 baseconfig/CONFIG_PWRSEQ_SD8787 delete mode 100644 baseconfig/CONFIG_QCOM_EBI2 create mode 100644 baseconfig/CONFIG_QEDF delete mode 100644 baseconfig/CONFIG_RADIO_WL128X create mode 100644 baseconfig/CONFIG_REGULATOR_CPCAP create mode 100644 baseconfig/CONFIG_SENSORS_STTS751 create mode 100644 baseconfig/CONFIG_SERIAL_8250_EXAR create mode 100644 baseconfig/CONFIG_SERIAL_8250_PCI create mode 100644 baseconfig/CONFIG_SERIAL_DEV_BUS create mode 100644 baseconfig/CONFIG_SERIAL_DEV_CTRL_TTYPORT create mode 100644 baseconfig/CONFIG_SMC create mode 100644 baseconfig/CONFIG_SND_SOC_NAU8540 rename baseconfig/{arm/armv7 => }/CONFIG_SND_SOC_TAS571X (100%) create mode 100644 baseconfig/CONFIG_SOC_ZTE create mode 100644 baseconfig/CONFIG_SRF08 create mode 100644 baseconfig/CONFIG_STATIC_USERMODEHELPER delete mode 100644 baseconfig/CONFIG_TEGRA_GMI create mode 100644 baseconfig/CONFIG_TEST_PARMAN create mode 100644 baseconfig/CONFIG_TEST_SORT create mode 100644 baseconfig/CONFIG_TI_ADS7950 create mode 100644 baseconfig/CONFIG_TI_TLC4541 create mode 100644 baseconfig/CONFIG_TMP007 create mode 100644 baseconfig/CONFIG_TOUCHSCREEN_ZET6223 delete mode 100644 baseconfig/CONFIG_UPROBE_EVENT create mode 100644 baseconfig/CONFIG_UPROBE_EVENTS create mode 100644 baseconfig/CONFIG_USB_CHIPIDEA_ULPI create mode 100644 baseconfig/CONFIG_USB_HUB_USB251XB create mode 100644 baseconfig/CONFIG_USB_SERIAL_UPD78F0730 create mode 100644 baseconfig/CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT create mode 100644 baseconfig/CONFIG_VIDEO_IVTV_DEPRECATED_IOCTLS delete mode 100644 baseconfig/CONFIG_VIDEO_SAMSUNG_S5P_CEC create mode 100644 baseconfig/CONFIG_VIRTIO_BLK_SCSI create mode 100644 baseconfig/CONFIG_W1_SLAVE_DS2405 create mode 100644 baseconfig/CONFIG_WW_MUTEX_SELFTEST delete mode 100644 baseconfig/arm/CONFIG_AGP rename baseconfig/arm/{arm64 => }/CONFIG_COMMON_CLK_MAX77686 (100%) create mode 100644 baseconfig/arm/CONFIG_CRYPTO_CHACHA20_NEON create mode 100644 baseconfig/arm/CONFIG_DMA_SUN6I rename baseconfig/arm/{arm64 => }/CONFIG_DRM_MESON (100%) create mode 100644 baseconfig/arm/CONFIG_DRM_NXP_PTN3460 create mode 100644 baseconfig/arm/CONFIG_DRM_PARADE_PS8622 create mode 100644 baseconfig/arm/CONFIG_DRM_TINYDRM delete mode 100644 baseconfig/arm/CONFIG_DRM_VMWGFX create mode 100644 baseconfig/arm/CONFIG_DWMAC_DWC_QOS_ETH rename baseconfig/arm/{armv7 => }/CONFIG_DWMAC_GENERIC (100%) delete mode 100644 baseconfig/arm/CONFIG_DWMAC_IPQ806X delete mode 100644 baseconfig/arm/CONFIG_HAMRADIO create mode 100644 baseconfig/arm/CONFIG_I2C_TEGRA_BPMP rename baseconfig/arm/{armv7 => }/CONFIG_IOMMU_IO_PGTABLE_LPAE (100%) rename baseconfig/arm/{armv7 => }/CONFIG_LEDS_GPIO (100%) rename baseconfig/arm/{armv7 => }/CONFIG_LEDS_GPIO_REGISTER (100%) rename baseconfig/arm/{armv7 => }/CONFIG_LEDS_PWM (100%) rename baseconfig/arm/{armv7 => }/CONFIG_LEDS_SYSCON (100%) rename baseconfig/arm/{armv7 => }/CONFIG_LEDS_TRIGGER_CPU (100%) create mode 100644 baseconfig/arm/CONFIG_MESON_SARADC rename baseconfig/arm/{armv7 => }/CONFIG_MFD_MAX77686 (100%) create mode 100644 baseconfig/arm/CONFIG_MMC_BCM2835 create mode 100644 baseconfig/arm/CONFIG_MTD_PHYSMAP_OF_GEMINI rename baseconfig/arm/{armv7 => }/CONFIG_MVPP2 (100%) create mode 100644 baseconfig/arm/CONFIG_PHY_QCOM_USB_HS create mode 100644 baseconfig/arm/CONFIG_PHY_QCOM_USB_HSIC create mode 100644 baseconfig/arm/CONFIG_PINCTRL_GEMINILAKE create mode 100644 baseconfig/arm/CONFIG_QCOM_IRQ_COMBINER create mode 100644 baseconfig/arm/CONFIG_QORIQ_CPUFREQ rename baseconfig/arm/{armv7 => }/CONFIG_REGULATOR_MAX77686 (100%) rename baseconfig/arm/{armv7 => }/CONFIG_REGULATOR_MAX77802 (100%) delete mode 100644 baseconfig/arm/CONFIG_RFKILL_REGULATOR create mode 100644 baseconfig/arm/CONFIG_SERIAL_NONSTANDARD rename baseconfig/arm/{armv7 => }/CONFIG_SND_SOC_AC97_CODEC (100%) rename baseconfig/arm/{armv7/armv7 => }/CONFIG_SND_SOC_ES8328 (100%) rename baseconfig/arm/{armv7/armv7 => }/CONFIG_SND_SOC_ES8328_I2C (100%) rename baseconfig/arm/{armv7/armv7 => }/CONFIG_SND_SOC_ES8328_SPI (100%) create mode 100644 baseconfig/arm/CONFIG_SND_SOC_RK3288_HDMI_ANALOG create mode 100644 baseconfig/arm/CONFIG_SND_SOC_RK3399_GRU_SOUND rename baseconfig/arm/{armv7/lpae => }/CONFIG_SND_SOC_TEGRA_ALC5632 (100%) rename baseconfig/arm/{armv7/lpae => }/CONFIG_SND_SOC_TEGRA_TRIMSLICE (100%) rename baseconfig/arm/{armv7/lpae => }/CONFIG_SND_SOC_TEGRA_WM8903 (100%) rename baseconfig/arm/{armv7/lpae => }/CONFIG_SND_SOC_TEGRA_WM9712 (100%) rename baseconfig/arm/{armv7 => }/CONFIG_SND_SOC_TS3A227E (100%) rename baseconfig/arm/{armv7 => }/CONFIG_STMMAC_PLATFORM (100%) rename baseconfig/{ => arm}/CONFIG_SUN50I_A64_CCU (100%) create mode 100644 baseconfig/arm/CONFIG_SUN5I_CCU rename baseconfig/{ => arm}/CONFIG_SUN6I_A31_CCU (100%) rename baseconfig/{ => arm}/CONFIG_SUN8I_A23_CCU (100%) rename baseconfig/{ => arm}/CONFIG_SUN8I_A33_CCU (100%) create mode 100644 baseconfig/arm/CONFIG_SUN8I_H3_CCU create mode 100644 baseconfig/arm/CONFIG_SUN8I_V3S_CCU create mode 100644 baseconfig/arm/CONFIG_SUN9I_A80_CCU rename baseconfig/{ => arm}/CONFIG_SUNXI_CCU (100%) create mode 100644 baseconfig/arm/CONFIG_SYSCON_REBOOT_MODE create mode 100644 baseconfig/arm/CONFIG_TINYDRM_MI0283QT create mode 100644 baseconfig/arm/CONFIG_TINYDRM_MIPI_DBI delete mode 100644 baseconfig/arm/arm64/CONFIG_ARCH_MESON create mode 100644 baseconfig/arm/arm64/CONFIG_ARCH_THUNDER2 create mode 100644 baseconfig/arm/arm64/CONFIG_ARM64_4K_PAGES delete mode 100644 baseconfig/arm/arm64/CONFIG_ARM64_64K_PAGES create mode 100644 baseconfig/arm/arm64/CONFIG_ARMADA_AP806_SYSCON create mode 100644 baseconfig/arm/arm64/CONFIG_CAVIUM_CPT create mode 100644 baseconfig/arm/arm64/CONFIG_CHARGER_AXP20X rename baseconfig/{ => arm/arm64}/CONFIG_COMMON_CLK_HI3516CV300 (100%) create mode 100644 baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI3519 create mode 100644 baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI3660 rename baseconfig/{ => arm/arm64}/CONFIG_COMMON_CLK_HI3798CV200 (100%) create mode 100644 baseconfig/arm/arm64/CONFIG_COMMON_CLK_PWM create mode 100644 baseconfig/arm/arm64/CONFIG_COMPAT create mode 100644 baseconfig/arm/arm64/CONFIG_CRYPTO_AES_ARM64 create mode 100644 baseconfig/arm/arm64/CONFIG_CRYPTO_AES_ARM64_BS create mode 100644 baseconfig/arm/arm64/CONFIG_DEBUG_EFI create mode 100644 baseconfig/arm/arm64/CONFIG_DWMAC_IPQ806X create mode 100644 baseconfig/arm/arm64/CONFIG_DWMAC_SUN8I create mode 100644 baseconfig/arm/arm64/CONFIG_DWMAC_SUNXI create mode 100644 baseconfig/arm/arm64/CONFIG_FORCE_MAX_ZONEORDER create mode 100644 baseconfig/arm/arm64/CONFIG_HISILICON_ERRATUM_161010101 rename baseconfig/{ => arm/arm64}/CONFIG_MFD_SUN4I_GPADC (100%) create mode 100644 baseconfig/arm/arm64/CONFIG_QCOM_FALKOR_ERRATUM_1003 create mode 100644 baseconfig/arm/arm64/CONFIG_QCOM_FALKOR_ERRATUM_1009 create mode 100644 baseconfig/arm/arm64/CONFIG_QCOM_L2_PMU create mode 100644 baseconfig/arm/arm64/CONFIG_QCOM_QDF2400_ERRATUM_0065 delete mode 100644 baseconfig/arm/arm64/CONFIG_SATA_AHCI_PLATFORM create mode 100644 baseconfig/arm/arm64/CONFIG_SND_KIRKWOOD_SOC delete mode 100644 baseconfig/arm/arm64/CONFIG_SND_SOC create mode 100644 baseconfig/arm/arm64/CONFIG_SND_SOC_APQ8016_SBC create mode 100644 baseconfig/arm/arm64/CONFIG_SND_SOC_QCOM rename baseconfig/arm/{armv7/armv7 => arm64}/CONFIG_SND_SOC_SGTL5000 (100%) create mode 100644 baseconfig/arm/arm64/CONFIG_SND_SOC_STORM create mode 100644 baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA create mode 100644 baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA_MAX98090 create mode 100644 baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA_RT5640 create mode 100644 baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA_RT5677 create mode 100644 baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA_SGTL5000 rename baseconfig/arm/{armv7/lpae => arm64}/CONFIG_SND_SOC_TEGRA_WM8753 (100%) create mode 100644 baseconfig/arm/arm64/CONFIG_SND_SUN4I_I2S create mode 100644 baseconfig/arm/arm64/CONFIG_SND_SUN4I_SPDIF create mode 100644 baseconfig/arm/arm64/CONFIG_SND_SUN8I_CODEC rename baseconfig/{ => arm/arm64}/CONFIG_SND_SUN8I_CODEC_ANALOG (100%) create mode 100644 baseconfig/arm/arm64/CONFIG_SUN50I_A64_CCU delete mode 100644 baseconfig/arm/arm64/CONFIG_SUN8I_EMAC rename baseconfig/{ => arm/arm64}/CONFIG_TEGRA_IVC (100%) create mode 100644 baseconfig/arm/arm64/CONFIG_VDSO delete mode 100644 baseconfig/arm/armv7/CONFIG_ARCH_MESON create mode 100644 baseconfig/arm/armv7/CONFIG_CHARGER_AXP20X delete mode 100644 baseconfig/arm/armv7/CONFIG_COMMON_CLK_MAX77686 delete mode 100644 baseconfig/arm/armv7/CONFIG_DEBUG_RODATA delete mode 100644 baseconfig/arm/armv7/CONFIG_DRM_MESON create mode 100644 baseconfig/arm/armv7/CONFIG_DWMAC_SUN8I rename baseconfig/arm/{ => armv7}/CONFIG_FORCE_MAX_ZONEORDER (100%) delete mode 100644 baseconfig/arm/armv7/CONFIG_GPIO_EM create mode 100644 baseconfig/arm/armv7/CONFIG_IIO_CROS_EC_BARO create mode 100644 baseconfig/arm/armv7/CONFIG_MACH_MESON6 create mode 100644 baseconfig/arm/armv7/CONFIG_MACH_MESON8 create mode 100644 baseconfig/arm/armv7/CONFIG_MACH_MESON8B rename baseconfig/arm/{ => armv7}/CONFIG_MFD_SUN4I_GPADC (100%) delete mode 100644 baseconfig/arm/armv7/CONFIG_PATA_PLATFORM create mode 100644 baseconfig/arm/armv7/CONFIG_PHY_EXYNOS_PCIE create mode 100644 baseconfig/arm/armv7/CONFIG_ROCKCHIP_CDN_DP create mode 100644 baseconfig/arm/armv7/CONFIG_RPMSG_CHAR create mode 100644 baseconfig/arm/armv7/CONFIG_SERIAL_ST_ASC create mode 100644 baseconfig/arm/armv7/CONFIG_SERIAL_ST_ASC_CONSOLE delete mode 100644 baseconfig/arm/armv7/CONFIG_SND_SOC_RK3399_GRU_SOUND create mode 100644 baseconfig/arm/armv7/CONFIG_SND_SOC_SGTL5000 create mode 100644 baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA_WM8753 create mode 100644 baseconfig/arm/armv7/CONFIG_SND_SUN8I_CODEC rename baseconfig/arm/{ => armv7}/CONFIG_SND_SUN8I_CODEC_ANALOG (100%) delete mode 100644 baseconfig/arm/armv7/CONFIG_SPI_PXA2XX create mode 100644 baseconfig/arm/armv7/CONFIG_STRICT_KERNEL_RWX create mode 100644 baseconfig/arm/armv7/CONFIG_STRICT_MODULE_RWX create mode 100644 baseconfig/arm/armv7/CONFIG_SUN5I_CCU create mode 100644 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baseconfig/s390x/CONFIG_N_GSM create mode 100644 baseconfig/s390x/CONFIG_PCIPCWATCHDOG create mode 100644 baseconfig/s390x/CONFIG_PM_DEVFREQ create mode 100644 baseconfig/s390x/CONFIG_POWER_RESET create mode 100644 baseconfig/s390x/CONFIG_PWM create mode 100644 baseconfig/s390x/CONFIG_R3964 create mode 100644 baseconfig/s390x/CONFIG_RESET_CONTROLLER create mode 100644 baseconfig/s390x/CONFIG_RFKILL create mode 100644 baseconfig/s390x/CONFIG_RMI4_CORE delete mode 100644 baseconfig/s390x/CONFIG_RMI4_F03 create mode 100644 baseconfig/s390x/CONFIG_SCSI_3W_9XXX create mode 100644 baseconfig/s390x/CONFIG_SCSI_3W_SAS create mode 100644 baseconfig/s390x/CONFIG_SCSI_AACRAID create mode 100644 baseconfig/s390x/CONFIG_SCSI_ACARD create mode 100644 baseconfig/s390x/CONFIG_SCSI_AIC79XX create mode 100644 baseconfig/s390x/CONFIG_SCSI_AIC7XXX create mode 100644 baseconfig/s390x/CONFIG_SCSI_AM53C974 create mode 100644 baseconfig/s390x/CONFIG_SCSI_ARCMSR create mode 100644 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100644 baseconfig/s390x/CONFIG_SCSI_MVSAS create mode 100644 baseconfig/s390x/CONFIG_SCSI_MVUMI create mode 100644 baseconfig/s390x/CONFIG_SCSI_PM8001 create mode 100644 baseconfig/s390x/CONFIG_SCSI_PMCRAID create mode 100644 baseconfig/s390x/CONFIG_SCSI_QLA_FC create mode 100644 baseconfig/s390x/CONFIG_SCSI_QLA_ISCSI create mode 100644 baseconfig/s390x/CONFIG_SCSI_QLOGIC_1280 create mode 100644 baseconfig/s390x/CONFIG_SCSI_SNIC create mode 100644 baseconfig/s390x/CONFIG_SCSI_STEX create mode 100644 baseconfig/s390x/CONFIG_SCSI_SYM53C8XX_2 create mode 100644 baseconfig/s390x/CONFIG_SCSI_UFSHCD create mode 100644 baseconfig/s390x/CONFIG_SCSI_WD719X create mode 100644 baseconfig/s390x/CONFIG_SENSORS_APDS990X create mode 100644 baseconfig/s390x/CONFIG_SENSORS_BH1770 create mode 100644 baseconfig/s390x/CONFIG_SENSORS_LIS3LV02D create mode 100644 baseconfig/s390x/CONFIG_SENSORS_LIS3_I2C create mode 100644 baseconfig/s390x/CONFIG_SENSORS_TSL2550 create mode 100644 baseconfig/s390x/CONFIG_SERIAL_NONSTANDARD create mode 100644 baseconfig/s390x/CONFIG_SERIO_LIBPS2 create mode 100644 baseconfig/s390x/CONFIG_SERIO_SERPORT create mode 100644 baseconfig/s390x/CONFIG_SFC create mode 100644 baseconfig/s390x/CONFIG_UIO create mode 100644 baseconfig/s390x/CONFIG_WDTPCI create mode 100644 baseconfig/s390x/CONFIG_XILLYBUS rename baseconfig/{ => x86}/CONFIG_CRYPTO_CRC32C_INTEL (100%) rename baseconfig/{ => x86}/CONFIG_DRM_I810 (100%) rename baseconfig/{ => x86}/CONFIG_DRM_I915 (100%) rename baseconfig/{ => x86}/CONFIG_DRM_I915_ALPHA_SUPPORT (100%) rename baseconfig/{ => x86}/CONFIG_DRM_I915_CAPTURE_ERROR (100%) rename baseconfig/{ => x86}/CONFIG_DRM_I915_COMPRESS_ERROR (100%) rename baseconfig/{ => x86}/CONFIG_DRM_I915_GVT (100%) rename baseconfig/{ => x86}/CONFIG_DRM_I915_GVT_KVMGT (100%) rename baseconfig/{ => x86}/CONFIG_DRM_I915_USERPTR (100%) rename baseconfig/{ => x86}/CONFIG_DRM_VMWGFX (100%) rename baseconfig/{ => x86}/CONFIG_DRM_VMWGFX_FBCON (100%) create mode 100644 baseconfig/x86/CONFIG_ENA_ETHERNET rename baseconfig/{ => x86}/CONFIG_FB_ARC (100%) rename baseconfig/{ => x86}/CONFIG_FB_GEODE (100%) rename baseconfig/{ => x86}/CONFIG_FB_HGA (100%) rename baseconfig/{ => x86}/CONFIG_FB_I810 (100%) rename baseconfig/{ => x86}/CONFIG_FB_I810_GTF (100%) rename baseconfig/{ => x86}/CONFIG_FB_I810_I2C (100%) rename baseconfig/{ => x86}/CONFIG_FB_LE80578 (100%) rename baseconfig/{ => x86}/CONFIG_FB_VGA16 (100%) rename baseconfig/{ => x86}/CONFIG_FB_VIA (100%) rename baseconfig/{ => x86}/CONFIG_FB_VIA_DIRECT_PROCFS (100%) rename baseconfig/{ => x86}/CONFIG_GPIO_AMD8111 (100%) rename baseconfig/{ => x86}/CONFIG_GPIO_CS5535 (100%) rename baseconfig/{ => x86}/CONFIG_GPIO_ML_IOH (100%) rename baseconfig/{ => x86}/CONFIG_GPIO_SCH (100%) rename baseconfig/{ => x86}/CONFIG_GPIO_VX855 (100%) create mode 100644 baseconfig/x86/CONFIG_HDMI_LPE_AUDIO rename baseconfig/{ => x86}/CONFIG_I2C_PXA (100%) rename baseconfig/{ => x86}/CONFIG_I2C_PXA_SLAVE (100%) rename baseconfig/{ => x86}/CONFIG_IB700_WDT (100%) rename baseconfig/{ => x86}/CONFIG_IBMASR (100%) rename baseconfig/{ => x86}/CONFIG_INTEL_MENLOW (100%) rename baseconfig/{ => x86}/CONFIG_LEDS_INTEL_SS4200 (100%) delete mode 100644 baseconfig/x86/CONFIG_MFD_AXP20X create mode 100644 baseconfig/x86/CONFIG_NIC7018_WDT create mode 100644 baseconfig/x86/CONFIG_PINCTRL_GEMINILAKE create mode 100644 baseconfig/x86/CONFIG_PTP_1588_CLOCK_KVM create mode 100644 baseconfig/x86/CONFIG_SERIAL_8250_LPSS create mode 100644 baseconfig/x86/CONFIG_SILEAD_DMI create mode 100644 baseconfig/x86/CONFIG_SND_SOC_ES8328 create mode 100644 baseconfig/x86/CONFIG_SND_SOC_ES8328_I2C create mode 100644 baseconfig/x86/CONFIG_SND_SOC_ES8328_SPI create mode 100644 baseconfig/x86/CONFIG_SND_SOC_NAU8540 delete mode 100644 baseconfig/x86/CONFIG_SND_SOC_TAS571X rename baseconfig/x86/{i686 => }/CONFIG_SND_SOC_TS3A227E (100%) create mode 100644 baseconfig/x86/CONFIG_SND_X86 rename baseconfig/{ => x86}/CONFIG_VMWARE_BALLOON (100%) rename baseconfig/{ => x86}/CONFIG_VMWARE_PVSCSI (100%) rename baseconfig/x86/{x86_64 => }/CONFIG_XEN_PVH (100%) delete mode 100644 baseconfig/x86/i686/CONFIG_I2C_PXA delete mode 100644 baseconfig/x86/i686/CONFIG_LEDS_INTEL_SS4200 delete mode 100644 baseconfig/x86/i686PAE/CONFIG_I2C_PXA delete mode 100644 baseconfig/x86/i686PAE/CONFIG_LEDS_INTEL_SS4200 delete mode 100644 baseconfig/x86/i686PAE/CONFIG_SND_SOC_TS3A227E create mode 100644 baseconfig/x86/x86_64/CONFIG_EDAC_PND2 create mode 100644 baseconfig/x86/x86_64/CONFIG_INTEL_TURBO_MAX_3 delete mode 100644 baseconfig/x86/x86_64/CONFIG_SND_SOC_TS3A227E delete mode 100644 bcm283x-VEC.patch create mode 100644 bcm283x-hdmi-audio.patch create mode 100644 bcm283x-mmc-bcm2835.patch delete mode 100644 bcm283x-mmc-imp-speed.patch create mode 100644 debugconfig/CONFIG_DEBUG_REFCOUNT delete mode 100644 efi-Add-EFI_SECURE_BOOT-bit.patch delete mode 100644 efi-Add-SHIM-and-image-security-database-GUID-defini.patch delete mode 100644 efi-Disable-secure-boot-if-shim-is-in-insecure-mode.patch delete mode 100644 efi-Make-EFI_SECURE_BOOT_SIG_ENFORCE-depend-on-EFI.patch delete mode 100644 ideapad-laptop-Add-Lenovo-ideapad-Y700-17ISK-to-no_h.patch delete mode 100644 ipv4-fib-don-t-warn-when-primary-address-is-missing-.patch delete mode 100644 kvm-fix-page-struct-leak-in-handle_vmon.patch delete mode 100644 kvm-vmx-more-complete-state-update-on-APICv-on-off.patch create mode 100644 media-cec-Fix-runtime-BUG-when-CONFIG_RC_CORE-CEC_CAP_RC.patch create mode 100644 powerpc-prom-Increase-RMA-size-to-512MB.patch delete mode 100644 sctp-deny-peeloff-operation-on-asocs-with-threads-sl.patch delete mode 100644 selinux-allow-context-mounts-on-tmpfs-etc.patch create mode 100644 ti-bluetooth.patch delete mode 100644 tipc-fix-an-infoleak-in-tipc_nl_compat_link_dump.patch delete mode 100644 ucount-Remove-the-atomicity-from-ucount-count.patch diff --git a/0001-HID-multitouch-enable-the-Surface-3-Type-Cover-to-re.patch b/0001-HID-multitouch-enable-the-Surface-3-Type-Cover-to-re.patch deleted file mode 100644 index 37c896420..000000000 --- a/0001-HID-multitouch-enable-the-Surface-3-Type-Cover-to-re.patch +++ /dev/null @@ -1,99 +0,0 @@ -From 8fe89ef076fa104f514da6ef61d90f5bf93488e3 Mon Sep 17 00:00:00 2001 -From: Benjamin Tissoires -Date: Fri, 25 Nov 2016 14:27:23 +0100 -Subject: [PATCH] HID: multitouch: enable the Surface 3 Type Cover to report - multitouch data - -There is no reasons to filter out keyboard and consumer control collections -in hid-multitouch. -With the previous hid-input fix, there is now a full support of the Type -Cover and we can remove all specific bits from hid-core and hid-microsoft. - -hid-multitouch will automatically set HID_QUIRK_NO_INIT_REPORTS so we can -also remove it from the list of ushbid quirks. - -Signed-off-by: Benjamin Tissoires -Signed-off-by: Jiri Kosina ---- - drivers/hid/hid-core.c | 2 -- - drivers/hid/hid-ids.h | 1 - - drivers/hid/hid-microsoft.c | 2 -- - drivers/hid/hid-multitouch.c | 4 +++- - drivers/hid/usbhid/hid-quirks.c | 1 - - 5 files changed, 3 insertions(+), 7 deletions(-) - -diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c -index 2b89c70..a5dd7e6 100644 ---- a/drivers/hid/hid-core.c -+++ b/drivers/hid/hid-core.c -@@ -728,7 +728,6 @@ static void hid_scan_collection(struct hid_parser *parser, unsigned type) - hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2 || - hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP || - hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP || -- hid->product == USB_DEVICE_ID_MS_TYPE_COVER_3 || - hid->product == USB_DEVICE_ID_MS_POWER_COVER) && - hid->group == HID_GROUP_MULTITOUCH) - hid->group = HID_GROUP_GENERIC; -@@ -1984,7 +1983,6 @@ static const struct hid_device_id hid_have_special_driver[] = { - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2) }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP) }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP) }, -- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3) }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_7K) }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_600) }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3KV1) }, -diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h -index 575aa65..10d1535 100644 ---- a/drivers/hid/hid-ids.h -+++ b/drivers/hid/hid-ids.h -@@ -719,7 +719,6 @@ - #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2 0x07e2 - #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP 0x07dd - #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP 0x07e9 --#define USB_DEVICE_ID_MS_TYPE_COVER_3 0x07de - #define USB_DEVICE_ID_MS_POWER_COVER 0x07da - - #define USB_VENDOR_ID_MOJO 0x8282 -diff --git a/drivers/hid/hid-microsoft.c b/drivers/hid/hid-microsoft.c -index c6cd392..ba02667 100644 ---- a/drivers/hid/hid-microsoft.c -+++ b/drivers/hid/hid-microsoft.c -@@ -282,8 +282,6 @@ static const struct hid_device_id ms_devices[] = { - .driver_data = MS_HIDINPUT }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP), - .driver_data = MS_HIDINPUT }, -- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3), -- .driver_data = MS_HIDINPUT }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER), - .driver_data = MS_HIDINPUT }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_COMFORT_KEYBOARD), -diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c -index fb6f1f4..84c56e6 100644 ---- a/drivers/hid/hid-multitouch.c -+++ b/drivers/hid/hid-multitouch.c -@@ -842,7 +842,9 @@ static int mt_input_mapping(struct hid_device *hdev, struct hid_input *hi, - if (!td->mtclass.export_all_inputs && - field->application != HID_DG_TOUCHSCREEN && - field->application != HID_DG_PEN && -- field->application != HID_DG_TOUCHPAD) -+ field->application != HID_DG_TOUCHPAD && -+ field->application != HID_GD_KEYBOARD && -+ field->application != HID_CP_CONSUMER_CONTROL) - return -1; - - /* -diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c -index e6cfd32..18ae715 100644 ---- a/drivers/hid/usbhid/hid-quirks.c -+++ b/drivers/hid/usbhid/hid-quirks.c -@@ -102,7 +102,6 @@ static const struct hid_blacklist { - { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2, HID_QUIRK_NO_INIT_REPORTS }, - { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP, HID_QUIRK_NO_INIT_REPORTS }, - { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP, HID_QUIRK_NO_INIT_REPORTS }, -- { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3, HID_QUIRK_NO_INIT_REPORTS }, - { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER, HID_QUIRK_NO_INIT_REPORTS }, - { USB_VENDOR_ID_MSI, USB_DEVICE_ID_MSI_GT683R_LED_PANEL, HID_QUIRK_NO_INIT_REPORTS }, - { USB_VENDOR_ID_NEXIO, USB_DEVICE_ID_NEXIO_MULTITOUCH_PTI0750, HID_QUIRK_NO_INIT_REPORTS }, --- -2.9.3 - diff --git a/0001-Work-around-for-gcc7-and-arm64.patch b/0001-Work-around-for-gcc7-and-arm64.patch deleted file mode 100644 index 88f40be5d..000000000 --- a/0001-Work-around-for-gcc7-and-arm64.patch +++ /dev/null @@ -1,62 +0,0 @@ -From 975dcf140bd307b431aff7b6d671155c796cfe5e Mon Sep 17 00:00:00 2001 -From: Laura Abbott -Date: Sat, 28 Jan 2017 16:13:49 +0100 -Subject: [PATCH] Work around for gcc7 and arm64 - -Originally proposed by Will Deacon - -http://lists.infradead.org/pipermail/linux-arm-kernel/2016-October/462224.html - -Signed-off-by: Laura Abbott ---- - include/linux/log2.h | 13 ++----------- - 1 file changed, 2 insertions(+), 11 deletions(-) - -diff --git a/include/linux/log2.h b/include/linux/log2.h -index fd7ff3d91e6a..1ab22b79681e 100644 ---- a/include/linux/log2.h -+++ b/include/linux/log2.h -@@ -16,12 +16,6 @@ - #include - - /* -- * deal with unrepresentable constant logarithms -- */ --extern __attribute__((const, noreturn)) --int ____ilog2_NaN(void); -- --/* - * non-constant log of base 2 calculators - * - the arch may override these in asm/bitops.h if they can be implemented - * more efficiently than using fls() and fls64() -@@ -85,7 +79,7 @@ unsigned long __rounddown_pow_of_two(unsigned long n) - #define ilog2(n) \ - ( \ - __builtin_constant_p(n) ? ( \ -- (n) < 1 ? ____ilog2_NaN() : \ -+ (n) < 1 ? 0 : \ - (n) & (1ULL << 63) ? 63 : \ - (n) & (1ULL << 62) ? 62 : \ - (n) & (1ULL << 61) ? 61 : \ -@@ -149,9 +143,7 @@ unsigned long __rounddown_pow_of_two(unsigned long n) - (n) & (1ULL << 3) ? 3 : \ - (n) & (1ULL << 2) ? 2 : \ - (n) & (1ULL << 1) ? 1 : \ -- (n) & (1ULL << 0) ? 0 : \ -- ____ilog2_NaN() \ -- ) : \ -+ 0 ) : \ - (sizeof(n) <= 4) ? \ - __ilog2_u32(n) : \ - __ilog2_u64(n) \ -@@ -194,7 +186,6 @@ unsigned long __rounddown_pow_of_two(unsigned long n) - * @n: parameter - * - * The first few values calculated by this routine: -- * ob2(0) = 0 - * ob2(1) = 0 - * ob2(2) = 1 - * ob2(3) = 2 --- -2.11.0 - diff --git a/0001-drm-mgag200-Black-screen-fix-for-G200e-rev-4.patch b/0001-drm-mgag200-Black-screen-fix-for-G200e-rev-4.patch deleted file mode 100644 index e583d09e8..000000000 --- a/0001-drm-mgag200-Black-screen-fix-for-G200e-rev-4.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 1e5895f2c6068fb9ae5356e3a751a29a22af5f01 Mon Sep 17 00:00:00 2001 -From: Fedora Kernel Team -Date: Mon, 20 Jun 2016 14:53:03 +0200 -Subject: [PATCH 1/6] drm/mgag200: Black screen fix for G200e rev 4 - -Upstream: since drm-fixes-for-v4.7 -commit d3922b69617b62bb2509936b68301f837229d9f0 - -Author: Mathieu Larouche -AuthorDate: Fri May 27 15:12:50 2016 -0400 -Commit: Dave Airlie -CommitDate: Wed Jun 1 15:25:04 2016 +1000 - - drm/mgag200: Black screen fix for G200e rev 4 - - - Fixed black screen for some resolutions of G200e rev4 - - Fixed testm & testn which had predetermined value. - - Reported-by: Jan Beulich - - Signed-off-by: Mathieu Larouche - Cc: stable@vger.kernel.org - Signed-off-by: Dave Airlie ---- - drivers/gpu/drm/mgag200/mgag200_mode.c | 10 +++++++++- - 1 file changed, 9 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c -index 14e64e0..d347dca 100644 ---- a/drivers/gpu/drm/mgag200/mgag200_mode.c -+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c -@@ -182,7 +182,7 @@ static int mga_g200se_set_plls(struct mga_device *mdev, long clock) - } - } - -- fvv = pllreffreq * testn / testm; -+ fvv = pllreffreq * (n + 1) / (m + 1); - fvv = (fvv - 800000) / 50000; - - if (fvv > 15) -@@ -202,6 +202,14 @@ static int mga_g200se_set_plls(struct mga_device *mdev, long clock) - WREG_DAC(MGA1064_PIX_PLLC_M, m); - WREG_DAC(MGA1064_PIX_PLLC_N, n); - WREG_DAC(MGA1064_PIX_PLLC_P, p); -+ -+ if (mdev->unique_rev_id >= 0x04) { -+ WREG_DAC(0x1a, 0x09); -+ msleep(20); -+ WREG_DAC(0x1a, 0x01); -+ -+ } -+ - return 0; - } - --- -2.7.4 - diff --git a/0001-i2c-bcm2835-Debug-test-for-curr_msg.patch b/0001-i2c-bcm2835-Debug-test-for-curr_msg.patch deleted file mode 100644 index 4d4f0cb0f..000000000 --- a/0001-i2c-bcm2835-Debug-test-for-curr_msg.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 81c53729ee7c7f721c357ed3b531ebc97ca44051 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Wed, 15 Feb 2017 11:57:57 -0800 -Subject: [PATCH] i2c-bcm2835: Debug test for curr_msg - -Signed-off-by: Eric Anholt ---- - drivers/i2c/busses/i2c-bcm2835.c | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - -diff --git a/drivers/i2c/busses/i2c-bcm2835.c b/drivers/i2c/busses/i2c-bcm2835.c -index c3436f627028..a75fab4dd660 100644 ---- a/drivers/i2c/busses/i2c-bcm2835.c -+++ b/drivers/i2c/busses/i2c-bcm2835.c -@@ -195,7 +195,10 @@ static irqreturn_t bcm2835_i2c_isr(int this_irq, void *data) - } - - if (val & BCM2835_I2C_S_DONE) { -- if (i2c_dev->curr_msg->flags & I2C_M_RD) { -+ if (!i2c_dev->curr_msg) { -+ dev_info(i2c_dev->dev, -+ "Processing DONE interrupt with no msg\n"); -+ } else if (i2c_dev->curr_msg->flags & I2C_M_RD) { - bcm2835_drain_rxfifo(i2c_dev); - val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S); - } --- -2.11.0 - diff --git a/0002-HID-multitouch-enable-the-Surface-4-Type-Cover-Pro-J.patch b/0002-HID-multitouch-enable-the-Surface-4-Type-Cover-Pro-J.patch deleted file mode 100644 index 40b010bb3..000000000 --- a/0002-HID-multitouch-enable-the-Surface-4-Type-Cover-Pro-J.patch +++ /dev/null @@ -1,83 +0,0 @@ -From 4fed0231994b27b3896bc63885ac66d02fff625b Mon Sep 17 00:00:00 2001 -From: Yuta Kobayashi -Date: Mon, 19 Dec 2016 02:36:45 +0000 -Subject: [PATCH] HID: multitouch: enable the Surface 4 Type Cover Pro (JP) to - report multitouch data - -Since commit 8fe89ef076fa1 ("HID: multitouch: enable the Surface 3 Type -Cover to report multitouch data"), the TypeCover can be properly handled -by hid-multitouch and don't require any special quirk in the kernel. - -Remove the support of the Surface 4 Type Cover Pro (JP) from -hid-microsoft so it can properly report multitouch from the touchpad. - -Signed-off-by: Yuta Kobayashi -Reviewed-by: Benjamin Tissoires -Signed-off-by: Jiri Kosina ---- - drivers/hid/hid-core.c | 2 -- - drivers/hid/hid-ids.h | 1 - - drivers/hid/hid-microsoft.c | 2 -- - drivers/hid/usbhid/hid-quirks.c | 1 - - 4 files changed, 6 deletions(-) - -diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c -index cff060b..db87d91 100644 ---- a/drivers/hid/hid-core.c -+++ b/drivers/hid/hid-core.c -@@ -729,7 +729,6 @@ static void hid_scan_collection(struct hid_parser *parser, unsigned type) - hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP || - hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_4 || - hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_2 || -- hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP || - hid->product == USB_DEVICE_ID_MS_POWER_COVER) && - hid->group == HID_GROUP_MULTITOUCH) - hid->group = HID_GROUP_GENERIC; -@@ -1990,7 +1989,6 @@ static const struct hid_device_id hid_have_special_driver[] = { - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP) }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4) }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_2) }, -- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP) }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_7K) }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_600) }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3KV1) }, -diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h -index ec277b9..55758f7 100644 ---- a/drivers/hid/hid-ids.h -+++ b/drivers/hid/hid-ids.h -@@ -723,7 +723,6 @@ - #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP 0x07dd - #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_4 0x07e4 - #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_2 0x07e8 --#define USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP 0x07e9 - #define USB_DEVICE_ID_MS_POWER_COVER 0x07da - - #define USB_VENDOR_ID_MOJO 0x8282 -diff --git a/drivers/hid/hid-microsoft.c b/drivers/hid/hid-microsoft.c -index 74b7b84..2b706b5 100644 ---- a/drivers/hid/hid-microsoft.c -+++ b/drivers/hid/hid-microsoft.c -@@ -284,8 +284,6 @@ static const struct hid_device_id ms_devices[] = { - .driver_data = MS_HIDINPUT }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_2), - .driver_data = MS_HIDINPUT }, -- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP), -- .driver_data = MS_HIDINPUT }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER), - .driver_data = MS_HIDINPUT }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_COMFORT_KEYBOARD), -diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c -index b3e01c8..ebb8e95c 100644 ---- a/drivers/hid/usbhid/hid-quirks.c -+++ b/drivers/hid/usbhid/hid-quirks.c -@@ -105,7 +105,6 @@ static const struct hid_blacklist { - { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP, HID_QUIRK_NO_INIT_REPORTS }, - { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4, HID_QUIRK_NO_INIT_REPORTS }, - { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_2, HID_QUIRK_NO_INIT_REPORTS }, -- { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP, HID_QUIRK_NO_INIT_REPORTS }, - { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER, HID_QUIRK_NO_INIT_REPORTS }, - { USB_VENDOR_ID_MSI, USB_DEVICE_ID_MSI_GT683R_LED_PANEL, HID_QUIRK_NO_INIT_REPORTS }, - { USB_VENDOR_ID_NEXIO, USB_DEVICE_ID_NEXIO_MULTITOUCH_PTI0750, HID_QUIRK_NO_INIT_REPORTS }, --- -2.9.3 - diff --git a/0002-drm-nouveau-fbcon-fix-out-of-bounds-memory-accesses.patch b/0002-drm-nouveau-fbcon-fix-out-of-bounds-memory-accesses.patch deleted file mode 100644 index d1c32b439..000000000 --- a/0002-drm-nouveau-fbcon-fix-out-of-bounds-memory-accesses.patch +++ /dev/null @@ -1,138 +0,0 @@ -From 02510a8805db2c3f8ca2926f90c4b3793934404a Mon Sep 17 00:00:00 2001 -From: Fedora Kernel Team -Date: Mon, 20 Jun 2016 14:51:45 +0200 -Subject: [PATCH 2/6] drm/nouveau/fbcon: fix out-of-bounds memory accesses - -Upstream: drm-fixes for 4.7 (and cc'd 4.6-stable) -commit f045f459d925138fe7d6193a8c86406bda7e49da - -Author: Ben Skeggs -AuthorDate: Thu Jun 2 12:23:31 2016 +1000 -Commit: Ben Skeggs -CommitDate: Thu Jun 2 13:53:44 2016 +1000 - - drm/nouveau/fbcon: fix out-of-bounds memory accesses - - Reported by KASAN. - - Signed-off-by: Ben Skeggs - Cc: stable@vger.kernel.org ---- - drivers/gpu/drm/nouveau/nouveau_fbcon.c | 1 + - drivers/gpu/drm/nouveau/nv04_fbcon.c | 7 ++----- - drivers/gpu/drm/nouveau/nv50_fbcon.c | 6 ++---- - drivers/gpu/drm/nouveau/nvc0_fbcon.c | 6 ++---- - 4 files changed, 7 insertions(+), 13 deletions(-) - -diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c -index 59f27e7..bd89c86 100644 ---- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c -+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c -@@ -557,6 +557,7 @@ nouveau_fbcon_init(struct drm_device *dev) - if (ret) - goto fini; - -+ fbcon->helper.fbdev->pixmap.buf_align = 4; - return 0; - - fini: -diff --git a/drivers/gpu/drm/nouveau/nv04_fbcon.c b/drivers/gpu/drm/nouveau/nv04_fbcon.c -index 789dc29..8f715fe 100644 ---- a/drivers/gpu/drm/nouveau/nv04_fbcon.c -+++ b/drivers/gpu/drm/nouveau/nv04_fbcon.c -@@ -82,7 +82,6 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) - uint32_t fg; - uint32_t bg; - uint32_t dsize; -- uint32_t width; - uint32_t *data = (uint32_t *)image->data; - int ret; - -@@ -93,9 +92,6 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) - if (ret) - return ret; - -- width = ALIGN(image->width, 8); -- dsize = ALIGN(width * image->height, 32) >> 5; -- - if (info->fix.visual == FB_VISUAL_TRUECOLOR || - info->fix.visual == FB_VISUAL_DIRECTCOLOR) { - fg = ((uint32_t *) info->pseudo_palette)[image->fg_color]; -@@ -111,10 +107,11 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) - ((image->dx + image->width) & 0xffff)); - OUT_RING(chan, bg); - OUT_RING(chan, fg); -- OUT_RING(chan, (image->height << 16) | width); -+ OUT_RING(chan, (image->height << 16) | image->width); - OUT_RING(chan, (image->height << 16) | image->width); - OUT_RING(chan, (image->dy << 16) | (image->dx & 0xffff)); - -+ dsize = ALIGN(image->width * image->height, 32) >> 5; - while (dsize) { - int iter_len = dsize > 128 ? 128 : dsize; - -diff --git a/drivers/gpu/drm/nouveau/nv50_fbcon.c b/drivers/gpu/drm/nouveau/nv50_fbcon.c -index e05499d..a4e259a 100644 ---- a/drivers/gpu/drm/nouveau/nv50_fbcon.c -+++ b/drivers/gpu/drm/nouveau/nv50_fbcon.c -@@ -95,7 +95,7 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) - struct nouveau_fbdev *nfbdev = info->par; - struct nouveau_drm *drm = nouveau_drm(nfbdev->dev); - struct nouveau_channel *chan = drm->channel; -- uint32_t width, dwords, *data = (uint32_t *)image->data; -+ uint32_t dwords, *data = (uint32_t *)image->data; - uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel)); - uint32_t *palette = info->pseudo_palette; - int ret; -@@ -107,9 +107,6 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) - if (ret) - return ret; - -- width = ALIGN(image->width, 32); -- dwords = (width * image->height) >> 5; -- - BEGIN_NV04(chan, NvSub2D, 0x0814, 2); - if (info->fix.visual == FB_VISUAL_TRUECOLOR || - info->fix.visual == FB_VISUAL_DIRECTCOLOR) { -@@ -128,6 +125,7 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) - OUT_RING(chan, 0); - OUT_RING(chan, image->dy); - -+ dwords = ALIGN(image->width * image->height, 32) >> 5; - while (dwords) { - int push = dwords > 2047 ? 2047 : dwords; - -diff --git a/drivers/gpu/drm/nouveau/nvc0_fbcon.c b/drivers/gpu/drm/nouveau/nvc0_fbcon.c -index c97395b..f28315e 100644 ---- a/drivers/gpu/drm/nouveau/nvc0_fbcon.c -+++ b/drivers/gpu/drm/nouveau/nvc0_fbcon.c -@@ -95,7 +95,7 @@ nvc0_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) - struct nouveau_fbdev *nfbdev = info->par; - struct nouveau_drm *drm = nouveau_drm(nfbdev->dev); - struct nouveau_channel *chan = drm->channel; -- uint32_t width, dwords, *data = (uint32_t *)image->data; -+ uint32_t dwords, *data = (uint32_t *)image->data; - uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel)); - uint32_t *palette = info->pseudo_palette; - int ret; -@@ -107,9 +107,6 @@ nvc0_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) - if (ret) - return ret; - -- width = ALIGN(image->width, 32); -- dwords = (width * image->height) >> 5; -- - BEGIN_NVC0(chan, NvSub2D, 0x0814, 2); - if (info->fix.visual == FB_VISUAL_TRUECOLOR || - info->fix.visual == FB_VISUAL_DIRECTCOLOR) { -@@ -128,6 +125,7 @@ nvc0_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) - OUT_RING (chan, 0); - OUT_RING (chan, image->dy); - -+ dwords = ALIGN(image->width * image->height, 32) >> 5; - while (dwords) { - int push = dwords > 2047 ? 2047 : dwords; - --- -2.7.4 - diff --git a/0003-HID-multitouch-enable-Surface-4-Type-Cover-Pro-non-J.patch b/0003-HID-multitouch-enable-Surface-4-Type-Cover-Pro-non-J.patch deleted file mode 100644 index 22bc8b482..000000000 --- a/0003-HID-multitouch-enable-Surface-4-Type-Cover-Pro-non-J.patch +++ /dev/null @@ -1,88 +0,0 @@ -From 66e5c5ffc7a5e4d36d136ce4fd8bdb4e92ecec7b Mon Sep 17 00:00:00 2001 -From: Daniel Keller -Date: Tue, 10 Jan 2017 20:39:31 +0100 -Subject: [PATCH] HID: multitouch: enable Surface 4 Type Cover Pro (non-JP) to - report multitouch data - -Nearly identical to the patch "multitouch: enable the Surface 4 Type Cover Pro -(JP) to report multitouch data" - -We can now remove the support of the Surface 4 Type Cover Pro (not JP versions) -from hid-microsoft so it can properly report multi touch from the touchpad. - -Signed-off-by: Daniel Keller -Acked-by: Benjamin Tissoires -Signed-off-by: Jiri Kosina ---- - drivers/hid/hid-core.c | 4 ---- - drivers/hid/hid-ids.h | 2 -- - drivers/hid/hid-microsoft.c | 4 ---- - drivers/hid/usbhid/hid-quirks.c | 2 -- - 4 files changed, 12 deletions(-) - -diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c -index db87d91..1ff9142 100644 ---- a/drivers/hid/hid-core.c -+++ b/drivers/hid/hid-core.c -@@ -727,8 +727,6 @@ static void hid_scan_collection(struct hid_parser *parser, unsigned type) - (hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_3 || - hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2 || - hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP || -- hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_4 || -- hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_2 || - hid->product == USB_DEVICE_ID_MS_POWER_COVER) && - hid->group == HID_GROUP_MULTITOUCH) - hid->group = HID_GROUP_GENERIC; -@@ -1987,8 +1985,6 @@ static const struct hid_device_id hid_have_special_driver[] = { - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3) }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2) }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP) }, -- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4) }, -- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_2) }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_7K) }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_600) }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3KV1) }, -diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h -index 55758f7..9d87716 100644 ---- a/drivers/hid/hid-ids.h -+++ b/drivers/hid/hid-ids.h -@@ -721,8 +721,6 @@ - #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3 0x07dc - #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2 0x07e2 - #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP 0x07dd --#define USB_DEVICE_ID_MS_TYPE_COVER_PRO_4 0x07e4 --#define USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_2 0x07e8 - #define USB_DEVICE_ID_MS_POWER_COVER 0x07da - - #define USB_VENDOR_ID_MOJO 0x8282 -diff --git a/drivers/hid/hid-microsoft.c b/drivers/hid/hid-microsoft.c -index 2b706b5..d856726 100644 ---- a/drivers/hid/hid-microsoft.c -+++ b/drivers/hid/hid-microsoft.c -@@ -280,10 +280,6 @@ static const struct hid_device_id ms_devices[] = { - .driver_data = MS_HIDINPUT }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP), - .driver_data = MS_HIDINPUT }, -- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4), -- .driver_data = MS_HIDINPUT }, -- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_2), -- .driver_data = MS_HIDINPUT }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER), - .driver_data = MS_HIDINPUT }, - { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_COMFORT_KEYBOARD), -diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c -index ebb8e95c..6108649 100644 ---- a/drivers/hid/usbhid/hid-quirks.c -+++ b/drivers/hid/usbhid/hid-quirks.c -@@ -103,8 +103,6 @@ static const struct hid_blacklist { - { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3, HID_QUIRK_NO_INIT_REPORTS }, - { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2, HID_QUIRK_NO_INIT_REPORTS }, - { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP, HID_QUIRK_NO_INIT_REPORTS }, -- { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4, HID_QUIRK_NO_INIT_REPORTS }, -- { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_2, HID_QUIRK_NO_INIT_REPORTS }, - { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER, HID_QUIRK_NO_INIT_REPORTS }, - { USB_VENDOR_ID_MSI, USB_DEVICE_ID_MSI_GT683R_LED_PANEL, HID_QUIRK_NO_INIT_REPORTS }, - { USB_VENDOR_ID_NEXIO, USB_DEVICE_ID_NEXIO_MULTITOUCH_PTI0750, HID_QUIRK_NO_INIT_REPORTS }, --- -2.9.3 - diff --git a/0003-drm-nouveau-disp-sor-gf119-both-links-use-the-same-t.patch b/0003-drm-nouveau-disp-sor-gf119-both-links-use-the-same-t.patch deleted file mode 100644 index b93bdff17..000000000 --- a/0003-drm-nouveau-disp-sor-gf119-both-links-use-the-same-t.patch +++ /dev/null @@ -1,46 +0,0 @@ -From de35f524e89daf8862d49724b9045f9254bfdfea Mon Sep 17 00:00:00 2001 -From: Fedora Kernel Team -Date: Mon, 20 Jun 2016 14:52:01 +0200 -Subject: [PATCH 3/6] drm/nouveau/disp/sor/gf119: both links use the same - training register - -Upstream: drm-fixes for 4.7 (and cc'd 4.6-stable) -commit a8953c52b95167b5d21a66f0859751570271d834 - -Author: Ben Skeggs -AuthorDate: Fri Jun 3 14:37:40 2016 +1000 -Commit: Ben Skeggs -CommitDate: Tue Jun 7 08:11:14 2016 +1000 - - drm/nouveau/disp/sor/gf119: both links use the same training register - - It appears that, for whatever reason, both link A and B use the same - register to control the training pattern. It's a little odd, as the - GPUs before this (Tesla/Fermi1) have per-link registers, as do newer - GPUs (Maxwell). - - Fixes the third DP output on NVS 510 (GK107). - - Signed-off-by: Ben Skeggs - Cc: stable@vger.kernel.org ---- - drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c -index b4b41b1..5111560 100644 ---- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c -+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c -@@ -40,8 +40,7 @@ static int - gf119_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern) - { - struct nvkm_device *device = outp->base.disp->engine.subdev.device; -- const u32 loff = gf119_sor_loff(outp); -- nvkm_mask(device, 0x61c110 + loff, 0x0f0f0f0f, 0x01010101 * pattern); -+ nvkm_mask(device, 0x61c110, 0x0f0f0f0f, 0x01010101 * pattern); - return 0; - } - --- -2.7.4 - diff --git a/0004-drm-nouveau-disp-sor-gm107-training-pattern-register.patch b/0004-drm-nouveau-disp-sor-gm107-training-pattern-register.patch deleted file mode 100644 index a0b6171d8..000000000 --- a/0004-drm-nouveau-disp-sor-gm107-training-pattern-register.patch +++ /dev/null @@ -1,195 +0,0 @@ -From eb4668302adce316f53896b0fd8144ffe380a3ad Mon Sep 17 00:00:00 2001 -From: Fedora Kernel Team -Date: Mon, 20 Jun 2016 14:52:06 +0200 -Subject: [PATCH 4/6] drm/nouveau/disp/sor/gm107: training pattern registers - are like gm200 - -Upstream: drm-fixes for 4.7 (and cc'd 4.6-stable) -commit 4691409b3e2250ed66aa8dcefa23fe765daf7add - -Author: Ben Skeggs -AuthorDate: Fri Jun 3 15:05:52 2016 +1000 -Commit: Ben Skeggs -CommitDate: Tue Jun 7 08:11:25 2016 +1000 - - drm/nouveau/disp/sor/gm107: training pattern registers are like gm200 - - Signed-off-by: Ben Skeggs - Cc: stable@vger.kernel.org ---- - drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild | 1 + - drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c | 2 +- - drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h | 9 +++- - .../gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c | 2 +- - .../nvkm/engine/disp/{gm107.c => sorgm107.c} | 50 +++++++++++----------- - .../gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c | 15 +------ - 6 files changed, 36 insertions(+), 43 deletions(-) - copy drivers/gpu/drm/nouveau/nvkm/engine/disp/{gm107.c => sorgm107.c} (55%) - -diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild -index a74c5dd..e2a64ed 100644 ---- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild -+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild -@@ -18,6 +18,7 @@ nvkm-y += nvkm/engine/disp/piornv50.o - nvkm-y += nvkm/engine/disp/sornv50.o - nvkm-y += nvkm/engine/disp/sorg94.o - nvkm-y += nvkm/engine/disp/sorgf119.o -+nvkm-y += nvkm/engine/disp/sorgm107.o - nvkm-y += nvkm/engine/disp/sorgm200.o - nvkm-y += nvkm/engine/disp/dport.o - -diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c -index b694414..f4b9cf8 100644 ---- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c -+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c -@@ -36,7 +36,7 @@ gm107_disp = { - .outp.internal.crt = nv50_dac_output_new, - .outp.internal.tmds = nv50_sor_output_new, - .outp.internal.lvds = nv50_sor_output_new, -- .outp.internal.dp = gf119_sor_dp_new, -+ .outp.internal.dp = gm107_sor_dp_new, - .dac.nr = 3, - .dac.power = nv50_dac_power, - .dac.sense = nv50_dac_sense, -diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h b/drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h -index e9067ba..4e983f6 100644 ---- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h -+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h -@@ -62,7 +62,12 @@ int g94_sor_dp_lnk_pwr(struct nvkm_output_dp *, int); - int gf119_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *, - struct nvkm_output **); - int gf119_sor_dp_lnk_ctl(struct nvkm_output_dp *, int, int, bool); -+int gf119_sor_dp_drv_ctl(struct nvkm_output_dp *, int, int, int, int); - --int gm200_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *, -- struct nvkm_output **); -+int gm107_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *, -+ struct nvkm_output **); -+int gm107_sor_dp_pattern(struct nvkm_output_dp *, int); -+ -+int gm200_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *, -+ struct nvkm_output **); - #endif -diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c -index 5111560..22706c0 100644 ---- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c -+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c -@@ -63,7 +63,7 @@ gf119_sor_dp_lnk_ctl(struct nvkm_output_dp *outp, int nr, int bw, bool ef) - return 0; - } - --static int -+int - gf119_sor_dp_drv_ctl(struct nvkm_output_dp *outp, - int ln, int vs, int pe, int pc) - { -diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c -similarity index 55% -copy from drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c -copy to drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c -index b694414..37790b2 100644 ---- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c -+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c -@@ -1,5 +1,5 @@ - /* -- * Copyright 2012 Red Hat Inc. -+ * Copyright 2016 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), -@@ -19,35 +19,35 @@ - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * -- * Authors: Ben Skeggs -+ * Authors: Ben Skeggs - */ - #include "nv50.h" --#include "rootnv50.h" -+#include "outpdp.h" - --static const struct nv50_disp_func --gm107_disp = { -- .intr = gf119_disp_intr, -- .uevent = &gf119_disp_chan_uevent, -- .super = gf119_disp_intr_supervisor, -- .root = &gm107_disp_root_oclass, -- .head.vblank_init = gf119_disp_vblank_init, -- .head.vblank_fini = gf119_disp_vblank_fini, -- .head.scanoutpos = gf119_disp_root_scanoutpos, -- .outp.internal.crt = nv50_dac_output_new, -- .outp.internal.tmds = nv50_sor_output_new, -- .outp.internal.lvds = nv50_sor_output_new, -- .outp.internal.dp = gf119_sor_dp_new, -- .dac.nr = 3, -- .dac.power = nv50_dac_power, -- .dac.sense = nv50_dac_sense, -- .sor.nr = 4, -- .sor.power = nv50_sor_power, -- .sor.hda_eld = gf119_hda_eld, -- .sor.hdmi = gk104_hdmi_ctrl, -+int -+gm107_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern) -+{ -+ struct nvkm_device *device = outp->base.disp->engine.subdev.device; -+ const u32 soff = outp->base.or * 0x800; -+ const u32 data = 0x01010101 * pattern; -+ if (outp->base.info.sorconf.link & 1) -+ nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, data); -+ else -+ nvkm_mask(device, 0x61c12c + soff, 0x0f0f0f0f, data); -+ return 0; -+} -+ -+static const struct nvkm_output_dp_func -+gm107_sor_dp_func = { -+ .pattern = gm107_sor_dp_pattern, -+ .lnk_pwr = g94_sor_dp_lnk_pwr, -+ .lnk_ctl = gf119_sor_dp_lnk_ctl, -+ .drv_ctl = gf119_sor_dp_drv_ctl, - }; - - int --gm107_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp) -+gm107_sor_dp_new(struct nvkm_disp *disp, int index, -+ struct dcb_output *dcbE, struct nvkm_output **poutp) - { -- return gf119_disp_new_(&gm107_disp, device, index, pdisp); -+ return nvkm_output_dp_new_(&gm107_sor_dp_func, disp, index, dcbE, poutp); - } -diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c -index 2cfbef9..c44fa7e 100644 ---- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c -+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c -@@ -57,19 +57,6 @@ gm200_sor_dp_lane_map(struct nvkm_device *device, u8 lane) - } - - static int --gm200_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern) --{ -- struct nvkm_device *device = outp->base.disp->engine.subdev.device; -- const u32 soff = gm200_sor_soff(outp); -- const u32 data = 0x01010101 * pattern; -- if (outp->base.info.sorconf.link & 1) -- nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, data); -- else -- nvkm_mask(device, 0x61c12c + soff, 0x0f0f0f0f, data); -- return 0; --} -- --static int - gm200_sor_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr) - { - struct nvkm_device *device = outp->base.disp->engine.subdev.device; -@@ -129,7 +116,7 @@ gm200_sor_dp_drv_ctl(struct nvkm_output_dp *outp, - - static const struct nvkm_output_dp_func - gm200_sor_dp_func = { -- .pattern = gm200_sor_dp_pattern, -+ .pattern = gm107_sor_dp_pattern, - .lnk_pwr = gm200_sor_dp_lnk_pwr, - .lnk_ctl = gf119_sor_dp_lnk_ctl, - .drv_ctl = gm200_sor_dp_drv_ctl, --- -2.7.4 - diff --git a/0005-i915-fbc-Disable-on-HSW-by-default-for-now.patch b/0005-i915-fbc-Disable-on-HSW-by-default-for-now.patch deleted file mode 100644 index d95f2f4d0..000000000 --- a/0005-i915-fbc-Disable-on-HSW-by-default-for-now.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 28d0147bded959b2c4d3eb1aa957452d5dbb0cc9 Mon Sep 17 00:00:00 2001 -From: Fedora Kernel Team -Date: Mon, 20 Jun 2016 14:52:10 +0200 -Subject: [PATCH 5/6] i915/fbc: Disable on HSW by default for now - -Upstream: posted on dri-devel (and r-b'd) - -Author: cpaul@redhat.com -AuthorDate: Thu Jun 9 11:58:15 2016 -0400 -Commit: Rob Clark -CommitDate: Thu Jun 9 15:43:07 2016 -0400 - - i915/fbc: Disable on HSW by default for now - - >From https://bugs.freedesktop.org/show_bug.cgi?id=96461 : - - This was kind of a difficult bug to track down. If you're using a - Haswell system running GNOME and you have fbc completely enabled and - working, playing videos can result in video artifacts. Steps to - reproduce: - - - Run GNOME - - Ensure FBC is enabled and active - - Download a movie, I used the ogg version of Big Buck Bunny for this - - Run `gst-launch-1.0 filesrc location='some_movie.ogg' ! decodebin ! - glimagesink` in a terminal - - Watch for about over a minute, you'll see small horizontal lines go - down the screen. - - For the time being, disable FBC for Haswell by default. - - Signed-off-by: Lyude - Reviewed-by: Paulo Zanoni - Cc: stable@vger.kernel.org ---- - drivers/gpu/drm/i915/intel_fbc.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c -index 0f0492f..28f4407 100644 ---- a/drivers/gpu/drm/i915/intel_fbc.c -+++ b/drivers/gpu/drm/i915/intel_fbc.c -@@ -823,8 +823,7 @@ static bool intel_fbc_can_choose(struct intel_crtc *crtc) - { - struct drm_i915_private *dev_priv = crtc->base.dev->dev_private; - struct intel_fbc *fbc = &dev_priv->fbc; -- bool enable_by_default = IS_HASWELL(dev_priv) || -- IS_BROADWELL(dev_priv); -+ bool enable_by_default = IS_BROADWELL(dev_priv); - - if (intel_vgpu_active(dev_priv->dev)) { - fbc->no_fbc_reason = "VGPU is active"; --- -2.7.4 - diff --git a/ALSA-timer-Fix-leak-in-SNDRV_TIMER_IOCTL_PARAMS.patch b/ALSA-timer-Fix-leak-in-SNDRV_TIMER_IOCTL_PARAMS.patch deleted file mode 100644 index 3eb8bf183..000000000 --- a/ALSA-timer-Fix-leak-in-SNDRV_TIMER_IOCTL_PARAMS.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 527a5767c165abd2b4dba99da992c51ca7547562 Mon Sep 17 00:00:00 2001 -From: Kangjie Lu -Date: Tue, 3 May 2016 16:44:07 -0400 -Subject: [PATCH 1/3] ALSA: timer: Fix leak in SNDRV_TIMER_IOCTL_PARAMS -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The stack object “tread” has a total size of 32 bytes. Its field -“event” and “val” both contain 4 bytes padding. These 8 bytes -padding bytes are sent to user without being initialized. - -Signed-off-by: Kangjie Lu -Signed-off-by: Takashi Iwai ---- - sound/core/timer.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/sound/core/timer.c b/sound/core/timer.c -index 6469bedda2f3..964f5ebf495e 100644 ---- a/sound/core/timer.c -+++ b/sound/core/timer.c -@@ -1739,6 +1739,7 @@ static int snd_timer_user_params(struct file *file, - if (tu->timeri->flags & SNDRV_TIMER_IFLG_EARLY_EVENT) { - if (tu->tread) { - struct snd_timer_tread tread; -+ memset(&tread, 0, sizeof(tread)); - tread.event = SNDRV_TIMER_EVENT_EARLY; - tread.tstamp.tv_sec = 0; - tread.tstamp.tv_nsec = 0; --- -2.5.5 - diff --git a/ALSA-timer-Fix-leak-in-events-via-snd_timer_user_cca.patch b/ALSA-timer-Fix-leak-in-events-via-snd_timer_user_cca.patch deleted file mode 100644 index e6f46f8a8..000000000 --- a/ALSA-timer-Fix-leak-in-events-via-snd_timer_user_cca.patch +++ /dev/null @@ -1,34 +0,0 @@ -From addd6e9f0e25efb00d813d54528607c75b77c416 Mon Sep 17 00:00:00 2001 -From: Kangjie Lu -Date: Tue, 3 May 2016 16:44:20 -0400 -Subject: [PATCH 2/3] ALSA: timer: Fix leak in events via - snd_timer_user_ccallback -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The stack object “r1” has a total size of 32 bytes. Its field -“event” and “val” both contain 4 bytes padding. These 8 bytes -padding bytes are sent to user without being initialized. - -Signed-off-by: Kangjie Lu -Signed-off-by: Takashi Iwai ---- - sound/core/timer.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/sound/core/timer.c b/sound/core/timer.c -index 964f5ebf495e..e98fa5feb731 100644 ---- a/sound/core/timer.c -+++ b/sound/core/timer.c -@@ -1225,6 +1225,7 @@ static void snd_timer_user_ccallback(struct snd_timer_instance *timeri, - tu->tstamp = *tstamp; - if ((tu->filter & (1 << event)) == 0 || !tu->tread) - return; -+ memset(&r1, 0, sizeof(r1)); - r1.event = event; - r1.tstamp = *tstamp; - r1.val = resolution; --- -2.5.5 - diff --git a/ALSA-timer-Fix-leak-in-events-via-snd_timer_user_tin.patch b/ALSA-timer-Fix-leak-in-events-via-snd_timer_user_tin.patch deleted file mode 100644 index 7851c55a2..000000000 --- a/ALSA-timer-Fix-leak-in-events-via-snd_timer_user_tin.patch +++ /dev/null @@ -1,34 +0,0 @@ -From b06a443b5679e9a0298e2f206ddb60845569f62f Mon Sep 17 00:00:00 2001 -From: Kangjie Lu -Date: Tue, 3 May 2016 16:44:32 -0400 -Subject: [PATCH 3/3] ALSA: timer: Fix leak in events via - snd_timer_user_tinterrupt -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The stack object “r1” has a total size of 32 bytes. Its field -“event” and “val” both contain 4 bytes padding. These 8 bytes -padding bytes are sent to user without being initialized. - -Signed-off-by: Kangjie Lu -Signed-off-by: Takashi Iwai ---- - sound/core/timer.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/sound/core/timer.c b/sound/core/timer.c -index e98fa5feb731..c69a27155433 100644 ---- a/sound/core/timer.c -+++ b/sound/core/timer.c -@@ -1268,6 +1268,7 @@ static void snd_timer_user_tinterrupt(struct snd_timer_instance *timeri, - } - if ((tu->filter & (1 << SNDRV_TIMER_EVENT_RESOLUTION)) && - tu->last_resolution != resolution) { -+ memset(&r1, 0, sizeof(r1)); - r1.event = SNDRV_TIMER_EVENT_RESOLUTION; - r1.tstamp = tstamp; - r1.val = resolution; --- -2.5.5 - diff --git a/Add-option-to-automatically-enforce-module-signature.patch b/Add-option-to-automatically-enforce-module-signature.patch deleted file mode 100644 index ebabac62e..000000000 --- a/Add-option-to-automatically-enforce-module-signature.patch +++ /dev/null @@ -1,217 +0,0 @@ -From 6b6203b92cfb457a0669a9c87a29b360405bffc6 Mon Sep 17 00:00:00 2001 -From: Matthew Garrett -Date: Fri, 9 Aug 2013 18:36:30 -0400 -Subject: [PATCH 10/20] Add option to automatically enforce module signatures - when in Secure Boot mode - -UEFI Secure Boot provides a mechanism for ensuring that the firmware will -only load signed bootloaders and kernels. Certain use cases may also -require that all kernel modules also be signed. Add a configuration option -that enforces this automatically when enabled. - -Signed-off-by: Matthew Garrett ---- - Documentation/x86/zero-page.txt | 2 ++ - arch/x86/Kconfig | 11 ++++++ - arch/x86/boot/compressed/eboot.c | 66 +++++++++++++++++++++++++++++++++++ - arch/x86/include/uapi/asm/bootparam.h | 3 +- - arch/x86/kernel/setup.c | 6 ++++ - include/linux/module.h | 6 ++++ - kernel/module.c | 7 ++++ - 7 files changed, 100 insertions(+), 1 deletion(-) - -diff --git a/Documentation/x86/zero-page.txt b/Documentation/x86/zero-page.txt -index 95a4d34af3fd..b8527c6b7646 100644 ---- a/Documentation/x86/zero-page.txt -+++ b/Documentation/x86/zero-page.txt -@@ -31,6 +31,8 @@ Offset Proto Name Meaning - 1E9/001 ALL eddbuf_entries Number of entries in eddbuf (below) - 1EA/001 ALL edd_mbr_sig_buf_entries Number of entries in edd_mbr_sig_buffer - (below) -+1EB/001 ALL kbd_status Numlock is enabled -+1EC/001 ALL secure_boot Secure boot is enabled in the firmware - 1EF/001 ALL sentinel Used to detect broken bootloaders - 290/040 ALL edd_mbr_sig_buffer EDD MBR signatures - 2D0/A00 ALL e820_map E820 memory map table -diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig -index bada636d1065..d666ef8b616c 100644 ---- a/arch/x86/Kconfig -+++ b/arch/x86/Kconfig -@@ -1786,6 +1786,17 @@ config EFI_MIXED - - If unsure, say N. - -+config EFI_SECURE_BOOT_SIG_ENFORCE -+ def_bool n -+ depends on EFI -+ prompt "Force module signing when UEFI Secure Boot is enabled" -+ ---help--- -+ UEFI Secure Boot provides a mechanism for ensuring that the -+ firmware will only load signed bootloaders and kernels. Certain -+ use cases may also require that all kernel modules also be signed. -+ Say Y here to automatically enable module signature enforcement -+ when a system boots with UEFI Secure Boot enabled. -+ - config SECCOMP - def_bool y - prompt "Enable seccomp to safely compute untrusted bytecode" -diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c -index cc69e37548db..ebc85c1eefd6 100644 ---- a/arch/x86/boot/compressed/eboot.c -+++ b/arch/x86/boot/compressed/eboot.c -@@ -12,6 +12,7 @@ - #include - #include - #include -+#include - - #include "../string.h" - #include "eboot.h" -@@ -537,6 +538,67 @@ static void setup_efi_pci(struct boot_params *params) - efi_call_early(free_pool, pci_handle); - } - -+static int get_secure_boot(void) -+{ -+ u8 sb, setup; -+ unsigned long datasize = sizeof(sb); -+ efi_guid_t var_guid = EFI_GLOBAL_VARIABLE_GUID; -+ efi_status_t status; -+ -+ status = efi_early->call((unsigned long)sys_table->runtime->get_variable, -+ L"SecureBoot", &var_guid, NULL, &datasize, &sb); -+ -+ if (status != EFI_SUCCESS) -+ return 0; -+ -+ if (sb == 0) -+ return 0; -+ -+ -+ status = efi_early->call((unsigned long)sys_table->runtime->get_variable, -+ L"SetupMode", &var_guid, NULL, &datasize, -+ &setup); -+ -+ if (status != EFI_SUCCESS) -+ return 0; -+ -+ if (setup == 1) -+ return 0; -+ -+ return 1; -+} -+ -+ -+/* -+ * See if we have Graphics Output Protocol -+ */ -+static efi_status_t setup_gop(struct screen_info *si, efi_guid_t *proto, -+ unsigned long size) -+{ -+ efi_status_t status; -+ void **gop_handle = NULL; -+ -+ status = efi_call_early(allocate_pool, EFI_LOADER_DATA, -+ size, (void **)&gop_handle); -+ if (status != EFI_SUCCESS) -+ return status; -+ -+ status = efi_call_early(locate_handle, -+ EFI_LOCATE_BY_PROTOCOL, -+ proto, NULL, &size, gop_handle); -+ if (status != EFI_SUCCESS) -+ goto free_handle; -+ -+ if (efi_early->is64) -+ status = setup_gop64(si, proto, size, gop_handle); -+ else -+ status = setup_gop32(si, proto, size, gop_handle); -+ -+free_handle: -+ efi_call_early(free_pool, gop_handle); -+ return status; -+} -+ - static efi_status_t - setup_uga32(void **uga_handle, unsigned long size, u32 *width, u32 *height) - { -@@ -1094,6 +1156,10 @@ struct boot_params *efi_main(struct efi_config *c, - else - setup_boot_services32(efi_early); - -+ sanitize_boot_params(boot_params); -+ -+ boot_params->secure_boot = get_secure_boot(); -+ - setup_graphics(boot_params); - - setup_efi_pci(boot_params); -diff --git a/arch/x86/include/uapi/asm/bootparam.h b/arch/x86/include/uapi/asm/bootparam.h -index c18ce67495fa..2b3e5427097b 100644 ---- a/arch/x86/include/uapi/asm/bootparam.h -+++ b/arch/x86/include/uapi/asm/bootparam.h -@@ -134,7 +134,8 @@ struct boot_params { - __u8 eddbuf_entries; /* 0x1e9 */ - __u8 edd_mbr_sig_buf_entries; /* 0x1ea */ - __u8 kbd_status; /* 0x1eb */ -- __u8 _pad5[3]; /* 0x1ec */ -+ __u8 secure_boot; /* 0x1ec */ -+ __u8 _pad5[2]; /* 0x1ed */ - /* - * The sentinel is set to a nonzero value (0xff) in header.S. - * -diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c -index bbfbca5fea0c..d40e961753c9 100644 ---- a/arch/x86/kernel/setup.c -+++ b/arch/x86/kernel/setup.c -@@ -1160,6 +1160,12 @@ void __init setup_arch(char **cmdline_p) - - io_delay_init(); - -+#ifdef CONFIG_EFI_SECURE_BOOT_SIG_ENFORCE -+ if (boot_params.secure_boot) { -+ enforce_signed_modules(); -+ } -+#endif -+ - /* - * Parse the ACPI tables for possible boot-time SMP configuration. - */ -diff --git a/include/linux/module.h b/include/linux/module.h -index 05bd6c989a0c..32327704e18d 100644 ---- a/include/linux/module.h -+++ b/include/linux/module.h -@@ -260,6 +260,12 @@ extern const typeof(name) __mod_##type##__##name##_device_table \ - - struct notifier_block; - -+#ifdef CONFIG_MODULE_SIG -+extern void enforce_signed_modules(void); -+#else -+static inline void enforce_signed_modules(void) {}; -+#endif -+ - #ifdef CONFIG_MODULES - - extern int modules_disabled; /* for sysctl */ -diff --git a/kernel/module.c b/kernel/module.c -index cb864505d020..cb1f1da69bf4 100644 ---- a/kernel/module.c -+++ b/kernel/module.c -@@ -4285,6 +4285,13 @@ void module_layout(struct module *mod, - EXPORT_SYMBOL(module_layout); - #endif - -+#ifdef CONFIG_MODULE_SIG -+void enforce_signed_modules(void) -+{ -+ sig_enforce = true; -+} -+#endif -+ - bool secure_modules(void) - { - #ifdef CONFIG_MODULE_SIG --- -2.9.3 - diff --git a/AllWinner-h3.patch b/AllWinner-h3.patch new file mode 100644 index 000000000..c75da8aa8 --- /dev/null +++ b/AllWinner-h3.patch @@ -0,0 +1,1080 @@ +From patchwork Mon Mar 6 17:17:45 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v8, 1/6] ARM: dts: sun8i: h3: drop skeleton.dtsi inclusion in H3 DTSI +From: Icenowy Zheng +X-Patchwork-Id: 9607205 +Message-Id: <20170306171750.7491-2-icenowy@aosc.xyz> +To: Rob Herring , + Maxime Ripard , + Chen-Yu Tsai +Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, + linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Icenowy Zheng +Date: Tue, 7 Mar 2017 01:17:45 +0800 + +The skeleton.dtsi file is now deprecated, and do not exist in ARM64 +environment. + +Since we will soon reuse most part of H3 DTSI for H5, which is an ARM64 +chip, drop skeleton.dtsi inclusion now. + +Signed-off-by: Icenowy Zheng +--- +Changes in v8: +- Add h3: in commit message. + + arch/arm/boot/dts/sun8i-h3.dtsi | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi +index 27780b97c863..9a3435527fde 100644 +--- a/arch/arm/boot/dts/sun8i-h3.dtsi ++++ b/arch/arm/boot/dts/sun8i-h3.dtsi +@@ -40,8 +40,6 @@ + * OTHER DEALINGS IN THE SOFTWARE. + */ + +-#include "skeleton.dtsi" +- + #include + #include + #include +From patchwork Mon Mar 6 17:17:46 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v8, + 2/6] ARM: dts: sun8i: h3: drop pinctrl-a10.h inclusion for H3 DTSI +From: Icenowy Zheng +X-Patchwork-Id: 9607207 +Message-Id: <20170306171750.7491-3-icenowy@aosc.xyz> +To: Rob Herring , + Maxime Ripard , + Chen-Yu Tsai +Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, + linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Icenowy Zheng +Date: Tue, 7 Mar 2017 01:17:46 +0800 + +After converting to generic pinconf binding, pinctrl-a10.h is now not +used at all. + +Drop its inclusion for H3 DTSI. + +Signed-off-by: Icenowy Zheng +--- +Changes in v8: +- Add h3: in commit message. + + arch/arm/boot/dts/sun8i-h3.dtsi | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi +index 9a3435527fde..b250e6d03b57 100644 +--- a/arch/arm/boot/dts/sun8i-h3.dtsi ++++ b/arch/arm/boot/dts/sun8i-h3.dtsi +@@ -42,7 +42,6 @@ + + #include + #include +-#include + #include + + / { +From patchwork Mon Mar 6 17:17:47 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v8, + 3/6] ARM: dts: sun8i: h3: correct the GIC compatible in H3 to gic-400 +From: Icenowy Zheng +X-Patchwork-Id: 9607209 +Message-Id: <20170306171750.7491-4-icenowy@aosc.xyz> +To: Rob Herring , + Maxime Ripard , + Chen-Yu Tsai +Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, + linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Icenowy Zheng +Date: Tue, 7 Mar 2017 01:17:47 +0800 + +According to the datasheets provided by Allwinner, both Allwinner H3 and +H5 use GIC-400 as their interrupt controller. + +For better device tree reusing, correct the GIC compatible in H3 DTSI to +"arm,gic-400", thus this node can be reused in H5. + +Signed-off-by: Icenowy Zheng +--- +Changes in v8: +- Add h3: in commit message. + + arch/arm/boot/dts/sun8i-h3.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi +index b250e6d03b57..c13fbfb92592 100644 +--- a/arch/arm/boot/dts/sun8i-h3.dtsi ++++ b/arch/arm/boot/dts/sun8i-h3.dtsi +@@ -586,7 +586,7 @@ + }; + + gic: interrupt-controller@01c81000 { +- compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; ++ compatible = "arm,gic-400"; + reg = <0x01c81000 0x1000>, + <0x01c82000 0x2000>, + <0x01c84000 0x2000>, +From patchwork Mon Mar 6 17:17:48 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v8,4/6] arm: dts: sun8i: h3: split Allwinner H3 .dtsi +From: Icenowy Zheng +X-Patchwork-Id: 9607211 +Message-Id: <20170306171750.7491-5-icenowy@aosc.xyz> +To: Rob Herring , + Maxime Ripard , + Chen-Yu Tsai +Cc: devicetree@vger.kernel.org, Andre Przywara , + linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, + Icenowy Zheng , linux-arm-kernel@lists.infradead.org +Date: Tue, 7 Mar 2017 01:17:48 +0800 + +From: Andre Przywara + +The new Allwinner H5 SoC is pin-compatible to the H3 SoC, but with the +Cortex-A7 cores replaced by Cortex-A53 cores and the MMC controller +updated. So we should really share almost the whole .dtsi. +In preparation for that move the peripheral parts of the existing +sun8i-h3.dtsi into a new sunxi-h3-h5.dtsi. +The actual sun8i-h3.dtsi then includes that and defines the H3 specific +parts on top of it. + +Signed-off-by: Andre Przywara +[Icenowy: also split out mmc and gic, as well as pio and ccu's + compatible, and make drop of skeleton into a seperated patch] +Signed-off-by: Icenowy Zheng +--- +Changes in v8: +- Add h3: in commit message. +Changes in v7: +- Extract GIC, skeleton.dtsi and pinctrl-a10.h changes to seperate patches. +Changes in v6: +- Extract GIC device node to sunxi-h3-h5.dtsi and correct its compatible + as "arm,gic-400". +Changes in v3: +- Use label-based syntax to reference nodes in H3 DTSI file. +Changes in v2: +- Rebase on current linux-next (because of the add of audio codec) + + arch/arm/boot/dts/sun8i-h3.dtsi | 771 ++++----------------- + .../boot/dts/{sun8i-h3.dtsi => sunxi-h3-h5.dtsi} | 73 +- + 2 files changed, 133 insertions(+), 711 deletions(-) + rewrite arch/arm/boot/dts/sun8i-h3.dtsi (83%) + copy arch/arm/boot/dts/{sun8i-h3.dtsi => sunxi-h3-h5.dtsi} (90%) + +diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi +dissimilarity index 83% +index c13fbfb92592..b36f9f423c39 100644 +--- a/arch/arm/boot/dts/sun8i-h3.dtsi ++++ b/arch/arm/boot/dts/sun8i-h3.dtsi +@@ -1,645 +1,126 @@ +-/* +- * Copyright (C) 2015 Jens Kuske +- * +- * This file is dual-licensed: you can use it either under the terms +- * of the GPL or the X11 license, at your option. Note that this dual +- * licensing only applies to this file, and not this project as a +- * whole. +- * +- * a) This file is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation; either version 2 of the +- * License, or (at your option) any later version. +- * +- * This file is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * Or, alternatively, +- * +- * b) Permission is hereby granted, free of charge, to any person +- * obtaining a copy of this software and associated documentation +- * files (the "Software"), to deal in the Software without +- * restriction, including without limitation the rights to use, +- * copy, modify, merge, publish, distribute, sublicense, and/or +- * sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following +- * conditions: +- * +- * The above copyright notice and this permission notice shall be +- * included in all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES +- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT +- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- */ +- +-#include +-#include +-#include +- +-/ { +- interrupt-parent = <&gic>; +- +- cpus { +- #address-cells = <1>; +- #size-cells = <0>; +- +- cpu@0 { +- compatible = "arm,cortex-a7"; +- device_type = "cpu"; +- reg = <0>; +- }; +- +- cpu@1 { +- compatible = "arm,cortex-a7"; +- device_type = "cpu"; +- reg = <1>; +- }; +- +- cpu@2 { +- compatible = "arm,cortex-a7"; +- device_type = "cpu"; +- reg = <2>; +- }; +- +- cpu@3 { +- compatible = "arm,cortex-a7"; +- device_type = "cpu"; +- reg = <3>; +- }; +- }; +- +- timer { +- compatible = "arm,armv7-timer"; +- interrupts = , +- , +- , +- ; +- }; +- +- clocks { +- #address-cells = <1>; +- #size-cells = <1>; +- ranges; +- +- osc24M: osc24M_clk { +- #clock-cells = <0>; +- compatible = "fixed-clock"; +- clock-frequency = <24000000>; +- clock-output-names = "osc24M"; +- }; +- +- osc32k: osc32k_clk { +- #clock-cells = <0>; +- compatible = "fixed-clock"; +- clock-frequency = <32768>; +- clock-output-names = "osc32k"; +- }; +- +- apb0: apb0_clk { +- compatible = "fixed-factor-clock"; +- #clock-cells = <0>; +- clock-div = <1>; +- clock-mult = <1>; +- clocks = <&osc24M>; +- clock-output-names = "apb0"; +- }; +- +- apb0_gates: clk@01f01428 { +- compatible = "allwinner,sun8i-h3-apb0-gates-clk", +- "allwinner,sun4i-a10-gates-clk"; +- reg = <0x01f01428 0x4>; +- #clock-cells = <1>; +- clocks = <&apb0>; +- clock-indices = <0>, <1>; +- clock-output-names = "apb0_pio", "apb0_ir"; +- }; +- +- ir_clk: ir_clk@01f01454 { +- compatible = "allwinner,sun4i-a10-mod0-clk"; +- reg = <0x01f01454 0x4>; +- #clock-cells = <0>; +- clocks = <&osc32k>, <&osc24M>; +- clock-output-names = "ir"; +- }; +- }; +- +- soc { +- compatible = "simple-bus"; +- #address-cells = <1>; +- #size-cells = <1>; +- ranges; +- +- dma: dma-controller@01c02000 { +- compatible = "allwinner,sun8i-h3-dma"; +- reg = <0x01c02000 0x1000>; +- interrupts = ; +- clocks = <&ccu CLK_BUS_DMA>; +- resets = <&ccu RST_BUS_DMA>; +- #dma-cells = <1>; +- }; +- +- mmc0: mmc@01c0f000 { +- compatible = "allwinner,sun7i-a20-mmc"; +- reg = <0x01c0f000 0x1000>; +- clocks = <&ccu CLK_BUS_MMC0>, +- <&ccu CLK_MMC0>, +- <&ccu CLK_MMC0_OUTPUT>, +- <&ccu CLK_MMC0_SAMPLE>; +- clock-names = "ahb", +- "mmc", +- "output", +- "sample"; +- resets = <&ccu RST_BUS_MMC0>; +- reset-names = "ahb"; +- interrupts = ; +- status = "disabled"; +- #address-cells = <1>; +- #size-cells = <0>; +- }; +- +- mmc1: mmc@01c10000 { +- compatible = "allwinner,sun7i-a20-mmc"; +- reg = <0x01c10000 0x1000>; +- clocks = <&ccu CLK_BUS_MMC1>, +- <&ccu CLK_MMC1>, +- <&ccu CLK_MMC1_OUTPUT>, +- <&ccu CLK_MMC1_SAMPLE>; +- clock-names = "ahb", +- "mmc", +- "output", +- "sample"; +- resets = <&ccu RST_BUS_MMC1>; +- reset-names = "ahb"; +- interrupts = ; +- status = "disabled"; +- #address-cells = <1>; +- #size-cells = <0>; +- }; +- +- mmc2: mmc@01c11000 { +- compatible = "allwinner,sun7i-a20-mmc"; +- reg = <0x01c11000 0x1000>; +- clocks = <&ccu CLK_BUS_MMC2>, +- <&ccu CLK_MMC2>, +- <&ccu CLK_MMC2_OUTPUT>, +- <&ccu CLK_MMC2_SAMPLE>; +- clock-names = "ahb", +- "mmc", +- "output", +- "sample"; +- resets = <&ccu RST_BUS_MMC2>; +- reset-names = "ahb"; +- interrupts = ; +- status = "disabled"; +- #address-cells = <1>; +- #size-cells = <0>; +- }; +- +- usbphy: phy@01c19400 { +- compatible = "allwinner,sun8i-h3-usb-phy"; +- reg = <0x01c19400 0x2c>, +- <0x01c1a800 0x4>, +- <0x01c1b800 0x4>, +- <0x01c1c800 0x4>, +- <0x01c1d800 0x4>; +- reg-names = "phy_ctrl", +- "pmu0", +- "pmu1", +- "pmu2", +- "pmu3"; +- clocks = <&ccu CLK_USB_PHY0>, +- <&ccu CLK_USB_PHY1>, +- <&ccu CLK_USB_PHY2>, +- <&ccu CLK_USB_PHY3>; +- clock-names = "usb0_phy", +- "usb1_phy", +- "usb2_phy", +- "usb3_phy"; +- resets = <&ccu RST_USB_PHY0>, +- <&ccu RST_USB_PHY1>, +- <&ccu RST_USB_PHY2>, +- <&ccu RST_USB_PHY3>; +- reset-names = "usb0_reset", +- "usb1_reset", +- "usb2_reset", +- "usb3_reset"; +- status = "disabled"; +- #phy-cells = <1>; +- }; +- +- ehci1: usb@01c1b000 { +- compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; +- reg = <0x01c1b000 0x100>; +- interrupts = ; +- clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>; +- resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; +- phys = <&usbphy 1>; +- phy-names = "usb"; +- status = "disabled"; +- }; +- +- ohci1: usb@01c1b400 { +- compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; +- reg = <0x01c1b400 0x100>; +- interrupts = ; +- clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>, +- <&ccu CLK_USB_OHCI1>; +- resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; +- phys = <&usbphy 1>; +- phy-names = "usb"; +- status = "disabled"; +- }; +- +- ehci2: usb@01c1c000 { +- compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; +- reg = <0x01c1c000 0x100>; +- interrupts = ; +- clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>; +- resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; +- phys = <&usbphy 2>; +- phy-names = "usb"; +- status = "disabled"; +- }; +- +- ohci2: usb@01c1c400 { +- compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; +- reg = <0x01c1c400 0x100>; +- interrupts = ; +- clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>, +- <&ccu CLK_USB_OHCI2>; +- resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; +- phys = <&usbphy 2>; +- phy-names = "usb"; +- status = "disabled"; +- }; +- +- ehci3: usb@01c1d000 { +- compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; +- reg = <0x01c1d000 0x100>; +- interrupts = ; +- clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>; +- resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; +- phys = <&usbphy 3>; +- phy-names = "usb"; +- status = "disabled"; +- }; +- +- ohci3: usb@01c1d400 { +- compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; +- reg = <0x01c1d400 0x100>; +- interrupts = ; +- clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>, +- <&ccu CLK_USB_OHCI3>; +- resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; +- phys = <&usbphy 3>; +- phy-names = "usb"; +- status = "disabled"; +- }; +- +- ccu: clock@01c20000 { +- compatible = "allwinner,sun8i-h3-ccu"; +- reg = <0x01c20000 0x400>; +- clocks = <&osc24M>, <&osc32k>; +- clock-names = "hosc", "losc"; +- #clock-cells = <1>; +- #reset-cells = <1>; +- }; +- +- pio: pinctrl@01c20800 { +- compatible = "allwinner,sun8i-h3-pinctrl"; +- reg = <0x01c20800 0x400>; +- interrupts = , +- ; +- clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>; +- clock-names = "apb", "hosc", "losc"; +- gpio-controller; +- #gpio-cells = <3>; +- interrupt-controller; +- #interrupt-cells = <3>; +- +- i2c0_pins: i2c0 { +- pins = "PA11", "PA12"; +- function = "i2c0"; +- }; +- +- i2c1_pins: i2c1 { +- pins = "PA18", "PA19"; +- function = "i2c1"; +- }; +- +- i2c2_pins: i2c2 { +- pins = "PE12", "PE13"; +- function = "i2c2"; +- }; +- +- mmc0_pins_a: mmc0@0 { +- pins = "PF0", "PF1", "PF2", "PF3", +- "PF4", "PF5"; +- function = "mmc0"; +- drive-strength = <30>; +- bias-pull-up; +- }; +- +- mmc0_cd_pin: mmc0_cd_pin@0 { +- pins = "PF6"; +- function = "gpio_in"; +- bias-pull-up; +- }; +- +- mmc1_pins_a: mmc1@0 { +- pins = "PG0", "PG1", "PG2", "PG3", +- "PG4", "PG5"; +- function = "mmc1"; +- drive-strength = <30>; +- bias-pull-up; +- }; +- +- mmc2_8bit_pins: mmc2_8bit { +- pins = "PC5", "PC6", "PC8", +- "PC9", "PC10", "PC11", +- "PC12", "PC13", "PC14", +- "PC15", "PC16"; +- function = "mmc2"; +- drive-strength = <30>; +- bias-pull-up; +- }; +- +- spdif_tx_pins_a: spdif@0 { +- pins = "PA17"; +- function = "spdif"; +- }; +- +- spi0_pins: spi0 { +- pins = "PC0", "PC1", "PC2", "PC3"; +- function = "spi0"; +- }; +- +- spi1_pins: spi1 { +- pins = "PA15", "PA16", "PA14", "PA13"; +- function = "spi1"; +- }; +- +- uart0_pins_a: uart0@0 { +- pins = "PA4", "PA5"; +- function = "uart0"; +- }; +- +- uart1_pins: uart1 { +- pins = "PG6", "PG7"; +- function = "uart1"; +- }; +- +- uart1_rts_cts_pins: uart1_rts_cts { +- pins = "PG8", "PG9"; +- function = "uart1"; +- }; +- +- uart2_pins: uart2 { +- pins = "PA0", "PA1"; +- function = "uart2"; +- }; +- +- uart3_pins: uart3 { +- pins = "PA13", "PA14"; +- function = "uart3"; +- }; +- }; +- +- timer@01c20c00 { +- compatible = "allwinner,sun4i-a10-timer"; +- reg = <0x01c20c00 0xa0>; +- interrupts = , +- ; +- clocks = <&osc24M>; +- }; +- +- spi0: spi@01c68000 { +- compatible = "allwinner,sun8i-h3-spi"; +- reg = <0x01c68000 0x1000>; +- interrupts = ; +- clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; +- clock-names = "ahb", "mod"; +- dmas = <&dma 23>, <&dma 23>; +- dma-names = "rx", "tx"; +- pinctrl-names = "default"; +- pinctrl-0 = <&spi0_pins>; +- resets = <&ccu RST_BUS_SPI0>; +- status = "disabled"; +- #address-cells = <1>; +- #size-cells = <0>; +- }; +- +- spi1: spi@01c69000 { +- compatible = "allwinner,sun8i-h3-spi"; +- reg = <0x01c69000 0x1000>; +- interrupts = ; +- clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; +- clock-names = "ahb", "mod"; +- dmas = <&dma 24>, <&dma 24>; +- dma-names = "rx", "tx"; +- pinctrl-names = "default"; +- pinctrl-0 = <&spi1_pins>; +- resets = <&ccu RST_BUS_SPI1>; +- status = "disabled"; +- #address-cells = <1>; +- #size-cells = <0>; +- }; +- +- wdt0: watchdog@01c20ca0 { +- compatible = "allwinner,sun6i-a31-wdt"; +- reg = <0x01c20ca0 0x20>; +- interrupts = ; +- }; +- +- spdif: spdif@01c21000 { +- #sound-dai-cells = <0>; +- compatible = "allwinner,sun8i-h3-spdif"; +- reg = <0x01c21000 0x400>; +- interrupts = ; +- clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>; +- resets = <&ccu RST_BUS_SPDIF>; +- clock-names = "apb", "spdif"; +- dmas = <&dma 2>; +- dma-names = "tx"; +- status = "disabled"; +- }; +- +- pwm: pwm@01c21400 { +- compatible = "allwinner,sun8i-h3-pwm"; +- reg = <0x01c21400 0x8>; +- clocks = <&osc24M>; +- #pwm-cells = <3>; +- status = "disabled"; +- }; +- +- codec: codec@01c22c00 { +- #sound-dai-cells = <0>; +- compatible = "allwinner,sun8i-h3-codec"; +- reg = <0x01c22c00 0x400>; +- interrupts = ; +- clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; +- clock-names = "apb", "codec"; +- resets = <&ccu RST_BUS_CODEC>; +- dmas = <&dma 15>, <&dma 15>; +- dma-names = "rx", "tx"; +- allwinner,codec-analog-controls = <&codec_analog>; +- status = "disabled"; +- }; +- +- uart0: serial@01c28000 { +- compatible = "snps,dw-apb-uart"; +- reg = <0x01c28000 0x400>; +- interrupts = ; +- reg-shift = <2>; +- reg-io-width = <4>; +- clocks = <&ccu CLK_BUS_UART0>; +- resets = <&ccu RST_BUS_UART0>; +- dmas = <&dma 6>, <&dma 6>; +- dma-names = "rx", "tx"; +- status = "disabled"; +- }; +- +- uart1: serial@01c28400 { +- compatible = "snps,dw-apb-uart"; +- reg = <0x01c28400 0x400>; +- interrupts = ; +- reg-shift = <2>; +- reg-io-width = <4>; +- clocks = <&ccu CLK_BUS_UART1>; +- resets = <&ccu RST_BUS_UART1>; +- dmas = <&dma 7>, <&dma 7>; +- dma-names = "rx", "tx"; +- status = "disabled"; +- }; +- +- uart2: serial@01c28800 { +- compatible = "snps,dw-apb-uart"; +- reg = <0x01c28800 0x400>; +- interrupts = ; +- reg-shift = <2>; +- reg-io-width = <4>; +- clocks = <&ccu CLK_BUS_UART2>; +- resets = <&ccu RST_BUS_UART2>; +- dmas = <&dma 8>, <&dma 8>; +- dma-names = "rx", "tx"; +- status = "disabled"; +- }; +- +- uart3: serial@01c28c00 { +- compatible = "snps,dw-apb-uart"; +- reg = <0x01c28c00 0x400>; +- interrupts = ; +- reg-shift = <2>; +- reg-io-width = <4>; +- clocks = <&ccu CLK_BUS_UART3>; +- resets = <&ccu RST_BUS_UART3>; +- dmas = <&dma 9>, <&dma 9>; +- dma-names = "rx", "tx"; +- status = "disabled"; +- }; +- +- i2c0: i2c@01c2ac00 { +- compatible = "allwinner,sun6i-a31-i2c"; +- reg = <0x01c2ac00 0x400>; +- interrupts = ; +- clocks = <&ccu CLK_BUS_I2C0>; +- resets = <&ccu RST_BUS_I2C0>; +- pinctrl-names = "default"; +- pinctrl-0 = <&i2c0_pins>; +- status = "disabled"; +- #address-cells = <1>; +- #size-cells = <0>; +- }; +- +- i2c1: i2c@01c2b000 { +- compatible = "allwinner,sun6i-a31-i2c"; +- reg = <0x01c2b000 0x400>; +- interrupts = ; +- clocks = <&ccu CLK_BUS_I2C1>; +- resets = <&ccu RST_BUS_I2C1>; +- pinctrl-names = "default"; +- pinctrl-0 = <&i2c1_pins>; +- status = "disabled"; +- #address-cells = <1>; +- #size-cells = <0>; +- }; +- +- i2c2: i2c@01c2b400 { +- compatible = "allwinner,sun6i-a31-i2c"; +- reg = <0x01c2b000 0x400>; +- interrupts = ; +- clocks = <&ccu CLK_BUS_I2C2>; +- resets = <&ccu RST_BUS_I2C2>; +- pinctrl-names = "default"; +- pinctrl-0 = <&i2c2_pins>; +- status = "disabled"; +- #address-cells = <1>; +- #size-cells = <0>; +- }; +- +- gic: interrupt-controller@01c81000 { +- compatible = "arm,gic-400"; +- reg = <0x01c81000 0x1000>, +- <0x01c82000 0x2000>, +- <0x01c84000 0x2000>, +- <0x01c86000 0x2000>; +- interrupt-controller; +- #interrupt-cells = <3>; +- interrupts = ; +- }; +- +- rtc: rtc@01f00000 { +- compatible = "allwinner,sun6i-a31-rtc"; +- reg = <0x01f00000 0x54>; +- interrupts = , +- ; +- }; +- +- apb0_reset: reset@01f014b0 { +- reg = <0x01f014b0 0x4>; +- compatible = "allwinner,sun6i-a31-clock-reset"; +- #reset-cells = <1>; +- }; +- +- codec_analog: codec-analog@01f015c0 { +- compatible = "allwinner,sun8i-h3-codec-analog"; +- reg = <0x01f015c0 0x4>; +- }; +- +- ir: ir@01f02000 { +- compatible = "allwinner,sun5i-a13-ir"; +- clocks = <&apb0_gates 1>, <&ir_clk>; +- clock-names = "apb", "ir"; +- resets = <&apb0_reset 1>; +- interrupts = ; +- reg = <0x01f02000 0x40>; +- status = "disabled"; +- }; +- +- r_pio: pinctrl@01f02c00 { +- compatible = "allwinner,sun8i-h3-r-pinctrl"; +- reg = <0x01f02c00 0x400>; +- interrupts = ; +- clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>; +- clock-names = "apb", "hosc", "losc"; +- resets = <&apb0_reset 0>; +- gpio-controller; +- #gpio-cells = <3>; +- interrupt-controller; +- #interrupt-cells = <3>; +- +- ir_pins_a: ir@0 { +- pins = "PL11"; +- function = "s_cir_rx"; +- }; +- }; +- }; +-}; ++/* ++ * Copyright (C) 2015 Jens Kuske ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++#include "sunxi-h3-h5.dtsi" ++ ++/ { ++ cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ cpu@0 { ++ compatible = "arm,cortex-a7"; ++ device_type = "cpu"; ++ reg = <0>; ++ }; ++ ++ cpu@1 { ++ compatible = "arm,cortex-a7"; ++ device_type = "cpu"; ++ reg = <1>; ++ }; ++ ++ cpu@2 { ++ compatible = "arm,cortex-a7"; ++ device_type = "cpu"; ++ reg = <2>; ++ }; ++ ++ cpu@3 { ++ compatible = "arm,cortex-a7"; ++ device_type = "cpu"; ++ reg = <3>; ++ }; ++ }; ++ ++ timer { ++ compatible = "arm,armv7-timer"; ++ interrupts = , ++ , ++ , ++ ; ++ }; ++}; ++ ++&ccu { ++ compatible = "allwinner,sun8i-h3-ccu"; ++}; ++ ++&mmc0 { ++ compatible = "allwinner,sun7i-a20-mmc"; ++ clocks = <&ccu CLK_BUS_MMC0>, ++ <&ccu CLK_MMC0>, ++ <&ccu CLK_MMC0_OUTPUT>, ++ <&ccu CLK_MMC0_SAMPLE>; ++ clock-names = "ahb", ++ "mmc", ++ "output", ++ "sample"; ++}; ++ ++&mmc1 { ++ compatible = "allwinner,sun7i-a20-mmc"; ++ clocks = <&ccu CLK_BUS_MMC1>, ++ <&ccu CLK_MMC1>, ++ <&ccu CLK_MMC1_OUTPUT>, ++ <&ccu CLK_MMC1_SAMPLE>; ++ clock-names = "ahb", ++ "mmc", ++ "output", ++ "sample"; ++}; ++ ++&mmc2 { ++ compatible = "allwinner,sun7i-a20-mmc"; ++ clocks = <&ccu CLK_BUS_MMC2>, ++ <&ccu CLK_MMC2>, ++ <&ccu CLK_MMC2_OUTPUT>, ++ <&ccu CLK_MMC2_SAMPLE>; ++ clock-names = "ahb", ++ "mmc", ++ "output", ++ "sample"; ++}; ++ ++&pio { ++ compatible = "allwinner,sun8i-h3-pinctrl"; ++}; +diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +similarity index 90% +copy from arch/arm/boot/dts/sun8i-h3.dtsi +copy to arch/arm/boot/dts/sunxi-h3-h5.dtsi +index c13fbfb92592..2494ea063cd4 100644 +--- a/arch/arm/boot/dts/sun8i-h3.dtsi ++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +@@ -46,43 +46,8 @@ + + / { + interrupt-parent = <&gic>; +- +- cpus { +- #address-cells = <1>; +- #size-cells = <0>; +- +- cpu@0 { +- compatible = "arm,cortex-a7"; +- device_type = "cpu"; +- reg = <0>; +- }; +- +- cpu@1 { +- compatible = "arm,cortex-a7"; +- device_type = "cpu"; +- reg = <1>; +- }; +- +- cpu@2 { +- compatible = "arm,cortex-a7"; +- device_type = "cpu"; +- reg = <2>; +- }; +- +- cpu@3 { +- compatible = "arm,cortex-a7"; +- device_type = "cpu"; +- reg = <3>; +- }; +- }; +- +- timer { +- compatible = "arm,armv7-timer"; +- interrupts = , +- , +- , +- ; +- }; ++ #address-cells = <1>; ++ #size-cells = <1>; + + clocks { + #address-cells = <1>; +@@ -147,16 +112,8 @@ + }; + + mmc0: mmc@01c0f000 { +- compatible = "allwinner,sun7i-a20-mmc"; ++ /* compatible and clocks are in per SoC .dtsi file */ + reg = <0x01c0f000 0x1000>; +- clocks = <&ccu CLK_BUS_MMC0>, +- <&ccu CLK_MMC0>, +- <&ccu CLK_MMC0_OUTPUT>, +- <&ccu CLK_MMC0_SAMPLE>; +- clock-names = "ahb", +- "mmc", +- "output", +- "sample"; + resets = <&ccu RST_BUS_MMC0>; + reset-names = "ahb"; + interrupts = ; +@@ -166,16 +123,8 @@ + }; + + mmc1: mmc@01c10000 { +- compatible = "allwinner,sun7i-a20-mmc"; ++ /* compatible and clocks are in per SoC .dtsi file */ + reg = <0x01c10000 0x1000>; +- clocks = <&ccu CLK_BUS_MMC1>, +- <&ccu CLK_MMC1>, +- <&ccu CLK_MMC1_OUTPUT>, +- <&ccu CLK_MMC1_SAMPLE>; +- clock-names = "ahb", +- "mmc", +- "output", +- "sample"; + resets = <&ccu RST_BUS_MMC1>; + reset-names = "ahb"; + interrupts = ; +@@ -185,16 +134,8 @@ + }; + + mmc2: mmc@01c11000 { +- compatible = "allwinner,sun7i-a20-mmc"; ++ /* compatible and clocks are in per SoC .dtsi file */ + reg = <0x01c11000 0x1000>; +- clocks = <&ccu CLK_BUS_MMC2>, +- <&ccu CLK_MMC2>, +- <&ccu CLK_MMC2_OUTPUT>, +- <&ccu CLK_MMC2_SAMPLE>; +- clock-names = "ahb", +- "mmc", +- "output", +- "sample"; + resets = <&ccu RST_BUS_MMC2>; + reset-names = "ahb"; + interrupts = ; +@@ -305,7 +246,7 @@ + }; + + ccu: clock@01c20000 { +- compatible = "allwinner,sun8i-h3-ccu"; ++ /* compatible is in per SoC .dtsi file */ + reg = <0x01c20000 0x400>; + clocks = <&osc24M>, <&osc32k>; + clock-names = "hosc", "losc"; +@@ -314,7 +255,7 @@ + }; + + pio: pinctrl@01c20800 { +- compatible = "allwinner,sun8i-h3-pinctrl"; ++ /* compatible is in per SoC .dtsi file */ + reg = <0x01c20800 0x400>; + interrupts = , + ; diff --git a/AllWinner-net-emac.patch b/AllWinner-net-emac.patch index 42dadabab..ebe9a3c94 100644 --- a/AllWinner-net-emac.patch +++ b/AllWinner-net-emac.patch @@ -1,186 +1,396 @@ -From fb909e29d6c073f4c5777a0db75df72b726e4314 Mon Sep 17 00:00:00 2001 +From patchwork Tue Mar 14 14:18:37 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2, 01/20] net-next: stmmac: export + stmmac_set_mac_addr/stmmac_get_mac_addr From: Corentin LABBE -Date: Fri, 7 Oct 2016 10:25:48 +0200 -Subject: [PATCH 1/8] ethernet: add sun8i-emac driver +X-Patchwork-Id: 9623505 +Message-Id: <20170314141856.24560-2-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, + davem@davemloft.net +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, Corentin Labbe , + linux-arm-kernel@lists.infradead.org +Date: Tue, 14 Mar 2017 15:18:37 +0100 -This patch add support for sun8i-emac ethernet MAC hardware. -It could be found in Allwinner H3/A83T/A64 SoCs. - -It supports 10/100/1000 Mbit/s speed with half/full duplex. -It can use an internal PHY (MII 10/100) or an external PHY -via RGMII/RMII. +Thoses symbol will be needed for the dwmac-sun8i ethernet driver. +For letting it to be build as module, they need to be exported. Signed-off-by: Corentin Labbe --- - drivers/net/ethernet/allwinner/Kconfig | 13 + - drivers/net/ethernet/allwinner/Makefile | 1 + - drivers/net/ethernet/allwinner/sun8i-emac.c | 2266 +++++++++++++++++++++++++++ - 3 files changed, 2280 insertions(+) - create mode 100644 drivers/net/ethernet/allwinner/sun8i-emac.c + drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) -diff --git a/drivers/net/ethernet/allwinner/Kconfig b/drivers/net/ethernet/allwinner/Kconfig -index 47da7e7..060569c 100644 ---- a/drivers/net/ethernet/allwinner/Kconfig -+++ b/drivers/net/ethernet/allwinner/Kconfig -@@ -33,4 +33,17 @@ config SUN4I_EMAC - To compile this driver as a module, choose M here. The module - will be called sun4i-emac. +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c +index e60bfca..0ab985c8 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c +@@ -248,6 +248,7 @@ void stmmac_set_mac_addr(void __iomem *ioaddr, u8 addr[6], + data = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; + writel(data, ioaddr + low); + } ++EXPORT_SYMBOL_GPL(stmmac_set_mac_addr); -+config SUN8I_EMAC -+ tristate "Allwinner sun8i EMAC support" -+ depends on ARCH_SUNXI || COMPILE_TEST -+ depends on OF -+ select MII -+ select PHYLIB -+ ---help--- -+ This driver support the sun8i EMAC ethernet driver present on -+ H3/A83T/A64 Allwinner SoCs. -+ -+ To compile this driver as a module, choose M here. The module -+ will be called sun8i-emac. -+ - endif # NET_VENDOR_ALLWINNER -diff --git a/drivers/net/ethernet/allwinner/Makefile b/drivers/net/ethernet/allwinner/Makefile -index 03129f7..8bd1693c 100644 ---- a/drivers/net/ethernet/allwinner/Makefile -+++ b/drivers/net/ethernet/allwinner/Makefile -@@ -3,3 +3,4 @@ - # + /* Enable disable MAC RX/TX */ + void stmmac_set_mac(void __iomem *ioaddr, bool enable) +@@ -279,4 +280,4 @@ void stmmac_get_mac_addr(void __iomem *ioaddr, unsigned char *addr, + addr[4] = hi_addr & 0xff; + addr[5] = (hi_addr >> 8) & 0xff; + } +- ++EXPORT_SYMBOL_GPL(stmmac_get_mac_addr); +From patchwork Tue Mar 14 14:18:38 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2,02/20] net-next: stmmac: add optional setup function +From: Corentin LABBE +X-Patchwork-Id: 9623509 +Message-Id: <20170314141856.24560-3-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, + davem@davemloft.net +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, Corentin Labbe , + linux-arm-kernel@lists.infradead.org +Date: Tue, 14 Mar 2017 15:18:38 +0100 + +Instead of ading more ifthen logic for adding a new mac_device_info +setup function, it is easier to add a function pointer to the function +needed. + +Signed-off-by: Corentin Labbe +--- + drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 4 +++- + include/linux/stmmac.h | 3 +++ + 2 files changed, 6 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +index 4498a38..856ac57 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +@@ -3101,7 +3101,9 @@ static int stmmac_hw_init(struct stmmac_priv *priv) + struct mac_device_info *mac; - obj-$(CONFIG_SUN4I_EMAC) += sun4i-emac.o -+obj-$(CONFIG_SUN8I_EMAC) += sun8i-emac.o -diff --git a/drivers/net/ethernet/allwinner/sun8i-emac.c b/drivers/net/ethernet/allwinner/sun8i-emac.c + /* Identify the MAC HW device */ +- if (priv->plat->has_gmac) { ++ if (priv->plat->setup) { ++ mac = priv->plat->setup(priv); ++ } else if (priv->plat->has_gmac) { + priv->dev->priv_flags |= IFF_UNICAST_FLT; + mac = dwmac1000_setup(priv->ioaddr, + priv->plat->multicast_filter_bins, +diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h +index fc273e9..8f09f18 100644 +--- a/include/linux/stmmac.h ++++ b/include/linux/stmmac.h +@@ -109,6 +109,8 @@ struct stmmac_axi { + bool axi_rb; + }; + ++struct stmmac_priv; ++ + struct plat_stmmacenet_data { + int bus_id; + int phy_addr; +@@ -136,6 +138,7 @@ struct plat_stmmacenet_data { + void (*fix_mac_speed)(void *priv, unsigned int speed); + int (*init)(struct platform_device *pdev, void *priv); + void (*exit)(struct platform_device *pdev, void *priv); ++ struct mac_device_info *(*setup)(struct stmmac_priv *priv); + void *bsp_priv; + struct clk *stmmac_clk; + struct clk *pclk; +From patchwork Tue Mar 14 14:18:39 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2, + 03/20] ARM: sun8i: dt: Add DT bindings documentation for Allwinner + dwmac-sun8i +From: Corentin LABBE +X-Patchwork-Id: 9623517 +Message-Id: <20170314141856.24560-4-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, + davem@davemloft.net +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, Corentin Labbe , + linux-arm-kernel@lists.infradead.org +Date: Tue, 14 Mar 2017 15:18:39 +0100 + +This patch adds documentation for Device-Tree bindings for the +Allwinner dwmac-sun8i driver. + +Signed-off-by: Corentin Labbe +--- + .../devicetree/bindings/net/dwmac-sun8i.txt | 77 ++++++++++++++++++++++ + 1 file changed, 77 insertions(+) + create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt + +diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt new file mode 100644 -index 0000000..bc74467 +index 0000000..f01ef17 --- /dev/null -+++ b/drivers/net/ethernet/allwinner/sun8i-emac.c -@@ -0,0 +1,2266 @@ ++++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt +@@ -0,0 +1,77 @@ ++* Allwinner sun8i GMAC ethernet controller ++ ++This device is a platform glue layer for stmmac. ++Please see stmmac.txt for the other unchanged properties. ++ ++Required properties: ++- compatible: should be one of the following string: ++ "allwinner,sun8i-a83t-emac" ++ "allwinner,sun8i-h3-emac" ++ "allwinner,sun50i-a64-emac" ++- reg: address and length of the register for the device. ++- interrupts: interrupt for the device ++- interrupt-names: should be "macirq" ++- clocks: A phandle to the reference clock for this device ++- clock-names: should be "stmmaceth" ++- resets: A phandle to the reset control for this device ++- reset-names: should be "stmmaceth" ++- phy-mode: See ethernet.txt ++- phy-handle: See ethernet.txt ++- #address-cells: shall be 1 ++- #size-cells: shall be 0 ++- syscon: A phandle to the syscon of the SoC with one of the following ++ compatible string: ++ - allwinner,sun8i-h3-system-controller ++ - allwinner,sun8i-a64-system-controller ++ - allwinner,sun8i-a83t-system-controller ++ ++Optional properties: ++- allwinner,tx-delay: TX clock delay chain value. Range value is 0-0x07. Default is 0) ++- allwinner,rx-delay: RX clock delay chain value. Range value is 0-0x1F. Default is 0) ++Both delay properties are in 0.1ns step. ++ ++Optional properties for "allwinner,sun8i-h3-emac": ++- allwinner,leds-active-low: EPHY LEDs are active low ++ ++Required child node of emac: ++- mdio bus node: should be named mdio ++ ++Required properties of the mdio node: ++- #address-cells: shall be 1 ++- #size-cells: shall be 0 ++ ++The device node referenced by "phy" or "phy-handle" should be a child node ++of the mdio node. See phy.txt for the generic PHY bindings. ++ ++Required properties of the phy node with "allwinner,sun8i-h3-emac": ++- clocks: a phandle to the reference clock for the EPHY ++- resets: a phandle to the reset control for the EPHY ++ ++Example: ++ ++emac: ethernet@1c0b000 { ++ compatible = "allwinner,sun8i-h3-emac"; ++ syscon = <&syscon>; ++ reg = <0x01c0b000 0x104>; ++ interrupts = ; ++ interrupt-names = "macirq"; ++ resets = <&ccu RST_BUS_EMAC>; ++ reset-names = "stmmaceth"; ++ clocks = <&ccu CLK_BUS_EMAC>; ++ clock-names = "stmmaceth"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ phy = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ mdio: mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ int_mii_phy: ethernet-phy@1 { ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; ++ }; ++ }; ++}; +From patchwork Tue Mar 14 14:18:40 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2, + 04/20] ARM: sun8i: dt: Add DT bindings documentation for Allwinner + syscon +From: Corentin LABBE +X-Patchwork-Id: 9623533 +Message-Id: <20170314141856.24560-5-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, + davem@davemloft.net +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, Corentin Labbe , + linux-arm-kernel@lists.infradead.org +Date: Tue, 14 Mar 2017 15:18:40 +0100 + +Signed-off-by: Corentin Labbe +--- + .../devicetree/bindings/misc/allwinner,syscon.txt | 19 +++++++++++++++++++ + 1 file changed, 19 insertions(+) + create mode 100644 Documentation/devicetree/bindings/misc/allwinner,syscon.txt + +diff --git a/Documentation/devicetree/bindings/misc/allwinner,syscon.txt b/Documentation/devicetree/bindings/misc/allwinner,syscon.txt +new file mode 100644 +index 0000000..9f5f1f5 +--- /dev/null ++++ b/Documentation/devicetree/bindings/misc/allwinner,syscon.txt +@@ -0,0 +1,19 @@ ++* Allwinner sun8i system controller ++ ++This file describes the bindings for the system controller present in ++Allwinner SoC H3, A83T and A64. ++The principal function of this syscon is to control EMAC PHY choice and ++config. ++ ++Required properties for the system controller: ++- reg: address and length of the register for the device. ++- compatible: should be "syscon" and one of the following string: ++ "allwinner,sun8i-h3-system-controller" ++ "allwinner,sun8i-a64-system-controller" ++ "allwinner,sun8i-a83t-system-controller" ++ ++Example: ++syscon: syscon@01c00000 { ++ compatible = "syscon", "allwinner,sun8i-h3-system-controller"; ++ reg = <0x01c00000 0x1000>; ++}; +From patchwork Tue Mar 14 14:18:41 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2,05/20] net-next: stmmac: Add dwmac-sun8i +From: Corentin LABBE +X-Patchwork-Id: 9623523 +Message-Id: <20170314141856.24560-6-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, + davem@davemloft.net +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, Corentin Labbe , + linux-arm-kernel@lists.infradead.org +Date: Tue, 14 Mar 2017 15:18:41 +0100 + +The dwmac-sun8i is a heavy hacked version of stmmac hardware by +allwinner. +In fact the only common part is the descriptor management and the first +register function. + +Signed-off-by: Corentin Labbe +--- + drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 + + drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 938 +++++++++++++++++++++ + drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 27 +- + .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 9 +- + include/linux/stmmac.h | 1 + + 6 files changed, 984 insertions(+), 3 deletions(-) + create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c + +diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig +index cfbe363..85c0e41 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig ++++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig +@@ -145,6 +145,17 @@ config DWMAC_SUNXI + This selects Allwinner SoC glue layer support for the + stmmac device driver. This driver is used for A20/A31 + GMAC ethernet controller. ++ ++config DWMAC_SUN8I ++ tristate "Allwinner sun8i GMAC support" ++ default ARCH_SUNXI ++ depends on OF && (ARCH_SUNXI || COMPILE_TEST) ++ ---help--- ++ Support for Allwinner H3 A83T A64 EMAC ethernet controllers. ++ ++ This selects Allwinner SoC glue layer support for the ++ stmmac device driver. This driver is used for H3/A83T/A64 ++ EMAC ethernet controller. + endif + + config STMMAC_PCI +diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile +index 700c603..fd4937a 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/Makefile ++++ b/drivers/net/ethernet/stmicro/stmmac/Makefile +@@ -16,6 +16,7 @@ obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o + obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o + obj-$(CONFIG_DWMAC_STM32) += dwmac-stm32.o + obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o ++obj-$(CONFIG_DWMAC_SUN8I) += dwmac-sun8i.o + obj-$(CONFIG_DWMAC_DWC_QOS_ETH) += dwmac-dwc-qos-eth.o + obj-$(CONFIG_DWMAC_GENERIC) += dwmac-generic.o + stmmac-platform-objs:= stmmac_platform.o +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +new file mode 100644 +index 0000000..52ab67c +--- /dev/null ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +@@ -0,0 +1,938 @@ +/* -+ * sun8i-emac driver ++ * dwmac-sun8i.c - Allwinner sun8i DWMAC specific glue layer + * -+ * Copyright (C) 2015-2016 Corentin LABBE ++ * Copyright (C) 2017 Corentin Labbe + * -+ * This is the driver for Allwinner Ethernet MAC found in H3/A83T/A64 SoC ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. + * -+ * TODO: -+ * - MAC filtering -+ * - Jumbo frame -+ * - features rx-all (NETIF_F_RXALL_BIT) -+ * - PM runtime ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. + */ -+#include ++ +#include -+#include -+#include -+#include ++#include +#include -+#include ++#include +#include -+#include +#include +#include +#include +#include -+#include -+#include +#include -+#include -+#include -+#include -+#include ++#include +#include ++#include + -+#define EMAC_BASIC_CTL0 0x00 -+#define EMAC_BASIC_CTL1 0x04 -+#define EMAC_INT_STA 0x08 -+#define EMAC_INT_EN 0x0C -+#define EMAC_TX_CTL0 0x10 -+#define EMAC_TX_CTL1 0x14 -+#define EMAC_TX_FLOW_CTL 0x1C -+#define EMAC_RX_CTL0 0x24 -+#define EMAC_RX_CTL1 0x28 -+#define EMAC_RX_FRM_FLT 0x38 -+#define EMAC_MDIO_CMD 0x48 -+#define EMAC_MDIO_DATA 0x4C -+#define EMAC_TX_DMA_STA 0xB0 -+#define EMAC_TX_CUR_DESC 0xB4 -+#define EMAC_TX_CUR_BUF 0xB8 -+#define EMAC_RX_DMA_STA 0xC0 ++#include "stmmac.h" ++#include "stmmac_platform.h" + -+#define MDIO_CMD_MII_BUSY BIT(0) -+#define MDIO_CMD_MII_WRITE BIT(1) -+#define MDIO_CMD_MII_PHY_REG_ADDR_MASK GENMASK(8, 4) -+#define MDIO_CMD_MII_PHY_REG_ADDR_SHIFT 4 -+#define MDIO_CMD_MII_PHY_ADDR_MASK GENMASK(16, 12) -+#define MDIO_CMD_MII_PHY_ADDR_SHIFT 12 ++/* General notes on dwmac-sun8i: ++ * Locking: no locking is necessary in this file because all necessary locking ++ * is done in the "stmmac files" ++ */ + -+#define EMAC_MACADDR_HI 0x50 -+#define EMAC_MACADDR_LO 0x54 -+ -+#define EMAC_RX_DESC_LIST 0x34 -+#define EMAC_TX_DESC_LIST 0x20 -+ -+#define EMAC_RX_DO_CRC BIT(27) -+#define EMAC_RX_STRIP_FCS BIT(28) -+ -+#define LE32_BIT(x) (cpu_to_le32(BIT(x))) -+ -+#define EMAC_COULD_BE_USED_BY_DMA LE32_BIT(31) -+ -+/* Used in RX_CTL1*/ -+#define EMAC_RX_DMA_EN BIT(30) -+#define EMAC_RX_DMA_START BIT(31) -+/* Used in TX_CTL1*/ -+#define EMAC_TX_DMA_EN BIT(30) -+#define EMAC_TX_DMA_START BIT(31) -+ -+/* Used in RX_CTL0 */ -+#define EMAC_RX_RECEIVER_EN BIT(31) -+/* Used in TX_CTL0 */ -+#define EMAC_TX_TRANSMITTER_EN BIT(31) -+ -+/* Basic CTL0 */ -+#define EMAC_BCTL0_FD BIT(0) -+#define EMAC_BCTL0_SPEED_10 2 -+#define EMAC_BCTL0_SPEED_100 3 -+#define EMAC_BCTL0_SPEED_MASK GENMASK(3, 2) -+#define EMAC_BCTL0_SPEED_SHIFT 2 -+ -+#define EMAC_FLOW_RX 1 -+#define EMAC_FLOW_TX 2 -+ -+#define EMAC_TX_INT BIT(0) -+#define EMAC_TX_DMA_STOP_INT BIT(1) -+#define EMAC_TX_BUF_UA_INT BIT(2) -+#define EMAC_TX_TIMEOUT_INT BIT(3) -+#define EMAC_TX_UNDERFLOW_INT BIT(4) -+#define EMAC_TX_EARLY_INT BIT(5) -+#define EMAC_RX_INT BIT(8) -+#define EMAC_RX_BUF_UA_INT BIT(9) -+#define EMAC_RX_DMA_STOP_INT BIT(10) -+#define EMAC_RX_TIMEOUT_INT BIT(11) -+#define EMAC_RX_OVERFLOW_INT BIT(12) -+#define EMAC_RX_EARLY_INT BIT(13) -+#define EMAC_RGMII_STA_INT BIT(16) -+ -+/* Bits used in frame RX status */ -+#define EMAC_DSC_RX_FIRST BIT(9) -+#define EMAC_DSC_RX_LAST BIT(8) -+ -+/* Bits used in frame TX ctl */ -+#define EMAC_MAGIC_TX_BIT LE32_BIT(24) -+#define EMAC_TX_DO_CRC (LE32_BIT(27) | LE32_BIT(28)) -+#define EMAC_DSC_TX_FIRST LE32_BIT(29) -+#define EMAC_DSC_TX_LAST LE32_BIT(30) -+#define EMAC_WANT_INT LE32_BIT(31) -+ -+/* struct emac_variant - Describe an emac variant of sun8i-emac -+ * @default_syscon_value: Default value of the syscon EMAC register -+ * The default_syscon_value is also used for powering down the PHY -+ * @internal_phy: which PHY type is internal -+ * @support_mii: Does the SoC support MII -+ * @support_rmii: Does the SoC support RMII -+ * @support_rgmii: Does the SoC support RGMII ++/* struct emac_variant - Descrive dwmac-sun8i hardware variant ++ * @default_syscon_value: The default value of the EMAC register in syscon ++ * This value is used for disabling properly EMAC ++ * and used as a good starting value in case of the ++ * boot process(uboot) leave some stuff. ++ * @internal_phy: Does the MAC embed an internal PHY ++ * @support_mii: Does the MAC handle MII ++ * @support_rmii: Does the MAC handle RMII ++ * @support_rgmii: Does the MAC handle RGMII + */ +struct emac_variant { + u32 default_syscon_value; @@ -190,6 +400,25 @@ index 0000000..bc74467 + bool support_rgmii; +}; + ++/* struct sunxi_priv_data - hold all sunxi private data ++ * @tx_clk: reference to MAC TX clock ++ * @ephy_clk: reference to the optional EPHY clock for the internal PHY ++ * @regulator: reference to the optional regulator ++ * @rst_ephy: reference to the optional EPHY reset for the internal PHY ++ * @variant: reference to the current board variant ++ * @regmap: regmap for using the syscon ++ * @use_internal_phy: Does the current PHY choice imply using the internal PHY ++ */ ++struct sunxi_priv_data { ++ struct clk *tx_clk; ++ struct clk *ephy_clk; ++ struct regulator *regulator; ++ struct reset_control *rst_ephy; ++ const struct emac_variant *variant; ++ struct regmap *regmap; ++ bool use_internal_phy; ++}; ++ +static const struct emac_variant emac_variant_h3 = { + .default_syscon_value = 0x58000, + .internal_phy = PHY_INTERFACE_MODE_MII, @@ -213,815 +442,85 @@ index 0000000..bc74467 + .support_rgmii = true +}; + -+static const char const estats_str[][ETH_GSTRING_LEN] = { -+ /* errors */ -+ "rx_payload_error", -+ "rx_CRC_error", -+ "rx_phy_error", -+ "rx_length_error", -+ "rx_col_error", -+ "rx_header_error", -+ "rx_overflow_error", -+ "rx_saf_error", -+ "rx_daf_error", -+ "rx_buf_error", -+ "rx_invalid_error", -+ "tx_timeout", -+ /* misc infos */ -+ "tx_stop_queue", -+ "rx_dma_ua", -+ "rx_dma_stop", -+ "tx_dma_ua", -+ "tx_dma_stop", -+ "rx_hw_csum", -+ "tx_hw_csum", -+ /* interrupts */ -+ "rx_int", -+ "tx_int", -+ "tx_early_int", -+ "tx_underflow_int", -+ "tx_timeout_int", -+ "rx_early_int", -+ "rx_overflow_int", -+ "rx_timeout_int", -+ "rgmii_state_int", -+ /* debug */ -+ "tx_used_desc", -+ "napi_schedule", -+ "napi_underflow", -+}; -+ -+struct sun8i_emac_stats { -+ u64 rx_payload_error; -+ u64 rx_crc_error; -+ u64 rx_phy_error; -+ u64 rx_length_error; -+ u64 rx_col_error; -+ u64 rx_header_error; -+ u64 rx_overflow_error; -+ u64 rx_saf_fail; -+ u64 rx_daf_fail; -+ u64 rx_buf_error; -+ u64 rx_invalid_error; -+ u64 tx_timeout; -+ -+ u64 tx_stop_queue; -+ u64 rx_dma_ua; -+ u64 rx_dma_stop; -+ u64 tx_dma_ua; -+ u64 tx_dma_stop; -+ u64 rx_hw_csum; -+ u64 tx_hw_csum; -+ -+ u64 rx_int; -+ u64 tx_int; -+ u64 tx_early_int; -+ u64 tx_underflow_int; -+ u64 tx_timeout_int; -+ u64 rx_early_int; -+ u64 rx_overflow_int; -+ u64 rx_timeout_int; -+ u64 rgmii_state_int; -+ -+ u64 tx_used_desc; -+ u64 napi_schedule; -+ u64 napi_underflow; -+}; -+ -+/* The datasheet said that each descriptor can transfers up to 4096bytes -+ * But latter, a register documentation reduce that value to 2048 -+ * Anyway using 2048 cause strange behaviours and even BSP driver use 2047 -+ */ -+#define DESC_BUF_MAX 2044 -+ -+/* MAGIC value for knowing if a descriptor is available or not */ -+#define DCLEAN cpu_to_le32(BIT(16) | BIT(14) | BIT(12) | BIT(10) | BIT(9)) -+ -+/* struct dma_desc - Structure of DMA descriptor used by the hardware -+ * @status: Status of the frame written by HW, so RO for the -+ * driver (except for BIT(31) which is R/W) -+ * @ctl: Information on the frame written by the driver (INT, len,...) -+ * @buf_addr: physical address of the frame data -+ * @next: physical address of next dma_desc -+ */ -+struct dma_desc { -+ __le32 status; -+ __le32 ctl; -+ __le32 buf_addr; -+ __le32 next; -+}; -+ -+/* Describe how data from skb are DMA mapped (used in txinfo map member) */ -+#define MAP_SINGLE 1 -+#define MAP_PAGE 2 -+ -+/* Structure for storing information about data in TX ring buffer */ -+struct txinfo { -+ struct sk_buff *skb; -+ int map; -+}; -+ -+struct sun8i_emac_priv { -+ void __iomem *base; -+ struct regmap *regmap; -+ int irq; -+ struct device *dev; -+ struct net_device *ndev; -+ struct mii_bus *mdio; -+ struct napi_struct napi; -+ spinlock_t tx_lock;/* control the access of transmit descriptors */ -+ int duplex; -+ int speed; -+ int link; -+ int phy_interface; -+ const struct emac_variant *variant; -+ struct device_node *phy_node; -+ struct device_node *mdio_node; -+ struct clk *ahb_clk; -+ struct clk *ephy_clk; -+ bool use_internal_phy; -+ -+ struct reset_control *rst_mac; -+ struct reset_control *rst_ephy; -+ -+ struct dma_desc *dd_rx; -+ dma_addr_t dd_rx_phy; -+ struct dma_desc *dd_tx; -+ dma_addr_t dd_tx_phy; -+ struct sk_buff **rx_skb; -+ struct txinfo *txl; -+ -+ int nbdesc_tx; -+ int nbdesc_rx; -+ int tx_slot; -+ int tx_dirty; -+ int rx_dirty; -+ struct sun8i_emac_stats estats; -+ u32 msg_enable; -+ int flow_ctrl; -+ int pause; -+}; -+ -+static irqreturn_t sun8i_emac_dma_interrupt(int irq, void *dev_id); -+ -+static void rb_inc(int *p, const int max) -+{ -+ (*p)++; -+ (*p) %= max; -+} -+ -+/* Locking strategy: -+ * RX queue does not need any lock since only sun8i_emac_poll() access it. -+ * (All other RX modifiers (ringparam/ndo_stop) disable NAPI and so -+ * sun8i_emac_poll()) -+ * TX queue is handled by sun8i_emac_xmit(), sun8i_emac_complete_xmit() and -+ * sun8i_emac_tx_timeout() -+ * (All other RX modifiers (ringparam/ndo_stop) disable NAPI and stop queue) -+ * -+ * sun8i_emac_xmit() could fire only once (netif_tx_lock) -+ * sun8i_emac_complete_xmit() could fire only once (called from NAPI) -+ * sun8i_emac_tx_timeout() could fire only once (netif_tx_lock) and could not -+ * race with sun8i_emac_xmit (due to netif_tx_lock) and with -+ * sun8i_emac_complete_xmit which disable NAPI. -+ * -+ * So only sun8i_emac_xmit and sun8i_emac_complete_xmit could fire at the same -+ * time. -+ * But they never could modify the same descriptors: -+ * - sun8i_emac_complete_xmit() will modify only descriptors with empty status -+ * - sun8i_emac_xmit() will modify only descriptors set to DCLEAN -+ * Proper memory barriers ensure that descriptor set to DCLEAN could not be -+ * modified latter by sun8i_emac_complete_xmit(). -+ */ -+ -+/* Return the number of contiguous free descriptors -+ * starting from tx_slot -+ */ -+static int rb_tx_numfreedesc(struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ -+ if (priv->tx_slot < priv->tx_dirty) -+ return priv->tx_dirty - priv->tx_slot; -+ -+ return (priv->nbdesc_tx - priv->tx_slot) + priv->tx_dirty; -+} -+ -+/* sun8i_emac_rx_skb - Allocate a skb in a DMA descriptor -+ * -+ * @ndev: The net_device for this interface -+ * @i: index of slot to fill -+ * -+ * Refill a DMA descriptor with a fresh skb and map it for DMA. -+*/ -+static int sun8i_emac_rx_skb(struct net_device *ndev, int i) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ struct dma_desc *ddesc; -+ struct sk_buff *skb; -+ -+ ddesc = priv->dd_rx + i; -+ -+ ddesc->ctl = 0; -+ -+ skb = netdev_alloc_skb_ip_align(ndev, DESC_BUF_MAX); -+ if (!skb) -+ return -ENOMEM; -+ -+ /* should not happen */ -+ if (unlikely(priv->rx_skb[i])) -+ dev_warn(priv->dev, "BUG: Leaking a skbuff\n"); -+ -+ priv->rx_skb[i] = skb; -+ -+ ddesc->buf_addr = dma_map_single(priv->dev, skb->data, -+ DESC_BUF_MAX, DMA_FROM_DEVICE); -+ if (dma_mapping_error(priv->dev, ddesc->buf_addr)) { -+ dev_err(priv->dev, "ERROR: Cannot map RX buffer for DMA\n"); -+ dev_kfree_skb(skb); -+ return -EFAULT; -+ } -+ /* We cannot direcly use cpu_to_le32() after dma_map_single -+ * since dma_mapping_error use it -+ */ -+ ddesc->buf_addr = cpu_to_le32(ddesc->buf_addr); -+ ddesc->ctl |= cpu_to_le32(DESC_BUF_MAX); -+ /* EMAC_COULD_BE_USED_BY_DMA must be the last value written */ -+ wmb(); -+ ddesc->status = EMAC_COULD_BE_USED_BY_DMA; -+ -+ return 0; -+} -+ -+static void sun8i_emac_stop_tx(struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ u32 v; -+ -+ netif_stop_queue(ndev); -+ -+ v = readl(priv->base + EMAC_TX_CTL0); -+ /* Disable transmitter after current reception */ -+ v &= ~EMAC_TX_TRANSMITTER_EN; -+ writel(v, priv->base + EMAC_TX_CTL0); -+ -+ v = readl(priv->base + EMAC_TX_CTL1); -+ /* Stop TX DMA */ -+ v &= ~EMAC_TX_DMA_EN; -+ writel(v, priv->base + EMAC_TX_CTL1); -+ -+ /* We must be sure that all is stopped before leaving this function */ -+ wmb(); -+} -+ -+static void sun8i_emac_stop_rx(struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ u32 v; -+ -+ v = readl(priv->base + EMAC_RX_CTL0); -+ /* Disable receiver after current reception */ -+ v &= ~EMAC_RX_RECEIVER_EN; -+ writel(v, priv->base + EMAC_RX_CTL0); -+ -+ v = readl(priv->base + EMAC_RX_CTL1); -+ /* Stop RX DMA */ -+ v &= ~EMAC_RX_DMA_EN; -+ writel(v, priv->base + EMAC_RX_CTL1); -+ -+ /* We must be sure that all is stopped before leaving this function */ -+ wmb(); -+} -+ -+static void sun8i_emac_start_rx(struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ u32 v; -+ -+ v = readl(priv->base + EMAC_RX_CTL0); -+ /* Enable receiver */ -+ v |= EMAC_RX_RECEIVER_EN; -+ writel(v, priv->base + EMAC_RX_CTL0); -+ -+ v = readl(priv->base + EMAC_RX_CTL1); -+ v |= EMAC_RX_DMA_START; -+ v |= EMAC_RX_DMA_EN; -+ writel(v, priv->base + EMAC_RX_CTL1); -+} -+ -+static void sun8i_emac_start_tx(struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ u32 v; -+ -+ v = readl(priv->base + EMAC_TX_CTL0); -+ v |= EMAC_TX_TRANSMITTER_EN; -+ writel(v, priv->base + EMAC_TX_CTL0); -+ -+ v = readl(priv->base + EMAC_TX_CTL1); -+ v |= EMAC_TX_DMA_START; -+ v |= EMAC_TX_DMA_EN; -+ writel(v, priv->base + EMAC_TX_CTL1); -+} -+ -+/* sun8i_emac_set_macaddr - Set MAC address for slot index -+ * -+ * @addr: the MAC address to set -+ * @index: The index of slot where to set address. -+ * -+ * The slot 0 is the main MAC address -+ */ -+static void sun8i_emac_set_macaddr(struct sun8i_emac_priv *priv, -+ const u8 *addr, int index) -+{ -+ u32 v; -+ -+ dev_info(priv->dev, "device MAC address slot %d %pM", index, addr); -+ -+ v = (addr[5] << 8) | addr[4]; -+ writel(v, priv->base + EMAC_MACADDR_HI + index * 8); -+ -+ v = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; -+ writel(v, priv->base + EMAC_MACADDR_LO + index * 8); -+} -+ -+static void sun8i_emac_set_link_mode(struct sun8i_emac_priv *priv) -+{ -+ u32 v; -+ -+ v = readl(priv->base + EMAC_BASIC_CTL0); -+ -+ if (priv->duplex) -+ v |= EMAC_BCTL0_FD; -+ else -+ v &= ~EMAC_BCTL0_FD; -+ -+ v &= ~EMAC_BCTL0_SPEED_MASK; -+ -+ switch (priv->speed) { -+ case 1000: -+ break; -+ case 100: -+ v |= EMAC_BCTL0_SPEED_100 << EMAC_BCTL0_SPEED_SHIFT; -+ break; -+ case 10: -+ v |= EMAC_BCTL0_SPEED_10 << EMAC_BCTL0_SPEED_SHIFT; -+ break; -+ default: -+ dev_err(priv->dev, "Unsupported speed %d\n", priv->speed); -+ return; -+ } -+ -+ writel(v, priv->base + EMAC_BASIC_CTL0); -+} -+ -+static void sun8i_emac_flow_ctrl(struct sun8i_emac_priv *priv, int duplex, -+ int fc) -+{ -+ u32 flow = 0; -+ -+ flow = readl(priv->base + EMAC_RX_CTL0); -+ if (fc & EMAC_FLOW_RX) -+ flow |= BIT(16); -+ else -+ flow &= ~BIT(16); -+ writel(flow, priv->base + EMAC_RX_CTL0); -+ -+ flow = readl(priv->base + EMAC_TX_FLOW_CTL); -+ if (fc & EMAC_FLOW_TX) -+ flow |= BIT(0); -+ else -+ flow &= ~BIT(0); -+ writel(flow, priv->base + EMAC_TX_FLOW_CTL); -+} -+ -+/* Grab a frame into a skb from descriptor number i */ -+static int sun8i_emac_rx_from_ddesc(struct net_device *ndev, int i) -+{ -+ struct sk_buff *skb; -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ struct dma_desc *ddesc = priv->dd_rx + i; -+ int frame_len; -+ int rxcsum_done = 0; -+ u32 dstatus = le32_to_cpu(ddesc->status); -+ -+ if (ndev->features & NETIF_F_RXCSUM) -+ rxcsum_done = 1; -+ -+ /* bit0/bit7 work only on IPv4/IPv6 TCP traffic, -+ * (not on ARP for example) so we do not raise rx_errors/discard frame -+ */ -+ /* the checksum or length of received frame's payload is wrong*/ -+ if (dstatus & BIT(0)) { -+ priv->estats.rx_payload_error++; -+ rxcsum_done = 0; -+ } -+ -+ /* RX_CRC_ERR */ -+ if (dstatus & BIT(1)) { -+ priv->ndev->stats.rx_errors++; -+ priv->ndev->stats.rx_crc_errors++; -+ priv->estats.rx_crc_error++; -+ goto discard_frame; -+ } -+ -+ /* RX_PHY_ERR */ -+ if ((dstatus & BIT(3))) { -+ priv->ndev->stats.rx_errors++; -+ priv->estats.rx_phy_error++; -+ goto discard_frame; -+ } -+ -+ /* RX_LENGTH_ERR */ -+ if ((dstatus & BIT(4))) { -+ priv->ndev->stats.rx_errors++; -+ priv->ndev->stats.rx_length_errors++; -+ priv->estats.rx_length_error++; -+ goto discard_frame; -+ } -+ -+ /* RX_COL_ERR */ -+ if ((dstatus & BIT(6))) { -+ priv->ndev->stats.rx_errors++; -+ priv->estats.rx_col_error++; -+ goto discard_frame; -+ } -+ -+ /* RX_HEADER_ERR */ -+ if ((dstatus & BIT(7))) { -+ priv->estats.rx_header_error++; -+ rxcsum_done = 0; -+ } -+ -+ /* RX_OVERFLOW_ERR */ -+ if ((dstatus & BIT(11))) { -+ priv->ndev->stats.rx_over_errors++; -+ priv->estats.rx_overflow_error++; -+ goto discard_frame; -+ } -+ -+ /* RX_NO_ENOUGTH_BUF_ERR */ -+ if ((dstatus & BIT(14))) { -+ priv->ndev->stats.rx_errors++; -+ priv->estats.rx_buf_error++; -+ goto discard_frame; -+ } -+ -+ /* BIT(9) is for the first frame, not having it is bad since we do not -+ * handle Jumbo frame -+ */ -+ if ((dstatus & EMAC_DSC_RX_FIRST) == 0) { -+ priv->ndev->stats.rx_errors++; -+ priv->estats.rx_invalid_error++; -+ goto discard_frame; -+ } -+ -+ /* this frame is not the last */ -+ if ((dstatus & EMAC_DSC_RX_LAST) == 0) { -+ priv->ndev->stats.rx_errors++; -+ priv->estats.rx_invalid_error++; -+ goto discard_frame; -+ } -+ -+ frame_len = (dstatus >> 16) & 0x3FFF; -+ if (!(ndev->features & NETIF_F_RXFCS)) -+ frame_len -= ETH_FCS_LEN; -+ -+ skb = priv->rx_skb[i]; -+ -+ netif_dbg(priv, rx_status, priv->ndev, -+ "%s from %02d %pad len=%d status=%x st=%x\n", -+ __func__, i, &ddesc, frame_len, dstatus, -+ cpu_to_le32(ddesc->ctl)); -+ -+ skb_put(skb, frame_len); -+ -+ dma_unmap_single(priv->dev, le32_to_cpu(ddesc->buf_addr), DESC_BUF_MAX, -+ DMA_FROM_DEVICE); -+ skb->protocol = eth_type_trans(skb, priv->ndev); -+ if (rxcsum_done) { -+ skb->ip_summed = CHECKSUM_UNNECESSARY; -+ priv->estats.rx_hw_csum++; -+ } else { -+ skb->ip_summed = CHECKSUM_PARTIAL; -+ } -+ -+ priv->ndev->stats.rx_packets++; -+ priv->ndev->stats.rx_bytes += frame_len; -+ priv->rx_skb[i] = NULL; -+ -+ sun8i_emac_rx_skb(ndev, i); -+ napi_gro_receive(&priv->napi, skb); -+ -+ return 0; -+ /* If the frame need to be dropped, we simply reuse the buffer */ -+discard_frame: -+ ddesc->ctl = cpu_to_le32(DESC_BUF_MAX); -+ /* EMAC_COULD_BE_USED_BY_DMA must be the last value written */ -+ wmb(); -+ ddesc->status = EMAC_COULD_BE_USED_BY_DMA; -+ return 0; -+} -+ -+/* Iterate over dma_desc for finding completed xmit. -+ * -+ * The problem is: how to know that a descriptor is sent and not just in -+ * preparation. -+ * Need to have status=0 and st set but this is the state of first frame just -+ * before setting the own-by-DMA bit. -+ * The solution is to used the artificial value DCLEAN. -+ */ -+static int sun8i_emac_complete_xmit(struct net_device *ndev, int budget) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ struct dma_desc *ddesc; -+ int frame_len; -+ int work = 0; -+ unsigned int bytes_compl = 0, pkts_compl = 0; -+ u32 dstatus; -+ -+ do { -+ ddesc = priv->dd_tx + priv->tx_dirty; -+ -+ if (ddesc->status & EMAC_COULD_BE_USED_BY_DMA) -+ goto xmit_end; -+ -+ if (ddesc->status == DCLEAN) -+ goto xmit_end; -+ -+ dstatus = cpu_to_le32(ddesc->status); -+ -+ if (ddesc->status == 0 && !ddesc->ctl) { -+ dev_err(priv->dev, "BUG: reached the void %d %d\n", -+ priv->tx_dirty, priv->tx_slot); -+ goto xmit_end; -+ } -+ -+ /* TX_UNDERFLOW_ERR */ -+ if (dstatus & BIT(1)) -+ priv->ndev->stats.tx_errors++; -+ /* TX_DEFER_ERR */ -+ if (dstatus & BIT(2)) -+ priv->ndev->stats.tx_errors++; -+ /* BIT 6:3 numbers of collisions */ -+ if (dstatus & 0x78) -+ priv->ndev->stats.collisions += -+ (dstatus & 0x78) >> 3; -+ /* TX_COL_ERR_1 */ -+ if (dstatus & BIT(8)) -+ priv->ndev->stats.tx_errors++; -+ /* TX_COL_ERR_0 */ -+ if (dstatus & BIT(9)) -+ priv->ndev->stats.tx_errors++; -+ /* TX_CRS_ERR */ -+ if (dstatus & BIT(10)) -+ priv->ndev->stats.tx_carrier_errors++; -+ /* TX_PAYLOAD_ERR */ -+ if (dstatus & BIT(12)) -+ priv->ndev->stats.tx_errors++; -+ /* TX_LENGTH_ERR */ -+ if (dstatus & BIT(14)) -+ priv->ndev->stats.tx_errors++; -+ /* TX_HEADER_ERR */ -+ if (dstatus & BIT(16)) -+ priv->ndev->stats.tx_errors++; -+ -+ frame_len = le32_to_cpu(ddesc->ctl) & 0x3FFF; -+ bytes_compl += frame_len; -+ -+ if (priv->txl[priv->tx_dirty].map == MAP_SINGLE) -+ dma_unmap_single(priv->dev, -+ le32_to_cpu(ddesc->buf_addr), -+ frame_len, DMA_TO_DEVICE); -+ else -+ dma_unmap_page(priv->dev, -+ le32_to_cpu(ddesc->buf_addr), -+ frame_len, DMA_TO_DEVICE); -+ /* we can free skb only on last frame */ -+ if (priv->txl[priv->tx_dirty].skb && -+ (ddesc->ctl & EMAC_DSC_TX_LAST)) { -+ dev_kfree_skb_irq(priv->txl[priv->tx_dirty].skb); -+ pkts_compl++; -+ } -+ -+ priv->txl[priv->tx_dirty].skb = NULL; -+ priv->txl[priv->tx_dirty].map = 0; -+ ddesc->ctl = 0; -+ /* setting status to DCLEAN is the last value to be set */ -+ wmb(); -+ ddesc->status = DCLEAN; -+ work++; -+ -+ rb_inc(&priv->tx_dirty, priv->nbdesc_tx); -+ ddesc = priv->dd_tx + priv->tx_dirty; -+ } while (ddesc->ctl && -+ !(ddesc->status & EMAC_COULD_BE_USED_BY_DMA) && -+ work < budget); -+ -+xmit_end: -+ netdev_completed_queue(ndev, pkts_compl, bytes_compl); -+ -+ /* if we don't have handled all packets */ -+ if (work < budget) -+ work = 0; -+ -+ if (netif_queue_stopped(ndev) && -+ rb_tx_numfreedesc(ndev) > MAX_SKB_FRAGS + 1) -+ netif_wake_queue(ndev); -+ return work; -+} -+ -+static int sun8i_emac_poll(struct napi_struct *napi, int budget) -+{ -+ struct sun8i_emac_priv *priv = -+ container_of(napi, struct sun8i_emac_priv, napi); -+ struct net_device *ndev = priv->ndev; -+ int worked; -+ struct dma_desc *ddesc; -+ -+ priv->estats.napi_schedule++; -+ worked = sun8i_emac_complete_xmit(ndev, budget); -+ -+ ddesc = priv->dd_rx + priv->rx_dirty; -+ while (!(ddesc->status & EMAC_COULD_BE_USED_BY_DMA) && -+ worked < budget) { -+ sun8i_emac_rx_from_ddesc(ndev, priv->rx_dirty); -+ worked++; -+ rb_inc(&priv->rx_dirty, priv->nbdesc_rx); -+ ddesc = priv->dd_rx + priv->rx_dirty; -+ }; -+ if (worked < budget) { -+ priv->estats.napi_underflow++; -+ napi_complete(&priv->napi); -+ writel(EMAC_RX_INT | EMAC_TX_INT, priv->base + EMAC_INT_EN); -+ } -+ return worked; -+} -+ -+static int sun8i_mdio_read(struct mii_bus *bus, int phy_addr, int phy_reg) -+{ -+ struct net_device *ndev = bus->priv; -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ int err; -+ u32 reg; -+ -+ err = readl_poll_timeout(priv->base + EMAC_MDIO_CMD, reg, -+ !(reg & MDIO_CMD_MII_BUSY), 100, 10000); -+ if (err) { -+ dev_err(priv->dev, "%s timeout %x\n", __func__, reg); -+ return err; -+ } -+ -+ reg &= ~MDIO_CMD_MII_WRITE; -+ reg &= ~MDIO_CMD_MII_PHY_REG_ADDR_MASK; -+ reg |= (phy_reg << MDIO_CMD_MII_PHY_REG_ADDR_SHIFT) & -+ MDIO_CMD_MII_PHY_REG_ADDR_MASK; -+ -+ reg &= ~MDIO_CMD_MII_PHY_ADDR_MASK; -+ -+ reg |= (phy_addr << MDIO_CMD_MII_PHY_ADDR_SHIFT) & -+ MDIO_CMD_MII_PHY_ADDR_MASK; -+ -+ reg |= MDIO_CMD_MII_BUSY; -+ -+ writel(reg, priv->base + EMAC_MDIO_CMD); -+ -+ err = readl_poll_timeout(priv->base + EMAC_MDIO_CMD, reg, -+ !(reg & MDIO_CMD_MII_BUSY), 100, 10000); -+ -+ if (err) { -+ dev_err(priv->dev, "%s timeout %x\n", __func__, reg); -+ return err; -+ } -+ -+ return readl(priv->base + EMAC_MDIO_DATA); -+} -+ -+static int sun8i_mdio_write(struct mii_bus *bus, int phy_addr, int phy_reg, -+ u16 data) -+{ -+ struct net_device *ndev = bus->priv; -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ u32 reg; -+ int err; -+ -+ err = readl_poll_timeout(priv->base + EMAC_MDIO_CMD, reg, -+ !(reg & MDIO_CMD_MII_BUSY), 100, 10000); -+ if (err) { -+ dev_err(priv->dev, "%s timeout %x\n", __func__, reg); -+ return err; -+ } -+ -+ reg &= ~MDIO_CMD_MII_PHY_REG_ADDR_MASK; -+ reg |= (phy_reg << MDIO_CMD_MII_PHY_REG_ADDR_SHIFT) & -+ MDIO_CMD_MII_PHY_REG_ADDR_MASK; -+ -+ reg &= ~MDIO_CMD_MII_PHY_ADDR_MASK; -+ reg |= (phy_addr << MDIO_CMD_MII_PHY_ADDR_SHIFT) & -+ MDIO_CMD_MII_PHY_ADDR_MASK; -+ -+ reg |= MDIO_CMD_MII_WRITE; -+ reg |= MDIO_CMD_MII_BUSY; -+ -+ writel(reg, priv->base + EMAC_MDIO_CMD); -+ writel(data, priv->base + EMAC_MDIO_DATA); -+ -+ err = readl_poll_timeout(priv->base + EMAC_MDIO_CMD, reg, -+ !(reg & MDIO_CMD_MII_BUSY), 100, 10000); -+ if (err) { -+ dev_err(priv->dev, "%s timeout %x\n", __func__, reg); -+ return err; -+ } -+ -+ return 0; -+} -+ -+static int sun8i_emac_mdio_register(struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ struct mii_bus *bus; -+ int ret; -+ -+ bus = mdiobus_alloc(); -+ if (!bus) { -+ netdev_err(ndev, "Failed to allocate a new mdio bus\n"); -+ return -ENOMEM; -+ } -+ -+ bus->name = dev_name(priv->dev); -+ bus->read = &sun8i_mdio_read; -+ bus->write = &sun8i_mdio_write; -+ snprintf(bus->id, MII_BUS_ID_SIZE, "%s-%x", bus->name, priv->dev->id); -+ -+ bus->parent = priv->dev; -+ bus->priv = ndev; -+ -+ ret = of_mdiobus_register(bus, priv->mdio_node); -+ if (ret) { -+ netdev_err(ndev, "Could not register a MDIO bus: %d\n", ret); -+ mdiobus_free(bus); -+ return ret; -+ } -+ -+ priv->mdio = bus; -+ -+ return 0; -+} -+ -+static void sun8i_emac_mdio_unregister(struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ -+ mdiobus_unregister(priv->mdio); -+ mdiobus_free(priv->mdio); -+} -+ -+/* Run within phydev->lock */ -+static void sun8i_emac_adjust_link(struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ struct phy_device *phydev = ndev->phydev; -+ int new_state = 0; -+ -+ netif_dbg(priv, link, priv->ndev, -+ "%s link=%x duplex=%x speed=%x\n", __func__, -+ phydev->link, phydev->duplex, phydev->speed); -+ if (!phydev) -+ return; -+ -+ if (phydev->link) { -+ if (phydev->duplex != priv->duplex) { -+ new_state = 1; -+ priv->duplex = phydev->duplex; -+ } -+ if (phydev->pause) -+ sun8i_emac_flow_ctrl(priv, phydev->duplex, -+ priv->flow_ctrl); -+ -+ if (phydev->speed != priv->speed) { -+ new_state = 1; -+ priv->speed = phydev->speed; -+ } -+ -+ if (priv->link == 0) { -+ new_state = 1; -+ priv->link = phydev->link; -+ } -+ -+ netif_dbg(priv, link, priv->ndev, -+ "%s new=%d link=%d pause=%d\n", -+ __func__, new_state, priv->link, phydev->pause); -+ if (new_state) -+ sun8i_emac_set_link_mode(priv); -+ } else if (priv->link != phydev->link) { -+ new_state = 1; -+ priv->link = 0; -+ priv->speed = 0; -+ priv->duplex = -1; -+ } -+ -+ if (new_state) -+ phy_print_status(phydev); -+} ++#define EMAC_BASIC_CTL0 0x00 ++#define EMAC_BASIC_CTL1 0x04 ++#define EMAC_INT_STA 0x08 ++#define EMAC_INT_EN 0x0C ++#define EMAC_TX_CTL0 0x10 ++#define EMAC_TX_CTL1 0x14 ++#define EMAC_TX_FLOW_CTL 0x1C ++#define EMAC_TX_DESC_LIST 0x20 ++#define EMAC_RX_CTL0 0x24 ++#define EMAC_RX_CTL1 0x28 ++#define EMAC_RX_DESC_LIST 0x34 ++#define EMAC_RX_FRM_FLT 0x38 ++#define EMAC_MDIO_CMD 0x48 ++#define EMAC_MDIO_DATA 0x4C ++#define EMAC_MACADDR_HI(reg) (0x50 + (reg) * 8) ++#define EMAC_MACADDR_LO(reg) (0x54 + (reg) * 8) ++#define EMAC_TX_DMA_STA 0xB0 ++#define EMAC_TX_CUR_DESC 0xB4 ++#define EMAC_TX_CUR_BUF 0xB8 ++#define EMAC_RX_DMA_STA 0xC0 ++#define EMAC_RX_CUR_DESC 0xC4 ++#define EMAC_RX_CUR_BUF 0xC8 ++ ++/* Use in EMAC_BASIC_CTL1 */ ++#define EMAC_BURSTLEN_SHIFT 24 ++ ++/* Used in EMAC_RX_FRM_FLT */ ++#define EMAC_FRM_FLT_RXALL BIT(0) ++#define EMAC_FRM_FLT_CTL BIT(13) ++#define EMAC_FRM_FLT_MULTICAST BIT(16) ++ ++/* Used in RX_CTL1*/ ++#define EMAC_RX_MD BIT(1) ++#define EMAC_RX_TH_MASK GENMASK(4, 5) ++#define EMAC_RX_TH_32 0 ++#define EMAC_RX_TH_64 (0x1 << 4) ++#define EMAC_RX_TH_96 (0x2 << 4) ++#define EMAC_RX_TH_128 (0x3 << 4) ++#define EMAC_RX_DMA_EN BIT(30) ++#define EMAC_RX_DMA_START BIT(31) ++ ++/* Used in TX_CTL1*/ ++#define EMAC_TX_MD BIT(1) ++#define EMAC_TX_NEXT_FRM BIT(2) ++#define EMAC_TX_TH_MASK GENMASK(8, 10) ++#define EMAC_TX_TH_64 0 ++#define EMAC_TX_TH_128 (0x1 << 8) ++#define EMAC_TX_TH_192 (0x2 << 8) ++#define EMAC_TX_TH_256 (0x3 << 8) ++#define EMAC_TX_DMA_EN BIT(30) ++#define EMAC_TX_DMA_START BIT(31) ++ ++/* Used in RX_CTL0 */ ++#define EMAC_RX_RECEIVER_EN BIT(31) ++#define EMAC_RX_DO_CRC BIT(27) ++#define EMAC_RX_FLOW_CTL_EN BIT(16) ++ ++/* Used in TX_CTL0 */ ++#define EMAC_TX_TRANSMITTER_EN BIT(31) ++ ++/* Used in EMAC_TX_FLOW_CTL */ ++#define EMAC_TX_FLOW_CTL_EN BIT(0) ++ ++/* Used in EMAC_INT_STA */ ++#define EMAC_TX_INT BIT(0) ++#define EMAC_TX_DMA_STOP_INT BIT(1) ++#define EMAC_TX_BUF_UA_INT BIT(2) ++#define EMAC_TX_TIMEOUT_INT BIT(3) ++#define EMAC_TX_UNDERFLOW_INT BIT(4) ++#define EMAC_TX_EARLY_INT BIT(5) ++#define EMAC_RX_INT BIT(8) ++#define EMAC_RX_BUF_UA_INT BIT(9) ++#define EMAC_RX_DMA_STOP_INT BIT(10) ++#define EMAC_RX_TIMEOUT_INT BIT(11) ++#define EMAC_RX_OVERFLOW_INT BIT(12) ++#define EMAC_RX_EARLY_INT BIT(13) ++#define EMAC_RGMII_STA_INT BIT(16) ++ ++#define MAC_ADDR_TYPE_DST BIT(31) + +/* H3 specific bits for EPHY */ +#define H3_EPHY_ADDR_SHIFT 20 @@ -1045,30 +544,434 @@ index 0000000..bc74467 +#define SYSCON_ETCS_INT_GMII 0x2 +#define SYSCON_EMAC_REG 0x30 + -+static int sun8i_emac_set_syscon(struct net_device *ndev) ++/* sun8i_dwmac_dma_reset() - reset the EMAC ++ * Called from stmmac via stmmac_dma_ops->reset ++ */ ++static int sun8i_dwmac_dma_reset(void __iomem *ioaddr) +{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ struct device_node *node = priv->dev->of_node; ++ writel(0, ioaddr + EMAC_RX_CTL1); ++ writel(0, ioaddr + EMAC_TX_CTL1); ++ writel(0, ioaddr + EMAC_RX_FRM_FLT); ++ writel(0, ioaddr + EMAC_RX_DESC_LIST); ++ writel(0, ioaddr + EMAC_TX_DESC_LIST); ++ writel(0, ioaddr + EMAC_INT_EN); ++ writel(0x1FFFFFF, ioaddr + EMAC_INT_STA); ++ return 0; ++} ++ ++/* sun8i_dwmac_dma_init() - initialize the EMAC ++ * Called from stmmac via stmmac_dma_ops->init ++ */ ++static void sun8i_dwmac_dma_init(void __iomem *ioaddr, ++ struct stmmac_dma_cfg *dma_cfg, ++ u32 dma_tx, u32 dma_rx, int atds) ++{ ++ /* Write TX and RX descriptors address */ ++ writel(dma_rx, ioaddr + EMAC_RX_DESC_LIST); ++ writel(dma_tx, ioaddr + EMAC_TX_DESC_LIST); ++ ++ writel(EMAC_RX_INT | EMAC_TX_INT, ioaddr + EMAC_INT_EN); ++ writel(0x1FFFFFF, ioaddr + EMAC_INT_STA); ++} ++ ++/* sun8i_dwmac_dump_regs() - Dump EMAC address space ++ * Called from stmmac_dma_ops->dump_regs ++ * Used for ethtool ++ */ ++static void sun8i_dwmac_dump_regs(void __iomem *ioaddr, u32 *reg_space) ++{ ++ int i; ++ ++ for (i = 0; i < 0xC8; i += 4) { ++ if (i == 0x32 || i == 0x3C) ++ continue; ++ reg_space[i / 4] = readl(ioaddr + i); ++ } ++} ++ ++/* sun8i_dwmac_dump_mac_regs() - Dump EMAC address space ++ * Called from stmmac_ops->dump_regs ++ * Used for ethtool ++ */ ++static void sun8i_dwmac_dump_mac_regs(struct mac_device_info *hw, ++ u32 *reg_space) ++{ ++ int i; ++ void __iomem *ioaddr = hw->pcsr; ++ ++ for (i = 0; i < 0xC8; i += 4) { ++ if (i == 0x32 || i == 0x3C) ++ continue; ++ reg_space[i / 4] = readl(ioaddr + i); ++ } ++} ++ ++static void sun8i_dwmac_enable_dma_irq(void __iomem *ioaddr) ++{ ++ writel(EMAC_RX_INT | EMAC_TX_INT, ioaddr + EMAC_INT_EN); ++} ++ ++static void sun8i_dwmac_disable_dma_irq(void __iomem *ioaddr) ++{ ++ writel(0, ioaddr + EMAC_INT_EN); ++} ++ ++static void sun8i_dwmac_dma_start_tx(void __iomem *ioaddr) ++{ ++ u32 v; ++ ++ v = readl(ioaddr + EMAC_TX_CTL0); ++ v |= EMAC_TX_TRANSMITTER_EN; ++ writel(v, ioaddr + EMAC_TX_CTL0); ++} ++ ++static void sun8i_dwmac_enable_dma_transmission(void __iomem *ioaddr) ++{ ++ u32 v; ++ ++ v = readl(ioaddr + EMAC_TX_CTL1); ++ v |= EMAC_TX_DMA_START; ++ v |= EMAC_TX_DMA_EN; ++ writel_relaxed(v, ioaddr + EMAC_TX_CTL1); ++} ++ ++static void sun8i_dwmac_dma_stop_tx(void __iomem *ioaddr) ++{ ++ u32 v; ++ ++ v = readl(ioaddr + EMAC_TX_CTL0); ++ v &= ~EMAC_TX_TRANSMITTER_EN; ++ writel(v, ioaddr + EMAC_TX_CTL0); ++} ++ ++static void sun8i_dwmac_dma_start_rx(void __iomem *ioaddr) ++{ ++ u32 v; ++ ++ v = readl(ioaddr + EMAC_RX_CTL0); ++ v |= EMAC_RX_RECEIVER_EN; ++ writel(v, ioaddr + EMAC_RX_CTL0); ++ ++ v = readl(ioaddr + EMAC_RX_CTL1); ++ v |= EMAC_RX_DMA_START; ++ v |= EMAC_RX_DMA_EN; ++ writel(v, ioaddr + EMAC_RX_CTL1); ++} ++ ++static void sun8i_dwmac_dma_stop_rx(void __iomem *ioaddr) ++{ ++ u32 v; ++ ++ v = readl(ioaddr + EMAC_RX_CTL0); ++ v &= ~EMAC_RX_RECEIVER_EN; ++ writel(v, ioaddr + EMAC_RX_CTL0); ++ ++ v = readl(ioaddr + EMAC_RX_CTL1); ++ v &= ~EMAC_RX_DMA_EN; ++ writel(v, ioaddr + EMAC_RX_CTL1); ++} ++ ++static int sun8i_dwmac_dma_interrupt(void __iomem *ioaddr, ++ struct stmmac_extra_stats *x) ++{ ++ u32 v; ++ int ret = 0; ++ ++ v = readl(ioaddr + EMAC_INT_STA); ++ ++ if (v & EMAC_TX_INT) { ++ ret |= handle_tx; ++ x->tx_normal_irq_n++; ++ } ++ ++ if (v & EMAC_TX_DMA_STOP_INT) ++ x->tx_process_stopped_irq++; ++ ++ if (v & EMAC_TX_BUF_UA_INT) ++ x->tx_process_stopped_irq++; ++ ++ if (v & EMAC_TX_TIMEOUT_INT) ++ ret |= tx_hard_error; ++ ++ if (v & EMAC_TX_UNDERFLOW_INT) { ++ ret |= tx_hard_error; ++ x->tx_undeflow_irq++; ++ } ++ ++ if (v & EMAC_TX_EARLY_INT) ++ x->tx_early_irq++; ++ ++ if (v & EMAC_RX_INT) { ++ ret |= handle_rx; ++ x->rx_normal_irq_n++; ++ } ++ ++ if (v & EMAC_RX_BUF_UA_INT) ++ x->rx_buf_unav_irq++; ++ ++ if (v & EMAC_RX_DMA_STOP_INT) ++ x->rx_process_stopped_irq++; ++ ++ if (v & EMAC_RX_TIMEOUT_INT) ++ ret |= tx_hard_error; ++ ++ if (v & EMAC_RX_OVERFLOW_INT) { ++ ret |= tx_hard_error; ++ x->rx_overflow_irq++; ++ } ++ ++ if (v & EMAC_RX_EARLY_INT) ++ x->rx_early_irq++; ++ ++ if (v & EMAC_RGMII_STA_INT) ++ x->irq_rgmii_n++; ++ ++ writel(v, ioaddr + EMAC_INT_STA); ++ ++ return ret; ++} ++ ++static void sun8i_dwmac_dma_operation_mode(void __iomem *ioaddr, int txmode, ++ int rxmode, int rxfifosz) ++{ ++ u32 v; ++ ++ v = readl(ioaddr + EMAC_TX_CTL1); ++ if (txmode == SF_DMA_MODE) { ++ v |= EMAC_TX_MD; ++ /* Undocumented bit (called TX_NEXT_FRM in BSP), the original ++ * comment is ++ * "Operating on second frame increase the performance ++ * especially when transmit store-and-forward is used." ++ */ ++ v |= EMAC_TX_NEXT_FRM; ++ } else { ++ v &= ~EMAC_TX_MD; ++ v &= ~EMAC_TX_TH_MASK; ++ if (txmode < 64) ++ v |= EMAC_TX_TH_64; ++ else if (txmode < 128) ++ v |= EMAC_TX_TH_128; ++ else if (txmode < 192) ++ v |= EMAC_TX_TH_192; ++ else if (txmode < 256) ++ v |= EMAC_TX_TH_256; ++ } ++ writel(v, ioaddr + EMAC_TX_CTL1); ++ ++ v = readl(ioaddr + EMAC_RX_CTL1); ++ if (rxmode == SF_DMA_MODE) { ++ v |= EMAC_RX_MD; ++ } else { ++ v &= ~EMAC_RX_MD; ++ v &= ~EMAC_RX_TH_MASK; ++ if (rxmode < 32) ++ v |= EMAC_RX_TH_32; ++ else if (rxmode < 64) ++ v |= EMAC_RX_TH_64; ++ else if (rxmode < 96) ++ v |= EMAC_RX_TH_96; ++ else if (rxmode < 128) ++ v |= EMAC_RX_TH_128; ++ } ++ writel(v, ioaddr + EMAC_RX_CTL1); ++} ++ ++static const struct stmmac_dma_ops sun8i_dwmac_dma_ops = { ++ .reset = sun8i_dwmac_dma_reset, ++ .init = sun8i_dwmac_dma_init, ++ .dump_regs = sun8i_dwmac_dump_regs, ++ .dma_mode = sun8i_dwmac_dma_operation_mode, ++ .enable_dma_transmission = sun8i_dwmac_enable_dma_transmission, ++ .enable_dma_irq = sun8i_dwmac_enable_dma_irq, ++ .disable_dma_irq = sun8i_dwmac_disable_dma_irq, ++ .start_tx = sun8i_dwmac_dma_start_tx, ++ .stop_tx = sun8i_dwmac_dma_stop_tx, ++ .start_rx = sun8i_dwmac_dma_start_rx, ++ .stop_rx = sun8i_dwmac_dma_stop_rx, ++ .dma_interrupt = sun8i_dwmac_dma_interrupt, ++}; ++ ++static int sun8i_dwmac_init(struct platform_device *pdev, void *priv) ++{ ++ struct sunxi_priv_data *gmac = priv; ++ int ret; ++ ++ if (gmac->regulator) { ++ ret = regulator_enable(gmac->regulator); ++ if (ret) { ++ dev_err(&pdev->dev, "Fail to enable regulator\n"); ++ return ret; ++ } ++ } ++ ++ ret = clk_prepare_enable(gmac->tx_clk); ++ if (ret) { ++ if (gmac->regulator) ++ regulator_disable(gmac->regulator); ++ dev_err(&pdev->dev, "Could not enable AHB clock\n"); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static void sun8i_dwmac_core_init(struct mac_device_info *hw, int mtu) ++{ ++ void __iomem *ioaddr = hw->pcsr; ++ u32 v; ++ ++ v = (8 << EMAC_BURSTLEN_SHIFT); /* burst len */ ++ writel(v, ioaddr + EMAC_BASIC_CTL1); ++} ++ ++static void sun8i_dwmac_set_umac_addr(struct mac_device_info *hw, ++ unsigned char *addr, ++ unsigned int reg_n) ++{ ++ void __iomem *ioaddr = hw->pcsr; ++ u32 v; ++ ++ stmmac_set_mac_addr(ioaddr, addr, EMAC_MACADDR_HI(reg_n), ++ EMAC_MACADDR_LO(reg_n)); ++ if (reg_n > 0) { ++ v = readl(ioaddr + EMAC_MACADDR_HI(reg_n)); ++ v |= MAC_ADDR_TYPE_DST; ++ writel(v, ioaddr + EMAC_MACADDR_HI(reg_n)); ++ } ++} ++ ++static void sun8i_dwmac_get_umac_addr(struct mac_device_info *hw, ++ unsigned char *addr, ++ unsigned int reg_n) ++{ ++ void __iomem *ioaddr = hw->pcsr; ++ ++ stmmac_get_mac_addr(ioaddr, addr, EMAC_MACADDR_HI(reg_n), ++ EMAC_MACADDR_LO(reg_n)); ++} ++ ++/* caution this function must return non 0 to work */ ++static int sun8i_dwmac_rx_ipc_enable(struct mac_device_info *hw) ++{ ++ void __iomem *ioaddr = hw->pcsr; ++ u32 v; ++ ++ v = readl(ioaddr + EMAC_RX_CTL0); ++ v |= EMAC_RX_DO_CRC; ++ writel(v, ioaddr + EMAC_RX_CTL0); ++ ++ return 1; ++} ++ ++static void sun8i_dwmac_set_filter(struct mac_device_info *hw, ++ struct net_device *dev) ++{ ++ void __iomem *ioaddr = hw->pcsr; ++ u32 v; ++ int i = 0; ++ struct netdev_hw_addr *ha; ++ ++ v = readl(ioaddr + EMAC_RX_FRM_FLT); ++ ++ v |= EMAC_FRM_FLT_CTL; ++ ++ if (dev->flags & IFF_PROMISC) { ++ v = EMAC_FRM_FLT_RXALL; ++ } else if (dev->flags & IFF_ALLMULTI) { ++ v = EMAC_FRM_FLT_MULTICAST; ++ } else if (!netdev_mc_empty(dev)) { ++ netdev_for_each_mc_addr(ha, dev) { ++ i++; ++ sun8i_dwmac_set_umac_addr(hw, ha->addr, i); ++ } ++ } ++ ++ if (netdev_uc_count(dev) + i > hw->unicast_filter_entries) { ++ netdev_info(dev, "Too many address, switching to promiscuous\n"); ++ v = EMAC_FRM_FLT_RXALL; ++ } else { ++ netdev_for_each_uc_addr(ha, dev) { ++ i++; ++ sun8i_dwmac_set_umac_addr(hw, ha->addr, i); ++ } ++ } ++ writel(v, ioaddr + EMAC_RX_FRM_FLT); ++} ++ ++static void sun8i_dwmac_flow_ctrl(struct mac_device_info *hw, ++ unsigned int duplex, ++ unsigned int fc, unsigned int pause_time) ++{ ++ void __iomem *ioaddr = hw->pcsr; ++ u32 v; ++ ++ v = readl(ioaddr + EMAC_RX_CTL0); ++ if (fc == FLOW_AUTO) ++ v |= EMAC_RX_FLOW_CTL_EN; ++ else ++ v &= ~EMAC_RX_FLOW_CTL_EN; ++ writel(v, ioaddr + EMAC_RX_CTL0); ++ ++ v = readl(ioaddr + EMAC_TX_FLOW_CTL); ++ if (fc == FLOW_AUTO) ++ v |= EMAC_TX_FLOW_CTL_EN; ++ else ++ v &= ~EMAC_TX_FLOW_CTL_EN; ++ writel(v, ioaddr + EMAC_TX_FLOW_CTL); ++} ++ ++static int sun8i_dwmac_reset(struct stmmac_priv *priv) ++{ ++ u32 v; ++ int err; ++ ++ v = readl(priv->ioaddr + EMAC_BASIC_CTL1); ++ writel(v | 0x01, priv->ioaddr + EMAC_BASIC_CTL1); ++ ++ err = readl_poll_timeout(priv->ioaddr + EMAC_BASIC_CTL1, v, ++ !(v & 0x01), 100, 10000); ++ ++ if (err) { ++ dev_err(priv->device, "EMAC reset timeout\n"); ++ return -EFAULT; ++ } ++ return 0; ++} ++ ++static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv) ++{ ++ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; ++ struct device_node *node = priv->device->of_node; + int ret; + u32 reg, val; + -+ reg = priv->variant->default_syscon_value; ++ regmap_read(gmac->regmap, SYSCON_EMAC_REG, &val); ++ reg = gmac->variant->default_syscon_value; ++ if (reg != val) ++ dev_warn(priv->device, ++ "Current syscon value is not the default %x (expect %x)\n", ++ val, reg); + -+ if (priv->variant->internal_phy) { -+ if (!priv->use_internal_phy) { ++ if (gmac->variant->internal_phy) { ++ if (!gmac->use_internal_phy) { + /* switch to external PHY interface */ + reg &= ~H3_EPHY_SELECT; + } else { + reg |= H3_EPHY_SELECT; + reg &= ~H3_EPHY_SHUTDOWN; ++ dev_dbg(priv->device, "Select internal_phy %x\n", reg); + -+ if (of_property_read_bool(priv->phy_node, ++ if (of_property_read_bool(priv->plat->phy_node, + "allwinner,leds-active-low")) + reg |= H3_EPHY_LED_POL; ++ else ++ reg &= ~H3_EPHY_LED_POL; + -+ ret = of_mdio_parse_addr(priv->dev, priv->phy_node); ++ ret = of_mdio_parse_addr(priv->device, ++ priv->plat->phy_node); + if (ret < 0) { -+ netdev_err(ndev, "Could not parse MDIO addr\n"); ++ dev_err(priv->device, "Could not parse MDIO addr\n"); + return ret; + } + /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY @@ -1079,29 +982,35 @@ index 0000000..bc74467 + } + + if (!of_property_read_u32(node, "allwinner,tx-delay", &val)) { ++ dev_dbg(priv->device, "set tx-delay to %x\n", val); + if (val <= SYSCON_ETXDC_MASK) { + reg &= ~(SYSCON_ETXDC_MASK << SYSCON_ETXDC_SHIFT); + reg |= (val << SYSCON_ETXDC_SHIFT); + } else { -+ netdev_warn(ndev, "Invalid TX clock delay: %d\n", val); ++ dev_err(priv->device, "Invalid TX clock delay: %d\n", ++ val); ++ return -EINVAL; + } + } + + if (!of_property_read_u32(node, "allwinner,rx-delay", &val)) { ++ dev_dbg(priv->device, "set rx-delay to %x\n", val); + if (val <= SYSCON_ERXDC_MASK) { + reg &= ~(SYSCON_ERXDC_MASK << SYSCON_ERXDC_SHIFT); + reg |= (val << SYSCON_ERXDC_SHIFT); + } else { -+ netdev_warn(ndev, "Invalid RX clock delay: %d\n", val); ++ dev_err(priv->device, "Invalid RX clock delay: %d\n", ++ val); ++ return -EINVAL; + } + } + + /* Clear interface mode bits */ + reg &= ~(SYSCON_ETCS_MASK | SYSCON_EPIT); -+ if (priv->variant->support_rmii) ++ if (gmac->variant->support_rmii) + reg &= ~SYSCON_RMII_EN; + -+ switch (priv->phy_interface) { ++ switch (priv->plat->interface) { + case PHY_INTERFACE_MODE_MII: + /* default */ + break; @@ -1112,1402 +1021,483 @@ index 0000000..bc74467 + reg |= SYSCON_RMII_EN | SYSCON_ETCS_EXT_GMII; + break; + default: -+ netdev_err(ndev, "Unsupported interface mode: %s", -+ phy_modes(priv->phy_interface)); ++ dev_err(priv->device, "Unsupported interface mode: %s", ++ phy_modes(priv->plat->interface)); + return -EINVAL; + } + -+ regmap_write(priv->regmap, SYSCON_EMAC_REG, reg); ++ regmap_write(gmac->regmap, SYSCON_EMAC_REG, reg); + + return 0; +} + -+static void sun8i_emac_unset_syscon(struct net_device *ndev) ++static void sun8i_dwmac_unset_syscon(struct sunxi_priv_data *gmac) +{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ u32 reg = priv->variant->default_syscon_value; ++ u32 reg = gmac->variant->default_syscon_value; + -+ regmap_write(priv->regmap, SYSCON_EMAC_REG, reg); ++ regmap_write(gmac->regmap, SYSCON_EMAC_REG, reg); +} + -+/* Set Management Data Clock, must be call after device reset */ -+static void sun8i_emac_set_mdc(struct net_device *ndev) ++static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv) +{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ unsigned long rate; -+ u32 reg; -+ -+ rate = clk_get_rate(priv->ahb_clk); -+ if (rate > 160000000) -+ reg = 0x3 << 20; /* AHB / 128 */ -+ else if (rate > 80000000) -+ reg = 0x2 << 20; /* AHB / 64 */ -+ else if (rate > 40000000) -+ reg = 0x1 << 20; /* AHB / 32 */ -+ else -+ reg = 0x0 << 20; /* AHB / 16 */ -+ netif_dbg(priv, link, ndev, "MDC auto : %x\n", reg); -+ writel(reg, priv->base + EMAC_MDIO_CMD); -+} -+ -+/* "power" the device, by enabling clk/reset/regulators */ -+static int sun8i_emac_power(struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); ++ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; + int ret; + -+ ret = clk_prepare_enable(priv->ahb_clk); -+ if (ret) { -+ netdev_err(ndev, "Could not enable AHB clock\n"); ++ if (gmac->ephy_clk) { ++ ret = clk_prepare_enable(gmac->ephy_clk); ++ if (ret) { ++ dev_err(priv->device, "Cannot enable ephy\n"); ++ return ret; ++ } ++ } ++ ++ if (gmac->rst_ephy) { ++ ret = reset_control_deassert(gmac->rst_ephy); ++ if (ret) { ++ dev_err(priv->device, "Cannot deassert ephy\n"); ++ clk_disable_unprepare(gmac->ephy_clk); ++ return ret; ++ } ++ } ++ ++ return 0; ++} ++ ++static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac) ++{ ++ if (gmac->ephy_clk) ++ clk_disable_unprepare(gmac->ephy_clk); ++ if (gmac->rst_ephy) ++ reset_control_assert(gmac->rst_ephy); ++ return 0; ++} ++ ++static int sun8i_power_phy(struct stmmac_priv *priv) ++{ ++ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; ++ int ret; ++ ++ ret = sun8i_dwmac_power_internal_phy(priv); ++ if (ret) + return ret; -+ } + -+ if (priv->rst_mac) { -+ ret = reset_control_deassert(priv->rst_mac); -+ if (ret) { -+ netdev_err(ndev, "Could not deassert reset\n"); -+ goto err_reset; -+ } -+ } -+ -+ if (priv->ephy_clk) { -+ ret = clk_prepare_enable(priv->ephy_clk); -+ if (ret) { -+ netdev_err(ndev, "Could not enable EPHY clock\n"); -+ goto err_ephy_clk; -+ } -+ } -+ -+ if (priv->rst_ephy) { -+ ret = reset_control_deassert(priv->rst_ephy); -+ if (ret) { -+ netdev_err(ndev, "Could not deassert EPHY reset\n"); -+ goto err_ephy_reset; -+ } -+ } ++ ret = sun8i_dwmac_set_syscon(priv); ++ if (ret) ++ goto error_phy; + ++ ret = sun8i_dwmac_reset(priv); ++ if (ret) ++ goto error_phy; + return 0; + -+err_ephy_reset: -+ if (priv->ephy_clk) -+ clk_disable_unprepare(priv->ephy_clk); -+err_ephy_clk: -+ if (priv->rst_mac) -+ reset_control_assert(priv->rst_mac); -+err_reset: -+ clk_disable_unprepare(priv->ahb_clk); ++error_phy: ++ sun8i_dwmac_unset_syscon(gmac); ++ sun8i_dwmac_unpower_internal_phy(gmac); + return ret; +} + -+/* "Unpower" the device, disabling clocks and regulators, asserting reset */ -+static void sun8i_emac_unpower(struct net_device *ndev) ++static void sun8i_unpower_phy(struct sunxi_priv_data *gmac) +{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ -+ if (priv->rst_ephy) -+ reset_control_assert(priv->rst_ephy); -+ -+ if (priv->ephy_clk) -+ clk_disable_unprepare(priv->ephy_clk); -+ -+ if (priv->rst_mac) -+ reset_control_assert(priv->rst_mac); -+ -+ clk_disable_unprepare(priv->ahb_clk); ++ sun8i_dwmac_unset_syscon(gmac); ++ sun8i_dwmac_unpower_internal_phy(gmac); +} + -+static int sun8i_emac_init(struct net_device *ndev) ++static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv) +{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ struct device_node *node = priv->dev->of_node; -+ const u8 *addr; ++ struct sunxi_priv_data *gmac = priv; + -+ /* Try to get MAC address from DT, or assign a random one */ -+ addr = of_get_mac_address(node); -+ if (addr) -+ ether_addr_copy(ndev->dev_addr, addr); -+ else -+ eth_hw_addr_random(ndev); ++ sun8i_unpower_phy(gmac); + -+ return 0; ++ clk_disable_unprepare(gmac->tx_clk); ++ ++ if (gmac->regulator) ++ regulator_disable(gmac->regulator); +} + -+static int sun8i_emac_mdio_probe(struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ struct phy_device *phydev = NULL; -+ -+ phydev = of_phy_connect(ndev, priv->phy_node, &sun8i_emac_adjust_link, -+ 0, priv->phy_interface); -+ -+ if (!phydev) { -+ netdev_err(ndev, "Could not attach to PHY\n"); -+ return -ENODEV; -+ } -+ -+ phy_attached_info(phydev); -+ -+ /* mask with MAC supported features */ -+ phydev->supported &= PHY_GBIT_FEATURES; -+ phydev->advertising = phydev->supported; -+ -+ priv->link = 0; -+ priv->speed = 0; -+ priv->duplex = -1; -+ -+ return 0; -+} -+ -+/* Allocate both RX and TX ring buffer and init them -+ * This function also write the startbase of thoses ring in the device. -+ * All structures that help managing thoses rings are also handled -+ * by this functions (rx_skb/txl) -+ */ -+static int sun8i_emac_alloc_rings(struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ struct dma_desc *ddesc; -+ int err, i; -+ -+ priv->rx_skb = kcalloc(priv->nbdesc_rx, sizeof(struct sk_buff *), -+ GFP_KERNEL); -+ if (!priv->rx_skb) { -+ err = -ENOMEM; -+ goto rx_skb_error; -+ } -+ priv->txl = kcalloc(priv->nbdesc_tx, sizeof(struct txinfo), GFP_KERNEL); -+ if (!priv->txl) { -+ err = -ENOMEM; -+ goto tx_error; -+ } -+ -+ /* allocate/init RX ring */ -+ priv->dd_rx = dma_zalloc_coherent(priv->dev, -+ priv->nbdesc_rx * sizeof(struct dma_desc), -+ &priv->dd_rx_phy, GFP_KERNEL); -+ if (!priv->dd_rx) { -+ dev_err(priv->dev, "ERROR: cannot allocate DMA RX buffer"); -+ err = -ENOMEM; -+ goto dma_rx_error; -+ } -+ ddesc = priv->dd_rx; -+ for (i = 0; i < priv->nbdesc_rx; i++) { -+ sun8i_emac_rx_skb(ndev, i); -+ ddesc->next = cpu_to_le32(priv->dd_rx_phy + (i + 1) -+ * sizeof(struct dma_desc)); -+ ddesc++; -+ } -+ /* last descriptor point back to first one */ -+ ddesc--; -+ ddesc->next = cpu_to_le32(priv->dd_rx_phy); -+ -+ /* allocate/init TX ring */ -+ priv->dd_tx = dma_zalloc_coherent(priv->dev, -+ priv->nbdesc_tx * sizeof(struct dma_desc), -+ &priv->dd_tx_phy, GFP_KERNEL); -+ if (!priv->dd_tx) { -+ dev_err(priv->dev, "ERROR: cannot allocate DMA TX buffer"); -+ err = -ENOMEM; -+ goto dma_tx_error; -+ } -+ ddesc = priv->dd_tx; -+ for (i = 0; i < priv->nbdesc_tx; i++) { -+ ddesc->status = DCLEAN; -+ ddesc->ctl = 0; -+ ddesc->next = cpu_to_le32(priv->dd_tx_phy + (i + 1) -+ * sizeof(struct dma_desc)); -+ ddesc++; -+ } -+ /* last descriptor point back to first one */ -+ ddesc--; -+ ddesc->next = cpu_to_le32(priv->dd_tx_phy); -+ i--; -+ -+ priv->tx_slot = 0; -+ priv->tx_dirty = 0; -+ priv->rx_dirty = 0; -+ -+ /* write start of RX ring descriptor */ -+ writel(priv->dd_rx_phy, priv->base + EMAC_RX_DESC_LIST); -+ /* write start of TX ring descriptor */ -+ writel(priv->dd_tx_phy, priv->base + EMAC_TX_DESC_LIST); -+ -+ return 0; -+dma_tx_error: -+ dma_free_coherent(priv->dev, priv->nbdesc_rx * sizeof(struct dma_desc), -+ priv->dd_rx, priv->dd_rx_phy); -+dma_rx_error: -+ kfree(priv->txl); -+tx_error: -+ kfree(priv->rx_skb); -+rx_skb_error: -+ return err; -+} -+ -+static int sun8i_emac_open(struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ int err; -+ u32 v; -+ -+ err = sun8i_emac_power(ndev); -+ if (err) -+ return err; -+ -+ err = request_irq(priv->irq, sun8i_emac_dma_interrupt, 0, -+ dev_name(priv->dev), ndev); -+ if (err) { -+ dev_err(priv->dev, "Cannot request IRQ: %d\n", err); -+ goto err_power; -+ } -+ -+ /* Set interface mode (and configure internal PHY on H3) */ -+ err = sun8i_emac_set_syscon(ndev); -+ if (err) -+ goto err_irq; -+ -+ /* Do SOFT RST */ -+ v = readl(priv->base + EMAC_BASIC_CTL1); -+ writel(v | 0x01, priv->base + EMAC_BASIC_CTL1); -+ -+ err = readl_poll_timeout(priv->base + EMAC_BASIC_CTL1, v, -+ !(v & 0x01), 100, 10000); -+ if (err) { -+ dev_err(priv->dev, "EMAC reset timeout\n"); -+ err = -EFAULT; -+ goto err_syscon; -+ } -+ -+ sun8i_emac_set_mdc(ndev); -+ -+ err = sun8i_emac_mdio_register(ndev); -+ if (err) -+ goto err_syscon; -+ -+ err = sun8i_emac_mdio_probe(ndev); -+ if (err) -+ goto err_syscon; -+ -+ /* DMA */ -+ v = (8 << 24);/* burst len */ -+ writel(v, priv->base + EMAC_BASIC_CTL1); -+ -+ writel(EMAC_RX_INT | EMAC_TX_INT, priv->base + EMAC_INT_EN); -+ -+ v = readl(priv->base + EMAC_RX_CTL0); -+ /* CHECK_CRC */ -+ if (ndev->features & NETIF_F_RXCSUM) -+ v |= EMAC_RX_DO_CRC; -+ else -+ v &= ~EMAC_RX_DO_CRC; -+ /* STRIP_FCS */ -+ if (ndev->features & NETIF_F_RXFCS) -+ v &= ~EMAC_RX_STRIP_FCS; -+ else -+ v |= EMAC_RX_STRIP_FCS; -+ writel(v, priv->base + EMAC_RX_CTL0); -+ -+ v = readl(priv->base + EMAC_TX_CTL1); -+ /* TX_MD Transmission starts after a full frame located in TX DMA FIFO*/ -+ v |= BIT(1); -+ /* Undocumented bit (called TX_NEXT_FRM in BSP), the original comment is -+ * "Operating on second frame increase the performance -+ * especially when transmit store-and-forward is used." -+ */ -+ v |= BIT(2); -+ writel(v, priv->base + EMAC_TX_CTL1); -+ -+ v = readl(priv->base + EMAC_RX_CTL1); -+ /* RX_MD RX DMA reads data from RX DMA FIFO to host memory after a -+ * complete frame has been written to RX DMA FIFO -+ */ -+ v |= BIT(1); -+ writel(v, priv->base + EMAC_RX_CTL1); -+ -+ sun8i_emac_set_macaddr(priv, ndev->dev_addr, 0); -+ -+ err = sun8i_emac_alloc_rings(ndev); -+ if (err) { -+ netdev_err(ndev, "Fail to allocate rings\n"); -+ goto err_mdio; -+ } -+ -+ phy_start(ndev->phydev); -+ -+ sun8i_emac_start_rx(ndev); -+ sun8i_emac_start_tx(ndev); -+ -+ netif_napi_add(ndev, &priv->napi, sun8i_emac_poll, 64); -+ napi_enable(&priv->napi); -+ netif_start_queue(ndev); -+ -+ return 0; -+err_mdio: -+ phy_disconnect(ndev->phydev); -+err_syscon: -+ sun8i_emac_unset_syscon(ndev); -+err_irq: -+ free_irq(priv->irq, ndev); -+err_power: -+ sun8i_emac_unpower(ndev); -+ return err; -+} -+ -+/* Clean the TX ring of any accepted skb for xmit */ -+static void sun8i_emac_tx_clean(struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ int i; -+ struct dma_desc *ddesc; -+ int frame_len; -+ -+ for (i = 0; i < priv->nbdesc_tx; i++) { -+ if (priv->txl[i].skb) { -+ ddesc = priv->dd_tx + i; -+ frame_len = le32_to_cpu(ddesc->ctl) & 0x3FFF; -+ switch (priv->txl[i].map) { -+ case MAP_SINGLE: -+ dma_unmap_single(priv->dev, -+ le32_to_cpu(ddesc->buf_addr), -+ frame_len, DMA_TO_DEVICE); -+ break; -+ case MAP_PAGE: -+ dma_unmap_page(priv->dev, -+ le32_to_cpu(ddesc->buf_addr), -+ frame_len, DMA_TO_DEVICE); -+ break; -+ default: -+ dev_err(priv->dev, "Trying to free an empty slot\n"); -+ continue; -+ } -+ dev_kfree_skb_any(priv->txl[i].skb); -+ priv->txl[i].skb = NULL; -+ ddesc->ctl = 0; -+ ddesc->status = DCLEAN; -+ } -+ } -+ priv->tx_slot = 0; -+ priv->tx_dirty = 0; -+} -+ -+/* Clean the RX ring */ -+static void sun8i_emac_rx_clean(struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ int i; -+ struct dma_desc *ddesc; -+ -+ /* clean RX ring */ -+ for (i = 0; i < priv->nbdesc_rx; i++) -+ if (priv->rx_skb[i]) { -+ ddesc = priv->dd_rx + i; -+ dma_unmap_single(priv->dev, -+ le32_to_cpu(ddesc->buf_addr), -+ DESC_BUF_MAX, DMA_FROM_DEVICE); -+ dev_kfree_skb_any(priv->rx_skb[i]); -+ priv->rx_skb[i] = NULL; -+ } -+} -+ -+static int sun8i_emac_stop(struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ -+ napi_disable(&priv->napi); -+ -+ sun8i_emac_stop_tx(ndev); -+ sun8i_emac_stop_rx(ndev); -+ -+ phy_stop(ndev->phydev); -+ phy_disconnect(ndev->phydev); -+ -+ sun8i_emac_mdio_unregister(ndev); -+ -+ sun8i_emac_unset_syscon(ndev); -+ -+ free_irq(priv->irq, ndev); -+ -+ sun8i_emac_rx_clean(ndev); -+ sun8i_emac_tx_clean(ndev); -+ -+ kfree(priv->rx_skb); -+ kfree(priv->txl); -+ -+ dma_free_coherent(priv->dev, priv->nbdesc_rx * sizeof(struct dma_desc), -+ priv->dd_rx, priv->dd_rx_phy); -+ dma_free_coherent(priv->dev, priv->nbdesc_tx * sizeof(struct dma_desc), -+ priv->dd_tx, priv->dd_tx_phy); -+ -+ sun8i_emac_unpower(ndev); -+ -+ return 0; -+} -+ -+static netdev_tx_t sun8i_emac_xmit(struct sk_buff *skb, struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ struct dma_desc *ddesc; -+ struct dma_desc *first; -+ int i = 0, rbd_first; -+ unsigned int len, fraglen, tlen; -+ u32 v; -+ int n; -+ int nf; -+ const skb_frag_t *frag; -+ int do_csum = 0; -+ -+ if (skb_put_padto(skb, ETH_ZLEN)) -+ return NETDEV_TX_OK; -+ len = skb_headlen(skb); -+ -+ n = skb_shinfo(skb)->nr_frags; -+ -+ if (skb->ip_summed == CHECKSUM_PARTIAL) { -+ do_csum = 1; -+ priv->estats.tx_hw_csum++; -+ } -+ netif_dbg(priv, tx_queued, ndev, "%s len=%u skblen=%u %x\n", __func__, -+ len, skb->len, -+ (skb->ip_summed == CHECKSUM_PARTIAL)); -+ -+ /* check for contigous space -+ * We need at least 1(skb->data) + n(numfrags) + 1(one clean slot) -+ */ -+ if (rb_tx_numfreedesc(ndev) < n + 2) { -+ dev_err_ratelimited(priv->dev, "BUG!: TX is full %d %d\n", -+ priv->tx_dirty, priv->tx_slot); -+ netif_stop_queue(ndev); -+ return NETDEV_TX_BUSY; -+ } -+ i = priv->tx_slot; -+ -+ ddesc = priv->dd_tx + i; -+ first = priv->dd_tx + i; -+ rbd_first = i; -+ -+ ddesc->buf_addr = dma_map_single(priv->dev, skb->data, len, -+ DMA_TO_DEVICE); -+ if (dma_mapping_error(priv->dev, ddesc->buf_addr)) { -+ dev_err(priv->dev, "ERROR: Cannot map buffer for DMA\n"); -+ goto xmit_error; -+ } -+ /* We cannot direcly use cpu_to_le32() after dma_map_single -+ * since dma_mapping_error use it -+ */ -+ ddesc->buf_addr = cpu_to_le32(ddesc->buf_addr); -+ priv->txl[i].map = MAP_SINGLE; -+ priv->txl[i].skb = skb; -+ -+ tlen = len; -+ ddesc->ctl = le32_to_cpu(len); -+ /* Undocumented bit that make it works -+ * Without it, packets never be sent on H3 SoC -+ */ -+ ddesc->ctl |= EMAC_MAGIC_TX_BIT; -+ if (do_csum) -+ ddesc->ctl |= EMAC_TX_DO_CRC; -+ -+ /* handle fragmented skb, one descriptor per fragment */ -+ for (nf = 0; nf < n; nf++) { -+ frag = &skb_shinfo(skb)->frags[nf]; -+ rb_inc(&i, priv->nbdesc_tx); -+ priv->txl[i].skb = skb; -+ ddesc = priv->dd_tx + i; -+ fraglen = skb_frag_size(frag); -+ ddesc->ctl = le32_to_cpu(fraglen); -+ tlen += fraglen, -+ ddesc->ctl |= EMAC_MAGIC_TX_BIT; -+ if (do_csum) -+ ddesc->ctl |= EMAC_TX_DO_CRC; -+ -+ ddesc->buf_addr = skb_frag_dma_map(priv->dev, frag, 0, -+ fraglen, DMA_TO_DEVICE); -+ if (dma_mapping_error(priv->dev, ddesc->buf_addr)) { -+ dev_err(priv->dev, "Cannot map buffer for DMA\n"); -+ goto xmit_error; -+ } -+ /* Cannot directly use cpu_to_le32() after skb_frag_dma_map -+ * since dma_mapping_error use it -+ */ -+ ddesc->buf_addr = cpu_to_le32(ddesc->buf_addr); -+ priv->txl[i].map = MAP_PAGE; -+ ddesc->status = EMAC_COULD_BE_USED_BY_DMA; -+ } -+ -+ /* frame end */ -+ ddesc->ctl |= EMAC_DSC_TX_LAST; -+ /* We want an interrupt after transmission */ -+ ddesc->ctl |= EMAC_WANT_INT; -+ -+ rb_inc(&i, priv->nbdesc_tx); -+ -+ /* This line was previously after DMA start, but with that we hit a -+ * small race with complete_xmit() where we complete more data than -+ * sent. -+ * The packet is sent just after EMAC_COULD_BE_USED_BY_DMA flag set and -+ * complete_xmit fire just after before netdev_sent_queue(). -+ * This race could be observed only when overflowing a gigabit line. -+ */ -+ netdev_sent_queue(ndev, skb->len); -+ -+ /* frame begin */ -+ first->ctl |= EMAC_DSC_TX_FIRST; -+ wmb();/* EMAC_COULD_BE_USED_BY_DMA must be the last value written */ -+ first->status = EMAC_COULD_BE_USED_BY_DMA; -+ priv->tx_slot = i; -+ -+ /* Trying to optimize this (recording DMA start/stop) seems -+ * to lead to errors. So we always start DMA. -+ */ -+ v = readl(priv->base + EMAC_TX_CTL1); -+ v |= EMAC_TX_DMA_START; -+ v |= EMAC_TX_DMA_EN; -+ writel_relaxed(v, priv->base + EMAC_TX_CTL1); -+ -+ if (rb_tx_numfreedesc(ndev) < MAX_SKB_FRAGS + 1) { -+ netif_stop_queue(ndev); -+ priv->estats.tx_stop_queue++; -+ } -+ priv->estats.tx_used_desc = rb_tx_numfreedesc(ndev); -+ priv->ndev->stats.tx_packets++; -+ priv->ndev->stats.tx_bytes += tlen; -+ -+ return NETDEV_TX_OK; -+ -+xmit_error: -+ /* destroy skb and return TX OK Documentation/DMA-API-HOWTO.txt */ -+ /* clean descritors from rbd_first to i */ -+ ddesc->ctl = 0; -+ /* setting status to DCLEAN is the last value to be set */ -+ wmb(); -+ ddesc->status = DCLEAN; -+ do { -+ ddesc = priv->dd_tx + rbd_first; -+ ddesc->ctl = 0; -+ /* setting status to DCLEAN is the last value to be set */ -+ wmb(); -+ ddesc->status = DCLEAN; -+ rb_inc(&rbd_first, priv->nbdesc_tx); -+ } while (rbd_first != i); -+ dev_kfree_skb_any(skb); -+ return NETDEV_TX_OK; -+} -+ -+static int sun8i_emac_change_mtu(struct net_device *ndev, int new_mtu) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ int max_mtu; -+ -+ dev_info(priv->dev, "%s set MTU to %d\n", __func__, new_mtu); -+ -+ if (netif_running(ndev)) { -+ dev_err(priv->dev, "%s: must be stopped to change its MTU\n", -+ ndev->name); -+ return -EBUSY; -+ } -+ -+ max_mtu = SKB_MAX_HEAD(NET_SKB_PAD + NET_IP_ALIGN); -+ -+ if ((new_mtu < 68) || (new_mtu > max_mtu)) { -+ dev_err(priv->dev, "%s: invalid MTU, max MTU is: %d\n", -+ ndev->name, max_mtu); -+ return -EINVAL; -+ } -+ -+ ndev->mtu = new_mtu; -+ netdev_update_features(ndev); -+ return 0; -+} -+ -+static int sun8i_emac_set_features(struct net_device *ndev, -+ netdev_features_t features) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ u32 v; -+ -+ v = readl(priv->base + EMAC_BASIC_CTL0); -+ if (features & NETIF_F_LOOPBACK && netif_running(ndev)) { -+ netif_info(priv, hw, ndev, "Set loopback features"); -+ v |= BIT(1); -+ } else { -+ netif_info(priv, hw, ndev, "Unset loopback features"); -+ v &= ~BIT(1); -+ } -+ writel(v, priv->base + EMAC_BASIC_CTL0); -+ -+ v = readl(priv->base + EMAC_RX_CTL0); -+ if (features & NETIF_F_RXCSUM) { -+ v |= EMAC_RX_DO_CRC; -+ netif_info(priv, hw, ndev, "Doing RX CRC check by hardware"); -+ } else { -+ v &= ~EMAC_RX_DO_CRC; -+ netif_info(priv, hw, ndev, "No RX CRC check by hardware"); -+ } -+ if (features & NETIF_F_RXFCS) { -+ v &= ~EMAC_RX_STRIP_FCS; -+ netif_info(priv, hw, ndev, "Keep FCS"); -+ } else { -+ v |= EMAC_RX_STRIP_FCS; -+ netif_info(priv, hw, ndev, "Strip FCS"); -+ } -+ writel(v, priv->base + EMAC_RX_CTL0); -+ -+ netif_dbg(priv, drv, ndev, "%s %llx %x\n", __func__, features, v); -+ -+ return 0; -+} -+ -+static void sun8i_emac_set_rx_mode(struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ u32 v = 0; -+ int i = 0; -+ struct netdev_hw_addr *ha; -+ -+ /* Receive all multicast frames */ -+ v |= BIT(16); -+ /* Receive all control frames */ -+ v |= BIT(13); -+ if (ndev->flags & IFF_PROMISC) -+ v |= BIT(1); -+ if (netdev_uc_count(ndev) > 7) { -+ v |= BIT(1); -+ } else { -+ netdev_for_each_uc_addr(ha, ndev) { -+ i++; -+ sun8i_emac_set_macaddr(priv, ha->addr, i); -+ } -+ } -+ writel(v, priv->base + EMAC_RX_FRM_FLT); -+} -+ -+static void sun8i_emac_tx_timeout(struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ -+ netdev_err(ndev, "%s\n", __func__); -+ -+ sun8i_emac_stop_tx(ndev); -+ -+ sun8i_emac_tx_clean(ndev); -+ -+ /* write start of the new TX ring descriptor */ -+ writel(priv->dd_tx_phy, priv->base + EMAC_TX_DESC_LIST); -+ -+ sun8i_emac_start_tx(ndev); -+ -+ netdev_reset_queue(ndev); -+ -+ priv->estats.tx_timeout++; -+ ndev->stats.tx_errors++; -+ netif_wake_queue(ndev); -+} -+ -+static int sun8i_emac_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd) -+{ -+ struct phy_device *phydev = ndev->phydev; -+ -+ if (!netif_running(ndev)) -+ return -EINVAL; -+ -+ if (!phydev) -+ return -ENODEV; -+ -+ return phy_mii_ioctl(phydev, rq, cmd); -+} -+ -+static int sun8i_emac_check_if_running(struct net_device *ndev) -+{ -+ if (!netif_running(ndev)) -+ return -EINVAL; -+ return 0; -+} -+ -+static int sun8i_emac_get_sset_count(struct net_device *ndev, int sset) -+{ -+ switch (sset) { -+ case ETH_SS_STATS: -+ return ARRAY_SIZE(estats_str); -+ } -+ return -EOPNOTSUPP; -+} -+ -+static int sun8i_emac_ethtool_get_settings(struct net_device *ndev, -+ struct ethtool_cmd *cmd) -+{ -+ struct phy_device *phy = ndev->phydev; -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ -+ if (!phy) { -+ netdev_err(ndev, "%s: %s: PHY is not registered\n", -+ __func__, ndev->name); -+ return -ENODEV; -+ } -+ -+ if (!netif_running(ndev)) { -+ dev_err(priv->dev, "interface disabled: we cannot track link speed / duplex setting\n"); -+ return -EBUSY; -+ } -+ -+ return phy_ethtool_gset(phy, cmd); -+} -+ -+static int sun8i_emac_ethtool_set_settings(struct net_device *ndev, -+ struct ethtool_cmd *cmd) -+{ -+ struct phy_device *phy = ndev->phydev; -+ -+ return phy_ethtool_sset(phy, cmd); -+} -+ -+static void sun8i_emac_ethtool_getdrvinfo(struct net_device *ndev, -+ struct ethtool_drvinfo *info) -+{ -+ strlcpy(info->driver, "sun8i_emac", sizeof(info->driver)); -+ strcpy(info->version, "00"); -+ info->fw_version[0] = '\0'; -+} -+ -+static void sun8i_emac_ethtool_stats(struct net_device *ndev, -+ struct ethtool_stats *dummy, u64 *data) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ -+ memcpy(data, &priv->estats, -+ sun8i_emac_get_sset_count(ndev, ETH_SS_STATS) * sizeof(u64)); -+} -+ -+static void sun8i_emac_ethtool_strings(struct net_device *dev, u32 stringset, -+ u8 *buffer) -+{ -+ switch (stringset) { -+ case ETH_SS_STATS: -+ memcpy(buffer, &estats_str, sizeof(estats_str)); -+ break; -+ } -+} -+ -+static u32 sun8i_emac_ethtool_getmsglevel(struct net_device *ndev) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ -+ return priv->msg_enable; -+} -+ -+static void sun8i_emac_ethtool_setmsglevel(struct net_device *ndev, u32 level) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ -+ priv->msg_enable = level; -+} -+ -+static void sun8i_emac_get_pauseparam(struct net_device *ndev, -+ struct ethtool_pauseparam *pause) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ -+ pause->rx_pause = 0; -+ pause->tx_pause = 0; -+ pause->autoneg = ndev->phydev->autoneg; -+ -+ if (priv->flow_ctrl & EMAC_FLOW_RX) -+ pause->rx_pause = 1; -+ if (priv->flow_ctrl & EMAC_FLOW_TX) -+ pause->tx_pause = 1; -+} -+ -+static int sun8i_emac_set_pauseparam(struct net_device *ndev, -+ struct ethtool_pauseparam *pause) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ struct phy_device *phy = ndev->phydev; -+ int new_pause = 0; -+ int ret = 0; -+ -+ if (pause->rx_pause) -+ new_pause |= EMAC_FLOW_RX; -+ if (pause->tx_pause) -+ new_pause |= EMAC_FLOW_TX; -+ -+ priv->flow_ctrl = new_pause; -+ phy->autoneg = pause->autoneg; -+ -+ if (phy->autoneg) { -+ if (netif_running(ndev)) -+ ret = phy_start_aneg(phy); -+ } else { -+ sun8i_emac_flow_ctrl(priv, phy->duplex, priv->flow_ctrl); -+ } -+ return ret; -+} -+ -+static void sun8i_emac_ethtool_get_ringparam(struct net_device *ndev, -+ struct ethtool_ringparam *ring) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ -+ ring->rx_pending = priv->nbdesc_rx; -+ ring->tx_pending = priv->nbdesc_tx; -+} -+ -+static int sun8i_emac_ethtool_set_ringparam(struct net_device *ndev, -+ struct ethtool_ringparam *ring) -+{ -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ int err; -+ -+ if (ring->rx_max_pending || ring->rx_mini_max_pending || -+ ring->rx_jumbo_max_pending || ring->rx_mini_pending || -+ ring->rx_jumbo_pending || ring->tx_max_pending) -+ return -EINVAL; -+ -+ if (ring->tx_pending < MAX_SKB_FRAGS + 1) { -+ netdev_err(ndev, "The number of TX descriptors is too low"); -+ return -EINVAL; -+ } -+ -+ sun8i_emac_stop_tx(ndev); -+ sun8i_emac_stop_rx(ndev); -+ -+ sun8i_emac_rx_clean(ndev); -+ sun8i_emac_tx_clean(ndev); -+ -+ kfree(priv->rx_skb); -+ kfree(priv->txl); -+ -+ dma_free_coherent(priv->dev, priv->nbdesc_rx * sizeof(struct dma_desc), -+ priv->dd_rx, priv->dd_rx_phy); -+ dma_free_coherent(priv->dev, priv->nbdesc_tx * sizeof(struct dma_desc), -+ priv->dd_tx, priv->dd_tx_phy); -+ -+ priv->nbdesc_rx = ring->rx_pending; -+ priv->nbdesc_tx = ring->tx_pending; -+ err = sun8i_emac_alloc_rings(ndev); -+ if (err) { -+ /* Fatal error, we cannot re start */ -+ netdev_err(ndev, "Fail to allocate rings\n"); -+ return -EFAULT; -+ } -+ -+ sun8i_emac_start_rx(ndev); -+ sun8i_emac_start_tx(ndev); -+ -+ netif_start_queue(ndev); -+ -+ netdev_info(ndev, "Ring Param settings: rx: %d, tx %d\n", -+ ring->rx_pending, ring->tx_pending); -+ return 0; -+} -+ -+static const struct ethtool_ops sun8i_emac_ethtool_ops = { -+ .begin = sun8i_emac_check_if_running, -+ .get_settings = sun8i_emac_ethtool_get_settings, -+ .set_settings = sun8i_emac_ethtool_set_settings, -+ .get_link = ethtool_op_get_link, -+ .get_pauseparam = sun8i_emac_get_pauseparam, -+ .set_pauseparam = sun8i_emac_set_pauseparam, -+ .get_ethtool_stats = sun8i_emac_ethtool_stats, -+ .get_strings = sun8i_emac_ethtool_strings, -+ .get_sset_count = sun8i_emac_get_sset_count, -+ .get_drvinfo = sun8i_emac_ethtool_getdrvinfo, -+ .get_msglevel = sun8i_emac_ethtool_getmsglevel, -+ .set_msglevel = sun8i_emac_ethtool_setmsglevel, -+ .get_ringparam = sun8i_emac_ethtool_get_ringparam, -+ .set_ringparam = sun8i_emac_ethtool_set_ringparam, ++static const struct stmmac_ops sun8i_dwmac_ops = { ++ .core_init = sun8i_dwmac_core_init, ++ .dump_regs = sun8i_dwmac_dump_mac_regs, ++ .rx_ipc = sun8i_dwmac_rx_ipc_enable, ++ .set_filter = sun8i_dwmac_set_filter, ++ .flow_ctrl = sun8i_dwmac_flow_ctrl, ++ .set_umac_addr = sun8i_dwmac_set_umac_addr, ++ .get_umac_addr = sun8i_dwmac_get_umac_addr, +}; + -+static const struct net_device_ops sun8i_emac_netdev_ops = { -+ .ndo_init = sun8i_emac_init, -+ .ndo_open = sun8i_emac_open, -+ .ndo_start_xmit = sun8i_emac_xmit, -+ .ndo_stop = sun8i_emac_stop, -+ .ndo_change_mtu = sun8i_emac_change_mtu, -+ .ndo_set_features = sun8i_emac_set_features, -+ .ndo_set_rx_mode = sun8i_emac_set_rx_mode, -+ .ndo_tx_timeout = sun8i_emac_tx_timeout, -+ .ndo_do_ioctl = sun8i_emac_ioctl, -+ .ndo_set_mac_address = eth_mac_addr, -+}; -+ -+/* No locking in this function since it is guaranteed to be run once and -+ * do actions only done here: -+ * - Scheduling NAPI -+ * - Stopping interrupts -+ * - Updating stats -+ * -+ * Even when not enabled via EMAC_INT_EN, some interrupt could fire, so we need -+ * to handle all of them. -+ * Interrupts know to fire when not enabled are: -+ * - EMAC_TX_DMA_STOP_INT -+ * - EMAC_TX_BUF_UA_INT -+ * - EMAC_TX_EARLY_INT -+ * - EMAC_RX_BUF_UA_INT -+ * - EMAC_RX_EARLY_INT -+ */ -+static irqreturn_t sun8i_emac_dma_interrupt(int irq, void *dev_id) ++static struct mac_device_info *sun8i_dwmac_setup(struct stmmac_priv *priv) +{ -+ struct net_device *ndev = dev_id; -+ struct sun8i_emac_priv *priv = netdev_priv(ndev); -+ u32 v, u; -+ -+ v = readl(priv->base + EMAC_INT_STA); -+ -+ /* When this bit is asserted, a frame transmission is completed. */ -+ if (v & EMAC_TX_INT) { -+ priv->estats.tx_int++; -+ writel(0, priv->base + EMAC_INT_EN); -+ napi_schedule(&priv->napi); -+ } -+ -+ /* When this bit is asserted, the TX DMA FSM is stopped. -+ * For the moment only a call to tx_timeout cause this interrupt -+ * to fire. -+ */ -+ if (v & EMAC_TX_DMA_STOP_INT) -+ priv->estats.tx_dma_stop++; -+ -+ /* When this asserted, the TX DMA can not acquire next TX descriptor -+ * and TX DMA FSM is suspended. -+ */ -+ if (v & EMAC_TX_BUF_UA_INT) { -+ priv->estats.tx_dma_ua++; -+ writel(0, priv->base + EMAC_INT_EN); -+ napi_schedule(&priv->napi); -+ } -+ -+ if (v & EMAC_TX_TIMEOUT_INT) -+ priv->estats.tx_timeout_int++; -+ -+ if (v & EMAC_TX_UNDERFLOW_INT) -+ priv->estats.tx_underflow_int++; -+ -+ /* When this bit asserted , the frame is transmitted to FIFO totally. */ -+ if (v & EMAC_TX_EARLY_INT) -+ priv->estats.tx_early_int++; -+ -+ /* When this bit is asserted, a frame reception is completed */ -+ if (v & EMAC_RX_INT) { -+ priv->estats.rx_int++; -+ writel(0, priv->base + EMAC_INT_EN); -+ napi_schedule(&priv->napi); -+ } -+ -+ /* When this asserted, the RX DMA can not acquire next RX descriptor -+ * and RX DMA FSM is suspended. -+ */ -+ if (v & EMAC_RX_BUF_UA_INT) { -+ u = readl(priv->base + EMAC_RX_CTL1); -+ writel(u | EMAC_RX_DMA_START, priv->base + EMAC_RX_CTL1); -+ priv->estats.rx_dma_ua++; -+ } -+ -+ /* Same as TX DMA STOP, but never hit it */ -+ if (v & EMAC_RX_DMA_STOP_INT) -+ priv->estats.rx_dma_stop++; -+ -+ if (v & EMAC_RX_TIMEOUT_INT) -+ priv->estats.rx_timeout_int++; -+ -+ if (v & EMAC_RX_OVERFLOW_INT) -+ priv->estats.rx_overflow_int++; -+ -+ if (v & EMAC_RX_EARLY_INT) -+ priv->estats.rx_early_int++; -+ -+ if (v & EMAC_RGMII_STA_INT) -+ priv->estats.rgmii_state_int++; -+ -+ /* the datasheet state those register as read-only -+ * but nothing work(freeze) without writing to it -+ */ -+ writel(v, priv->base + EMAC_INT_STA); -+ -+ return IRQ_HANDLED; -+} -+ -+static int sun8i_emac_probe(struct platform_device *pdev) -+{ -+ struct device_node *node = pdev->dev.of_node; -+ struct sun8i_emac_priv *priv; -+ struct net_device *ndev; -+ struct resource *res; ++ struct mac_device_info *mac; + int ret; + -+ ndev = alloc_etherdev(sizeof(*priv)); -+ if (!ndev) ++ mac = devm_kzalloc(priv->device, sizeof(*mac), GFP_KERNEL); ++ if (!mac) ++ return NULL; ++ ++ ret = sun8i_power_phy(priv); ++ if (ret) ++ return NULL; ++ ++ mac->pcsr = priv->ioaddr; ++ mac->mac = &sun8i_dwmac_ops; ++ mac->dma = &sun8i_dwmac_dma_ops; ++ ++ mac->link.port = 0; ++ mac->link.duplex = BIT(0); ++ mac->link.speed = 1; ++ mac->mii.addr = EMAC_MDIO_CMD; ++ mac->mii.data = EMAC_MDIO_DATA; ++ mac->mii.reg_shift = 4; ++ mac->mii.reg_mask = GENMASK(8, 4); ++ mac->mii.addr_shift = 12; ++ mac->mii.addr_mask = GENMASK(16, 12); ++ mac->mii.clk_csr_shift = 20; ++ mac->mii.clk_csr_mask = GENMASK(22, 20); ++ mac->unicast_filter_entries = 8; ++ ++ /* Synopsys Id is not available */ ++ priv->synopsys_id = 0; ++ ++ return mac; ++} ++ ++static int sun8i_dwmac_probe(struct platform_device *pdev) ++{ ++ struct plat_stmmacenet_data *plat_dat; ++ struct stmmac_resources stmmac_res; ++ struct sunxi_priv_data *gmac; ++ struct device *dev = &pdev->dev; ++ int ret; ++ ++ ret = stmmac_get_platform_resources(pdev, &stmmac_res); ++ if (ret) ++ return ret; ++ ++ plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac); ++ if (IS_ERR(plat_dat)) ++ return PTR_ERR(plat_dat); ++ ++ gmac = devm_kzalloc(dev, sizeof(*gmac), GFP_KERNEL); ++ if (!gmac) + return -ENOMEM; + -+ SET_NETDEV_DEV(ndev, &pdev->dev); -+ priv = netdev_priv(ndev); -+ platform_set_drvdata(pdev, ndev); -+ -+ priv->variant = of_device_get_match_data(&pdev->dev); -+ if (!priv->variant) { ++ gmac->variant = of_device_get_match_data(&pdev->dev); ++ if (!gmac->variant) { + dev_err(&pdev->dev, "Missing sun8i-emac variant\n"); + return -EINVAL; + } + -+ priv->mdio_node = of_get_child_by_name(node, "mdio"); -+ if (!priv->mdio_node) { -+ netdev_err(ndev, "Could not find a MDIO node\n"); -+ return -EINVAL; ++ gmac->tx_clk = devm_clk_get(dev, "stmmaceth"); ++ if (IS_ERR(gmac->tx_clk)) { ++ dev_err(dev, "could not get tx clock\n"); ++ return PTR_ERR(gmac->tx_clk); + } + -+ priv->phy_node = of_parse_phandle(node, "phy-handle", 0); -+ if (!priv->phy_node) { -+ netdev_err(ndev, "No associated PHY\n"); -+ return -EINVAL; ++ /* Optional regulator for PHY */ ++ gmac->regulator = devm_regulator_get_optional(dev, "phy"); ++ if (IS_ERR(gmac->regulator)) { ++ if (PTR_ERR(gmac->regulator) == -EPROBE_DEFER) ++ return -EPROBE_DEFER; ++ dev_info(dev, "no regulator found\n"); ++ gmac->regulator = NULL; + } + -+ priv->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, ++ gmac->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, + "syscon"); -+ if (IS_ERR(priv->regmap)) { -+ ret = PTR_ERR(priv->regmap); ++ if (IS_ERR(gmac->regmap)) { ++ ret = PTR_ERR(gmac->regmap); + dev_err(&pdev->dev, "unable to map SYSCON:%d\n", ret); + return ret; + } + -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ priv->base = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(priv->base)) { -+ ret = PTR_ERR(priv->base); -+ dev_err(&pdev->dev, "Cannot request MMIO: %d\n", ret); -+ return ret; -+ } -+ -+ priv->ahb_clk = devm_clk_get(&pdev->dev, "ahb"); -+ if (IS_ERR(priv->ahb_clk)) { -+ ret = PTR_ERR(priv->ahb_clk); -+ dev_err(&pdev->dev, "Cannot get AHB clock err=%d\n", ret); -+ goto probe_err; -+ } -+ -+ priv->rst_mac = devm_reset_control_get_optional(&pdev->dev, "ahb"); -+ if (IS_ERR(priv->rst_mac)) { -+ ret = PTR_ERR(priv->rst_mac); -+ if (ret == -EPROBE_DEFER) -+ return -EPROBE_DEFER; -+ dev_info(&pdev->dev, "No MAC reset control found %d\n", ret); -+ priv->rst_mac = NULL; -+ } -+ -+ priv->phy_interface = of_get_phy_mode(node); -+ if (priv->phy_interface < 0) { -+ netdev_err(ndev, "PHY interface mode node unspecified\n"); -+ return priv->phy_interface; -+ } -+ -+ switch (priv->phy_interface) { -+ case PHY_INTERFACE_MODE_MII: -+ if (!priv->variant->support_mii) -+ return -EINVAL; -+ break; -+ case PHY_INTERFACE_MODE_RMII: -+ if (!priv->variant->support_rmii) -+ return -EINVAL; -+ break; -+ case PHY_INTERFACE_MODE_RGMII: -+ if (!priv->variant->support_rgmii) -+ return -EINVAL; -+ break; -+ default: -+ netdev_err(ndev, "Unsupported interface mode: %s", -+ phy_modes(priv->phy_interface)); -+ return -EINVAL; -+ } -+ -+ if (priv->phy_interface == priv->variant->internal_phy) -+ priv->use_internal_phy = true; -+ -+ if (priv->use_internal_phy) { -+ priv->ephy_clk = of_clk_get(priv->phy_node, 0); -+ if (IS_ERR(priv->ephy_clk)) { -+ ret = PTR_ERR(priv->ephy_clk); ++ plat_dat->interface = of_get_phy_mode(dev->of_node); ++ if (plat_dat->interface == gmac->variant->internal_phy) { ++ dev_info(&pdev->dev, "Will use internal PHY\n"); ++ gmac->use_internal_phy = true; ++ gmac->ephy_clk = of_clk_get(plat_dat->phy_node, 0); ++ if (IS_ERR(gmac->ephy_clk)) { ++ ret = PTR_ERR(gmac->ephy_clk); + dev_err(&pdev->dev, "Cannot get EPHY clock err=%d\n", + ret); -+ goto probe_err; ++ return -EINVAL; + } + -+ priv->rst_ephy = of_reset_control_get(priv->phy_node, 0); -+ if (IS_ERR(priv->rst_ephy)) { -+ ret = PTR_ERR(priv->rst_ephy); ++ gmac->rst_ephy = of_reset_control_get(plat_dat->phy_node, NULL); ++ if (IS_ERR(gmac->rst_ephy)) { ++ ret = PTR_ERR(gmac->rst_ephy); + if (ret == -EPROBE_DEFER) -+ goto probe_err; -+ dev_info(&pdev->dev, -+ "No EPHY reset control found %d\n", ret); -+ priv->rst_ephy = NULL; ++ return ret; ++ dev_err(&pdev->dev, "No EPHY reset control found %d\n", ++ ret); ++ return -EINVAL; + } ++ } else { ++ dev_info(&pdev->dev, "Will use external PHY\n"); ++ gmac->use_internal_phy = false; + } + -+ priv->irq = platform_get_irq(pdev, 0); -+ if (priv->irq < 0) { -+ ret = priv->irq; -+ dev_err(&pdev->dev, "Cannot claim IRQ: %d\n", ret); -+ goto probe_err; -+ } -+ -+ spin_lock_init(&priv->tx_lock); -+ -+ ndev->netdev_ops = &sun8i_emac_netdev_ops; -+ ndev->ethtool_ops = &sun8i_emac_ethtool_ops; -+ -+ priv->ndev = ndev; -+ priv->dev = &pdev->dev; -+ -+ ndev->hw_features = NETIF_F_SG | NETIF_F_HIGHDMA; -+ ndev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | -+ NETIF_F_RXCSUM; -+ ndev->features |= ndev->hw_features; -+ ndev->hw_features |= NETIF_F_RXFCS; -+ ndev->hw_features |= NETIF_F_RXALL; -+ ndev->hw_features |= NETIF_F_LOOPBACK; -+ ndev->priv_flags |= IFF_UNICAST_FLT; -+ -+ ndev->watchdog_timeo = msecs_to_jiffies(5000); -+ netif_carrier_off(ndev); -+ -+ /* Benched on OPIPC with 100M, setting more than 256 does not give any -+ * perf boost ++ /* platform data specifying hardware features and callbacks. ++ * hardware features were copied from Allwinner drivers. + */ -+ priv->nbdesc_rx = 128; -+ priv->nbdesc_tx = 256; ++ plat_dat->rx_coe = STMMAC_RX_COE_TYPE2; ++ plat_dat->tx_coe = 1; ++ plat_dat->has_sun8i = true; ++ plat_dat->bsp_priv = gmac; ++ plat_dat->init = sun8i_dwmac_init; ++ plat_dat->exit = sun8i_dwmac_exit; ++ plat_dat->setup = sun8i_dwmac_setup; + -+ ret = register_netdev(ndev); -+ if (ret) { -+ dev_err(&pdev->dev, "ERROR: Register %s failed\n", ndev->name); -+ goto probe_err; -+ } ++ ret = sun8i_dwmac_init(pdev, plat_dat->bsp_priv); ++ if (ret) ++ return ret; + -+ return 0; ++ ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); ++ if (ret) ++ sun8i_dwmac_exit(pdev, plat_dat->bsp_priv); + -+probe_err: -+ free_netdev(ndev); + return ret; +} + -+static int sun8i_emac_remove(struct platform_device *pdev) -+{ -+ struct net_device *ndev = platform_get_drvdata(pdev); -+ -+ unregister_netdev(ndev); -+ platform_set_drvdata(pdev, NULL); -+ free_netdev(ndev); -+ -+ return 0; -+} -+ -+static const struct of_device_id sun8i_emac_of_match_table[] = { -+ { .compatible = "allwinner,sun8i-a83t-emac", -+ .data = &emac_variant_a83t }, ++static const struct of_device_id sun8i_dwmac_match[] = { + { .compatible = "allwinner,sun8i-h3-emac", -+ .data = &emac_variant_h3 }, ++ .data = &emac_variant_h3 }, ++ { .compatible = "allwinner,sun8i-a83t-emac", ++ .data = &emac_variant_a83t }, + { .compatible = "allwinner,sun50i-a64-emac", -+ .data = &emac_variant_a64 }, -+ {} ++ .data = &emac_variant_a64 }, ++ { } +}; -+MODULE_DEVICE_TABLE(of, sun8i_emac_of_match_table); ++MODULE_DEVICE_TABLE(of, sun8i_dwmac_match); + -+static struct platform_driver sun8i_emac_driver = { -+ .probe = sun8i_emac_probe, -+ .remove = sun8i_emac_remove, -+ .driver = { -+ .name = "sun8i-emac", -+ .of_match_table = sun8i_emac_of_match_table, ++static struct platform_driver sun8i_dwmac_driver = { ++ .probe = sun8i_dwmac_probe, ++ .remove = stmmac_pltfr_remove, ++ .driver = { ++ .name = "sun8i-dwmac", ++ .pm = &stmmac_pltfr_pm_ops, ++ .of_match_table = sun8i_dwmac_match, + }, +}; ++module_platform_driver(sun8i_dwmac_driver); + -+module_platform_driver(sun8i_emac_driver); -+ -+MODULE_DESCRIPTION("sun8i Ethernet driver"); ++MODULE_AUTHOR("Corentin Labbe "); ++MODULE_DESCRIPTION("Allwinner sun8i DWMAC specific glue layer"); +MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Corentin Labbe -Date: Fri, 7 Oct 2016 10:25:49 +0200 -Subject: [PATCH 2/8] MAINTAINERS: Add myself as maintainer of sun8i-emac - -This patch add myself as maintainer of the sun8i-emac driver. - -Signed-off-by: Corentin Labbe ---- - MAINTAINERS | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/MAINTAINERS b/MAINTAINERS -index 411e3b8..e99a087 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -590,6 +590,12 @@ S: Maintained - F: Documentation/i2c/busses/i2c-ali1563 - F: drivers/i2c/busses/i2c-ali1563.c +diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +index 856ac57..05e8018 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +@@ -177,6 +177,17 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv) + else if ((clk_rate >= CSR_F_250M) && (clk_rate < CSR_F_300M)) + priv->clk_csr = STMMAC_CSR_250_300M; + } ++ ++ if (priv->plat->has_sun8i) { ++ if (clk_rate > 160000000) ++ priv->clk_csr = 0x03; ++ else if (clk_rate > 80000000) ++ priv->clk_csr = 0x02; ++ else if (clk_rate > 40000000) ++ priv->clk_csr = 0x01; ++ else ++ priv->clk_csr = 0; ++ } + } -+ALLWINNER SUN8I-EMAC ETHERNET DRIVER -+M: Corentin Labbe -+L: netdev@vger.kernel.org -+S: Maintained -+F: drivers/net/ethernet/allwinner/sun8i-emac.c + static void print_pkt(unsigned char *buf, int len) +@@ -697,6 +708,10 @@ static void stmmac_adjust_link(struct net_device *dev) + if (phydev->link) { + u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG); + ++ /* disable loopback */ ++ if (priv->plat->has_sun8i) ++ ctrl &= ~BIT(1); + - ALLWINNER SECURITY SYSTEM - M: Corentin Labbe - L: linux-crypto@vger.kernel.org --- -2.9.3 - -From 6b3093e31b877f39475454b5af3b820dbb3a4f73 Mon Sep 17 00:00:00 2001 -From: Corentin LABBE -Date: Fri, 7 Oct 2016 10:25:50 +0200 -Subject: [PATCH 3/8] ARM: sun8i: dt: Add DT bindings documentation for - Allwinner sun8i-emac - -This patch adds documentation for Device-Tree bindings for the -Allwinner sun8i-emac driver. - -Signed-off-by: Corentin Labbe ---- - .../bindings/net/allwinner,sun8i-emac.txt | 70 ++++++++++++++++++++++ - 1 file changed, 70 insertions(+) - create mode 100644 Documentation/devicetree/bindings/net/allwinner,sun8i-emac.txt - -diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-emac.txt b/Documentation/devicetree/bindings/net/allwinner,sun8i-emac.txt -new file mode 100644 -index 0000000..92e4ef3b ---- /dev/null -+++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-emac.txt -@@ -0,0 +1,70 @@ -+* Allwinner sun8i EMAC ethernet controller + /* Now we make sure that we can be in full duplex mode. + * If not, we operate in half-duplex mode. */ + if (phydev->duplex != priv->oldduplex) { +@@ -714,6 +729,8 @@ static void stmmac_adjust_link(struct net_device *dev) + + if (phydev->speed != priv->speed) { + new_state = 1; ++ if (priv->plat->has_sun8i) ++ ctrl &= ~GENMASK(3, 2); + switch (phydev->speed) { + case 1000: + if (priv->plat->has_gmac || +@@ -725,6 +742,8 @@ static void stmmac_adjust_link(struct net_device *dev) + priv->plat->has_gmac4) { + ctrl |= priv->hw->link.port; + ctrl |= priv->hw->link.speed; ++ } else if (priv->plat->has_sun8i) { ++ ctrl |= 3 << 2; + } else { + ctrl &= ~priv->hw->link.port; + } +@@ -734,6 +753,8 @@ static void stmmac_adjust_link(struct net_device *dev) + priv->plat->has_gmac4) { + ctrl |= priv->hw->link.port; + ctrl &= ~(priv->hw->link.speed); ++ } else if (priv->plat->has_sun8i) { ++ ctrl |= 2 << 2; + } else { + ctrl &= ~priv->hw->link.port; + } +@@ -1702,7 +1723,7 @@ static int stmmac_hw_setup(struct net_device *dev, bool init_ptp) + /* Enable the MAC Rx/Tx */ + if (priv->synopsys_id >= DWMAC_CORE_4_00) + stmmac_dwmac4_set_mac(priv->ioaddr, true); +- else ++ else if (!priv->plat->has_sun8i) + stmmac_set_mac(priv->ioaddr, true); + + /* Set the HW DMA mode and the COE */ +@@ -3123,6 +3144,10 @@ static int stmmac_hw_init(struct stmmac_priv *priv) + + priv->hw = mac; + ++ /* dwmac-sun8i only work in chain mode */ ++ if (priv->plat->has_sun8i) ++ chain_mode = 1; + -+Required properties: -+- compatible: should be one of the following string: -+ "allwinner,sun8i-a83t-emac" -+ "allwinner,sun8i-h3-emac" -+ "allwinner,sun50i-a64-emac" -+- reg: address and length of the register for the device. -+- syscon: A phandle to the syscon of the SoC -+- interrupts: interrupt for the device -+- clocks: A phandle to the reference clock for this device -+- clock-names: should be "ahb" -+- resets: A phandle to the reset control for this device -+- reset-names: should be "ahb" -+- phy-mode: See ethernet.txt -+- phy-handle: See ethernet.txt -+- #address-cells: shall be 1 -+- #size-cells: shall be 0 -+ -+Optional properties: -+- allwinner,tx-delay: TX clock delay chain value. Range value is 0-0x07. Default is 0) -+- allwinner,rx-delay: RX clock delay chain value. Range value is 0-0x1F. Default is 0) -+Both delay properties does not have units, there are arbitrary value. -+The TX/RX clock delay chain settings are board specific and could be found -+in vendor FEX files. -+ -+Optional properties for "allwinner,sun8i-h3-emac": -+- allwinner,leds-active-low: EPHY LEDs are active low -+ -+Required child node of emac: -+- mdio bus node: should be named mdio -+ -+Required properties of the mdio node: -+- #address-cells: shall be 1 -+- #size-cells: shall be 0 -+ -+The device node referenced by "phy" or "phy-handle" should be a child node -+of the mdio node. See phy.txt for the generic PHY bindings. -+ -+Required properties of the phy node with "allwinner,sun8i-h3-emac": -+- clocks: an extra phandle to the reference clock for the EPHY -+- resets: an extra phandle to the reset control for the EPHY -+ -+Example: -+ -+emac: ethernet@01c0b000 { -+ compatible = "allwinner,sun8i-h3-emac"; -+ syscon = <&syscon>; -+ reg = <0x01c0b000 0x104>; -+ interrupts = ; -+ resets = <&ccu RST_BUS_EMAC>; -+ reset-names = "ahb"; -+ clocks = <&ccu CLK_BUS_EMAC>; -+ clock-names = "ahb"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ phy = <&int_mii_phy>; -+ phy-mode = "mii"; -+ allwinner,leds-active-low; -+ mdio: mdio { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ int_mii_phy: ethernet-phy@1 { -+ reg = <1>; -+ clocks = <&ccu CLK_BUS_EPHY>; -+ resets = <&ccu RST_BUS_EPHY>; -+ }; + /* To use the chained or ring mode */ + if (priv->synopsys_id >= DWMAC_CORE_4_00) { + priv->hw->mode = &dwmac4_ring_mode_ops; +diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +index 0ba1caf..3c21862 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +@@ -160,6 +160,12 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, + struct device_node *np, struct device *dev) + { + bool mdio = true; ++ static const struct of_device_id need_mdio_ids[] = { ++ { .compatible = "snps,dwc-qos-ethernet-4.10" }, ++ { .compatible = "allwinner,sun8i-a83t-emac" }, ++ { .compatible = "allwinner,sun8i-h3-emac" }, ++ { .compatible = "allwinner,sun50i-a64-emac" }, + }; -+}; --- -2.9.3 - -From aa634aa1b0454befe54a14d03b9a3ba6f750dcfd Mon Sep 17 00:00:00 2001 -From: Corentin LABBE -Date: Fri, 7 Oct 2016 10:25:51 +0200 -Subject: [PATCH 4/8] ARM: dts: sun8i-h3: Add dt node for the syscon control + + /* If phy-handle property is passed from DT, use it as the PHY */ + plat->phy_node = of_parse_phandle(np, "phy-handle", 0); +@@ -176,8 +182,7 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, + mdio = false; + } + +- /* exception for dwmac-dwc-qos-eth glue logic */ +- if (of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) { ++ if (of_match_node(need_mdio_ids, np)) { + plat->mdio_node = of_get_child_by_name(np, "mdio"); + } else { + /** +diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h +index 8f09f18..100386c 100644 +--- a/include/linux/stmmac.h ++++ b/include/linux/stmmac.h +@@ -147,6 +147,7 @@ struct plat_stmmacenet_data { + struct reset_control *stmmac_rst; + struct stmmac_axi *axi; + int has_gmac4; ++ bool has_sun8i; + bool tso_en; + int mac_port_sel_speed; + bool en_tx_lpi_clockgating; +From patchwork Tue Mar 14 14:18:42 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2, 06/20] ARM: dts: sunxi-h3-h5: Add dt node for the syscon control module +From: Corentin LABBE +X-Patchwork-Id: 9623549 +Message-Id: <20170314141856.24560-7-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, + davem@davemloft.net +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, Corentin Labbe , + linux-arm-kernel@lists.infradead.org +Date: Tue, 14 Mar 2017 15:18:42 +0100 This patch add the dt node for the syscon register present on the -Allwinner H3. +Allwinner H3/H5 Only two register are present in this syscon and the only one useful is -the one dedicated to EMAC clock. +the one dedicated to EMAC clock.. Signed-off-by: Corentin Labbe --- - arch/arm/boot/dts/sun8i-h3.dtsi | 5 +++++ - 1 file changed, 5 insertions(+) + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 6 ++++++ + 1 file changed, 6 insertions(+) -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -index 75a8654..eac7d00 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -140,6 +140,11 @@ +diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +index 2494ea0..07e4f36 100644 +--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi ++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +@@ -102,6 +102,12 @@ #size-cells = <1>; ranges; + syscon: syscon@01c00000 { -+ compatible = "syscon"; ++ compatible = "syscon", ++ "allwinner,sun8i-h3-system-controller"; + reg = <0x01c00000 0x1000>; + }; + dma: dma-controller@01c02000 { compatible = "allwinner,sun8i-h3-dma"; reg = <0x01c02000 0x1000>; --- -2.9.3 +From patchwork Tue Mar 14 14:18:43 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2,07/20] ARM: dts: sunxi-h3-h5: add dwmac-sun8i ethernet driver +From: Corentin LABBE +X-Patchwork-Id: 9623561 +Message-Id: <20170314141856.24560-8-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, + davem@davemloft.net +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, Corentin Labbe , + linux-arm-kernel@lists.infradead.org +Date: Tue, 14 Mar 2017 15:18:43 +0100 -From 976cca2d4eb5bf85c26dfaad03ea70bff88981fd Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 8 Nov 2016 10:23:08 +0000 -Subject: [PATCH 5/8] ARM: dts: sun8i-h3: add sun8i-emac ethernet driver - -The sun8i-emac is an ethernet MAC hardware that support 10/100/1000 +The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed. -This patch enable the sun8i-emac on the Allwinner H3 SoC Device-tree. -The SoC H3 have an internal PHY, so optionals syscon and ephy are set. +This patch enable the dwmac-sun8i on Allwinner H3/H5 SoC Device-tree. +SoC H3/H5 have an internal PHY, so optionals syscon and ephy are set. Signed-off-by: Corentin Labbe --- - arch/arm/boot/dts/sun8i-h3.dtsi | 24 ++++++++++++++++++++++++ - 1 file changed, 24 insertions(+) + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 33 +++++++++++++++++++++++++++++++++ + 1 file changed, 33 insertions(+) -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -index eac7d00..86a8665 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -535,6 +535,30 @@ - #size-cells = <0>; +diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +index 07e4f36..c35af5e 100644 +--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi ++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +@@ -272,6 +272,14 @@ + interrupt-controller; + #interrupt-cells = <3>; + ++ emac_rgmii_pins: emac0@0 { ++ pins = "PD0", "PD1", "PD2", "PD3", "PD4", ++ "PD5", "PD7", "PD8", "PD9", "PD10", ++ "PD12", "PD13", "PD15", "PD16", "PD17"; ++ function = "emac"; ++ drive-strength = <40>; ++ }; ++ + i2c0_pins: i2c0 { + pins = "PA11", "PA12"; + function = "i2c0"; +@@ -368,6 +376,31 @@ + clocks = <&osc24M>; }; + emac: ethernet@1c30000 { @@ -2515,10 +1505,11 @@ index eac7d00..86a8665 100644 + syscon = <&syscon>; + reg = <0x01c30000 0x104>; + interrupts = ; ++ interrupt-names = "macirq"; + resets = <&ccu RST_BUS_EMAC>; -+ reset-names = "ahb"; ++ reset-names = "stmmaceth"; + clocks = <&ccu CLK_BUS_EMAC>; -+ clock-names = "ahb"; ++ clock-names = "stmmaceth"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; @@ -2527,25 +1518,119 @@ index eac7d00..86a8665 100644 + #address-cells = <1>; + #size-cells = <0>; + int_mii_phy: ethernet-phy@1 { -+ reg = <1>; -+ clocks = <&ccu CLK_BUS_EPHY>; -+ resets = <&ccu RST_BUS_EPHY>; ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; + }; + }; + }; + - gic: interrupt-controller@01c81000 { - compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; - reg = <0x01c81000 0x1000>, --- -2.9.3 - -From 6e483713dda9e0d5e8e5f37d8b0367ff216c53db Mon Sep 17 00:00:00 2001 + spi0: spi@01c68000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c68000 0x1000>; +From patchwork Tue Mar 14 14:18:44 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2,08/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Banana Pi M2+ From: Corentin LABBE -Date: Fri, 7 Oct 2016 10:25:53 +0200 -Subject: [PATCH 6/8] ARM: dts: sun8i: Enable sun8i-emac on the Orange PI PC +X-Patchwork-Id: 9623539 +Message-Id: <20170314141856.24560-9-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, + davem@davemloft.net +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, LABBE Corentin , + linux-arm-kernel@lists.infradead.org +Date: Tue, 14 Mar 2017 15:18:44 +0100 -The sun8i-emac hardware is present on the Orange PI PC. +From: LABBE Corentin + +The dwmac-sun8i hardware is present on the Banana Pi M2+ +It uses an external PHY rtl8211e via RGMII. + +This patch create the needed regulator, emac and phy nodes. + +Signed-off-by: Corentin Labbe +--- + arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 37 +++++++++++++++++++++++++ + 1 file changed, 37 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +index 52acbe1..30b0a41 100644 +--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +@@ -90,6 +90,18 @@ + pinctrl-0 = <&wifi_en_bpi_m2p>; + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ + }; ++ ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac_power_pin_orangepi>; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; + }; + + &ehci1 { +@@ -186,3 +198,28 @@ + /* USB VBUS is on as long as VCC-IO is on */ + status = "okay"; + }; ++ ++&pio { ++ gmac_power_pin_orangepi: gmac_power_pin@0 { ++ pins = "PD6"; ++ function = "gpio_out"; ++ drive-strength = <10>; ++ }; ++}; ++ ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ reg = <0>; ++ }; ++}; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ ++ allwinner,leds-active-low; ++ status = "okay"; ++}; +From patchwork Tue Mar 14 14:18:45 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2,09/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange PI PC +From: Corentin LABBE +X-Patchwork-Id: 9623555 +Message-Id: <20170314141856.24560-10-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, + davem@davemloft.net +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, LABBE Corentin , + linux-arm-kernel@lists.infradead.org +Date: Tue, 14 Mar 2017 15:18:45 +0100 + +From: LABBE Corentin + +The dwmac-sun8i hardware is present on the Orange PI PC. It uses the internal PHY. This patch create the needed emac node. @@ -2556,10 +1641,10 @@ Signed-off-by: Corentin Labbe 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -index 3ec9712..1b8dbc0 100644 +index f148111..746c25a 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -@@ -54,6 +54,7 @@ +@@ -53,6 +53,7 @@ aliases { serial0 = &uart0; @@ -2567,7 +1652,7 @@ index 3ec9712..1b8dbc0 100644 }; chosen { -@@ -183,3 +184,10 @@ +@@ -184,3 +185,10 @@ /* USB VBUS is always on */ status = "okay"; }; @@ -2578,30 +1663,90 @@ index 3ec9712..1b8dbc0 100644 + allwinner,leds-active-low; + status = "okay"; +}; --- -2.9.3 +From patchwork Tue Mar 14 14:18:46 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2,10/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange Pi 2 +From: Corentin LABBE +X-Patchwork-Id: 9623557 +Message-Id: <20170314141856.24560-11-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, + davem@davemloft.net +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, Corentin Labbe , + linux-arm-kernel@lists.infradead.org +Date: Tue, 14 Mar 2017 15:18:46 +0100 -From 05cf4e2c77424ad5c9dc8495a65d6695d2831b0a Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Fri, 7 Oct 2016 10:25:54 +0200 -Subject: [PATCH 7/8] ARM: dts: sun8i: Enable sun8i-emac on the Orange PI One - -The sun8i-emac hardware is present on the Orange PI One. +The dwmac-sun8i hardware is present on the Orange PI 2. +It uses the internal PHY. + +This patch create the needed emac node. + +Signed-off-by: Corentin Labbe +--- + arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts +index 5b6d145..3f54b12 100644 +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts +@@ -55,6 +55,7 @@ + serial0 = &uart0; + /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ + ethernet1 = &rtl8189; ++ ethernet0 = &emac; + }; + + chosen { +@@ -203,3 +204,10 @@ + usb1_vbus-supply = <®_usb1_vbus>; + status = "okay"; + }; ++ ++&emac { ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ status = "okay"; ++}; +From patchwork Tue Mar 14 14:18:47 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2,11/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange PI One +From: Corentin LABBE +X-Patchwork-Id: 9623541 +Message-Id: <20170314141856.24560-12-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, + davem@davemloft.net +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, Corentin Labbe , + linux-arm-kernel@lists.infradead.org +Date: Tue, 14 Mar 2017 15:18:47 +0100 + +The dwmac-sun8i hardware is present on the Orange PI One. It uses the internal PHY. This patch create the needed emac node. -Signed-off-by: Hans de Goede Signed-off-by: Corentin Labbe --- arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -index 5c9b5bf..fa398cc 100644 +index ea8fd13..1f98ddc 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -@@ -54,6 +54,7 @@ +@@ -53,6 +53,7 @@ aliases { serial0 = &uart0; @@ -2609,7 +1754,7 @@ index 5c9b5bf..fa398cc 100644 }; chosen { -@@ -94,6 +95,13 @@ +@@ -93,6 +94,13 @@ status = "okay"; }; @@ -2623,47 +1768,412 @@ index 5c9b5bf..fa398cc 100644 &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; --- -2.9.3 +From patchwork Tue Mar 14 14:18:48 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2,12/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange Pi plus +From: Corentin LABBE +X-Patchwork-Id: 9623569 +Message-Id: <20170314141856.24560-13-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, + davem@davemloft.net +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, Corentin Labbe , + linux-arm-kernel@lists.infradead.org +Date: Tue, 14 Mar 2017 15:18:48 +0100 -From 52c300b614fcb29e81067aa7ed8aafa489b590b7 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 8 Nov 2016 10:24:42 +0000 -Subject: [PATCH 8/8] ARM: dts: sun8i: Enable sun8i-emac on the Orange Pi 2 +The dwmac-sun8i hardware is present on the Orange PI plus. +It uses an external PHY rtl8211e via RGMII. -The sun8i-emac hardware is present on the Orange PI 2. -It uses the internal PHY. - -This patch create the needed emac node. +This patch create the needed regulator, emac and phy nodes. Signed-off-by: Corentin Labbe --- - arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) + arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 35 ++++++++++++++++++++++++++++ + 1 file changed, 35 insertions(+) -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -index e5bcaba..ad66b61 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -@@ -54,6 +54,7 @@ - - aliases { - serial0 = &uart0; -+ ethernet0 = &emac; - /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ - ethernet1 = &rtl8189; +diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +index 8c40ab7..4e075a2 100644 +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +@@ -58,6 +58,18 @@ + enable-active-high; + gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; }; -@@ -212,3 +213,10 @@ - usb1_vbus-supply = <®_usb1_vbus>; - status = "okay"; ++ ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac_power_pin_orangepi>; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; + }; + + &ehci3 { +@@ -86,8 +98,31 @@ + pins = "PG11"; + function = "gpio_out"; + }; ++ ++ gmac_power_pin_orangepi: gmac_power_pin@0 { ++ pins = "PD6"; ++ function = "gpio_out"; ++ drive-strength = <10>; ++ }; + }; + + &usbphy { + usb3_vbus-supply = <®_usb3_vbus>; }; + ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ reg = <0>; ++ }; ++}; ++ +&emac { -+ phy-handle = <&int_mii_phy>; -+ phy-mode = "mii"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ + allwinner,leds-active-low; + status = "okay"; +}; --- -2.9.3 +From patchwork Tue Mar 14 14:18:49 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2, + 13/20] ARM: dts: sun8i: orangepi-pc-plus: Set EMAC activity LEDs to + active high +From: Corentin LABBE +X-Patchwork-Id: 9623593 +Message-Id: <20170314141856.24560-14-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, + davem@davemloft.net +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, Corentin Labbe , + linux-arm-kernel@lists.infradead.org +Date: Tue, 14 Mar 2017 15:18:49 +0100 +On the Orange Pi PC Plus, the polarity of the LEDs on the RJ45 Ethernet +port were changed from active low to active high. + +Signed-off-by: Chen-Yu Tsai +Signed-off-by: Corentin Labbe +--- + arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts +index 8b93f5c..0380769 100644 +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts +@@ -86,3 +86,8 @@ + /* eMMC is missing pull-ups */ + bias-pull-up; + }; ++ ++&emac { ++ /* LEDs changed to active high on the plus */ ++ /delete-property/ allwinner,leds-active-low; ++}; +From patchwork Tue Mar 14 14:18:50 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2, 14/20] ARM64: dts: sun50i-a64: Add dt node for the syscon control + module +From: Corentin LABBE +X-Patchwork-Id: 9623591 +Message-Id: <20170314141856.24560-15-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, + davem@davemloft.net +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, Corentin Labbe , + linux-arm-kernel@lists.infradead.org +Date: Tue, 14 Mar 2017 15:18:50 +0100 + +This patch add the dt node for the syscon register present on the +Allwinner A64. + +Only two register are present in this syscon and the only one useful is +the one dedicated to EMAC clock. + +Signed-off-by: Corentin Labbe +--- + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +index 1c64ea2..3b09af2 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +@@ -121,6 +121,12 @@ + #size-cells = <1>; + ranges; + ++ syscon: syscon@01c00000 { ++ compatible = "syscon", ++ "allwinner,sun8i-h3-system-controller"; ++ reg = <0x01c00000 0x1000>; ++ }; ++ + mmc0: mmc@1c0f000 { + compatible = "allwinner,sun50i-a64-mmc"; + reg = <0x01c0f000 0x1000>; +From patchwork Tue Mar 14 14:18:51 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2,15/20] ARM64: dts: sun50i-a64: add dwmac-sun8i Ethernet driver +From: Corentin LABBE +X-Patchwork-Id: 9623621 +Message-Id: <20170314141856.24560-16-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, + davem@davemloft.net +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, Corentin Labbe , + linux-arm-kernel@lists.infradead.org +Date: Tue, 14 Mar 2017 15:18:51 +0100 + +The dwmac-sun8i is an Ethernet MAC that supports 10/100/1000 Mbit +connections. It is very similar to the device found in the Allwinner +H3, but lacks the internal 100 Mbit PHY and its associated control +bits. +This adds the necessary bits to the Allwinner A64 SoC .dtsi, but keeps +it disabled at this level. + +Signed-off-by: Corentin Labbe +--- + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 37 +++++++++++++++++++++++++++ + 1 file changed, 37 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +index 3b09af2..57d69e5 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +@@ -277,6 +277,23 @@ + bias-pull-up; + }; + ++ rmii_pins: rmii_pins { ++ pins = "PD10", "PD11", "PD13", "PD14", ++ "PD17", "PD18", "PD19", "PD20", ++ "PD22", "PD23"; ++ function = "emac"; ++ drive-strength = <40>; ++ }; ++ ++ rgmii_pins: rgmii_pins { ++ pins = "PD8", "PD9", "PD10", "PD11", ++ "PD12", "PD13", "PD15", ++ "PD16", "PD17", "PD18", "PD19", ++ "PD20", "PD21", "PD22", "PD23"; ++ function = "emac"; ++ drive-strength = <40>; ++ }; ++ + uart0_pins_a: uart0@0 { + pins = "PB8", "PB9"; + function = "uart0"; +@@ -381,6 +398,26 @@ + #size-cells = <0>; + }; + ++ emac: ethernet@1c30000 { ++ compatible = "allwinner,sun50i-a64-emac"; ++ syscon = <&syscon>; ++ reg = <0x01c30000 0x100>; ++ interrupts = ; ++ interrupt-names = "macirq"; ++ resets = <&ccu RST_BUS_EMAC>; ++ reset-names = "stmmaceth"; ++ clocks = <&ccu CLK_BUS_EMAC>; ++ clock-names = "stmmaceth"; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mdio: mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ }; ++ + gic: interrupt-controller@1c81000 { + compatible = "arm,gic-400"; + reg = <0x01c81000 0x1000>, +From patchwork Tue Mar 14 14:18:52 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2,16/20] ARM: dts: sun50i-a64: enable dwmac-sun8i on pine64 +From: Corentin LABBE +X-Patchwork-Id: 9623607 +Message-Id: <20170314141856.24560-17-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, + davem@davemloft.net +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, Corentin Labbe , + linux-arm-kernel@lists.infradead.org +Date: Tue, 14 Mar 2017 15:18:52 +0100 + +The dwmac-sun8i hardware is present on the pine64 +It uses an external PHY via RMII. + +Signed-off-by: Corentin Labbe +--- + arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +index c680ed3..b53994d 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +@@ -109,3 +109,18 @@ + &usbphy { + status = "okay"; + }; ++ ++&mdio { ++ ext_rmii_phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rmii_pins>; ++ phy-mode = "rmii"; ++ phy-handle = <&ext_rmii_phy1>; ++ status = "okay"; ++ ++}; +From patchwork Tue Mar 14 14:18:53 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2,17/20] ARM: dts: sun50i-a64: enable dwmac-sun8i on pine64 plus +From: Corentin LABBE +X-Patchwork-Id: 9623597 +Message-Id: <20170314141856.24560-18-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, + davem@davemloft.net +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, Corentin Labbe , + linux-arm-kernel@lists.infradead.org +Date: Tue, 14 Mar 2017 15:18:53 +0100 + +The dwmac-sun8i hardware is present on the pine64 plus. +It uses an external PHY rtl8211e via RGMII. + +Signed-off-by: Corentin Labbe +--- + arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 16 +++++++++++++++- + 1 file changed, 15 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts +index 790d14d..8e06aed 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts +@@ -46,5 +46,19 @@ + model = "Pine64+"; + compatible = "pine64,pine64-plus", "allwinner,sun50i-a64"; + +- /* TODO: Camera, Ethernet PHY, touchscreen, etc. */ ++ /* TODO: Camera, touchscreen, etc. */ ++}; ++ ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ phy-mode = "rgmii"; ++ phy-handle = <&ext_rgmii_phy>; ++ status = "okay"; + }; +From patchwork Tue Mar 14 14:18:54 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2, + 18/20] ARM: dts: sun50i-a64: enable dwmac-sun8i on the BananaPi M64 +From: Corentin LABBE +X-Patchwork-Id: 9623595 +Message-Id: <20170314141856.24560-19-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, + davem@davemloft.net +Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, Corentin Labbe , + linux-arm-kernel@lists.infradead.org +Date: Tue, 14 Mar 2017 15:18:54 +0100 + +The dwmac-sun8i hardware is present on the BananaPi M64. +It uses an external PHY rtl8211e via RGMII. + +Signed-off-by: Corentin Labbe +--- + arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +index 6872135..347c262 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +@@ -77,6 +77,20 @@ + bias-pull-up; + }; + ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ phy-mode = "rgmii"; ++ phy-handle = <&ext_rgmii_phy>; ++ status = "okay"; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; diff --git a/Armada-trace-build-fix.patch b/Armada-trace-build-fix.patch deleted file mode 100644 index f78b121c0..000000000 --- a/Armada-trace-build-fix.patch +++ /dev/null @@ -1,20 +0,0 @@ -From: Fedora Kernel Team -Date: Wed, 14 Dec 2016 16:53:21 -0600 -Subject: [PATCH] Armada trace build fix - ---- - drivers/gpu/drm/armada/Makefile | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/drivers/gpu/drm/armada/Makefile b/drivers/gpu/drm/armada/Makefile ---- a/drivers/gpu/drm/armada/Makefile -+++ b/drivers/gpu/drm/armada/Makefile -@@ -4,3 +4,5 @@ armada-y += armada_510.o - armada-$(CONFIG_DEBUG_FS) += armada_debugfs.o - - obj-$(CONFIG_DRM_ARMADA) := armada.o -+ -+CFLAGS_armada_trace.o := -I$(src) --- -2.9.3 - diff --git a/CVE-2017-7477.patch b/CVE-2017-7477.patch new file mode 100644 index 000000000..6405614cc --- /dev/null +++ b/CVE-2017-7477.patch @@ -0,0 +1,73 @@ +From 4d6fa57b4dab0d77f4d8e9d9c73d1e63f6fe8fee Mon Sep 17 00:00:00 2001 +From: "Jason A. Donenfeld" +Date: Fri, 21 Apr 2017 23:14:48 +0200 +Subject: macsec: avoid heap overflow in skb_to_sgvec + +While this may appear as a humdrum one line change, it's actually quite +important. An sk_buff stores data in three places: + +1. A linear chunk of allocated memory in skb->data. This is the easiest + one to work with, but it precludes using scatterdata since the memory + must be linear. +2. The array skb_shinfo(skb)->frags, which is of maximum length + MAX_SKB_FRAGS. This is nice for scattergather, since these fragments + can point to different pages. +3. skb_shinfo(skb)->frag_list, which is a pointer to another sk_buff, + which in turn can have data in either (1) or (2). + +The first two are rather easy to deal with, since they're of a fixed +maximum length, while the third one is not, since there can be +potentially limitless chains of fragments. Fortunately dealing with +frag_list is opt-in for drivers, so drivers don't actually have to deal +with this mess. For whatever reason, macsec decided it wanted pain, and +so it explicitly specified NETIF_F_FRAGLIST. + +Because dealing with (1), (2), and (3) is insane, most users of sk_buff +doing any sort of crypto or paging operation calls a convenient function +called skb_to_sgvec (which happens to be recursive if (3) is in use!). +This takes a sk_buff as input, and writes into its output pointer an +array of scattergather list items. Sometimes people like to declare a +fixed size scattergather list on the stack; othertimes people like to +allocate a fixed size scattergather list on the heap. However, if you're +doing it in a fixed-size fashion, you really shouldn't be using +NETIF_F_FRAGLIST too (unless you're also ensuring the sk_buff and its +frag_list children arent't shared and then you check the number of +fragments in total required.) + +Macsec specifically does this: + + size += sizeof(struct scatterlist) * (MAX_SKB_FRAGS + 1); + tmp = kmalloc(size, GFP_ATOMIC); + *sg = (struct scatterlist *)(tmp + sg_offset); + ... + sg_init_table(sg, MAX_SKB_FRAGS + 1); + skb_to_sgvec(skb, sg, 0, skb->len); + +Specifying MAX_SKB_FRAGS + 1 is the right answer usually, but not if you're +using NETIF_F_FRAGLIST, in which case the call to skb_to_sgvec will +overflow the heap, and disaster ensues. + +Signed-off-by: Jason A. Donenfeld +Cc: stable@vger.kernel.org +Cc: security@kernel.org +Signed-off-by: David S. Miller +--- + drivers/net/macsec.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/net/macsec.c b/drivers/net/macsec.c +index ff0a5ed..dbab05a 100644 +--- a/drivers/net/macsec.c ++++ b/drivers/net/macsec.c +@@ -2716,7 +2716,7 @@ static netdev_tx_t macsec_start_xmit(struct sk_buff *skb, + } + + #define MACSEC_FEATURES \ +- (NETIF_F_SG | NETIF_F_HIGHDMA | NETIF_F_FRAGLIST) ++ (NETIF_F_SG | NETIF_F_HIGHDMA) + static struct lock_class_key macsec_netdev_addr_lock_key; + + static int macsec_dev_init(struct net_device *dev) +-- +cgit v1.1 + diff --git a/CVE-2017-7645.patch b/CVE-2017-7645.patch new file mode 100644 index 000000000..0be019cc3 --- /dev/null +++ b/CVE-2017-7645.patch @@ -0,0 +1,180 @@ +From: "J. Bruce Fields" +Date: 2017-04-14 15:04:40 +Subject: [PATCH] nfsd: check for oversized NFSv2/v3 arguments + +A client can append random data to the end of an NFSv2 or NFSv3 RPC call +without our complaining; we'll just stop parsing at the end of the +expected data and ignore the rest. + +Encoded arguments and replies are stored together in an array of pages, +and if a call is too large it could leave inadequate space for the +reply. This is normally OK because NFS RPC's typically have either +short arguments and long replies (like READ) or long arguments and short +replies (like WRITE). But a client that sends an incorrectly long reply +can violate those assumptions. This was observed to cause crashes. + +So, insist that the argument not be any longer than we expect. + +Also, several operations increment rq_next_page in the decode routine +before checking the argument size, which can leave rq_next_page pointing +well past the end of the page array, causing trouble later in +svc_free_pages. + +As followup we may also want to rewrite the encoding routines to check +more carefully that they aren't running off the end of the page array. + +Reported-by: Tuomas Haanpää +Reported-by: Ari Kauppi +Cc: stable@vger.kernel.org +Signed-off-by: J. Bruce Fields +--- + fs/nfsd/nfs3xdr.c | 23 +++++++++++++++++------ + fs/nfsd/nfsxdr.c | 13 ++++++++++--- + include/linux/sunrpc/svc.h | 3 +-- + 3 files changed, 28 insertions(+), 11 deletions(-) + +diff --git a/fs/nfsd/nfs3xdr.c b/fs/nfsd/nfs3xdr.c +index dba2ff8eaa68..be66bcadfaea 100644 +--- a/fs/nfsd/nfs3xdr.c ++++ b/fs/nfsd/nfs3xdr.c +@@ -334,8 +334,11 @@ nfs3svc_decode_readargs(struct svc_rqst *rqstp, __be32 *p, + if (!p) + return 0; + p = xdr_decode_hyper(p, &args->offset); +- + args->count = ntohl(*p++); ++ ++ if (!xdr_argsize_check(rqstp, p)) ++ return 0; ++ + len = min(args->count, max_blocksize); + + /* set up the kvec */ +@@ -349,7 +352,7 @@ nfs3svc_decode_readargs(struct svc_rqst *rqstp, __be32 *p, + v++; + } + args->vlen = v; +- return xdr_argsize_check(rqstp, p); ++ return 1; + } + + int +@@ -536,9 +539,11 @@ nfs3svc_decode_readlinkargs(struct svc_rqst *rqstp, __be32 *p, + p = decode_fh(p, &args->fh); + if (!p) + return 0; ++ if (!xdr_argsize_check(rqstp, p)) ++ return 0; + args->buffer = page_address(*(rqstp->rq_next_page++)); + +- return xdr_argsize_check(rqstp, p); ++ return 1; + } + + int +@@ -564,10 +569,14 @@ nfs3svc_decode_readdirargs(struct svc_rqst *rqstp, __be32 *p, + args->verf = p; p += 2; + args->dircount = ~0; + args->count = ntohl(*p++); ++ ++ if (!xdr_argsize_check(rqstp, p)) ++ return 0; ++ + args->count = min_t(u32, args->count, PAGE_SIZE); + args->buffer = page_address(*(rqstp->rq_next_page++)); + +- return xdr_argsize_check(rqstp, p); ++ return 1; + } + + int +@@ -585,6 +594,9 @@ nfs3svc_decode_readdirplusargs(struct svc_rqst *rqstp, __be32 *p, + args->dircount = ntohl(*p++); + args->count = ntohl(*p++); + ++ if (!xdr_argsize_check(rqstp, p)) ++ return 0; ++ + len = args->count = min(args->count, max_blocksize); + while (len > 0) { + struct page *p = *(rqstp->rq_next_page++); +@@ -592,8 +604,7 @@ nfs3svc_decode_readdirplusargs(struct svc_rqst *rqstp, __be32 *p, + args->buffer = page_address(p); + len -= PAGE_SIZE; + } +- +- return xdr_argsize_check(rqstp, p); ++ return 1; + } + + int +diff --git a/fs/nfsd/nfsxdr.c b/fs/nfsd/nfsxdr.c +index 41b468a6a90f..79268369f7b3 100644 +--- a/fs/nfsd/nfsxdr.c ++++ b/fs/nfsd/nfsxdr.c +@@ -257,6 +257,9 @@ nfssvc_decode_readargs(struct svc_rqst *rqstp, __be32 *p, + len = args->count = ntohl(*p++); + p++; /* totalcount - unused */ + ++ if (!xdr_argsize_check(rqstp, p)) ++ return 0; ++ + len = min_t(unsigned int, len, NFSSVC_MAXBLKSIZE_V2); + + /* set up somewhere to store response. +@@ -272,7 +275,7 @@ nfssvc_decode_readargs(struct svc_rqst *rqstp, __be32 *p, + v++; + } + args->vlen = v; +- return xdr_argsize_check(rqstp, p); ++ return 1; + } + + int +@@ -360,9 +363,11 @@ nfssvc_decode_readlinkargs(struct svc_rqst *rqstp, __be32 *p, struct nfsd_readli + p = decode_fh(p, &args->fh); + if (!p) + return 0; ++ if (!xdr_argsize_check(rqstp, p)) ++ return 0; + args->buffer = page_address(*(rqstp->rq_next_page++)); + +- return xdr_argsize_check(rqstp, p); ++ return 1; + } + + int +@@ -400,9 +405,11 @@ nfssvc_decode_readdirargs(struct svc_rqst *rqstp, __be32 *p, + args->cookie = ntohl(*p++); + args->count = ntohl(*p++); + args->count = min_t(u32, args->count, PAGE_SIZE); ++ if (!xdr_argsize_check(rqstp, p)) ++ return 0; + args->buffer = page_address(*(rqstp->rq_next_page++)); + +- return xdr_argsize_check(rqstp, p); ++ return 1; + } + + /* +diff --git a/include/linux/sunrpc/svc.h b/include/linux/sunrpc/svc.h +index e770abeed32d..6ef19cf658b4 100644 +--- a/include/linux/sunrpc/svc.h ++++ b/include/linux/sunrpc/svc.h +@@ -336,8 +336,7 @@ xdr_argsize_check(struct svc_rqst *rqstp, __be32 *p) + { + char *cp = (char *)p; + struct kvec *vec = &rqstp->rq_arg.head[0]; +- return cp >= (char*)vec->iov_base +- && cp <= (char*)vec->iov_base + vec->iov_len; ++ return cp == (char *)vec->iov_base + vec->iov_len; + } + + static inline int +-- +2.9.3 + +-- +To unsubscribe from this list: send the line "unsubscribe linux-nfs" in +the body of a message to majordomo@vger.kernel.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Fix-tegra-to-use-stdout-path-for-serial-console.patch b/Fix-tegra-to-use-stdout-path-for-serial-console.patch deleted file mode 100644 index 80a2d1b95..000000000 --- a/Fix-tegra-to-use-stdout-path-for-serial-console.patch +++ /dev/null @@ -1,318 +0,0 @@ -From 15b8caef5f380d9465876478ff5e365bc6afa5b6 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 6 Mar 2016 10:59:13 +0000 -Subject: [PATCH] Fix tegra to use stdout-path for serial console - ---- - arch/arm/boot/dts/tegra114-dalmore.dts | 4 ++++ - arch/arm/boot/dts/tegra124-jetson-tk1.dts | 4 ++++ - arch/arm/boot/dts/tegra124-nyan.dtsi | 4 ++++ - arch/arm/boot/dts/tegra124-venice2.dts | 4 ++++ - arch/arm/boot/dts/tegra20-harmony.dts | 4 ++++ - arch/arm/boot/dts/tegra20-iris-512.dts | 4 ++++ - arch/arm/boot/dts/tegra20-medcom-wide.dts | 4 ++++ - arch/arm/boot/dts/tegra20-paz00.dts | 4 ++++ - arch/arm/boot/dts/tegra20-seaboard.dts | 4 ++++ - arch/arm/boot/dts/tegra20-tamonten.dtsi | 4 ++++ - arch/arm/boot/dts/tegra20-trimslice.dts | 4 ++++ - arch/arm/boot/dts/tegra20-ventana.dts | 4 ++++ - arch/arm/boot/dts/tegra20-whistler.dts | 4 ++++ - arch/arm/boot/dts/tegra30-apalis-eval.dts | 4 ++++ - arch/arm/boot/dts/tegra30-beaver.dts | 4 ++++ - arch/arm/boot/dts/tegra30-cardhu.dtsi | 4 ++++ - arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 4 ++++ - arch/arm64/boot/dts/nvidia/tegra132-norrin.dts | 5 ++++- - arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi | 4 ++++ - 19 files changed, 76 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts -index 8b7aa0d..b5748ee 100644 ---- a/arch/arm/boot/dts/tegra114-dalmore.dts -+++ b/arch/arm/boot/dts/tegra114-dalmore.dts -@@ -18,6 +18,10 @@ - serial0 = &uartd; - }; - -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - memory { - reg = <0x80000000 0x40000000>; - }; -diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts -index 66b4451..abf046a 100644 ---- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts -+++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts -@@ -15,6 +15,10 @@ - serial0 = &uartd; - }; - -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - memory { - reg = <0x0 0x80000000 0x0 0x80000000>; - }; -diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi -index ec1aa64..e2cd39e 100644 ---- a/arch/arm/boot/dts/tegra124-nyan.dtsi -+++ b/arch/arm/boot/dts/tegra124-nyan.dtsi -@@ -8,6 +8,10 @@ - serial0 = &uarta; - }; - -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - memory { - reg = <0x0 0x80000000 0x0 0x80000000>; - }; -diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts -index cfbdf42..604f4b7 100644 ---- a/arch/arm/boot/dts/tegra124-venice2.dts -+++ b/arch/arm/boot/dts/tegra124-venice2.dts -@@ -13,6 +13,10 @@ - serial0 = &uarta; - }; - -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - memory { - reg = <0x0 0x80000000 0x0 0x80000000>; - }; -diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts -index b926a07..4b73c76 100644 ---- a/arch/arm/boot/dts/tegra20-harmony.dts -+++ b/arch/arm/boot/dts/tegra20-harmony.dts -@@ -13,6 +13,10 @@ - serial0 = &uartd; - }; - -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - memory { - reg = <0x00000000 0x40000000>; - }; -diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts b/arch/arm/boot/dts/tegra20-iris-512.dts -index 1dd7d7b..bb56dfe 100644 ---- a/arch/arm/boot/dts/tegra20-iris-512.dts -+++ b/arch/arm/boot/dts/tegra20-iris-512.dts -@@ -11,6 +11,10 @@ - serial1 = &uartd; - }; - -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - host1x@50000000 { - hdmi@54280000 { - status = "okay"; -diff --git a/arch/arm/boot/dts/tegra20-medcom-wide.dts b/arch/arm/boot/dts/tegra20-medcom-wide.dts -index 9b87526..34c6588 100644 ---- a/arch/arm/boot/dts/tegra20-medcom-wide.dts -+++ b/arch/arm/boot/dts/tegra20-medcom-wide.dts -@@ -10,6 +10,10 @@ - serial0 = &uartd; - }; - -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - pwm@7000a000 { - status = "okay"; - }; -diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts -index ed7e100..81a10a9 100644 ---- a/arch/arm/boot/dts/tegra20-paz00.dts -+++ b/arch/arm/boot/dts/tegra20-paz00.dts -@@ -14,6 +14,10 @@ - serial1 = &uartc; - }; - -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - memory { - reg = <0x00000000 0x20000000>; - }; -diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts -index aea8994..0aed748 100644 ---- a/arch/arm/boot/dts/tegra20-seaboard.dts -+++ b/arch/arm/boot/dts/tegra20-seaboard.dts -@@ -13,6 +13,10 @@ - serial0 = &uartd; - }; - -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - memory { - reg = <0x00000000 0x40000000>; - }; -diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi -index 13d4e61..025e9e8 100644 ---- a/arch/arm/boot/dts/tegra20-tamonten.dtsi -+++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi -@@ -10,6 +10,10 @@ - serial0 = &uartd; - }; - -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - memory { - reg = <0x00000000 0x20000000>; - }; -diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts -index d99af4e..69d25ca 100644 ---- a/arch/arm/boot/dts/tegra20-trimslice.dts -+++ b/arch/arm/boot/dts/tegra20-trimslice.dts -@@ -13,6 +13,10 @@ - serial0 = &uarta; - }; - -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - memory { - reg = <0x00000000 0x40000000>; - }; -diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts -index 04c58e9..c61533a 100644 ---- a/arch/arm/boot/dts/tegra20-ventana.dts -+++ b/arch/arm/boot/dts/tegra20-ventana.dts -@@ -13,6 +13,10 @@ - serial0 = &uartd; - }; - -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - memory { - reg = <0x00000000 0x40000000>; - }; -diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts -index 340d811..bd76585 100644 ---- a/arch/arm/boot/dts/tegra20-whistler.dts -+++ b/arch/arm/boot/dts/tegra20-whistler.dts -@@ -13,6 +13,10 @@ - serial0 = &uarta; - }; - -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - memory { - reg = <0x00000000 0x20000000>; - }; -diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts -index f2879cf..b914bcb 100644 ---- a/arch/arm/boot/dts/tegra30-apalis-eval.dts -+++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts -@@ -17,6 +17,10 @@ - serial3 = &uartd; - }; - -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - pcie-controller@00003000 { - status = "okay"; - -diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts -index 3dede39..1eca3b2 100644 ---- a/arch/arm/boot/dts/tegra30-beaver.dts -+++ b/arch/arm/boot/dts/tegra30-beaver.dts -@@ -12,6 +12,10 @@ - serial0 = &uarta; - }; - -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - memory { - reg = <0x80000000 0x7ff00000>; - }; -diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi -index bb1ca15..de9d6cc 100644 ---- a/arch/arm/boot/dts/tegra30-cardhu.dtsi -+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi -@@ -35,6 +35,10 @@ - serial1 = &uartc; - }; - -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - memory { - reg = <0x80000000 0x40000000>; - }; -diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts -index 3ff019f..93e1ffd 100644 ---- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts -+++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts -@@ -15,6 +15,10 @@ - serial2 = &uartd; - }; - -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - host1x@50000000 { - dc@54200000 { - rgb { -diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts -index 62f33fc..3c0b4d7 100644 ---- a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts -+++ b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts -@@ -10,9 +10,12 @@ - aliases { - rtc0 = "/i2c@0,7000d000/as3722@40"; - rtc1 = "/rtc@0,7000e000"; -+ serial0 = &uarta; - }; - -- chosen { }; -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; - - memory { - device_type = "memory"; -diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi -index ece0dec..73ba582 100644 ---- a/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi -+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi -@@ -9,6 +9,10 @@ - serial0 = &uarta; - }; - -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ - memory { - device_type = "memory"; - reg = <0x0 0x80000000 0x0 0xc0000000>; --- -2.5.0 - diff --git a/Initial-AllWinner-A64-and-PINE64-support.patch b/Initial-AllWinner-A64-and-PINE64-support.patch deleted file mode 100644 index 966275a8f..000000000 --- a/Initial-AllWinner-A64-and-PINE64-support.patch +++ /dev/null @@ -1,1200 +0,0 @@ -From 97f002d28e975991226ab70599731bd2ccc8c060 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sun, 6 Mar 2016 12:06:41 +0000 -Subject: [PATCH] Initial AllWinner A64 and PINE64 support - ---- - Documentation/devicetree/bindings/arm/sunxi.txt | 1 + - Documentation/devicetree/bindings/clock/sunxi.txt | 7 + - .../devicetree/bindings/vendor-prefixes.txt | 1 + - arch/arm/boot/dts/sun8i-h3.dtsi | 18 +- - arch/arm/mach-sunxi/Kconfig | 7 + - arch/arm64/Kconfig.platforms | 6 + - arch/arm64/boot/dts/Makefile | 1 + - arch/arm64/boot/dts/allwinner/Makefile | 5 + - .../dts/allwinner/sun50i-a64-pine64-common.dtsi | 80 +++ - .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 59 ++ - .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 58 ++ - arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 624 +++++++++++++++++++++ - drivers/clk/sunxi/Makefile | 1 + - drivers/clk/sunxi/clk-factors.c | 3 +- - drivers/clk/sunxi/clk-factors.h | 1 + - drivers/clk/sunxi/clk-multi-gates.c | 105 ++++ - drivers/clk/sunxi/clk-sunxi.c | 4 +- - drivers/crypto/Kconfig | 2 +- - 23 files changed, 1582 insertions(+), 16 deletions(-) - create mode 100644 arch/arm64/boot/dts/allwinner/Makefile - create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi - create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts - create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts - create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi - create mode 100644 drivers/clk/sunxi/clk-multi-gates.c - create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c - -diff --git a/Documentation/devicetree/bindings/arm/sunxi.txt b/Documentation/devicetree/bindings/arm/sunxi.txt -index bb9b0faa..8b39d2b 100644 ---- a/Documentation/devicetree/bindings/arm/sunxi.txt -+++ b/Documentation/devicetree/bindings/arm/sunxi.txt -@@ -13,3 +13,4 @@ using one of the following compatible strings: - allwinner,sun8i-a83t - allwinner,sun8i-h3 - allwinner,sun9i-a80 -+ allwinner,sun50i-a64 -diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt -index e59f57b..8af12b5 100644 ---- a/Documentation/devicetree/bindings/clock/sunxi.txt -+++ b/Documentation/devicetree/bindings/clock/sunxi.txt -@@ -77,6 +77,8 @@ Required properties: - "allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80 - "allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80 - "allwinner,sun4i-a10-ve-clk" - for the Video Engine clock -+ "allwinner,sunxi-multi-bus-gates-clk" - for the multi-parent bus gates -+ "allwinner,sun50i-a64-bus-gates-clk" - for the bus gates on A64 - - Required properties for all clocks: - - reg : shall be the control register address for the clock. -@@ -117,6 +119,11 @@ For "allwinner,sun6i-a31-pll6-clk", there are 2 outputs. The first output - is the normal PLL6 output, or "pll6". The second output is rate doubled - PLL6, or "pll6x2". - -+The "allwinner,sunxi-multi-bus-gates-clk" holds the actual clocks in -+child nodes, where each one specifies the parent clock that the particular -+gates are depending from. The child nodes each follow the common clock -+binding as described in this document. -+ - The "allwinner,*-mmc-clk" clocks have three different outputs: the - main clock, with the ID 0, and the output and sample clocks, with the - IDs 1 and 2, respectively. -diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt -index 72e2c5a..0c22fa9 100644 ---- a/Documentation/devicetree/bindings/vendor-prefixes.txt -+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt -@@ -175,6 +175,7 @@ parade Parade Technologies Inc. - pericom Pericom Technology Inc. - phytec PHYTEC Messtechnik GmbH - picochip Picochip Ltd -+pine64 Pine64 - plathome Plat'Home Co., Ltd. - plda PLDA - pixcir PIXCIR MICROELECTRONICS Co., Ltd -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -index 1524130e..7c50fa0 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -137,12 +137,12 @@ - clock-output-names = "pll6d2"; - }; - -- /* dummy clock until pll6 can be reused */ -- pll8: pll8_clk { -- #clock-cells = <0>; -- compatible = "fixed-clock"; -- clock-frequency = <1>; -- clock-output-names = "pll8"; -+ pll8: clk@c01c20044 { -+ #clock-cells = <1>; -+ compatible = "allwinner,sun6i-a31-pll6-clk"; -+ reg = <0x01c20044 0x4>; -+ clocks = <&osc24M>; -+ clock-output-names = "pll8", "pll8x2"; - }; - - cpu: cpu_clk@01c20050 { -@@ -243,7 +243,7 @@ - #clock-cells = <1>; - compatible = "allwinner,sun4i-a10-mmc-clk"; - reg = <0x01c20088 0x4>; -- clocks = <&osc24M>, <&pll6 0>, <&pll8>; -+ clocks = <&osc24M>, <&pll6 0>, <&pll8 0>; - clock-output-names = "mmc0", - "mmc0_output", - "mmc0_sample"; -@@ -253,7 +253,7 @@ - #clock-cells = <1>; - compatible = "allwinner,sun4i-a10-mmc-clk"; - reg = <0x01c2008c 0x4>; -- clocks = <&osc24M>, <&pll6 0>, <&pll8>; -+ clocks = <&osc24M>, <&pll6 0>, <&pll8 0>; - clock-output-names = "mmc1", - "mmc1_output", - "mmc1_sample"; -@@ -263,7 +263,7 @@ - #clock-cells = <1>; - compatible = "allwinner,sun4i-a10-mmc-clk"; - reg = <0x01c20090 0x4>; -- clocks = <&osc24M>, <&pll6 0>, <&pll8>; -+ clocks = <&osc24M>, <&pll6 0>, <&pll8 0>; - clock-output-names = "mmc2", - "mmc2_output", - "mmc2_sample"; -diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig -index c124d65..b305f5b 100644 ---- a/arch/arm/mach-sunxi/Kconfig -+++ b/arch/arm/mach-sunxi/Kconfig -@@ -46,4 +46,11 @@ config MACH_SUN9I - default ARCH_SUNXI - select ARM_GIC - -+config MACH_SUN50I -+ bool "Allwinner A64 (sun50i) SoCs support" -+ default ARCH_SUNXI -+ select ARM_GIC -+ select HAVE_ARM_ARCH_TIMER -+ select PINCTRL_SUN50I_A64 -+ - endif -diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms -index 21074f6..63a690d 100644 ---- a/arch/arm64/Kconfig.platforms -+++ b/arch/arm64/Kconfig.platforms -@@ -72,6 +72,12 @@ config ARCH_SEATTLE - config ARCH_SHMOBILE - bool - -+config ARCH_SUNXI -+ bool "Allwinner sunxi 64-bit SoC Family" -+ select PINCTRL_SUN50I_A64 -+ help -+ This enables support for Allwinner sunxi based SoCs like the A64. -+ - config ARCH_RENESAS - bool "Renesas SoC Platforms" - select ARCH_SHMOBILE -diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile -index f832b8a..3b7428a 100644 ---- a/arch/arm64/boot/dts/Makefile -+++ b/arch/arm64/boot/dts/Makefile -@@ -2,3 +2,4 @@ - dts-dirs += al -+dts-dirs += allwinner - dts-dirs += altera - dts-dirs += amd -diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile -new file mode 100644 -index 0000000..1e29a5a ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/Makefile -@@ -0,0 +1,5 @@ -+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb -+ -+always := $(dtb-y) -+subdir-y := $(dts-dirs) -+clean-files := *.dtb -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi -new file mode 100644 -index 0000000..d5a7249 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-common.dtsi -@@ -0,0 +1,80 @@ -+/* -+ * Copyright (c) 2016 ARM Ltd. -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This library is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This library is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively, -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+#include "sun50i-a64.dtsi" -+ -+/ { -+ -+ aliases { -+ serial0 = &uart0; -+ }; -+ -+ soc { -+ reg_vcc3v3: vcc3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ }; -+}; -+ -+&mmc0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&mmc0_pins>, <&mmc0_default_cd_pin>; -+ vmmc-supply = <®_vcc3v3>; -+ cd-gpios = <&pio 5 6 0>; -+ cd-inverted; -+ status = "okay"; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_pins_a>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ status = "okay"; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts -new file mode 100644 -index 0000000..549dc15 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts -@@ -0,0 +1,59 @@ -+/* -+ * Copyright (c) 2016 ARM Ltd. -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This library is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This library is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively, -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+/dts-v1/; -+ -+#include "sun50i-a64-pine64-common.dtsi" -+ -+/ { -+ model = "Pine64+"; -+ compatible = "pine64,pine64-plus", "allwinner,sun50i-a64"; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ /* There is a model with 2GB of DRAM, but U-Boot fixes this for us. */ -+ memory { -+ reg = <0x40000000 0x40000000>; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -new file mode 100644 -index 0000000..ebe029e ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -@@ -0,0 +1,58 @@ -+/* -+ * Copyright (c) 2016 ARM Ltd. -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This library is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This library is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively, -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+/dts-v1/; -+ -+#include "sun50i-a64-pine64-common.dtsi" -+ -+/ { -+ model = "Pine64"; -+ compatible = "pine64,pine64", "allwinner,sun50i-a64"; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ memory { -+ reg = <0x40000000 0x20000000>; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -new file mode 100644 -index 0000000..1bd436f ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -@@ -0,0 +1,624 @@ -+/* -+ * Copyright (C) 2016 ARM Ltd. -+ * based on the Allwinner H3 dtsi: -+ * Copyright (C) 2015 Jens Kuske -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively, -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+#include -+#include -+ -+/ { -+ interrupt-parent = <&gic>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ cpu@0 { -+ compatible = "arm,cortex-a53", "arm,armv8"; -+ device_type = "cpu"; -+ reg = <0>; -+ enable-method = "psci"; -+ }; -+ -+ cpu@1 { -+ compatible = "arm,cortex-a53", "arm,armv8"; -+ device_type = "cpu"; -+ reg = <1>; -+ enable-method = "psci"; -+ }; -+ -+ cpu@2 { -+ compatible = "arm,cortex-a53", "arm,armv8"; -+ device_type = "cpu"; -+ reg = <2>; -+ enable-method = "psci"; -+ }; -+ -+ cpu@3 { -+ compatible = "arm,cortex-a53", "arm,armv8"; -+ device_type = "cpu"; -+ reg = <3>; -+ enable-method = "psci"; -+ }; -+ }; -+ -+ psci { -+ compatible = "arm,psci-0.2"; -+ method = "smc"; -+ }; -+ -+ memory { -+ device_type = "memory"; -+ reg = <0x40000000 0>; -+ }; -+ -+ gic: interrupt-controller@1c81000 { -+ compatible = "arm,gic-400"; -+ interrupt-controller; -+ #interrupt-cells = <3>; -+ #address-cells = <0>; -+ -+ reg = <0x01c81000 0x1000>, -+ <0x01c82000 0x2000>, -+ <0x01c84000 0x2000>, -+ <0x01c86000 0x2000>; -+ interrupts = ; -+ }; -+ -+ timer { -+ compatible = "arm,armv8-timer"; -+ interrupts = , -+ , -+ , -+ ; -+ }; -+ -+ clocks { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges; -+ -+ osc24M: osc24M_clk { -+ #clock-cells = <0>; -+ compatible = "fixed-clock"; -+ clock-frequency = <24000000>; -+ clock-output-names = "osc24M"; -+ }; -+ -+ osc32k: osc32k_clk { -+ #clock-cells = <0>; -+ compatible = "fixed-clock"; -+ clock-frequency = <32768>; -+ clock-output-names = "osc32k"; -+ }; -+ -+ pll1: pll1_clk@1c20000 { -+ #clock-cells = <0>; -+ compatible = "allwinner,sun8i-a23-pll1-clk"; -+ reg = <0x01c20000 0x4>; -+ clocks = <&osc24M>; -+ clock-output-names = "pll1"; -+ }; -+ -+ pll6: pll6_clk@1c20028 { -+ #clock-cells = <1>; -+ compatible = "allwinner,sun6i-a31-pll6-clk"; -+ reg = <0x01c20028 0x4>; -+ clocks = <&osc24M>; -+ clock-output-names = "pll6", "pll6x2"; -+ }; -+ -+ pll6d2: pll6d2_clk { -+ #clock-cells = <0>; -+ compatible = "fixed-factor-clock"; -+ clock-div = <2>; -+ clock-mult = <1>; -+ clocks = <&pll6 0>; -+ clock-output-names = "pll6d2"; -+ }; -+ -+ pll7: pll7_clk@1c2002c { -+ #clock-cells = <1>; -+ compatible = "allwinner,sun6i-a31-pll6-clk"; -+ reg = <0x01c2002c 0x4>; -+ clocks = <&osc24M>; -+ clock-output-names = "pll7", "pll7x2"; -+ }; -+ -+ cpu: cpu_clk@1c20050 { -+ #clock-cells = <0>; -+ compatible = "allwinner,sun4i-a10-cpu-clk"; -+ reg = <0x01c20050 0x4>; -+ clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll1>; -+ clock-output-names = "cpu"; -+ critical-clocks = <0>; -+ }; -+ -+ axi: axi_clk@1c20050 { -+ #clock-cells = <0>; -+ compatible = "allwinner,sun4i-a10-axi-clk"; -+ reg = <0x01c20050 0x4>; -+ clocks = <&cpu>; -+ clock-output-names = "axi"; -+ }; -+ -+ ahb1: ahb1_clk@1c20054 { -+ #clock-cells = <0>; -+ compatible = "allwinner,sun6i-a31-ahb1-clk"; -+ reg = <0x01c20054 0x4>; -+ clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>; -+ clock-output-names = "ahb1"; -+ }; -+ -+ ahb2: ahb2_clk@1c2005c { -+ #clock-cells = <0>; -+ compatible = "allwinner,sun8i-h3-ahb2-clk"; -+ reg = <0x01c2005c 0x4>; -+ clocks = <&ahb1>, <&pll6d2>; -+ clock-output-names = "ahb2"; -+ }; -+ -+ apb1: apb1_clk@1c20054 { -+ #clock-cells = <0>; -+ compatible = "allwinner,sun4i-a10-apb0-clk"; -+ reg = <0x01c20054 0x4>; -+ clocks = <&ahb1>; -+ clock-output-names = "apb1"; -+ }; -+ -+ apb2: apb2_clk@1c20058 { -+ #clock-cells = <0>; -+ compatible = "allwinner,sun4i-a10-apb1-clk"; -+ reg = <0x01c20058 0x4>; -+ clocks = <&osc32k>, <&osc24M>, <&pll6 1>, <&pll6 1>; -+ clock-output-names = "apb2"; -+ }; -+ -+ bus_gates: bus_gates_clk@1c20060 { -+ #clock-cells = <1>; -+ compatible = "allwinner,sun50i-a64-bus-gates-clk", -+ "allwinner,sunxi-multi-bus-gates-clk"; -+ reg = <0x01c20060 0x14>; -+ ahb1_parent { -+ clocks = <&ahb1>; -+ clock-indices = <1>, <5>, -+ <6>, <8>, -+ <9>, <10>, -+ <13>, <14>, -+ <18>, <19>, -+ <20>, <21>, -+ <23>, <24>, -+ <25>, <28>, -+ <32>, <35>, -+ <36>, <37>, -+ <40>, <43>, -+ <44>, <52>, -+ <53>, <54>, -+ <135>; -+ clock-output-names = "bus_mipidsi", "bus_ce", -+ "bus_dma", "bus_mmc0", -+ "bus_mmc1", "bus_mmc2", -+ "bus_nand", "bus_sdram", -+ "bus_ts", "bus_hstimer", -+ "bus_spi0", "bus_spi1", -+ "bus_otg", "bus_otg_ehci0", -+ "bus_ehci0", "bus_otg_ohci0", -+ "bus_ve", "bus_lcd0", -+ "bus_lcd1", "bus_deint", -+ "bus_csi", "bus_hdmi", -+ "bus_de", "bus_gpu", -+ "bus_msgbox", "bus_spinlock", -+ "bus_dbg"; -+ }; -+ ahb2_parent { -+ clocks = <&ahb2>; -+ clock-indices = <17>, <29>; -+ clock-output-names = "bus_gmac", "bus_ohci0"; -+ }; -+ apb1_parent { -+ clocks = <&apb1>; -+ clock-indices = <64>, <65>, -+ <69>, <72>, -+ <76>, <77>, -+ <78>; -+ clock-output-names = "bus_codec", "bus_spdif", -+ "bus_pio", "bus_ths", -+ "bus_i2s0", "bus_i2s1", -+ "bus_i2s2"; -+ }; -+ abp2_parent { -+ clocks = <&apb2>; -+ clock-indices = <96>, <97>, -+ <98>, <101>, -+ <112>, <113>, -+ <114>, <115>, -+ <116>; -+ clock-output-names = "bus_i2c0", "bus_i2c1", -+ "bus_i2c2", "bus_scr", -+ "bus_uart0", "bus_uart1", -+ "bus_uart2", "bus_uart3", -+ "bus_uart4"; -+ }; -+ }; -+ -+ mmc0_clk: mmc0_clk@1c20088 { -+ #clock-cells = <0>; -+ compatible = "allwinner,sun4i-a10-mod0-clk"; -+ reg = <0x01c20088 0x4>; -+ clocks = <&osc24M>, <&pll6 1>, <&pll7 1>; -+ clock-output-names = "mmc0"; -+ }; -+ -+ mmc1_clk: mmc1_clk@1c2008c { -+ #clock-cells = <0>; -+ compatible = "allwinner,sun4i-a10-mod0-clk"; -+ reg = <0x01c2008c 0x4>; -+ clocks = <&osc24M>, <&pll6 1>, <&pll7 1>; -+ clock-output-names = "mmc1"; -+ }; -+ -+ mmc2_clk: mmc2_clk@1c20090 { -+ #clock-cells = <0>; -+ compatible = "allwinner,sun4i-a10-mod0-clk"; -+ reg = <0x01c20090 0x4>; -+ clocks = <&osc24M>, <&pll6 1>, <&pll7 1>; -+ clock-output-names = "mmc2"; -+ }; -+ }; -+ -+ soc { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges; -+ -+ mmc0: mmc@1c0f000 { -+ compatible = "allwinner,sun50i-a64-mmc", -+ "allwinner,sun5i-a13-mmc"; -+ reg = <0x01c0f000 0x1000>; -+ clocks = <&bus_gates 8>, <&mmc0_clk>, -+ <&mmc0_clk>, <&mmc0_clk>; -+ clock-names = "ahb", "mmc", -+ "output", "sample"; -+ resets = <&ahb_rst 8>; -+ reset-names = "ahb"; -+ interrupts = ; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ mmc1: mmc@1c10000 { -+ compatible = "allwinner,sun50i-a64-mmc", -+ "allwinner,sun5i-a13-mmc"; -+ reg = <0x01c10000 0x1000>; -+ clocks = <&bus_gates 9>, <&mmc1_clk>, -+ <&mmc1_clk>, <&mmc1_clk>; -+ clock-names = "ahb", "mmc", -+ "output", "sample"; -+ resets = <&ahb_rst 9>; -+ reset-names = "ahb"; -+ interrupts = ; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ mmc2: mmc@1c11000 { -+ compatible = "allwinner,sun50i-a64-mmc", -+ "allwinner,sun5i-a13-mmc"; -+ reg = <0x01c11000 0x1000>; -+ clocks = <&bus_gates 10>, <&mmc2_clk>, -+ <&mmc2_clk>, <&mmc2_clk>; -+ clock-names = "ahb", "mmc", -+ "output", "sample"; -+ resets = <&ahb_rst 10>; -+ reset-names = "ahb"; -+ interrupts = ; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ pio: pinctrl@1c20800 { -+ compatible = "allwinner,sun50i-a64-pinctrl"; -+ reg = <0x01c20800 0x400>; -+ interrupts = , -+ , -+ ; -+ clocks = <&bus_gates 69>; -+ gpio-controller; -+ #gpio-cells = <3>; -+ interrupt-controller; -+ #interrupt-cells = <2>; -+ -+ uart0_pins_a: uart0@0 { -+ allwinner,pins = "PB8", "PB9"; -+ allwinner,function = "uart0"; -+ allwinner,drive = ; -+ allwinner,pull = ; -+ }; -+ -+ uart0_pins_b: uart0@1 { -+ allwinner,pins = "PF2", "PF3"; -+ allwinner,function = "uart0"; -+ allwinner,drive = ; -+ allwinner,pull = ; -+ }; -+ -+ uart1_2pins: uart1_2@0 { -+ allwinner,pins = "PG6", "PG7"; -+ allwinner,function = "uart1"; -+ allwinner,drive = ; -+ allwinner,pull = ; -+ }; -+ -+ uart1_4pins: uart1_4@0 { -+ allwinner,pins = "PG6", "PG7", "PG8", "PG9"; -+ allwinner,function = "uart1"; -+ allwinner,drive = ; -+ allwinner,pull = ; -+ }; -+ -+ uart2_2pins: uart2_2@0 { -+ allwinner,pins = "PB0", "PB1"; -+ allwinner,function = "uart2"; -+ allwinner,drive = ; -+ allwinner,pull = ; -+ }; -+ -+ uart2_4pins: uart2_4@0 { -+ allwinner,pins = "PB0", "PB1", "PB2", "PB3"; -+ allwinner,function = "uart2"; -+ allwinner,drive = ; -+ allwinner,pull = ; -+ }; -+ -+ uart3_pins_a: uart3@0 { -+ allwinner,pins = "PD0", "PD1"; -+ allwinner,function = "uart3"; -+ allwinner,drive = ; -+ allwinner,pull = ; -+ }; -+ -+ uart3_2pins_b: uart3_2@1 { -+ allwinner,pins = "PH4", "PH5"; -+ allwinner,function = "uart3"; -+ allwinner,drive = ; -+ allwinner,pull = ; -+ }; -+ -+ uart3_4pins_b: uart3_4@1 { -+ allwinner,pins = "PH4", "PH5", "PH6", "PH7"; -+ allwinner,function = "uart3"; -+ allwinner,drive = ; -+ allwinner,pull = ; -+ }; -+ -+ uart4_2pins: uart4_2@0 { -+ allwinner,pins = "PD2", "PD3"; -+ allwinner,function = "uart4"; -+ allwinner,drive = ; -+ allwinner,pull = ; -+ }; -+ -+ uart4_4pins: uart4_4@0 { -+ allwinner,pins = "PD2", "PD3", "PD4", "PD5"; -+ allwinner,function = "uart4"; -+ allwinner,drive = ; -+ allwinner,pull = ; -+ }; -+ -+ mmc0_pins: mmc0@0 { -+ allwinner,pins = "PF0", "PF1", "PF2", "PF3", -+ "PF4", "PF5"; -+ allwinner,function = "mmc0"; -+ allwinner,drive = ; -+ allwinner,pull = ; -+ }; -+ -+ mmc0_default_cd_pin: mmc0_cd_pin@0 { -+ allwinner,pins = "PF6"; -+ allwinner,function = "gpio_in"; -+ allwinner,drive = ; -+ allwinner,pull = ; -+ }; -+ -+ mmc1_pins: mmc1@0 { -+ allwinner,pins = "PG0", "PG1", "PG2", "PG3", -+ "PG4", "PG5"; -+ allwinner,function = "mmc1"; -+ allwinner,drive = ; -+ allwinner,pull = ; -+ }; -+ -+ mmc2_pins: mmc2@0 { -+ allwinner,pins = "PC1", "PC5", "PC6", "PC8", -+ "PC9", "PC10"; -+ allwinner,function = "mmc2"; -+ allwinner,drive = ; -+ allwinner,pull = ; -+ }; -+ -+ i2c0_pins: i2c0_pins { -+ allwinner,pins = "PH0", "PH1"; -+ allwinner,function = "i2c0"; -+ allwinner,drive = ; -+ allwinner,pull = ; -+ }; -+ -+ i2c1_pins: i2c1_pins { -+ allwinner,pins = "PH2", "PH3"; -+ allwinner,function = "i2c1"; -+ allwinner,drive = ; -+ allwinner,pull = ; -+ }; -+ -+ i2c2_pins: i2c2_pins { -+ allwinner,pins = "PE14", "PE15"; -+ allwinner,function = "i2c2"; -+ allwinner,drive = ; -+ allwinner,pull = ; -+ }; -+ }; -+ -+ ahb_rst: reset@1c202c0 { -+ #reset-cells = <1>; -+ compatible = "allwinner,sun6i-a31-clock-reset"; -+ reg = <0x01c202c0 0xc>; -+ }; -+ -+ apb1_rst: reset@1c202d0 { -+ #reset-cells = <1>; -+ compatible = "allwinner,sun6i-a31-clock-reset"; -+ reg = <0x01c202d0 0x4>; -+ }; -+ -+ apb2_rst: reset@1c202d8 { -+ #reset-cells = <1>; -+ compatible = "allwinner,sun6i-a31-clock-reset"; -+ reg = <0x01c202d8 0x4>; -+ }; -+ -+ uart0: serial@1c28000 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x01c28000 0x400>; -+ interrupts = ; -+ reg-shift = <2>; -+ reg-io-width = <4>; -+ clocks = <&bus_gates 112>; -+ resets = <&apb2_rst 16>; -+ status = "disabled"; -+ }; -+ -+ uart1: serial@1c28400 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x01c28400 0x400>; -+ interrupts = ; -+ reg-shift = <2>; -+ reg-io-width = <4>; -+ clocks = <&bus_gates 113>; -+ resets = <&apb2_rst 17>; -+ status = "disabled"; -+ }; -+ -+ uart2: serial@1c28800 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x01c28800 0x400>; -+ interrupts = ; -+ reg-shift = <2>; -+ reg-io-width = <4>; -+ clocks = <&bus_gates 114>; -+ resets = <&apb2_rst 18>; -+ status = "disabled"; -+ }; -+ -+ uart3: serial@1c28c00 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x01c28c00 0x400>; -+ interrupts = ; -+ reg-shift = <2>; -+ reg-io-width = <4>; -+ clocks = <&bus_gates 115>; -+ resets = <&apb2_rst 19>; -+ status = "disabled"; -+ }; -+ -+ uart4: serial@1c29000 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x01c29000 0x400>; -+ interrupts = ; -+ reg-shift = <2>; -+ reg-io-width = <4>; -+ clocks = <&bus_gates 116>; -+ resets = <&apb2_rst 20>; -+ status = "disabled"; -+ }; -+ -+ rtc: rtc@1f00000 { -+ compatible = "allwinner,sun6i-a31-rtc"; -+ reg = <0x01f00000 0x54>; -+ interrupts = , -+ ; -+ }; -+ -+ i2c0: i2c@1c2ac00 { -+ compatible = "allwinner,sun6i-a31-i2c"; -+ reg = <0x01c2ac00 0x400>; -+ interrupts = ; -+ clocks = <&bus_gates 96>; -+ resets = <&apb2_rst 0>; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ i2c1: i2c@1c2b000 { -+ compatible = "allwinner,sun6i-a31-i2c"; -+ reg = <0x01c2b000 0x400>; -+ interrupts = ; -+ clocks = <&bus_gates 97>; -+ resets = <&apb2_rst 1>; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ i2c2: i2c@1c2b400 { -+ compatible = "allwinner,sun6i-a31-i2c"; -+ reg = <0x01c2b400 0x400>; -+ interrupts = ; -+ clocks = <&bus_gates 98>; -+ resets = <&apb2_rst 2>; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ }; -+}; -diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile -index 3fd7901..3a9dc31 100644 ---- a/drivers/clk/sunxi/Makefile -+++ b/drivers/clk/sunxi/Makefile -@@ -11,6 +11,7 @@ obj-y += clk-a10-ve.o - obj-y += clk-a20-gmac.o - obj-y += clk-mod0.o - obj-y += clk-simple-gates.o -+obj-y += clk-multi-gates.o - obj-y += clk-sun8i-bus-gates.o - obj-y += clk-sun8i-mbus.o - obj-y += clk-sun9i-core.o -diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c -index 59428db..607ba53 100644 ---- a/drivers/clk/sunxi/clk-factors.c -+++ b/drivers/clk/sunxi/clk-factors.c -@@ -184,7 +184,8 @@ struct clk *sunxi_factors_register(struct device_node *node, - if (data->name) - clk_name = data->name; - else -- of_property_read_string(node, "clock-output-names", &clk_name); -+ of_property_read_string_index(node, "clock-output-names", -+ data->name_idx, &clk_name); - - factors = kzalloc(sizeof(struct clk_factors), GFP_KERNEL); - if (!factors) -diff --git a/drivers/clk/sunxi/clk-factors.h b/drivers/clk/sunxi/clk-factors.h -index 171085a..cc89d1f 100644 ---- a/drivers/clk/sunxi/clk-factors.h -+++ b/drivers/clk/sunxi/clk-factors.h -@@ -26,6 +26,7 @@ struct factors_data { - void (*getter)(struct factors_request *req); - void (*recalc)(struct factors_request *req); - const char *name; -+ int name_idx; - }; - - struct clk_factors { -diff --git a/drivers/clk/sunxi/clk-multi-gates.c b/drivers/clk/sunxi/clk-multi-gates.c -new file mode 100644 -index 0000000..76e715a ---- /dev/null -+++ b/drivers/clk/sunxi/clk-multi-gates.c -@@ -0,0 +1,105 @@ -+/* -+ * Copyright (C) 2016 ARM Ltd. -+ * -+ * Based on clk-sun8i-bus-gates.c, which is: -+ * Copyright (C) 2015 Jens Kuske -+ * Based on clk-simple-gates.c, which is: -+ * Copyright 2015 Maxime Ripard -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+static DEFINE_SPINLOCK(gates_lock); -+ -+static void __init sunxi_parse_parent(struct device_node *node, -+ struct clk_onecell_data *clk_data, -+ void __iomem *reg) -+{ -+ const char *parent = of_clk_get_parent_name(node, 0); -+ const char *clk_name; -+ struct property *prop; -+ struct clk *clk; -+ const __be32 *p; -+ int index, i = 0; -+ -+ of_property_for_each_u32(node, "clock-indices", prop, p, index) { -+ of_property_read_string_index(node, "clock-output-names", -+ i, &clk_name); -+ -+ clk = clk_register_gate(NULL, clk_name, parent, 0, -+ reg + 4 * (index / 32), index % 32, -+ 0, &gates_lock); -+ i++; -+ if (IS_ERR(clk)) { -+ pr_warn("could not register gate clock \"%s\"\n", -+ clk_name); -+ continue; -+ } -+ if (clk_data->clks[index]) -+ pr_warn("bus-gate clock %s: index #%d already registered as %s\n", -+ clk_name, index, "?"); -+ else -+ clk_data->clks[index] = clk; -+ } -+} -+ -+static void __init sunxi_multi_bus_gates_init(struct device_node *node) -+{ -+ struct clk_onecell_data *clk_data; -+ struct device_node *child; -+ struct property *prop; -+ struct resource res; -+ void __iomem *reg; -+ const __be32 *p; -+ int number = 0; -+ int index; -+ -+ reg = of_io_request_and_map(node, 0, of_node_full_name(node)); -+ if (IS_ERR(reg)) -+ return; -+ -+ clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL); -+ if (!clk_data) -+ goto err_unmap; -+ -+ for_each_child_of_node(node, child) -+ of_property_for_each_u32(child, "clock-indices", prop, p, index) -+ number = max(number, index); -+ -+ clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL); -+ if (!clk_data->clks) -+ goto err_free_data; -+ -+ for_each_child_of_node(node, child) -+ sunxi_parse_parent(child, clk_data, reg); -+ -+ clk_data->clk_num = number + 1; -+ if (of_clk_add_provider(node, of_clk_src_onecell_get, clk_data)) -+ pr_err("registering bus-gate clock %s failed\n", node->name); -+ -+ return; -+ -+err_free_data: -+ kfree(clk_data); -+err_unmap: -+ iounmap(reg); -+ of_address_to_resource(node, 0, &res); -+ release_mem_region(res.start, resource_size(&res)); -+} -+ -+CLK_OF_DECLARE(sunxi_multi_bus_gates, "allwinner,sunxi-multi-bus-gates-clk", -+ sunxi_multi_bus_gates_init); -diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c -index 5ba2188..ca59458 100644 ---- a/drivers/clk/sunxi/clk-sunxi.c -+++ b/drivers/clk/sunxi/clk-sunxi.c -@@ -711,14 +711,14 @@ static const struct factors_data sun4i_pll6_data __initconst = { - .enable = 31, - .table = &sun4i_pll5_config, - .getter = sun4i_get_pll5_factors, -- .name = "pll6", -+ .name_idx = 2, - }; - - static const struct factors_data sun6i_a31_pll6_data __initconst = { - .enable = 31, - .table = &sun6i_a31_pll6_config, - .getter = sun6i_a31_get_pll6_factors, -- .name = "pll6x2", -+ .name_idx = 1, - }; - - static const struct factors_data sun5i_a13_ahb_data __initconst = { --- -2.5.0 - diff --git a/KEYS-potential-uninitialized-variable.patch b/KEYS-potential-uninitialized-variable.patch deleted file mode 100644 index 23cabbb2e..000000000 --- a/KEYS-potential-uninitialized-variable.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 82a50018782f84e733e718d4b24e1653d19333be Mon Sep 17 00:00:00 2001 -From: Dan Carpenter -Date: Wed, 15 Jun 2016 09:31:45 -0400 -Subject: [PATCH] KEYS: potential uninitialized variable - -If __key_link_begin() failed then "edit" would be uninitialized. I've -added a check to fix that. - -Fixes: f70e2e06196a ('KEYS: Do preallocation for __key_link()') -Signed-off-by: Dan Carpenter ---- - security/keys/key.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/security/keys/key.c b/security/keys/key.c -index bd5a272f28a6..346fbf201c22 100644 ---- a/security/keys/key.c -+++ b/security/keys/key.c -@@ -597,7 +597,7 @@ int key_reject_and_link(struct key *key, - - mutex_unlock(&key_construction_mutex); - -- if (keyring) -+ if (keyring && link_ret == 0) - __key_link_end(keyring, &key->index_key, edit); - - /* wake up anyone waiting for a key to be constructed */ --- -2.5.5 - diff --git a/USB-usbfs-fix-potential-infoleak-in-devio.patch b/USB-usbfs-fix-potential-infoleak-in-devio.patch deleted file mode 100644 index 48360c930..000000000 --- a/USB-usbfs-fix-potential-infoleak-in-devio.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 7adc5cbc25dcc47dc3856108d9823d08da75da9d Mon Sep 17 00:00:00 2001 -From: Kangjie Lu -Date: Tue, 3 May 2016 16:32:16 -0400 -Subject: [PATCH] USB: usbfs: fix potential infoleak in devio -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The stack object “ci” has a total size of 8 bytes. Its last 3 bytes -are padding bytes which are not initialized and leaked to userland -via “copy_to_user”. - -Signed-off-by: Kangjie Lu -Signed-off-by: Greg Kroah-Hartman ---- - drivers/usb/core/devio.c | 9 +++++---- - 1 file changed, 5 insertions(+), 4 deletions(-) - -diff --git a/drivers/usb/core/devio.c b/drivers/usb/core/devio.c -index 52c4461dfccd..9b7f1f75e887 100644 ---- a/drivers/usb/core/devio.c -+++ b/drivers/usb/core/devio.c -@@ -1316,10 +1316,11 @@ static int proc_getdriver(struct usb_dev_state *ps, void __user *arg) - - static int proc_connectinfo(struct usb_dev_state *ps, void __user *arg) - { -- struct usbdevfs_connectinfo ci = { -- .devnum = ps->dev->devnum, -- .slow = ps->dev->speed == USB_SPEED_LOW -- }; -+ struct usbdevfs_connectinfo ci; -+ -+ memset(&ci, 0, sizeof(ci)); -+ ci.devnum = ps->dev->devnum; -+ ci.slow = ps->dev->speed == USB_SPEED_LOW; - - if (copy_to_user(arg, &ci, sizeof(ci))) - return -EFAULT; --- -2.5.5 - diff --git a/arm-imx6-hummingboard2.patch b/arm-imx6-hummingboard2.patch index bcf2961dc..bcb93214e 100644 --- a/arm-imx6-hummingboard2.patch +++ b/arm-imx6-hummingboard2.patch @@ -1,34 +1,39 @@ -From e2b55af60f9f498b95ffb458955f4ff787bd55a1 Mon Sep 17 00:00:00 2001 +From e9e601215d294d473a593641b1ecfd1fa4586a90 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Fri, 20 Jan 2017 08:32:55 +0000 -Subject: [PATCH] Add support for Hummingobard2 (Edge/Gate) +Date: Thu, 6 Apr 2017 13:52:54 +0100 +Subject: [PATCH 1/4] [RFC,v2,1/4] ARM: dts: imx6qdl: add HummingBoard2 boards -http://www.spinics.net/lists/arm-kernel/msg552554.html +From: Jon Nettleton -Signed-off-by: Peter Robinson +This adds support for the Hummingboard Gate and Edge devices from +SolidRun. + +Signed-off-by: Jon Nettleton +Signed-off-by: Rabeeh Khoury +Signed-off-by: Russell King --- arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/imx6dl-hummingboard2.dts | 52 +++ arch/arm/boot/dts/imx6q-hummingboard2.dts | 60 +++ - arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi | 562 +++++++++++++++++++++++++++ - 4 files changed, 676 insertions(+) + arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi | 543 +++++++++++++++++++++++++++ + 4 files changed, 657 insertions(+) create mode 100644 arch/arm/boot/dts/imx6dl-hummingboard2.dts create mode 100644 arch/arm/boot/dts/imx6q-hummingboard2.dts create mode 100644 arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index 7327250..09227cc 100644 +index 011808490fed..ccdff6650541 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile -@@ -348,6 +348,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ +@@ -353,6 +353,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ imx6dl-gw552x.dtb \ imx6dl-gw553x.dtb \ imx6dl-hummingboard.dtb \ + imx6dl-hummingboard2.dtb \ imx6dl-icore.dtb \ + imx6dl-icore-rqs.dtb \ imx6dl-nit6xlite.dtb \ - imx6dl-nitrogen6x.dtb \ -@@ -390,6 +391,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ +@@ -397,6 +398,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ imx6q-gw553x.dtb \ imx6q-h100.dtb \ imx6q-hummingboard.dtb \ @@ -38,7 +43,7 @@ index 7327250..09227cc 100644 imx6q-marsboard.dtb \ diff --git a/arch/arm/boot/dts/imx6dl-hummingboard2.dts b/arch/arm/boot/dts/imx6dl-hummingboard2.dts new file mode 100644 -index 0000000..990b505 +index 000000000000..990b5050de5b --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-hummingboard2.dts @@ -0,0 +1,52 @@ @@ -96,7 +101,7 @@ index 0000000..990b505 +}; diff --git a/arch/arm/boot/dts/imx6q-hummingboard2.dts b/arch/arm/boot/dts/imx6q-hummingboard2.dts new file mode 100644 -index 0000000..f5eec91 +index 000000000000..f5eec9163bb8 --- /dev/null +++ b/arch/arm/boot/dts/imx6q-hummingboard2.dts @@ -0,0 +1,60 @@ @@ -162,10 +167,10 @@ index 0000000..f5eec91 +}; diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi new file mode 100644 -index 0000000..66098a5 +index 000000000000..11b63f6f2b89 --- /dev/null +++ b/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi -@@ -0,0 +1,562 @@ +@@ -0,0 +1,543 @@ +/* + * Device Tree file for SolidRun HummingBoard2 + * Copyright (C) 2015 Rabeeh Khoury @@ -180,12 +185,12 @@ index 0000000..66098a5 + * published by the Free Software Foundation; either version 2 of the + * License. + * -+ * This file is distributed in the hope that it will be useful ++ * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * -+ * Or, alternatively ++ * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation @@ -199,11 +204,11 @@ index 0000000..66098a5 + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * -+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. @@ -218,88 +223,77 @@ index 0000000..66098a5 + + ir_recv: ir-receiver { + compatible = "gpio-ir-receiver"; -+ gpios = <&gpio7 9 GPIO_ACTIVE_LOW>; ++ gpios = <&gpio7 9 1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hummingboard2_gpio7_9>; + linux,rc-map-name = "rc-rc6-mce"; + }; + -+ regulators { -+ compatible = "simple-bus"; ++ usdhc2_pwrseq: usdhc2-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; ++ }; + -+ reg_3p3v: 3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; ++ reg_3p3v: regulator-3p3v { ++ compatible = "regulator-fixed"; ++ regulator-name = "3P3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; + -+ reg_1p8v: 1p8v { -+ compatible = "regulator-fixed"; -+ regulator-name = "1P8V"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ }; ++ reg_1p8v: regulator-1p8v { ++ compatible = "regulator-fixed"; ++ regulator-name = "1P8V"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ }; + -+ reg_usdhc2_vmmc: reg-usdhc2-vmmc { -+ compatible = "regulator-fixed"; -+ gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hummingboard2_vmmc>; -+ regulator-boot-on; -+ regulator-max-microvolt = <3300000>; -+ regulator-min-microvolt = <3300000>; -+ regulator-name = "usdhc2_vmmc"; -+ startup-delay-us = <1000>; -+ }; ++ reg_usbh1_vbus: regulator-usb-h1-vbus { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 0 0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hummingboard2_usbh1_vbus>; ++ regulator-name = "usb_h1_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; + -+ reg_usbh1_vbus: usb-h1-vbus { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hummingboard2_usbh1_vbus>; -+ regulator-name = "usb_h1_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ }; ++ reg_usbotg_vbus: regulator-usb-otg-vbus { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio3 22 0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hummingboard2_usbotg_vbus>; ++ regulator-name = "usb_otg_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; + -+ reg_usbotg_vbus: usb-otg-vbus { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hummingboard2_usbotg_vbus>; -+ regulator-name = "usb_otg_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ }; ++ reg_usbh2_vbus: regulator-usb-h2-vbus { ++ compatible = "regulator-gpio"; ++ enable-active-high; ++ enable-gpio = <&gpio2 13 0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hummingboard2_usbh2_vbus>; ++ regulator-name = "usb_h2_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-boot-on; ++ }; + -+ reg_usbh2_vbus: usb-h2-vbus { -+ compatible = "regulator-gpio"; -+ enable-active-high; -+ enable-gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hummingboard2_usbh2_vbus>; -+ regulator-name = "usb_h2_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-boot-on; -+ }; -+ -+ reg_usbh3_vbus: usb-h3-vbus { -+ compatible = "regulator-gpio"; -+ enable-active-high; -+ enable-gpio = <&gpio7 10 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hummingboard2_usbh3_vbus>; -+ regulator-name = "usb_h3_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-boot-on; -+ }; ++ reg_usbh3_vbus: regulator-usb-h3-vbus { ++ compatible = "regulator-gpio"; ++ enable-active-high; ++ enable-gpio = <&gpio7 10 0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hummingboard2_usbh3_vbus>; ++ regulator-name = "usb_h3_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-boot-on; + }; + + sound-sgtl5000 { @@ -323,7 +317,6 @@ index 0000000..66098a5 +&ecspi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hummingboard2_ecspi2>; -+ fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio2 26 0>; + status = "okay"; +}; @@ -341,13 +334,13 @@ index 0000000..66098a5 + pinctrl-0 = <&pinctrl_hummingboard2_i2c1>; + status = "okay"; + -+ rtc: pcf8523@68 { ++ pcf8523: rtc@68 { + compatible = "nxp,pcf8523"; + reg = <0x68>; + nxp,12p5_pf; + }; + -+ sgtl5000: sgtl5000@0a { ++ sgtl5000: codec@0a { + clocks = <&clks IMX6QDL_CLK_CKO>; + compatible = "fsl,sgtl5000"; + pinctrl-names = "default"; @@ -375,6 +368,7 @@ index 0000000..66098a5 +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; ++ + hummingboard2 { + pinctrl_hog: hoggrp { + fsl,pins = < @@ -474,6 +468,15 @@ index 0000000..66098a5 + >; + }; + ++ pinctrl_hummingboard2_ecspi2: hummingboard2-ecspi2grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 ++ MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1 ++ MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1 ++ MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1 /* CS */ ++ >; ++ }; ++ + pinctrl_hummingboard2_gpio7_9: hummingboard2-gpio7_9 { + fsl,pins = < + MX6QDL_PAD_SD4_CMD__GPIO7_IO09 0x80000000 @@ -507,13 +510,13 @@ index 0000000..66098a5 + >; + }; + -+ pinctrl_hummingboard2_mipi: hummingboard2_mipi { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x4001b8b1 -+ MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x4001b8b1 -+ MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0 -+ >; -+ }; ++ pinctrl_hummingboard2_mipi: hummingboard2_mipi { ++ fsl,pins = < ++ MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x4001b8b1 ++ MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x4001b8b1 ++ MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0 ++ >; ++ }; + + pinctrl_hummingboard2_pcie_reset: hummingboard2-pcie-reset { + fsl,pins = < @@ -563,6 +566,7 @@ index 0000000..66098a5 + + pinctrl_hummingboard2_usdhc2_aux: hummingboard2-usdhc2-aux { + fsl,pins = < ++ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x13071 + MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071 + MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0 + >; @@ -601,12 +605,6 @@ index 0000000..66098a5 + >; + }; + -+ pinctrl_hummingboard2_vmmc: hummingboard2-vmmc { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071 -+ >; -+ }; -+ + pinctrl_hummingboard2_usdhc3: hummingboard2-usdhc3 { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 @@ -629,15 +627,6 @@ index 0000000..66098a5 + MX6QDL_PAD_EIM_D24__UART3_RX_DATA 0x40013000 + >; + }; -+ -+ pinctrl_hummingboard2_ecspi2: hummingboard2-ecspi2grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 -+ MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1 -+ MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1 -+ MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1 /* CS */ -+ >; -+ }; + }; +}; + @@ -652,9 +641,7 @@ index 0000000..66098a5 + +&pcie { + pinctrl-names = "default"; -+ pinctrl-0 = < -+ &pinctrl_hummingboard2_pcie_reset -+ >; ++ pinctrl-0 = <&pinctrl_hummingboard2_pcie_reset>; + reset-gpio = <&gpio2 11 0>; + status = "okay"; +}; @@ -674,7 +661,6 @@ index 0000000..66098a5 +}; + +&ssi1 { -+ fsl,mode = "i2s-slave"; + status = "okay"; +}; + @@ -706,8 +692,8 @@ index 0000000..66098a5 + &pinctrl_hummingboard2_usdhc2_aux + &pinctrl_hummingboard2_usdhc2_200mhz + >; -+ vmmc-supply = <®_usdhc2_vmmc>; -+ cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; ++ mmc-pwrseq = <&usdhc2_pwrseq>; ++ cd-gpios = <&gpio1 4 0>; + status = "okay"; +}; + @@ -729,5 +715,188 @@ index 0000000..66098a5 + status = "okay"; +}; -- -2.9.3 +2.12.2 + +From 3da2a99c4a8f19e846b19071441d2c6b88e00c06 Mon Sep 17 00:00:00 2001 +From: Russell King +Date: Fri, 13 Jan 2017 14:45:30 +0000 +Subject: [PATCH 2/4] ARM: dts: imx6*-hummingboard2: fix SD card detect + +Fix the SD card detect signal, which was missing the polarity +specification, and the pull-up necessary for proper signalling. + +Signed-off-by: Russell King +--- + arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi +index 11b63f6f2b89..734487edf200 100644 +--- a/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi +@@ -393,7 +393,7 @@ + + pinctrl_hummingboard2_usdhc2_aux: hummingboard2-usdhc2-aux { + fsl,pins = < +- MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x13071 ++ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071 + MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071 + MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0 + >; +@@ -520,7 +520,7 @@ + &pinctrl_hummingboard2_usdhc2_200mhz + >; + mmc-pwrseq = <&usdhc2_pwrseq>; +- cd-gpios = <&gpio1 4 0>; ++ cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + +-- +2.12.2 + +From 57b0103b600a535a35e5ff9714649519a0b3a77a Mon Sep 17 00:00:00 2001 +From: Russell King +Date: Fri, 13 Jan 2017 14:45:35 +0000 +Subject: [PATCH 3/4] ARM: dts: imx6*-hummingboard2: use proper gpio flags + definitions + +Use proper gpio flag definitions for GPIOs rather than using opaque +uninformative numbers. + +Signed-off-by: Russell King +--- + arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi +index 734487edf200..88aaed26dd77 100644 +--- a/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi +@@ -50,7 +50,7 @@ + + ir_recv: ir-receiver { + compatible = "gpio-ir-receiver"; +- gpios = <&gpio7 9 1>; ++ gpios = <&gpio7 9 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hummingboard2_gpio7_9>; + linux,rc-map-name = "rc-rc6-mce"; +@@ -80,7 +80,7 @@ + reg_usbh1_vbus: regulator-usb-h1-vbus { + compatible = "regulator-fixed"; + enable-active-high; +- gpio = <&gpio1 0 0>; ++ gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hummingboard2_usbh1_vbus>; + regulator-name = "usb_h1_vbus"; +@@ -91,7 +91,7 @@ + reg_usbotg_vbus: regulator-usb-otg-vbus { + compatible = "regulator-fixed"; + enable-active-high; +- gpio = <&gpio3 22 0>; ++ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hummingboard2_usbotg_vbus>; + regulator-name = "usb_otg_vbus"; +@@ -102,7 +102,7 @@ + reg_usbh2_vbus: regulator-usb-h2-vbus { + compatible = "regulator-gpio"; + enable-active-high; +- enable-gpio = <&gpio2 13 0>; ++ enable-gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hummingboard2_usbh2_vbus>; + regulator-name = "usb_h2_vbus"; +@@ -114,7 +114,7 @@ + reg_usbh3_vbus: regulator-usb-h3-vbus { + compatible = "regulator-gpio"; + enable-active-high; +- enable-gpio = <&gpio7 10 0>; ++ enable-gpio = <&gpio7 10 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hummingboard2_usbh3_vbus>; + regulator-name = "usb_h3_vbus"; +-- +2.12.2 + +From f931de70370ff576f381cb9745bc54225a1a8056 Mon Sep 17 00:00:00 2001 +From: Russell King +Date: Fri, 13 Jan 2017 14:45:40 +0000 +Subject: [PATCH 4/4] ARM: dts: imx6*-hummingboard2: convert to more + conventional vmmc-supply + +Signed-off-by: Russell King +--- + arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi | 26 +++++++++++++++++++------- + 1 file changed, 19 insertions(+), 7 deletions(-) + +diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi +index 88aaed26dd77..f19d30b34ac4 100644 +--- a/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi +@@ -56,11 +56,6 @@ + linux,rc-map-name = "rc-rc6-mce"; + }; + +- usdhc2_pwrseq: usdhc2-pwrseq { +- compatible = "mmc-pwrseq-simple"; +- reset-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; +- }; +- + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; +@@ -123,6 +118,18 @@ + regulator-boot-on; + }; + ++ reg_usdhc2_vmmc: reg-usdhc2-vmmc { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hummingboard2_vmmc>; ++ regulator-boot-on; ++ regulator-max-microvolt = <3300000>; ++ regulator-min-microvolt = <3300000>; ++ regulator-name = "usdhc2_vmmc"; ++ startup-delay-us = <1000>; ++ }; ++ + sound-sgtl5000 { + audio-codec = <&sgtl5000>; + audio-routing = +@@ -393,7 +400,6 @@ + + pinctrl_hummingboard2_usdhc2_aux: hummingboard2-usdhc2-aux { + fsl,pins = < +- MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071 + MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071 + MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0 + >; +@@ -432,6 +438,12 @@ + >; + }; + ++ pinctrl_hummingboard2_vmmc: hummingboard2-vmmc { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071 ++ >; ++ }; ++ + pinctrl_hummingboard2_usdhc3: hummingboard2-usdhc3 { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 +@@ -519,7 +531,7 @@ + &pinctrl_hummingboard2_usdhc2_aux + &pinctrl_hummingboard2_usdhc2_200mhz + >; +- mmc-pwrseq = <&usdhc2_pwrseq>; ++ vmmc-supply = <®_usdhc2_vmmc>; + cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + status = "okay"; + }; +-- +2.12.2 diff --git a/arm-rk3288-tinker.patch b/arm-rk3288-tinker.patch new file mode 100644 index 000000000..d7a4897b3 --- /dev/null +++ b/arm-rk3288-tinker.patch @@ -0,0 +1,573 @@ +From 223599514133293bb9afe7b82937140c3b275877 Mon Sep 17 00:00:00 2001 +From: Eddie Cai +Date: Tue, 14 Feb 2017 18:07:31 +0800 +Subject: ARM: dts: rockchip: add dts for RK3288-Tinker board + +This patch add basic support for RK3288-Tinker board. We can boot in to rootfs +with this patch. + +Signed-off-by: Eddie Cai +Signed-off-by: Heiko Stuebner +--- + arch/arm/boot/dts/Makefile | 1 + + arch/arm/boot/dts/rk3288-tinker.dts | 536 ++++++++++++++++++++++++++++++++++++ + 2 files changed, 537 insertions(+) + create mode 100644 arch/arm/boot/dts/rk3288-tinker.dts + +diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile +index 0118084..fb46849 100644 +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -695,6 +695,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ + rk3288-popmetal.dtb \ + rk3288-r89.dtb \ + rk3288-rock2-square.dtb \ ++ rk3288-tinker.dtb \ + rk3288-veyron-brain.dtb \ + rk3288-veyron-jaq.dtb \ + rk3288-veyron-jerry.dtb \ +diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts +new file mode 100644 +index 0000000..f601c78 +--- /dev/null ++++ b/arch/arm/boot/dts/rk3288-tinker.dts +@@ -0,0 +1,536 @@ ++/* ++ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++ ++#include "rk3288.dtsi" ++#include ++ ++/ { ++ model = "Rockchip RK3288 Tinker Board"; ++ compatible = "asus,rk3288-tinker", "rockchip,rk3288"; ++ ++ memory { ++ reg = <0x0 0x80000000>; ++ device_type = "memory"; ++ }; ++ ++ ext_gmac: external-gmac-clock { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <125000000>; ++ clock-output-names = "ext_gmac"; ++ }; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ autorepeat; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwrbtn>; ++ ++ button@0 { ++ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; ++ linux,code = ; ++ label = "GPIO Key Power"; ++ linux,input-type = <1>; ++ wakeup-source; ++ debounce-interval = <100>; ++ }; ++ }; ++ ++ gpio-leds { ++ compatible = "gpio-leds"; ++ ++ act-led { ++ gpios=<&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger="mmc0"; ++ }; ++ ++ heartbeat-led { ++ gpios=<&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger="heartbeat"; ++ }; ++ ++ pwr-led { ++ gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "default-on"; ++ }; ++ }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "rockchip,tinker-codec"; ++ simple-audio-card,mclk-fs = <512>; ++ ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s>; ++ }; ++ }; ++ ++ vcc_sys: vsys-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_sys"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio7 11 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc_pwr>; ++ regulator-name = "vcc_sd"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ vin-supply = <&vcc_io>; ++ }; ++}; ++ ++&cpu0 { ++ cpu0-supply = <&vdd_cpu>; ++}; ++ ++&gmac { ++ assigned-clocks = <&cru SCLK_MAC>; ++ assigned-clock-parents = <&ext_gmac>; ++ clock_in_out = "input"; ++ phy-mode = "rgmii"; ++ phy-supply = <&vcc33_lan>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ snps,reset-gpio = <&gpio4 7 0>; ++ snps,reset-active-low; ++ snps,reset-delays-us = <0 10000 1000000>; ++ tx_delay = <0x30>; ++ rx_delay = <0x10>; ++ status = "ok"; ++}; ++ ++&hdmi { ++ ddc-i2c-bus = <&i2c5>; ++ status = "okay"; ++}; ++ ++&i2c0 { ++ clock-frequency = <400000>; ++ status = "okay"; ++ ++ rk808: pmic@1b { ++ compatible = "rockchip,rk808"; ++ reg = <0x1b>; ++ interrupt-parent = <&gpio0>; ++ interrupts = <4 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk808-clkout2"; ++ dvs-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>, ++ <&gpio0 12 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int &global_pwroff &dvs_1 &dvs_2>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vcc_sys>; ++ vcc2-supply = <&vcc_sys>; ++ vcc3-supply = <&vcc_sys>; ++ vcc4-supply = <&vcc_sys>; ++ vcc6-supply = <&vcc_sys>; ++ vcc7-supply = <&vcc_sys>; ++ vcc8-supply = <&vcc_io>; ++ vcc9-supply = <&vcc_io>; ++ vcc10-supply = <&vcc_io>; ++ vcc11-supply = <&vcc_sys>; ++ vcc12-supply = <&vcc_io>; ++ vddio-supply = <&vcc_io>; ++ ++ regulators { ++ vdd_cpu: DCDC_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-name = "vdd_arm"; ++ regulator-ramp-delay = <6000>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: DCDC_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <1250000>; ++ regulator-name = "vdd_gpu"; ++ regulator-ramp-delay = <6000>; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_ddr"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io: DCDC_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc_io"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc18_ldo1: LDO_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc18_ldo1"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc33_mipi: LDO_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc33_mipi"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_10: LDO_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ regulator-name = "vdd_10"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vcc18_codec: LDO_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc18_codec"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vccio_sd: LDO_REG5 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_sd"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vdd10_lcd: LDO_REG6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ regulator-name = "vdd10_lcd"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vcc_18: LDO_REG7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_18"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_lcd: LDO_REG8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc18_lcd"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc33_sd: SWITCH_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc33_sd"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc33_lan: SWITCH_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc33_lan"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2c2 { ++ status = "okay"; ++}; ++ ++&i2c5 { ++ status = "okay"; ++}; ++ ++&i2s { ++ #sound-dai-cells = <0>; ++ status = "okay"; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ sdcard-supply = <&vccio_sd>; ++}; ++ ++&pinctrl { ++ pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { ++ drive-strength = <8>; ++ }; ++ ++ pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma { ++ bias-pull-up; ++ drive-strength = <8>; ++ }; ++ ++ backlight { ++ bl_en: bl-en { ++ rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ buttons { ++ pwrbtn: pwrbtn { ++ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ eth_phy { ++ eth_phy_pwr: eth-phy-pwr { ++ rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int: pmic-int { ++ rockchip,pins = ; ++ }; ++ ++ dvs_1: dvs-1 { ++ rockchip,pins = ; ++ }; ++ ++ dvs_2: dvs-2 { ++ rockchip,pins = ; ++ }; ++ }; ++ ++ sdmmc { ++ sdmmc_bus4: sdmmc-bus4 { ++ rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, ++ <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, ++ <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, ++ <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; ++ }; ++ ++ sdmmc_clk: sdmmc-clk { ++ rockchip,pins = <6 20 RK_FUNC_1 \ ++ &pcfg_pull_none_drv_8ma>; ++ }; ++ ++ sdmmc_cmd: sdmmc-cmd { ++ rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; ++ }; ++ ++ sdmmc_pwr: sdmmc-pwr { ++ rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb { ++ host_vbus_drv: host-vbus-drv { ++ rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ pwr_3g: pwr-3g { ++ rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pwm0 { ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&vcc18_ldo1>; ++ status ="okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ card-detect-delay = <200>; ++ disable-wp; /* wp not hooked up */ ++ num-slots = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; ++ status = "okay"; ++ vmmc-supply = <&vcc33_sd>; ++ vqmmc-supply = <&vccio_sd>; ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ ++ rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ ++ status = "okay"; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; ++ ++&uart1 { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&uart3 { ++ status = "okay"; ++}; ++ ++&uart4 { ++ status = "okay"; ++}; ++ ++&usbphy { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1 { ++ status = "okay"; ++}; ++ ++&usb_otg { ++ status= "okay"; ++}; ++ ++&vopb { ++ status = "okay"; ++}; ++ ++&vopb_mmu { ++ status = "okay"; ++}; ++ ++&vopl { ++ status = "okay"; ++}; ++ ++&vopl_mmu { ++ status = "okay"; ++}; ++ ++&wdt { ++ status = "okay"; ++}; +-- +cgit v1.1 + diff --git a/arm64-Add-option-of-13-for-FORCE_MAX_ZONEORDER.patch b/arm64-Add-option-of-13-for-FORCE_MAX_ZONEORDER.patch new file mode 100644 index 000000000..6417bc29a --- /dev/null +++ b/arm64-Add-option-of-13-for-FORCE_MAX_ZONEORDER.patch @@ -0,0 +1,29 @@ +From 487ff7b0e537506057960a0c2d9482d19f2acf4a Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 26 Apr 2017 11:12:54 +0100 +Subject: [PATCH] Add option of 13 for FORCE_MAX_ZONEORDER + +This is a hack, but it's what the other distros currently use +for aarch64 with 4K pages so we'll do the same while upstream +decides what the best outcome is (which isn't this). + +Signed-off-by: Peter Robinson +--- + arch/arm64/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig +index 3741859765cf..deec9511f1d3 100644 +--- a/arch/arm64/Kconfig ++++ b/arch/arm64/Kconfig +@@ -751,6 +751,7 @@ config XEN + config FORCE_MAX_ZONEORDER + int + default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE) ++ default "13" if (ARCH_THUNDER && !ARM64_64K_PAGES) + default "12" if (ARM64_16K_PAGES && TRANSPARENT_HUGEPAGE) + default "11" + help +-- +2.12.2 + diff --git a/arm64-acpi-drop-expert-patch.patch b/arm64-acpi-drop-expert-patch.patch deleted file mode 100644 index 6122732d6..000000000 --- a/arm64-acpi-drop-expert-patch.patch +++ /dev/null @@ -1,21 +0,0 @@ -From: Peter Robinson -Date: Sun, 3 May 2015 18:35:23 +0100 -Subject: [PATCH] arm64: acpi drop expert patch - ---- - drivers/acpi/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig -index 114cf48085ab..70ba3ef9a37b 100644 ---- a/drivers/acpi/Kconfig -+++ b/drivers/acpi/Kconfig -@@ -5,7 +5,7 @@ - menuconfig ACPI - bool "ACPI (Advanced Configuration and Power Interface) Support" - depends on !IA64_HP_SIM -- depends on IA64 || X86 || (ARM64 && EXPERT) -+ depends on IA64 || X86 || ARM64 - depends on PCI - select PNP - default y diff --git a/arm64-avoid-needing-console-to-enable-serial-console.patch b/arm64-avoid-needing-console-to-enable-serial-console.patch deleted file mode 100644 index 3c639a0a3..000000000 --- a/arm64-avoid-needing-console-to-enable-serial-console.patch +++ /dev/null @@ -1,46 +0,0 @@ -From ce7a9e482dcf66d155e74b39ada1708cf6d9cb25 Mon Sep 17 00:00:00 2001 -From: Mark Salter -Date: Wed, 25 Mar 2015 14:17:50 -0400 -Subject: [PATCH] arm64: avoid needing console= to enable serial console - -Tell kernel to prefer one of the serial ports for console on -platforms currently supported (pl011 or 8250). console= on -command line will override these assumed preferences. This is -just a hack to get the behavior we want from DT provided by -firmware. - -Signed-off-by: Mark Salter ---- - arch/arm64/kernel/setup.c | 20 ++++++++++++++++++++ - 1 file changed, 20 insertions(+) - -diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c -index 9dc67769b6a4..dfac33b47423 100644 ---- a/arch/arm64/kernel/setup.c -+++ b/arch/arm64/kernel/setup.c -@@ -417,3 +417,22 @@ static int __init register_kernel_offset_dumper(void) - return 0; - } - __initcall(register_kernel_offset_dumper); -+ -+/* -+ * Temporary hack to avoid need for console= on command line -+ */ -+static int __init arm64_console_setup(void) -+{ -+ /* Allow cmdline to override our assumed preferences */ -+ if (console_set_on_cmdline) -+ return 0; -+ -+ if (IS_ENABLED(CONFIG_SERIAL_AMBA_PL011)) -+ add_preferred_console("ttyAMA", 0, "115200"); -+ -+ if (IS_ENABLED(CONFIG_SERIAL_8250)) -+ add_preferred_console("ttyS", 0, "115200"); -+ -+ return 0; -+} -+early_initcall(arm64_console_setup); --- -2.5.0 - diff --git a/arm64-hikey-fixes.patch b/arm64-hikey-fixes.patch new file mode 100644 index 000000000..18bc05b2b --- /dev/null +++ b/arm64-hikey-fixes.patch @@ -0,0 +1,77 @@ +From patchwork Sat Apr 8 07:18:40 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: reset: hi6220: Set module license so that it can be loaded +From: Jeremy Linton +X-Patchwork-Id: 9670985 +Message-Id: <20170408071840.29380-1-lintonrjeremy@gmail.com> +To: linux-kernel@vger.kernel.org +Cc: p.zabel@pengutronix.de, saberlily.xia@hisilicon.com, + puck.chen@hisilicon.com, xinliang.liu@linaro.org, + Jeremy Linton +Date: Sat, 8 Apr 2017 02:18:40 -0500 + +The hi6220_reset driver can be built as a standalone module +yet it cannot be loaded because it depends on GPL exported symbols. + +Lets set the module license so that the module loads, and things like +the on-board kirin drm starts working. + +Signed-off-by: Jeremy Linton +reviewed-by: Xinliang Liu +--- + drivers/reset/hisilicon/hi6220_reset.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/reset/hisilicon/hi6220_reset.c b/drivers/reset/hisilicon/hi6220_reset.c +index 35ce53e..d5e5229 100644 +--- a/drivers/reset/hisilicon/hi6220_reset.c ++++ b/drivers/reset/hisilicon/hi6220_reset.c +@@ -155,3 +155,5 @@ static int __init hi6220_reset_init(void) + } + + postcore_initcall(hi6220_reset_init); ++ ++MODULE_LICENSE("GPL v2"); +From patchwork Mon Apr 3 05:28:42 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2,1/2] regulator: hi655x: Describe consumed platform device +From: Jeremy Linton +X-Patchwork-Id: 9658793 +Message-Id: <20170403052843.12711-2-lintonrjeremy@gmail.com> +To: linux-kernel@vger.kernel.org +Cc: broonie@kernel.org, lgirdwood@gmail.com, puck.chen@hisilicon.com, + lee.jones@linaro.org, Jeremy Linton +Date: Mon, 3 Apr 2017 00:28:42 -0500 + +The hi655x-regulator driver consumes a similarly named platform device. +Adding that to the module device table, allows modprobe to locate this +driver once the device is created. + +Signed-off-by: Jeremy Linton +--- + drivers/regulator/hi655x-regulator.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/drivers/regulator/hi655x-regulator.c b/drivers/regulator/hi655x-regulator.c +index 065c100..36ae54b 100644 +--- a/drivers/regulator/hi655x-regulator.c ++++ b/drivers/regulator/hi655x-regulator.c +@@ -214,7 +214,14 @@ static int hi655x_regulator_probe(struct platform_device *pdev) + return 0; + } + ++static const struct platform_device_id hi655x_regulator_table[] = { ++ { .name = "hi655x-regulator" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(platform, hi655x_regulator_table); ++ + static struct platform_driver hi655x_regulator_driver = { ++ .id_table = hi655x_regulator_table, + .driver = { + .name = "hi655x-regulator", + }, diff --git a/arm64-pcie-acpi.patch b/arm64-pcie-acpi.patch deleted file mode 100644 index e9a359db6..000000000 --- a/arm64-pcie-acpi.patch +++ /dev/null @@ -1,1247 +0,0 @@ -From 1fc02559de87cd88339a83ad05baa9c2b5bd1ac0 Mon Sep 17 00:00:00 2001 -From: Jayachandran C -Date: Fri, 10 Jun 2016 21:55:09 +0200 -Subject: [PATCH 01/11] PCI/ECAM: Move ecam.h to linux/include/pci-ecam.h - -This header will be used from arch/arm64 for ACPI PCI implementation -so it needs to be moved out of drivers/pci. - -Update users of the header file to use the new name. No functional -changes. - -Signed-off-by: Jayachandran C -Acked-by: Lorenzo Pieralisi ---- - drivers/pci/ecam.c | 3 +- - drivers/pci/ecam.h | 67 ------------------------------------- - drivers/pci/host/pci-host-common.c | 3 +- - drivers/pci/host/pci-host-generic.c | 3 +- - drivers/pci/host/pci-thunder-ecam.c | 3 +- - drivers/pci/host/pci-thunder-pem.c | 3 +- - include/linux/pci-ecam.h | 67 +++++++++++++++++++++++++++++++++++++ - 7 files changed, 72 insertions(+), 77 deletions(-) - delete mode 100644 drivers/pci/ecam.h - create mode 100644 include/linux/pci-ecam.h - -diff --git a/drivers/pci/ecam.c b/drivers/pci/ecam.c -index f9832ad..820e26b 100644 ---- a/drivers/pci/ecam.c -+++ b/drivers/pci/ecam.c -@@ -19,10 +19,9 @@ - #include - #include - #include -+#include - #include - --#include "ecam.h" -- - /* - * On 64-bit systems, we do a single ioremap for the whole config space - * since we have enough virtual address range available. On 32-bit, we -diff --git a/drivers/pci/ecam.h b/drivers/pci/ecam.h -deleted file mode 100644 -index 9878beb..0000000 ---- a/drivers/pci/ecam.h -+++ /dev/null -@@ -1,67 +0,0 @@ --/* -- * Copyright 2016 Broadcom -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License, version 2, as -- * published by the Free Software Foundation (the "GPL"). -- * -- * This program is distributed in the hope that it will be useful, but -- * WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -- * General Public License version 2 (GPLv2) for more details. -- * -- * You should have received a copy of the GNU General Public License -- * version 2 (GPLv2) along with this source code. -- */ --#ifndef DRIVERS_PCI_ECAM_H --#define DRIVERS_PCI_ECAM_H -- --#include --#include -- --/* -- * struct to hold pci ops and bus shift of the config window -- * for a PCI controller. -- */ --struct pci_config_window; --struct pci_ecam_ops { -- unsigned int bus_shift; -- struct pci_ops pci_ops; -- int (*init)(struct device *, -- struct pci_config_window *); --}; -- --/* -- * struct to hold the mappings of a config space window. This -- * is expected to be used as sysdata for PCI controllers that -- * use ECAM. -- */ --struct pci_config_window { -- struct resource res; -- struct resource busr; -- void *priv; -- struct pci_ecam_ops *ops; -- union { -- void __iomem *win; /* 64-bit single mapping */ -- void __iomem **winp; /* 32-bit per-bus mapping */ -- }; --}; -- --/* create and free pci_config_window */ --struct pci_config_window *pci_ecam_create(struct device *dev, -- struct resource *cfgres, struct resource *busr, -- struct pci_ecam_ops *ops); --void pci_ecam_free(struct pci_config_window *cfg); -- --/* map_bus when ->sysdata is an instance of pci_config_window */ --void __iomem *pci_ecam_map_bus(struct pci_bus *bus, unsigned int devfn, -- int where); --/* default ECAM ops */ --extern struct pci_ecam_ops pci_generic_ecam_ops; -- --#ifdef CONFIG_PCI_HOST_GENERIC --/* for DT-based PCI controllers that support ECAM */ --int pci_host_common_probe(struct platform_device *pdev, -- struct pci_ecam_ops *ops); --#endif --#endif -diff --git a/drivers/pci/host/pci-host-common.c b/drivers/pci/host/pci-host-common.c -index 8cba7ab..c18b9e3 100644 ---- a/drivers/pci/host/pci-host-common.c -+++ b/drivers/pci/host/pci-host-common.c -@@ -20,10 +20,9 @@ - #include - #include - #include -+#include - #include - --#include "../ecam.h" -- - static int gen_pci_parse_request_of_pci_ranges(struct device *dev, - struct list_head *resources, struct resource **bus_range) - { -diff --git a/drivers/pci/host/pci-host-generic.c b/drivers/pci/host/pci-host-generic.c -index 6eaceab..f0ca6de 100644 ---- a/drivers/pci/host/pci-host-generic.c -+++ b/drivers/pci/host/pci-host-generic.c -@@ -23,10 +23,9 @@ - #include - #include - #include -+#include - #include - --#include "../ecam.h" -- - static struct pci_ecam_ops gen_pci_cfg_cam_bus_ops = { - .bus_shift = 16, - .pci_ops = { -diff --git a/drivers/pci/host/pci-thunder-ecam.c b/drivers/pci/host/pci-thunder-ecam.c -index 540d030..a9fc1c9 100644 ---- a/drivers/pci/host/pci-thunder-ecam.c -+++ b/drivers/pci/host/pci-thunder-ecam.c -@@ -11,10 +11,9 @@ - #include - #include - #include -+#include - #include - --#include "../ecam.h" -- - static void set_val(u32 v, int where, int size, u32 *val) - { - int shift = (where & 3) * 8; -diff --git a/drivers/pci/host/pci-thunder-pem.c b/drivers/pci/host/pci-thunder-pem.c -index 9b8ab94..5020d3d 100644 ---- a/drivers/pci/host/pci-thunder-pem.c -+++ b/drivers/pci/host/pci-thunder-pem.c -@@ -18,10 +18,9 @@ - #include - #include - #include -+#include - #include - --#include "../ecam.h" -- - #define PEM_CFG_WR 0x28 - #define PEM_CFG_RD 0x30 - -diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h -new file mode 100644 -index 0000000..9878beb ---- /dev/null -+++ b/include/linux/pci-ecam.h -@@ -0,0 +1,67 @@ -+/* -+ * Copyright 2016 Broadcom -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License, version 2, as -+ * published by the Free Software Foundation (the "GPL"). -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License version 2 (GPLv2) for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * version 2 (GPLv2) along with this source code. -+ */ -+#ifndef DRIVERS_PCI_ECAM_H -+#define DRIVERS_PCI_ECAM_H -+ -+#include -+#include -+ -+/* -+ * struct to hold pci ops and bus shift of the config window -+ * for a PCI controller. -+ */ -+struct pci_config_window; -+struct pci_ecam_ops { -+ unsigned int bus_shift; -+ struct pci_ops pci_ops; -+ int (*init)(struct device *, -+ struct pci_config_window *); -+}; -+ -+/* -+ * struct to hold the mappings of a config space window. This -+ * is expected to be used as sysdata for PCI controllers that -+ * use ECAM. -+ */ -+struct pci_config_window { -+ struct resource res; -+ struct resource busr; -+ void *priv; -+ struct pci_ecam_ops *ops; -+ union { -+ void __iomem *win; /* 64-bit single mapping */ -+ void __iomem **winp; /* 32-bit per-bus mapping */ -+ }; -+}; -+ -+/* create and free pci_config_window */ -+struct pci_config_window *pci_ecam_create(struct device *dev, -+ struct resource *cfgres, struct resource *busr, -+ struct pci_ecam_ops *ops); -+void pci_ecam_free(struct pci_config_window *cfg); -+ -+/* map_bus when ->sysdata is an instance of pci_config_window */ -+void __iomem *pci_ecam_map_bus(struct pci_bus *bus, unsigned int devfn, -+ int where); -+/* default ECAM ops */ -+extern struct pci_ecam_ops pci_generic_ecam_ops; -+ -+#ifdef CONFIG_PCI_HOST_GENERIC -+/* for DT-based PCI controllers that support ECAM */ -+int pci_host_common_probe(struct platform_device *pdev, -+ struct pci_ecam_ops *ops); -+#endif -+#endif --- -2.7.4 - -From 5eb9996fc097629854f359f9ad3d959fdacb7f8f Mon Sep 17 00:00:00 2001 -From: Jayachandran C -Date: Fri, 10 Jun 2016 21:55:10 +0200 -Subject: [PATCH 02/11] PCI/ECAM: Add parent device field to pci_config_window - -Add a parent device field to struct pci_config_window. The parent -is not saved now, but will be useful to save it in some cases. -Specifically in case of ACPI for ARM64, it can be used to setup -ACPI companion and domain. - -Since the parent dev is in struct pci_config_window now, we need -not pass it to the init function as a separate argument. - -Signed-off-by: Jayachandran C -Acked-by: Lorenzo Pieralisi ---- - drivers/pci/ecam.c | 3 ++- - drivers/pci/host/pci-thunder-pem.c | 3 ++- - include/linux/pci-ecam.h | 4 ++-- - 3 files changed, 6 insertions(+), 4 deletions(-) - -diff --git a/drivers/pci/ecam.c b/drivers/pci/ecam.c -index 820e26b..66e0d71 100644 ---- a/drivers/pci/ecam.c -+++ b/drivers/pci/ecam.c -@@ -51,6 +51,7 @@ struct pci_config_window *pci_ecam_create(struct device *dev, - if (!cfg) - return ERR_PTR(-ENOMEM); - -+ cfg->parent = dev; - cfg->ops = ops; - cfg->busr.start = busr->start; - cfg->busr.end = busr->end; -@@ -94,7 +95,7 @@ struct pci_config_window *pci_ecam_create(struct device *dev, - } - - if (ops->init) { -- err = ops->init(dev, cfg); -+ err = ops->init(cfg); - if (err) - goto err_exit; - } -diff --git a/drivers/pci/host/pci-thunder-pem.c b/drivers/pci/host/pci-thunder-pem.c -index 5020d3d..91f6fc6 100644 ---- a/drivers/pci/host/pci-thunder-pem.c -+++ b/drivers/pci/host/pci-thunder-pem.c -@@ -284,8 +284,9 @@ static int thunder_pem_config_write(struct pci_bus *bus, unsigned int devfn, - return pci_generic_config_write(bus, devfn, where, size, val); - } - --static int thunder_pem_init(struct device *dev, struct pci_config_window *cfg) -+static int thunder_pem_init(struct pci_config_window *cfg) - { -+ struct device *dev = cfg->parent; - resource_size_t bar4_start; - struct resource *res_pem; - struct thunder_pem_pci *pem_pci; -diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h -index 9878beb..7adad20 100644 ---- a/include/linux/pci-ecam.h -+++ b/include/linux/pci-ecam.h -@@ -27,8 +27,7 @@ struct pci_config_window; - struct pci_ecam_ops { - unsigned int bus_shift; - struct pci_ops pci_ops; -- int (*init)(struct device *, -- struct pci_config_window *); -+ int (*init)(struct pci_config_window *); - }; - - /* -@@ -45,6 +44,7 @@ struct pci_config_window { - void __iomem *win; /* 64-bit single mapping */ - void __iomem **winp; /* 32-bit per-bus mapping */ - }; -+ struct device *parent;/* ECAM res was from this dev */ - }; - - /* create and free pci_config_window */ --- -2.7.4 - -From 6ed6c1365df5c9201e9b275e8ed4eaa64ef2ec0d Mon Sep 17 00:00:00 2001 -From: Sinan Kaya -Date: Fri, 10 Jun 2016 21:55:11 +0200 -Subject: [PATCH 03/11] PCI: Add new function to unmap IO resources - -We need to release I/O resources so that the same I/O resources -can be allocated again in pci_remap_iospace(), like in PCI hotplug removal -scenario. Therefore implement new pci_unmap_iospace() call which -unmaps I/O space as the symmetry to pci_remap_iospace(). - -Signed-off-by: Sinan Kaya -Signed-off-by: Tomasz Nowicki -Acked-by: Lorenzo Pieralisi ---- - drivers/pci/pci.c | 18 ++++++++++++++++++ - include/linux/pci.h | 1 + - 2 files changed, 19 insertions(+) - -diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c -index c8b4dbd..eb431b5 100644 ---- a/drivers/pci/pci.c -+++ b/drivers/pci/pci.c -@@ -25,6 +25,7 @@ - #include - #include - #include -+#include - #include - #include - #include "pci.h" -@@ -3165,6 +3166,23 @@ int __weak pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr) - #endif - } - -+/** -+ * pci_unmap_iospace - Unmap the memory mapped I/O space -+ * @res: resource to be unmapped -+ * -+ * Unmap the CPU virtual address @res from virtual address space. -+ * Only architectures that have memory mapped IO functions defined -+ * (and the PCI_IOBASE value defined) should call this function. -+ */ -+void pci_unmap_iospace(struct resource *res) -+{ -+#if defined(PCI_IOBASE) && defined(CONFIG_MMU) -+ unsigned long vaddr = (unsigned long)PCI_IOBASE + res->start; -+ -+ unmap_kernel_range(vaddr, resource_size(res)); -+#endif -+} -+ - static void __pci_set_master(struct pci_dev *dev, bool enable) - { - u16 old_cmd, cmd; -diff --git a/include/linux/pci.h b/include/linux/pci.h -index b67e4df..12349de 100644 ---- a/include/linux/pci.h -+++ b/include/linux/pci.h -@@ -1167,6 +1167,7 @@ int pci_register_io_range(phys_addr_t addr, resource_size_t size); - unsigned long pci_address_to_pio(phys_addr_t addr); - phys_addr_t pci_pio_to_address(unsigned long pio); - int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr); -+void pci_unmap_iospace(struct resource *res); - - static inline pci_bus_addr_t pci_bus_address(struct pci_dev *pdev, int bar) - { --- -2.7.4 - -From 62f4d54fc2d2882b9ebaa920189574f422e12207 Mon Sep 17 00:00:00 2001 -From: Jayachandran C -Date: Fri, 10 Jun 2016 21:55:12 +0200 -Subject: [PATCH 04/11] ACPI/PCI: Support IO resources when parsing PCI host - bridge resources - -Platforms that have memory mapped IO port (such as ARM64) need special -handling for PCI I/O resources. For host bridge's resource probing case -these resources need to be fixed up with -pci_register_io_range()/pci_remap_iospace() etc. - -The same I/O resources need to be released after hotplug -removal so that it can be re-added back by the pci_remap_iospace() -function during insertion. As a consequence unmap I/O resources -with pci_unmap_iospace() when we release host bridge resources. - -Signed-off-by: Jayachandran C -Signed-off-by: Sinan Kaya -[ Tomasz: merged in Sinan's patch to unmap IO resources properly, updated changelog] -Signed-off-by: Tomasz Nowicki -Reviewed-by: Lorenzo Pieralisi ---- - drivers/acpi/pci_root.c | 39 +++++++++++++++++++++++++++++++++++++++ - 1 file changed, 39 insertions(+) - -diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c -index ae3fe4e..9a26dd1 100644 ---- a/drivers/acpi/pci_root.c -+++ b/drivers/acpi/pci_root.c -@@ -720,6 +720,40 @@ next: - } - } - -+#ifdef PCI_IOBASE -+static void acpi_pci_root_remap_iospace(struct resource_entry *entry) -+{ -+ struct resource *res = entry->res; -+ resource_size_t cpu_addr = res->start; -+ resource_size_t pci_addr = cpu_addr - entry->offset; -+ resource_size_t length = resource_size(res); -+ unsigned long port; -+ -+ if (pci_register_io_range(cpu_addr, length)) -+ goto err; -+ -+ port = pci_address_to_pio(cpu_addr); -+ if (port == (unsigned long)-1) -+ goto err; -+ -+ res->start = port; -+ res->end = port + length - 1; -+ entry->offset = port - pci_addr; -+ -+ if (pci_remap_iospace(res, cpu_addr) < 0) -+ goto err; -+ -+ pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res); -+ return; -+err: -+ res->flags |= IORESOURCE_DISABLED; -+} -+#else -+static inline void acpi_pci_root_remap_iospace(struct resource_entry *entry) -+{ -+} -+#endif -+ - int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info) - { - int ret; -@@ -740,6 +774,9 @@ int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info) - "no IO and memory resources present in _CRS\n"); - else { - resource_list_for_each_entry_safe(entry, tmp, list) { -+ if (entry->res->flags & IORESOURCE_IO) -+ acpi_pci_root_remap_iospace(entry); -+ - if (entry->res->flags & IORESOURCE_DISABLED) - resource_list_destroy_entry(entry); - else -@@ -811,6 +848,8 @@ static void acpi_pci_root_release_info(struct pci_host_bridge *bridge) - - resource_list_for_each_entry(entry, &bridge->windows) { - res = entry->res; -+ if (res->flags & IORESOURCE_IO) -+ pci_unmap_iospace(res); - if (res->parent && - (res->flags & (IORESOURCE_MEM | IORESOURCE_IO))) - release_resource(res); --- -2.7.4 - -From dd4f7822d702cca83baa1de7a5f69344ffb82af9 Mon Sep 17 00:00:00 2001 -From: Tomasz Nowicki -Date: Fri, 10 Jun 2016 21:55:13 +0200 -Subject: [PATCH 05/11] ACPI/PCI: Add generic MCFG table handling - -According to PCI firmware specifications, on systems booting with ACPI, -PCI configuration for a host bridge must be set-up through the MCFG table -regions for non-hotpluggable bridges and _CBA method for hotpluggable ones. - -Current MCFG table handling code, as implemented for x86, cannot be -easily generalized owing to x86 specific quirks handling and related -code, which makes it hard to reuse on other architectures. - -In order to implement MCFG PCI configuration handling for new platforms -booting with ACPI (eg ARM64) this patch re-implements MCFG handling from -scratch in a streamlined fashion and provides (through a generic -interface available to all arches): - -- Simplified MCFG table parsing (executed through the pci_mmcfg_late_init() - hook as in current x86) -- MCFG regions look-up interface through domain:bus_start:bus_end tuple - -The new MCFG regions handling interface is added to generic ACPI code -so that existing architectures (eg x86) can be moved over to it and -architectures relying on MCFG for ACPI PCI config space can rely on it -without having to resort to arch specific implementations. - -Signed-off-by: Tomasz Nowicki -Signed-off-by: Jayachandran C -Reviewed-by: Lorenzo Pieralisi ---- - drivers/acpi/Kconfig | 3 ++ - drivers/acpi/Makefile | 1 + - drivers/acpi/pci_mcfg.c | 92 ++++++++++++++++++++++++++++++++++++++++++++++++ - include/linux/pci-acpi.h | 2 ++ - include/linux/pci.h | 2 +- - 5 files changed, 99 insertions(+), 1 deletion(-) - create mode 100644 drivers/acpi/pci_mcfg.c - -diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig -index b7e2e77..f98c328 100644 ---- a/drivers/acpi/Kconfig -+++ b/drivers/acpi/Kconfig -@@ -217,6 +217,9 @@ config ACPI_PROCESSOR_IDLE - bool - select CPU_IDLE - -+config ACPI_MCFG -+ bool -+ - config ACPI_CPPC_LIB - bool - depends on ACPI_PROCESSOR -diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile -index 251ce85..632e81f 100644 ---- a/drivers/acpi/Makefile -+++ b/drivers/acpi/Makefile -@@ -40,6 +40,7 @@ acpi-$(CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC) += processor_pdc.o - acpi-y += ec.o - acpi-$(CONFIG_ACPI_DOCK) += dock.o - acpi-y += pci_root.o pci_link.o pci_irq.o -+obj-$(CONFIG_ACPI_MCFG) += pci_mcfg.o - acpi-y += acpi_lpss.o acpi_apd.o - acpi-y += acpi_platform.o - acpi-y += acpi_pnp.o -diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c -new file mode 100644 -index 0000000..d3c3e85 ---- /dev/null -+++ b/drivers/acpi/pci_mcfg.c -@@ -0,0 +1,92 @@ -+/* -+ * Copyright (C) 2016 Broadcom -+ * Author: Jayachandran C -+ * Copyright (C) 2016 Semihalf -+ * Author: Tomasz Nowicki -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License, version 2, as -+ * published by the Free Software Foundation (the "GPL"). -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License version 2 (GPLv2) for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * version 2 (GPLv2) along with this source code. -+ */ -+ -+#define pr_fmt(fmt) "ACPI: " fmt -+ -+#include -+#include -+#include -+ -+/* Structure to hold entries from the MCFG table */ -+struct mcfg_entry { -+ struct list_head list; -+ phys_addr_t addr; -+ u16 segment; -+ u8 bus_start; -+ u8 bus_end; -+}; -+ -+/* List to save mcfg entries */ -+static LIST_HEAD(pci_mcfg_list); -+ -+phys_addr_t pci_mcfg_lookup(u16 seg, struct resource *bus_res) -+{ -+ struct mcfg_entry *e; -+ -+ /* -+ * We expect exact match, unless MCFG entry end bus covers more than -+ * specified by caller. -+ */ -+ list_for_each_entry(e, &pci_mcfg_list, list) { -+ if (e->segment == seg && e->bus_start == bus_res->start && -+ e->bus_end >= bus_res->end) -+ return e->addr; -+ } -+ -+ return 0; -+} -+ -+static __init int pci_mcfg_parse(struct acpi_table_header *header) -+{ -+ struct acpi_table_mcfg *mcfg; -+ struct acpi_mcfg_allocation *mptr; -+ struct mcfg_entry *e, *arr; -+ int i, n; -+ -+ if (header->length < sizeof(struct acpi_table_mcfg)) -+ return -EINVAL; -+ -+ n = (header->length - sizeof(struct acpi_table_mcfg)) / -+ sizeof(struct acpi_mcfg_allocation); -+ mcfg = (struct acpi_table_mcfg *)header; -+ mptr = (struct acpi_mcfg_allocation *) &mcfg[1]; -+ -+ arr = kcalloc(n, sizeof(*arr), GFP_KERNEL); -+ if (!arr) -+ return -ENOMEM; -+ -+ for (i = 0, e = arr; i < n; i++, mptr++, e++) { -+ e->segment = mptr->pci_segment; -+ e->addr = mptr->address; -+ e->bus_start = mptr->start_bus_number; -+ e->bus_end = mptr->end_bus_number; -+ list_add(&e->list, &pci_mcfg_list); -+ } -+ -+ pr_info("MCFG table detected, %d entries\n", n); -+ return 0; -+} -+ -+/* Interface called by ACPI - parse and save MCFG table */ -+void __init pci_mmcfg_late_init(void) -+{ -+ int err = acpi_table_parse(ACPI_SIG_MCFG, pci_mcfg_parse); -+ if (err) -+ pr_err("Failed to parse MCFG (%d)\n", err); -+} -diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h -index 89ab057..7d63a66 100644 ---- a/include/linux/pci-acpi.h -+++ b/include/linux/pci-acpi.h -@@ -24,6 +24,8 @@ static inline acpi_status pci_acpi_remove_pm_notifier(struct acpi_device *dev) - } - extern phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle); - -+extern phys_addr_t pci_mcfg_lookup(u16 domain, struct resource *bus_res); -+ - static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev) - { - struct pci_bus *pbus = pdev->bus; -diff --git a/include/linux/pci.h b/include/linux/pci.h -index 12349de..ce03d65 100644 ---- a/include/linux/pci.h -+++ b/include/linux/pci.h -@@ -1723,7 +1723,7 @@ void pcibios_free_irq(struct pci_dev *dev); - extern struct dev_pm_ops pcibios_pm_ops; - #endif - --#ifdef CONFIG_PCI_MMCONFIG -+#if defined(CONFIG_PCI_MMCONFIG) || defined(CONFIG_ACPI_MCFG) - void __init pci_mmcfg_early_init(void); - void __init pci_mmcfg_late_init(void); - #else --- -2.7.4 - -From fc1907f9c79f9a0a0c2f4d579896e678915fec48 Mon Sep 17 00:00:00 2001 -From: Tomasz Nowicki -Date: Fri, 10 Jun 2016 21:55:14 +0200 -Subject: [PATCH 06/11] PCI: Refactor generic bus domain assignment - -Change the way PCI bus domain number is assigned and improve function -name to reflect what function does. No functional changes. - -Instead of assigning bus domain number inside of pci_bus_assign_domain_nr() -simply return domain number and let pci_create_root_bus() do assignment. -This way pci_create_root_bus() setups bus structure data in the consistent -way. Since pci_bus_assign_domain_nr() now does not assign but retrieves -domain number instead, rename it to pci_bus_find_domain_nr(). - -Signed-off-by: Tomasz Nowicki -Reviewed-by: Lorenzo Pieralisi ---- - drivers/pci/pci.c | 4 ++-- - drivers/pci/probe.c | 4 +++- - include/linux/pci.h | 7 +------ - 3 files changed, 6 insertions(+), 9 deletions(-) - -diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c -index eb431b5..b9a7833 100644 ---- a/drivers/pci/pci.c -+++ b/drivers/pci/pci.c -@@ -4941,7 +4941,7 @@ int pci_get_new_domain_nr(void) - } - - #ifdef CONFIG_PCI_DOMAINS_GENERIC --void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent) -+int pci_bus_find_domain_nr(struct pci_bus *bus, struct device *parent) - { - static int use_dt_domains = -1; - int domain = -1; -@@ -4985,7 +4985,7 @@ void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent) - domain = -1; - } - -- bus->domain_nr = domain; -+ return domain; - } - #endif - #endif -diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c -index 8e3ef72..380d46d 100644 ---- a/drivers/pci/probe.c -+++ b/drivers/pci/probe.c -@@ -2127,7 +2127,9 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus, - b->sysdata = sysdata; - b->ops = ops; - b->number = b->busn_res.start = bus; -- pci_bus_assign_domain_nr(b, parent); -+#ifdef CONFIG_PCI_DOMAINS_GENERIC -+ b->domain_nr = pci_bus_find_domain_nr(b, parent); -+#endif - b2 = pci_find_bus(pci_domain_nr(b), bus); - if (b2) { - /* If we already got to this bus through a different bridge, ignore it */ -diff --git a/include/linux/pci.h b/include/linux/pci.h -index ce03d65..48839e8 100644 ---- a/include/linux/pci.h -+++ b/include/linux/pci.h -@@ -1390,12 +1390,7 @@ static inline int pci_domain_nr(struct pci_bus *bus) - { - return bus->domain_nr; - } --void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent); --#else --static inline void pci_bus_assign_domain_nr(struct pci_bus *bus, -- struct device *parent) --{ --} -+int pci_bus_find_domain_nr(struct pci_bus *bus, struct device *parent); - #endif - - /* some architectures require additional setup to direct VGA traffic */ --- -2.7.4 - -From d6d45ae1d58658111d5e838c41b9ed4729bbb81e Mon Sep 17 00:00:00 2001 -From: Tomasz Nowicki -Date: Fri, 10 Jun 2016 21:55:15 +0200 -Subject: [PATCH 07/11] PCI: Factor DT specific pci_bus_find_domain_nr() code - out - -pci_bus_find_domain_nr() retrieves the host bridge domain number in a DT -specific way. Factor our pci_bus_find_domain_nr() in a separate DT -function (ie of_pci_bus_find_domain_nr()) so that DT code is self -contained, paving the way for retrieving domain number in -pci_bus_find_domain_nr() with additional firmware methods (ie ACPI). - -Signed-off-by: Tomasz Nowicki -Reviewed-by: Lorenzo Pieralisi ---- - drivers/pci/pci.c | 7 ++++++- - 1 file changed, 6 insertions(+), 1 deletion(-) - -diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c -index b9a7833..97f7cd4 100644 ---- a/drivers/pci/pci.c -+++ b/drivers/pci/pci.c -@@ -4941,7 +4941,7 @@ int pci_get_new_domain_nr(void) - } - - #ifdef CONFIG_PCI_DOMAINS_GENERIC --int pci_bus_find_domain_nr(struct pci_bus *bus, struct device *parent) -+static int of_pci_bus_find_domain_nr(struct device *parent) - { - static int use_dt_domains = -1; - int domain = -1; -@@ -4987,6 +4987,11 @@ int pci_bus_find_domain_nr(struct pci_bus *bus, struct device *parent) - - return domain; - } -+ -+int pci_bus_find_domain_nr(struct pci_bus *bus, struct device *parent) -+{ -+ return of_pci_bus_find_domain_nr(parent); -+} - #endif - #endif - --- -2.7.4 - -From 92d59511fd365d3c0c31d074b5e96cf48c58f68b Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 30 Jun 2016 16:56:24 +0100 -Subject: [PATCH 08/11] ARM64/PCI: Add ACPI hook to assign domain number - -PCI core code provides a config option (CONFIG_PCI_DOMAINS_GENERIC) -that allows assigning the PCI bus domain number generically by -relying on device tree bindings, and falling back to a simple counter -when the respective DT properties (ie "linux,pci-domain") are not -specified in the host bridge device tree node. - -In a similar way, when a system is booted through ACPI, architectures -that are selecting CONFIG_PCI_DOMAINS_GENERIC (ie ARM64) require kernel -hooks to retrieve the domain number so that the PCI bus domain number -set-up can be handled seamlessly with DT and ACPI in generic core code -when CONFIG_PCI_DOMAINS_GENERIC is selected. - -Since currently it is not possible to retrieve a pointer to the PCI -host bridge ACPI device backing the host bridge from core PCI code -(which would allow retrieving the domain number in an arch agnostic -way through the ACPI _SEG method), an arch specific ACPI hook has to -be declared and implemented by all arches that rely on -CONFIG_PCI_DOMAINS_GENERIC to retrieve the domain number and set it -up in core PCI code. - -For the aforementioned reasons, introduce acpi_pci_bus_find_domain_nr() -hook to retrieve the domain number on a per-arch basis when the system -boots through ACPI. ARM64 dummy implementation of the same is provided -in first place in preparation for ARM64 ACPI based PCI host controller -driver. - -acpi_pci_bus_find_domain_nr() is called from generic -pci_bus_find_domain_nr() as an ACPI option to DT domain assignment. - -Signed-off-by: Tomasz Nowicki -Signed-off-by: Lorenzo Pieralisi ---- - arch/arm64/kernel/pci.c | 7 +++++++ - drivers/pci/pci.c | 4 +++- - include/linux/pci.h | 7 +++++++ - 3 files changed, 17 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c -index 3c4e308..d5d3d26 100644 ---- a/arch/arm64/kernel/pci.c -+++ b/arch/arm64/kernel/pci.c -@@ -17,6 +17,7 @@ - #include - #include - #include -+#include - #include - - /* -@@ -85,6 +86,12 @@ EXPORT_SYMBOL(pcibus_to_node); - #endif - - #ifdef CONFIG_ACPI -+ -+int acpi_pci_bus_find_domain_nr(struct pci_bus *bus) -+{ -+ return 0; -+} -+ - /* Root bridge scanning */ - struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) - { -diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c -index 97f7cd4..4834cee 100644 ---- a/drivers/pci/pci.c -+++ b/drivers/pci/pci.c -@@ -7,6 +7,7 @@ - * Copyright 1997 -- 2000 Martin Mares - */ - -+#include - #include - #include - #include -@@ -4990,7 +4991,8 @@ static int of_pci_bus_find_domain_nr(struct device *parent) - - int pci_bus_find_domain_nr(struct pci_bus *bus, struct device *parent) - { -- return of_pci_bus_find_domain_nr(parent); -+ return acpi_disabled ? of_pci_bus_find_domain_nr(parent) : -+ acpi_pci_bus_find_domain_nr(bus); - } - #endif - #endif -diff --git a/include/linux/pci.h b/include/linux/pci.h -index 48839e8..49ba8af 100644 ---- a/include/linux/pci.h -+++ b/include/linux/pci.h -@@ -1390,6 +1390,13 @@ static inline int pci_domain_nr(struct pci_bus *bus) - { - return bus->domain_nr; - } -+/* Arch specific ACPI hook to set-up domain number */ -+#ifdef CONFIG_ACPI -+int acpi_pci_bus_find_domain_nr(struct pci_bus *bus); -+#else -+static inline int acpi_pci_bus_find_domain_nr(struct pci_bus *bus) -+{ return 0; } -+#endif - int pci_bus_find_domain_nr(struct pci_bus *bus, struct device *parent); - #endif - --- -2.7.4 - -From bb06753d2e163d8100a017f06a6d9dd195d68a76 Mon Sep 17 00:00:00 2001 -From: Tomasz Nowicki -Date: Fri, 10 Jun 2016 21:55:17 +0200 -Subject: [PATCH 09/11] ARM64/PCI: ACPI support for legacy IRQs parsing and - consolidation with DT code - -To enable PCI legacy IRQs on platforms booting with ACPI, arch code -should include ACPI specific callbacks that parse and set-up the -device IRQ number, equivalent to the DT boot path. Owing to the current -ACPI core scan handlers implementation, ACPI PCI legacy IRQs bindings -cannot be parsed at device add time, since that would trigger ACPI scan -handlers ordering issues depending on how the ACPI tables are defined. - -To solve this problem and consolidate FW PCI legacy IRQs parsing in -one single pcibios callback (pending final removal), this patch moves -DT PCI IRQ parsing to the pcibios_alloc_irq() callback (called by -PCI core code at device probe time) and adds ACPI PCI legacy IRQs -parsing to the same callback too, so that FW PCI legacy IRQs parsing -is confined in one single arch callback that can be easily removed -when code parsing PCI legacy IRQs is consolidated and moved to core -PCI code. - -Signed-off-by: Tomasz Nowicki -Suggested-by: Lorenzo Pieralisi ---- - arch/arm64/kernel/pci.c | 11 ++++++++--- - 1 file changed, 8 insertions(+), 3 deletions(-) - -diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c -index d5d3d26..b3b8a2c 100644 ---- a/arch/arm64/kernel/pci.c -+++ b/arch/arm64/kernel/pci.c -@@ -51,11 +51,16 @@ int pcibios_enable_device(struct pci_dev *dev, int mask) - } - - /* -- * Try to assign the IRQ number from DT when adding a new device -+ * Try to assign the IRQ number when probing a new device - */ --int pcibios_add_device(struct pci_dev *dev) -+int pcibios_alloc_irq(struct pci_dev *dev) - { -- dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); -+ if (acpi_disabled) -+ dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); -+#ifdef CONFIG_ACPI -+ else -+ return acpi_pci_irq_enable(dev); -+#endif - - return 0; - } --- -2.7.4 - -From b6e298840f532192a589f8ade128dec3fef3a4c6 Mon Sep 17 00:00:00 2001 -From: Tomasz Nowicki -Date: Fri, 10 Jun 2016 21:55:18 +0200 -Subject: [PATCH 10/11] ARM64/PCI: Implement ACPI low-level calls to access - PCI_Config region from AML - -ACPI spec6.1 - chapter: 5.5.2.4 defines OperationRegion (Declare Operation -Region). Following the spec: " [...] An Operation Region is a specific -region of operation within an address space that is declared as a subset -of the entire address space using a starting address (offset) and a length. -Control methods must have exclusive access to any address accessed via -fields declared in Operation Regions. [...]". - -OperationRegion allows to declare various of operation region address space -identifiers including PCI_Config. PCI_Config is meant to access PCI -configuration space from the ASL. So every time ASL opcode operates -on PCI_Config space region, ASL interpreter dispatches accesses to OS -low-level calls - raw_pci_write() and raw_pci_read() for Linux - so-called -ACPI RAW accessors. - -In order to support PCI_Config operation region, implement mentioned -raw_pci_write() and raw_pci_read() calls so they find associated bus -and call read/write ops. - -Waiting for clarification in the ACPI specifications in relation -to PCI_Config space handling before PCI bus enumeration is completed, -current code does not support PCI_Config region accesses before PCI bus -enumeration whilst providing full AML PCI_Config access availability -when the PCI bus enumeration is completed by the kernel so that -RAW accessors can look-up PCI operations through the struct pci_bus -associated with a PCI bus. - -Signed-off-by: Tomasz Nowicki -Signed-off-by: Jayachandran C -Reviewed-by: Lorenzo Pieralisi ---- - arch/arm64/kernel/pci.c | 12 ++++++++++-- - 1 file changed, 10 insertions(+), 2 deletions(-) - -diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c -index b3b8a2c..328f857 100644 ---- a/arch/arm64/kernel/pci.c -+++ b/arch/arm64/kernel/pci.c -@@ -71,13 +71,21 @@ int pcibios_alloc_irq(struct pci_dev *dev) - int raw_pci_read(unsigned int domain, unsigned int bus, - unsigned int devfn, int reg, int len, u32 *val) - { -- return -ENXIO; -+ struct pci_bus *b = pci_find_bus(domain, bus); -+ -+ if (!b) -+ return PCIBIOS_DEVICE_NOT_FOUND; -+ return b->ops->read(b, devfn, reg, len, val); - } - - int raw_pci_write(unsigned int domain, unsigned int bus, - unsigned int devfn, int reg, int len, u32 val) - { -- return -ENXIO; -+ struct pci_bus *b = pci_find_bus(domain, bus); -+ -+ if (!b) -+ return PCIBIOS_DEVICE_NOT_FOUND; -+ return b->ops->write(b, devfn, reg, len, val); - } - - #ifdef CONFIG_NUMA --- -2.7.4 - -From 3b8cff3fa89ba3ef6f1cf09a0667aa470b7fad0b Mon Sep 17 00:00:00 2001 -From: Tomasz Nowicki -Date: Fri, 10 Jun 2016 21:55:19 +0200 -Subject: [PATCH 11/11] ARM64/PCI: Support for ACPI based PCI host controller - -Implement pci_acpi_scan_root and other arch-specific call so that ARM64 -can start using ACPI to setup and enumerate PCI buses. - -Prior to buses enumeration the pci_acpi_scan_root() implementation looks -for configuration space start address (obtained through ACPI _CBA method or -MCFG interface). If succeed, it uses ECAM library to create new mapping. -Then it attaches generic ECAM ops (pci_generic_ecam_ops) which are used -for accessing configuration space later on. - -On ARM64, we need to use generic domains (CONFIG_PCI_DOMAINS_GENERIC). -In order to achieve that for ACPI case implement -acpi_pci_bus_find_domain_nr() body so that it retrieves pci_config_window -structure from bus sysdata and eventually gets domain number from -acpi_pci_root structure. - -ACPI requires to run acpi_pci_{add|remove}_bus while new PCI bus is created. -This allows to do some ACPI-specific additional configuration, like -PCI hotplug slot enumeration. In order to fulfill these requirements, -we implement arch-specific pcibios_{add|remove}_bus calls -and call acpi_pci_{add|remove}_bus from there. - -Signed-off-by: Tomasz Nowicki -Signed-off-by: Jayachandran C -Reviewed-by: Lorenzo Pieralisi ---- - arch/arm64/Kconfig | 2 + - arch/arm64/kernel/pci.c | 116 ++++++++++++++++++++++++++++++++++++++++++++++-- - 2 files changed, 115 insertions(+), 3 deletions(-) - -diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig -index 5a0a691..4806cde 100644 ---- a/arch/arm64/Kconfig -+++ b/arch/arm64/Kconfig -@@ -3,6 +3,7 @@ config ARM64 - select ACPI_CCA_REQUIRED if ACPI - select ACPI_GENERIC_GSI if ACPI - select ACPI_REDUCED_HARDWARE_ONLY if ACPI -+ select ACPI_MCFG if ACPI - select ARCH_HAS_DEVMEM_IS_ALLOWED - select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE - select ARCH_HAS_ELF_RANDOMIZE -@@ -96,6 +97,7 @@ config ARM64 - select OF_EARLY_FLATTREE - select OF_NUMA if NUMA && OF - select OF_RESERVED_MEM -+ select PCI_ECAM if ACPI - select PERF_USE_VMALLOC - select POWER_RESET - select POWER_SUPPLY -diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c -index 328f857..94cd43c 100644 ---- a/arch/arm64/kernel/pci.c -+++ b/arch/arm64/kernel/pci.c -@@ -18,6 +18,8 @@ - #include - #include - #include -+#include -+#include - #include - - /* -@@ -100,15 +102,123 @@ EXPORT_SYMBOL(pcibus_to_node); - - #ifdef CONFIG_ACPI - -+struct acpi_pci_generic_root_info { -+ struct acpi_pci_root_info common; -+ struct pci_config_window *cfg; /* config space mapping */ -+}; -+ - int acpi_pci_bus_find_domain_nr(struct pci_bus *bus) - { -+ struct pci_config_window *cfg = bus->sysdata; -+ struct acpi_device *adev = to_acpi_device(cfg->parent); -+ struct acpi_pci_root *root = acpi_driver_data(adev); -+ -+ return root->segment; -+} -+ -+int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) -+{ -+ if (!acpi_disabled) { -+ struct pci_config_window *cfg = bridge->bus->sysdata; -+ struct acpi_device *adev = to_acpi_device(cfg->parent); -+ ACPI_COMPANION_SET(&bridge->dev, adev); -+ } -+ - return 0; - } - --/* Root bridge scanning */ -+/* -+ * Lookup the bus range for the domain in MCFG, and set up config space -+ * mapping. -+ */ -+static struct pci_config_window * -+pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root) -+{ -+ struct resource *bus_res = &root->secondary; -+ u16 seg = root->segment; -+ struct pci_config_window *cfg; -+ struct resource cfgres; -+ unsigned int bsz; -+ -+ /* Use address from _CBA if present, otherwise lookup MCFG */ -+ if (!root->mcfg_addr) -+ root->mcfg_addr = pci_mcfg_lookup(seg, bus_res); -+ -+ if (!root->mcfg_addr) { -+ dev_err(&root->device->dev, "%04x:%pR ECAM region not found\n", -+ seg, bus_res); -+ return NULL; -+ } -+ -+ bsz = 1 << pci_generic_ecam_ops.bus_shift; -+ cfgres.start = root->mcfg_addr + bus_res->start * bsz; -+ cfgres.end = cfgres.start + resource_size(bus_res) * bsz - 1; -+ cfgres.flags = IORESOURCE_MEM; -+ cfg = pci_ecam_create(&root->device->dev, &cfgres, bus_res, -+ &pci_generic_ecam_ops); -+ if (IS_ERR(cfg)) { -+ dev_err(&root->device->dev, "%04x:%pR error %ld mapping ECAM\n", -+ seg, bus_res, PTR_ERR(cfg)); -+ return NULL; -+ } -+ -+ return cfg; -+} -+ -+/* release_info: free resources allocated by init_info */ -+static void pci_acpi_generic_release_info(struct acpi_pci_root_info *ci) -+{ -+ struct acpi_pci_generic_root_info *ri; -+ -+ ri = container_of(ci, struct acpi_pci_generic_root_info, common); -+ pci_ecam_free(ri->cfg); -+ kfree(ri); -+} -+ -+static struct acpi_pci_root_ops acpi_pci_root_ops = { -+ .release_info = pci_acpi_generic_release_info, -+}; -+ -+/* Interface called from ACPI code to setup PCI host controller */ - struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) - { -- /* TODO: Should be revisited when implementing PCI on ACPI */ -- return NULL; -+ int node = acpi_get_node(root->device->handle); -+ struct acpi_pci_generic_root_info *ri; -+ struct pci_bus *bus, *child; -+ -+ ri = kzalloc_node(sizeof(*ri), GFP_KERNEL, node); -+ if (!ri) -+ return NULL; -+ -+ ri->cfg = pci_acpi_setup_ecam_mapping(root); -+ if (!ri->cfg) { -+ kfree(ri); -+ return NULL; -+ } -+ -+ acpi_pci_root_ops.pci_ops = &ri->cfg->ops->pci_ops; -+ bus = acpi_pci_root_create(root, &acpi_pci_root_ops, &ri->common, -+ ri->cfg); -+ if (!bus) -+ return NULL; -+ -+ pci_bus_size_bridges(bus); -+ pci_bus_assign_resources(bus); -+ -+ list_for_each_entry(child, &bus->children, node) -+ pcie_bus_configure_settings(child); -+ -+ return bus; -+} -+ -+void pcibios_add_bus(struct pci_bus *bus) -+{ -+ acpi_pci_add_bus(bus); - } -+ -+void pcibios_remove_bus(struct pci_bus *bus) -+{ -+ acpi_pci_remove_bus(bus); -+} -+ - #endif --- -2.7.4 - diff --git a/arm64-pcie-quirks-xgene.patch b/arm64-pcie-quirks-xgene.patch deleted file mode 100644 index 8e6805df6..000000000 --- a/arm64-pcie-quirks-xgene.patch +++ /dev/null @@ -1,508 +0,0 @@ -From 767b70aa55d013f0c7589955f410d488fed5776a Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 5 Jul 2016 23:49:39 +0100 -Subject: [PATCH 1/4] Some platforms may not be fully compliant with generic - set of PCI config accessors. For these cases we implement the way to - overwrite accessors set. Algorithm traverses available quirk list, matches - against tuple and returns - corresponding PCI config ops. oem_id and oem_table_id come from MCFG table - standard header. All quirks can be defined using DECLARE_ACPI_MCFG_FIXUP() - macro and kept self contained. Example: - -/* Custom PCI config ops */ -static struct pci_generic_ecam_ops foo_pci_ops = { - .bus_shift = 24, - .pci_ops = { - .map_bus = pci_ecam_map_bus, - .read = foo_ecam_config_read, - .write = foo_ecam_config_write, - } -}; - -DECLARE_ACPI_MCFG_FIXUP(&foo_pci_ops, , , , ); - -Signed-off-by: Tomasz Nowicki -Signed-off-by: Dongdong Liu ---- - drivers/acpi/pci_mcfg.c | 41 ++++++++++++++++++++++++++++++++++++--- - include/asm-generic/vmlinux.lds.h | 7 +++++++ - include/linux/pci-acpi.h | 20 +++++++++++++++++++ - 3 files changed, 65 insertions(+), 3 deletions(-) - -diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c -index d3c3e85..deb0077 100644 ---- a/drivers/acpi/pci_mcfg.c -+++ b/drivers/acpi/pci_mcfg.c -@@ -22,6 +22,10 @@ - #include - #include - #include -+#include -+ -+/* Root pointer to the mapped MCFG table */ -+static struct acpi_table_mcfg *mcfg_table; - - /* Structure to hold entries from the MCFG table */ - struct mcfg_entry { -@@ -35,6 +39,38 @@ struct mcfg_entry { - /* List to save mcfg entries */ - static LIST_HEAD(pci_mcfg_list); - -+extern struct pci_cfg_fixup __start_acpi_mcfg_fixups[]; -+extern struct pci_cfg_fixup __end_acpi_mcfg_fixups[]; -+ -+struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root) -+{ -+ int bus_num = root->secondary.start; -+ int domain = root->segment; -+ struct pci_cfg_fixup *f; -+ -+ if (!mcfg_table) -+ return &pci_generic_ecam_ops; -+ -+ /* -+ * Match against platform specific quirks and return corresponding -+ * CAM ops. -+ * -+ * First match against PCI topology then use OEM ID and -+ * OEM revision from MCFG table standard header. -+ */ -+ for (f = __start_acpi_mcfg_fixups; f < __end_acpi_mcfg_fixups; f++) { -+ if ((f->domain == domain || f->domain == PCI_MCFG_DOMAIN_ANY) && -+ (f->bus_num == bus_num || f->bus_num == PCI_MCFG_BUS_ANY) && -+ (!strncmp(f->oem_id, mcfg_table->header.oem_id, -+ ACPI_OEM_ID_SIZE)) && -+ (!strncmp(f->oem_table_id, mcfg_table->header.oem_table_id, -+ ACPI_OEM_TABLE_ID_SIZE))) -+ return f->ops; -+ } -+ /* No quirks, use ECAM */ -+ return &pci_generic_ecam_ops; -+} -+ - phys_addr_t pci_mcfg_lookup(u16 seg, struct resource *bus_res) - { - struct mcfg_entry *e; -@@ -54,7 +90,6 @@ phys_addr_t pci_mcfg_lookup(u16 seg, struct resource *bus_res) - - static __init int pci_mcfg_parse(struct acpi_table_header *header) - { -- struct acpi_table_mcfg *mcfg; - struct acpi_mcfg_allocation *mptr; - struct mcfg_entry *e, *arr; - int i, n; -@@ -64,8 +99,8 @@ static __init int pci_mcfg_parse(struct acpi_table_header *header) - - n = (header->length - sizeof(struct acpi_table_mcfg)) / - sizeof(struct acpi_mcfg_allocation); -- mcfg = (struct acpi_table_mcfg *)header; -- mptr = (struct acpi_mcfg_allocation *) &mcfg[1]; -+ mcfg_table = (struct acpi_table_mcfg *)header; -+ mptr = (struct acpi_mcfg_allocation *) &mcfg_table[1]; - - arr = kcalloc(n, sizeof(*arr), GFP_KERNEL); - if (!arr) -diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h -index 6a67ab9..43604fc 100644 ---- a/include/asm-generic/vmlinux.lds.h -+++ b/include/asm-generic/vmlinux.lds.h -@@ -300,6 +300,13 @@ - VMLINUX_SYMBOL(__end_pci_fixups_suspend_late) = .; \ - } \ - \ -+ /* ACPI MCFG quirks */ \ -+ .acpi_fixup : AT(ADDR(.acpi_fixup) - LOAD_OFFSET) { \ -+ VMLINUX_SYMBOL(__start_acpi_mcfg_fixups) = .; \ -+ *(.acpi_fixup_mcfg) \ -+ VMLINUX_SYMBOL(__end_acpi_mcfg_fixups) = .; \ -+ } \ -+ \ - /* Built-in firmware blobs */ \ - .builtin_fw : AT(ADDR(.builtin_fw) - LOAD_OFFSET) { \ - VMLINUX_SYMBOL(__start_builtin_fw) = .; \ -diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h -index 7d63a66..c8a6559 100644 ---- a/include/linux/pci-acpi.h -+++ b/include/linux/pci-acpi.h -@@ -25,6 +25,7 @@ static inline acpi_status pci_acpi_remove_pm_notifier(struct acpi_device *dev) - extern phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle); - - extern phys_addr_t pci_mcfg_lookup(u16 domain, struct resource *bus_res); -+extern struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root); - - static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev) - { -@@ -72,6 +73,25 @@ struct acpi_pci_root_ops { - int (*prepare_resources)(struct acpi_pci_root_info *info); - }; - -+struct pci_cfg_fixup { -+ struct pci_ecam_ops *ops; -+ char *oem_id; -+ char *oem_table_id; -+ int domain; -+ int bus_num; -+}; -+ -+#define PCI_MCFG_DOMAIN_ANY -1 -+#define PCI_MCFG_BUS_ANY -1 -+ -+/* Designate a routine to fix up buggy MCFG */ -+#define DECLARE_ACPI_MCFG_FIXUP(ops, oem_id, oem_table_id, dom, bus) \ -+ static const struct pci_cfg_fixup \ -+ __mcfg_fixup_##oem_id##oem_table_id##dom##bus \ -+ __used __attribute__((__section__(".acpi_fixup_mcfg"), \ -+ aligned((sizeof(void *))))) = \ -+ { ops, oem_id, oem_table_id, dom, bus }; -+ - extern int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info); - extern struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, - struct acpi_pci_root_ops *ops, --- -2.7.4 - -From 4f86a9b006b25dd7336043dab26058ed6fb2802d Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 5 Jul 2016 23:52:46 +0100 -Subject: [PATCH 2/4] pci_generic_ecam_ops is used by default. Since there are - platforms which have non-compliant ECAM space we need to overwrite these - accessors prior to PCI buses enumeration. In order to do that we call - pci_mcfg_get_ops to retrieve pci_ecam_ops structure so that we can use proper - PCI config space accessors and bus_shift. - -pci_generic_ecam_ops is still used for platforms free from quirks. - -Signed-off-by: Tomasz Nowicki ---- - arch/arm64/kernel/pci.c | 7 ++++--- - 1 file changed, 4 insertions(+), 3 deletions(-) - -diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c -index 94cd43c..a891bda 100644 ---- a/arch/arm64/kernel/pci.c -+++ b/arch/arm64/kernel/pci.c -@@ -139,6 +139,7 @@ pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root) - struct pci_config_window *cfg; - struct resource cfgres; - unsigned int bsz; -+ struct pci_ecam_ops *ops; - - /* Use address from _CBA if present, otherwise lookup MCFG */ - if (!root->mcfg_addr) -@@ -150,12 +151,12 @@ pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root) - return NULL; - } - -- bsz = 1 << pci_generic_ecam_ops.bus_shift; -+ ops = pci_mcfg_get_ops(root); -+ bsz = 1 << ops->bus_shift; - cfgres.start = root->mcfg_addr + bus_res->start * bsz; - cfgres.end = cfgres.start + resource_size(bus_res) * bsz - 1; - cfgres.flags = IORESOURCE_MEM; -- cfg = pci_ecam_create(&root->device->dev, &cfgres, bus_res, -- &pci_generic_ecam_ops); -+ cfg = pci_ecam_create(&root->device->dev, &cfgres, bus_res, ops); - if (IS_ERR(cfg)) { - dev_err(&root->device->dev, "%04x:%pR error %ld mapping ECAM\n", - seg, bus_res, PTR_ERR(cfg)); --- -2.7.4 - -From cbdbd697bd6d716eb9d1705ee55445432e73eabb Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 5 Jul 2016 23:53:59 +0100 -Subject: [PATCH 3/4] The ECAM quirk matching criteria per the discussion on - https://lkml.org/lkml/2016/6/13/944 includes: OEM ID, OEM Table ID and OEM - Revision. So this patch adds OEM Table ID into the check to match platform - specific ECAM quirks as well. - -This patch also improve strncmp check using strlen and -min_t to ignore the padding spaces in OEM ID and OEM -Table ID. - -Signed-off-by: Duc Dang ---- - drivers/acpi/pci_mcfg.c | 7 +++++-- - include/linux/pci-acpi.h | 7 ++++--- - 2 files changed, 9 insertions(+), 5 deletions(-) - -diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c -index deb0077..307ca9a 100644 ---- a/drivers/acpi/pci_mcfg.c -+++ b/drivers/acpi/pci_mcfg.c -@@ -62,9 +62,12 @@ struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root) - if ((f->domain == domain || f->domain == PCI_MCFG_DOMAIN_ANY) && - (f->bus_num == bus_num || f->bus_num == PCI_MCFG_BUS_ANY) && - (!strncmp(f->oem_id, mcfg_table->header.oem_id, -- ACPI_OEM_ID_SIZE)) && -+ min_t(size_t, strlen(f->oem_id), -+ ACPI_OEM_ID_SIZE))) && - (!strncmp(f->oem_table_id, mcfg_table->header.oem_table_id, -- ACPI_OEM_TABLE_ID_SIZE))) -+ min_t(size_t, strlen(f->oem_table_id), -+ ACPI_OEM_TABLE_ID_SIZE))) && -+ (f->oem_revision == mcfg_table->header.oem_revision)) - return f->ops; - } - /* No quirks, use ECAM */ -diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h -index c8a6559..5148c8d 100644 ---- a/include/linux/pci-acpi.h -+++ b/include/linux/pci-acpi.h -@@ -77,6 +77,7 @@ struct pci_cfg_fixup { - struct pci_ecam_ops *ops; - char *oem_id; - char *oem_table_id; -+ u32 oem_revision; - int domain; - int bus_num; - }; -@@ -85,12 +86,12 @@ struct pci_cfg_fixup { - #define PCI_MCFG_BUS_ANY -1 - - /* Designate a routine to fix up buggy MCFG */ --#define DECLARE_ACPI_MCFG_FIXUP(ops, oem_id, oem_table_id, dom, bus) \ -+#define DECLARE_ACPI_MCFG_FIXUP(ops, oem_id, oem_table_id, rev, dom, bus) \ - static const struct pci_cfg_fixup \ -- __mcfg_fixup_##oem_id##oem_table_id##dom##bus \ -+ __mcfg_fixup_##oem_id##oem_table_id##rev##dom##bus \ - __used __attribute__((__section__(".acpi_fixup_mcfg"), \ - aligned((sizeof(void *))))) = \ -- { ops, oem_id, oem_table_id, dom, bus }; -+ { ops, oem_id, oem_table_id, rev, dom, bus }; - - extern int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info); - extern struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root, --- -2.7.4 - -From 78766cf255bc6aafac2f57372a0446f78322da19 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 5 Jul 2016 23:55:11 +0100 -Subject: [PATCH 4/4] X-Gene PCIe controller does not fully support ECAM. This - patch adds required ECAM fixup to allow X-Gene PCIe controller to be - functional in ACPI boot mode. - -Signed-off-by: Duc Dang ---- - drivers/pci/host/Makefile | 2 +- - drivers/pci/host/pci-xgene-ecam.c | 194 ++++++++++++++++++++++++++++++++++++++ - 2 files changed, 195 insertions(+), 1 deletion(-) - create mode 100644 drivers/pci/host/pci-xgene-ecam.c - -diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile -index 9c8698e..3480696 100644 ---- a/drivers/pci/host/Makefile -+++ b/drivers/pci/host/Makefile -@@ -14,7 +14,7 @@ obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o - obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone-dw.o pci-keystone.o - obj-$(CONFIG_PCIE_XILINX) += pcie-xilinx.o - obj-$(CONFIG_PCIE_XILINX_NWL) += pcie-xilinx-nwl.o --obj-$(CONFIG_PCI_XGENE) += pci-xgene.o -+obj-$(CONFIG_PCI_XGENE) += pci-xgene.o pci-xgene-ecam.o - obj-$(CONFIG_PCI_XGENE_MSI) += pci-xgene-msi.o - obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o - obj-$(CONFIG_PCI_VERSATILE) += pci-versatile.o -diff --git a/drivers/pci/host/pci-xgene-ecam.c b/drivers/pci/host/pci-xgene-ecam.c -new file mode 100644 -index 0000000..1bea63f ---- /dev/null -+++ b/drivers/pci/host/pci-xgene-ecam.c -@@ -0,0 +1,194 @@ -+/* -+ * APM X-Gene PCIe ECAM fixup driver -+ * -+ * Copyright (c) 2016, Applied Micro Circuits Corporation -+ * Author: -+ * Duc Dang -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program. If not, see . -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#ifdef CONFIG_ACPI -+#define RTDID 0x160 -+#define ROOT_CAP_AND_CTRL 0x5C -+ -+/* PCIe IP version */ -+#define XGENE_PCIE_IP_VER_UNKN 0 -+#define XGENE_PCIE_IP_VER_1 1 -+ -+#define APM_OEM_ID "APM" -+#define APM_XGENE_OEM_TABLE_ID "XGENE" -+#define APM_XGENE_OEM_REV 0x00000002 -+ -+struct xgene_pcie_acpi_root { -+ void __iomem *csr_base; -+ u32 version; -+}; -+ -+static acpi_status xgene_pcie_find_csr_base(struct acpi_resource *acpi_res, -+ void *data) -+{ -+ struct xgene_pcie_acpi_root *root = data; -+ struct acpi_resource_fixed_memory32 *fixed32; -+ -+ if (acpi_res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) { -+ fixed32 = &acpi_res->data.fixed_memory32; -+ root->csr_base = ioremap(fixed32->address, -+ fixed32->address_length); -+ return AE_CTRL_TERMINATE; -+ } -+ -+ return AE_OK; -+} -+ -+static int xgene_pcie_ecam_init(struct pci_config_window *cfg) -+{ -+ struct xgene_pcie_acpi_root *xgene_root; -+ struct device *dev = cfg->parent; -+ struct acpi_device *adev = to_acpi_device(dev); -+ acpi_handle handle = acpi_device_handle(adev); -+ -+ xgene_root = devm_kzalloc(dev, sizeof(*xgene_root), GFP_KERNEL); -+ if (!xgene_root) -+ return -ENOMEM; -+ -+ acpi_walk_resources(handle, METHOD_NAME__CRS, -+ xgene_pcie_find_csr_base, xgene_root); -+ -+ if (!xgene_root->csr_base) { -+ kfree(xgene_root); -+ return -ENODEV; -+ } -+ -+ xgene_root->version = XGENE_PCIE_IP_VER_1; -+ -+ cfg->priv = xgene_root; -+ -+ return 0; -+} -+ -+/* -+ * For Configuration request, RTDID register is used as Bus Number, -+ * Device Number and Function number of the header fields. -+ */ -+static void xgene_pcie_set_rtdid_reg(struct pci_bus *bus, uint devfn) -+{ -+ struct pci_config_window *cfg = bus->sysdata; -+ struct xgene_pcie_acpi_root *port = cfg->priv; -+ unsigned int b, d, f; -+ u32 rtdid_val = 0; -+ -+ b = bus->number; -+ d = PCI_SLOT(devfn); -+ f = PCI_FUNC(devfn); -+ -+ if (!pci_is_root_bus(bus)) -+ rtdid_val = (b << 8) | (d << 3) | f; -+ -+ writel(rtdid_val, port->csr_base + RTDID); -+ /* read the register back to ensure flush */ -+ readl(port->csr_base + RTDID); -+} -+ -+/* -+ * X-Gene PCIe port uses BAR0-BAR1 of RC's configuration space as -+ * the translation from PCI bus to native BUS. Entire DDR region -+ * is mapped into PCIe space using these registers, so it can be -+ * reached by DMA from EP devices. The BAR0/1 of bridge should be -+ * hidden during enumeration to avoid the sizing and resource allocation -+ * by PCIe core. -+ */ -+static bool xgene_pcie_hide_rc_bars(struct pci_bus *bus, int offset) -+{ -+ if (pci_is_root_bus(bus) && ((offset == PCI_BASE_ADDRESS_0) || -+ (offset == PCI_BASE_ADDRESS_1))) -+ return true; -+ -+ return false; -+} -+ -+void __iomem *xgene_pcie_ecam_map_bus(struct pci_bus *bus, -+ unsigned int devfn, int where) -+{ -+ struct pci_config_window *cfg = bus->sysdata; -+ unsigned int busn = bus->number; -+ void __iomem *base; -+ -+ if (busn < cfg->busr.start || busn > cfg->busr.end) -+ return NULL; -+ -+ if ((pci_is_root_bus(bus) && devfn != 0) || -+ xgene_pcie_hide_rc_bars(bus, where)) -+ return NULL; -+ -+ xgene_pcie_set_rtdid_reg(bus, devfn); -+ -+ if (busn > cfg->busr.start) -+ base = cfg->win + (1 << cfg->ops->bus_shift); -+ else -+ base = cfg->win; -+ -+ return base + where; -+} -+ -+static int xgene_pcie_config_read32(struct pci_bus *bus, unsigned int devfn, -+ int where, int size, u32 *val) -+{ -+ struct pci_config_window *cfg = bus->sysdata; -+ struct xgene_pcie_acpi_root *port = cfg->priv; -+ -+ if (pci_generic_config_read32(bus, devfn, where & ~0x3, 4, val) != -+ PCIBIOS_SUCCESSFUL) -+ return PCIBIOS_DEVICE_NOT_FOUND; -+ -+ /* -+ * The v1 controller has a bug in its Configuration Request -+ * Retry Status (CRS) logic: when CRS is enabled and we read the -+ * Vendor and Device ID of a non-existent device, the controller -+ * fabricates return data of 0xFFFF0001 ("device exists but is not -+ * ready") instead of 0xFFFFFFFF ("device does not exist"). This -+ * causes the PCI core to retry the read until it times out. -+ * Avoid this by not claiming to support CRS. -+ */ -+ if (pci_is_root_bus(bus) && (port->version == XGENE_PCIE_IP_VER_1) && -+ ((where & ~0x3) == ROOT_CAP_AND_CTRL)) -+ *val &= ~(PCI_EXP_RTCAP_CRSVIS << 16); -+ -+ if (size <= 2) -+ *val = (*val >> (8 * (where & 3))) & ((1 << (size * 8)) - 1); -+ -+ return PCIBIOS_SUCCESSFUL; -+} -+ -+static struct pci_ecam_ops xgene_pcie_ecam_ops = { -+ .bus_shift = 16, -+ .init = xgene_pcie_ecam_init, -+ .pci_ops = { -+ .map_bus = xgene_pcie_ecam_map_bus, -+ .read = xgene_pcie_config_read32, -+ .write = pci_generic_config_write, -+ } -+}; -+ -+DECLARE_ACPI_MCFG_FIXUP(&xgene_pcie_ecam_ops, APM_OEM_ID, -+ APM_XGENE_OEM_TABLE_ID, APM_XGENE_OEM_REV, -+ PCI_MCFG_DOMAIN_ANY, PCI_MCFG_BUS_ANY); -+#endif --- -2.7.4 - diff --git a/baseconfig/CONFIG_ARCH_TEGRA_186_SOC b/baseconfig/CONFIG_ARCH_TEGRA_186_SOC deleted file mode 100644 index 0439db330..000000000 --- a/baseconfig/CONFIG_ARCH_TEGRA_186_SOC +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_ARCH_TEGRA_186_SOC is not set diff --git a/baseconfig/CONFIG_ARM64_PTDUMP b/baseconfig/CONFIG_ARM64_PTDUMP deleted file mode 100644 index 5090299f2..000000000 --- a/baseconfig/CONFIG_ARM64_PTDUMP +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_ARM64_PTDUMP is not set diff --git a/baseconfig/CONFIG_ARM_SCPI_PROTOCOL b/baseconfig/CONFIG_ARM_SCPI_PROTOCOL deleted file mode 100644 index 438b6d561..000000000 --- a/baseconfig/CONFIG_ARM_SCPI_PROTOCOL +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_ARM_SCPI_PROTOCOL is not set diff --git a/baseconfig/CONFIG_BATTERY_GOLDFISH b/baseconfig/CONFIG_BATTERY_GOLDFISH deleted file mode 100644 index 75b9c00e9..000000000 --- a/baseconfig/CONFIG_BATTERY_GOLDFISH +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_BATTERY_GOLDFISH is not set diff --git a/baseconfig/CONFIG_BLK_DEBUG_FS b/baseconfig/CONFIG_BLK_DEBUG_FS new file mode 100644 index 000000000..71cc6e708 --- /dev/null +++ b/baseconfig/CONFIG_BLK_DEBUG_FS @@ -0,0 +1 @@ +CONFIG_BLK_DEBUG_FS=y diff --git a/baseconfig/CONFIG_BLK_SED_OPAL b/baseconfig/CONFIG_BLK_SED_OPAL new file mode 100644 index 000000000..11d139705 --- /dev/null +++ b/baseconfig/CONFIG_BLK_SED_OPAL @@ -0,0 +1 @@ +CONFIG_BLK_SED_OPAL=y diff --git a/baseconfig/CONFIG_BT_HCIUART_NOKIA b/baseconfig/CONFIG_BT_HCIUART_NOKIA new file mode 100644 index 000000000..6f09b31e6 --- /dev/null +++ b/baseconfig/CONFIG_BT_HCIUART_NOKIA @@ -0,0 +1 @@ +CONFIG_BT_HCIUART_NOKIA=m diff --git a/baseconfig/CONFIG_CFG80211_CRDA_SUPPORT b/baseconfig/CONFIG_CFG80211_CRDA_SUPPORT new file mode 100644 index 000000000..51f113cca --- /dev/null +++ b/baseconfig/CONFIG_CFG80211_CRDA_SUPPORT @@ -0,0 +1 @@ +CONFIG_CFG80211_CRDA_SUPPORT=y diff --git a/baseconfig/CONFIG_CGROUP_RDMA b/baseconfig/CONFIG_CGROUP_RDMA new file mode 100644 index 000000000..94ae4f4bc --- /dev/null +++ b/baseconfig/CONFIG_CGROUP_RDMA @@ -0,0 +1 @@ +# CONFIG_CGROUP_RDMA is not set diff --git a/baseconfig/CONFIG_CHARGER_DETECTOR_MAX14656 b/baseconfig/CONFIG_CHARGER_DETECTOR_MAX14656 new file mode 100644 index 000000000..434d9466f --- /dev/null +++ b/baseconfig/CONFIG_CHARGER_DETECTOR_MAX14656 @@ -0,0 +1 @@ +# CONFIG_CHARGER_DETECTOR_MAX14656 is not set diff --git a/baseconfig/CONFIG_CHARGER_SBS b/baseconfig/CONFIG_CHARGER_SBS new file mode 100644 index 000000000..afb3f2f1d --- /dev/null +++ b/baseconfig/CONFIG_CHARGER_SBS @@ -0,0 +1 @@ +# CONFIG_CHARGER_SBS is not set diff --git a/baseconfig/CONFIG_CM3605 b/baseconfig/CONFIG_CM3605 new file mode 100644 index 000000000..138742e11 --- /dev/null +++ b/baseconfig/CONFIG_CM3605 @@ -0,0 +1 @@ +CONFIG_CM3605=m diff --git a/baseconfig/CONFIG_COMMON_CLK_HI3519 b/baseconfig/CONFIG_COMMON_CLK_HI3519 deleted file mode 100644 index 492b656b1..000000000 --- a/baseconfig/CONFIG_COMMON_CLK_HI3519 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_COMMON_CLK_HI3519 is not set diff --git a/baseconfig/CONFIG_COMMON_CLK_MT2701 b/baseconfig/CONFIG_COMMON_CLK_MT2701 deleted file mode 100644 index 1f4db7eb4..000000000 --- a/baseconfig/CONFIG_COMMON_CLK_MT2701 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_COMMON_CLK_MT2701 is not set diff --git a/baseconfig/CONFIG_COMMON_CLK_MT2701_BDPSYS b/baseconfig/CONFIG_COMMON_CLK_MT2701_BDPSYS deleted file mode 100644 index 8836cfeb2..000000000 --- a/baseconfig/CONFIG_COMMON_CLK_MT2701_BDPSYS +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_COMMON_CLK_MT2701_BDPSYS is not set diff --git a/baseconfig/CONFIG_COMMON_CLK_MT2701_ETHSYS b/baseconfig/CONFIG_COMMON_CLK_MT2701_ETHSYS deleted file mode 100644 index ce71bcaf3..000000000 --- a/baseconfig/CONFIG_COMMON_CLK_MT2701_ETHSYS +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_COMMON_CLK_MT2701_ETHSYS is not set diff --git a/baseconfig/CONFIG_COMMON_CLK_MT2701_HIFSYS b/baseconfig/CONFIG_COMMON_CLK_MT2701_HIFSYS deleted file mode 100644 index 687287f1a..000000000 --- a/baseconfig/CONFIG_COMMON_CLK_MT2701_HIFSYS +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_COMMON_CLK_MT2701_HIFSYS is not set diff --git a/baseconfig/CONFIG_COMMON_CLK_MT2701_IMGSYS b/baseconfig/CONFIG_COMMON_CLK_MT2701_IMGSYS deleted file mode 100644 index f50109f52..000000000 --- a/baseconfig/CONFIG_COMMON_CLK_MT2701_IMGSYS +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_COMMON_CLK_MT2701_IMGSYS is not set diff --git a/baseconfig/CONFIG_COMMON_CLK_MT2701_MMSYS b/baseconfig/CONFIG_COMMON_CLK_MT2701_MMSYS deleted file mode 100644 index a28dde4dd..000000000 --- a/baseconfig/CONFIG_COMMON_CLK_MT2701_MMSYS +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_COMMON_CLK_MT2701_MMSYS is not set diff --git a/baseconfig/CONFIG_COMMON_CLK_MT2701_VDECSYS b/baseconfig/CONFIG_COMMON_CLK_MT2701_VDECSYS deleted file mode 100644 index 2fffe9756..000000000 --- a/baseconfig/CONFIG_COMMON_CLK_MT2701_VDECSYS +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_COMMON_CLK_MT2701_VDECSYS is not set diff --git a/baseconfig/CONFIG_COMMON_CLK_MT8135 b/baseconfig/CONFIG_COMMON_CLK_MT8135 deleted file mode 100644 index 0e5e55f2d..000000000 --- a/baseconfig/CONFIG_COMMON_CLK_MT8135 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_COMMON_CLK_MT8135 is not set diff --git a/baseconfig/CONFIG_COMMON_CLK_MT8173 b/baseconfig/CONFIG_COMMON_CLK_MT8173 deleted file mode 100644 index ef1d176f5..000000000 --- a/baseconfig/CONFIG_COMMON_CLK_MT8173 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_COMMON_CLK_MT8173 is not set diff --git a/baseconfig/CONFIG_COMMON_CLK_OXNAS b/baseconfig/CONFIG_COMMON_CLK_OXNAS deleted file mode 100644 index 123f7bbbf..000000000 --- a/baseconfig/CONFIG_COMMON_CLK_OXNAS +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_COMMON_CLK_OXNAS is not set diff --git a/baseconfig/CONFIG_COMMON_CLK_VC5 b/baseconfig/CONFIG_COMMON_CLK_VC5 new file mode 100644 index 000000000..9aaf6ae19 --- /dev/null +++ b/baseconfig/CONFIG_COMMON_CLK_VC5 @@ -0,0 +1 @@ +# CONFIG_COMMON_CLK_VC5 is not set diff --git a/baseconfig/CONFIG_COMMON_RESET_HI3660 b/baseconfig/CONFIG_COMMON_RESET_HI3660 new file mode 100644 index 000000000..0d13136e0 --- /dev/null +++ b/baseconfig/CONFIG_COMMON_RESET_HI3660 @@ -0,0 +1 @@ +# CONFIG_COMMON_RESET_HI3660 is not set diff --git a/baseconfig/CONFIG_CRYPTO_AES_TI b/baseconfig/CONFIG_CRYPTO_AES_TI new file mode 100644 index 000000000..fa0a3c5e1 --- /dev/null +++ b/baseconfig/CONFIG_CRYPTO_AES_TI @@ -0,0 +1 @@ +CONFIG_CRYPTO_AES_TI=m diff --git a/baseconfig/CONFIG_CRYPTO_CRC32_ARM_CE b/baseconfig/CONFIG_CRYPTO_CRC32_ARM_CE deleted file mode 100644 index 242e37489..000000000 --- a/baseconfig/CONFIG_CRYPTO_CRC32_ARM_CE +++ /dev/null @@ -1 +0,0 @@ -CONFIG_CRYPTO_CRC32_ARM_CE=m diff --git a/baseconfig/CONFIG_CRYPTO_CRCT10DIF_ARM_CE b/baseconfig/CONFIG_CRYPTO_CRCT10DIF_ARM_CE deleted file mode 100644 index 6b13ea30c..000000000 --- a/baseconfig/CONFIG_CRYPTO_CRCT10DIF_ARM_CE +++ /dev/null @@ -1 +0,0 @@ -CONFIG_CRYPTO_CRCT10DIF_ARM_CE=m diff --git a/baseconfig/CONFIG_DEBUG_REFCOUNT b/baseconfig/CONFIG_DEBUG_REFCOUNT new file mode 100644 index 000000000..9d1b9de89 --- /dev/null +++ b/baseconfig/CONFIG_DEBUG_REFCOUNT @@ -0,0 +1 @@ +# CONFIG_DEBUG_REFCOUNT is not set diff --git a/baseconfig/CONFIG_DEBUG_VM_RB revisit this if performance isn't horrible b/baseconfig/CONFIG_DEBUG_VM_RB revisit this if performance isn't horrible new file mode 100644 index 000000000..fbc8aaef8 --- /dev/null +++ b/baseconfig/CONFIG_DEBUG_VM_RB revisit this if performance isn't horrible @@ -0,0 +1 @@ +# CONFIG_DEBUG_VM_RB is not set # revisit this if performance isn't horrible diff --git a/baseconfig/CONFIG_DEVPORT b/baseconfig/CONFIG_DEVPORT new file mode 100644 index 000000000..555cf4be4 --- /dev/null +++ b/baseconfig/CONFIG_DEVPORT @@ -0,0 +1 @@ +# CONFIG_DEVPORT is not set diff --git a/baseconfig/CONFIG_DPM_WATCHDOG b/baseconfig/CONFIG_DPM_WATCHDOG revisit this in debug similarity index 100% rename from baseconfig/CONFIG_DPM_WATCHDOG rename to baseconfig/CONFIG_DPM_WATCHDOG revisit this in debug diff --git a/baseconfig/CONFIG_DRM_DEBUG_MM_SELFTEST b/baseconfig/CONFIG_DRM_DEBUG_MM_SELFTEST new file mode 100644 index 000000000..9607ae3de --- /dev/null +++ b/baseconfig/CONFIG_DRM_DEBUG_MM_SELFTEST @@ -0,0 +1 @@ +# CONFIG_DRM_DEBUG_MM_SELFTEST is not set diff --git a/baseconfig/CONFIG_DRM_I2C_ADV7533 b/baseconfig/CONFIG_DRM_I2C_ADV7533 index 1fba3a9be..9f7b3dccf 100644 --- a/baseconfig/CONFIG_DRM_I2C_ADV7533 +++ b/baseconfig/CONFIG_DRM_I2C_ADV7533 @@ -1 +1 @@ -# CONFIG_DRM_I2C_ADV7533 is not set +CONFIG_DRM_I2C_ADV7533=y diff --git a/baseconfig/CONFIG_DRM_MALI_DISPLAY b/baseconfig/CONFIG_DRM_MALI_DISPLAY deleted file mode 100644 index af3d09fbe..000000000 --- a/baseconfig/CONFIG_DRM_MALI_DISPLAY +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_DRM_MALI_DISPLAY is not set diff --git a/baseconfig/CONFIG_DRM_TINYDRM b/baseconfig/CONFIG_DRM_TINYDRM new file mode 100644 index 000000000..be104b06c --- /dev/null +++ b/baseconfig/CONFIG_DRM_TINYDRM @@ -0,0 +1 @@ +# CONFIG_DRM_TINYDRM is not set diff --git a/baseconfig/CONFIG_DVB_USB_ZD1301 b/baseconfig/CONFIG_DVB_USB_ZD1301 new file mode 100644 index 000000000..4e114ce58 --- /dev/null +++ b/baseconfig/CONFIG_DVB_USB_ZD1301 @@ -0,0 +1 @@ +CONFIG_DVB_USB_ZD1301=m diff --git a/baseconfig/CONFIG_EEPROM_IDT_89HPESX b/baseconfig/CONFIG_EEPROM_IDT_89HPESX new file mode 100644 index 000000000..5ea592932 --- /dev/null +++ b/baseconfig/CONFIG_EEPROM_IDT_89HPESX @@ -0,0 +1 @@ +CONFIG_EEPROM_IDT_89HPESX=m diff --git a/baseconfig/CONFIG_EMAC_ROCKCHIP b/baseconfig/CONFIG_EMAC_ROCKCHIP deleted file mode 100644 index 65c1db9f3..000000000 --- a/baseconfig/CONFIG_EMAC_ROCKCHIP +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_EMAC_ROCKCHIP is not set diff --git a/baseconfig/CONFIG_EXTCON_INTEL_INT3496 b/baseconfig/CONFIG_EXTCON_INTEL_INT3496 new file mode 100644 index 000000000..3f6c5d6f5 --- /dev/null +++ b/baseconfig/CONFIG_EXTCON_INTEL_INT3496 @@ -0,0 +1 @@ +CONFIG_EXTCON_INTEL_INT3496=m diff --git a/baseconfig/CONFIG_FB_GOLDFISH b/baseconfig/CONFIG_FB_GOLDFISH deleted file mode 100644 index 522a715d1..000000000 --- a/baseconfig/CONFIG_FB_GOLDFISH +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_FB_GOLDFISH is not set diff --git a/baseconfig/CONFIG_FSI b/baseconfig/CONFIG_FSI new file mode 100644 index 000000000..1f548f4f0 --- /dev/null +++ b/baseconfig/CONFIG_FSI @@ -0,0 +1 @@ +CONFIG_FSI=m diff --git a/baseconfig/CONFIG_GPIO_EXAR b/baseconfig/CONFIG_GPIO_EXAR new file mode 100644 index 000000000..e03739e86 --- /dev/null +++ b/baseconfig/CONFIG_GPIO_EXAR @@ -0,0 +1 @@ +CONFIG_GPIO_EXAR=m diff --git a/baseconfig/CONFIG_GPIO_PCI_IDIO_16 b/baseconfig/CONFIG_GPIO_PCI_IDIO_16 new file mode 100644 index 000000000..e3e6eeab0 --- /dev/null +++ b/baseconfig/CONFIG_GPIO_PCI_IDIO_16 @@ -0,0 +1 @@ +CONFIG_GPIO_PCI_IDIO_16=m diff --git a/baseconfig/CONFIG_GPIO_SYSFS b/baseconfig/CONFIG_GPIO_SYSFS index 52708d181..006904523 100644 --- a/baseconfig/CONFIG_GPIO_SYSFS +++ b/baseconfig/CONFIG_GPIO_SYSFS @@ -1 +1 @@ -CONFIG_GPIO_SYSFS=y +# CONFIG_GPIO_SYSFS is not set diff --git a/baseconfig/CONFIG_GPIO_ZX b/baseconfig/CONFIG_GPIO_ZX deleted file mode 100644 index a6c0a85ac..000000000 --- a/baseconfig/CONFIG_GPIO_ZX +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_GPIO_ZX is not set diff --git a/baseconfig/CONFIG_HX711 b/baseconfig/CONFIG_HX711 new file mode 100644 index 000000000..5378c7339 --- /dev/null +++ b/baseconfig/CONFIG_HX711 @@ -0,0 +1 @@ +# CONFIG_HX711 is not set diff --git a/baseconfig/CONFIG_IIO_ST_LSM6DSX b/baseconfig/CONFIG_IIO_ST_LSM6DSX new file mode 100644 index 000000000..b6ec57836 --- /dev/null +++ b/baseconfig/CONFIG_IIO_ST_LSM6DSX @@ -0,0 +1 @@ +# CONFIG_IIO_ST_LSM6DSX is not set diff --git a/baseconfig/CONFIG_INET6_ESP_OFFLOAD b/baseconfig/CONFIG_INET6_ESP_OFFLOAD new file mode 100644 index 000000000..24c350004 --- /dev/null +++ b/baseconfig/CONFIG_INET6_ESP_OFFLOAD @@ -0,0 +1 @@ +CONFIG_INET6_ESP_OFFLOAD=m diff --git a/baseconfig/CONFIG_INET_ESP_OFFLOAD b/baseconfig/CONFIG_INET_ESP_OFFLOAD new file mode 100644 index 000000000..d5cca6d1d --- /dev/null +++ b/baseconfig/CONFIG_INET_ESP_OFFLOAD @@ -0,0 +1 @@ +CONFIG_INET_ESP_OFFLOAD=m diff --git a/baseconfig/CONFIG_INFINIBAND_BNXT_RE b/baseconfig/CONFIG_INFINIBAND_BNXT_RE new file mode 100644 index 000000000..47533209e --- /dev/null +++ b/baseconfig/CONFIG_INFINIBAND_BNXT_RE @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_BNXT_RE is not set diff --git a/baseconfig/CONFIG_INTEL_RDT_A b/baseconfig/CONFIG_INTEL_RDT_A deleted file mode 100644 index 8c02d1afc..000000000 --- a/baseconfig/CONFIG_INTEL_RDT_A +++ /dev/null @@ -1 +0,0 @@ -CONFIG_INTEL_RDT_A=y diff --git a/baseconfig/CONFIG_IPVTAP b/baseconfig/CONFIG_IPVTAP new file mode 100644 index 000000000..4bb385673 --- /dev/null +++ b/baseconfig/CONFIG_IPVTAP @@ -0,0 +1 @@ +CONFIG_IPVTAP=m diff --git a/baseconfig/CONFIG_IR_SPI b/baseconfig/CONFIG_IR_SPI new file mode 100644 index 000000000..d0e838d38 --- /dev/null +++ b/baseconfig/CONFIG_IR_SPI @@ -0,0 +1 @@ +CONFIG_IR_SPI=m diff --git a/baseconfig/CONFIG_KEYBOARD_TM2_TOUCHKEY b/baseconfig/CONFIG_KEYBOARD_TM2_TOUCHKEY new file mode 100644 index 000000000..e1d0c2b26 --- /dev/null +++ b/baseconfig/CONFIG_KEYBOARD_TM2_TOUCHKEY @@ -0,0 +1 @@ +CONFIG_KEYBOARD_TM2_TOUCHKEY=m diff --git a/baseconfig/CONFIG_KPROBE_EVENT b/baseconfig/CONFIG_KPROBE_EVENT deleted file mode 100644 index 1ba78399b..000000000 --- a/baseconfig/CONFIG_KPROBE_EVENT +++ /dev/null @@ -1 +0,0 @@ -CONFIG_KPROBE_EVENT=y diff --git a/baseconfig/CONFIG_KPROBE_EVENTS b/baseconfig/CONFIG_KPROBE_EVENTS new file mode 100644 index 000000000..2111c5d1a --- /dev/null +++ b/baseconfig/CONFIG_KPROBE_EVENTS @@ -0,0 +1 @@ +CONFIG_KPROBE_EVENTS=y diff --git a/baseconfig/CONFIG_LEDS_BRIGHTNESS_HW_CHANGED b/baseconfig/CONFIG_LEDS_BRIGHTNESS_HW_CHANGED new file mode 100644 index 000000000..4ab759066 --- /dev/null +++ b/baseconfig/CONFIG_LEDS_BRIGHTNESS_HW_CHANGED @@ -0,0 +1 @@ +CONFIG_LEDS_BRIGHTNESS_HW_CHANGED=y diff --git a/baseconfig/CONFIG_LPFC_NVME_INITIATOR b/baseconfig/CONFIG_LPFC_NVME_INITIATOR new file mode 100644 index 000000000..cfa87b693 --- /dev/null +++ b/baseconfig/CONFIG_LPFC_NVME_INITIATOR @@ -0,0 +1 @@ +CONFIG_LPFC_NVME_INITIATOR=y diff --git a/baseconfig/CONFIG_LPFC_NVME_TARGET b/baseconfig/CONFIG_LPFC_NVME_TARGET new file mode 100644 index 000000000..ebf8bd16d --- /dev/null +++ b/baseconfig/CONFIG_LPFC_NVME_TARGET @@ -0,0 +1 @@ +CONFIG_LPFC_NVME_TARGET=y diff --git a/baseconfig/CONFIG_MAGIC_SYSRQ_SERIAL b/baseconfig/CONFIG_MAGIC_SYSRQ_SERIAL new file mode 100644 index 000000000..649399011 --- /dev/null +++ b/baseconfig/CONFIG_MAGIC_SYSRQ_SERIAL @@ -0,0 +1 @@ +CONFIG_MAGIC_SYSRQ_SERIAL=y diff --git a/baseconfig/CONFIG_MAX11100 b/baseconfig/CONFIG_MAX11100 new file mode 100644 index 000000000..90819abc8 --- /dev/null +++ b/baseconfig/CONFIG_MAX11100 @@ -0,0 +1 @@ +# CONFIG_MAX11100 is not set diff --git a/baseconfig/CONFIG_MAX5481 b/baseconfig/CONFIG_MAX5481 new file mode 100644 index 000000000..36b3781d6 --- /dev/null +++ b/baseconfig/CONFIG_MAX5481 @@ -0,0 +1 @@ +# CONFIG_MAX5481 is not set diff --git a/baseconfig/CONFIG_MESON_GXL_PHY b/baseconfig/CONFIG_MESON_GXL_PHY deleted file mode 100644 index cc59580cc..000000000 --- a/baseconfig/CONFIG_MESON_GXL_PHY +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MESON_GXL_PHY=m diff --git a/baseconfig/CONFIG_MFD_CPCAP b/baseconfig/CONFIG_MFD_CPCAP new file mode 100644 index 000000000..acf5bd3fe --- /dev/null +++ b/baseconfig/CONFIG_MFD_CPCAP @@ -0,0 +1 @@ +CONFIG_MFD_CPCAP=m diff --git a/baseconfig/CONFIG_MOUSE_PS2_VMMOUSE b/baseconfig/CONFIG_MOUSE_PS2_VMMOUSE deleted file mode 100644 index 3941478c7..000000000 --- a/baseconfig/CONFIG_MOUSE_PS2_VMMOUSE +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MOUSE_PS2_VMMOUSE is not set diff --git a/baseconfig/CONFIG_MQ_IOSCHED_DEADLINE b/baseconfig/CONFIG_MQ_IOSCHED_DEADLINE new file mode 100644 index 000000000..ad5c7700b --- /dev/null +++ b/baseconfig/CONFIG_MQ_IOSCHED_DEADLINE @@ -0,0 +1 @@ +CONFIG_MQ_IOSCHED_DEADLINE=y diff --git a/baseconfig/CONFIG_NET_ACT_SAMPLE b/baseconfig/CONFIG_NET_ACT_SAMPLE new file mode 100644 index 000000000..4582be19d --- /dev/null +++ b/baseconfig/CONFIG_NET_ACT_SAMPLE @@ -0,0 +1 @@ +CONFIG_NET_ACT_SAMPLE=m diff --git a/baseconfig/CONFIG_NET_IFE b/baseconfig/CONFIG_NET_IFE new file mode 100644 index 000000000..eea504e0c --- /dev/null +++ b/baseconfig/CONFIG_NET_IFE @@ -0,0 +1 @@ +CONFIG_NET_IFE=m diff --git a/baseconfig/CONFIG_NET_L3_MASTER_DEV b/baseconfig/CONFIG_NET_L3_MASTER_DEV index c5825b130..bdf39009e 100644 --- a/baseconfig/CONFIG_NET_L3_MASTER_DEV +++ b/baseconfig/CONFIG_NET_L3_MASTER_DEV @@ -1 +1 @@ -# CONFIG_NET_L3_MASTER_DEV is not set +CONFIG_NET_L3_MASTER_DEV=y diff --git a/baseconfig/CONFIG_NET_VENDOR_AMAZON b/baseconfig/CONFIG_NET_VENDOR_AMAZON index 707bb5a54..71e03d079 100644 --- a/baseconfig/CONFIG_NET_VENDOR_AMAZON +++ b/baseconfig/CONFIG_NET_VENDOR_AMAZON @@ -1 +1 @@ -# CONFIG_NET_VENDOR_AMAZON is not set +CONFIG_NET_VENDOR_AMAZON=y diff --git a/baseconfig/CONFIG_NET_VENDOR_AQUANTIA b/baseconfig/CONFIG_NET_VENDOR_AQUANTIA new file mode 100644 index 000000000..91af5c7e0 --- /dev/null +++ b/baseconfig/CONFIG_NET_VENDOR_AQUANTIA @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_AQUANTIA is not set diff --git a/baseconfig/CONFIG_NFP b/baseconfig/CONFIG_NFP new file mode 100644 index 000000000..14f22b12c --- /dev/null +++ b/baseconfig/CONFIG_NFP @@ -0,0 +1 @@ +CONFIG_NFP=m diff --git a/baseconfig/CONFIG_NFP_DEBUG b/baseconfig/CONFIG_NFP_DEBUG new file mode 100644 index 000000000..b7f75b3f3 --- /dev/null +++ b/baseconfig/CONFIG_NFP_DEBUG @@ -0,0 +1 @@ +# CONFIG_NFP_DEBUG is not set diff --git a/baseconfig/CONFIG_NFT_SET_BITMAP b/baseconfig/CONFIG_NFT_SET_BITMAP new file mode 100644 index 000000000..a0a3769ff --- /dev/null +++ b/baseconfig/CONFIG_NFT_SET_BITMAP @@ -0,0 +1 @@ +CONFIG_NFT_SET_BITMAP=m diff --git a/baseconfig/CONFIG_PARMAN b/baseconfig/CONFIG_PARMAN new file mode 100644 index 000000000..1e5d4dd91 --- /dev/null +++ b/baseconfig/CONFIG_PARMAN @@ -0,0 +1 @@ +CONFIG_PARMAN=m diff --git a/baseconfig/CONFIG_PC104 b/baseconfig/CONFIG_PC104 new file mode 100644 index 000000000..0608d3f72 --- /dev/null +++ b/baseconfig/CONFIG_PC104 @@ -0,0 +1 @@ +# CONFIG_PC104 is not set diff --git a/baseconfig/CONFIG_PHY_QCOM_USB_HS b/baseconfig/CONFIG_PHY_QCOM_USB_HS new file mode 100644 index 000000000..ce9808509 --- /dev/null +++ b/baseconfig/CONFIG_PHY_QCOM_USB_HS @@ -0,0 +1 @@ +# CONFIG_PHY_QCOM_USB_HS is not set diff --git a/baseconfig/CONFIG_PHY_QCOM_USB_HSIC b/baseconfig/CONFIG_PHY_QCOM_USB_HSIC new file mode 100644 index 000000000..2a37d673c --- /dev/null +++ b/baseconfig/CONFIG_PHY_QCOM_USB_HSIC @@ -0,0 +1 @@ +# CONFIG_PHY_QCOM_USB_HSIC is not set diff --git a/baseconfig/CONFIG_PINCTRL_TI_IODELAY b/baseconfig/CONFIG_PINCTRL_TI_IODELAY new file mode 100644 index 000000000..cc5eb6a6c --- /dev/null +++ b/baseconfig/CONFIG_PINCTRL_TI_IODELAY @@ -0,0 +1 @@ +# CONFIG_PINCTRL_TI_IODELAY is not set diff --git a/baseconfig/CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT b/baseconfig/CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT new file mode 100644 index 000000000..eb368f2d7 --- /dev/null +++ b/baseconfig/CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT @@ -0,0 +1 @@ +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=12 diff --git a/baseconfig/CONFIG_PSAMPLE b/baseconfig/CONFIG_PSAMPLE new file mode 100644 index 000000000..fca0860ea --- /dev/null +++ b/baseconfig/CONFIG_PSAMPLE @@ -0,0 +1 @@ +CONFIG_PSAMPLE=m diff --git a/baseconfig/CONFIG_PWRSEQ_SD8787 b/baseconfig/CONFIG_PWRSEQ_SD8787 new file mode 100644 index 000000000..243dba034 --- /dev/null +++ b/baseconfig/CONFIG_PWRSEQ_SD8787 @@ -0,0 +1 @@ +# CONFIG_PWRSEQ_SD8787 is not set diff --git a/baseconfig/CONFIG_QCOM_EBI2 b/baseconfig/CONFIG_QCOM_EBI2 deleted file mode 100644 index e96b3544e..000000000 --- a/baseconfig/CONFIG_QCOM_EBI2 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_QCOM_EBI2 is not set diff --git a/baseconfig/CONFIG_QEDF b/baseconfig/CONFIG_QEDF new file mode 100644 index 000000000..33c24865a --- /dev/null +++ b/baseconfig/CONFIG_QEDF @@ -0,0 +1 @@ +CONFIG_QEDF=m diff --git a/baseconfig/CONFIG_RADIO_WL128X b/baseconfig/CONFIG_RADIO_WL128X deleted file mode 100644 index da0cf2eb9..000000000 --- a/baseconfig/CONFIG_RADIO_WL128X +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_RADIO_WL128X is not set # depends on TI_ST which we don't enable diff --git a/baseconfig/CONFIG_REGULATOR_CPCAP b/baseconfig/CONFIG_REGULATOR_CPCAP new file mode 100644 index 000000000..02e701e66 --- /dev/null +++ b/baseconfig/CONFIG_REGULATOR_CPCAP @@ -0,0 +1 @@ +CONFIG_REGULATOR_CPCAP=m diff --git a/baseconfig/CONFIG_SENSORS_STTS751 b/baseconfig/CONFIG_SENSORS_STTS751 new file mode 100644 index 000000000..f2f8006af --- /dev/null +++ b/baseconfig/CONFIG_SENSORS_STTS751 @@ -0,0 +1 @@ +# CONFIG_SENSORS_STTS751 is not set diff --git a/baseconfig/CONFIG_SERIAL_8250_EXAR b/baseconfig/CONFIG_SERIAL_8250_EXAR new file mode 100644 index 000000000..bb519d916 --- /dev/null +++ b/baseconfig/CONFIG_SERIAL_8250_EXAR @@ -0,0 +1 @@ +CONFIG_SERIAL_8250_EXAR=m diff --git a/baseconfig/CONFIG_SERIAL_8250_PCI b/baseconfig/CONFIG_SERIAL_8250_PCI new file mode 100644 index 000000000..d48086e3e --- /dev/null +++ b/baseconfig/CONFIG_SERIAL_8250_PCI @@ -0,0 +1 @@ +CONFIG_SERIAL_8250_PCI=m diff --git a/baseconfig/CONFIG_SERIAL_DEV_BUS b/baseconfig/CONFIG_SERIAL_DEV_BUS new file mode 100644 index 000000000..f73dc688e --- /dev/null +++ b/baseconfig/CONFIG_SERIAL_DEV_BUS @@ -0,0 +1 @@ +CONFIG_SERIAL_DEV_BUS=y diff --git a/baseconfig/CONFIG_SERIAL_DEV_CTRL_TTYPORT b/baseconfig/CONFIG_SERIAL_DEV_CTRL_TTYPORT new file mode 100644 index 000000000..4d61eadb1 --- /dev/null +++ b/baseconfig/CONFIG_SERIAL_DEV_CTRL_TTYPORT @@ -0,0 +1 @@ +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y diff --git a/baseconfig/CONFIG_SMC b/baseconfig/CONFIG_SMC new file mode 100644 index 000000000..88600dc91 --- /dev/null +++ b/baseconfig/CONFIG_SMC @@ -0,0 +1 @@ +# CONFIG_SMC is not set diff --git a/baseconfig/CONFIG_SND_SIMPLE_SCU_CARD b/baseconfig/CONFIG_SND_SIMPLE_SCU_CARD index 38757da9f..e50c18374 100644 --- a/baseconfig/CONFIG_SND_SIMPLE_SCU_CARD +++ b/baseconfig/CONFIG_SND_SIMPLE_SCU_CARD @@ -1 +1 @@ -# CONFIG_SND_SIMPLE_SCU_CARD is not set +CONFIG_SND_SIMPLE_SCU_CARD=m diff --git a/baseconfig/CONFIG_SND_SOC_NAU8540 b/baseconfig/CONFIG_SND_SOC_NAU8540 new file mode 100644 index 000000000..43355fa74 --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_NAU8540 @@ -0,0 +1 @@ +# CONFIG_SND_SOC_NAU8540 is not set diff --git a/baseconfig/arm/armv7/CONFIG_SND_SOC_TAS571X b/baseconfig/CONFIG_SND_SOC_TAS571X similarity index 100% rename from baseconfig/arm/armv7/CONFIG_SND_SOC_TAS571X rename to baseconfig/CONFIG_SND_SOC_TAS571X diff --git a/baseconfig/CONFIG_SOC_ZTE b/baseconfig/CONFIG_SOC_ZTE new file mode 100644 index 000000000..95a233e40 --- /dev/null +++ b/baseconfig/CONFIG_SOC_ZTE @@ -0,0 +1 @@ +# CONFIG_SOC_ZTE is not set diff --git a/baseconfig/CONFIG_SRF08 b/baseconfig/CONFIG_SRF08 new file mode 100644 index 000000000..11f5dbcf5 --- /dev/null +++ b/baseconfig/CONFIG_SRF08 @@ -0,0 +1 @@ +# CONFIG_SRF08 is not set diff --git a/baseconfig/CONFIG_STATIC_USERMODEHELPER b/baseconfig/CONFIG_STATIC_USERMODEHELPER new file mode 100644 index 000000000..9cfc00a5f --- /dev/null +++ b/baseconfig/CONFIG_STATIC_USERMODEHELPER @@ -0,0 +1 @@ +# CONFIG_STATIC_USERMODEHELPER is not set diff --git a/baseconfig/CONFIG_TEGRA_GMI b/baseconfig/CONFIG_TEGRA_GMI deleted file mode 100644 index 5def3e891..000000000 --- a/baseconfig/CONFIG_TEGRA_GMI +++ /dev/null @@ -1 +0,0 @@ -CONFIG_TEGRA_GMI=m diff --git a/baseconfig/CONFIG_TEST_PARMAN b/baseconfig/CONFIG_TEST_PARMAN new file mode 100644 index 000000000..2aade4293 --- /dev/null +++ b/baseconfig/CONFIG_TEST_PARMAN @@ -0,0 +1 @@ +# CONFIG_TEST_PARMAN is not set diff --git a/baseconfig/CONFIG_TEST_SORT b/baseconfig/CONFIG_TEST_SORT new file mode 100644 index 000000000..de9e1bbd6 --- /dev/null +++ b/baseconfig/CONFIG_TEST_SORT @@ -0,0 +1 @@ +# CONFIG_TEST_SORT is not set diff --git a/baseconfig/CONFIG_TI_ADS7950 b/baseconfig/CONFIG_TI_ADS7950 new file mode 100644 index 000000000..f2a68954b --- /dev/null +++ b/baseconfig/CONFIG_TI_ADS7950 @@ -0,0 +1 @@ +# CONFIG_TI_ADS7950 is not set diff --git a/baseconfig/CONFIG_TI_TLC4541 b/baseconfig/CONFIG_TI_TLC4541 new file mode 100644 index 000000000..c8c8183fd --- /dev/null +++ b/baseconfig/CONFIG_TI_TLC4541 @@ -0,0 +1 @@ +# CONFIG_TI_TLC4541 is not set diff --git a/baseconfig/CONFIG_TMP007 b/baseconfig/CONFIG_TMP007 new file mode 100644 index 000000000..a3a96d4a8 --- /dev/null +++ b/baseconfig/CONFIG_TMP007 @@ -0,0 +1 @@ +# CONFIG_TMP007 is not set diff --git a/baseconfig/CONFIG_TOUCHSCREEN_ZET6223 b/baseconfig/CONFIG_TOUCHSCREEN_ZET6223 new file mode 100644 index 000000000..134c0c432 --- /dev/null +++ b/baseconfig/CONFIG_TOUCHSCREEN_ZET6223 @@ -0,0 +1 @@ +CONFIG_TOUCHSCREEN_ZET6223=m diff --git a/baseconfig/CONFIG_UPROBE_EVENT b/baseconfig/CONFIG_UPROBE_EVENT deleted file mode 100644 index aba82daa5..000000000 --- a/baseconfig/CONFIG_UPROBE_EVENT +++ /dev/null @@ -1 +0,0 @@ -CONFIG_UPROBE_EVENT=y diff --git a/baseconfig/CONFIG_UPROBE_EVENTS b/baseconfig/CONFIG_UPROBE_EVENTS new file mode 100644 index 000000000..81f7be965 --- /dev/null +++ b/baseconfig/CONFIG_UPROBE_EVENTS @@ -0,0 +1 @@ +CONFIG_UPROBE_EVENTS=y diff --git a/baseconfig/CONFIG_USB_CHIPIDEA_ULPI b/baseconfig/CONFIG_USB_CHIPIDEA_ULPI new file mode 100644 index 000000000..c97b84c79 --- /dev/null +++ b/baseconfig/CONFIG_USB_CHIPIDEA_ULPI @@ -0,0 +1 @@ +# CONFIG_USB_CHIPIDEA_ULPI is not set diff --git a/baseconfig/CONFIG_USB_HUB_USB251XB b/baseconfig/CONFIG_USB_HUB_USB251XB new file mode 100644 index 000000000..26e0d11ae --- /dev/null +++ b/baseconfig/CONFIG_USB_HUB_USB251XB @@ -0,0 +1 @@ +CONFIG_USB_HUB_USB251XB=m diff --git a/baseconfig/CONFIG_USB_SERIAL_UPD78F0730 b/baseconfig/CONFIG_USB_SERIAL_UPD78F0730 new file mode 100644 index 000000000..8258d573c --- /dev/null +++ b/baseconfig/CONFIG_USB_SERIAL_UPD78F0730 @@ -0,0 +1 @@ +CONFIG_USB_SERIAL_UPD78F0730=m diff --git a/baseconfig/CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT b/baseconfig/CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT new file mode 100644 index 000000000..a0a49c839 --- /dev/null +++ b/baseconfig/CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT @@ -0,0 +1 @@ +# CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT is not set diff --git a/baseconfig/CONFIG_VIDEO_IVTV_DEPRECATED_IOCTLS b/baseconfig/CONFIG_VIDEO_IVTV_DEPRECATED_IOCTLS new file mode 100644 index 000000000..b1ad6abff --- /dev/null +++ b/baseconfig/CONFIG_VIDEO_IVTV_DEPRECATED_IOCTLS @@ -0,0 +1 @@ +# CONFIG_VIDEO_IVTV_DEPRECATED_IOCTLS is not set diff --git a/baseconfig/CONFIG_VIDEO_SAMSUNG_S5P_CEC b/baseconfig/CONFIG_VIDEO_SAMSUNG_S5P_CEC deleted file mode 100644 index 67462a76e..000000000 --- a/baseconfig/CONFIG_VIDEO_SAMSUNG_S5P_CEC +++ /dev/null @@ -1 +0,0 @@ -CONFIG_VIDEO_SAMSUNG_S5P_CEC=m diff --git a/baseconfig/CONFIG_VIRTIO_BLK_SCSI b/baseconfig/CONFIG_VIRTIO_BLK_SCSI new file mode 100644 index 000000000..dcc60f529 --- /dev/null +++ b/baseconfig/CONFIG_VIRTIO_BLK_SCSI @@ -0,0 +1 @@ +CONFIG_VIRTIO_BLK_SCSI=y diff --git a/baseconfig/CONFIG_W1_SLAVE_DS2405 b/baseconfig/CONFIG_W1_SLAVE_DS2405 new file mode 100644 index 000000000..16e7dd759 --- /dev/null +++ b/baseconfig/CONFIG_W1_SLAVE_DS2405 @@ -0,0 +1 @@ +CONFIG_W1_SLAVE_DS2405=m diff --git a/baseconfig/CONFIG_WW_MUTEX_SELFTEST b/baseconfig/CONFIG_WW_MUTEX_SELFTEST new file mode 100644 index 000000000..014b2354c --- /dev/null +++ b/baseconfig/CONFIG_WW_MUTEX_SELFTEST @@ -0,0 +1 @@ +# CONFIG_WW_MUTEX_SELFTEST is not set diff --git a/baseconfig/arm/CONFIG_AGP b/baseconfig/arm/CONFIG_AGP deleted file mode 100644 index f7332ef53..000000000 --- a/baseconfig/arm/CONFIG_AGP +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_AGP is not set diff --git a/baseconfig/arm/arm64/CONFIG_COMMON_CLK_MAX77686 b/baseconfig/arm/CONFIG_COMMON_CLK_MAX77686 similarity index 100% rename from baseconfig/arm/arm64/CONFIG_COMMON_CLK_MAX77686 rename to baseconfig/arm/CONFIG_COMMON_CLK_MAX77686 diff --git a/baseconfig/arm/CONFIG_CRYPTO_CHACHA20_NEON b/baseconfig/arm/CONFIG_CRYPTO_CHACHA20_NEON new file mode 100644 index 000000000..c680f1a05 --- /dev/null +++ b/baseconfig/arm/CONFIG_CRYPTO_CHACHA20_NEON @@ -0,0 +1 @@ +CONFIG_CRYPTO_CHACHA20_NEON=m diff --git a/baseconfig/arm/CONFIG_DMA_SUN6I b/baseconfig/arm/CONFIG_DMA_SUN6I new file mode 100644 index 000000000..9c50f4fed --- /dev/null +++ b/baseconfig/arm/CONFIG_DMA_SUN6I @@ -0,0 +1 @@ +# CONFIG_DMA_SUN6I is not set diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MESON b/baseconfig/arm/CONFIG_DRM_MESON similarity index 100% rename from baseconfig/arm/arm64/CONFIG_DRM_MESON rename to baseconfig/arm/CONFIG_DRM_MESON diff --git a/baseconfig/arm/CONFIG_DRM_NXP_PTN3460 b/baseconfig/arm/CONFIG_DRM_NXP_PTN3460 new file mode 100644 index 000000000..e4647af6c --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_NXP_PTN3460 @@ -0,0 +1 @@ +CONFIG_DRM_NXP_PTN3460=m diff --git a/baseconfig/arm/CONFIG_DRM_PARADE_PS8622 b/baseconfig/arm/CONFIG_DRM_PARADE_PS8622 new file mode 100644 index 000000000..ff6fd7e1b --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_PARADE_PS8622 @@ -0,0 +1 @@ +CONFIG_DRM_PARADE_PS8622=m diff --git a/baseconfig/arm/CONFIG_DRM_TINYDRM b/baseconfig/arm/CONFIG_DRM_TINYDRM new file mode 100644 index 000000000..4e6e01bfe --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_TINYDRM @@ -0,0 +1 @@ +CONFIG_DRM_TINYDRM=m diff --git a/baseconfig/arm/CONFIG_DRM_VMWGFX b/baseconfig/arm/CONFIG_DRM_VMWGFX deleted file mode 100644 index 4e22be4d9..000000000 --- a/baseconfig/arm/CONFIG_DRM_VMWGFX +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_DRM_VMWGFX is not set diff --git a/baseconfig/arm/CONFIG_DWMAC_DWC_QOS_ETH b/baseconfig/arm/CONFIG_DWMAC_DWC_QOS_ETH new file mode 100644 index 000000000..6ed7a8e38 --- /dev/null +++ b/baseconfig/arm/CONFIG_DWMAC_DWC_QOS_ETH @@ -0,0 +1 @@ +# CONFIG_DWMAC_DWC_QOS_ETH is not set diff --git a/baseconfig/arm/armv7/CONFIG_DWMAC_GENERIC b/baseconfig/arm/CONFIG_DWMAC_GENERIC similarity index 100% rename from baseconfig/arm/armv7/CONFIG_DWMAC_GENERIC rename to baseconfig/arm/CONFIG_DWMAC_GENERIC diff --git a/baseconfig/arm/CONFIG_DWMAC_IPQ806X b/baseconfig/arm/CONFIG_DWMAC_IPQ806X deleted file mode 100644 index ce2bf0c43..000000000 --- a/baseconfig/arm/CONFIG_DWMAC_IPQ806X +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_DWMAC_IPQ806X is not set diff --git a/baseconfig/arm/CONFIG_HAMRADIO b/baseconfig/arm/CONFIG_HAMRADIO deleted file mode 100644 index 477ae40db..000000000 --- a/baseconfig/arm/CONFIG_HAMRADIO +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_HAMRADIO is not set diff --git a/baseconfig/arm/CONFIG_I2C_TEGRA_BPMP b/baseconfig/arm/CONFIG_I2C_TEGRA_BPMP new file mode 100644 index 000000000..71099e082 --- /dev/null +++ b/baseconfig/arm/CONFIG_I2C_TEGRA_BPMP @@ -0,0 +1 @@ +CONFIG_I2C_TEGRA_BPMP=m diff --git a/baseconfig/arm/armv7/CONFIG_IOMMU_IO_PGTABLE_LPAE b/baseconfig/arm/CONFIG_IOMMU_IO_PGTABLE_LPAE similarity index 100% rename from baseconfig/arm/armv7/CONFIG_IOMMU_IO_PGTABLE_LPAE rename to baseconfig/arm/CONFIG_IOMMU_IO_PGTABLE_LPAE diff --git a/baseconfig/arm/armv7/CONFIG_LEDS_GPIO b/baseconfig/arm/CONFIG_LEDS_GPIO similarity index 100% rename from baseconfig/arm/armv7/CONFIG_LEDS_GPIO rename to baseconfig/arm/CONFIG_LEDS_GPIO diff --git a/baseconfig/arm/armv7/CONFIG_LEDS_GPIO_REGISTER b/baseconfig/arm/CONFIG_LEDS_GPIO_REGISTER similarity index 100% rename from baseconfig/arm/armv7/CONFIG_LEDS_GPIO_REGISTER rename to baseconfig/arm/CONFIG_LEDS_GPIO_REGISTER diff --git a/baseconfig/arm/armv7/CONFIG_LEDS_PWM b/baseconfig/arm/CONFIG_LEDS_PWM similarity index 100% rename from baseconfig/arm/armv7/CONFIG_LEDS_PWM rename to baseconfig/arm/CONFIG_LEDS_PWM diff --git a/baseconfig/arm/armv7/CONFIG_LEDS_SYSCON b/baseconfig/arm/CONFIG_LEDS_SYSCON similarity index 100% rename from baseconfig/arm/armv7/CONFIG_LEDS_SYSCON rename to baseconfig/arm/CONFIG_LEDS_SYSCON diff --git a/baseconfig/arm/armv7/CONFIG_LEDS_TRIGGER_CPU b/baseconfig/arm/CONFIG_LEDS_TRIGGER_CPU similarity index 100% rename from baseconfig/arm/armv7/CONFIG_LEDS_TRIGGER_CPU rename to baseconfig/arm/CONFIG_LEDS_TRIGGER_CPU diff --git a/baseconfig/arm/CONFIG_MESON_SARADC b/baseconfig/arm/CONFIG_MESON_SARADC new file mode 100644 index 000000000..cae134290 --- /dev/null +++ b/baseconfig/arm/CONFIG_MESON_SARADC @@ -0,0 +1 @@ +CONFIG_MESON_SARADC=m diff --git a/baseconfig/arm/armv7/CONFIG_MFD_MAX77686 b/baseconfig/arm/CONFIG_MFD_MAX77686 similarity index 100% rename from baseconfig/arm/armv7/CONFIG_MFD_MAX77686 rename to baseconfig/arm/CONFIG_MFD_MAX77686 diff --git a/baseconfig/arm/CONFIG_MMC_BCM2835 b/baseconfig/arm/CONFIG_MMC_BCM2835 new file mode 100644 index 000000000..b3750c1a7 --- /dev/null +++ b/baseconfig/arm/CONFIG_MMC_BCM2835 @@ -0,0 +1 @@ +CONFIG_MMC_BCM2835=m diff --git a/baseconfig/arm/CONFIG_MTD_PHYSMAP_OF_GEMINI b/baseconfig/arm/CONFIG_MTD_PHYSMAP_OF_GEMINI new file mode 100644 index 000000000..cbc329eea --- /dev/null +++ b/baseconfig/arm/CONFIG_MTD_PHYSMAP_OF_GEMINI @@ -0,0 +1 @@ +# CONFIG_MTD_PHYSMAP_OF_GEMINI is not set diff --git a/baseconfig/arm/armv7/CONFIG_MVPP2 b/baseconfig/arm/CONFIG_MVPP2 similarity index 100% rename from baseconfig/arm/armv7/CONFIG_MVPP2 rename to baseconfig/arm/CONFIG_MVPP2 diff --git a/baseconfig/arm/CONFIG_PHY_QCOM_USB_HS b/baseconfig/arm/CONFIG_PHY_QCOM_USB_HS new file mode 100644 index 000000000..61e98f856 --- /dev/null +++ b/baseconfig/arm/CONFIG_PHY_QCOM_USB_HS @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_USB_HS=m diff --git a/baseconfig/arm/CONFIG_PHY_QCOM_USB_HSIC b/baseconfig/arm/CONFIG_PHY_QCOM_USB_HSIC new file mode 100644 index 000000000..0b25aa233 --- /dev/null +++ b/baseconfig/arm/CONFIG_PHY_QCOM_USB_HSIC @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_USB_HSIC=m diff --git a/baseconfig/arm/CONFIG_PINCTRL_GEMINILAKE b/baseconfig/arm/CONFIG_PINCTRL_GEMINILAKE new file mode 100644 index 000000000..deb3b301d --- /dev/null +++ b/baseconfig/arm/CONFIG_PINCTRL_GEMINILAKE @@ -0,0 +1 @@ +# CONFIG_PINCTRL_GEMINILAKE is not set diff --git a/baseconfig/arm/CONFIG_QCOM_IRQ_COMBINER b/baseconfig/arm/CONFIG_QCOM_IRQ_COMBINER new file mode 100644 index 000000000..6c23d15f7 --- /dev/null +++ b/baseconfig/arm/CONFIG_QCOM_IRQ_COMBINER @@ -0,0 +1 @@ +CONFIG_QCOM_IRQ_COMBINER=y diff --git a/baseconfig/arm/CONFIG_QORIQ_CPUFREQ b/baseconfig/arm/CONFIG_QORIQ_CPUFREQ new file mode 100644 index 000000000..e8e355ba3 --- /dev/null +++ b/baseconfig/arm/CONFIG_QORIQ_CPUFREQ @@ -0,0 +1 @@ +# CONFIG_QORIQ_CPUFREQ is not set diff --git a/baseconfig/arm/armv7/CONFIG_REGULATOR_MAX77686 b/baseconfig/arm/CONFIG_REGULATOR_MAX77686 similarity index 100% rename from baseconfig/arm/armv7/CONFIG_REGULATOR_MAX77686 rename to baseconfig/arm/CONFIG_REGULATOR_MAX77686 diff --git a/baseconfig/arm/armv7/CONFIG_REGULATOR_MAX77802 b/baseconfig/arm/CONFIG_REGULATOR_MAX77802 similarity index 100% rename from baseconfig/arm/armv7/CONFIG_REGULATOR_MAX77802 rename to baseconfig/arm/CONFIG_REGULATOR_MAX77802 diff --git a/baseconfig/arm/CONFIG_REGULATOR_PWM b/baseconfig/arm/CONFIG_REGULATOR_PWM index 654817956..e41417821 100644 --- a/baseconfig/arm/CONFIG_REGULATOR_PWM +++ b/baseconfig/arm/CONFIG_REGULATOR_PWM @@ -1 +1 @@ -CONFIG_REGULATOR_PWM=m +CONFIG_REGULATOR_PWM=y diff --git a/baseconfig/arm/CONFIG_RFKILL_REGULATOR b/baseconfig/arm/CONFIG_RFKILL_REGULATOR deleted file mode 100644 index 64e4c4774..000000000 --- a/baseconfig/arm/CONFIG_RFKILL_REGULATOR +++ /dev/null @@ -1 +0,0 @@ -CONFIG_RFKILL_REGULATOR=m diff --git a/baseconfig/arm/CONFIG_SERIAL_NONSTANDARD b/baseconfig/arm/CONFIG_SERIAL_NONSTANDARD new file mode 100644 index 000000000..57688cbec --- /dev/null +++ b/baseconfig/arm/CONFIG_SERIAL_NONSTANDARD @@ -0,0 +1 @@ +# CONFIG_SERIAL_NONSTANDARD is not set diff --git a/baseconfig/arm/armv7/CONFIG_SND_SOC_AC97_CODEC b/baseconfig/arm/CONFIG_SND_SOC_AC97_CODEC similarity index 100% rename from baseconfig/arm/armv7/CONFIG_SND_SOC_AC97_CODEC rename to baseconfig/arm/CONFIG_SND_SOC_AC97_CODEC diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_ES8328 b/baseconfig/arm/CONFIG_SND_SOC_ES8328 similarity index 100% rename from baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_ES8328 rename to baseconfig/arm/CONFIG_SND_SOC_ES8328 diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_ES8328_I2C b/baseconfig/arm/CONFIG_SND_SOC_ES8328_I2C similarity index 100% rename from baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_ES8328_I2C rename to baseconfig/arm/CONFIG_SND_SOC_ES8328_I2C diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_ES8328_SPI b/baseconfig/arm/CONFIG_SND_SOC_ES8328_SPI similarity index 100% rename from baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_ES8328_SPI rename to baseconfig/arm/CONFIG_SND_SOC_ES8328_SPI diff --git a/baseconfig/arm/CONFIG_SND_SOC_RK3288_HDMI_ANALOG b/baseconfig/arm/CONFIG_SND_SOC_RK3288_HDMI_ANALOG new file mode 100644 index 000000000..8034e86d4 --- /dev/null +++ b/baseconfig/arm/CONFIG_SND_SOC_RK3288_HDMI_ANALOG @@ -0,0 +1 @@ +CONFIG_SND_SOC_RK3288_HDMI_ANALOG=m diff --git a/baseconfig/arm/CONFIG_SND_SOC_RK3399_GRU_SOUND b/baseconfig/arm/CONFIG_SND_SOC_RK3399_GRU_SOUND new file mode 100644 index 000000000..a1f8108ff --- /dev/null +++ b/baseconfig/arm/CONFIG_SND_SOC_RK3399_GRU_SOUND @@ -0,0 +1 @@ +CONFIG_SND_SOC_RK3399_GRU_SOUND=m diff --git a/baseconfig/arm/armv7/lpae/CONFIG_SND_SOC_TEGRA_ALC5632 b/baseconfig/arm/CONFIG_SND_SOC_TEGRA_ALC5632 similarity index 100% rename from baseconfig/arm/armv7/lpae/CONFIG_SND_SOC_TEGRA_ALC5632 rename to baseconfig/arm/CONFIG_SND_SOC_TEGRA_ALC5632 diff --git a/baseconfig/arm/armv7/lpae/CONFIG_SND_SOC_TEGRA_TRIMSLICE b/baseconfig/arm/CONFIG_SND_SOC_TEGRA_TRIMSLICE similarity index 100% rename from baseconfig/arm/armv7/lpae/CONFIG_SND_SOC_TEGRA_TRIMSLICE rename to baseconfig/arm/CONFIG_SND_SOC_TEGRA_TRIMSLICE diff --git a/baseconfig/arm/armv7/lpae/CONFIG_SND_SOC_TEGRA_WM8903 b/baseconfig/arm/CONFIG_SND_SOC_TEGRA_WM8903 similarity index 100% rename from baseconfig/arm/armv7/lpae/CONFIG_SND_SOC_TEGRA_WM8903 rename to baseconfig/arm/CONFIG_SND_SOC_TEGRA_WM8903 diff --git a/baseconfig/arm/armv7/lpae/CONFIG_SND_SOC_TEGRA_WM9712 b/baseconfig/arm/CONFIG_SND_SOC_TEGRA_WM9712 similarity index 100% rename from baseconfig/arm/armv7/lpae/CONFIG_SND_SOC_TEGRA_WM9712 rename to baseconfig/arm/CONFIG_SND_SOC_TEGRA_WM9712 diff --git a/baseconfig/arm/armv7/CONFIG_SND_SOC_TS3A227E b/baseconfig/arm/CONFIG_SND_SOC_TS3A227E similarity index 100% rename from baseconfig/arm/armv7/CONFIG_SND_SOC_TS3A227E rename to baseconfig/arm/CONFIG_SND_SOC_TS3A227E diff --git a/baseconfig/arm/armv7/CONFIG_STMMAC_PLATFORM b/baseconfig/arm/CONFIG_STMMAC_PLATFORM similarity index 100% rename from baseconfig/arm/armv7/CONFIG_STMMAC_PLATFORM rename to baseconfig/arm/CONFIG_STMMAC_PLATFORM diff --git a/baseconfig/CONFIG_SUN50I_A64_CCU b/baseconfig/arm/CONFIG_SUN50I_A64_CCU similarity index 100% rename from baseconfig/CONFIG_SUN50I_A64_CCU rename to baseconfig/arm/CONFIG_SUN50I_A64_CCU diff --git a/baseconfig/arm/CONFIG_SUN5I_CCU b/baseconfig/arm/CONFIG_SUN5I_CCU new file mode 100644 index 000000000..26856d6b2 --- /dev/null +++ b/baseconfig/arm/CONFIG_SUN5I_CCU @@ -0,0 +1 @@ +# CONFIG_SUN5I_CCU is not set diff --git a/baseconfig/CONFIG_SUN6I_A31_CCU b/baseconfig/arm/CONFIG_SUN6I_A31_CCU similarity index 100% rename from baseconfig/CONFIG_SUN6I_A31_CCU rename to baseconfig/arm/CONFIG_SUN6I_A31_CCU diff --git a/baseconfig/CONFIG_SUN8I_A23_CCU b/baseconfig/arm/CONFIG_SUN8I_A23_CCU similarity index 100% rename from baseconfig/CONFIG_SUN8I_A23_CCU rename to baseconfig/arm/CONFIG_SUN8I_A23_CCU diff --git a/baseconfig/CONFIG_SUN8I_A33_CCU b/baseconfig/arm/CONFIG_SUN8I_A33_CCU similarity index 100% rename from baseconfig/CONFIG_SUN8I_A33_CCU rename to baseconfig/arm/CONFIG_SUN8I_A33_CCU diff --git a/baseconfig/arm/CONFIG_SUN8I_H3_CCU b/baseconfig/arm/CONFIG_SUN8I_H3_CCU new file mode 100644 index 000000000..02cfb2c97 --- /dev/null +++ b/baseconfig/arm/CONFIG_SUN8I_H3_CCU @@ -0,0 +1 @@ +# CONFIG_SUN8I_H3_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN8I_V3S_CCU b/baseconfig/arm/CONFIG_SUN8I_V3S_CCU new file mode 100644 index 000000000..da333f583 --- /dev/null +++ b/baseconfig/arm/CONFIG_SUN8I_V3S_CCU @@ -0,0 +1 @@ +# CONFIG_SUN8I_V3S_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN9I_A80_CCU b/baseconfig/arm/CONFIG_SUN9I_A80_CCU new file mode 100644 index 000000000..82686b27e --- /dev/null +++ b/baseconfig/arm/CONFIG_SUN9I_A80_CCU @@ -0,0 +1 @@ +# CONFIG_SUN9I_A80_CCU is not set diff --git a/baseconfig/CONFIG_SUNXI_CCU b/baseconfig/arm/CONFIG_SUNXI_CCU similarity index 100% rename from baseconfig/CONFIG_SUNXI_CCU rename to baseconfig/arm/CONFIG_SUNXI_CCU diff --git a/baseconfig/arm/CONFIG_SYSCON_REBOOT_MODE b/baseconfig/arm/CONFIG_SYSCON_REBOOT_MODE new file mode 100644 index 000000000..b391f88cb --- /dev/null +++ b/baseconfig/arm/CONFIG_SYSCON_REBOOT_MODE @@ -0,0 +1 @@ +CONFIG_SYSCON_REBOOT_MODE=y diff --git a/baseconfig/arm/CONFIG_TINYDRM_MI0283QT b/baseconfig/arm/CONFIG_TINYDRM_MI0283QT new file mode 100644 index 000000000..98bb3288d --- /dev/null +++ b/baseconfig/arm/CONFIG_TINYDRM_MI0283QT @@ -0,0 +1 @@ +CONFIG_TINYDRM_MI0283QT=m diff --git a/baseconfig/arm/CONFIG_TINYDRM_MIPI_DBI b/baseconfig/arm/CONFIG_TINYDRM_MIPI_DBI new file mode 100644 index 000000000..bb0235842 --- /dev/null +++ b/baseconfig/arm/CONFIG_TINYDRM_MIPI_DBI @@ -0,0 +1 @@ +CONFIG_TINYDRM_MIPI_DBI=m diff --git a/baseconfig/arm/arm64/CONFIG_ARCH_MESON b/baseconfig/arm/arm64/CONFIG_ARCH_MESON deleted file mode 100644 index 849319f60..000000000 --- a/baseconfig/arm/arm64/CONFIG_ARCH_MESON +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_ARCH_MESON is not set diff --git a/baseconfig/arm/arm64/CONFIG_ARCH_THUNDER2 b/baseconfig/arm/arm64/CONFIG_ARCH_THUNDER2 new file mode 100644 index 000000000..aa0f1f319 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_ARCH_THUNDER2 @@ -0,0 +1 @@ +CONFIG_ARCH_THUNDER2=y diff --git a/baseconfig/arm/arm64/CONFIG_ARM64_4K_PAGES b/baseconfig/arm/arm64/CONFIG_ARM64_4K_PAGES new file mode 100644 index 000000000..5df91df1a --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_ARM64_4K_PAGES @@ -0,0 +1 @@ +CONFIG_ARM64_4K_PAGES=y diff --git a/baseconfig/arm/arm64/CONFIG_ARM64_64K_PAGES b/baseconfig/arm/arm64/CONFIG_ARM64_64K_PAGES deleted file mode 100644 index bda5426de..000000000 --- a/baseconfig/arm/arm64/CONFIG_ARM64_64K_PAGES +++ /dev/null @@ -1 +0,0 @@ -CONFIG_ARM64_64K_PAGES=y diff --git a/baseconfig/arm/arm64/CONFIG_ARMADA_AP806_SYSCON b/baseconfig/arm/arm64/CONFIG_ARMADA_AP806_SYSCON new file mode 100644 index 000000000..c0741cab5 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_ARMADA_AP806_SYSCON @@ -0,0 +1 @@ +CONFIG_ARMADA_AP806_SYSCON=y diff --git a/baseconfig/arm/arm64/CONFIG_CAVIUM_CPT b/baseconfig/arm/arm64/CONFIG_CAVIUM_CPT new file mode 100644 index 000000000..183805687 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_CAVIUM_CPT @@ -0,0 +1 @@ +CONFIG_CAVIUM_CPT=m diff --git a/baseconfig/arm/arm64/CONFIG_CHARGER_AXP20X b/baseconfig/arm/arm64/CONFIG_CHARGER_AXP20X new file mode 100644 index 000000000..2e64e7733 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_CHARGER_AXP20X @@ -0,0 +1 @@ +CONFIG_CHARGER_AXP20X=m diff --git a/baseconfig/CONFIG_COMMON_CLK_HI3516CV300 b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI3516CV300 similarity index 100% rename from baseconfig/CONFIG_COMMON_CLK_HI3516CV300 rename to baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI3516CV300 diff --git a/baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI3519 b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI3519 new file mode 100644 index 000000000..5484a59ba --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI3519 @@ -0,0 +1 @@ +CONFIG_COMMON_CLK_HI3519=m diff --git a/baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI3660 b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI3660 new file mode 100644 index 000000000..44693544d --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI3660 @@ -0,0 +1 @@ +CONFIG_COMMON_CLK_HI3660=y diff --git a/baseconfig/CONFIG_COMMON_CLK_HI3798CV200 b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI3798CV200 similarity index 100% rename from baseconfig/CONFIG_COMMON_CLK_HI3798CV200 rename to baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI3798CV200 diff --git a/baseconfig/arm/arm64/CONFIG_COMMON_CLK_PWM b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_PWM new file mode 100644 index 000000000..08193dd2c --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_PWM @@ -0,0 +1 @@ +CONFIG_COMMON_CLK_PWM=m diff --git a/baseconfig/arm/arm64/CONFIG_COMPAT b/baseconfig/arm/arm64/CONFIG_COMPAT new file mode 100644 index 000000000..3e041f1b6 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_COMPAT @@ -0,0 +1 @@ +# CONFIG_COMPAT is not set diff --git a/baseconfig/arm/arm64/CONFIG_CRYPTO_AES_ARM64 b/baseconfig/arm/arm64/CONFIG_CRYPTO_AES_ARM64 new file mode 100644 index 000000000..113c72b8c --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_CRYPTO_AES_ARM64 @@ -0,0 +1 @@ +CONFIG_CRYPTO_AES_ARM64=m diff --git a/baseconfig/arm/arm64/CONFIG_CRYPTO_AES_ARM64_BS b/baseconfig/arm/arm64/CONFIG_CRYPTO_AES_ARM64_BS new file mode 100644 index 000000000..6e0427353 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_CRYPTO_AES_ARM64_BS @@ -0,0 +1 @@ +CONFIG_CRYPTO_AES_ARM64_BS=m diff --git a/baseconfig/arm/arm64/CONFIG_DEBUG_EFI b/baseconfig/arm/arm64/CONFIG_DEBUG_EFI new file mode 100644 index 000000000..68b7b8a1e --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DEBUG_EFI @@ -0,0 +1 @@ +# CONFIG_DEBUG_EFI is not set diff --git a/baseconfig/arm/arm64/CONFIG_DWMAC_IPQ806X b/baseconfig/arm/arm64/CONFIG_DWMAC_IPQ806X new file mode 100644 index 000000000..49177a6db --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DWMAC_IPQ806X @@ -0,0 +1 @@ +CONFIG_DWMAC_IPQ806X=m diff --git a/baseconfig/arm/arm64/CONFIG_DWMAC_SUN8I b/baseconfig/arm/arm64/CONFIG_DWMAC_SUN8I new file mode 100644 index 000000000..ce05f93b3 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DWMAC_SUN8I @@ -0,0 +1 @@ +CONFIG_DWMAC_SUN8I=m diff --git a/baseconfig/arm/arm64/CONFIG_DWMAC_SUNXI b/baseconfig/arm/arm64/CONFIG_DWMAC_SUNXI new file mode 100644 index 000000000..254fc7d8a --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DWMAC_SUNXI @@ -0,0 +1 @@ +CONFIG_DWMAC_SUNXI=m diff --git a/baseconfig/arm/arm64/CONFIG_FORCE_MAX_ZONEORDER b/baseconfig/arm/arm64/CONFIG_FORCE_MAX_ZONEORDER new file mode 100644 index 000000000..6d42a47fc --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_FORCE_MAX_ZONEORDER @@ -0,0 +1 @@ +CONFIG_FORCE_MAX_ZONEORDER=13 diff --git a/baseconfig/arm/arm64/CONFIG_HISILICON_ERRATUM_161010101 b/baseconfig/arm/arm64/CONFIG_HISILICON_ERRATUM_161010101 new file mode 100644 index 000000000..b5914254a --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_HISILICON_ERRATUM_161010101 @@ -0,0 +1 @@ +CONFIG_HISILICON_ERRATUM_161010101=y diff --git a/baseconfig/CONFIG_MFD_SUN4I_GPADC b/baseconfig/arm/arm64/CONFIG_MFD_SUN4I_GPADC similarity index 100% rename from baseconfig/CONFIG_MFD_SUN4I_GPADC rename to baseconfig/arm/arm64/CONFIG_MFD_SUN4I_GPADC diff --git a/baseconfig/arm/arm64/CONFIG_PHY_SUN4I_USB b/baseconfig/arm/arm64/CONFIG_PHY_SUN4I_USB index a6a26dd17..f619228c3 100644 --- a/baseconfig/arm/arm64/CONFIG_PHY_SUN4I_USB +++ b/baseconfig/arm/arm64/CONFIG_PHY_SUN4I_USB @@ -1 +1 @@ -# CONFIG_PHY_SUN4I_USB is not set +CONFIG_PHY_SUN4I_USB=m diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_FALKOR_ERRATUM_1003 b/baseconfig/arm/arm64/CONFIG_QCOM_FALKOR_ERRATUM_1003 new file mode 100644 index 000000000..94d6b177a --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_QCOM_FALKOR_ERRATUM_1003 @@ -0,0 +1 @@ +# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_FALKOR_ERRATUM_1009 b/baseconfig/arm/arm64/CONFIG_QCOM_FALKOR_ERRATUM_1009 new file mode 100644 index 000000000..1449efafb --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_QCOM_FALKOR_ERRATUM_1009 @@ -0,0 +1 @@ +CONFIG_QCOM_FALKOR_ERRATUM_1009=y diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_L2_PMU b/baseconfig/arm/arm64/CONFIG_QCOM_L2_PMU new file mode 100644 index 000000000..2a553c8b1 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_QCOM_L2_PMU @@ -0,0 +1 @@ +CONFIG_QCOM_L2_PMU=y diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_QDF2400_ERRATUM_0065 b/baseconfig/arm/arm64/CONFIG_QCOM_QDF2400_ERRATUM_0065 new file mode 100644 index 000000000..dec9be970 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_QCOM_QDF2400_ERRATUM_0065 @@ -0,0 +1 @@ +CONFIG_QCOM_QDF2400_ERRATUM_0065=y diff --git a/baseconfig/arm/arm64/CONFIG_SATA_AHCI_PLATFORM b/baseconfig/arm/arm64/CONFIG_SATA_AHCI_PLATFORM deleted file mode 100644 index f4729baed..000000000 --- a/baseconfig/arm/arm64/CONFIG_SATA_AHCI_PLATFORM +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SATA_AHCI_PLATFORM=y diff --git a/baseconfig/arm/arm64/CONFIG_SND_KIRKWOOD_SOC b/baseconfig/arm/arm64/CONFIG_SND_KIRKWOOD_SOC new file mode 100644 index 000000000..05e82f2e9 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SND_KIRKWOOD_SOC @@ -0,0 +1 @@ +# CONFIG_SND_KIRKWOOD_SOC is not set diff --git a/baseconfig/arm/arm64/CONFIG_SND_SOC b/baseconfig/arm/arm64/CONFIG_SND_SOC deleted file mode 100644 index a161b8e18..000000000 --- a/baseconfig/arm/arm64/CONFIG_SND_SOC +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SND_SOC is not set diff --git a/baseconfig/arm/arm64/CONFIG_SND_SOC_APQ8016_SBC b/baseconfig/arm/arm64/CONFIG_SND_SOC_APQ8016_SBC new file mode 100644 index 000000000..dfe53b84d --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SND_SOC_APQ8016_SBC @@ -0,0 +1 @@ +CONFIG_SND_SOC_APQ8016_SBC=m diff --git a/baseconfig/arm/arm64/CONFIG_SND_SOC_QCOM b/baseconfig/arm/arm64/CONFIG_SND_SOC_QCOM new file mode 100644 index 000000000..719eb4e3d --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SND_SOC_QCOM @@ -0,0 +1 @@ +CONFIG_SND_SOC_QCOM=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_SGTL5000 b/baseconfig/arm/arm64/CONFIG_SND_SOC_SGTL5000 similarity index 100% rename from baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_SGTL5000 rename to baseconfig/arm/arm64/CONFIG_SND_SOC_SGTL5000 diff --git a/baseconfig/arm/arm64/CONFIG_SND_SOC_STORM b/baseconfig/arm/arm64/CONFIG_SND_SOC_STORM new file mode 100644 index 000000000..adab3ae82 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SND_SOC_STORM @@ -0,0 +1 @@ +# CONFIG_SND_SOC_STORM is not set diff --git a/baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA b/baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA new file mode 100644 index 000000000..b32a04ff3 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA @@ -0,0 +1 @@ +CONFIG_SND_SOC_TEGRA=m diff --git a/baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA_MAX98090 b/baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA_MAX98090 new file mode 100644 index 000000000..55f327a38 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA_MAX98090 @@ -0,0 +1 @@ +CONFIG_SND_SOC_TEGRA_MAX98090=m diff --git a/baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA_RT5640 b/baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA_RT5640 new file mode 100644 index 000000000..3370b8ec2 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA_RT5640 @@ -0,0 +1 @@ +CONFIG_SND_SOC_TEGRA_RT5640=m diff --git a/baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA_RT5677 b/baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA_RT5677 new file mode 100644 index 000000000..24298d93b --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA_RT5677 @@ -0,0 +1 @@ +CONFIG_SND_SOC_TEGRA_RT5677=m diff --git a/baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA_SGTL5000 b/baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA_SGTL5000 new file mode 100644 index 000000000..4706a31c1 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA_SGTL5000 @@ -0,0 +1 @@ +CONFIG_SND_SOC_TEGRA_SGTL5000=m diff --git a/baseconfig/arm/armv7/lpae/CONFIG_SND_SOC_TEGRA_WM8753 b/baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA_WM8753 similarity index 100% rename from baseconfig/arm/armv7/lpae/CONFIG_SND_SOC_TEGRA_WM8753 rename to baseconfig/arm/arm64/CONFIG_SND_SOC_TEGRA_WM8753 diff --git a/baseconfig/arm/arm64/CONFIG_SND_SUN4I_I2S b/baseconfig/arm/arm64/CONFIG_SND_SUN4I_I2S new file mode 100644 index 000000000..d9270e25b --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SND_SUN4I_I2S @@ -0,0 +1 @@ +CONFIG_SND_SUN4I_I2S=m diff --git a/baseconfig/arm/arm64/CONFIG_SND_SUN4I_SPDIF b/baseconfig/arm/arm64/CONFIG_SND_SUN4I_SPDIF new file mode 100644 index 000000000..c0b108aba --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SND_SUN4I_SPDIF @@ -0,0 +1 @@ +CONFIG_SND_SUN4I_SPDIF=m diff --git a/baseconfig/arm/arm64/CONFIG_SND_SUN8I_CODEC b/baseconfig/arm/arm64/CONFIG_SND_SUN8I_CODEC new file mode 100644 index 000000000..c30f94369 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SND_SUN8I_CODEC @@ -0,0 +1 @@ +CONFIG_SND_SUN8I_CODEC=m diff --git a/baseconfig/CONFIG_SND_SUN8I_CODEC_ANALOG b/baseconfig/arm/arm64/CONFIG_SND_SUN8I_CODEC_ANALOG similarity index 100% rename from baseconfig/CONFIG_SND_SUN8I_CODEC_ANALOG rename to baseconfig/arm/arm64/CONFIG_SND_SUN8I_CODEC_ANALOG diff --git a/baseconfig/arm/arm64/CONFIG_SUN50I_A64_CCU b/baseconfig/arm/arm64/CONFIG_SUN50I_A64_CCU new file mode 100644 index 000000000..7b6c7a687 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SUN50I_A64_CCU @@ -0,0 +1 @@ +CONFIG_SUN50I_A64_CCU=y diff --git a/baseconfig/arm/arm64/CONFIG_SUN8I_EMAC b/baseconfig/arm/arm64/CONFIG_SUN8I_EMAC deleted file mode 100644 index 1b91ca143..000000000 --- a/baseconfig/arm/arm64/CONFIG_SUN8I_EMAC +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SUN8I_EMAC=m diff --git a/baseconfig/CONFIG_TEGRA_IVC b/baseconfig/arm/arm64/CONFIG_TEGRA_IVC similarity index 100% rename from baseconfig/CONFIG_TEGRA_IVC rename to baseconfig/arm/arm64/CONFIG_TEGRA_IVC diff --git a/baseconfig/arm/arm64/CONFIG_VDSO b/baseconfig/arm/arm64/CONFIG_VDSO new file mode 100644 index 000000000..cab5ebafb --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_VDSO @@ -0,0 +1 @@ +CONFIG_VDSO=y diff --git a/baseconfig/arm/armv7/CONFIG_ARCH_MESON b/baseconfig/arm/armv7/CONFIG_ARCH_MESON deleted file mode 100644 index 849319f60..000000000 --- a/baseconfig/arm/armv7/CONFIG_ARCH_MESON +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_ARCH_MESON is not set diff --git a/baseconfig/arm/armv7/CONFIG_CHARGER_AXP20X b/baseconfig/arm/armv7/CONFIG_CHARGER_AXP20X new file mode 100644 index 000000000..2e64e7733 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_CHARGER_AXP20X @@ -0,0 +1 @@ +CONFIG_CHARGER_AXP20X=m diff --git a/baseconfig/arm/armv7/CONFIG_COMMON_CLK_MAX77686 b/baseconfig/arm/armv7/CONFIG_COMMON_CLK_MAX77686 deleted file mode 100644 index 71ba0b45c..000000000 --- a/baseconfig/arm/armv7/CONFIG_COMMON_CLK_MAX77686 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_COMMON_CLK_MAX77686=m diff --git a/baseconfig/arm/armv7/CONFIG_DEBUG_RODATA b/baseconfig/arm/armv7/CONFIG_DEBUG_RODATA deleted file mode 100644 index 8b3ba9432..000000000 --- a/baseconfig/arm/armv7/CONFIG_DEBUG_RODATA +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_DEBUG_RODATA is not set diff --git a/baseconfig/arm/armv7/CONFIG_DRM_MESON b/baseconfig/arm/armv7/CONFIG_DRM_MESON deleted file mode 100644 index 7a6179102..000000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_MESON +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_DRM_MESON is not set diff --git a/baseconfig/arm/armv7/CONFIG_DRM_STI b/baseconfig/arm/armv7/CONFIG_DRM_STI index 008714f93..d16e09b9b 100644 --- a/baseconfig/arm/armv7/CONFIG_DRM_STI +++ b/baseconfig/arm/armv7/CONFIG_DRM_STI @@ -1 +1 @@ -# CONFIG_DRM_STI is not set +CONFIG_DRM_STI=m diff --git a/baseconfig/arm/armv7/CONFIG_DWMAC_SUN8I b/baseconfig/arm/armv7/CONFIG_DWMAC_SUN8I new file mode 100644 index 000000000..ce05f93b3 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_DWMAC_SUN8I @@ -0,0 +1 @@ +CONFIG_DWMAC_SUN8I=m diff --git a/baseconfig/arm/CONFIG_FORCE_MAX_ZONEORDER b/baseconfig/arm/armv7/CONFIG_FORCE_MAX_ZONEORDER similarity index 100% rename from baseconfig/arm/CONFIG_FORCE_MAX_ZONEORDER rename to baseconfig/arm/armv7/CONFIG_FORCE_MAX_ZONEORDER diff --git a/baseconfig/arm/armv7/CONFIG_GPIO_EM b/baseconfig/arm/armv7/CONFIG_GPIO_EM deleted file mode 100644 index 175c5778a..000000000 --- a/baseconfig/arm/armv7/CONFIG_GPIO_EM +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_GPIO_EM is not set diff --git a/baseconfig/arm/armv7/CONFIG_IIO_CROS_EC_BARO b/baseconfig/arm/armv7/CONFIG_IIO_CROS_EC_BARO new file mode 100644 index 000000000..7b38ce09b --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_IIO_CROS_EC_BARO @@ -0,0 +1 @@ +# CONFIG_IIO_CROS_EC_BARO is not set diff --git a/baseconfig/arm/armv7/CONFIG_MACH_MESON6 b/baseconfig/arm/armv7/CONFIG_MACH_MESON6 new file mode 100644 index 000000000..aff440cc5 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_MACH_MESON6 @@ -0,0 +1 @@ +# CONFIG_MACH_MESON6 is not set diff --git a/baseconfig/arm/armv7/CONFIG_MACH_MESON8 b/baseconfig/arm/armv7/CONFIG_MACH_MESON8 new file mode 100644 index 000000000..e55c72211 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_MACH_MESON8 @@ -0,0 +1 @@ +# CONFIG_MACH_MESON8 is not set diff --git a/baseconfig/arm/armv7/CONFIG_MACH_MESON8B b/baseconfig/arm/armv7/CONFIG_MACH_MESON8B new file mode 100644 index 000000000..5212d2aca --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_MACH_MESON8B @@ -0,0 +1 @@ +CONFIG_MACH_MESON8B=y diff --git a/baseconfig/arm/CONFIG_MFD_SUN4I_GPADC b/baseconfig/arm/armv7/CONFIG_MFD_SUN4I_GPADC similarity index 100% rename from baseconfig/arm/CONFIG_MFD_SUN4I_GPADC rename to baseconfig/arm/armv7/CONFIG_MFD_SUN4I_GPADC diff --git a/baseconfig/arm/armv7/CONFIG_PATA_PLATFORM b/baseconfig/arm/armv7/CONFIG_PATA_PLATFORM deleted file mode 100644 index e385815ec..000000000 --- a/baseconfig/arm/armv7/CONFIG_PATA_PLATFORM +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PATA_PLATFORM is not set diff --git a/baseconfig/arm/armv7/CONFIG_PHY_EXYNOS_PCIE b/baseconfig/arm/armv7/CONFIG_PHY_EXYNOS_PCIE new file mode 100644 index 000000000..26417e932 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_PHY_EXYNOS_PCIE @@ -0,0 +1 @@ +CONFIG_PHY_EXYNOS_PCIE=y diff --git a/baseconfig/arm/armv7/CONFIG_ROCKCHIP_CDN_DP b/baseconfig/arm/armv7/CONFIG_ROCKCHIP_CDN_DP new file mode 100644 index 000000000..98a696d76 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_ROCKCHIP_CDN_DP @@ -0,0 +1 @@ +# CONFIG_ROCKCHIP_CDN_DP is not set diff --git a/baseconfig/arm/armv7/CONFIG_RPMSG_CHAR b/baseconfig/arm/armv7/CONFIG_RPMSG_CHAR new file mode 100644 index 000000000..3aa998906 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_RPMSG_CHAR @@ -0,0 +1 @@ +# CONFIG_RPMSG_CHAR is not set diff --git a/baseconfig/arm/armv7/CONFIG_SERIAL_ST_ASC b/baseconfig/arm/armv7/CONFIG_SERIAL_ST_ASC new file mode 100644 index 000000000..9ac7f69ac --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SERIAL_ST_ASC @@ -0,0 +1 @@ +CONFIG_SERIAL_ST_ASC=y diff --git a/baseconfig/arm/armv7/CONFIG_SERIAL_ST_ASC_CONSOLE b/baseconfig/arm/armv7/CONFIG_SERIAL_ST_ASC_CONSOLE new file mode 100644 index 000000000..4f7f87761 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SERIAL_ST_ASC_CONSOLE @@ -0,0 +1 @@ +CONFIG_SERIAL_ST_ASC_CONSOLE=y diff --git a/baseconfig/arm/armv7/CONFIG_SND_SOC_RK3399_GRU_SOUND b/baseconfig/arm/armv7/CONFIG_SND_SOC_RK3399_GRU_SOUND deleted file mode 100644 index 6897e6b54..000000000 --- a/baseconfig/arm/armv7/CONFIG_SND_SOC_RK3399_GRU_SOUND +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SND_SOC_RK3399_GRU_SOUND is not set diff --git a/baseconfig/arm/armv7/CONFIG_SND_SOC_SGTL5000 b/baseconfig/arm/armv7/CONFIG_SND_SOC_SGTL5000 new file mode 100644 index 000000000..ea71dece1 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SND_SOC_SGTL5000 @@ -0,0 +1 @@ +CONFIG_SND_SOC_SGTL5000=m diff --git a/baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA_SGTL5000 b/baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA_SGTL5000 index b3214101c..4706a31c1 100644 --- a/baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA_SGTL5000 +++ b/baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA_SGTL5000 @@ -1 +1 @@ -# CONFIG_SND_SOC_TEGRA_SGTL5000 is not set +CONFIG_SND_SOC_TEGRA_SGTL5000=m diff --git a/baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA_WM8753 b/baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA_WM8753 new file mode 100644 index 000000000..9039b1695 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA_WM8753 @@ -0,0 +1 @@ +# CONFIG_SND_SOC_TEGRA_WM8753 is not set diff --git a/baseconfig/arm/armv7/CONFIG_SND_SUN8I_CODEC b/baseconfig/arm/armv7/CONFIG_SND_SUN8I_CODEC new file mode 100644 index 000000000..c30f94369 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SND_SUN8I_CODEC @@ -0,0 +1 @@ +CONFIG_SND_SUN8I_CODEC=m diff --git a/baseconfig/arm/CONFIG_SND_SUN8I_CODEC_ANALOG b/baseconfig/arm/armv7/CONFIG_SND_SUN8I_CODEC_ANALOG similarity index 100% rename from baseconfig/arm/CONFIG_SND_SUN8I_CODEC_ANALOG rename to baseconfig/arm/armv7/CONFIG_SND_SUN8I_CODEC_ANALOG diff --git a/baseconfig/arm/armv7/CONFIG_SPI_PXA2XX b/baseconfig/arm/armv7/CONFIG_SPI_PXA2XX deleted file mode 100644 index 266e686b8..000000000 --- a/baseconfig/arm/armv7/CONFIG_SPI_PXA2XX +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SPI_PXA2XX is not set diff --git a/baseconfig/arm/armv7/CONFIG_STRICT_KERNEL_RWX b/baseconfig/arm/armv7/CONFIG_STRICT_KERNEL_RWX new file mode 100644 index 000000000..8c57b454a --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_STRICT_KERNEL_RWX @@ -0,0 +1 @@ +CONFIG_STRICT_KERNEL_RWX=y diff --git a/baseconfig/arm/armv7/CONFIG_STRICT_MODULE_RWX b/baseconfig/arm/armv7/CONFIG_STRICT_MODULE_RWX new file mode 100644 index 000000000..2f1f100d7 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_STRICT_MODULE_RWX @@ -0,0 +1 @@ +CONFIG_STRICT_MODULE_RWX=y diff --git a/baseconfig/arm/armv7/CONFIG_SUN5I_CCU b/baseconfig/arm/armv7/CONFIG_SUN5I_CCU new file mode 100644 index 000000000..7001f3dd4 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SUN5I_CCU @@ -0,0 +1 @@ +CONFIG_SUN5I_CCU=y diff --git a/baseconfig/arm/armv7/CONFIG_SUN6I_A31_CCU b/baseconfig/arm/armv7/CONFIG_SUN6I_A31_CCU new file mode 100644 index 000000000..7bf2b1a47 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SUN6I_A31_CCU @@ -0,0 +1 @@ +CONFIG_SUN6I_A31_CCU=y diff --git a/baseconfig/arm/armv7/CONFIG_SUN8I_A23_CCU b/baseconfig/arm/armv7/CONFIG_SUN8I_A23_CCU new file mode 100644 index 000000000..46d0fa87e --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SUN8I_A23_CCU @@ -0,0 +1 @@ +CONFIG_SUN8I_A23_CCU=y diff --git a/baseconfig/arm/armv7/CONFIG_SUN8I_A33_CCU b/baseconfig/arm/armv7/CONFIG_SUN8I_A33_CCU new file mode 100644 index 000000000..907c87d04 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SUN8I_A33_CCU @@ -0,0 +1 @@ +CONFIG_SUN8I_A33_CCU=y diff --git a/baseconfig/arm/armv7/CONFIG_SUN8I_EMAC b/baseconfig/arm/armv7/CONFIG_SUN8I_EMAC deleted file mode 100644 index 1b91ca143..000000000 --- a/baseconfig/arm/armv7/CONFIG_SUN8I_EMAC +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SUN8I_EMAC=m diff --git a/baseconfig/arm/armv7/CONFIG_SUN8I_V3S_CCU b/baseconfig/arm/armv7/CONFIG_SUN8I_V3S_CCU new file mode 100644 index 000000000..030c5de49 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SUN8I_V3S_CCU @@ -0,0 +1 @@ +CONFIG_SUN8I_V3S_CCU=y diff --git a/baseconfig/arm/armv7/CONFIG_SUN9I_A80_CCU b/baseconfig/arm/armv7/CONFIG_SUN9I_A80_CCU new file mode 100644 index 000000000..d203816e6 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SUN9I_A80_CCU @@ -0,0 +1 @@ +CONFIG_SUN9I_A80_CCU=y diff --git a/baseconfig/arm/armv7/CONFIG_TEGRA_IVC b/baseconfig/arm/armv7/CONFIG_TEGRA_IVC new file mode 100644 index 000000000..cdcacbec2 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_TEGRA_IVC @@ -0,0 +1 @@ +CONFIG_TEGRA_IVC=y diff --git a/baseconfig/arm/armv7/CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS b/baseconfig/arm/armv7/CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS index 2602e3b97..65db40667 100644 --- a/baseconfig/arm/armv7/CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS +++ b/baseconfig/arm/armv7/CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS @@ -1 +1 @@ -CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS=y +CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_AHCI_ST b/baseconfig/arm/armv7/armv7/CONFIG_AHCI_ST new file mode 100644 index 000000000..975ecd425 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_AHCI_ST @@ -0,0 +1 @@ +CONFIG_AHCI_ST=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_ARCH_STI b/baseconfig/arm/armv7/armv7/CONFIG_ARCH_STI new file mode 100644 index 000000000..7a253ecf5 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_ARCH_STI @@ -0,0 +1 @@ +CONFIG_ARCH_STI=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_ARM_STI_CPUFREQ b/baseconfig/arm/armv7/armv7/CONFIG_ARM_STI_CPUFREQ new file mode 100644 index 000000000..0e26a51f0 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_ARM_STI_CPUFREQ @@ -0,0 +1 @@ +CONFIG_ARM_STI_CPUFREQ=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_ARM_TI_CPUFREQ b/baseconfig/arm/armv7/armv7/CONFIG_ARM_TI_CPUFREQ new file mode 100644 index 000000000..ca125040d --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_ARM_TI_CPUFREQ @@ -0,0 +1 @@ +CONFIG_ARM_TI_CPUFREQ=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DWMAC_IPQ806X b/baseconfig/arm/armv7/armv7/CONFIG_DWMAC_IPQ806X new file mode 100644 index 000000000..49177a6db --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DWMAC_IPQ806X @@ -0,0 +1 @@ +CONFIG_DWMAC_IPQ806X=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DWMAC_STI b/baseconfig/arm/armv7/armv7/CONFIG_DWMAC_STI new file mode 100644 index 000000000..b0da5ddbc --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DWMAC_STI @@ -0,0 +1 @@ +CONFIG_DWMAC_STI=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_HW_RANDOM_ST b/baseconfig/arm/armv7/armv7/CONFIG_HW_RANDOM_ST new file mode 100644 index 000000000..e908df516 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_HW_RANDOM_ST @@ -0,0 +1 @@ +CONFIG_HW_RANDOM_ST=m diff --git a/baseconfig/CONFIG_I2C_IMX_LPI2C b/baseconfig/arm/armv7/armv7/CONFIG_I2C_IMX_LPI2C similarity index 100% rename from baseconfig/CONFIG_I2C_IMX_LPI2C rename to baseconfig/arm/armv7/armv7/CONFIG_I2C_IMX_LPI2C diff --git a/baseconfig/arm/armv7/armv7/CONFIG_I2C_PXA b/baseconfig/arm/armv7/armv7/CONFIG_I2C_PXA deleted file mode 100644 index 59d18f0cb..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_I2C_PXA +++ /dev/null @@ -1 +0,0 @@ -CONFIG_I2C_PXA=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_I2C_PXA_SLAVE b/baseconfig/arm/armv7/armv7/CONFIG_I2C_PXA_SLAVE deleted file mode 100644 index 7cc440320..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_I2C_PXA_SLAVE +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_I2C_PXA_SLAVE is not set diff --git a/baseconfig/arm/armv7/armv7/CONFIG_I2C_ST b/baseconfig/arm/armv7/armv7/CONFIG_I2C_ST new file mode 100644 index 000000000..dac85894e --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_I2C_ST @@ -0,0 +1 @@ +CONFIG_I2C_ST=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_KEYBOARD_ST_KEYSCAN b/baseconfig/arm/armv7/armv7/CONFIG_KEYBOARD_ST_KEYSCAN new file mode 100644 index 000000000..5ad9d0409 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_KEYBOARD_ST_KEYSCAN @@ -0,0 +1 @@ +CONFIG_KEYBOARD_ST_KEYSCAN=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MMC_SDHCI_ST b/baseconfig/arm/armv7/armv7/CONFIG_MMC_SDHCI_ST new file mode 100644 index 000000000..4a513a669 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_MMC_SDHCI_ST @@ -0,0 +1 @@ +CONFIG_MMC_SDHCI_ST=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_OMAP_MUX_DEBUG b/baseconfig/arm/armv7/armv7/CONFIG_OMAP_MUX_DEBUG deleted file mode 100644 index b61e5b603..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_OMAP_MUX_DEBUG +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_OMAP_MUX_DEBUG is not set diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PHY_MIPHY28LP b/baseconfig/arm/armv7/armv7/CONFIG_PHY_MIPHY28LP new file mode 100644 index 000000000..c0b002711 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_PHY_MIPHY28LP @@ -0,0 +1 @@ +CONFIG_PHY_MIPHY28LP=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PHY_MIPHY365X b/baseconfig/arm/armv7/armv7/CONFIG_PHY_MIPHY365X new file mode 100644 index 000000000..b824f4d74 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_PHY_MIPHY365X @@ -0,0 +1 @@ +# CONFIG_PHY_MIPHY365X is not set diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PHY_STIH407_USB b/baseconfig/arm/armv7/armv7/CONFIG_PHY_STIH407_USB new file mode 100644 index 000000000..62d71519e --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_PHY_STIH407_USB @@ -0,0 +1 @@ +CONFIG_PHY_STIH407_USB=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PHY_STIH41X_USB b/baseconfig/arm/armv7/armv7/CONFIG_PHY_STIH41X_USB new file mode 100644 index 000000000..65f0bc9b7 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_PHY_STIH41X_USB @@ -0,0 +1 @@ +# CONFIG_PHY_STIH41X_USB is not set diff --git a/baseconfig/arm/armv7/armv7/CONFIG_POWER_RESET_ST b/baseconfig/arm/armv7/armv7/CONFIG_POWER_RESET_ST new file mode 100644 index 000000000..e14ee1ac1 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_POWER_RESET_ST @@ -0,0 +1 @@ +CONFIG_POWER_RESET_ST=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PWM_STI b/baseconfig/arm/armv7/armv7/CONFIG_PWM_STI new file mode 100644 index 000000000..8aaff84cb --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_PWM_STI @@ -0,0 +1 @@ +CONFIG_PWM_STI=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_RC_ST b/baseconfig/arm/armv7/armv7/CONFIG_RC_ST new file mode 100644 index 000000000..878dd631d --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_RC_ST @@ -0,0 +1 @@ +CONFIG_RC_ST=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_RTC_DRV_OMAP b/baseconfig/arm/armv7/armv7/CONFIG_RTC_DRV_OMAP index 7679dbb81..479a6f546 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_RTC_DRV_OMAP +++ b/baseconfig/arm/armv7/armv7/CONFIG_RTC_DRV_OMAP @@ -1 +1 @@ -CONFIG_RTC_DRV_OMAP=y +CONFIG_RTC_DRV_OMAP=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_RTC_DRV_ST_LPC b/baseconfig/arm/armv7/armv7/CONFIG_RTC_DRV_ST_LPC new file mode 100644 index 000000000..548d6d6c9 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_RTC_DRV_ST_LPC @@ -0,0 +1 @@ +CONFIG_RTC_DRV_ST_LPC=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_STI b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_STI new file mode 100644 index 000000000..af73428f9 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_STI @@ -0,0 +1 @@ +CONFIG_SND_SOC_STI=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_STI_SAS b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_STI_SAS new file mode 100644 index 000000000..99ae102fc --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_STI_SAS @@ -0,0 +1 @@ +CONFIG_SND_SOC_STI_SAS=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_TEGRA_WM8753 b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_TEGRA_WM8753 deleted file mode 100644 index d8bef6a31..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_TEGRA_WM8753 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SND_SOC_TEGRA_WM8753=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SOC_STIH407 b/baseconfig/arm/armv7/armv7/CONFIG_SOC_STIH407 new file mode 100644 index 000000000..e1a2ca5a6 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_SOC_STIH407 @@ -0,0 +1 @@ +CONFIG_SOC_STIH407=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SOC_STIH415 b/baseconfig/arm/armv7/armv7/CONFIG_SOC_STIH415 new file mode 100644 index 000000000..41502f339 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_SOC_STIH415 @@ -0,0 +1 @@ +# CONFIG_SOC_STIH415 is not set diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SOC_STIH416 b/baseconfig/arm/armv7/armv7/CONFIG_SOC_STIH416 new file mode 100644 index 000000000..9835ddfc1 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_SOC_STIH416 @@ -0,0 +1 @@ +# CONFIG_SOC_STIH416 is not set diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SPI_ST_SSC4 b/baseconfig/arm/armv7/armv7/CONFIG_SPI_ST_SSC4 new file mode 100644 index 000000000..87403eb57 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_SPI_ST_SSC4 @@ -0,0 +1 @@ +CONFIG_SPI_ST_SSC4=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_STI_MBOX b/baseconfig/arm/armv7/armv7/CONFIG_STI_MBOX new file mode 100644 index 000000000..60dd9ded6 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_STI_MBOX @@ -0,0 +1 @@ +CONFIG_STI_MBOX=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_ST_FDMA b/baseconfig/arm/armv7/armv7/CONFIG_ST_FDMA new file mode 100644 index 000000000..73c09775d --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_ST_FDMA @@ -0,0 +1 @@ +CONFIG_ST_FDMA=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_ST_LPC_WATCHDOG b/baseconfig/arm/armv7/armv7/CONFIG_ST_LPC_WATCHDOG new file mode 100644 index 000000000..5e0a376a8 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_ST_LPC_WATCHDOG @@ -0,0 +1 @@ +CONFIG_ST_LPC_WATCHDOG=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_ST_REMOTEPROC b/baseconfig/arm/armv7/armv7/CONFIG_ST_REMOTEPROC new file mode 100644 index 000000000..73ad95532 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_ST_REMOTEPROC @@ -0,0 +1 @@ +CONFIG_ST_REMOTEPROC=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_ST_THERMAL b/baseconfig/arm/armv7/armv7/CONFIG_ST_THERMAL new file mode 100644 index 000000000..62b32ecb6 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_ST_THERMAL @@ -0,0 +1 @@ +CONFIG_ST_THERMAL=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_ST_THERMAL_MEMMAP b/baseconfig/arm/armv7/armv7/CONFIG_ST_THERMAL_MEMMAP new file mode 100644 index 000000000..22f120d14 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_ST_THERMAL_MEMMAP @@ -0,0 +1 @@ +CONFIG_ST_THERMAL_MEMMAP=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_ST_THERMAL_SYSCFG b/baseconfig/arm/armv7/armv7/CONFIG_ST_THERMAL_SYSCFG new file mode 100644 index 000000000..865418b83 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_ST_THERMAL_SYSCFG @@ -0,0 +1 @@ +# CONFIG_ST_THERMAL_SYSCFG is not set diff --git a/baseconfig/arm/armv7/armv7/CONFIG_TI_CPTS b/baseconfig/arm/armv7/armv7/CONFIG_TI_CPTS index 163365765..f2dd7ea1f 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_TI_CPTS +++ b/baseconfig/arm/armv7/armv7/CONFIG_TI_CPTS @@ -1 +1 @@ -CONFIG_TI_CPTS=m +CONFIG_TI_CPTS=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_TI_CPTS_MOD b/baseconfig/arm/armv7/armv7/CONFIG_TI_CPTS_MOD new file mode 100644 index 000000000..b81356e32 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_TI_CPTS_MOD @@ -0,0 +1 @@ +CONFIG_TI_CPTS_MOD=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_USB_DWC3_ST b/baseconfig/arm/armv7/armv7/CONFIG_USB_DWC3_ST new file mode 100644 index 000000000..8c2b8b403 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_USB_DWC3_ST @@ -0,0 +1 @@ +CONFIG_USB_DWC3_ST=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_USB_EHCI_HCD_STI b/baseconfig/arm/armv7/armv7/CONFIG_USB_EHCI_HCD_STI new file mode 100644 index 000000000..7f13c6b05 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_USB_EHCI_HCD_STI @@ -0,0 +1 @@ +CONFIG_USB_EHCI_HCD_STI=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_USB_OHCI_HCD_STI b/baseconfig/arm/armv7/armv7/CONFIG_USB_OHCI_HCD_STI new file mode 100644 index 000000000..ac20563d8 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_USB_OHCI_HCD_STI @@ -0,0 +1 @@ +CONFIG_USB_OHCI_HCD_STI=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_IMX_VDOA b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_IMX_VDOA new file mode 100644 index 000000000..034c99572 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_IMX_VDOA @@ -0,0 +1 @@ +CONFIG_VIDEO_IMX_VDOA=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS deleted file mode 100644 index 65db40667..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS +++ /dev/null @@ -1 +0,0 @@ -CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_BDISP b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_BDISP new file mode 100644 index 000000000..430657aeb --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_BDISP @@ -0,0 +1 @@ +CONFIG_VIDEO_STI_BDISP=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_DELTA b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_DELTA new file mode 100644 index 000000000..8bb71fa96 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_DELTA @@ -0,0 +1 @@ +CONFIG_VIDEO_STI_DELTA=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_DELTA_DRIVER b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_DELTA_DRIVER new file mode 100644 index 000000000..0292f4baa --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_DELTA_DRIVER @@ -0,0 +1 @@ +CONFIG_VIDEO_STI_DELTA_DRIVER=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_DELTA_MJPEG b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_DELTA_MJPEG new file mode 100644 index 000000000..f847894b9 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_DELTA_MJPEG @@ -0,0 +1 @@ +CONFIG_VIDEO_STI_DELTA_MJPEG=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_HDMI_CEC b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_HDMI_CEC new file mode 100644 index 000000000..a1d5539f7 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_HDMI_CEC @@ -0,0 +1 @@ +CONFIG_VIDEO_STI_HDMI_CEC=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_HVA b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_HVA new file mode 100644 index 000000000..7058385d2 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_HVA @@ -0,0 +1 @@ +CONFIG_VIDEO_STI_HVA=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_HVA_DEBUGFS b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_HVA_DEBUGFS new file mode 100644 index 000000000..637bf6eb4 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_STI_HVA_DEBUGFS @@ -0,0 +1 @@ +# CONFIG_VIDEO_STI_HVA_DEBUGFS is not set diff --git a/baseconfig/arm/armv7/lpae/CONFIG_VDSO b/baseconfig/arm/armv7/lpae/CONFIG_VDSO new file mode 100644 index 000000000..cab5ebafb --- /dev/null +++ b/baseconfig/arm/armv7/lpae/CONFIG_VDSO @@ -0,0 +1 @@ +CONFIG_VDSO=y diff --git a/baseconfig/powerpc/CONFIG_AGP b/baseconfig/powerpc/CONFIG_AGP index ea543fee8..f7332ef53 100644 --- a/baseconfig/powerpc/CONFIG_AGP +++ b/baseconfig/powerpc/CONFIG_AGP @@ -1 +1 @@ -CONFIG_AGP=y +# CONFIG_AGP is not set diff --git a/baseconfig/powerpc/CONFIG_DEV_DAX b/baseconfig/powerpc/CONFIG_DEV_DAX new file mode 100644 index 000000000..77478a213 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_DEV_DAX @@ -0,0 +1 @@ +CONFIG_DEV_DAX=m diff --git a/baseconfig/powerpc/CONFIG_DEV_DAX_PMEM b/baseconfig/powerpc/CONFIG_DEV_DAX_PMEM new file mode 100644 index 000000000..8c7fd6732 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_DEV_DAX_PMEM @@ -0,0 +1 @@ +CONFIG_DEV_DAX_PMEM=m diff --git a/baseconfig/powerpc/CONFIG_GENWQE b/baseconfig/powerpc/CONFIG_GENWQE new file mode 100644 index 000000000..f1f996ac1 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_GENWQE @@ -0,0 +1 @@ +CONFIG_GENWQE=m diff --git a/baseconfig/powerpc/CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY b/baseconfig/powerpc/CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY new file mode 100644 index 000000000..b14ba84fb --- /dev/null +++ b/baseconfig/powerpc/CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY @@ -0,0 +1 @@ +CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY=1 diff --git a/baseconfig/powerpc/CONFIG_GPIO_SCH b/baseconfig/powerpc/CONFIG_GPIO_SCH deleted file mode 100644 index 91a3ab850..000000000 --- a/baseconfig/powerpc/CONFIG_GPIO_SCH +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_GPIO_SCH is not set diff --git a/baseconfig/powerpc/CONFIG_LEDS_TRIGGER_GPIO b/baseconfig/powerpc/CONFIG_LEDS_TRIGGER_GPIO deleted file mode 100644 index c45d222a9..000000000 --- a/baseconfig/powerpc/CONFIG_LEDS_TRIGGER_GPIO +++ /dev/null @@ -1 +0,0 @@ -CONFIG_LEDS_TRIGGER_GPIO=m diff --git a/baseconfig/powerpc/CONFIG_NR_DEV_DAX b/baseconfig/powerpc/CONFIG_NR_DEV_DAX new file mode 100644 index 000000000..3fd0f86b1 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_NR_DEV_DAX @@ -0,0 +1 @@ +CONFIG_NR_DEV_DAX=32768 diff --git a/baseconfig/powerpc/CONFIG_TRANSPARENT_HUGEPAGE b/baseconfig/powerpc/CONFIG_TRANSPARENT_HUGEPAGE index 4874a851b..75d999c66 100644 --- a/baseconfig/powerpc/CONFIG_TRANSPARENT_HUGEPAGE +++ b/baseconfig/powerpc/CONFIG_TRANSPARENT_HUGEPAGE @@ -1 +1 @@ -# CONFIG_TRANSPARENT_HUGEPAGE is not set +CONFIG_TRANSPARENT_HUGEPAGE=y diff --git a/baseconfig/powerpc/CONFIG_TRANSPARENT_HUGEPAGE_MADVISE b/baseconfig/powerpc/CONFIG_TRANSPARENT_HUGEPAGE_MADVISE new file mode 100644 index 000000000..f9a942f2c --- /dev/null +++ b/baseconfig/powerpc/CONFIG_TRANSPARENT_HUGEPAGE_MADVISE @@ -0,0 +1 @@ +CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y diff --git a/baseconfig/powerpc/powerpc64/CONFIG_AGP b/baseconfig/powerpc/powerpc64/CONFIG_AGP new file mode 100644 index 000000000..ea543fee8 --- /dev/null +++ b/baseconfig/powerpc/powerpc64/CONFIG_AGP @@ -0,0 +1 @@ +CONFIG_AGP=y diff --git a/baseconfig/s390x/CONFIG_ALIM7101_WDT b/baseconfig/s390x/CONFIG_ALIM7101_WDT new file mode 100644 index 000000000..b5ad49883 --- /dev/null +++ b/baseconfig/s390x/CONFIG_ALIM7101_WDT @@ -0,0 +1 @@ +# CONFIG_ALIM7101_WDT is not set diff --git a/baseconfig/s390x/CONFIG_ALTERA_STAPL b/baseconfig/s390x/CONFIG_ALTERA_STAPL new file mode 100644 index 000000000..f454734fa --- /dev/null +++ b/baseconfig/s390x/CONFIG_ALTERA_STAPL @@ -0,0 +1 @@ +# CONFIG_ALTERA_STAPL is not set diff --git a/baseconfig/s390x/CONFIG_ALTERA_TSE b/baseconfig/s390x/CONFIG_ALTERA_TSE new file mode 100644 index 000000000..f803036e8 --- /dev/null +++ b/baseconfig/s390x/CONFIG_ALTERA_TSE @@ -0,0 +1 @@ +# CONFIG_ALTERA_TSE is not set diff --git a/baseconfig/s390x/CONFIG_APDS9802ALS b/baseconfig/s390x/CONFIG_APDS9802ALS new file mode 100644 index 000000000..c40795bfa --- /dev/null +++ b/baseconfig/s390x/CONFIG_APDS9802ALS @@ -0,0 +1 @@ +# CONFIG_APDS9802ALS is not set diff --git a/baseconfig/s390x/CONFIG_BE2ISCSI b/baseconfig/s390x/CONFIG_BE2ISCSI new file mode 100644 index 000000000..49fffd76e --- /dev/null +++ b/baseconfig/s390x/CONFIG_BE2ISCSI @@ -0,0 +1 @@ +# CONFIG_BE2ISCSI is not set diff --git a/baseconfig/s390x/CONFIG_BLK_CPQ_CISS_DA b/baseconfig/s390x/CONFIG_BLK_CPQ_CISS_DA new file mode 100644 index 000000000..2e6c723ac --- /dev/null +++ b/baseconfig/s390x/CONFIG_BLK_CPQ_CISS_DA @@ -0,0 +1 @@ +# CONFIG_BLK_CPQ_CISS_DA is not set diff --git a/baseconfig/s390x/CONFIG_BLK_DEV_3W_XXXX_RAID b/baseconfig/s390x/CONFIG_BLK_DEV_3W_XXXX_RAID new file mode 100644 index 000000000..0fbe95ebc --- /dev/null +++ b/baseconfig/s390x/CONFIG_BLK_DEV_3W_XXXX_RAID @@ -0,0 +1 @@ +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set diff --git a/baseconfig/s390x/CONFIG_BLK_DEV_DAC960 b/baseconfig/s390x/CONFIG_BLK_DEV_DAC960 new file mode 100644 index 000000000..4cc1142cb --- /dev/null +++ b/baseconfig/s390x/CONFIG_BLK_DEV_DAC960 @@ -0,0 +1 @@ +# CONFIG_BLK_DEV_DAC960 is not set diff --git a/baseconfig/s390x/CONFIG_BLK_DEV_SKD b/baseconfig/s390x/CONFIG_BLK_DEV_SKD new file mode 100644 index 000000000..cc05158fb --- /dev/null +++ b/baseconfig/s390x/CONFIG_BLK_DEV_SKD @@ -0,0 +1 @@ +# CONFIG_BLK_DEV_SKD is not set diff --git a/baseconfig/s390x/CONFIG_BLK_DEV_SX8 b/baseconfig/s390x/CONFIG_BLK_DEV_SX8 new file mode 100644 index 000000000..76e0342ed --- /dev/null +++ b/baseconfig/s390x/CONFIG_BLK_DEV_SX8 @@ -0,0 +1 @@ +# CONFIG_BLK_DEV_SX8 is not set diff --git a/baseconfig/s390x/CONFIG_BLK_DEV_UMEM b/baseconfig/s390x/CONFIG_BLK_DEV_UMEM new file mode 100644 index 000000000..6265b8162 --- /dev/null +++ b/baseconfig/s390x/CONFIG_BLK_DEV_UMEM @@ -0,0 +1 @@ +# CONFIG_BLK_DEV_UMEM is not set diff --git a/baseconfig/s390x/CONFIG_CAN b/baseconfig/s390x/CONFIG_CAN new file mode 100644 index 000000000..37ca11c95 --- /dev/null +++ b/baseconfig/s390x/CONFIG_CAN @@ -0,0 +1 @@ +# CONFIG_CAN is not set diff --git a/baseconfig/s390x/CONFIG_CHARGER_SMB347 b/baseconfig/s390x/CONFIG_CHARGER_SMB347 new file mode 100644 index 000000000..d7b8424a8 --- /dev/null +++ b/baseconfig/s390x/CONFIG_CHARGER_SMB347 @@ -0,0 +1 @@ +# CONFIG_CHARGER_SMB347 is not set diff --git a/baseconfig/s390x/CONFIG_DMADEVICES b/baseconfig/s390x/CONFIG_DMADEVICES new file mode 100644 index 000000000..6596e80fc --- /dev/null +++ b/baseconfig/s390x/CONFIG_DMADEVICES @@ -0,0 +1 @@ +# CONFIG_DMADEVICES is not set diff --git a/baseconfig/s390x/CONFIG_DNET b/baseconfig/s390x/CONFIG_DNET new file mode 100644 index 000000000..f8ac68f29 --- /dev/null +++ b/baseconfig/s390x/CONFIG_DNET @@ -0,0 +1 @@ +# CONFIG_DNET is not set diff --git a/baseconfig/s390x/CONFIG_DP83640_PHY b/baseconfig/s390x/CONFIG_DP83640_PHY new file mode 100644 index 000000000..24a3a8f31 --- /dev/null +++ b/baseconfig/s390x/CONFIG_DP83640_PHY @@ -0,0 +1 @@ +# CONFIG_DP83640_PHY is not set diff --git a/baseconfig/s390x/CONFIG_ECHO b/baseconfig/s390x/CONFIG_ECHO new file mode 100644 index 000000000..b84a07b07 --- /dev/null +++ b/baseconfig/s390x/CONFIG_ECHO @@ -0,0 +1 @@ +# CONFIG_ECHO is not set diff --git a/baseconfig/s390x/CONFIG_ENCLOSURE_SERVICES b/baseconfig/s390x/CONFIG_ENCLOSURE_SERVICES new file mode 100644 index 000000000..b463632aa --- /dev/null +++ b/baseconfig/s390x/CONFIG_ENCLOSURE_SERVICES @@ -0,0 +1 @@ +# CONFIG_ENCLOSURE_SERVICES is not set diff --git a/baseconfig/s390x/CONFIG_ETHOC b/baseconfig/s390x/CONFIG_ETHOC new file mode 100644 index 000000000..15370ca02 --- /dev/null +++ b/baseconfig/s390x/CONFIG_ETHOC @@ -0,0 +1 @@ +# CONFIG_ETHOC is not set diff --git a/baseconfig/s390x/CONFIG_FDDI b/baseconfig/s390x/CONFIG_FDDI new file mode 100644 index 000000000..e13f968a5 --- /dev/null +++ b/baseconfig/s390x/CONFIG_FDDI @@ -0,0 +1 @@ +# CONFIG_FDDI is not set diff --git a/baseconfig/s390x/CONFIG_FEALNX b/baseconfig/s390x/CONFIG_FEALNX new file mode 100644 index 000000000..4cca6a26d --- /dev/null +++ b/baseconfig/s390x/CONFIG_FEALNX @@ -0,0 +1 @@ +# CONFIG_FEALNX is not set diff --git a/baseconfig/s390x/CONFIG_GENWQE b/baseconfig/s390x/CONFIG_GENWQE new file mode 100644 index 000000000..f1f996ac1 --- /dev/null +++ b/baseconfig/s390x/CONFIG_GENWQE @@ -0,0 +1 @@ +CONFIG_GENWQE=m diff --git a/baseconfig/s390x/CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY b/baseconfig/s390x/CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY new file mode 100644 index 000000000..b7d077774 --- /dev/null +++ b/baseconfig/s390x/CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY @@ -0,0 +1 @@ +CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY=0 diff --git a/baseconfig/s390x/CONFIG_GPIOLIB b/baseconfig/s390x/CONFIG_GPIOLIB new file mode 100644 index 000000000..6e685b2be --- /dev/null +++ b/baseconfig/s390x/CONFIG_GPIOLIB @@ -0,0 +1 @@ +# CONFIG_GPIOLIB is not set diff --git a/baseconfig/s390x/CONFIG_HID b/baseconfig/s390x/CONFIG_HID index 15d84482e..befe82811 100644 --- a/baseconfig/s390x/CONFIG_HID +++ b/baseconfig/s390x/CONFIG_HID @@ -1 +1 @@ -CONFIG_HID=m +# CONFIG_HID is not set diff --git a/baseconfig/s390x/CONFIG_HIPPI b/baseconfig/s390x/CONFIG_HIPPI new file mode 100644 index 000000000..8f4d0983a --- /dev/null +++ b/baseconfig/s390x/CONFIG_HIPPI @@ -0,0 +1 @@ +# CONFIG_HIPPI is not set diff --git a/baseconfig/s390x/CONFIG_HWMON b/baseconfig/s390x/CONFIG_HWMON index d67f2b72f..65c3ac9f5 100644 --- a/baseconfig/s390x/CONFIG_HWMON +++ b/baseconfig/s390x/CONFIG_HWMON @@ -1 +1 @@ -CONFIG_HWMON=m +# CONFIG_HWMON is not set diff --git a/baseconfig/s390x/CONFIG_I2C_ALGOBIT b/baseconfig/s390x/CONFIG_I2C_ALGOBIT new file mode 100644 index 000000000..e374ebd3c --- /dev/null +++ b/baseconfig/s390x/CONFIG_I2C_ALGOBIT @@ -0,0 +1 @@ +# CONFIG_I2C_ALGOBIT is not set diff --git a/baseconfig/s390x/CONFIG_I2C_ALGOPCA b/baseconfig/s390x/CONFIG_I2C_ALGOPCA new file mode 100644 index 000000000..545b72f08 --- /dev/null +++ b/baseconfig/s390x/CONFIG_I2C_ALGOPCA @@ -0,0 +1 @@ +# CONFIG_I2C_ALGOPCA is not set diff --git a/baseconfig/s390x/CONFIG_I2C_ALGOPCF b/baseconfig/s390x/CONFIG_I2C_ALGOPCF new file mode 100644 index 000000000..cdb960f9c --- /dev/null +++ b/baseconfig/s390x/CONFIG_I2C_ALGOPCF @@ -0,0 +1 @@ +# CONFIG_I2C_ALGOPCF is not set diff --git a/baseconfig/s390x/CONFIG_I2C_CHARDEV b/baseconfig/s390x/CONFIG_I2C_CHARDEV new file mode 100644 index 000000000..78053559f --- /dev/null +++ b/baseconfig/s390x/CONFIG_I2C_CHARDEV @@ -0,0 +1 @@ +# CONFIG_I2C_CHARDEV is not set diff --git a/baseconfig/s390x/CONFIG_I2C_COMPAT b/baseconfig/s390x/CONFIG_I2C_COMPAT new file mode 100644 index 000000000..c82c4eb35 --- /dev/null +++ b/baseconfig/s390x/CONFIG_I2C_COMPAT @@ -0,0 +1 @@ +# CONFIG_I2C_COMPAT is not set diff --git a/baseconfig/s390x/CONFIG_I2C_DESIGNWARE_PCI b/baseconfig/s390x/CONFIG_I2C_DESIGNWARE_PCI new file mode 100644 index 000000000..7f371b4dc --- /dev/null +++ b/baseconfig/s390x/CONFIG_I2C_DESIGNWARE_PCI @@ -0,0 +1 @@ +# CONFIG_I2C_DESIGNWARE_PCI is not set diff --git a/baseconfig/s390x/CONFIG_I2C_HID b/baseconfig/s390x/CONFIG_I2C_HID new file mode 100644 index 000000000..30ca18a84 --- /dev/null +++ b/baseconfig/s390x/CONFIG_I2C_HID @@ -0,0 +1 @@ +# CONFIG_I2C_HID is not set diff --git a/baseconfig/s390x/CONFIG_I2C_PCA_PLATFORM b/baseconfig/s390x/CONFIG_I2C_PCA_PLATFORM new file mode 100644 index 000000000..e371d1a8e --- /dev/null +++ b/baseconfig/s390x/CONFIG_I2C_PCA_PLATFORM @@ -0,0 +1 @@ +# CONFIG_I2C_PCA_PLATFORM is not set diff --git a/baseconfig/s390x/CONFIG_I2C_SIMTEC b/baseconfig/s390x/CONFIG_I2C_SIMTEC new file mode 100644 index 000000000..1fe634955 --- /dev/null +++ b/baseconfig/s390x/CONFIG_I2C_SIMTEC @@ -0,0 +1 @@ +# CONFIG_I2C_SIMTEC is not set diff --git a/baseconfig/s390x/CONFIG_I2C_SLAVE b/baseconfig/s390x/CONFIG_I2C_SLAVE new file mode 100644 index 000000000..364b36792 --- /dev/null +++ b/baseconfig/s390x/CONFIG_I2C_SLAVE @@ -0,0 +1 @@ +# CONFIG_I2C_SLAVE is not set diff --git a/baseconfig/s390x/CONFIG_I6300ESB_WDT b/baseconfig/s390x/CONFIG_I6300ESB_WDT new file mode 100644 index 000000000..8c7bc0f55 --- /dev/null +++ b/baseconfig/s390x/CONFIG_I6300ESB_WDT @@ -0,0 +1 @@ +# CONFIG_I6300ESB_WDT is not set diff --git a/baseconfig/s390x/CONFIG_IIO b/baseconfig/s390x/CONFIG_IIO new file mode 100644 index 000000000..80d289815 --- /dev/null +++ b/baseconfig/s390x/CONFIG_IIO @@ -0,0 +1 @@ +# CONFIG_IIO is not set diff --git a/baseconfig/s390x/CONFIG_INFINIBAND_CXGB3 b/baseconfig/s390x/CONFIG_INFINIBAND_CXGB3 new file mode 100644 index 000000000..f06c87360 --- /dev/null +++ b/baseconfig/s390x/CONFIG_INFINIBAND_CXGB3 @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_CXGB3 is not set diff --git a/baseconfig/s390x/CONFIG_INFINIBAND_CXGB4 b/baseconfig/s390x/CONFIG_INFINIBAND_CXGB4 new file mode 100644 index 000000000..40ff06894 --- /dev/null +++ b/baseconfig/s390x/CONFIG_INFINIBAND_CXGB4 @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_CXGB4 is not set diff --git a/baseconfig/s390x/CONFIG_INFINIBAND_MTHCA b/baseconfig/s390x/CONFIG_INFINIBAND_MTHCA new file mode 100644 index 000000000..a134e36a3 --- /dev/null +++ b/baseconfig/s390x/CONFIG_INFINIBAND_MTHCA @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_MTHCA is not set diff --git a/baseconfig/s390x/CONFIG_INFINIBAND_NES b/baseconfig/s390x/CONFIG_INFINIBAND_NES new file mode 100644 index 000000000..eee505590 --- /dev/null +++ b/baseconfig/s390x/CONFIG_INFINIBAND_NES @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_NES is not set diff --git a/baseconfig/s390x/CONFIG_INFINIBAND_OCRDMA b/baseconfig/s390x/CONFIG_INFINIBAND_OCRDMA new file mode 100644 index 000000000..12ff35161 --- /dev/null +++ b/baseconfig/s390x/CONFIG_INFINIBAND_OCRDMA @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_OCRDMA is not set diff --git a/baseconfig/s390x/CONFIG_INFINIBAND_QIB b/baseconfig/s390x/CONFIG_INFINIBAND_QIB new file mode 100644 index 000000000..591f4e962 --- /dev/null +++ b/baseconfig/s390x/CONFIG_INFINIBAND_QIB @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_QIB is not set diff --git a/baseconfig/s390x/CONFIG_INPUT_FF_MEMLESS b/baseconfig/s390x/CONFIG_INPUT_FF_MEMLESS new file mode 100644 index 000000000..340af6632 --- /dev/null +++ b/baseconfig/s390x/CONFIG_INPUT_FF_MEMLESS @@ -0,0 +1 @@ +# CONFIG_INPUT_FF_MEMLESS is not set diff --git a/baseconfig/s390x/CONFIG_INPUT_MOUSEDEV b/baseconfig/s390x/CONFIG_INPUT_MOUSEDEV new file mode 100644 index 000000000..1afcd1e58 --- /dev/null +++ b/baseconfig/s390x/CONFIG_INPUT_MOUSEDEV @@ -0,0 +1 @@ +# CONFIG_INPUT_MOUSEDEV is not set diff --git a/baseconfig/s390x/CONFIG_INPUT_POLLDEV b/baseconfig/s390x/CONFIG_INPUT_POLLDEV new file mode 100644 index 000000000..3d67d3920 --- /dev/null +++ b/baseconfig/s390x/CONFIG_INPUT_POLLDEV @@ -0,0 +1 @@ +# CONFIG_INPUT_POLLDEV is not set diff --git a/baseconfig/s390x/CONFIG_INPUT_SPARSEKMAP b/baseconfig/s390x/CONFIG_INPUT_SPARSEKMAP new file mode 100644 index 000000000..dce3d03cc --- /dev/null +++ b/baseconfig/s390x/CONFIG_INPUT_SPARSEKMAP @@ -0,0 +1 @@ +# CONFIG_INPUT_SPARSEKMAP is not set diff --git a/baseconfig/s390x/CONFIG_IP1000 b/baseconfig/s390x/CONFIG_IP1000 new file mode 100644 index 000000000..179adb3cc --- /dev/null +++ b/baseconfig/s390x/CONFIG_IP1000 @@ -0,0 +1 @@ +# CONFIG_IP1000 is not set diff --git a/baseconfig/s390x/CONFIG_ISL29003 b/baseconfig/s390x/CONFIG_ISL29003 new file mode 100644 index 000000000..266725319 --- /dev/null +++ b/baseconfig/s390x/CONFIG_ISL29003 @@ -0,0 +1 @@ +# CONFIG_ISL29003 is not set diff --git a/baseconfig/s390x/CONFIG_ISL29020 b/baseconfig/s390x/CONFIG_ISL29020 new file mode 100644 index 000000000..abf4d72ad --- /dev/null +++ b/baseconfig/s390x/CONFIG_ISL29020 @@ -0,0 +1 @@ +# CONFIG_ISL29020 is not set diff --git a/baseconfig/s390x/CONFIG_JME b/baseconfig/s390x/CONFIG_JME new file mode 100644 index 000000000..63c5aeb65 --- /dev/null +++ b/baseconfig/s390x/CONFIG_JME @@ -0,0 +1 @@ +# CONFIG_JME is not set diff --git a/baseconfig/s390x/CONFIG_MEGARAID_LEGACY b/baseconfig/s390x/CONFIG_MEGARAID_LEGACY new file mode 100644 index 000000000..3109de7c1 --- /dev/null +++ b/baseconfig/s390x/CONFIG_MEGARAID_LEGACY @@ -0,0 +1 @@ +# CONFIG_MEGARAID_LEGACY is not set diff --git a/baseconfig/s390x/CONFIG_MEGARAID_NEWGEN b/baseconfig/s390x/CONFIG_MEGARAID_NEWGEN new file mode 100644 index 000000000..a132e5f39 --- /dev/null +++ b/baseconfig/s390x/CONFIG_MEGARAID_NEWGEN @@ -0,0 +1 @@ +# CONFIG_MEGARAID_NEWGEN is not set diff --git a/baseconfig/s390x/CONFIG_MEGARAID_SAS b/baseconfig/s390x/CONFIG_MEGARAID_SAS new file mode 100644 index 000000000..94dae93a5 --- /dev/null +++ b/baseconfig/s390x/CONFIG_MEGARAID_SAS @@ -0,0 +1 @@ +# CONFIG_MEGARAID_SAS is not set diff --git a/baseconfig/s390x/CONFIG_MFD_CORE b/baseconfig/s390x/CONFIG_MFD_CORE index c8855e8a0..61d91aa6e 100644 --- a/baseconfig/s390x/CONFIG_MFD_CORE +++ b/baseconfig/s390x/CONFIG_MFD_CORE @@ -1 +1 @@ -CONFIG_MFD_CORE=m +# CONFIG_MFD_CORE is not set diff --git a/baseconfig/s390x/CONFIG_MLXSW_CORE b/baseconfig/s390x/CONFIG_MLXSW_CORE new file mode 100644 index 000000000..31431cecf --- /dev/null +++ b/baseconfig/s390x/CONFIG_MLXSW_CORE @@ -0,0 +1 @@ +# CONFIG_MLXSW_CORE is not set diff --git a/baseconfig/s390x/CONFIG_NET_CADENCE b/baseconfig/s390x/CONFIG_NET_CADENCE new file mode 100644 index 000000000..8d2c645c2 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_CADENCE @@ -0,0 +1 @@ +# CONFIG_NET_CADENCE is not set diff --git a/baseconfig/s390x/CONFIG_NET_PACKET_ENGINE b/baseconfig/s390x/CONFIG_NET_PACKET_ENGINE new file mode 100644 index 000000000..3ed79f437 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_PACKET_ENGINE @@ -0,0 +1 @@ +# CONFIG_NET_PACKET_ENGINE is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_3COM b/baseconfig/s390x/CONFIG_NET_VENDOR_3COM new file mode 100644 index 000000000..ed6108c18 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_3COM @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_3COM is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_8390 b/baseconfig/s390x/CONFIG_NET_VENDOR_8390 new file mode 100644 index 000000000..d0b9f3592 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_8390 @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_8390 is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_ADAPTEC b/baseconfig/s390x/CONFIG_NET_VENDOR_ADAPTEC new file mode 100644 index 000000000..c96958732 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_ADAPTEC @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_ADAPTEC is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_AGERE b/baseconfig/s390x/CONFIG_NET_VENDOR_AGERE new file mode 100644 index 000000000..3647271ce --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_AGERE @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_AGERE is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_ALTEON b/baseconfig/s390x/CONFIG_NET_VENDOR_ALTEON new file mode 100644 index 000000000..88beca48e --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_ALTEON @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_ALTEON is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_AMAZON b/baseconfig/s390x/CONFIG_NET_VENDOR_AMAZON new file mode 100644 index 000000000..707bb5a54 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_AMAZON @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_AMAZON is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_AMD b/baseconfig/s390x/CONFIG_NET_VENDOR_AMD new file mode 100644 index 000000000..606381824 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_AMD @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_AMD is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_ATHEROS b/baseconfig/s390x/CONFIG_NET_VENDOR_ATHEROS new file mode 100644 index 000000000..9a99ac7fc --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_ATHEROS @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_ATHEROS is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_BROADCOM b/baseconfig/s390x/CONFIG_NET_VENDOR_BROADCOM new file mode 100644 index 000000000..7cd9cb32f --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_BROADCOM @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_BROADCOM is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_BROCADE b/baseconfig/s390x/CONFIG_NET_VENDOR_BROCADE new file mode 100644 index 000000000..fed5e48a4 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_BROCADE @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_BROCADE is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_CHELSIO b/baseconfig/s390x/CONFIG_NET_VENDOR_CHELSIO new file mode 100644 index 000000000..71374072a --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_CHELSIO @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_CHELSIO is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_CISCO b/baseconfig/s390x/CONFIG_NET_VENDOR_CISCO new file mode 100644 index 000000000..7b4bdaa25 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_CISCO @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_CISCO is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_DEC b/baseconfig/s390x/CONFIG_NET_VENDOR_DEC new file mode 100644 index 000000000..7c3a697fb --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_DEC @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_DEC is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_DLINK b/baseconfig/s390x/CONFIG_NET_VENDOR_DLINK new file mode 100644 index 000000000..181e6a008 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_DLINK @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_DLINK is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_EMULEX b/baseconfig/s390x/CONFIG_NET_VENDOR_EMULEX new file mode 100644 index 000000000..e48620d8d --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_EMULEX @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_EMULEX is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_EXAR b/baseconfig/s390x/CONFIG_NET_VENDOR_EXAR new file mode 100644 index 000000000..90a6a31bb --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_EXAR @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_EXAR is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_HP b/baseconfig/s390x/CONFIG_NET_VENDOR_HP new file mode 100644 index 000000000..30f3b4050 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_HP @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_HP is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_MICREL b/baseconfig/s390x/CONFIG_NET_VENDOR_MICREL new file mode 100644 index 000000000..d359479e3 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_MICREL @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_MICREL is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_MYRI b/baseconfig/s390x/CONFIG_NET_VENDOR_MYRI new file mode 100644 index 000000000..03d6c850f --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_MYRI @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_MYRI is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_NETRONOME b/baseconfig/s390x/CONFIG_NET_VENDOR_NETRONOME new file mode 100644 index 000000000..d08e277d0 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_NETRONOME @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_NETRONOME is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_NVIDIA b/baseconfig/s390x/CONFIG_NET_VENDOR_NVIDIA new file mode 100644 index 000000000..27ee4d58c --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_NVIDIA @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_NVIDIA is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_OKI b/baseconfig/s390x/CONFIG_NET_VENDOR_OKI new file mode 100644 index 000000000..e6b6bc896 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_OKI @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_OKI is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_QLOGIC b/baseconfig/s390x/CONFIG_NET_VENDOR_QLOGIC new file mode 100644 index 000000000..700f6a5e2 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_QLOGIC @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_QLOGIC is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_RDC b/baseconfig/s390x/CONFIG_NET_VENDOR_RDC new file mode 100644 index 000000000..4d84f77dc --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_RDC @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_RDC is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_REALTEK b/baseconfig/s390x/CONFIG_NET_VENDOR_REALTEK new file mode 100644 index 000000000..f21c4dcb0 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_REALTEK @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_REALTEK is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_ROCKER b/baseconfig/s390x/CONFIG_NET_VENDOR_ROCKER new file mode 100644 index 000000000..ab286d286 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_ROCKER @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_ROCKER is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_SEEQ b/baseconfig/s390x/CONFIG_NET_VENDOR_SEEQ new file mode 100644 index 000000000..6fe8245eb --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_SEEQ @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_SEEQ is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_SILAN b/baseconfig/s390x/CONFIG_NET_VENDOR_SILAN new file mode 100644 index 000000000..07a129493 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_SILAN @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_SILAN is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_SIS b/baseconfig/s390x/CONFIG_NET_VENDOR_SIS new file mode 100644 index 000000000..5ff2e309b --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_SIS @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_SIS is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_SMSC b/baseconfig/s390x/CONFIG_NET_VENDOR_SMSC new file mode 100644 index 000000000..4e3e7aec8 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_SMSC @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_SMSC is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_STMICRO b/baseconfig/s390x/CONFIG_NET_VENDOR_STMICRO new file mode 100644 index 000000000..040f835c6 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_STMICRO @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_STMICRO is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_SUN b/baseconfig/s390x/CONFIG_NET_VENDOR_SUN new file mode 100644 index 000000000..a4ce77875 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_SUN @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_SUN is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_TEHUTI b/baseconfig/s390x/CONFIG_NET_VENDOR_TEHUTI new file mode 100644 index 000000000..7c0c6ee39 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_TEHUTI @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_TEHUTI is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_TI b/baseconfig/s390x/CONFIG_NET_VENDOR_TI new file mode 100644 index 000000000..a9395e8cc --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_TI @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_TI is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_WIZNET b/baseconfig/s390x/CONFIG_NET_VENDOR_WIZNET new file mode 100644 index 000000000..08efd75ae --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_WIZNET @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_WIZNET is not set diff --git a/baseconfig/s390x/CONFIG_NET_VENDOR_XIRCOM b/baseconfig/s390x/CONFIG_NET_VENDOR_XIRCOM new file mode 100644 index 000000000..4c2e6f9fd --- /dev/null +++ b/baseconfig/s390x/CONFIG_NET_VENDOR_XIRCOM @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_XIRCOM is not set diff --git a/baseconfig/s390x/CONFIG_NEW_LEDS b/baseconfig/s390x/CONFIG_NEW_LEDS new file mode 100644 index 000000000..3d1c33f73 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NEW_LEDS @@ -0,0 +1 @@ +# CONFIG_NEW_LEDS is not set diff --git a/baseconfig/s390x/CONFIG_NFC b/baseconfig/s390x/CONFIG_NFC new file mode 100644 index 000000000..73cd9395e --- /dev/null +++ b/baseconfig/s390x/CONFIG_NFC @@ -0,0 +1 @@ +# CONFIG_NFC is not set diff --git a/baseconfig/s390x/CONFIG_NOZOMI b/baseconfig/s390x/CONFIG_NOZOMI new file mode 100644 index 000000000..35ef1afd5 --- /dev/null +++ b/baseconfig/s390x/CONFIG_NOZOMI @@ -0,0 +1 @@ +# CONFIG_NOZOMI is not set diff --git a/baseconfig/s390x/CONFIG_N_GSM b/baseconfig/s390x/CONFIG_N_GSM new file mode 100644 index 000000000..e00ec7e28 --- /dev/null +++ b/baseconfig/s390x/CONFIG_N_GSM @@ -0,0 +1 @@ +# CONFIG_N_GSM is not set diff --git a/baseconfig/s390x/CONFIG_PCIPCWATCHDOG b/baseconfig/s390x/CONFIG_PCIPCWATCHDOG new file mode 100644 index 000000000..717da169d --- /dev/null +++ b/baseconfig/s390x/CONFIG_PCIPCWATCHDOG @@ -0,0 +1 @@ +# CONFIG_PCIPCWATCHDOG is not set diff --git a/baseconfig/s390x/CONFIG_PM_DEVFREQ b/baseconfig/s390x/CONFIG_PM_DEVFREQ new file mode 100644 index 000000000..ada3814f1 --- /dev/null +++ b/baseconfig/s390x/CONFIG_PM_DEVFREQ @@ -0,0 +1 @@ +# CONFIG_PM_DEVFREQ is not set diff --git a/baseconfig/s390x/CONFIG_POWER_RESET b/baseconfig/s390x/CONFIG_POWER_RESET new file mode 100644 index 000000000..ecb8fc786 --- /dev/null +++ b/baseconfig/s390x/CONFIG_POWER_RESET @@ -0,0 +1 @@ +# CONFIG_POWER_RESET is not set diff --git a/baseconfig/s390x/CONFIG_PWM b/baseconfig/s390x/CONFIG_PWM new file mode 100644 index 000000000..650ee865d --- /dev/null +++ b/baseconfig/s390x/CONFIG_PWM @@ -0,0 +1 @@ +# CONFIG_PWM is not set diff --git a/baseconfig/s390x/CONFIG_R3964 b/baseconfig/s390x/CONFIG_R3964 new file mode 100644 index 000000000..cca74303c --- /dev/null +++ b/baseconfig/s390x/CONFIG_R3964 @@ -0,0 +1 @@ +# CONFIG_R3964 is not set diff --git a/baseconfig/s390x/CONFIG_RESET_CONTROLLER b/baseconfig/s390x/CONFIG_RESET_CONTROLLER new file mode 100644 index 000000000..0f97f3f23 --- /dev/null +++ b/baseconfig/s390x/CONFIG_RESET_CONTROLLER @@ -0,0 +1 @@ +# CONFIG_RESET_CONTROLLER is not set diff --git a/baseconfig/s390x/CONFIG_RFKILL b/baseconfig/s390x/CONFIG_RFKILL new file mode 100644 index 000000000..f840ecd26 --- /dev/null +++ b/baseconfig/s390x/CONFIG_RFKILL @@ -0,0 +1 @@ +# CONFIG_RFKILL is not set diff --git a/baseconfig/s390x/CONFIG_RMI4_CORE b/baseconfig/s390x/CONFIG_RMI4_CORE new file mode 100644 index 000000000..94b27f88c --- /dev/null +++ b/baseconfig/s390x/CONFIG_RMI4_CORE @@ -0,0 +1 @@ +# CONFIG_RMI4_CORE is not set diff --git a/baseconfig/s390x/CONFIG_RMI4_F03 b/baseconfig/s390x/CONFIG_RMI4_F03 deleted file mode 100644 index effd70c36..000000000 --- a/baseconfig/s390x/CONFIG_RMI4_F03 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_RMI4_F03 is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_3W_9XXX b/baseconfig/s390x/CONFIG_SCSI_3W_9XXX new file mode 100644 index 000000000..00de6f158 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_3W_9XXX @@ -0,0 +1 @@ +# CONFIG_SCSI_3W_9XXX is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_3W_SAS b/baseconfig/s390x/CONFIG_SCSI_3W_SAS new file mode 100644 index 000000000..06a89f918 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_3W_SAS @@ -0,0 +1 @@ +# CONFIG_SCSI_3W_SAS is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_AACRAID b/baseconfig/s390x/CONFIG_SCSI_AACRAID new file mode 100644 index 000000000..5686e689d --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_AACRAID @@ -0,0 +1 @@ +# CONFIG_SCSI_AACRAID is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_ACARD b/baseconfig/s390x/CONFIG_SCSI_ACARD new file mode 100644 index 000000000..d4002ddd0 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_ACARD @@ -0,0 +1 @@ +# CONFIG_SCSI_ACARD is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_AIC79XX b/baseconfig/s390x/CONFIG_SCSI_AIC79XX new file mode 100644 index 000000000..801fade38 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_AIC79XX @@ -0,0 +1 @@ +# CONFIG_SCSI_AIC79XX is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_AIC7XXX b/baseconfig/s390x/CONFIG_SCSI_AIC7XXX new file mode 100644 index 000000000..f305031d0 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_AIC7XXX @@ -0,0 +1 @@ +# CONFIG_SCSI_AIC7XXX is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_AM53C974 b/baseconfig/s390x/CONFIG_SCSI_AM53C974 new file mode 100644 index 000000000..ce64864a7 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_AM53C974 @@ -0,0 +1 @@ +# CONFIG_SCSI_AM53C974 is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_ARCMSR b/baseconfig/s390x/CONFIG_SCSI_ARCMSR new file mode 100644 index 000000000..425f89f74 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_ARCMSR @@ -0,0 +1 @@ +# CONFIG_SCSI_ARCMSR is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_BFA_FC b/baseconfig/s390x/CONFIG_SCSI_BFA_FC new file mode 100644 index 000000000..8568e1ec8 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_BFA_FC @@ -0,0 +1 @@ +# CONFIG_SCSI_BFA_FC is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_BNX2X_FCOE b/baseconfig/s390x/CONFIG_SCSI_BNX2X_FCOE new file mode 100644 index 000000000..5d36d085f --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_BNX2X_FCOE @@ -0,0 +1 @@ +# CONFIG_SCSI_BNX2X_FCOE is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_BNX2_ISCSI b/baseconfig/s390x/CONFIG_SCSI_BNX2_ISCSI new file mode 100644 index 000000000..d400977df --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_BNX2_ISCSI @@ -0,0 +1 @@ +# CONFIG_SCSI_BNX2_ISCSI is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_CHELSIO_FCOE b/baseconfig/s390x/CONFIG_SCSI_CHELSIO_FCOE new file mode 100644 index 000000000..ad8110de9 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_CHELSIO_FCOE @@ -0,0 +1 @@ +# CONFIG_SCSI_CHELSIO_FCOE is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_CXGB3_ISCSI b/baseconfig/s390x/CONFIG_SCSI_CXGB3_ISCSI new file mode 100644 index 000000000..d1e803258 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_CXGB3_ISCSI @@ -0,0 +1 @@ +# CONFIG_SCSI_CXGB3_ISCSI is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_CXGB4_ISCSI b/baseconfig/s390x/CONFIG_SCSI_CXGB4_ISCSI new file mode 100644 index 000000000..27a4bb985 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_CXGB4_ISCSI @@ -0,0 +1 @@ +# CONFIG_SCSI_CXGB4_ISCSI is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_DC395x b/baseconfig/s390x/CONFIG_SCSI_DC395x new file mode 100644 index 000000000..04438189f --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_DC395x @@ -0,0 +1 @@ +# CONFIG_SCSI_DC395x is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_DH b/baseconfig/s390x/CONFIG_SCSI_DH new file mode 100644 index 000000000..e5b8a74ea --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_DH @@ -0,0 +1 @@ +# CONFIG_SCSI_DH is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_DMX3191D b/baseconfig/s390x/CONFIG_SCSI_DMX3191D new file mode 100644 index 000000000..291b9196e --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_DMX3191D @@ -0,0 +1 @@ +# CONFIG_SCSI_DMX3191D is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_ESAS2R b/baseconfig/s390x/CONFIG_SCSI_ESAS2R new file mode 100644 index 000000000..190cb39db --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_ESAS2R @@ -0,0 +1 @@ +# CONFIG_SCSI_ESAS2R is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_HPSA b/baseconfig/s390x/CONFIG_SCSI_HPSA new file mode 100644 index 000000000..e2d1a299c --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_HPSA @@ -0,0 +1 @@ +# CONFIG_SCSI_HPSA is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_HPTIOP b/baseconfig/s390x/CONFIG_SCSI_HPTIOP new file mode 100644 index 000000000..e92d4a91f --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_HPTIOP @@ -0,0 +1 @@ +# CONFIG_SCSI_HPTIOP is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_INIA100 b/baseconfig/s390x/CONFIG_SCSI_INIA100 new file mode 100644 index 000000000..50f5dd42b --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_INIA100 @@ -0,0 +1 @@ +# CONFIG_SCSI_INIA100 is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_INITIO b/baseconfig/s390x/CONFIG_SCSI_INITIO new file mode 100644 index 000000000..7abe6c2d9 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_INITIO @@ -0,0 +1 @@ +# CONFIG_SCSI_INITIO is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_IPS b/baseconfig/s390x/CONFIG_SCSI_IPS new file mode 100644 index 000000000..32e4abe67 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_IPS @@ -0,0 +1 @@ +# CONFIG_SCSI_IPS is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_LPFC b/baseconfig/s390x/CONFIG_SCSI_LPFC new file mode 100644 index 000000000..2bbb943d3 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_LPFC @@ -0,0 +1 @@ +# CONFIG_SCSI_LPFC is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_MPT2SAS b/baseconfig/s390x/CONFIG_SCSI_MPT2SAS new file mode 100644 index 000000000..aca3c70c3 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_MPT2SAS @@ -0,0 +1 @@ +# CONFIG_SCSI_MPT2SAS is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_MPT3SAS b/baseconfig/s390x/CONFIG_SCSI_MPT3SAS new file mode 100644 index 000000000..887255096 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_MPT3SAS @@ -0,0 +1 @@ +# CONFIG_SCSI_MPT3SAS is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_MVSAS b/baseconfig/s390x/CONFIG_SCSI_MVSAS new file mode 100644 index 000000000..dd17532f6 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_MVSAS @@ -0,0 +1 @@ +# CONFIG_SCSI_MVSAS is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_MVUMI b/baseconfig/s390x/CONFIG_SCSI_MVUMI new file mode 100644 index 000000000..a9b158a85 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_MVUMI @@ -0,0 +1 @@ +# CONFIG_SCSI_MVUMI is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_PM8001 b/baseconfig/s390x/CONFIG_SCSI_PM8001 new file mode 100644 index 000000000..ddafafd46 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_PM8001 @@ -0,0 +1 @@ +# CONFIG_SCSI_PM8001 is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_PMCRAID b/baseconfig/s390x/CONFIG_SCSI_PMCRAID new file mode 100644 index 000000000..91c798c43 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_PMCRAID @@ -0,0 +1 @@ +# CONFIG_SCSI_PMCRAID is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_QLA_FC b/baseconfig/s390x/CONFIG_SCSI_QLA_FC new file mode 100644 index 000000000..f8042094e --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_QLA_FC @@ -0,0 +1 @@ +# CONFIG_SCSI_QLA_FC is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_QLA_ISCSI b/baseconfig/s390x/CONFIG_SCSI_QLA_ISCSI new file mode 100644 index 000000000..14ad3035a --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_QLA_ISCSI @@ -0,0 +1 @@ +# CONFIG_SCSI_QLA_ISCSI is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_QLOGIC_1280 b/baseconfig/s390x/CONFIG_SCSI_QLOGIC_1280 new file mode 100644 index 000000000..98bf0179a --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_QLOGIC_1280 @@ -0,0 +1 @@ +# CONFIG_SCSI_QLOGIC_1280 is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_SNIC b/baseconfig/s390x/CONFIG_SCSI_SNIC new file mode 100644 index 000000000..5fa55adc9 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_SNIC @@ -0,0 +1 @@ +# CONFIG_SCSI_SNIC is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_STEX b/baseconfig/s390x/CONFIG_SCSI_STEX new file mode 100644 index 000000000..51be1d1eb --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_STEX @@ -0,0 +1 @@ +# CONFIG_SCSI_STEX is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_SYM53C8XX_2 b/baseconfig/s390x/CONFIG_SCSI_SYM53C8XX_2 new file mode 100644 index 000000000..1cb592105 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_SYM53C8XX_2 @@ -0,0 +1 @@ +# CONFIG_SCSI_SYM53C8XX_2 is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_UFSHCD b/baseconfig/s390x/CONFIG_SCSI_UFSHCD new file mode 100644 index 000000000..542c89fc7 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_UFSHCD @@ -0,0 +1 @@ +# CONFIG_SCSI_UFSHCD is not set diff --git a/baseconfig/s390x/CONFIG_SCSI_WD719X b/baseconfig/s390x/CONFIG_SCSI_WD719X new file mode 100644 index 000000000..96273e303 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SCSI_WD719X @@ -0,0 +1 @@ +# CONFIG_SCSI_WD719X is not set diff --git a/baseconfig/s390x/CONFIG_SENSORS_APDS990X b/baseconfig/s390x/CONFIG_SENSORS_APDS990X new file mode 100644 index 000000000..3aa738be2 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SENSORS_APDS990X @@ -0,0 +1 @@ +# CONFIG_SENSORS_APDS990X is not set diff --git a/baseconfig/s390x/CONFIG_SENSORS_BH1770 b/baseconfig/s390x/CONFIG_SENSORS_BH1770 new file mode 100644 index 000000000..f6d8bfafa --- /dev/null +++ b/baseconfig/s390x/CONFIG_SENSORS_BH1770 @@ -0,0 +1 @@ +# CONFIG_SENSORS_BH1770 is not set diff --git a/baseconfig/s390x/CONFIG_SENSORS_LIS3LV02D b/baseconfig/s390x/CONFIG_SENSORS_LIS3LV02D new file mode 100644 index 000000000..37a6cf6ac --- /dev/null +++ b/baseconfig/s390x/CONFIG_SENSORS_LIS3LV02D @@ -0,0 +1 @@ +# CONFIG_SENSORS_LIS3LV02D is not set diff --git a/baseconfig/s390x/CONFIG_SENSORS_LIS3_I2C b/baseconfig/s390x/CONFIG_SENSORS_LIS3_I2C new file mode 100644 index 000000000..3086c9ed5 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SENSORS_LIS3_I2C @@ -0,0 +1 @@ +# CONFIG_SENSORS_LIS3_I2C is not set diff --git a/baseconfig/s390x/CONFIG_SENSORS_TSL2550 b/baseconfig/s390x/CONFIG_SENSORS_TSL2550 new file mode 100644 index 000000000..c2702cc2c --- /dev/null +++ b/baseconfig/s390x/CONFIG_SENSORS_TSL2550 @@ -0,0 +1 @@ +# CONFIG_SENSORS_TSL2550 is not set diff --git a/baseconfig/s390x/CONFIG_SERIAL_NONSTANDARD b/baseconfig/s390x/CONFIG_SERIAL_NONSTANDARD new file mode 100644 index 000000000..57688cbec --- /dev/null +++ b/baseconfig/s390x/CONFIG_SERIAL_NONSTANDARD @@ -0,0 +1 @@ +# CONFIG_SERIAL_NONSTANDARD is not set diff --git a/baseconfig/s390x/CONFIG_SERIO_LIBPS2 b/baseconfig/s390x/CONFIG_SERIO_LIBPS2 new file mode 100644 index 000000000..b4e848291 --- /dev/null +++ b/baseconfig/s390x/CONFIG_SERIO_LIBPS2 @@ -0,0 +1 @@ +CONFIG_SERIO_LIBPS2=m diff --git a/baseconfig/s390x/CONFIG_SERIO_SERPORT b/baseconfig/s390x/CONFIG_SERIO_SERPORT new file mode 100644 index 000000000..80a07531f --- /dev/null +++ b/baseconfig/s390x/CONFIG_SERIO_SERPORT @@ -0,0 +1 @@ +CONFIG_SERIO_SERPORT=m diff --git a/baseconfig/s390x/CONFIG_SFC b/baseconfig/s390x/CONFIG_SFC new file mode 100644 index 000000000..fdc60b90f --- /dev/null +++ b/baseconfig/s390x/CONFIG_SFC @@ -0,0 +1 @@ +# CONFIG_SFC is not set diff --git a/baseconfig/s390x/CONFIG_UIO b/baseconfig/s390x/CONFIG_UIO new file mode 100644 index 000000000..566183b75 --- /dev/null +++ b/baseconfig/s390x/CONFIG_UIO @@ -0,0 +1 @@ +# CONFIG_UIO is not set diff --git a/baseconfig/s390x/CONFIG_WDTPCI b/baseconfig/s390x/CONFIG_WDTPCI new file mode 100644 index 000000000..ca556694d --- /dev/null +++ b/baseconfig/s390x/CONFIG_WDTPCI @@ -0,0 +1 @@ +# CONFIG_WDTPCI is not set diff --git a/baseconfig/s390x/CONFIG_XILLYBUS b/baseconfig/s390x/CONFIG_XILLYBUS new file mode 100644 index 000000000..ce2448ee6 --- /dev/null +++ b/baseconfig/s390x/CONFIG_XILLYBUS @@ -0,0 +1 @@ +# CONFIG_XILLYBUS is not set diff --git a/baseconfig/CONFIG_CRYPTO_CRC32C_INTEL b/baseconfig/x86/CONFIG_CRYPTO_CRC32C_INTEL similarity index 100% rename from baseconfig/CONFIG_CRYPTO_CRC32C_INTEL rename to baseconfig/x86/CONFIG_CRYPTO_CRC32C_INTEL diff --git a/baseconfig/CONFIG_DRM_I810 b/baseconfig/x86/CONFIG_DRM_I810 similarity index 100% rename from baseconfig/CONFIG_DRM_I810 rename to baseconfig/x86/CONFIG_DRM_I810 diff --git a/baseconfig/CONFIG_DRM_I915 b/baseconfig/x86/CONFIG_DRM_I915 similarity index 100% rename from baseconfig/CONFIG_DRM_I915 rename to baseconfig/x86/CONFIG_DRM_I915 diff --git a/baseconfig/CONFIG_DRM_I915_ALPHA_SUPPORT b/baseconfig/x86/CONFIG_DRM_I915_ALPHA_SUPPORT similarity index 100% rename from baseconfig/CONFIG_DRM_I915_ALPHA_SUPPORT rename to baseconfig/x86/CONFIG_DRM_I915_ALPHA_SUPPORT diff --git a/baseconfig/CONFIG_DRM_I915_CAPTURE_ERROR b/baseconfig/x86/CONFIG_DRM_I915_CAPTURE_ERROR similarity index 100% rename from baseconfig/CONFIG_DRM_I915_CAPTURE_ERROR rename to baseconfig/x86/CONFIG_DRM_I915_CAPTURE_ERROR diff --git a/baseconfig/CONFIG_DRM_I915_COMPRESS_ERROR b/baseconfig/x86/CONFIG_DRM_I915_COMPRESS_ERROR similarity index 100% rename from baseconfig/CONFIG_DRM_I915_COMPRESS_ERROR rename to baseconfig/x86/CONFIG_DRM_I915_COMPRESS_ERROR diff --git a/baseconfig/CONFIG_DRM_I915_GVT b/baseconfig/x86/CONFIG_DRM_I915_GVT similarity index 100% rename from baseconfig/CONFIG_DRM_I915_GVT rename to baseconfig/x86/CONFIG_DRM_I915_GVT diff --git a/baseconfig/CONFIG_DRM_I915_GVT_KVMGT b/baseconfig/x86/CONFIG_DRM_I915_GVT_KVMGT similarity index 100% rename from baseconfig/CONFIG_DRM_I915_GVT_KVMGT rename to baseconfig/x86/CONFIG_DRM_I915_GVT_KVMGT diff --git a/baseconfig/CONFIG_DRM_I915_USERPTR b/baseconfig/x86/CONFIG_DRM_I915_USERPTR similarity index 100% rename from baseconfig/CONFIG_DRM_I915_USERPTR rename to baseconfig/x86/CONFIG_DRM_I915_USERPTR diff --git a/baseconfig/CONFIG_DRM_VMWGFX b/baseconfig/x86/CONFIG_DRM_VMWGFX similarity index 100% rename from baseconfig/CONFIG_DRM_VMWGFX rename to baseconfig/x86/CONFIG_DRM_VMWGFX diff --git a/baseconfig/CONFIG_DRM_VMWGFX_FBCON b/baseconfig/x86/CONFIG_DRM_VMWGFX_FBCON similarity index 100% rename from baseconfig/CONFIG_DRM_VMWGFX_FBCON rename to baseconfig/x86/CONFIG_DRM_VMWGFX_FBCON diff --git a/baseconfig/x86/CONFIG_ENA_ETHERNET b/baseconfig/x86/CONFIG_ENA_ETHERNET new file mode 100644 index 000000000..64c0a73c1 --- /dev/null +++ b/baseconfig/x86/CONFIG_ENA_ETHERNET @@ -0,0 +1 @@ +CONFIG_ENA_ETHERNET=m diff --git a/baseconfig/CONFIG_FB_ARC b/baseconfig/x86/CONFIG_FB_ARC similarity index 100% rename from baseconfig/CONFIG_FB_ARC rename to baseconfig/x86/CONFIG_FB_ARC diff --git a/baseconfig/CONFIG_FB_GEODE b/baseconfig/x86/CONFIG_FB_GEODE similarity index 100% rename from baseconfig/CONFIG_FB_GEODE rename to baseconfig/x86/CONFIG_FB_GEODE diff --git a/baseconfig/CONFIG_FB_HGA b/baseconfig/x86/CONFIG_FB_HGA similarity index 100% rename from baseconfig/CONFIG_FB_HGA rename to baseconfig/x86/CONFIG_FB_HGA diff --git a/baseconfig/CONFIG_FB_I810 b/baseconfig/x86/CONFIG_FB_I810 similarity index 100% rename from baseconfig/CONFIG_FB_I810 rename to baseconfig/x86/CONFIG_FB_I810 diff --git a/baseconfig/CONFIG_FB_I810_GTF b/baseconfig/x86/CONFIG_FB_I810_GTF similarity index 100% rename from baseconfig/CONFIG_FB_I810_GTF rename to baseconfig/x86/CONFIG_FB_I810_GTF diff --git a/baseconfig/CONFIG_FB_I810_I2C b/baseconfig/x86/CONFIG_FB_I810_I2C similarity index 100% rename from baseconfig/CONFIG_FB_I810_I2C rename to baseconfig/x86/CONFIG_FB_I810_I2C diff --git a/baseconfig/CONFIG_FB_LE80578 b/baseconfig/x86/CONFIG_FB_LE80578 similarity index 100% rename from baseconfig/CONFIG_FB_LE80578 rename to baseconfig/x86/CONFIG_FB_LE80578 diff --git a/baseconfig/CONFIG_FB_VGA16 b/baseconfig/x86/CONFIG_FB_VGA16 similarity index 100% rename from baseconfig/CONFIG_FB_VGA16 rename to baseconfig/x86/CONFIG_FB_VGA16 diff --git a/baseconfig/CONFIG_FB_VIA b/baseconfig/x86/CONFIG_FB_VIA similarity index 100% rename from baseconfig/CONFIG_FB_VIA rename to baseconfig/x86/CONFIG_FB_VIA diff --git a/baseconfig/CONFIG_FB_VIA_DIRECT_PROCFS b/baseconfig/x86/CONFIG_FB_VIA_DIRECT_PROCFS similarity index 100% rename from baseconfig/CONFIG_FB_VIA_DIRECT_PROCFS rename to baseconfig/x86/CONFIG_FB_VIA_DIRECT_PROCFS diff --git a/baseconfig/CONFIG_GPIO_AMD8111 b/baseconfig/x86/CONFIG_GPIO_AMD8111 similarity index 100% rename from baseconfig/CONFIG_GPIO_AMD8111 rename to baseconfig/x86/CONFIG_GPIO_AMD8111 diff --git a/baseconfig/CONFIG_GPIO_CS5535 b/baseconfig/x86/CONFIG_GPIO_CS5535 similarity index 100% rename from baseconfig/CONFIG_GPIO_CS5535 rename to baseconfig/x86/CONFIG_GPIO_CS5535 diff --git a/baseconfig/CONFIG_GPIO_ML_IOH b/baseconfig/x86/CONFIG_GPIO_ML_IOH similarity index 100% rename from baseconfig/CONFIG_GPIO_ML_IOH rename to baseconfig/x86/CONFIG_GPIO_ML_IOH diff --git a/baseconfig/CONFIG_GPIO_SCH b/baseconfig/x86/CONFIG_GPIO_SCH similarity index 100% rename from baseconfig/CONFIG_GPIO_SCH rename to baseconfig/x86/CONFIG_GPIO_SCH diff --git a/baseconfig/CONFIG_GPIO_VX855 b/baseconfig/x86/CONFIG_GPIO_VX855 similarity index 100% rename from baseconfig/CONFIG_GPIO_VX855 rename to baseconfig/x86/CONFIG_GPIO_VX855 diff --git a/baseconfig/x86/CONFIG_HDMI_LPE_AUDIO b/baseconfig/x86/CONFIG_HDMI_LPE_AUDIO new file mode 100644 index 000000000..a901acc4d --- /dev/null +++ b/baseconfig/x86/CONFIG_HDMI_LPE_AUDIO @@ -0,0 +1 @@ +CONFIG_HDMI_LPE_AUDIO=m diff --git a/baseconfig/CONFIG_I2C_PXA b/baseconfig/x86/CONFIG_I2C_PXA similarity index 100% rename from baseconfig/CONFIG_I2C_PXA rename to baseconfig/x86/CONFIG_I2C_PXA diff --git a/baseconfig/CONFIG_I2C_PXA_SLAVE b/baseconfig/x86/CONFIG_I2C_PXA_SLAVE similarity index 100% rename from baseconfig/CONFIG_I2C_PXA_SLAVE rename to baseconfig/x86/CONFIG_I2C_PXA_SLAVE diff --git a/baseconfig/CONFIG_IB700_WDT b/baseconfig/x86/CONFIG_IB700_WDT similarity index 100% rename from baseconfig/CONFIG_IB700_WDT rename to baseconfig/x86/CONFIG_IB700_WDT diff --git a/baseconfig/CONFIG_IBMASR b/baseconfig/x86/CONFIG_IBMASR similarity index 100% rename from baseconfig/CONFIG_IBMASR rename to baseconfig/x86/CONFIG_IBMASR diff --git a/baseconfig/CONFIG_INTEL_MENLOW b/baseconfig/x86/CONFIG_INTEL_MENLOW similarity index 100% rename from baseconfig/CONFIG_INTEL_MENLOW rename to baseconfig/x86/CONFIG_INTEL_MENLOW diff --git a/baseconfig/CONFIG_LEDS_INTEL_SS4200 b/baseconfig/x86/CONFIG_LEDS_INTEL_SS4200 similarity index 100% rename from baseconfig/CONFIG_LEDS_INTEL_SS4200 rename to baseconfig/x86/CONFIG_LEDS_INTEL_SS4200 diff --git a/baseconfig/x86/CONFIG_MFD_AXP20X b/baseconfig/x86/CONFIG_MFD_AXP20X deleted file mode 100644 index 1d658245a..000000000 --- a/baseconfig/x86/CONFIG_MFD_AXP20X +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MFD_AXP20X is not set diff --git a/baseconfig/x86/CONFIG_NIC7018_WDT b/baseconfig/x86/CONFIG_NIC7018_WDT new file mode 100644 index 000000000..9bc7a462a --- /dev/null +++ b/baseconfig/x86/CONFIG_NIC7018_WDT @@ -0,0 +1 @@ +CONFIG_NIC7018_WDT=m diff --git a/baseconfig/x86/CONFIG_PINCTRL_GEMINILAKE b/baseconfig/x86/CONFIG_PINCTRL_GEMINILAKE new file mode 100644 index 000000000..deb3b301d --- /dev/null +++ b/baseconfig/x86/CONFIG_PINCTRL_GEMINILAKE @@ -0,0 +1 @@ +# CONFIG_PINCTRL_GEMINILAKE is not set diff --git a/baseconfig/x86/CONFIG_PTP_1588_CLOCK_KVM b/baseconfig/x86/CONFIG_PTP_1588_CLOCK_KVM new file mode 100644 index 000000000..203f6b757 --- /dev/null +++ b/baseconfig/x86/CONFIG_PTP_1588_CLOCK_KVM @@ -0,0 +1 @@ +CONFIG_PTP_1588_CLOCK_KVM=m diff --git a/baseconfig/x86/CONFIG_SERIAL_8250_LPSS b/baseconfig/x86/CONFIG_SERIAL_8250_LPSS new file mode 100644 index 000000000..9d2401a32 --- /dev/null +++ b/baseconfig/x86/CONFIG_SERIAL_8250_LPSS @@ -0,0 +1 @@ +CONFIG_SERIAL_8250_LPSS=m diff --git a/baseconfig/x86/CONFIG_SILEAD_DMI b/baseconfig/x86/CONFIG_SILEAD_DMI new file mode 100644 index 000000000..3fd766126 --- /dev/null +++ b/baseconfig/x86/CONFIG_SILEAD_DMI @@ -0,0 +1 @@ +# CONFIG_SILEAD_DMI is not set diff --git a/baseconfig/x86/CONFIG_SND_SOC_ES8328 b/baseconfig/x86/CONFIG_SND_SOC_ES8328 new file mode 100644 index 000000000..806f698e1 --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_SOC_ES8328 @@ -0,0 +1 @@ +CONFIG_SND_SOC_ES8328=m diff --git a/baseconfig/x86/CONFIG_SND_SOC_ES8328_I2C b/baseconfig/x86/CONFIG_SND_SOC_ES8328_I2C new file mode 100644 index 000000000..9f90cb7e0 --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_SOC_ES8328_I2C @@ -0,0 +1 @@ +CONFIG_SND_SOC_ES8328_I2C=m diff --git a/baseconfig/x86/CONFIG_SND_SOC_ES8328_SPI b/baseconfig/x86/CONFIG_SND_SOC_ES8328_SPI new file mode 100644 index 000000000..0eb8f755c --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_SOC_ES8328_SPI @@ -0,0 +1 @@ +CONFIG_SND_SOC_ES8328_SPI=m diff --git a/baseconfig/x86/CONFIG_SND_SOC_NAU8540 b/baseconfig/x86/CONFIG_SND_SOC_NAU8540 new file mode 100644 index 000000000..9862521b0 --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_SOC_NAU8540 @@ -0,0 +1 @@ +CONFIG_SND_SOC_NAU8540=m diff --git a/baseconfig/x86/CONFIG_SND_SOC_TAS571X b/baseconfig/x86/CONFIG_SND_SOC_TAS571X deleted file mode 100644 index 5a0960c0f..000000000 --- a/baseconfig/x86/CONFIG_SND_SOC_TAS571X +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SND_SOC_TAS571X is not set diff --git a/baseconfig/x86/i686/CONFIG_SND_SOC_TS3A227E b/baseconfig/x86/CONFIG_SND_SOC_TS3A227E similarity index 100% rename from baseconfig/x86/i686/CONFIG_SND_SOC_TS3A227E rename to baseconfig/x86/CONFIG_SND_SOC_TS3A227E diff --git a/baseconfig/x86/CONFIG_SND_X86 b/baseconfig/x86/CONFIG_SND_X86 new file mode 100644 index 000000000..310c61afc --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_X86 @@ -0,0 +1 @@ +CONFIG_SND_X86=y diff --git a/baseconfig/CONFIG_VMWARE_BALLOON b/baseconfig/x86/CONFIG_VMWARE_BALLOON similarity index 100% rename from baseconfig/CONFIG_VMWARE_BALLOON rename to baseconfig/x86/CONFIG_VMWARE_BALLOON diff --git a/baseconfig/CONFIG_VMWARE_PVSCSI b/baseconfig/x86/CONFIG_VMWARE_PVSCSI similarity index 100% rename from baseconfig/CONFIG_VMWARE_PVSCSI rename to baseconfig/x86/CONFIG_VMWARE_PVSCSI diff --git a/baseconfig/x86/x86_64/CONFIG_XEN_PVH b/baseconfig/x86/CONFIG_XEN_PVH similarity index 100% rename from baseconfig/x86/x86_64/CONFIG_XEN_PVH rename to baseconfig/x86/CONFIG_XEN_PVH diff --git a/baseconfig/x86/i686/CONFIG_I2C_PXA b/baseconfig/x86/i686/CONFIG_I2C_PXA deleted file mode 100644 index 59d18f0cb..000000000 --- a/baseconfig/x86/i686/CONFIG_I2C_PXA +++ /dev/null @@ -1 +0,0 @@ -CONFIG_I2C_PXA=m diff --git a/baseconfig/x86/i686/CONFIG_LEDS_INTEL_SS4200 b/baseconfig/x86/i686/CONFIG_LEDS_INTEL_SS4200 deleted file mode 100644 index 9937903af..000000000 --- a/baseconfig/x86/i686/CONFIG_LEDS_INTEL_SS4200 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_LEDS_INTEL_SS4200=m diff --git a/baseconfig/x86/i686PAE/CONFIG_I2C_PXA b/baseconfig/x86/i686PAE/CONFIG_I2C_PXA deleted file mode 100644 index 59d18f0cb..000000000 --- a/baseconfig/x86/i686PAE/CONFIG_I2C_PXA +++ /dev/null @@ -1 +0,0 @@ -CONFIG_I2C_PXA=m diff --git a/baseconfig/x86/i686PAE/CONFIG_LEDS_INTEL_SS4200 b/baseconfig/x86/i686PAE/CONFIG_LEDS_INTEL_SS4200 deleted file mode 100644 index 9937903af..000000000 --- a/baseconfig/x86/i686PAE/CONFIG_LEDS_INTEL_SS4200 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_LEDS_INTEL_SS4200=m diff --git a/baseconfig/x86/i686PAE/CONFIG_SND_SOC_TS3A227E b/baseconfig/x86/i686PAE/CONFIG_SND_SOC_TS3A227E deleted file mode 100644 index 1d3522517..000000000 --- a/baseconfig/x86/i686PAE/CONFIG_SND_SOC_TS3A227E +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SND_SOC_TS3A227E=m diff --git a/baseconfig/x86/x86_64/CONFIG_EDAC_PND2 b/baseconfig/x86/x86_64/CONFIG_EDAC_PND2 new file mode 100644 index 000000000..d0b59df60 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EDAC_PND2 @@ -0,0 +1 @@ +CONFIG_EDAC_PND2=m diff --git a/baseconfig/x86/x86_64/CONFIG_INTEL_TURBO_MAX_3 b/baseconfig/x86/x86_64/CONFIG_INTEL_TURBO_MAX_3 new file mode 100644 index 000000000..9516cd8f6 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INTEL_TURBO_MAX_3 @@ -0,0 +1 @@ +CONFIG_INTEL_TURBO_MAX_3=y diff --git a/baseconfig/x86/x86_64/CONFIG_SND_SOC_TS3A227E b/baseconfig/x86/x86_64/CONFIG_SND_SOC_TS3A227E deleted file mode 100644 index 1d3522517..000000000 --- a/baseconfig/x86/x86_64/CONFIG_SND_SOC_TS3A227E +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SND_SOC_TS3A227E=m diff --git a/bcm283x-VEC.patch b/bcm283x-VEC.patch deleted file mode 100644 index f48105d8a..000000000 --- a/bcm283x-VEC.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 7713257febc1cdecdc55e1372ecef7263c58c03c Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Fri, 2 Dec 2016 14:48:12 +0100 -Subject: [PATCH] ARM: bcm/dt: Add VEC node in bcm283x.dtsi - -Add the VEC (Video EnCoder) node definition in bcm283x.dtsi. - -Signed-off-by: Boris Brezillon -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/bcm283x.dtsi | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index 9a44da1..a3106aa 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -476,6 +476,14 @@ - status = "disabled"; - }; - -+ vec: vec@7e806000 { -+ compatible = "brcm,bcm2835-vec"; -+ reg = <0x7e806000 0x1000>; -+ clocks = <&clocks BCM2835_CLOCK_VEC>; -+ interrupts = <2 27>; -+ status = "disabled"; -+ }; -+ - pixelvalve@7e807000 { - compatible = "brcm,bcm2835-pixelvalve2"; - reg = <0x7e807000 0x100>; -From 38742ca2b8b21bfc2a2cc24278b58485ff781644 Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Fri, 2 Dec 2016 14:48:13 +0100 -Subject: [PATCH] ARM: bcm/dt: Enable the VEC IP on all RaspberryPi boards - -Enable the VEC IP on all RaspberryPi boards. - -Signed-off-by: Boris Brezillon -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/bcm2835-rpi.dtsi | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi -index 6ddf7dfe..38e6050 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -87,3 +87,8 @@ - power-domains = <&power RPI_POWER_DOMAIN_HDMI>; - status = "okay"; - }; -+ -+&vec { -+ power-domains = <&power RPI_POWER_DOMAIN_VEC>; -+ status = "okay"; -+}; diff --git a/bcm283x-hdmi-audio.patch b/bcm283x-hdmi-audio.patch new file mode 100644 index 000000000..3ed3d2d34 --- /dev/null +++ b/bcm283x-hdmi-audio.patch @@ -0,0 +1,836 @@ +From bbcb8aacb871edf0360e808180162591b11c6a35 Mon Sep 17 00:00:00 2001 +From: Boris Brezillon +Date: Mon, 27 Feb 2017 12:28:01 -0800 +Subject: [PATCH 1/3] dt-bindings: Document the dmas and dma-names properties + for VC4 HDMI + +These are optional, but necessary for HDMI audio support. + +Signed-off-by: Boris Brezillon +Signed-off-by: Eric Anholt +Acked-by: Rob Herring +Link: http://patchwork.freedesktop.org/patch/msgid/20170227202803.12855-1-eric@anholt.net +--- + Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt +index 34c7fddcea39..ca02d3e4db91 100644 +--- a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt ++++ b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt +@@ -34,6 +34,9 @@ Optional properties for HDMI: + - hpd-gpios: The GPIO pin for HDMI hotplug detect (if it doesn't appear + as an interrupt/status bit in the HDMI controller + itself). See bindings/pinctrl/brcm,bcm2835-gpio.txt ++- dmas: Should contain one entry pointing to the DMA channel used to ++ transfer audio data ++- dma-names: Should contain "audio-rx" + + Required properties for DPI: + - compatible: Should be "brcm,bcm2835-dpi" +-- +2.12.0 + +From 8e13e0d8ecf2202c707225a612d10c9534d849f7 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Mon, 27 Feb 2017 12:28:02 -0800 +Subject: [PATCH 2/3] drm/vc4: Add HDMI audio support + +The HDMI encoder IP embeds all needed blocks to output audio, with a +custom DAI called MAI moving audio between the two parts of the HDMI +core. This driver now exposes a sound card to let users stream audio +to their display. + +Using the hdmi-codec driver has been considered here, but MAI meant +having to significantly rework hdmi-codec, and it would have left +little shared code with the I2S mode anyway. + +The encoder requires that the audio be SPDIF-formatted frames only, +which alsalib will format-convert for us. + +This patch is the combined work of Eric Anholt (initial register setup +with a separate dmaengine driver and using simple-audio-card) and +Boris Brezillon (moving it all into HDMI, massive debug to get it +actually working), and which Eric has the permission to release. + +v2: Drop "-audio" from sound card name, since that's already implied + (suggestion by Boris) + +Signed-off-by: Eric Anholt +Acked-by: Boris Brezillon +Link: http://patchwork.freedesktop.org/patch/msgid/20170227202803.12855-2-eric@anholt.net +--- + drivers/gpu/drm/vc4/Kconfig | 4 + + drivers/gpu/drm/vc4/vc4_hdmi.c | 494 ++++++++++++++++++++++++++++++++++++++++- + drivers/gpu/drm/vc4/vc4_regs.h | 107 ++++++++- + 3 files changed, 603 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/vc4/Kconfig b/drivers/gpu/drm/vc4/Kconfig +index e1517d07cb7d..973b4203c0b2 100644 +--- a/drivers/gpu/drm/vc4/Kconfig ++++ b/drivers/gpu/drm/vc4/Kconfig +@@ -2,11 +2,15 @@ config DRM_VC4 + tristate "Broadcom VC4 Graphics" + depends on ARCH_BCM2835 || COMPILE_TEST + depends on DRM ++ depends on SND && SND_SOC + depends on COMMON_CLK + select DRM_KMS_HELPER + select DRM_KMS_CMA_HELPER + select DRM_GEM_CMA_HELPER + select DRM_PANEL ++ select SND_PCM ++ select SND_PCM_ELD ++ select SND_SOC_GENERIC_DMAENGINE_PCM + select DRM_MIPI_DSI + help + Choose this option if you have a system that has a Broadcom +diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c +index 93d5994f3a04..e4abf4bfc464 100644 +--- a/drivers/gpu/drm/vc4/vc4_hdmi.c ++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c +@@ -31,11 +31,27 @@ + #include "linux/clk.h" + #include "linux/component.h" + #include "linux/i2c.h" ++#include "linux/of_address.h" + #include "linux/of_gpio.h" + #include "linux/of_platform.h" ++#include "linux/rational.h" ++#include "sound/dmaengine_pcm.h" ++#include "sound/pcm_drm_eld.h" ++#include "sound/pcm_params.h" ++#include "sound/soc.h" + #include "vc4_drv.h" + #include "vc4_regs.h" + ++/* HDMI audio information */ ++struct vc4_hdmi_audio { ++ struct snd_soc_card card; ++ struct snd_soc_dai_link link; ++ int samplerate; ++ int channels; ++ struct snd_dmaengine_dai_dma_data dma_data; ++ struct snd_pcm_substream *substream; ++}; ++ + /* General HDMI hardware state. */ + struct vc4_hdmi { + struct platform_device *pdev; +@@ -43,6 +59,8 @@ struct vc4_hdmi { + struct drm_encoder *encoder; + struct drm_connector *connector; + ++ struct vc4_hdmi_audio audio; ++ + struct i2c_adapter *ddc; + void __iomem *hdmicore_regs; + void __iomem *hd_regs; +@@ -98,6 +116,10 @@ static const struct { + HDMI_REG(VC4_HDMI_SW_RESET_CONTROL), + HDMI_REG(VC4_HDMI_HOTPLUG_INT), + HDMI_REG(VC4_HDMI_HOTPLUG), ++ HDMI_REG(VC4_HDMI_MAI_CHANNEL_MAP), ++ HDMI_REG(VC4_HDMI_MAI_CONFIG), ++ HDMI_REG(VC4_HDMI_MAI_FORMAT), ++ HDMI_REG(VC4_HDMI_AUDIO_PACKET_CONFIG), + HDMI_REG(VC4_HDMI_RAM_PACKET_CONFIG), + HDMI_REG(VC4_HDMI_HORZA), + HDMI_REG(VC4_HDMI_HORZB), +@@ -108,6 +130,7 @@ static const struct { + HDMI_REG(VC4_HDMI_VERTB0), + HDMI_REG(VC4_HDMI_VERTB1), + HDMI_REG(VC4_HDMI_TX_PHY_RESET_CTL), ++ HDMI_REG(VC4_HDMI_TX_PHY_CTL0), + }; + + static const struct { +@@ -116,6 +139,9 @@ static const struct { + } hd_regs[] = { + HDMI_REG(VC4_HD_M_CTL), + HDMI_REG(VC4_HD_MAI_CTL), ++ HDMI_REG(VC4_HD_MAI_THR), ++ HDMI_REG(VC4_HD_MAI_FMT), ++ HDMI_REG(VC4_HD_MAI_SMP), + HDMI_REG(VC4_HD_VID_CTL), + HDMI_REG(VC4_HD_CSC_CTL), + HDMI_REG(VC4_HD_FRAME_COUNT), +@@ -215,6 +241,7 @@ static int vc4_hdmi_connector_get_modes(struct drm_connector *connector) + + drm_mode_connector_update_edid_property(connector, edid); + ret = drm_add_edid_modes(connector, edid); ++ drm_edid_to_eld(connector, edid); + + return ret; + } +@@ -300,7 +327,7 @@ static void vc4_hdmi_write_infoframe(struct drm_encoder *encoder, + struct drm_device *dev = encoder->dev; + struct vc4_dev *vc4 = to_vc4_dev(dev); + u32 packet_id = frame->any.type - 0x80; +- u32 packet_reg = VC4_HDMI_GCP_0 + VC4_HDMI_PACKET_STRIDE * packet_id; ++ u32 packet_reg = VC4_HDMI_RAM_PACKET(packet_id); + uint8_t buffer[VC4_HDMI_PACKET_STRIDE]; + ssize_t len, i; + int ret; +@@ -381,6 +408,24 @@ static void vc4_hdmi_set_spd_infoframe(struct drm_encoder *encoder) + vc4_hdmi_write_infoframe(encoder, &frame); + } + ++static void vc4_hdmi_set_audio_infoframe(struct drm_encoder *encoder) ++{ ++ struct drm_device *drm = encoder->dev; ++ struct vc4_dev *vc4 = drm->dev_private; ++ struct vc4_hdmi *hdmi = vc4->hdmi; ++ union hdmi_infoframe frame; ++ int ret; ++ ++ ret = hdmi_audio_infoframe_init(&frame.audio); ++ ++ frame.audio.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM; ++ frame.audio.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM; ++ frame.audio.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM; ++ frame.audio.channels = hdmi->audio.channels; ++ ++ vc4_hdmi_write_infoframe(encoder, &frame); ++} ++ + static void vc4_hdmi_set_infoframes(struct drm_encoder *encoder) + { + vc4_hdmi_set_avi_infoframe(encoder); +@@ -589,6 +634,447 @@ static const struct drm_encoder_helper_funcs vc4_hdmi_encoder_helper_funcs = { + .enable = vc4_hdmi_encoder_enable, + }; + ++/* HDMI audio codec callbacks */ ++static void vc4_hdmi_audio_set_mai_clock(struct vc4_hdmi *hdmi) ++{ ++ struct drm_device *drm = hdmi->encoder->dev; ++ struct vc4_dev *vc4 = to_vc4_dev(drm); ++ u32 hsm_clock = clk_get_rate(hdmi->hsm_clock); ++ unsigned long n, m; ++ ++ rational_best_approximation(hsm_clock, hdmi->audio.samplerate, ++ VC4_HD_MAI_SMP_N_MASK >> ++ VC4_HD_MAI_SMP_N_SHIFT, ++ (VC4_HD_MAI_SMP_M_MASK >> ++ VC4_HD_MAI_SMP_M_SHIFT) + 1, ++ &n, &m); ++ ++ HD_WRITE(VC4_HD_MAI_SMP, ++ VC4_SET_FIELD(n, VC4_HD_MAI_SMP_N) | ++ VC4_SET_FIELD(m - 1, VC4_HD_MAI_SMP_M)); ++} ++ ++static void vc4_hdmi_set_n_cts(struct vc4_hdmi *hdmi) ++{ ++ struct drm_encoder *encoder = hdmi->encoder; ++ struct drm_crtc *crtc = encoder->crtc; ++ struct drm_device *drm = encoder->dev; ++ struct vc4_dev *vc4 = to_vc4_dev(drm); ++ const struct drm_display_mode *mode = &crtc->state->adjusted_mode; ++ u32 samplerate = hdmi->audio.samplerate; ++ u32 n, cts; ++ u64 tmp; ++ ++ n = 128 * samplerate / 1000; ++ tmp = (u64)(mode->clock * 1000) * n; ++ do_div(tmp, 128 * samplerate); ++ cts = tmp; ++ ++ HDMI_WRITE(VC4_HDMI_CRP_CFG, ++ VC4_HDMI_CRP_CFG_EXTERNAL_CTS_EN | ++ VC4_SET_FIELD(n, VC4_HDMI_CRP_CFG_N)); ++ ++ /* ++ * We could get slightly more accurate clocks in some cases by ++ * providing a CTS_1 value. The two CTS values are alternated ++ * between based on the period fields ++ */ ++ HDMI_WRITE(VC4_HDMI_CTS_0, cts); ++ HDMI_WRITE(VC4_HDMI_CTS_1, cts); ++} ++ ++static inline struct vc4_hdmi *dai_to_hdmi(struct snd_soc_dai *dai) ++{ ++ struct snd_soc_card *card = snd_soc_dai_get_drvdata(dai); ++ ++ return snd_soc_card_get_drvdata(card); ++} ++ ++static int vc4_hdmi_audio_startup(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); ++ struct drm_encoder *encoder = hdmi->encoder; ++ struct vc4_dev *vc4 = to_vc4_dev(encoder->dev); ++ int ret; ++ ++ if (hdmi->audio.substream && hdmi->audio.substream != substream) ++ return -EINVAL; ++ ++ hdmi->audio.substream = substream; ++ ++ /* ++ * If the HDMI encoder hasn't probed, or the encoder is ++ * currently in DVI mode, treat the codec dai as missing. ++ */ ++ if (!encoder->crtc || !(HDMI_READ(VC4_HDMI_RAM_PACKET_CONFIG) & ++ VC4_HDMI_RAM_PACKET_ENABLE)) ++ return -ENODEV; ++ ++ ret = snd_pcm_hw_constraint_eld(substream->runtime, ++ hdmi->connector->eld); ++ if (ret) ++ return ret; ++ ++ return 0; ++} ++ ++static int vc4_hdmi_audio_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) ++{ ++ return 0; ++} ++ ++static void vc4_hdmi_audio_reset(struct vc4_hdmi *hdmi) ++{ ++ struct drm_encoder *encoder = hdmi->encoder; ++ struct drm_device *drm = encoder->dev; ++ struct device *dev = &hdmi->pdev->dev; ++ struct vc4_dev *vc4 = to_vc4_dev(drm); ++ int ret; ++ ++ ret = vc4_hdmi_stop_packet(encoder, HDMI_INFOFRAME_TYPE_AUDIO); ++ if (ret) ++ dev_err(dev, "Failed to stop audio infoframe: %d\n", ret); ++ ++ HD_WRITE(VC4_HD_MAI_CTL, VC4_HD_MAI_CTL_RESET); ++ HD_WRITE(VC4_HD_MAI_CTL, VC4_HD_MAI_CTL_ERRORF); ++ HD_WRITE(VC4_HD_MAI_CTL, VC4_HD_MAI_CTL_FLUSH); ++} ++ ++static void vc4_hdmi_audio_shutdown(struct snd_pcm_substream *substream, ++ struct snd_soc_dai *dai) ++{ ++ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); ++ ++ if (substream != hdmi->audio.substream) ++ return; ++ ++ vc4_hdmi_audio_reset(hdmi); ++ ++ hdmi->audio.substream = NULL; ++} ++ ++/* HDMI audio codec callbacks */ ++static int vc4_hdmi_audio_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params, ++ struct snd_soc_dai *dai) ++{ ++ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); ++ struct drm_encoder *encoder = hdmi->encoder; ++ struct drm_device *drm = encoder->dev; ++ struct device *dev = &hdmi->pdev->dev; ++ struct vc4_dev *vc4 = to_vc4_dev(drm); ++ u32 audio_packet_config, channel_mask; ++ u32 channel_map, i; ++ ++ if (substream != hdmi->audio.substream) ++ return -EINVAL; ++ ++ dev_dbg(dev, "%s: %u Hz, %d bit, %d channels\n", __func__, ++ params_rate(params), params_width(params), ++ params_channels(params)); ++ ++ hdmi->audio.channels = params_channels(params); ++ hdmi->audio.samplerate = params_rate(params); ++ ++ HD_WRITE(VC4_HD_MAI_CTL, ++ VC4_HD_MAI_CTL_RESET | ++ VC4_HD_MAI_CTL_FLUSH | ++ VC4_HD_MAI_CTL_DLATE | ++ VC4_HD_MAI_CTL_ERRORE | ++ VC4_HD_MAI_CTL_ERRORF); ++ ++ vc4_hdmi_audio_set_mai_clock(hdmi); ++ ++ audio_packet_config = ++ VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_SAMPLE_FLAT | ++ VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_INACTIVE_CHANNELS | ++ VC4_SET_FIELD(0xf, VC4_HDMI_AUDIO_PACKET_B_FRAME_IDENTIFIER); ++ ++ channel_mask = GENMASK(hdmi->audio.channels - 1, 0); ++ audio_packet_config |= VC4_SET_FIELD(channel_mask, ++ VC4_HDMI_AUDIO_PACKET_CEA_MASK); ++ ++ /* Set the MAI threshold. This logic mimics the firmware's. */ ++ if (hdmi->audio.samplerate > 96000) { ++ HD_WRITE(VC4_HD_MAI_THR, ++ VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQHIGH) | ++ VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQLOW)); ++ } else if (hdmi->audio.samplerate > 48000) { ++ HD_WRITE(VC4_HD_MAI_THR, ++ VC4_SET_FIELD(0x14, VC4_HD_MAI_THR_DREQHIGH) | ++ VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQLOW)); ++ } else { ++ HD_WRITE(VC4_HD_MAI_THR, ++ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICHIGH) | ++ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICLOW) | ++ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQHIGH) | ++ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQLOW)); ++ } ++ ++ HDMI_WRITE(VC4_HDMI_MAI_CONFIG, ++ VC4_HDMI_MAI_CONFIG_BIT_REVERSE | ++ VC4_SET_FIELD(channel_mask, VC4_HDMI_MAI_CHANNEL_MASK)); ++ ++ channel_map = 0; ++ for (i = 0; i < 8; i++) { ++ if (channel_mask & BIT(i)) ++ channel_map |= i << (3 * i); ++ } ++ ++ HDMI_WRITE(VC4_HDMI_MAI_CHANNEL_MAP, channel_map); ++ HDMI_WRITE(VC4_HDMI_AUDIO_PACKET_CONFIG, audio_packet_config); ++ vc4_hdmi_set_n_cts(hdmi); ++ ++ return 0; ++} ++ ++static int vc4_hdmi_audio_trigger(struct snd_pcm_substream *substream, int cmd, ++ struct snd_soc_dai *dai) ++{ ++ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); ++ struct drm_encoder *encoder = hdmi->encoder; ++ struct drm_device *drm = encoder->dev; ++ struct vc4_dev *vc4 = to_vc4_dev(drm); ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ vc4_hdmi_set_audio_infoframe(encoder); ++ HDMI_WRITE(VC4_HDMI_TX_PHY_CTL0, ++ HDMI_READ(VC4_HDMI_TX_PHY_CTL0) & ++ ~VC4_HDMI_TX_PHY_RNG_PWRDN); ++ HD_WRITE(VC4_HD_MAI_CTL, ++ VC4_SET_FIELD(hdmi->audio.channels, ++ VC4_HD_MAI_CTL_CHNUM) | ++ VC4_HD_MAI_CTL_ENABLE); ++ break; ++ case SNDRV_PCM_TRIGGER_STOP: ++ HD_WRITE(VC4_HD_MAI_CTL, ++ VC4_HD_MAI_CTL_DLATE | ++ VC4_HD_MAI_CTL_ERRORE | ++ VC4_HD_MAI_CTL_ERRORF); ++ HDMI_WRITE(VC4_HDMI_TX_PHY_CTL0, ++ HDMI_READ(VC4_HDMI_TX_PHY_CTL0) | ++ VC4_HDMI_TX_PHY_RNG_PWRDN); ++ break; ++ default: ++ break; ++ } ++ ++ return 0; ++} ++ ++static inline struct vc4_hdmi * ++snd_component_to_hdmi(struct snd_soc_component *component) ++{ ++ struct snd_soc_card *card = snd_soc_component_get_drvdata(component); ++ ++ return snd_soc_card_get_drvdata(card); ++} ++ ++static int vc4_hdmi_audio_eld_ctl_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo) ++{ ++ struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); ++ struct vc4_hdmi *hdmi = snd_component_to_hdmi(component); ++ ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; ++ uinfo->count = sizeof(hdmi->connector->eld); ++ ++ return 0; ++} ++ ++static int vc4_hdmi_audio_eld_ctl_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); ++ struct vc4_hdmi *hdmi = snd_component_to_hdmi(component); ++ ++ memcpy(ucontrol->value.bytes.data, hdmi->connector->eld, ++ sizeof(hdmi->connector->eld)); ++ ++ return 0; ++} ++ ++static const struct snd_kcontrol_new vc4_hdmi_audio_controls[] = { ++ { ++ .access = SNDRV_CTL_ELEM_ACCESS_READ | ++ SNDRV_CTL_ELEM_ACCESS_VOLATILE, ++ .iface = SNDRV_CTL_ELEM_IFACE_PCM, ++ .name = "ELD", ++ .info = vc4_hdmi_audio_eld_ctl_info, ++ .get = vc4_hdmi_audio_eld_ctl_get, ++ }, ++}; ++ ++static const struct snd_soc_dapm_widget vc4_hdmi_audio_widgets[] = { ++ SND_SOC_DAPM_OUTPUT("TX"), ++}; ++ ++static const struct snd_soc_dapm_route vc4_hdmi_audio_routes[] = { ++ { "TX", NULL, "Playback" }, ++}; ++ ++static const struct snd_soc_codec_driver vc4_hdmi_audio_codec_drv = { ++ .component_driver = { ++ .controls = vc4_hdmi_audio_controls, ++ .num_controls = ARRAY_SIZE(vc4_hdmi_audio_controls), ++ .dapm_widgets = vc4_hdmi_audio_widgets, ++ .num_dapm_widgets = ARRAY_SIZE(vc4_hdmi_audio_widgets), ++ .dapm_routes = vc4_hdmi_audio_routes, ++ .num_dapm_routes = ARRAY_SIZE(vc4_hdmi_audio_routes), ++ }, ++}; ++ ++static const struct snd_soc_dai_ops vc4_hdmi_audio_dai_ops = { ++ .startup = vc4_hdmi_audio_startup, ++ .shutdown = vc4_hdmi_audio_shutdown, ++ .hw_params = vc4_hdmi_audio_hw_params, ++ .set_fmt = vc4_hdmi_audio_set_fmt, ++ .trigger = vc4_hdmi_audio_trigger, ++}; ++ ++static struct snd_soc_dai_driver vc4_hdmi_audio_codec_dai_drv = { ++ .name = "vc4-hdmi-hifi", ++ .playback = { ++ .stream_name = "Playback", ++ .channels_min = 2, ++ .channels_max = 8, ++ .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | ++ SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | ++ SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | ++ SNDRV_PCM_RATE_192000, ++ .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE, ++ }, ++}; ++ ++static const struct snd_soc_component_driver vc4_hdmi_audio_cpu_dai_comp = { ++ .name = "vc4-hdmi-cpu-dai-component", ++}; ++ ++static int vc4_hdmi_audio_cpu_dai_probe(struct snd_soc_dai *dai) ++{ ++ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); ++ ++ snd_soc_dai_init_dma_data(dai, &hdmi->audio.dma_data, NULL); ++ ++ return 0; ++} ++ ++static struct snd_soc_dai_driver vc4_hdmi_audio_cpu_dai_drv = { ++ .name = "vc4-hdmi-cpu-dai", ++ .probe = vc4_hdmi_audio_cpu_dai_probe, ++ .playback = { ++ .stream_name = "Playback", ++ .channels_min = 1, ++ .channels_max = 8, ++ .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | ++ SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | ++ SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | ++ SNDRV_PCM_RATE_192000, ++ .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE, ++ }, ++ .ops = &vc4_hdmi_audio_dai_ops, ++}; ++ ++static const struct snd_dmaengine_pcm_config pcm_conf = { ++ .chan_names[SNDRV_PCM_STREAM_PLAYBACK] = "audio-rx", ++ .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config, ++}; ++ ++static int vc4_hdmi_audio_init(struct vc4_hdmi *hdmi) ++{ ++ struct snd_soc_dai_link *dai_link = &hdmi->audio.link; ++ struct snd_soc_card *card = &hdmi->audio.card; ++ struct device *dev = &hdmi->pdev->dev; ++ const __be32 *addr; ++ int ret; ++ ++ if (!of_find_property(dev->of_node, "dmas", NULL)) { ++ dev_warn(dev, ++ "'dmas' DT property is missing, no HDMI audio\n"); ++ return 0; ++ } ++ ++ /* ++ * Get the physical address of VC4_HD_MAI_DATA. We need to retrieve ++ * the bus address specified in the DT, because the physical address ++ * (the one returned by platform_get_resource()) is not appropriate ++ * for DMA transfers. ++ * This VC/MMU should probably be exposed to avoid this kind of hacks. ++ */ ++ addr = of_get_address(dev->of_node, 1, NULL, NULL); ++ hdmi->audio.dma_data.addr = be32_to_cpup(addr) + VC4_HD_MAI_DATA; ++ hdmi->audio.dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; ++ hdmi->audio.dma_data.maxburst = 2; ++ ++ ret = devm_snd_dmaengine_pcm_register(dev, &pcm_conf, 0); ++ if (ret) { ++ dev_err(dev, "Could not register PCM component: %d\n", ret); ++ return ret; ++ } ++ ++ ret = devm_snd_soc_register_component(dev, &vc4_hdmi_audio_cpu_dai_comp, ++ &vc4_hdmi_audio_cpu_dai_drv, 1); ++ if (ret) { ++ dev_err(dev, "Could not register CPU DAI: %d\n", ret); ++ return ret; ++ } ++ ++ /* register codec and codec dai */ ++ ret = snd_soc_register_codec(dev, &vc4_hdmi_audio_codec_drv, ++ &vc4_hdmi_audio_codec_dai_drv, 1); ++ if (ret) { ++ dev_err(dev, "Could not register codec: %d\n", ret); ++ return ret; ++ } ++ ++ dai_link->name = "MAI"; ++ dai_link->stream_name = "MAI PCM"; ++ dai_link->codec_dai_name = vc4_hdmi_audio_codec_dai_drv.name; ++ dai_link->cpu_dai_name = dev_name(dev); ++ dai_link->codec_name = dev_name(dev); ++ dai_link->platform_name = dev_name(dev); ++ ++ card->dai_link = dai_link; ++ card->num_links = 1; ++ card->name = "vc4-hdmi"; ++ card->dev = dev; ++ ++ /* ++ * Be careful, snd_soc_register_card() calls dev_set_drvdata() and ++ * stores a pointer to the snd card object in dev->driver_data. This ++ * means we cannot use it for something else. The hdmi back-pointer is ++ * now stored in card->drvdata and should be retrieved with ++ * snd_soc_card_get_drvdata() if needed. ++ */ ++ snd_soc_card_set_drvdata(card, hdmi); ++ ret = devm_snd_soc_register_card(dev, card); ++ if (ret) { ++ dev_err(dev, "Could not register sound card: %d\n", ret); ++ goto unregister_codec; ++ } ++ ++ return 0; ++ ++unregister_codec: ++ snd_soc_unregister_codec(dev); ++ ++ return ret; ++} ++ ++static void vc4_hdmi_audio_cleanup(struct vc4_hdmi *hdmi) ++{ ++ struct device *dev = &hdmi->pdev->dev; ++ ++ /* ++ * If drvdata is not set this means the audio card was not ++ * registered, just skip codec unregistration in this case. ++ */ ++ if (dev_get_drvdata(dev)) ++ snd_soc_unregister_codec(dev); ++} ++ + static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) + { + struct platform_device *pdev = to_platform_device(dev); +@@ -720,6 +1206,10 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) + goto err_destroy_encoder; + } + ++ ret = vc4_hdmi_audio_init(hdmi); ++ if (ret) ++ goto err_destroy_encoder; ++ + return 0; + + err_destroy_encoder: +@@ -741,6 +1231,8 @@ static void vc4_hdmi_unbind(struct device *dev, struct device *master, + struct vc4_dev *vc4 = drm->dev_private; + struct vc4_hdmi *hdmi = vc4->hdmi; + ++ vc4_hdmi_audio_cleanup(hdmi); ++ + vc4_hdmi_connector_destroy(hdmi->connector); + vc4_hdmi_encoder_destroy(hdmi->encoder); + +diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h +index 385405a2df05..932093936178 100644 +--- a/drivers/gpu/drm/vc4/vc4_regs.h ++++ b/drivers/gpu/drm/vc4/vc4_regs.h +@@ -446,11 +446,62 @@ + #define VC4_HDMI_HOTPLUG 0x00c + # define VC4_HDMI_HOTPLUG_CONNECTED BIT(0) + ++/* 3 bits per field, where each field maps from that corresponding MAI ++ * bus channel to the given HDMI channel. ++ */ ++#define VC4_HDMI_MAI_CHANNEL_MAP 0x090 ++ ++#define VC4_HDMI_MAI_CONFIG 0x094 ++# define VC4_HDMI_MAI_CONFIG_FORMAT_REVERSE BIT(27) ++# define VC4_HDMI_MAI_CONFIG_BIT_REVERSE BIT(26) ++# define VC4_HDMI_MAI_CHANNEL_MASK_MASK VC4_MASK(15, 0) ++# define VC4_HDMI_MAI_CHANNEL_MASK_SHIFT 0 ++ ++/* Last received format word on the MAI bus. */ ++#define VC4_HDMI_MAI_FORMAT 0x098 ++ ++#define VC4_HDMI_AUDIO_PACKET_CONFIG 0x09c ++# define VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_SAMPLE_FLAT BIT(29) ++# define VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_INACTIVE_CHANNELS BIT(24) ++# define VC4_HDMI_AUDIO_PACKET_FORCE_SAMPLE_PRESENT BIT(19) ++# define VC4_HDMI_AUDIO_PACKET_FORCE_B_FRAME BIT(18) ++# define VC4_HDMI_AUDIO_PACKET_B_FRAME_IDENTIFIER_MASK VC4_MASK(13, 10) ++# define VC4_HDMI_AUDIO_PACKET_B_FRAME_IDENTIFIER_SHIFT 10 ++/* If set, then multichannel, otherwise 2 channel. */ ++# define VC4_HDMI_AUDIO_PACKET_AUDIO_LAYOUT BIT(9) ++/* If set, then AUDIO_LAYOUT overrides audio_cea_mask */ ++# define VC4_HDMI_AUDIO_PACKET_FORCE_AUDIO_LAYOUT BIT(8) ++# define VC4_HDMI_AUDIO_PACKET_CEA_MASK_MASK VC4_MASK(7, 0) ++# define VC4_HDMI_AUDIO_PACKET_CEA_MASK_SHIFT 0 ++ + #define VC4_HDMI_RAM_PACKET_CONFIG 0x0a0 + # define VC4_HDMI_RAM_PACKET_ENABLE BIT(16) + + #define VC4_HDMI_RAM_PACKET_STATUS 0x0a4 + ++#define VC4_HDMI_CRP_CFG 0x0a8 ++/* When set, the CTS_PERIOD counts based on MAI bus sync pulse instead ++ * of pixel clock. ++ */ ++# define VC4_HDMI_CRP_USE_MAI_BUS_SYNC_FOR_CTS BIT(26) ++/* When set, no CRP packets will be sent. */ ++# define VC4_HDMI_CRP_CFG_DISABLE BIT(25) ++/* If set, generates CTS values based on N, audio clock, and video ++ * clock. N must be divisible by 128. ++ */ ++# define VC4_HDMI_CRP_CFG_EXTERNAL_CTS_EN BIT(24) ++# define VC4_HDMI_CRP_CFG_N_MASK VC4_MASK(19, 0) ++# define VC4_HDMI_CRP_CFG_N_SHIFT 0 ++ ++/* 20-bit fields containing CTS values to be transmitted if !EXTERNAL_CTS_EN */ ++#define VC4_HDMI_CTS_0 0x0ac ++#define VC4_HDMI_CTS_1 0x0b0 ++/* 20-bit fields containing number of clocks to send CTS0/1 before ++ * switching to the other one. ++ */ ++#define VC4_HDMI_CTS_PERIOD_0 0x0b4 ++#define VC4_HDMI_CTS_PERIOD_1 0x0b8 ++ + #define VC4_HDMI_HORZA 0x0c4 + # define VC4_HDMI_HORZA_VPOS BIT(14) + # define VC4_HDMI_HORZA_HPOS BIT(13) +@@ -512,7 +563,11 @@ + + #define VC4_HDMI_TX_PHY_RESET_CTL 0x2c0 + +-#define VC4_HDMI_GCP_0 0x400 ++#define VC4_HDMI_TX_PHY_CTL0 0x2c4 ++# define VC4_HDMI_TX_PHY_RNG_PWRDN BIT(25) ++ ++#define VC4_HDMI_GCP(x) (0x400 + ((x) * 0x4)) ++#define VC4_HDMI_RAM_PACKET(x) (0x400 + ((x) * 0x24)) + #define VC4_HDMI_PACKET_STRIDE 0x24 + + #define VC4_HD_M_CTL 0x00c +@@ -522,6 +577,56 @@ + # define VC4_HD_M_ENABLE BIT(0) + + #define VC4_HD_MAI_CTL 0x014 ++/* Set when audio stream is received at a slower rate than the ++ * sampling period, so MAI fifo goes empty. Write 1 to clear. ++ */ ++# define VC4_HD_MAI_CTL_DLATE BIT(15) ++# define VC4_HD_MAI_CTL_BUSY BIT(14) ++# define VC4_HD_MAI_CTL_CHALIGN BIT(13) ++# define VC4_HD_MAI_CTL_WHOLSMP BIT(12) ++# define VC4_HD_MAI_CTL_FULL BIT(11) ++# define VC4_HD_MAI_CTL_EMPTY BIT(10) ++# define VC4_HD_MAI_CTL_FLUSH BIT(9) ++/* If set, MAI bus generates SPDIF (bit 31) parity instead of passing ++ * through. ++ */ ++# define VC4_HD_MAI_CTL_PAREN BIT(8) ++# define VC4_HD_MAI_CTL_CHNUM_MASK VC4_MASK(7, 4) ++# define VC4_HD_MAI_CTL_CHNUM_SHIFT 4 ++# define VC4_HD_MAI_CTL_ENABLE BIT(3) ++/* Underflow error status bit, write 1 to clear. */ ++# define VC4_HD_MAI_CTL_ERRORE BIT(2) ++/* Overflow error status bit, write 1 to clear. */ ++# define VC4_HD_MAI_CTL_ERRORF BIT(1) ++/* Single-shot reset bit. Read value is undefined. */ ++# define VC4_HD_MAI_CTL_RESET BIT(0) ++ ++#define VC4_HD_MAI_THR 0x018 ++# define VC4_HD_MAI_THR_PANICHIGH_MASK VC4_MASK(29, 24) ++# define VC4_HD_MAI_THR_PANICHIGH_SHIFT 24 ++# define VC4_HD_MAI_THR_PANICLOW_MASK VC4_MASK(21, 16) ++# define VC4_HD_MAI_THR_PANICLOW_SHIFT 16 ++# define VC4_HD_MAI_THR_DREQHIGH_MASK VC4_MASK(13, 8) ++# define VC4_HD_MAI_THR_DREQHIGH_SHIFT 8 ++# define VC4_HD_MAI_THR_DREQLOW_MASK VC4_MASK(5, 0) ++# define VC4_HD_MAI_THR_DREQLOW_SHIFT 0 ++ ++/* Format header to be placed on the MAI data. Unused. */ ++#define VC4_HD_MAI_FMT 0x01c ++ ++/* Register for DMAing in audio data to be transported over the MAI ++ * bus to the Falcon core. ++ */ ++#define VC4_HD_MAI_DATA 0x020 ++ ++/* Divider from HDMI HSM clock to MAI serial clock. Sampling period ++ * converges to N / (M + 1) cycles. ++ */ ++#define VC4_HD_MAI_SMP 0x02c ++# define VC4_HD_MAI_SMP_N_MASK VC4_MASK(31, 8) ++# define VC4_HD_MAI_SMP_N_SHIFT 8 ++# define VC4_HD_MAI_SMP_M_MASK VC4_MASK(7, 0) ++# define VC4_HD_MAI_SMP_M_SHIFT 0 + + #define VC4_HD_VID_CTL 0x038 + # define VC4_HD_VID_CTL_ENABLE BIT(31) +-- +2.12.0 + +From 25ea82d7f7c869ff81ff8e64d24c5c4a896239fe Mon Sep 17 00:00:00 2001 +From: Boris Brezillon +Date: Mon, 27 Feb 2017 12:28:03 -0800 +Subject: [PATCH 3/3] ARM: dts: bcm283x: Add HDMI audio related properties + +Add the dmas and dma-names properties to support HDMI audio. + +Signed-off-by: Boris Brezillon +Signed-off-by: Eric Anholt +--- + arch/arm/boot/dts/bcm283x.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi +index a3106aa446c6..a31b0b303ddc 100644 +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -499,6 +499,8 @@ + clocks = <&clocks BCM2835_PLLH_PIX>, + <&clocks BCM2835_CLOCK_HSM>; + clock-names = "pixel", "hdmi"; ++ dmas = <&dma 17>; ++ dma-names = "audio-rx"; + status = "disabled"; + }; + +-- +2.12.0 + diff --git a/bcm283x-mmc-bcm2835.patch b/bcm283x-mmc-bcm2835.patch new file mode 100644 index 000000000..d9591b438 --- /dev/null +++ b/bcm283x-mmc-bcm2835.patch @@ -0,0 +1,1932 @@ +From patchwork Wed Mar 8 09:19:01 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v4,1/7] dt-bindings: Add binding for brcm,bcm2835-sdhost. +From: Gerd Hoffmann +X-Patchwork-Id: 9610673 +Message-Id: <1488964751-22763-2-git-send-email-kraxel@redhat.com> +To: linux-rpi-kernel@lists.infradead.org +Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, + f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, + rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, + linux@armlinux.org.uk, + linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, + bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , + catalin.marinas@arm.com, linux-mmc@vger.kernel.org, + linux-arm-kernel@lists.infradead.org +Date: Wed, 8 Mar 2017 10:19:01 +0100 + +From: Eric Anholt + +This is the other SD controller on the platform, which can be swapped +to the role of SD card host using pin muxing. + +Signed-off-by: Eric Anholt +Signed-off-by: Gerd Hoffmann +Acked-by: Rob Herring +--- + .../bindings/mmc/brcm,bcm2835-sdhost.txt | 23 ++++++++++++++++++++++ + 1 file changed, 23 insertions(+) + create mode 100644 Documentation/devicetree/bindings/mmc/brcm,bcm2835-sdhost.txt + +diff --git a/Documentation/devicetree/bindings/mmc/brcm,bcm2835-sdhost.txt b/Documentation/devicetree/bindings/mmc/brcm,bcm2835-sdhost.txt +new file mode 100644 +index 0000000..d876580 +--- /dev/null ++++ b/Documentation/devicetree/bindings/mmc/brcm,bcm2835-sdhost.txt +@@ -0,0 +1,23 @@ ++Broadcom BCM2835 SDHOST controller ++ ++This file documents differences between the core properties described ++by mmc.txt and the properties that represent the BCM2835 controller. ++ ++Required properties: ++- compatible: Should be "brcm,bcm2835-sdhost". ++- clocks: The clock feeding the SDHOST controller. ++ ++Optional properties: ++- dmas: DMA channel for read and write. ++ See Documentation/devicetree/bindings/dma/dma.txt for details ++ ++Example: ++ ++sdhost: mmc@7e202000 { ++ compatible = "brcm,bcm2835-sdhost"; ++ reg = <0x7e202000 0x100>; ++ interrupts = <2 24>; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ dmas = <&dma 13>; ++ dma-names = "rx-tx"; ++}; +From patchwork Wed Mar 8 09:19:03 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v4,2/7] mmc: bcm2835: Add new driver for the sdhost controller. +From: Gerd Hoffmann +X-Patchwork-Id: 9610701 +Message-Id: <1488964751-22763-4-git-send-email-kraxel@redhat.com> +To: linux-rpi-kernel@lists.infradead.org +Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, + f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, + rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, + linux@armlinux.org.uk, + linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, + bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , + catalin.marinas@arm.com, linux-mmc@vger.kernel.org, + linux-arm-kernel@lists.infradead.org +Date: Wed, 8 Mar 2017 10:19:03 +0100 + +From: Eric Anholt + +The 2835 has two SD controllers: The Arasan sdhci controller (supported +by the iproc driver) and a custom sdhost controller. This patch adds a +driver for the latter. + +The sdhci controller supports both sdcard and sdio. The sdhost +controller supports the sdcard only, but has better performance. Also +note that the rpi3 has sdio wifi, so driving the sdcard with the sdhost +controller allows to use the sdhci controller for wifi support. + +The configuration is done by devicetree via pin muxing. Both SD +controller are available on the same pins (2 pin groups = pin 22 to 27 + +pin 48 to 53). So it's possible to use both SD controllers at the same +time with different pin groups. + +The code was originally written by Phil Elwell in the downstream +Rasbperry Pi tree. In preparation for the upstream merge it was +cleaned up and the code base was moderized by Eric Anholt, Stefan +Wahren and Gerd Hoffmann. + +Signed-off-by: Eric Anholt +Signed-off-by: Stefan Wahren +Signed-off-by: Gerd Hoffmann +--- + drivers/mmc/host/Kconfig | 14 + + drivers/mmc/host/Makefile | 1 + + drivers/mmc/host/bcm2835.c | 1465 ++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 1480 insertions(+) + create mode 100644 drivers/mmc/host/bcm2835.c + +diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig +index f08691a..a638cd0 100644 +--- a/drivers/mmc/host/Kconfig ++++ b/drivers/mmc/host/Kconfig +@@ -799,6 +799,20 @@ config MMC_TOSHIBA_PCI + depends on PCI + help + ++config MMC_BCM2835 ++ tristate "Broadcom BCM2835 SDHOST MMC Controller support" ++ depends on ARCH_BCM2835 || COMPILE_TEST ++ depends on HAS_DMA ++ help ++ This selects the BCM2835 SDHOST MMC controller. If you have ++ a BCM2835 platform with SD or MMC devices, say Y or M here. ++ ++ Note that the BCM2835 has two SD controllers: The Arasan ++ sdhci controller (supported by MMC_SDHCI_IPROC) and a custom ++ sdhost controller (supported by this driver). ++ ++ If unsure, say N. ++ + config MMC_MTK + tristate "MediaTek SD/MMC Card Interface support" + depends on HAS_DMA +diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile +index 6d548c4..bc2c2e2 100644 +--- a/drivers/mmc/host/Makefile ++++ b/drivers/mmc/host/Makefile +@@ -59,6 +59,7 @@ obj-$(CONFIG_MMC_MOXART) += moxart-mmc.o + obj-$(CONFIG_MMC_SUNXI) += sunxi-mmc.o + obj-$(CONFIG_MMC_USDHI6ROL0) += usdhi6rol0.o + obj-$(CONFIG_MMC_TOSHIBA_PCI) += toshsd.o ++obj-$(CONFIG_MMC_BCM2835) += bcm2835.o + + obj-$(CONFIG_MMC_REALTEK_PCI) += rtsx_pci_sdmmc.o + obj-$(CONFIG_MMC_REALTEK_USB) += rtsx_usb_sdmmc.o +diff --git a/drivers/mmc/host/bcm2835.c b/drivers/mmc/host/bcm2835.c +new file mode 100644 +index 0000000..7d1b0db7 +--- /dev/null ++++ b/drivers/mmc/host/bcm2835.c +@@ -0,0 +1,1465 @@ ++/* ++ * bcm2835 sdhost driver. ++ * ++ * The 2835 has two SD controllers: The Arasan sdhci controller ++ * (supported by the iproc driver) and a custom sdhost controller ++ * (supported by this driver). ++ * ++ * The sdhci controller supports both sdcard and sdio. The sdhost ++ * controller supports the sdcard only, but has better performance. ++ * Also note that the rpi3 has sdio wifi, so driving the sdcard with ++ * the sdhost controller allows to use the sdhci controller for wifi ++ * support. ++ * ++ * The configuration is done by devicetree via pin muxing. Both ++ * SD controller are available on the same pins (2 pin groups = pin 22 ++ * to 27 + pin 48 to 53). So it's possible to use both SD controllers ++ * at the same time with different pin groups. ++ * ++ * Author: Phil Elwell ++ * Copyright (C) 2015-2016 Raspberry Pi (Trading) Ltd. ++ * ++ * Based on ++ * mmc-bcm2835.c by Gellert Weisz ++ * which is, in turn, based on ++ * sdhci-bcm2708.c by Broadcom ++ * sdhci-bcm2835.c by Stephen Warren and Oleksandr Tymoshenko ++ * sdhci.c and sdhci-pci.c by Pierre Ossman ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms and conditions of the GNU General Public License, ++ * version 2, as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#define SDCMD 0x00 /* Command to SD card - 16 R/W */ ++#define SDARG 0x04 /* Argument to SD card - 32 R/W */ ++#define SDTOUT 0x08 /* Start value for timeout counter - 32 R/W */ ++#define SDCDIV 0x0c /* Start value for clock divider - 11 R/W */ ++#define SDRSP0 0x10 /* SD card response (31:0) - 32 R */ ++#define SDRSP1 0x14 /* SD card response (63:32) - 32 R */ ++#define SDRSP2 0x18 /* SD card response (95:64) - 32 R */ ++#define SDRSP3 0x1c /* SD card response (127:96) - 32 R */ ++#define SDHSTS 0x20 /* SD host status - 11 R/W */ ++#define SDVDD 0x30 /* SD card power control - 1 R/W */ ++#define SDEDM 0x34 /* Emergency Debug Mode - 13 R/W */ ++#define SDHCFG 0x38 /* Host configuration - 2 R/W */ ++#define SDHBCT 0x3c /* Host byte count (debug) - 32 R/W */ ++#define SDDATA 0x40 /* Data to/from SD card - 32 R/W */ ++#define SDHBLC 0x50 /* Host block count (SDIO/SDHC) - 9 R/W */ ++ ++#define SDCMD_NEW_FLAG 0x8000 ++#define SDCMD_FAIL_FLAG 0x4000 ++#define SDCMD_BUSYWAIT 0x800 ++#define SDCMD_NO_RESPONSE 0x400 ++#define SDCMD_LONG_RESPONSE 0x200 ++#define SDCMD_WRITE_CMD 0x80 ++#define SDCMD_READ_CMD 0x40 ++#define SDCMD_CMD_MASK 0x3f ++ ++#define SDCDIV_MAX_CDIV 0x7ff ++ ++#define SDHSTS_BUSY_IRPT 0x400 ++#define SDHSTS_BLOCK_IRPT 0x200 ++#define SDHSTS_SDIO_IRPT 0x100 ++#define SDHSTS_REW_TIME_OUT 0x80 ++#define SDHSTS_CMD_TIME_OUT 0x40 ++#define SDHSTS_CRC16_ERROR 0x20 ++#define SDHSTS_CRC7_ERROR 0x10 ++#define SDHSTS_FIFO_ERROR 0x08 ++/* Reserved */ ++/* Reserved */ ++#define SDHSTS_DATA_FLAG 0x01 ++ ++#define SDHSTS_TRANSFER_ERROR_MASK (SDHSTS_CRC7_ERROR | \ ++ SDHSTS_CRC16_ERROR | \ ++ SDHSTS_REW_TIME_OUT | \ ++ SDHSTS_FIFO_ERROR) ++ ++#define SDHSTS_ERROR_MASK (SDHSTS_CMD_TIME_OUT | \ ++ SDHSTS_TRANSFER_ERROR_MASK) ++ ++#define SDHCFG_BUSY_IRPT_EN BIT(10) ++#define SDHCFG_BLOCK_IRPT_EN BIT(8) ++#define SDHCFG_SDIO_IRPT_EN BIT(5) ++#define SDHCFG_DATA_IRPT_EN BIT(4) ++#define SDHCFG_SLOW_CARD BIT(3) ++#define SDHCFG_WIDE_EXT_BUS BIT(2) ++#define SDHCFG_WIDE_INT_BUS BIT(1) ++#define SDHCFG_REL_CMD_LINE BIT(0) ++ ++#define SDVDD_POWER_OFF 0 ++#define SDVDD_POWER_ON 1 ++ ++#define SDEDM_FORCE_DATA_MODE BIT(19) ++#define SDEDM_CLOCK_PULSE BIT(20) ++#define SDEDM_BYPASS BIT(21) ++ ++#define SDEDM_WRITE_THRESHOLD_SHIFT 9 ++#define SDEDM_READ_THRESHOLD_SHIFT 14 ++#define SDEDM_THRESHOLD_MASK 0x1f ++ ++#define SDEDM_FSM_MASK 0xf ++#define SDEDM_FSM_IDENTMODE 0x0 ++#define SDEDM_FSM_DATAMODE 0x1 ++#define SDEDM_FSM_READDATA 0x2 ++#define SDEDM_FSM_WRITEDATA 0x3 ++#define SDEDM_FSM_READWAIT 0x4 ++#define SDEDM_FSM_READCRC 0x5 ++#define SDEDM_FSM_WRITECRC 0x6 ++#define SDEDM_FSM_WRITEWAIT1 0x7 ++#define SDEDM_FSM_POWERDOWN 0x8 ++#define SDEDM_FSM_POWERUP 0x9 ++#define SDEDM_FSM_WRITESTART1 0xa ++#define SDEDM_FSM_WRITESTART2 0xb ++#define SDEDM_FSM_GENPULSES 0xc ++#define SDEDM_FSM_WRITEWAIT2 0xd ++#define SDEDM_FSM_STARTPOWDOWN 0xf ++ ++#define SDDATA_FIFO_WORDS 16 ++ ++#define FIFO_READ_THRESHOLD 4 ++#define FIFO_WRITE_THRESHOLD 4 ++#define SDDATA_FIFO_PIO_BURST 8 ++ ++#define PIO_THRESHOLD 1 /* Maximum block count for PIO (0 = always DMA) */ ++ ++struct bcm2835_host { ++ spinlock_t lock; ++ struct mutex mutex; ++ ++ void __iomem *ioaddr; ++ u32 phys_addr; ++ ++ struct mmc_host *mmc; ++ struct platform_device *pdev; ++ ++ int clock; /* Current clock speed */ ++ unsigned int max_clk; /* Max possible freq */ ++ struct work_struct dma_work; ++ struct delayed_work timeout_work; /* Timer for timeouts */ ++ struct sg_mapping_iter sg_miter; /* SG state for PIO */ ++ unsigned int blocks; /* remaining PIO blocks */ ++ int irq; /* Device IRQ */ ++ ++ u32 ns_per_fifo_word; ++ ++ /* cached registers */ ++ u32 hcfg; ++ u32 cdiv; ++ ++ struct mmc_request *mrq; /* Current request */ ++ struct mmc_command *cmd; /* Current command */ ++ struct mmc_data *data; /* Current data request */ ++ bool data_complete:1;/* Data finished before cmd */ ++ bool use_busy:1; /* Wait for busy interrupt */ ++ bool use_sbc:1; /* Send CMD23 */ ++ ++ /* for threaded irq handler */ ++ bool irq_block; ++ bool irq_busy; ++ bool irq_data; ++ ++ /* DMA part */ ++ struct dma_chan *dma_chan_rxtx; ++ struct dma_chan *dma_chan; ++ struct dma_slave_config dma_cfg_rx; ++ struct dma_slave_config dma_cfg_tx; ++ struct dma_async_tx_descriptor *dma_desc; ++ u32 dma_dir; ++ u32 drain_words; ++ struct page *drain_page; ++ u32 drain_offset; ++ bool use_dma; ++}; ++ ++static void bcm2835_dumpcmd(struct bcm2835_host *host, struct mmc_command *cmd, ++ const char *label) ++{ ++ struct device *dev = &host->pdev->dev; ++ ++ if (!cmd) ++ return; ++ ++ dev_dbg(dev, "%c%s op %d arg 0x%x flags 0x%x - resp %08x %08x %08x %08x, err %d\n", ++ (cmd == host->cmd) ? '>' : ' ', ++ label, cmd->opcode, cmd->arg, cmd->flags, ++ cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3], ++ cmd->error); ++} ++ ++static void bcm2835_dumpregs(struct bcm2835_host *host) ++{ ++ struct mmc_request *mrq = host->mrq; ++ struct device *dev = &host->pdev->dev; ++ ++ if (mrq) { ++ bcm2835_dumpcmd(host, mrq->sbc, "sbc"); ++ bcm2835_dumpcmd(host, mrq->cmd, "cmd"); ++ if (mrq->data) { ++ dev_dbg(dev, "data blocks %x blksz %x - err %d\n", ++ mrq->data->blocks, ++ mrq->data->blksz, ++ mrq->data->error); ++ } ++ bcm2835_dumpcmd(host, mrq->stop, "stop"); ++ } ++ ++ dev_dbg(dev, "=========== REGISTER DUMP ===========\n"); ++ dev_dbg(dev, "SDCMD 0x%08x\n", readl(host->ioaddr + SDCMD)); ++ dev_dbg(dev, "SDARG 0x%08x\n", readl(host->ioaddr + SDARG)); ++ dev_dbg(dev, "SDTOUT 0x%08x\n", readl(host->ioaddr + SDTOUT)); ++ dev_dbg(dev, "SDCDIV 0x%08x\n", readl(host->ioaddr + SDCDIV)); ++ dev_dbg(dev, "SDRSP0 0x%08x\n", readl(host->ioaddr + SDRSP0)); ++ dev_dbg(dev, "SDRSP1 0x%08x\n", readl(host->ioaddr + SDRSP1)); ++ dev_dbg(dev, "SDRSP2 0x%08x\n", readl(host->ioaddr + SDRSP2)); ++ dev_dbg(dev, "SDRSP3 0x%08x\n", readl(host->ioaddr + SDRSP3)); ++ dev_dbg(dev, "SDHSTS 0x%08x\n", readl(host->ioaddr + SDHSTS)); ++ dev_dbg(dev, "SDVDD 0x%08x\n", readl(host->ioaddr + SDVDD)); ++ dev_dbg(dev, "SDEDM 0x%08x\n", readl(host->ioaddr + SDEDM)); ++ dev_dbg(dev, "SDHCFG 0x%08x\n", readl(host->ioaddr + SDHCFG)); ++ dev_dbg(dev, "SDHBCT 0x%08x\n", readl(host->ioaddr + SDHBCT)); ++ dev_dbg(dev, "SDHBLC 0x%08x\n", readl(host->ioaddr + SDHBLC)); ++ dev_dbg(dev, "===========================================\n"); ++} ++ ++static void bcm2835_reset_internal(struct bcm2835_host *host) ++{ ++ u32 temp; ++ ++ writel(SDVDD_POWER_OFF, host->ioaddr + SDVDD); ++ writel(0, host->ioaddr + SDCMD); ++ writel(0, host->ioaddr + SDARG); ++ writel(0xf00000, host->ioaddr + SDTOUT); ++ writel(0, host->ioaddr + SDCDIV); ++ writel(0x7f8, host->ioaddr + SDHSTS); /* Write 1s to clear */ ++ writel(0, host->ioaddr + SDHCFG); ++ writel(0, host->ioaddr + SDHBCT); ++ writel(0, host->ioaddr + SDHBLC); ++ ++ /* Limit fifo usage due to silicon bug */ ++ temp = readl(host->ioaddr + SDEDM); ++ temp &= ~((SDEDM_THRESHOLD_MASK << SDEDM_READ_THRESHOLD_SHIFT) | ++ (SDEDM_THRESHOLD_MASK << SDEDM_WRITE_THRESHOLD_SHIFT)); ++ temp |= (FIFO_READ_THRESHOLD << SDEDM_READ_THRESHOLD_SHIFT) | ++ (FIFO_WRITE_THRESHOLD << SDEDM_WRITE_THRESHOLD_SHIFT); ++ writel(temp, host->ioaddr + SDEDM); ++ msleep(20); ++ writel(SDVDD_POWER_ON, host->ioaddr + SDVDD); ++ msleep(20); ++ host->clock = 0; ++ writel(host->hcfg, host->ioaddr + SDHCFG); ++ writel(host->cdiv, host->ioaddr + SDCDIV); ++} ++ ++static void bcm2835_reset(struct mmc_host *mmc) ++{ ++ struct bcm2835_host *host = mmc_priv(mmc); ++ ++ if (host->dma_chan) ++ dmaengine_terminate_sync(host->dma_chan); ++ bcm2835_reset_internal(host); ++} ++ ++static void bcm2835_finish_command(struct bcm2835_host *host); ++ ++static void bcm2835_wait_transfer_complete(struct bcm2835_host *host) ++{ ++ int timediff; ++ u32 alternate_idle; ++ ++ alternate_idle = (host->mrq->data->flags & MMC_DATA_READ) ? ++ SDEDM_FSM_READWAIT : SDEDM_FSM_WRITESTART1; ++ ++ timediff = 0; ++ ++ while (1) { ++ u32 edm, fsm; ++ ++ edm = readl(host->ioaddr + SDEDM); ++ fsm = edm & SDEDM_FSM_MASK; ++ ++ if ((fsm == SDEDM_FSM_IDENTMODE) || ++ (fsm == SDEDM_FSM_DATAMODE)) ++ break; ++ if (fsm == alternate_idle) { ++ writel(edm | SDEDM_FORCE_DATA_MODE, ++ host->ioaddr + SDEDM); ++ break; ++ } ++ ++ timediff++; ++ if (timediff == 100000) { ++ dev_err(&host->pdev->dev, ++ "wait_transfer_complete - still waiting after %d retries\n", ++ timediff); ++ bcm2835_dumpregs(host); ++ host->mrq->data->error = -ETIMEDOUT; ++ return; ++ } ++ cpu_relax(); ++ } ++} ++ ++static void bcm2835_dma_complete(void *param) ++{ ++ struct bcm2835_host *host = param; ++ ++ schedule_work(&host->dma_work); ++} ++ ++static void bcm2835_transfer_block_pio(struct bcm2835_host *host, bool is_read) ++{ ++ unsigned long flags; ++ size_t blksize; ++ unsigned long wait_max; ++ ++ blksize = host->data->blksz; ++ ++ wait_max = jiffies + msecs_to_jiffies(500); ++ ++ local_irq_save(flags); ++ ++ while (blksize) { ++ int copy_words; ++ u32 hsts = 0; ++ size_t len; ++ u32 *buf; ++ ++ if (!sg_miter_next(&host->sg_miter)) { ++ host->data->error = -EINVAL; ++ break; ++ } ++ ++ len = min(host->sg_miter.length, blksize); ++ if (len % 4) { ++ host->data->error = -EINVAL; ++ break; ++ } ++ ++ blksize -= len; ++ host->sg_miter.consumed = len; ++ ++ buf = (u32 *)host->sg_miter.addr; ++ ++ copy_words = len / 4; ++ ++ while (copy_words) { ++ int burst_words, words; ++ u32 edm; ++ ++ burst_words = min(SDDATA_FIFO_PIO_BURST, copy_words); ++ edm = readl(host->ioaddr + SDEDM); ++ if (is_read) ++ words = ((edm >> 4) & 0x1f); ++ else ++ words = SDDATA_FIFO_WORDS - ((edm >> 4) & 0x1f); ++ ++ if (words < burst_words) { ++ int fsm_state = (edm & SDEDM_FSM_MASK); ++ struct device *dev = &host->pdev->dev; ++ ++ if ((is_read && ++ (fsm_state != SDEDM_FSM_READDATA && ++ fsm_state != SDEDM_FSM_READWAIT && ++ fsm_state != SDEDM_FSM_READCRC)) || ++ (!is_read && ++ (fsm_state != SDEDM_FSM_WRITEDATA && ++ fsm_state != SDEDM_FSM_WRITESTART1 && ++ fsm_state != SDEDM_FSM_WRITESTART2))) { ++ hsts = readl(host->ioaddr + SDHSTS); ++ dev_err(dev, "fsm %x, hsts %08x\n", ++ fsm_state, hsts); ++ if (hsts & SDHSTS_ERROR_MASK) ++ break; ++ } ++ ++ if (time_after(jiffies, wait_max)) { ++ dev_err(dev, "PIO %s timeout - EDM %08x\n", ++ is_read ? "read" : "write", ++ edm); ++ hsts = SDHSTS_REW_TIME_OUT; ++ break; ++ } ++ ndelay((burst_words - words) * ++ host->ns_per_fifo_word); ++ continue; ++ } else if (words > copy_words) { ++ words = copy_words; ++ } ++ ++ copy_words -= words; ++ ++ while (words) { ++ if (is_read) ++ *(buf++) = readl(host->ioaddr + SDDATA); ++ else ++ writel(*(buf++), host->ioaddr + SDDATA); ++ words--; ++ } ++ } ++ ++ if (hsts & SDHSTS_ERROR_MASK) ++ break; ++ } ++ ++ sg_miter_stop(&host->sg_miter); ++ ++ local_irq_restore(flags); ++} ++ ++static void bcm2835_transfer_pio(struct bcm2835_host *host) ++{ ++ struct device *dev = &host->pdev->dev; ++ u32 sdhsts; ++ bool is_read; ++ ++ is_read = (host->data->flags & MMC_DATA_READ) != 0; ++ bcm2835_transfer_block_pio(host, is_read); ++ ++ sdhsts = readl(host->ioaddr + SDHSTS); ++ if (sdhsts & (SDHSTS_CRC16_ERROR | ++ SDHSTS_CRC7_ERROR | ++ SDHSTS_FIFO_ERROR)) { ++ dev_err(dev, "%s transfer error - HSTS %08x\n", ++ is_read ? "read" : "write", sdhsts); ++ host->data->error = -EILSEQ; ++ } else if ((sdhsts & (SDHSTS_CMD_TIME_OUT | ++ SDHSTS_REW_TIME_OUT))) { ++ dev_err(dev, "%s timeout error - HSTS %08x\n", ++ is_read ? "read" : "write", sdhsts); ++ host->data->error = -ETIMEDOUT; ++ } ++} ++ ++static ++void bcm2835_prepare_dma(struct bcm2835_host *host, struct mmc_data *data) ++{ ++ int len, dir_data, dir_slave; ++ struct dma_async_tx_descriptor *desc = NULL; ++ struct dma_chan *dma_chan; ++ ++ dma_chan = host->dma_chan_rxtx; ++ if (data->flags & MMC_DATA_READ) { ++ dir_data = DMA_FROM_DEVICE; ++ dir_slave = DMA_DEV_TO_MEM; ++ } else { ++ dir_data = DMA_TO_DEVICE; ++ dir_slave = DMA_MEM_TO_DEV; ++ } ++ ++ /* The block doesn't manage the FIFO DREQs properly for ++ * multi-block transfers, so don't attempt to DMA the final ++ * few words. Unfortunately this requires the final sg entry ++ * to be trimmed. N.B. This code demands that the overspill ++ * is contained in a single sg entry. ++ */ ++ ++ host->drain_words = 0; ++ if ((data->blocks > 1) && (dir_data == DMA_FROM_DEVICE)) { ++ struct scatterlist *sg; ++ u32 len; ++ int i; ++ ++ len = min((u32)(FIFO_READ_THRESHOLD - 1) * 4, ++ (u32)data->blocks * data->blksz); ++ ++ for_each_sg(data->sg, sg, data->sg_len, i) { ++ if (sg_is_last(sg)) { ++ WARN_ON(sg->length < len); ++ sg->length -= len; ++ host->drain_page = sg_page(sg); ++ host->drain_offset = sg->offset + sg->length; ++ } ++ } ++ host->drain_words = len / 4; ++ } ++ ++ /* The parameters have already been validated, so this will not fail */ ++ (void)dmaengine_slave_config(dma_chan, ++ (dir_data == DMA_FROM_DEVICE) ? ++ &host->dma_cfg_rx : ++ &host->dma_cfg_tx); ++ ++ len = dma_map_sg(dma_chan->device->dev, data->sg, data->sg_len, ++ dir_data); ++ ++ if (len > 0) { ++ desc = dmaengine_prep_slave_sg(dma_chan, data->sg, ++ len, dir_slave, ++ DMA_PREP_INTERRUPT | ++ DMA_CTRL_ACK); ++ } ++ ++ if (desc) { ++ desc->callback = bcm2835_dma_complete; ++ desc->callback_param = host; ++ host->dma_desc = desc; ++ host->dma_chan = dma_chan; ++ host->dma_dir = dir_data; ++ } ++} ++ ++static void bcm2835_start_dma(struct bcm2835_host *host) ++{ ++ dmaengine_submit(host->dma_desc); ++ dma_async_issue_pending(host->dma_chan); ++} ++ ++static void bcm2835_set_transfer_irqs(struct bcm2835_host *host) ++{ ++ u32 all_irqs = SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN | ++ SDHCFG_BUSY_IRPT_EN; ++ ++ if (host->dma_desc) { ++ host->hcfg = (host->hcfg & ~all_irqs) | ++ SDHCFG_BUSY_IRPT_EN; ++ } else { ++ host->hcfg = (host->hcfg & ~all_irqs) | ++ SDHCFG_DATA_IRPT_EN | ++ SDHCFG_BUSY_IRPT_EN; ++ } ++ ++ writel(host->hcfg, host->ioaddr + SDHCFG); ++} ++ ++static ++void bcm2835_prepare_data(struct bcm2835_host *host, struct mmc_command *cmd) ++{ ++ struct mmc_data *data = cmd->data; ++ ++ WARN_ON(host->data); ++ ++ host->data = data; ++ if (!data) ++ return; ++ ++ host->data_complete = false; ++ host->data->bytes_xfered = 0; ++ ++ if (!host->dma_desc) { ++ /* Use PIO */ ++ int flags = SG_MITER_ATOMIC; ++ ++ if (data->flags & MMC_DATA_READ) ++ flags |= SG_MITER_TO_SG; ++ else ++ flags |= SG_MITER_FROM_SG; ++ sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); ++ host->blocks = data->blocks; ++ } ++ ++ bcm2835_set_transfer_irqs(host); ++ ++ writel(data->blksz, host->ioaddr + SDHBCT); ++ writel(data->blocks, host->ioaddr + SDHBLC); ++} ++ ++static u32 bcm2835_read_wait_sdcmd(struct bcm2835_host *host, u32 max_ms) ++{ ++ struct device *dev = &host->pdev->dev; ++ u32 value; ++ int ret; ++ ++ ret = readl_poll_timeout(host->ioaddr + SDCMD, value, ++ !(value & SDCMD_NEW_FLAG), 1, 10); ++ if (ret == -ETIMEDOUT) ++ /* if it takes a while make poll interval bigger */ ++ ret = readl_poll_timeout(host->ioaddr + SDCMD, value, ++ !(value & SDCMD_NEW_FLAG), ++ 10, max_ms * 1000); ++ if (ret == -ETIMEDOUT) ++ dev_err(dev, "%s: timeout (%d ms)\n", __func__, max_ms); ++ ++ return value; ++} ++ ++static void bcm2835_finish_request(struct bcm2835_host *host) ++{ ++ struct dma_chan *terminate_chan = NULL; ++ struct mmc_request *mrq; ++ ++ cancel_delayed_work(&host->timeout_work); ++ ++ mrq = host->mrq; ++ ++ host->mrq = NULL; ++ host->cmd = NULL; ++ host->data = NULL; ++ ++ host->dma_desc = NULL; ++ terminate_chan = host->dma_chan; ++ host->dma_chan = NULL; ++ ++ if (terminate_chan) { ++ int err = dmaengine_terminate_all(terminate_chan); ++ ++ if (err) ++ dev_err(&host->pdev->dev, ++ "failed to terminate DMA (%d)\n", err); ++ } ++ ++ mmc_request_done(host->mmc, mrq); ++} ++ ++static ++bool bcm2835_send_command(struct bcm2835_host *host, struct mmc_command *cmd) ++{ ++ struct device *dev = &host->pdev->dev; ++ u32 sdcmd, sdhsts; ++ unsigned long timeout; ++ ++ WARN_ON(host->cmd); ++ ++ sdcmd = bcm2835_read_wait_sdcmd(host, 100); ++ if (sdcmd & SDCMD_NEW_FLAG) { ++ dev_err(dev, "previous command never completed.\n"); ++ bcm2835_dumpregs(host); ++ cmd->error = -EILSEQ; ++ bcm2835_finish_request(host); ++ return false; ++ } ++ ++ if (!cmd->data && cmd->busy_timeout > 9000) ++ timeout = DIV_ROUND_UP(cmd->busy_timeout, 1000) * HZ + HZ; ++ else ++ timeout = 10 * HZ; ++ schedule_delayed_work(&host->timeout_work, timeout); ++ ++ host->cmd = cmd; ++ ++ /* Clear any error flags */ ++ sdhsts = readl(host->ioaddr + SDHSTS); ++ if (sdhsts & SDHSTS_ERROR_MASK) ++ writel(sdhsts, host->ioaddr + SDHSTS); ++ ++ if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { ++ dev_err(dev, "unsupported response type!\n"); ++ cmd->error = -EINVAL; ++ bcm2835_finish_request(host); ++ return false; ++ } ++ ++ bcm2835_prepare_data(host, cmd); ++ ++ writel(cmd->arg, host->ioaddr + SDARG); ++ ++ sdcmd = cmd->opcode & SDCMD_CMD_MASK; ++ ++ host->use_busy = false; ++ if (!(cmd->flags & MMC_RSP_PRESENT)) { ++ sdcmd |= SDCMD_NO_RESPONSE; ++ } else { ++ if (cmd->flags & MMC_RSP_136) ++ sdcmd |= SDCMD_LONG_RESPONSE; ++ if (cmd->flags & MMC_RSP_BUSY) { ++ sdcmd |= SDCMD_BUSYWAIT; ++ host->use_busy = true; ++ } ++ } ++ ++ if (cmd->data) { ++ if (cmd->data->flags & MMC_DATA_WRITE) ++ sdcmd |= SDCMD_WRITE_CMD; ++ if (cmd->data->flags & MMC_DATA_READ) ++ sdcmd |= SDCMD_READ_CMD; ++ } ++ ++ writel(sdcmd | SDCMD_NEW_FLAG, host->ioaddr + SDCMD); ++ ++ return true; ++} ++ ++static void bcm2835_transfer_complete(struct bcm2835_host *host) ++{ ++ struct mmc_data *data; ++ ++ WARN_ON(!host->data_complete); ++ ++ data = host->data; ++ host->data = NULL; ++ ++ /* Need to send CMD12 if - ++ * a) open-ended multiblock transfer (no CMD23) ++ * b) error in multiblock transfer ++ */ ++ if (host->mrq->stop && (data->error || !host->use_sbc)) { ++ if (bcm2835_send_command(host, host->mrq->stop)) { ++ /* No busy, so poll for completion */ ++ if (!host->use_busy) ++ bcm2835_finish_command(host); ++ } ++ } else { ++ bcm2835_wait_transfer_complete(host); ++ bcm2835_finish_request(host); ++ } ++} ++ ++static void bcm2835_finish_data(struct bcm2835_host *host) ++{ ++ struct device *dev = &host->pdev->dev; ++ struct mmc_data *data; ++ ++ data = host->data; ++ ++ host->hcfg &= ~(SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN); ++ writel(host->hcfg, host->ioaddr + SDHCFG); ++ ++ data->bytes_xfered = data->error ? 0 : (data->blksz * data->blocks); ++ ++ host->data_complete = true; ++ ++ if (host->cmd) { ++ /* Data managed to finish before the ++ * command completed. Make sure we do ++ * things in the proper order. ++ */ ++ dev_dbg(dev, "Finished early - HSTS %08x\n", ++ readl(host->ioaddr + SDHSTS)); ++ } else { ++ bcm2835_transfer_complete(host); ++ } ++} ++ ++static void bcm2835_finish_command(struct bcm2835_host *host) ++{ ++ struct device *dev = &host->pdev->dev; ++ struct mmc_command *cmd = host->cmd; ++ u32 sdcmd; ++ ++ sdcmd = bcm2835_read_wait_sdcmd(host, 100); ++ ++ /* Check for errors */ ++ if (sdcmd & SDCMD_NEW_FLAG) { ++ dev_err(dev, "command never completed.\n"); ++ bcm2835_dumpregs(host); ++ host->cmd->error = -EIO; ++ bcm2835_finish_request(host); ++ return; ++ } else if (sdcmd & SDCMD_FAIL_FLAG) { ++ u32 sdhsts = readl(host->ioaddr + SDHSTS); ++ ++ /* Clear the errors */ ++ writel(SDHSTS_ERROR_MASK, host->ioaddr + SDHSTS); ++ ++ if (!(sdhsts & SDHSTS_CRC7_ERROR) || ++ (host->cmd->opcode != MMC_SEND_OP_COND)) { ++ if (sdhsts & SDHSTS_CMD_TIME_OUT) { ++ host->cmd->error = -ETIMEDOUT; ++ } else { ++ dev_err(dev, "unexpected command %d error\n", ++ host->cmd->opcode); ++ bcm2835_dumpregs(host); ++ host->cmd->error = -EILSEQ; ++ } ++ bcm2835_finish_request(host); ++ return; ++ } ++ } ++ ++ if (cmd->flags & MMC_RSP_PRESENT) { ++ if (cmd->flags & MMC_RSP_136) { ++ int i; ++ ++ for (i = 0; i < 4; i++) { ++ cmd->resp[3 - i] = ++ readl(host->ioaddr + SDRSP0 + i * 4); ++ } ++ } else { ++ cmd->resp[0] = readl(host->ioaddr + SDRSP0); ++ } ++ } ++ ++ if (cmd == host->mrq->sbc) { ++ /* Finished CMD23, now send actual command. */ ++ host->cmd = NULL; ++ if (bcm2835_send_command(host, host->mrq->cmd)) { ++ if (host->data && host->dma_desc) ++ /* DMA transfer starts now, PIO starts ++ * after irq ++ */ ++ bcm2835_start_dma(host); ++ ++ if (!host->use_busy) ++ bcm2835_finish_command(host); ++ } ++ } else if (cmd == host->mrq->stop) { ++ /* Finished CMD12 */ ++ bcm2835_finish_request(host); ++ } else { ++ /* Processed actual command. */ ++ host->cmd = NULL; ++ if (!host->data) ++ bcm2835_finish_request(host); ++ else if (host->data_complete) ++ bcm2835_transfer_complete(host); ++ } ++} ++ ++static void bcm2835_timeout(struct work_struct *work) ++{ ++ struct delayed_work *d = to_delayed_work(work); ++ struct bcm2835_host *host = ++ container_of(d, struct bcm2835_host, timeout_work); ++ struct device *dev = &host->pdev->dev; ++ ++ mutex_lock(&host->mutex); ++ ++ if (host->mrq) { ++ dev_err(dev, "timeout waiting for hardware interrupt.\n"); ++ bcm2835_dumpregs(host); ++ ++ if (host->data) { ++ host->data->error = -ETIMEDOUT; ++ bcm2835_finish_data(host); ++ } else { ++ if (host->cmd) ++ host->cmd->error = -ETIMEDOUT; ++ else ++ host->mrq->cmd->error = -ETIMEDOUT; ++ ++ bcm2835_finish_request(host); ++ } ++ } ++ ++ mutex_unlock(&host->mutex); ++} ++ ++static bool bcm2835_check_cmd_error(struct bcm2835_host *host, u32 intmask) ++{ ++ struct device *dev = &host->pdev->dev; ++ ++ if (!(intmask & SDHSTS_ERROR_MASK)) ++ return false; ++ ++ if (!host->cmd) ++ return true; ++ ++ dev_err(dev, "sdhost_busy_irq: intmask %08x\n", intmask); ++ if (intmask & SDHSTS_CRC7_ERROR) { ++ host->cmd->error = -EILSEQ; ++ } else if (intmask & (SDHSTS_CRC16_ERROR | ++ SDHSTS_FIFO_ERROR)) { ++ if (host->mrq->data) ++ host->mrq->data->error = -EILSEQ; ++ else ++ host->cmd->error = -EILSEQ; ++ } else if (intmask & SDHSTS_REW_TIME_OUT) { ++ if (host->mrq->data) ++ host->mrq->data->error = -ETIMEDOUT; ++ else ++ host->cmd->error = -ETIMEDOUT; ++ } else if (intmask & SDHSTS_CMD_TIME_OUT) { ++ host->cmd->error = -ETIMEDOUT; ++ } ++ bcm2835_dumpregs(host); ++ return true; ++} ++ ++static void bcm2835_check_data_error(struct bcm2835_host *host, u32 intmask) ++{ ++ if (!host->data) ++ return; ++ if (intmask & (SDHSTS_CRC16_ERROR | SDHSTS_FIFO_ERROR)) ++ host->data->error = -EILSEQ; ++ if (intmask & SDHSTS_REW_TIME_OUT) ++ host->data->error = -ETIMEDOUT; ++} ++ ++static void bcm2835_busy_irq(struct bcm2835_host *host) ++{ ++ if (WARN_ON(!host->cmd)) { ++ bcm2835_dumpregs(host); ++ return; ++ } ++ ++ if (WARN_ON(!host->use_busy)) { ++ bcm2835_dumpregs(host); ++ return; ++ } ++ host->use_busy = false; ++ ++ bcm2835_finish_command(host); ++} ++ ++static void bcm2835_data_irq(struct bcm2835_host *host, u32 intmask) ++{ ++ /* There are no dedicated data/space available interrupt ++ * status bits, so it is necessary to use the single shared ++ * data/space available FIFO status bits. It is therefore not ++ * an error to get here when there is no data transfer in ++ * progress. ++ */ ++ if (!host->data) ++ return; ++ ++ bcm2835_check_data_error(host, intmask); ++ if (host->data->error) ++ goto finished; ++ ++ if (host->data->flags & MMC_DATA_WRITE) { ++ /* Use the block interrupt for writes after the first block */ ++ host->hcfg &= ~(SDHCFG_DATA_IRPT_EN); ++ host->hcfg |= SDHCFG_BLOCK_IRPT_EN; ++ writel(host->hcfg, host->ioaddr + SDHCFG); ++ bcm2835_transfer_pio(host); ++ } else { ++ bcm2835_transfer_pio(host); ++ host->blocks--; ++ if ((host->blocks == 0) || host->data->error) ++ goto finished; ++ } ++ return; ++ ++finished: ++ host->hcfg &= ~(SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN); ++ writel(host->hcfg, host->ioaddr + SDHCFG); ++} ++ ++static void bcm2835_data_threaded_irq(struct bcm2835_host *host) ++{ ++ if (!host->data) ++ return; ++ if ((host->blocks == 0) || host->data->error) ++ bcm2835_finish_data(host); ++} ++ ++static void bcm2835_block_irq(struct bcm2835_host *host) ++{ ++ if (WARN_ON(!host->data)) { ++ bcm2835_dumpregs(host); ++ return; ++ } ++ ++ if (!host->dma_desc) { ++ WARN_ON(!host->blocks); ++ if (host->data->error || (--host->blocks == 0)) ++ bcm2835_finish_data(host); ++ else ++ bcm2835_transfer_pio(host); ++ } else if (host->data->flags & MMC_DATA_WRITE) { ++ bcm2835_finish_data(host); ++ } ++} ++ ++static irqreturn_t bcm2835_irq(int irq, void *dev_id) ++{ ++ irqreturn_t result = IRQ_NONE; ++ struct bcm2835_host *host = dev_id; ++ u32 intmask; ++ ++ spin_lock(&host->lock); ++ ++ intmask = readl(host->ioaddr + SDHSTS); ++ ++ writel(SDHSTS_BUSY_IRPT | ++ SDHSTS_BLOCK_IRPT | ++ SDHSTS_SDIO_IRPT | ++ SDHSTS_DATA_FLAG, ++ host->ioaddr + SDHSTS); ++ ++ if (intmask & SDHSTS_BLOCK_IRPT) { ++ bcm2835_check_data_error(host, intmask); ++ host->irq_block = true; ++ result = IRQ_WAKE_THREAD; ++ } ++ ++ if (intmask & SDHSTS_BUSY_IRPT) { ++ if (!bcm2835_check_cmd_error(host, intmask)) { ++ host->irq_busy = true; ++ result = IRQ_WAKE_THREAD; ++ } else { ++ result = IRQ_HANDLED; ++ } ++ } ++ ++ /* There is no true data interrupt status bit, so it is ++ * necessary to qualify the data flag with the interrupt ++ * enable bit. ++ */ ++ if ((intmask & SDHSTS_DATA_FLAG) && ++ (host->hcfg & SDHCFG_DATA_IRPT_EN)) { ++ bcm2835_data_irq(host, intmask); ++ host->irq_data = true; ++ result = IRQ_WAKE_THREAD; ++ } ++ ++ spin_unlock(&host->lock); ++ ++ return result; ++} ++ ++static irqreturn_t bcm2835_threaded_irq(int irq, void *dev_id) ++{ ++ struct bcm2835_host *host = dev_id; ++ unsigned long flags; ++ bool block, busy, data; ++ ++ spin_lock_irqsave(&host->lock, flags); ++ ++ block = host->irq_block; ++ busy = host->irq_busy; ++ data = host->irq_data; ++ host->irq_block = false; ++ host->irq_busy = false; ++ host->irq_data = false; ++ ++ spin_unlock_irqrestore(&host->lock, flags); ++ ++ mutex_lock(&host->mutex); ++ ++ if (block) ++ bcm2835_block_irq(host); ++ if (busy) ++ bcm2835_busy_irq(host); ++ if (data) ++ bcm2835_data_threaded_irq(host); ++ ++ mutex_unlock(&host->mutex); ++ ++ return IRQ_HANDLED; ++} ++ ++static void bcm2835_dma_complete_work(struct work_struct *work) ++{ ++ struct bcm2835_host *host = ++ container_of(work, struct bcm2835_host, dma_work); ++ struct mmc_data *data = host->data; ++ ++ mutex_lock(&host->mutex); ++ ++ if (host->dma_chan) { ++ dma_unmap_sg(host->dma_chan->device->dev, ++ data->sg, data->sg_len, ++ host->dma_dir); ++ ++ host->dma_chan = NULL; ++ } ++ ++ if (host->drain_words) { ++ unsigned long flags; ++ void *page; ++ u32 *buf; ++ ++ if (host->drain_offset & PAGE_MASK) { ++ host->drain_page += host->drain_offset >> PAGE_SHIFT; ++ host->drain_offset &= ~PAGE_MASK; ++ } ++ local_irq_save(flags); ++ page = kmap_atomic(host->drain_page); ++ buf = page + host->drain_offset; ++ ++ while (host->drain_words) { ++ u32 edm = readl(host->ioaddr + SDEDM); ++ ++ if ((edm >> 4) & 0x1f) ++ *(buf++) = readl(host->ioaddr + SDDATA); ++ host->drain_words--; ++ } ++ ++ kunmap_atomic(page); ++ local_irq_restore(flags); ++ } ++ ++ bcm2835_finish_data(host); ++ ++ mutex_unlock(&host->mutex); ++} ++ ++static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock) ++{ ++ int div; ++ ++ /* The SDCDIV register has 11 bits, and holds (div - 2). But ++ * in data mode the max is 50MHz wihout a minimum, and only ++ * the bottom 3 bits are used. Since the switch over is ++ * automatic (unless we have marked the card as slow...), ++ * chosen values have to make sense in both modes. Ident mode ++ * must be 100-400KHz, so can range check the requested ++ * clock. CMD15 must be used to return to data mode, so this ++ * can be monitored. ++ * ++ * clock 250MHz -> 0->125MHz, 1->83.3MHz, 2->62.5MHz, 3->50.0MHz ++ * 4->41.7MHz, 5->35.7MHz, 6->31.3MHz, 7->27.8MHz ++ * ++ * 623->400KHz/27.8MHz ++ * reset value (507)->491159/50MHz ++ * ++ * BUT, the 3-bit clock divisor in data mode is too small if ++ * the core clock is higher than 250MHz, so instead use the ++ * SLOW_CARD configuration bit to force the use of the ident ++ * clock divisor at all times. ++ */ ++ ++ if (clock < 100000) { ++ /* Can't stop the clock, but make it as slow as possible ++ * to show willing ++ */ ++ host->cdiv = SDCDIV_MAX_CDIV; ++ writel(host->cdiv, host->ioaddr + SDCDIV); ++ return; ++ } ++ ++ div = host->max_clk / clock; ++ if (div < 2) ++ div = 2; ++ if ((host->max_clk / div) > clock) ++ div++; ++ div -= 2; ++ ++ if (div > SDCDIV_MAX_CDIV) ++ div = SDCDIV_MAX_CDIV; ++ ++ clock = host->max_clk / (div + 2); ++ host->mmc->actual_clock = clock; ++ ++ /* Calibrate some delays */ ++ ++ host->ns_per_fifo_word = (1000000000 / clock) * ++ ((host->mmc->caps & MMC_CAP_4_BIT_DATA) ? 8 : 32); ++ ++ host->cdiv = div; ++ writel(host->cdiv, host->ioaddr + SDCDIV); ++ ++ /* Set the timeout to 500ms */ ++ writel(host->mmc->actual_clock / 2, host->ioaddr + SDTOUT); ++} ++ ++static void bcm2835_request(struct mmc_host *mmc, struct mmc_request *mrq) ++{ ++ struct bcm2835_host *host = mmc_priv(mmc); ++ struct device *dev = &host->pdev->dev; ++ u32 edm, fsm; ++ ++ /* Reset the error statuses in case this is a retry */ ++ if (mrq->sbc) ++ mrq->sbc->error = 0; ++ if (mrq->cmd) ++ mrq->cmd->error = 0; ++ if (mrq->data) ++ mrq->data->error = 0; ++ if (mrq->stop) ++ mrq->stop->error = 0; ++ ++ if (mrq->data && !is_power_of_2(mrq->data->blksz)) { ++ dev_err(dev, "unsupported block size (%d bytes)\n", ++ mrq->data->blksz); ++ mrq->cmd->error = -EINVAL; ++ mmc_request_done(mmc, mrq); ++ return; ++ } ++ ++ if (host->use_dma && mrq->data && (mrq->data->blocks > PIO_THRESHOLD)) ++ bcm2835_prepare_dma(host, mrq->data); ++ ++ mutex_lock(&host->mutex); ++ ++ WARN_ON(host->mrq); ++ host->mrq = mrq; ++ ++ edm = readl(host->ioaddr + SDEDM); ++ fsm = edm & SDEDM_FSM_MASK; ++ ++ if ((fsm != SDEDM_FSM_IDENTMODE) && ++ (fsm != SDEDM_FSM_DATAMODE)) { ++ dev_err(dev, "previous command (%d) not complete (EDM %08x)\n", ++ readl(host->ioaddr + SDCMD) & SDCMD_CMD_MASK, ++ edm); ++ bcm2835_dumpregs(host); ++ mrq->cmd->error = -EILSEQ; ++ bcm2835_finish_request(host); ++ mutex_unlock(&host->mutex); ++ return; ++ } ++ ++ host->use_sbc = !!mrq->sbc && (host->mrq->data->flags & MMC_DATA_READ); ++ if (host->use_sbc) { ++ if (bcm2835_send_command(host, mrq->sbc)) { ++ if (!host->use_busy) ++ bcm2835_finish_command(host); ++ } ++ } else if (bcm2835_send_command(host, mrq->cmd)) { ++ if (host->data && host->dma_desc) { ++ /* DMA transfer starts now, PIO starts after irq */ ++ bcm2835_start_dma(host); ++ } ++ ++ if (!host->use_busy) ++ bcm2835_finish_command(host); ++ } ++ ++ mutex_unlock(&host->mutex); ++} ++ ++static void bcm2835_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) ++{ ++ struct bcm2835_host *host = mmc_priv(mmc); ++ ++ mutex_lock(&host->mutex); ++ ++ if (!ios->clock || ios->clock != host->clock) { ++ bcm2835_set_clock(host, ios->clock); ++ host->clock = ios->clock; ++ } ++ ++ /* set bus width */ ++ host->hcfg &= ~SDHCFG_WIDE_EXT_BUS; ++ if (ios->bus_width == MMC_BUS_WIDTH_4) ++ host->hcfg |= SDHCFG_WIDE_EXT_BUS; ++ ++ host->hcfg |= SDHCFG_WIDE_INT_BUS; ++ ++ /* Disable clever clock switching, to cope with fast core clocks */ ++ host->hcfg |= SDHCFG_SLOW_CARD; ++ ++ writel(host->hcfg, host->ioaddr + SDHCFG); ++ ++ mutex_unlock(&host->mutex); ++} ++ ++static struct mmc_host_ops bcm2835_ops = { ++ .request = bcm2835_request, ++ .set_ios = bcm2835_set_ios, ++ .hw_reset = bcm2835_reset, ++}; ++ ++static int bcm2835_add_host(struct bcm2835_host *host) ++{ ++ struct mmc_host *mmc = host->mmc; ++ struct device *dev = &host->pdev->dev; ++ char pio_limit_string[20]; ++ int ret; ++ ++ mmc->f_max = host->max_clk; ++ mmc->f_min = host->max_clk / SDCDIV_MAX_CDIV; ++ ++ mmc->max_busy_timeout = ~0 / (mmc->f_max / 1000); ++ ++ dev_dbg(dev, "f_max %d, f_min %d, max_busy_timeout %d\n", ++ mmc->f_max, mmc->f_min, mmc->max_busy_timeout); ++ ++ /* host controller capabilities */ ++ mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED | ++ MMC_CAP_NEEDS_POLL | MMC_CAP_HW_RESET | MMC_CAP_ERASE | ++ MMC_CAP_CMD23; ++ ++ spin_lock_init(&host->lock); ++ mutex_init(&host->mutex); ++ ++ if (IS_ERR_OR_NULL(host->dma_chan_rxtx)) { ++ dev_warn(dev, "unable to initialise DMA channel. Falling back to PIO\n"); ++ host->use_dma = false; ++ } else { ++ host->use_dma = true; ++ ++ host->dma_cfg_tx.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; ++ host->dma_cfg_tx.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; ++ host->dma_cfg_tx.slave_id = 13; /* DREQ channel */ ++ host->dma_cfg_tx.direction = DMA_MEM_TO_DEV; ++ host->dma_cfg_tx.src_addr = 0; ++ host->dma_cfg_tx.dst_addr = host->phys_addr + SDDATA; ++ ++ host->dma_cfg_rx.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; ++ host->dma_cfg_rx.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; ++ host->dma_cfg_rx.slave_id = 13; /* DREQ channel */ ++ host->dma_cfg_rx.direction = DMA_DEV_TO_MEM; ++ host->dma_cfg_rx.src_addr = host->phys_addr + SDDATA; ++ host->dma_cfg_rx.dst_addr = 0; ++ ++ if (dmaengine_slave_config(host->dma_chan_rxtx, ++ &host->dma_cfg_tx) != 0 || ++ dmaengine_slave_config(host->dma_chan_rxtx, ++ &host->dma_cfg_rx) != 0) ++ host->use_dma = false; ++ } ++ ++ mmc->max_segs = 128; ++ mmc->max_req_size = 524288; ++ mmc->max_seg_size = mmc->max_req_size; ++ mmc->max_blk_size = 1024; ++ mmc->max_blk_count = 65535; ++ ++ /* report supported voltage ranges */ ++ mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; ++ ++ INIT_WORK(&host->dma_work, bcm2835_dma_complete_work); ++ INIT_DELAYED_WORK(&host->timeout_work, bcm2835_timeout); ++ ++ /* Set interrupt enables */ ++ host->hcfg = SDHCFG_BUSY_IRPT_EN; ++ ++ bcm2835_reset_internal(host); ++ ++ ret = request_threaded_irq(host->irq, bcm2835_irq, ++ bcm2835_threaded_irq, ++ 0, mmc_hostname(mmc), host); ++ if (ret) { ++ dev_err(dev, "failed to request IRQ %d: %d\n", host->irq, ret); ++ return ret; ++ } ++ ++ ret = mmc_add_host(mmc); ++ if (ret) { ++ free_irq(host->irq, host); ++ return ret; ++ } ++ ++ pio_limit_string[0] = '\0'; ++ if (host->use_dma && (PIO_THRESHOLD > 0)) ++ sprintf(pio_limit_string, " (>%d)", PIO_THRESHOLD); ++ dev_info(dev, "loaded - DMA %s%s\n", ++ host->use_dma ? "enabled" : "disabled", pio_limit_string); ++ ++ return 0; ++} ++ ++static int bcm2835_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct clk *clk; ++ struct resource *iomem; ++ struct bcm2835_host *host; ++ struct mmc_host *mmc; ++ const __be32 *regaddr_p; ++ int ret; ++ ++ dev_dbg(dev, "%s\n", __func__); ++ mmc = mmc_alloc_host(sizeof(*host), dev); ++ if (!mmc) ++ return -ENOMEM; ++ ++ mmc->ops = &bcm2835_ops; ++ host = mmc_priv(mmc); ++ host->mmc = mmc; ++ host->pdev = pdev; ++ spin_lock_init(&host->lock); ++ ++ iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ host->ioaddr = devm_ioremap_resource(dev, iomem); ++ if (IS_ERR(host->ioaddr)) { ++ ret = PTR_ERR(host->ioaddr); ++ goto err; ++ } ++ ++ /* Parse OF address directly to get the physical address for ++ * DMA to our registers. ++ */ ++ regaddr_p = of_get_address(pdev->dev.of_node, 0, NULL, NULL); ++ if (!regaddr_p) { ++ dev_err(dev, "Can't get phys address\n"); ++ ret = -EINVAL; ++ goto err; ++ } ++ ++ host->phys_addr = be32_to_cpup(regaddr_p); ++ ++ host->dma_chan = NULL; ++ host->dma_desc = NULL; ++ ++ host->dma_chan_rxtx = dma_request_slave_channel(dev, "rx-tx"); ++ ++ clk = devm_clk_get(dev, NULL); ++ if (IS_ERR(clk)) { ++ ret = PTR_ERR(clk); ++ if (ret != -EPROBE_DEFER) ++ dev_err(dev, "could not get clk: %d\n", ret); ++ goto err; ++ } ++ ++ host->max_clk = clk_get_rate(clk); ++ ++ host->irq = platform_get_irq(pdev, 0); ++ if (host->irq <= 0) { ++ dev_err(dev, "get IRQ failed\n"); ++ ret = -EINVAL; ++ goto err; ++ } ++ ++ ret = mmc_of_parse(mmc); ++ if (ret) ++ goto err; ++ ++ ret = bcm2835_add_host(host); ++ if (ret) ++ goto err; ++ ++ platform_set_drvdata(pdev, host); ++ ++ dev_dbg(dev, "%s -> OK\n", __func__); ++ ++ return 0; ++ ++err: ++ dev_dbg(dev, "%s -> err %d\n", __func__, ret); ++ mmc_free_host(mmc); ++ ++ return ret; ++} ++ ++static int bcm2835_remove(struct platform_device *pdev) ++{ ++ struct bcm2835_host *host = platform_get_drvdata(pdev); ++ ++ mmc_remove_host(host->mmc); ++ ++ writel(SDVDD_POWER_OFF, host->ioaddr + SDVDD); ++ ++ free_irq(host->irq, host); ++ ++ cancel_work_sync(&host->dma_work); ++ cancel_delayed_work_sync(&host->timeout_work); ++ ++ mmc_free_host(host->mmc); ++ platform_set_drvdata(pdev, NULL); ++ ++ return 0; ++} ++ ++static const struct of_device_id bcm2835_match[] = { ++ { .compatible = "brcm,bcm2835-sdhost" }, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, bcm2835_match); ++ ++static struct platform_driver bcm2835_driver = { ++ .probe = bcm2835_probe, ++ .remove = bcm2835_remove, ++ .driver = { ++ .name = "sdhost-bcm2835", ++ .of_match_table = bcm2835_match, ++ }, ++}; ++module_platform_driver(bcm2835_driver); ++ ++MODULE_ALIAS("platform:sdhost-bcm2835"); ++MODULE_DESCRIPTION("BCM2835 SDHost driver"); ++MODULE_LICENSE("GPL v2"); ++MODULE_AUTHOR("Phil Elwell"); +From patchwork Wed Mar 8 09:19:05 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v4,3/7] mmc: bcm2835: add sdhost controller to devicetree +From: Gerd Hoffmann +X-Patchwork-Id: 9610693 +Message-Id: <1488964751-22763-6-git-send-email-kraxel@redhat.com> +To: linux-rpi-kernel@lists.infradead.org +Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, + f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, + rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, + linux@armlinux.org.uk, + linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, + bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , + catalin.marinas@arm.com, linux-mmc@vger.kernel.org, + linux-arm-kernel@lists.infradead.org +Date: Wed, 8 Mar 2017 10:19:05 +0100 + +Signed-off-by: Gerd Hoffmann +Acked-by: Eric Anholt +Acked-by: Stefan Wahren +--- + arch/arm/boot/dts/bcm2835-rpi.dtsi | 6 ++++++ + arch/arm/boot/dts/bcm283x.dtsi | 10 ++++++++++ + 2 files changed, 16 insertions(+) + +diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi +index 1e00a28..8b95832 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi +@@ -69,6 +69,12 @@ + bus-width = <4>; + }; + ++&sdhost { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdhost_gpio48>; ++ bus-width = <4>; ++}; ++ + &pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>; +diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi +index 9798bc9..19099a5 100644 +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -350,6 +350,16 @@ + arm,primecell-periphid = <0x00241011>; + }; + ++ sdhost: mmc@7e202000 { ++ compatible = "brcm,bcm2835-sdhost"; ++ reg = <0x7e202000 0x100>; ++ interrupts = <2 24>; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ dmas = <&dma 13>; ++ dma-names = "rx-tx"; ++ status = "disabled"; ++ }; ++ + i2s: i2s@7e203000 { + compatible = "brcm,bcm2835-i2s"; + reg = <0x7e203000 0x20>, +From patchwork Wed Mar 8 09:19:07 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v4, 4/7] arm: set CONFIG_MMC_BCM2835=y in bcm2835_defconfig and + multi_v7_defconfig +From: Gerd Hoffmann +X-Patchwork-Id: 9610689 +Message-Id: <1488964751-22763-8-git-send-email-kraxel@redhat.com> +To: linux-rpi-kernel@lists.infradead.org +Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, + f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, + rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, + linux@armlinux.org.uk, + linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, + bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , + catalin.marinas@arm.com, linux-mmc@vger.kernel.org, + linux-arm-kernel@lists.infradead.org +Date: Wed, 8 Mar 2017 10:19:07 +0100 + +We need to enable this controller so that we can switch the SD card's +pinmux over to it by default, which will improve storage performance. + +Read access (dd with 64k blocks on rpi2): + CONFIG_MMC_SDHCI_IPROC: 11-12 MB/s + CONFIG_MMC_BCM2835: 19-20 MB/s + +Differences on write access are pretty much in the noise. + +Signed-off-by: Gerd Hoffmann +--- + arch/arm/configs/bcm2835_defconfig | 1 + + arch/arm/configs/multi_v7_defconfig | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/arch/arm/configs/bcm2835_defconfig b/arch/arm/configs/bcm2835_defconfig +index 4b89f4e..3767c24 100644 +--- a/arch/arm/configs/bcm2835_defconfig ++++ b/arch/arm/configs/bcm2835_defconfig +@@ -92,6 +92,7 @@ CONFIG_MMC=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_PLTFM=y + CONFIG_MMC_SDHCI_IPROC=y ++CONFIG_MMC_BCM2835=y + CONFIG_NEW_LEDS=y + CONFIG_LEDS_CLASS=y + CONFIG_LEDS_GPIO=y +diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig +index a94126f..63b94d0 100644 +--- a/arch/arm/configs/multi_v7_defconfig ++++ b/arch/arm/configs/multi_v7_defconfig +@@ -730,6 +730,7 @@ CONFIG_MMC_DW_EXYNOS=y + CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SH_MMCIF=y + CONFIG_MMC_SUNXI=y ++CONFIG_MMC_BCM2835=y + CONFIG_NEW_LEDS=y + CONFIG_LEDS_CLASS=y + CONFIG_LEDS_CLASS_FLASH=m +From patchwork Wed Mar 8 09:19:09 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v4,5/7] arm64: set CONFIG_MMC_BCM2835=y in defconfig +From: Gerd Hoffmann +X-Patchwork-Id: 9610647 +Message-Id: <1488964751-22763-10-git-send-email-kraxel@redhat.com> +To: linux-rpi-kernel@lists.infradead.org +Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, + f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, + rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, + linux@armlinux.org.uk, + linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, + bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , + catalin.marinas@arm.com, linux-mmc@vger.kernel.org, + linux-arm-kernel@lists.infradead.org +Date: Wed, 8 Mar 2017 10:19:09 +0100 + +We need to enable this controller so that we can switch the SD card's +pinmux over to it by default, which will improve storage performance. + +Read access (dd with 64k blocks on rpi2): + CONFIG_MMC_SDHCI_IPROC: 11-12 MB/s + CONFIG_MMC_BCM2835: 19-20 MB/s + +Differences on write access are pretty much in the noise. + +Signed-off-by: Gerd Hoffmann +--- + arch/arm64/configs/defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig +index 7c48028..519a55c 100644 +--- a/arch/arm64/configs/defconfig ++++ b/arch/arm64/configs/defconfig +@@ -398,6 +398,7 @@ CONFIG_MMC_DW_EXYNOS=y + CONFIG_MMC_DW_K3=y + CONFIG_MMC_DW_ROCKCHIP=y + CONFIG_MMC_SUNXI=y ++CONFIG_MMC_BCM2835=y + CONFIG_NEW_LEDS=y + CONFIG_LEDS_CLASS=y + CONFIG_LEDS_GPIO=y +From patchwork Wed Mar 8 09:19:10 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v4,6/7] arm: dts: bcm283x: switch from &sdhci to &sdhost +From: Gerd Hoffmann +X-Patchwork-Id: 9610687 +Message-Id: <1488964751-22763-11-git-send-email-kraxel@redhat.com> +To: linux-rpi-kernel@lists.infradead.org +Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, + f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, + rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, + linux@armlinux.org.uk, + linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, + bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , + catalin.marinas@arm.com, linux-mmc@vger.kernel.org, + linux-arm-kernel@lists.infradead.org +Date: Wed, 8 Mar 2017 10:19:10 +0100 + +sdcard access with the sdhost controller is faster. + +Read access (dd with 64k blocks on rpi2): + CONFIG_MMC_SDHCI_IPROC: 11-12 MB/s + CONFIG_MMC_BCM2835: 19-20 MB/s + +Differences on write access are pretty much in the noise. + +Signed-off-by: Gerd Hoffmann +Acked-by: Eric Anholt +--- + arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi +index 8b95832..e36c392 100644 +--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi +@@ -65,13 +65,13 @@ + &sdhci { + pinctrl-names = "default"; + pinctrl-0 = <&emmc_gpio48>; +- status = "okay"; + bus-width = <4>; + }; + + &sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; ++ status = "okay"; + bus-width = <4>; + }; + +From patchwork Wed Mar 8 09:19:11 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v4,7/7] arm64: dts: bcm2837: add &sdhci and &sdhost +From: Gerd Hoffmann +X-Patchwork-Id: 9610637 +Message-Id: <1488964751-22763-12-git-send-email-kraxel@redhat.com> +To: linux-rpi-kernel@lists.infradead.org +Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, + f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, + rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, + linux@armlinux.org.uk, + linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, + bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , + catalin.marinas@arm.com, linux-mmc@vger.kernel.org, + linux-arm-kernel@lists.infradead.org +Date: Wed, 8 Mar 2017 10:19:11 +0100 + +For the raspberry pi 3 we'll need both sdhci (handles sdio wifi) and +sdhost (handles sdcard). + +Signed-off-by: Gerd Hoffmann +Acked-by: Eric Anholt +--- + arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +diff --git a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts +index c309633..972f14d 100644 +--- a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts ++++ b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts +@@ -22,3 +22,20 @@ + &uart1 { + status = "okay"; + }; ++ ++/* SDHCI is used to control the SDIO for wireless */ ++&sdhci { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_gpio34>; ++ status = "okay"; ++ bus-width = <4>; ++ non-removable; ++}; ++ ++/* SDHOST is used to drive the SD card */ ++&sdhost { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdhost_gpio48>; ++ status = "okay"; ++ bus-width = <4>; ++}; +From patchwork Sat Mar 25 13:17:00 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: mmc: bcm2835: Fix possible NULL ptr dereference in bcm2835_request +From: Stefan Wahren +X-Patchwork-Id: 9644591 +Message-Id: <1490447820-751-1-git-send-email-stefan.wahren@i2se.com> +To: Ulf Hansson , Eric Anholt , + Gerd Hoffmann +Cc: Jaehoon Chung , + Dan Carpenter , + linux-rpi-kernel@lists.infradead.org, linux-mmc@vger.kernel.org, + Stefan Wahren +Date: Sat, 25 Mar 2017 13:17:00 +0000 + +This fixes a NULL pointer dereference in case of a MMC request with a +set block count command and no data. + +Reported-by: Dan Carpenter +Signed-off-by: Stefan Wahren +--- + drivers/mmc/host/bcm2835.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/mmc/host/bcm2835.c b/drivers/mmc/host/bcm2835.c +index 7d1b0db..1f343a4 100644 +--- a/drivers/mmc/host/bcm2835.c ++++ b/drivers/mmc/host/bcm2835.c +@@ -1200,7 +1200,8 @@ static void bcm2835_request(struct mmc_host *mmc, struct mmc_request *mrq) + return; + } + +- host->use_sbc = !!mrq->sbc && (host->mrq->data->flags & MMC_DATA_READ); ++ host->use_sbc = !!mrq->sbc && host->mrq->data && ++ (host->mrq->data->flags & MMC_DATA_READ); + if (host->use_sbc) { + if (bcm2835_send_command(host, mrq->sbc)) { + if (!host->use_busy) diff --git a/bcm283x-mmc-imp-speed.patch b/bcm283x-mmc-imp-speed.patch deleted file mode 100644 index bad003a3c..000000000 --- a/bcm283x-mmc-imp-speed.patch +++ /dev/null @@ -1,107 +0,0 @@ -From patchwork Fri Dec 30 15:24:32 2016 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [1/2] mmc: sdhci-iproc: Apply caps from bcm2835-mmc driver -From: Stefan Wahren -X-Patchwork-Id: 9492281 -Message-Id: <1483111474-29907-2-git-send-email-stefan.wahren@i2se.com> -To: Eric Anholt , Gerd Hoffmann , - Adrian Hunter , - Ulf Hansson -Cc: Stefan Wahren , - Scott Branden , Jon Mason , - Ray Jui , linux-mmc@vger.kernel.org, - bcm-kernel-feedback-list@broadcom.com, - linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org -Date: Fri, 30 Dec 2016 15:24:32 +0000 - -Since the mmc module on bcm2835 neither provide a capabilities register nor -free documentation we must rely on the downstream implementation [1]. - -So enable the following capabilities for bcm2835: - -MMC_CAP_MMC_HIGHSPEED -MMC_CAP_SD_HIGHSPEED -MMC_CAP_DRIVER_TYPE_A -MMC_CAP_DRIVER_TYPE_C - -[1] - https://github.com/raspberrypi/linux/blob/rpi-4.4.y/drivers/mmc/host/bcm2835-mmc.c - -Signed-off-by: Stefan Wahren -Reviewed-by: Eric Anholt -Acked-by: Adrian Hunter ---- - drivers/mmc/host/sdhci-iproc.c | 9 ++++++--- - 1 file changed, 6 insertions(+), 3 deletions(-) - -diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c -index d7046d6..30b3fdf 100644 ---- a/drivers/mmc/host/sdhci-iproc.c -+++ b/drivers/mmc/host/sdhci-iproc.c -@@ -211,14 +211,17 @@ static void sdhci_iproc_writeb(struct sdhci_host *host, u8 val, int reg) - static const struct sdhci_pltfm_data sdhci_bcm2835_pltfm_data = { - .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION | - SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | -- SDHCI_QUIRK_MISSING_CAPS, -+ SDHCI_QUIRK_MISSING_CAPS | -+ SDHCI_QUIRK_NO_HISPD_BIT, - .ops = &sdhci_iproc_32only_ops, - }; - - static const struct sdhci_iproc_data bcm2835_data = { - .pdata = &sdhci_bcm2835_pltfm_data, -- .caps = SDHCI_CAN_VDD_330, -- .caps1 = 0x00000000, -+ .caps = SDHCI_CAN_VDD_330 | -+ SDHCI_CAN_DO_HISPD, -+ .caps1 = SDHCI_DRIVER_TYPE_A | -+ SDHCI_DRIVER_TYPE_C, - .mmc_caps = 0x00000000, - }; - -From patchwork Fri Dec 30 15:24:33 2016 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [2/2] mmc: sdhci-iproc: Increase max_blk_size for bcm2835 -From: Stefan Wahren -X-Patchwork-Id: 9492273 -Message-Id: <1483111474-29907-3-git-send-email-stefan.wahren@i2se.com> -To: Eric Anholt , Gerd Hoffmann , - Adrian Hunter , - Ulf Hansson -Cc: Stefan Wahren , - Scott Branden , Jon Mason , - Ray Jui , linux-mmc@vger.kernel.org, - bcm-kernel-feedback-list@broadcom.com, - linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org -Date: Fri, 30 Dec 2016 15:24:33 +0000 - -According to the BCM2835 datasheet the maximum block size for the -eMMC module is restricted to the internal data FIFO which is 1024 byte. -But this is still an improvement to the default of 512 byte. - -Signed-off-by: Stefan Wahren -Reviewed-by: Eric Anholt -Acked-by: Scott Branden -Acked-by: Adrian Hunter ---- - drivers/mmc/host/sdhci-iproc.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -diff --git a/drivers/mmc/host/sdhci-iproc.c b/drivers/mmc/host/sdhci-iproc.c -index 30b3fdf..3275d49 100644 ---- a/drivers/mmc/host/sdhci-iproc.c -+++ b/drivers/mmc/host/sdhci-iproc.c -@@ -218,7 +218,9 @@ static void sdhci_iproc_writeb(struct sdhci_host *host, u8 val, int reg) - - static const struct sdhci_iproc_data bcm2835_data = { - .pdata = &sdhci_bcm2835_pltfm_data, -- .caps = SDHCI_CAN_VDD_330 | -+ .caps = ((0x1 << SDHCI_MAX_BLOCK_SHIFT) -+ & SDHCI_MAX_BLOCK_MASK) | -+ SDHCI_CAN_VDD_330 | - SDHCI_CAN_DO_HISPD, - .caps1 = SDHCI_DRIVER_TYPE_A | - SDHCI_DRIVER_TYPE_C, diff --git a/debugconfig/CONFIG_DEBUG_REFCOUNT b/debugconfig/CONFIG_DEBUG_REFCOUNT new file mode 100644 index 000000000..cf296c8de --- /dev/null +++ b/debugconfig/CONFIG_DEBUG_REFCOUNT @@ -0,0 +1 @@ +CONFIG_DEBUG_REFCOUNT=y diff --git a/efi-Add-EFI_SECURE_BOOT-bit.patch b/efi-Add-EFI_SECURE_BOOT-bit.patch deleted file mode 100644 index c44010322..000000000 --- a/efi-Add-EFI_SECURE_BOOT-bit.patch +++ /dev/null @@ -1,43 +0,0 @@ -From a8883aff32f1e15b65e210462804aa2a9ab9a0b6 Mon Sep 17 00:00:00 2001 -From: Josh Boyer -Date: Tue, 27 Aug 2013 13:33:03 -0400 -Subject: [PATCH 13/20] efi: Add EFI_SECURE_BOOT bit - -UEFI machines can be booted in Secure Boot mode. Add a EFI_SECURE_BOOT bit -for use with efi_enabled. - -Signed-off-by: Josh Boyer ---- - arch/x86/kernel/setup.c | 2 ++ - include/linux/efi.h | 1 + - 2 files changed, 3 insertions(+) - -diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c -index d40e961753c9..b93183336674 100644 ---- a/arch/x86/kernel/setup.c -+++ b/arch/x86/kernel/setup.c -@@ -1162,7 +1162,9 @@ void __init setup_arch(char **cmdline_p) - - #ifdef CONFIG_EFI_SECURE_BOOT_SIG_ENFORCE - if (boot_params.secure_boot) { -+ set_bit(EFI_SECURE_BOOT, &efi.flags); - enforce_signed_modules(); -+ pr_info("Secure boot enabled\n"); - } - #endif - -diff --git a/include/linux/efi.h b/include/linux/efi.h -index ce943d5accfd..5af91b58afae 100644 ---- a/include/linux/efi.h -+++ b/include/linux/efi.h -@@ -1046,6 +1046,7 @@ extern int __init efi_setup_pcdp_console(char *); - #define EFI_ARCH_1 7 /* First arch-specific bit */ - #define EFI_DBG 8 /* Print additional debug info at runtime */ - #define EFI_NX_PE_DATA 9 /* Can runtime data regions be mapped non-executable? */ -+#define EFI_SECURE_BOOT 10 /* Are we in Secure Boot mode? */ - - #ifdef CONFIG_EFI - /* --- -2.9.3 - diff --git a/efi-Add-SHIM-and-image-security-database-GUID-defini.patch b/efi-Add-SHIM-and-image-security-database-GUID-defini.patch deleted file mode 100644 index 4d380ea76..000000000 --- a/efi-Add-SHIM-and-image-security-database-GUID-defini.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 3a9fe1504e08824d894bb3a804c6a313f5d1be8a Mon Sep 17 00:00:00 2001 -From: Josh Boyer -Date: Tue, 25 Oct 2016 12:54:11 -0400 -Subject: [PATCH 11/20] efi: Add SHIM and image security database GUID - definitions - -Add the definitions for shim and image security database, both of which -are used widely in various Linux distros. - -Signed-off-by: Josh Boyer ---- - include/linux/efi.h | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/include/linux/efi.h b/include/linux/efi.h -index 2d089487d2da..ce943d5accfd 100644 ---- a/include/linux/efi.h -+++ b/include/linux/efi.h -@@ -592,6 +592,9 @@ void efi_native_runtime_setup(void); - #define EFI_MEMORY_ATTRIBUTES_TABLE_GUID EFI_GUID(0xdcfa911d, 0x26eb, 0x469f, 0xa2, 0x20, 0x38, 0xb7, 0xdc, 0x46, 0x12, 0x20) - #define EFI_CONSOLE_OUT_DEVICE_GUID EFI_GUID(0xd3b36f2c, 0xd551, 0x11d4, 0x9a, 0x46, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d) - -+#define EFI_IMAGE_SECURITY_DATABASE_GUID EFI_GUID(0xd719b2cb, 0x3d3a, 0x4596, 0xa3, 0xbc, 0xda, 0xd0, 0x0e, 0x67, 0x65, 0x6f) -+#define EFI_SHIM_LOCK_GUID EFI_GUID(0x605dab50, 0xe046, 0x4300, 0xab, 0xb6, 0x3d, 0xd8, 0x10, 0xdd, 0x8b, 0x23) -+ - /* - * This GUID is used to pass to the kernel proper the struct screen_info - * structure that was populated by the stub based on the GOP protocol instance --- -2.9.3 - diff --git a/efi-Disable-secure-boot-if-shim-is-in-insecure-mode.patch b/efi-Disable-secure-boot-if-shim-is-in-insecure-mode.patch deleted file mode 100644 index 761a66ff7..000000000 --- a/efi-Disable-secure-boot-if-shim-is-in-insecure-mode.patch +++ /dev/null @@ -1,58 +0,0 @@ -From d687d79620ea20511b2dbf77e74fdcf4d94981f9 Mon Sep 17 00:00:00 2001 -From: Josh Boyer -Date: Tue, 5 Feb 2013 19:25:05 -0500 -Subject: [PATCH 12/20] efi: Disable secure boot if shim is in insecure mode - -A user can manually tell the shim boot loader to disable validation of -images it loads. When a user does this, it creates a UEFI variable called -MokSBState that does not have the runtime attribute set. Given that the -user explicitly disabled validation, we can honor that and not enable -secure boot mode if that variable is set. - -Signed-off-by: Josh Boyer ---- - arch/x86/boot/compressed/eboot.c | 20 +++++++++++++++++++- - 1 file changed, 19 insertions(+), 1 deletion(-) - -diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c -index ebc85c1eefd6..50e027f388d8 100644 ---- a/arch/x86/boot/compressed/eboot.c -+++ b/arch/x86/boot/compressed/eboot.c -@@ -540,8 +540,9 @@ static void setup_efi_pci(struct boot_params *params) - - static int get_secure_boot(void) - { -- u8 sb, setup; -+ u8 sb, setup, moksbstate; - unsigned long datasize = sizeof(sb); -+ u32 attr; - efi_guid_t var_guid = EFI_GLOBAL_VARIABLE_GUID; - efi_status_t status; - -@@ -565,6 +566,23 @@ static int get_secure_boot(void) - if (setup == 1) - return 0; - -+ /* See if a user has put shim into insecure_mode. If so, and the variable -+ * doesn't have the runtime attribute set, we might as well honor that. -+ */ -+ var_guid = EFI_SHIM_LOCK_GUID; -+ status = efi_early->call((unsigned long)sys_table->runtime->get_variable, -+ L"MokSBState", &var_guid, &attr, &datasize, -+ &moksbstate); -+ -+ /* If it fails, we don't care why. Default to secure */ -+ if (status != EFI_SUCCESS) -+ return 1; -+ -+ if (!(attr & EFI_VARIABLE_RUNTIME_ACCESS)) { -+ if (moksbstate == 1) -+ return 0; -+ } -+ - return 1; - } - --- -2.9.3 - diff --git a/efi-Make-EFI_SECURE_BOOT_SIG_ENFORCE-depend-on-EFI.patch b/efi-Make-EFI_SECURE_BOOT_SIG_ENFORCE-depend-on-EFI.patch deleted file mode 100644 index 095bea782..000000000 --- a/efi-Make-EFI_SECURE_BOOT_SIG_ENFORCE-depend-on-EFI.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 0081083434db41c15b72eced975da0bd9b80566b Mon Sep 17 00:00:00 2001 -From: Josh Boyer -Date: Tue, 27 Aug 2013 13:28:43 -0400 -Subject: [PATCH 12/20] efi: Make EFI_SECURE_BOOT_SIG_ENFORCE depend on EFI - -The functionality of the config option is dependent upon the platform being -UEFI based. Reflect this in the config deps. - -Signed-off-by: Josh Boyer ---- - arch/x86/Kconfig | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig -index 14db458f4774..f6ff0a86d841 100644 ---- a/arch/x86/Kconfig -+++ b/arch/x86/Kconfig -@@ -1735,7 +1735,8 @@ config EFI_MIXED - If unsure, say N. - - config EFI_SECURE_BOOT_SIG_ENFORCE -- def_bool n -+ def_bool n -+ depends on EFI - prompt "Force module signing when UEFI Secure Boot is enabled" - ---help--- - UEFI Secure Boot provides a mechanism for ensuring that the --- -2.4.3 - diff --git a/efi-lockdown.patch b/efi-lockdown.patch index 6bbc24fa1..54a7caa24 100644 --- a/efi-lockdown.patch +++ b/efi-lockdown.patch @@ -1,667 +1,4 @@ -From d1d5053106cd1f8b2ae52fb6ffb2962f76053bf0 Mon Sep 17 00:00:00 2001 -From: Ard Biesheuvel -Date: Wed, 23 Nov 2016 10:42:44 +0000 -Subject: [PATCH 01/32] efi: use typed function pointers for runtime services - table - -Instead of using void pointers, and casting them to correctly typed -function pointers upon use, declare the runtime services pointers -as function pointers using their respective prototypes, for which -typedefs are already available. - -Signed-off-by: Ard Biesheuvel -Signed-off-by: David Howells ---- - include/linux/efi.h | 36 ++++++++++++++++++------------------ - 1 file changed, 18 insertions(+), 18 deletions(-) - -diff --git a/include/linux/efi.h b/include/linux/efi.h -index a07a476..93a82de 100644 ---- a/include/linux/efi.h -+++ b/include/linux/efi.h -@@ -508,24 +508,6 @@ typedef struct { - u64 query_variable_info; - } efi_runtime_services_64_t; - --typedef struct { -- efi_table_hdr_t hdr; -- void *get_time; -- void *set_time; -- void *get_wakeup_time; -- void *set_wakeup_time; -- void *set_virtual_address_map; -- void *convert_pointer; -- void *get_variable; -- void *get_next_variable; -- void *set_variable; -- void *get_next_high_mono_count; -- void *reset_system; -- void *update_capsule; -- void *query_capsule_caps; -- void *query_variable_info; --} efi_runtime_services_t; -- - typedef efi_status_t efi_get_time_t (efi_time_t *tm, efi_time_cap_t *tc); - typedef efi_status_t efi_set_time_t (efi_time_t *tm); - typedef efi_status_t efi_get_wakeup_time_t (efi_bool_t *enabled, efi_bool_t *pending, -@@ -560,6 +542,24 @@ typedef efi_status_t efi_query_variable_store_t(u32 attributes, - unsigned long size, - bool nonblocking); - -+typedef struct { -+ efi_table_hdr_t hdr; -+ efi_get_time_t *get_time; -+ efi_set_time_t *set_time; -+ efi_get_wakeup_time_t *get_wakeup_time; -+ efi_set_wakeup_time_t *set_wakeup_time; -+ efi_set_virtual_address_map_t *set_virtual_address_map; -+ void *convert_pointer; -+ efi_get_variable_t *get_variable; -+ efi_get_next_variable_t *get_next_variable; -+ efi_set_variable_t *set_variable; -+ efi_get_next_high_mono_count_t *get_next_high_mono_count; -+ efi_reset_system_t *reset_system; -+ efi_update_capsule_t *update_capsule; -+ efi_query_capsule_caps_t *query_capsule_caps; -+ efi_query_variable_info_t *query_variable_info; -+} efi_runtime_services_t; -+ - void efi_native_runtime_setup(void); - - /* --- -2.9.3 - -From 150ebd38630a3ac558b8ab839a7c7e5fd41cc5a8 Mon Sep 17 00:00:00 2001 -From: David Howells -Date: Mon, 21 Nov 2016 23:36:31 +0000 -Subject: [PATCH 02/32] x86/efi: Allow invocation of arbitrary runtime services - -Provide the ability to perform mixed-mode runtime service calls for x86 in -the same way that commit 0a637ee61247bd4bed9b2a07568ef7a1cfc76187 -("x86/efi: Allow invocation of arbitrary boot services") provides the -ability to invoke arbitrary boot services. - -Suggested-by: Lukas Wunner -Signed-off-by: David Howells ---- - arch/x86/boot/compressed/eboot.c | 1 + - arch/x86/boot/compressed/head_32.S | 6 +++--- - arch/x86/boot/compressed/head_64.S | 8 ++++---- - arch/x86/include/asm/efi.h | 5 +++++ - 4 files changed, 13 insertions(+), 7 deletions(-) - -diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c -index ff01c8f..c8c32eb 100644 ---- a/arch/x86/boot/compressed/eboot.c -+++ b/arch/x86/boot/compressed/eboot.c -@@ -32,6 +32,7 @@ static void setup_boot_services##bits(struct efi_config *c) \ - \ - table = (typeof(table))sys_table; \ - \ -+ c->runtime_services = table->runtime; \ - c->boot_services = table->boottime; \ - c->text_output = table->con_out; \ - } -diff --git a/arch/x86/boot/compressed/head_32.S b/arch/x86/boot/compressed/head_32.S -index fd0b6a2..d85b962 100644 ---- a/arch/x86/boot/compressed/head_32.S -+++ b/arch/x86/boot/compressed/head_32.S -@@ -82,7 +82,7 @@ ENTRY(efi_pe_entry) - - /* Relocate efi_config->call() */ - leal efi32_config(%esi), %eax -- add %esi, 32(%eax) -+ add %esi, 40(%eax) - pushl %eax - - call make_boot_params -@@ -108,7 +108,7 @@ ENTRY(efi32_stub_entry) - - /* Relocate efi_config->call() */ - leal efi32_config(%esi), %eax -- add %esi, 32(%eax) -+ add %esi, 40(%eax) - pushl %eax - 2: - call efi_main -@@ -264,7 +264,7 @@ relocated: - #ifdef CONFIG_EFI_STUB - .data - efi32_config: -- .fill 4,8,0 -+ .fill 5,8,0 - .long efi_call_phys - .long 0 - .byte 0 -diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S -index efdfba2..beab832 100644 ---- a/arch/x86/boot/compressed/head_64.S -+++ b/arch/x86/boot/compressed/head_64.S -@@ -265,7 +265,7 @@ ENTRY(efi_pe_entry) - /* - * Relocate efi_config->call(). - */ -- addq %rbp, efi64_config+32(%rip) -+ addq %rbp, efi64_config+40(%rip) - - movq %rax, %rdi - call make_boot_params -@@ -285,7 +285,7 @@ handover_entry: - * Relocate efi_config->call(). - */ - movq efi_config(%rip), %rax -- addq %rbp, 32(%rax) -+ addq %rbp, 40(%rax) - 2: - movq efi_config(%rip), %rdi - call efi_main -@@ -457,14 +457,14 @@ efi_config: - #ifdef CONFIG_EFI_MIXED - .global efi32_config - efi32_config: -- .fill 4,8,0 -+ .fill 5,8,0 - .quad efi64_thunk - .byte 0 - #endif - - .global efi64_config - efi64_config: -- .fill 4,8,0 -+ .fill 5,8,0 - .quad efi_call - .byte 1 - #endif /* CONFIG_EFI_STUB */ -diff --git a/arch/x86/include/asm/efi.h b/arch/x86/include/asm/efi.h -index e99675b..2f77bce 100644 ---- a/arch/x86/include/asm/efi.h -+++ b/arch/x86/include/asm/efi.h -@@ -191,6 +191,7 @@ static inline efi_status_t efi_thunk_set_virtual_address_map( - struct efi_config { - u64 image_handle; - u64 table; -+ u64 runtime_services; - u64 boot_services; - u64 text_output; - efi_status_t (*call)(unsigned long, ...); -@@ -226,6 +227,10 @@ static inline bool efi_is_64bit(void) - #define __efi_call_early(f, ...) \ - __efi_early()->call((unsigned long)f, __VA_ARGS__); - -+#define efi_call_runtime(f, ...) \ -+ __efi_early()->call(efi_table_attr(efi_runtime_services, f, \ -+ __efi_early()->runtime_services), __VA_ARGS__) -+ - extern bool efi_reboot_required(void); - - #else --- -2.9.3 - -From 1342301133b5619b79f3288acf7e39450f8ba34f Mon Sep 17 00:00:00 2001 -From: David Howells -Date: Tue, 22 Nov 2016 00:20:00 +0000 -Subject: [PATCH 03/32] arm/efi: Allow invocation of arbitrary runtime services - -efi_call_runtime() is provided for x86 to be able abstract mixed mode -support. Provide this for ARM also so that common code work in mixed mode -also. - -Suggested-by: Lukas Wunner -Signed-off-by: David Howells ---- - arch/arm/include/asm/efi.h | 1 + - arch/arm64/include/asm/efi.h | 1 + - 2 files changed, 2 insertions(+) - -diff --git a/arch/arm/include/asm/efi.h b/arch/arm/include/asm/efi.h -index 0b06f53..e4e6a9d6 100644 ---- a/arch/arm/include/asm/efi.h -+++ b/arch/arm/include/asm/efi.h -@@ -55,6 +55,7 @@ void efi_virtmap_unload(void); - - #define efi_call_early(f, ...) sys_table_arg->boottime->f(__VA_ARGS__) - #define __efi_call_early(f, ...) f(__VA_ARGS__) -+#define efi_call_runtime(f, ...) sys_table_arg->runtime->f(__VA_ARGS__) - #define efi_is_64bit() (false) - - #define efi_call_proto(protocol, f, instance, ...) \ -diff --git a/arch/arm64/include/asm/efi.h b/arch/arm64/include/asm/efi.h -index 771b3f0..d74ae22 100644 ---- a/arch/arm64/include/asm/efi.h -+++ b/arch/arm64/include/asm/efi.h -@@ -49,6 +49,7 @@ int efi_set_mapping_permissions(struct mm_struct *mm, efi_memory_desc_t *md); - - #define efi_call_early(f, ...) sys_table_arg->boottime->f(__VA_ARGS__) - #define __efi_call_early(f, ...) f(__VA_ARGS__) -+#define efi_call_runtime(f, ...) sys_table_arg->runtime->f(__VA_ARGS__) - #define efi_is_64bit() (true) - - #define efi_call_proto(protocol, f, instance, ...) \ --- -2.9.3 - -From 2e25c5beef2a97abbb660e707bced77c0eb0ace9 Mon Sep 17 00:00:00 2001 -From: David Howells -Date: Tue, 22 Nov 2016 00:10:55 +0000 -Subject: [PATCH 04/32] efi: Add SHIM and image security database GUID - definitions - -Add the definitions for shim and image security database, both of which -are used widely in various Linux distros. - -Signed-off-by: Josh Boyer -Signed-off-by: David Howells -Reviewed-by: Ard Biesheuvel ---- - include/linux/efi.h | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/include/linux/efi.h b/include/linux/efi.h -index 93a82de..c790455 100644 ---- a/include/linux/efi.h -+++ b/include/linux/efi.h -@@ -610,6 +610,9 @@ void efi_native_runtime_setup(void); - #define EFI_CONSOLE_OUT_DEVICE_GUID EFI_GUID(0xd3b36f2c, 0xd551, 0x11d4, 0x9a, 0x46, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d) - #define APPLE_PROPERTIES_PROTOCOL_GUID EFI_GUID(0x91bd12fe, 0xf6c3, 0x44fb, 0xa5, 0xb7, 0x51, 0x22, 0xab, 0x30, 0x3a, 0xe0) - -+#define EFI_IMAGE_SECURITY_DATABASE_GUID EFI_GUID(0xd719b2cb, 0x3d3a, 0x4596, 0xa3, 0xbc, 0xda, 0xd0, 0x0e, 0x67, 0x65, 0x6f) -+#define EFI_SHIM_LOCK_GUID EFI_GUID(0x605dab50, 0xe046, 0x4300, 0xab, 0xb6, 0x3d, 0xd8, 0x10, 0xdd, 0x8b, 0x23) -+ - /* - * This GUID is used to pass to the kernel proper the struct screen_info - * structure that was populated by the stub based on the GOP protocol instance --- -2.9.3 - -From 820d2f84670080c406bad4c8469e80e1e5f8a191 Mon Sep 17 00:00:00 2001 -From: David Howells -Date: Mon, 21 Nov 2016 23:55:55 +0000 -Subject: [PATCH 05/32] efi: Get the secure boot status - -Get the firmware's secure-boot status in the kernel boot wrapper and stash -it somewhere that the main kernel image can find. - -The efi_get_secureboot() function is extracted from the arm stub and (a) -generalised so that it can be called from x86 and (b) made to use -efi_call_runtime() so that it can be run in mixed-mode. - -Suggested-by: Lukas Wunner -Signed-off-by: David Howells ---- - Documentation/x86/zero-page.txt | 2 + - arch/x86/boot/compressed/eboot.c | 2 + - arch/x86/boot/compressed/head_32.S | 1 + - arch/x86/boot/compressed/head_64.S | 1 + - arch/x86/include/asm/bootparam_utils.h | 5 ++- - arch/x86/include/uapi/asm/bootparam.h | 3 +- - arch/x86/kernel/asm-offsets.c | 1 + - drivers/firmware/efi/libstub/Makefile | 2 +- - drivers/firmware/efi/libstub/arm-stub.c | 58 ++------------------------- - drivers/firmware/efi/libstub/secureboot.c | 66 +++++++++++++++++++++++++++++++ - include/linux/efi.h | 8 ++++ - 11 files changed, 90 insertions(+), 59 deletions(-) - create mode 100644 drivers/firmware/efi/libstub/secureboot.c - -diff --git a/Documentation/x86/zero-page.txt b/Documentation/x86/zero-page.txt -index 95a4d34..b8527c6 100644 ---- a/Documentation/x86/zero-page.txt -+++ b/Documentation/x86/zero-page.txt -@@ -31,6 +31,8 @@ Offset Proto Name Meaning - 1E9/001 ALL eddbuf_entries Number of entries in eddbuf (below) - 1EA/001 ALL edd_mbr_sig_buf_entries Number of entries in edd_mbr_sig_buffer - (below) -+1EB/001 ALL kbd_status Numlock is enabled -+1EC/001 ALL secure_boot Secure boot is enabled in the firmware - 1EF/001 ALL sentinel Used to detect broken bootloaders - 290/040 ALL edd_mbr_sig_buffer EDD MBR signatures - 2D0/A00 ALL e820_map E820 memory map table -diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c -index c8c32eb..5b151c2 100644 ---- a/arch/x86/boot/compressed/eboot.c -+++ b/arch/x86/boot/compressed/eboot.c -@@ -1158,6 +1158,8 @@ struct boot_params *efi_main(struct efi_config *c, - else - setup_boot_services32(efi_early); - -+ boot_params->secure_boot = efi_get_secureboot(sys_table); -+ - setup_graphics(boot_params); - - setup_efi_pci(boot_params); -diff --git a/arch/x86/boot/compressed/head_32.S b/arch/x86/boot/compressed/head_32.S -index d85b962..c635f7e 100644 ---- a/arch/x86/boot/compressed/head_32.S -+++ b/arch/x86/boot/compressed/head_32.S -@@ -61,6 +61,7 @@ - - __HEAD - ENTRY(startup_32) -+ movb $0, BP_secure_boot(%esi) - #ifdef CONFIG_EFI_STUB - jmp preferred_addr - -diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S -index beab832..ccd2c74 100644 ---- a/arch/x86/boot/compressed/head_64.S -+++ b/arch/x86/boot/compressed/head_64.S -@@ -244,6 +244,7 @@ ENTRY(startup_64) - * that maps our entire kernel(text+data+bss+brk), zero page - * and command line. - */ -+ movb $0, BP_secure_boot(%rsi) - #ifdef CONFIG_EFI_STUB - /* - * The entry point for the PE/COFF executable is efi_pe_entry, so -diff --git a/arch/x86/include/asm/bootparam_utils.h b/arch/x86/include/asm/bootparam_utils.h -index 4a8cb8d..7e16d53 100644 ---- a/arch/x86/include/asm/bootparam_utils.h -+++ b/arch/x86/include/asm/bootparam_utils.h -@@ -38,9 +38,10 @@ static void sanitize_boot_params(struct boot_params *boot_params) - memset(&boot_params->ext_ramdisk_image, 0, - (char *)&boot_params->efi_info - - (char *)&boot_params->ext_ramdisk_image); -- memset(&boot_params->kbd_status, 0, -+ boot_params->kbd_status = 0; -+ memset(&boot_params->_pad5, 0, - (char *)&boot_params->hdr - -- (char *)&boot_params->kbd_status); -+ (char *)&boot_params->_pad5); - memset(&boot_params->_pad7[0], 0, - (char *)&boot_params->edd_mbr_sig_buffer[0] - - (char *)&boot_params->_pad7[0]); -diff --git a/arch/x86/include/uapi/asm/bootparam.h b/arch/x86/include/uapi/asm/bootparam.h -index b10bf31..5138dac 100644 ---- a/arch/x86/include/uapi/asm/bootparam.h -+++ b/arch/x86/include/uapi/asm/bootparam.h -@@ -135,7 +135,8 @@ struct boot_params { - __u8 eddbuf_entries; /* 0x1e9 */ - __u8 edd_mbr_sig_buf_entries; /* 0x1ea */ - __u8 kbd_status; /* 0x1eb */ -- __u8 _pad5[3]; /* 0x1ec */ -+ __u8 secure_boot; /* 0x1ec */ -+ __u8 _pad5[2]; /* 0x1ed */ - /* - * The sentinel is set to a nonzero value (0xff) in header.S. - * -diff --git a/arch/x86/kernel/asm-offsets.c b/arch/x86/kernel/asm-offsets.c -index c62e015..de827d6 100644 ---- a/arch/x86/kernel/asm-offsets.c -+++ b/arch/x86/kernel/asm-offsets.c -@@ -81,6 +81,7 @@ void common(void) { - - BLANK(); - OFFSET(BP_scratch, boot_params, scratch); -+ OFFSET(BP_secure_boot, boot_params, secure_boot); - OFFSET(BP_loadflags, boot_params, hdr.loadflags); - OFFSET(BP_hardware_subarch, boot_params, hdr.hardware_subarch); - OFFSET(BP_version, boot_params, hdr.version); -diff --git a/drivers/firmware/efi/libstub/Makefile b/drivers/firmware/efi/libstub/Makefile -index 6621b13..9af9668 100644 ---- a/drivers/firmware/efi/libstub/Makefile -+++ b/drivers/firmware/efi/libstub/Makefile -@@ -28,7 +28,7 @@ OBJECT_FILES_NON_STANDARD := y - # Prevents link failures: __sanitizer_cov_trace_pc() is not linked in. - KCOV_INSTRUMENT := n - --lib-y := efi-stub-helper.o gop.o -+lib-y := efi-stub-helper.o gop.o secureboot.o - - # include the stub's generic dependencies from lib/ when building for ARM/arm64 - arm-deps := fdt_rw.c fdt_ro.c fdt_wip.c fdt.c fdt_empty_tree.c fdt_sw.c sort.c -diff --git a/drivers/firmware/efi/libstub/arm-stub.c b/drivers/firmware/efi/libstub/arm-stub.c -index b4f7d78..06d5034 100644 ---- a/drivers/firmware/efi/libstub/arm-stub.c -+++ b/drivers/firmware/efi/libstub/arm-stub.c -@@ -20,52 +20,6 @@ - - bool __nokaslr; - --static int efi_get_secureboot(efi_system_table_t *sys_table_arg) --{ -- static efi_char16_t const sb_var_name[] = { -- 'S', 'e', 'c', 'u', 'r', 'e', 'B', 'o', 'o', 't', 0 }; -- static efi_char16_t const sm_var_name[] = { -- 'S', 'e', 't', 'u', 'p', 'M', 'o', 'd', 'e', 0 }; -- -- efi_guid_t var_guid = EFI_GLOBAL_VARIABLE_GUID; -- efi_get_variable_t *f_getvar = sys_table_arg->runtime->get_variable; -- u8 val; -- unsigned long size = sizeof(val); -- efi_status_t status; -- -- status = f_getvar((efi_char16_t *)sb_var_name, (efi_guid_t *)&var_guid, -- NULL, &size, &val); -- -- if (status != EFI_SUCCESS) -- goto out_efi_err; -- -- if (val == 0) -- return 0; -- -- status = f_getvar((efi_char16_t *)sm_var_name, (efi_guid_t *)&var_guid, -- NULL, &size, &val); -- -- if (status != EFI_SUCCESS) -- goto out_efi_err; -- -- if (val == 1) -- return 0; -- -- return 1; -- --out_efi_err: -- switch (status) { -- case EFI_NOT_FOUND: -- return 0; -- case EFI_DEVICE_ERROR: -- return -EIO; -- case EFI_SECURITY_VIOLATION: -- return -EACCES; -- default: -- return -EINVAL; -- } --} -- - efi_status_t efi_open_volume(efi_system_table_t *sys_table_arg, - void *__image, void **__fh) - { -@@ -226,7 +180,7 @@ unsigned long efi_entry(void *handle, efi_system_table_t *sys_table, - efi_guid_t loaded_image_proto = LOADED_IMAGE_PROTOCOL_GUID; - unsigned long reserve_addr = 0; - unsigned long reserve_size = 0; -- int secure_boot = 0; -+ enum efi_secureboot_mode secure_boot = efi_secureboot_mode_unknown; - struct screen_info *si; - - /* Check if we were booted by the EFI firmware */ -@@ -296,19 +250,13 @@ unsigned long efi_entry(void *handle, efi_system_table_t *sys_table, - pr_efi_err(sys_table, "Failed to parse EFI cmdline options\n"); - - secure_boot = efi_get_secureboot(sys_table); -- if (secure_boot > 0) -- pr_efi(sys_table, "UEFI Secure Boot is enabled.\n"); -- -- if (secure_boot < 0) { -- pr_efi_err(sys_table, -- "could not determine UEFI Secure Boot status.\n"); -- } - - /* - * Unauthenticated device tree data is a security hazard, so - * ignore 'dtb=' unless UEFI Secure Boot is disabled. - */ -- if (secure_boot != 0 && strstr(cmdline_ptr, "dtb=")) { -+ if (secure_boot != efi_secureboot_mode_disabled && -+ strstr(cmdline_ptr, "dtb=")) { - pr_efi(sys_table, "Ignoring DTB from command line.\n"); - } else { - status = handle_cmdline_files(sys_table, image, cmdline_ptr, -diff --git a/drivers/firmware/efi/libstub/secureboot.c b/drivers/firmware/efi/libstub/secureboot.c -new file mode 100644 -index 0000000..70e2a36 ---- /dev/null -+++ b/drivers/firmware/efi/libstub/secureboot.c -@@ -0,0 +1,66 @@ -+/* -+ * Secure boot handling. -+ * -+ * Copyright (C) 2013,2014 Linaro Limited -+ * Roy Franz -+ * -+ * This file is part of the Linux kernel, and is made available under the -+ * terms of the GNU General Public License version 2. -+ * -+ */ -+ -+#include -+#include -+ -+/* BIOS variables */ -+static const efi_guid_t efi_variable_guid = EFI_GLOBAL_VARIABLE_GUID; -+static const efi_char16_t const efi_SecureBoot_name[] = { -+ 'S', 'e', 'c', 'u', 'r', 'e', 'B', 'o', 'o', 't', 0 -+}; -+static const efi_char16_t const efi_SetupMode_name[] = { -+ 'S', 'e', 't', 'u', 'p', 'M', 'o', 'd', 'e', 0 -+}; -+ -+#define get_efi_var(name, vendor, ...) \ -+ efi_call_runtime(get_variable, \ -+ (efi_char16_t *)(name), (efi_guid_t *)(vendor), \ -+ __VA_ARGS__); -+ -+/* -+ * Determine whether we're in secure boot mode. We return: -+ */ -+enum efi_secureboot_mode efi_get_secureboot(efi_system_table_t *sys_table_arg) -+{ -+ u8 secboot, setupmode; -+ unsigned long size; -+ efi_status_t status; -+ -+ size = sizeof(secboot); -+ status = get_efi_var(efi_SecureBoot_name, &efi_variable_guid, -+ NULL, &size, &secboot); -+ if (status != EFI_SUCCESS) -+ goto out_efi_err; -+ -+ size = sizeof(setupmode); -+ status = get_efi_var(efi_SetupMode_name, &efi_variable_guid, -+ NULL, &size, &setupmode); -+ if (status != EFI_SUCCESS) -+ goto out_efi_err; -+ -+ if (secboot == 0 || setupmode == 1) -+ goto secure_boot_disabled; -+ -+ pr_efi(sys_table_arg, "UEFI Secure Boot is enabled.\n"); -+ return efi_secureboot_mode_enabled; -+ -+secure_boot_disabled: -+ return efi_secureboot_mode_disabled; -+ -+out_efi_err: -+ pr_efi_err(sys_table_arg, "Could not determine UEFI Secure Boot status.\n"); -+ if (status == EFI_NOT_FOUND) -+ goto secure_boot_disabled; -+ return efi_secureboot_mode_unknown; -+} -diff --git a/include/linux/efi.h b/include/linux/efi.h -index c790455..92e23f0 100644 ---- a/include/linux/efi.h -+++ b/include/linux/efi.h -@@ -1477,6 +1477,14 @@ efi_status_t efi_setup_gop(efi_system_table_t *sys_table_arg, - bool efi_runtime_disabled(void); - extern void efi_call_virt_check_flags(unsigned long flags, const char *call); - -+enum efi_secureboot_mode { -+ efi_secureboot_mode_unset, -+ efi_secureboot_mode_unknown, -+ efi_secureboot_mode_disabled, -+ efi_secureboot_mode_enabled, -+}; -+enum efi_secureboot_mode efi_get_secureboot(efi_system_table_t *sys_table); -+ - /* - * Arch code can implement the following three template macros, avoiding - * reptition for the void/non-void return cases of {__,}efi_call_virt(): --- -2.9.3 - -From baa6cdc01e6017c6bd798b1af89458359e13155e Mon Sep 17 00:00:00 2001 -From: Josh Boyer -Date: Mon, 21 Nov 2016 23:55:55 +0000 -Subject: [PATCH 06/32] efi: Disable secure boot if shim is in insecure mode - -A user can manually tell the shim boot loader to disable validation of -images it loads. When a user does this, it creates a UEFI variable called -MokSBState that does not have the runtime attribute set. Given that the -user explicitly disabled validation, we can honor that and not enable -secure boot mode if that variable is set. - -Signed-off-by: Josh Boyer -Signed-off-by: David Howells ---- - drivers/firmware/efi/libstub/secureboot.c | 24 +++++++++++++++++++++++- - 1 file changed, 23 insertions(+), 1 deletion(-) - -diff --git a/drivers/firmware/efi/libstub/secureboot.c b/drivers/firmware/efi/libstub/secureboot.c -index 70e2a36..ba6ef71 100644 ---- a/drivers/firmware/efi/libstub/secureboot.c -+++ b/drivers/firmware/efi/libstub/secureboot.c -@@ -23,6 +23,12 @@ static const efi_char16_t const efi_SetupMode_name[] = { - 'S', 'e', 't', 'u', 'p', 'M', 'o', 'd', 'e', 0 - }; - -+/* SHIM variables */ -+static const efi_guid_t shim_guid = EFI_SHIM_LOCK_GUID; -+static efi_char16_t const shim_MokSBState_name[] = { -+ 'M', 'o', 'k', 'S', 'B', 'S', 't', 'a', 't', 'e', 0 -+}; -+ - #define get_efi_var(name, vendor, ...) \ - efi_call_runtime(get_variable, \ - (efi_char16_t *)(name), (efi_guid_t *)(vendor), \ -@@ -33,7 +39,8 @@ static const efi_char16_t const efi_SetupMode_name[] = { - */ - enum efi_secureboot_mode efi_get_secureboot(efi_system_table_t *sys_table_arg) - { -- u8 secboot, setupmode; -+ u32 attr; -+ u8 secboot, setupmode, moksbstate; - unsigned long size; - efi_status_t status; - -@@ -52,6 +59,21 @@ enum efi_secureboot_mode efi_get_secureboot(efi_system_table_t *sys_table_arg) - if (secboot == 0 || setupmode == 1) - goto secure_boot_disabled; - -+ /* See if a user has put shim into insecure mode. If so, and if the -+ * variable doesn't have the runtime attribute set, we might as well -+ * honor that. -+ */ -+ size = sizeof(moksbstate); -+ status = get_efi_var(shim_MokSBState_name, &shim_guid, -+ &attr, &size, &moksbstate); -+ -+ /* If it fails, we don't care why. Default to secure */ -+ if (status != EFI_SUCCESS) -+ goto secure_boot_enabled; -+ if (!(attr & EFI_VARIABLE_RUNTIME_ACCESS) && moksbstate == 1) -+ goto secure_boot_disabled; -+ -+secure_boot_enabled: - pr_efi(sys_table_arg, "UEFI Secure Boot is enabled.\n"); - return efi_secureboot_mode_enabled; - --- -2.9.3 - -From 9079547f4808ea5c8cd844bf40d3895994bd175e Mon Sep 17 00:00:00 2001 +From df7d76ae50f18d4465e59fdf7f19d3df44906cb5 Mon Sep 17 00:00:00 2001 From: Josh Boyer Date: Mon, 21 Nov 2016 23:55:55 +0000 Subject: [PATCH 07/32] efi: Add EFI_SECURE_BOOT bit @@ -676,126 +13,38 @@ out whether secure boot mode is enabled so that it can be disabled. Signed-off-by: Josh Boyer Signed-off-by: David Howells --- - arch/x86/kernel/setup.c | 15 +++++++++++++++ - include/linux/efi.h | 1 + - 2 files changed, 16 insertions(+) + arch/x86/kernel/setup.c | 1 + + include/linux/efi.h | 1 + + 2 files changed, 2 insertions(+) diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c -index 9c337b0..d8972ec 100644 +index 69780ed..447905e 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c -@@ -1152,6 +1152,21 @@ void __init setup_arch(char **cmdline_p) - /* Allocate bigger log buffer */ - setup_log_buf(1); - -+ if (IS_ENABLED(CONFIG_EFI)) { -+ switch (boot_params.secure_boot) { -+ case efi_secureboot_mode_disabled: -+ pr_info("Secure boot disabled\n"); -+ break; -+ case efi_secureboot_mode_enabled: +@@ -1182,6 +1182,7 @@ void __init setup_arch(char **cmdline_p) + pr_info("Secure boot disabled\n"); + break; + case efi_secureboot_mode_enabled: + set_bit(EFI_SECURE_BOOT, &efi.flags); -+ pr_info("Secure boot enabled\n"); -+ break; -+ default: -+ pr_info("Secure boot could not be determined\n"); -+ break; -+ } -+ } -+ - reserve_initrd(); - - acpi_table_upgrade(); + pr_info("Secure boot enabled\n"); + break; + default: diff --git a/include/linux/efi.h b/include/linux/efi.h -index 92e23f0..135ca9c 100644 +index 94d34e0..6049600 100644 --- a/include/linux/efi.h +++ b/include/linux/efi.h -@@ -1066,6 +1066,7 @@ extern int __init efi_setup_pcdp_console(char *); - #define EFI_ARCH_1 7 /* First arch-specific bit */ +@@ -1069,6 +1069,7 @@ extern int __init efi_setup_pcdp_console(char *); #define EFI_DBG 8 /* Print additional debug info at runtime */ #define EFI_NX_PE_DATA 9 /* Can runtime data regions be mapped non-executable? */ -+#define EFI_SECURE_BOOT 10 /* Are we in Secure Boot mode? */ - + #define EFI_MEM_ATTR 10 /* Did firmware publish an EFI_MEMORY_ATTRIBUTES table? */ ++#define EFI_SECURE_BOOT 11 /* Are we in Secure Boot mode? */ + #ifdef CONFIG_EFI /* -- -2.9.3 +2.7.4 -From eada0243f0b8fc21588a21c564187219dee03e3c Mon Sep 17 00:00:00 2001 -From: David Howells -Date: Fri, 25 Nov 2016 11:52:05 +0000 -Subject: [PATCH 08/32] efi: Handle secure boot from UEFI-2.6 - -UEFI-2.6 adds a new variable, DeployedMode. If it exists, this must be 1 -if we're to engage lockdown mode. - -Reported-by: James Bottomley -Signed-off-by: David Howells ---- - drivers/firmware/efi/libstub/secureboot.c | 16 +++++++++++++++- - include/linux/efi.h | 4 ++++ - 2 files changed, 19 insertions(+), 1 deletion(-) - -diff --git a/drivers/firmware/efi/libstub/secureboot.c b/drivers/firmware/efi/libstub/secureboot.c -index ba6ef71..333b159 100644 ---- a/drivers/firmware/efi/libstub/secureboot.c -+++ b/drivers/firmware/efi/libstub/secureboot.c -@@ -22,6 +22,9 @@ static const efi_char16_t const efi_SecureBoot_name[] = { - static const efi_char16_t const efi_SetupMode_name[] = { - 'S', 'e', 't', 'u', 'p', 'M', 'o', 'd', 'e', 0 - }; -+static const efi_char16_t const efi_DeployedMode_name[] = { -+ 'D', 'e', 'p', 'l', 'o', 'y', 'e', 'd', 'M', 'o', 'd', 'e', 0 -+}; - - /* SHIM variables */ - static const efi_guid_t shim_guid = EFI_SHIM_LOCK_GUID; -@@ -40,7 +43,7 @@ static efi_char16_t const shim_MokSBState_name[] = { - enum efi_secureboot_mode efi_get_secureboot(efi_system_table_t *sys_table_arg) - { - u32 attr; -- u8 secboot, setupmode, moksbstate; -+ u8 secboot, setupmode, deployedmode, moksbstate; - unsigned long size; - efi_status_t status; - -@@ -59,6 +62,17 @@ enum efi_secureboot_mode efi_get_secureboot(efi_system_table_t *sys_table_arg) - if (secboot == 0 || setupmode == 1) - goto secure_boot_disabled; - -+ /* UEFI-2.6 requires DeployedMode to be 1. */ -+ if (sys_table_arg->hdr.revision >= EFI_2_60_SYSTEM_TABLE_REVISION) { -+ size = sizeof(deployedmode); -+ status = get_efi_var(efi_DeployedMode_name, &efi_variable_guid, -+ NULL, &size, &deployedmode); -+ if (status != EFI_SUCCESS) -+ goto out_efi_err; -+ if (deployedmode == 0) -+ goto secure_boot_disabled; -+ } -+ - /* See if a user has put shim into insecure mode. If so, and if the - * variable doesn't have the runtime attribute set, we might as well - * honor that. -diff --git a/include/linux/efi.h b/include/linux/efi.h -index 135ca9c..e1893f5 100644 ---- a/include/linux/efi.h -+++ b/include/linux/efi.h -@@ -645,6 +645,10 @@ typedef struct { - - #define EFI_SYSTEM_TABLE_SIGNATURE ((u64)0x5453595320494249ULL) - -+#define EFI_2_60_SYSTEM_TABLE_REVISION ((2 << 16) | (60)) -+#define EFI_2_50_SYSTEM_TABLE_REVISION ((2 << 16) | (50)) -+#define EFI_2_40_SYSTEM_TABLE_REVISION ((2 << 16) | (40)) -+#define EFI_2_31_SYSTEM_TABLE_REVISION ((2 << 16) | (31)) - #define EFI_2_30_SYSTEM_TABLE_REVISION ((2 << 16) | (30)) - #define EFI_2_20_SYSTEM_TABLE_REVISION ((2 << 16) | (20)) - #define EFI_2_10_SYSTEM_TABLE_REVISION ((2 << 16) | (10)) --- -2.9.3 - -From 3b0695eda22ad712a2b9be9bb70979d875a37816 Mon Sep 17 00:00:00 2001 +From f05a90c19a9613d8d50597319ed91f691e25b689 Mon Sep 17 00:00:00 2001 From: David Howells Date: Mon, 21 Nov 2016 23:36:17 +0000 Subject: [PATCH 09/32] Add the ability to lock down access to the running @@ -818,13 +67,13 @@ Signed-off-by: David Howells create mode 100644 security/lock_down.c diff --git a/include/linux/kernel.h b/include/linux/kernel.h -index bc6ed52..8ab309d 100644 +index cb09238..3cd3be9 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h -@@ -268,6 +268,15 @@ extern int oops_may_print(void); +@@ -273,6 +273,15 @@ extern int oops_may_print(void); void do_exit(long error_code) __noreturn; void complete_and_exit(struct completion *, long) __noreturn; - + +#ifdef CONFIG_LOCK_DOWN_KERNEL +extern bool kernel_is_locked_down(void); +#else @@ -838,13 +87,13 @@ index bc6ed52..8ab309d 100644 int __must_check _kstrtoul(const char *s, unsigned int base, unsigned long *res); int __must_check _kstrtol(const char *s, unsigned int base, long *res); diff --git a/include/linux/security.h b/include/linux/security.h -index c2125e9..41a7325 100644 +index d3868f2..187b74b 100644 --- a/include/linux/security.h +++ b/include/linux/security.h -@@ -1685,5 +1685,16 @@ static inline void free_secdata(void *secdata) +@@ -1679,5 +1679,16 @@ static inline void free_secdata(void *secdata) { } #endif /* CONFIG_SECURITY */ - + +#ifdef CONFIG_LOCK_DOWN_KERNEL +extern void lock_kernel_down(void); +#ifdef CONFIG_ALLOW_LOCKDOWN_LIFT @@ -857,15 +106,15 @@ index c2125e9..41a7325 100644 +#endif + #endif /* ! __LINUX_SECURITY_H */ - + diff --git a/security/Kconfig b/security/Kconfig -index 118f454..fa1a678 100644 +index d900f47..d9b391d 100644 --- a/security/Kconfig +++ b/security/Kconfig -@@ -158,6 +158,21 @@ config HARDENED_USERCOPY_PAGESPAN - been removed. This config is intended to be used only while - trying to find such users. - +@@ -193,6 +193,21 @@ config STATIC_USERMODEHELPER_PATH + If you wish for all usermode helper programs to be disabled, + specify an empty string here (i.e. ""). + +config LOCK_DOWN_KERNEL + bool "Allow the kernel to be 'locked down'" + help @@ -942,9 +191,9 @@ index 0000000..5788c60 +} +EXPORT_SYMBOL(kernel_is_locked_down); -- -2.9.3 +2.7.4 -From c1cc643f82e1c9efee123eb81befb58e41b87310 Mon Sep 17 00:00:00 2001 +From fb6feb38e297260d050fc477c72683ac51d07ae3 Mon Sep 17 00:00:00 2001 From: David Howells Date: Mon, 21 Nov 2016 23:55:55 +0000 Subject: [PATCH 10/32] efi: Lock down the kernel if booted in secure boot mode @@ -962,13 +211,13 @@ Signed-off-by: David Howells 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig -index bada636..5b19997 100644 +index 874c123..a315974 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig -@@ -1786,6 +1786,18 @@ config EFI_MIXED - +@@ -1816,6 +1816,18 @@ config EFI_MIXED + If unsure, say N. - + +config EFI_SECURE_BOOT_LOCK_DOWN + def_bool n + depends on EFI @@ -985,7 +234,7 @@ index bada636..5b19997 100644 def_bool y prompt "Enable seccomp to safely compute untrusted bytecode" diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c -index d8972ec..facaeb9 100644 +index 447905e..d44e60e 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -69,6 +69,7 @@ @@ -993,10 +242,10 @@ index d8972ec..facaeb9 100644 #include #include +#include - + #include