diff --git a/Add-EFI-signature-data-types.patch b/Add-EFI-signature-data-types.patch index 40d14f949..f7f7c36d3 100644 --- a/Add-EFI-signature-data-types.patch +++ b/Add-EFI-signature-data-types.patch @@ -1,37 +1,36 @@ -From ba3f737b8521314b62edaa7d4cc4bdc9aeefe394 Mon Sep 17 00:00:00 2001 +From 0451d4e795929a69a0fda6d960aa4b077c5bd179 Mon Sep 17 00:00:00 2001 From: Dave Howells -Date: Tue, 23 Oct 2012 09:30:54 -0400 -Subject: [PATCH 15/20] Add EFI signature data types +Date: Fri, 5 May 2017 08:21:58 +0100 +Subject: [PATCH 1/4] efi: Add EFI signature data types -Add the data types that are used for containing hashes, keys and certificates -for cryptographic verification. - -Bugzilla: N/A -Upstream-status: Fedora mustard for now +Add the data types that are used for containing hashes, keys and +certificates for cryptographic verification along with their corresponding +type GUIDs. Signed-off-by: David Howells --- - include/linux/efi.h | 17 +++++++++++++++++ - 1 file changed, 17 insertions(+) + include/linux/efi.h | 25 +++++++++++++++++++++++++ + 1 file changed, 25 insertions(+) diff --git a/include/linux/efi.h b/include/linux/efi.h -index 5af91b58afae..190858d62fe3 100644 +index ec36f42..3259ad6 100644 --- a/include/linux/efi.h +++ b/include/linux/efi.h -@@ -603,6 +603,9 @@ void efi_native_runtime_setup(void); - #define LINUX_EFI_LOADER_ENTRY_GUID EFI_GUID(0x4a67b082, 0x0a4c, 0x41cf, 0xb6, 0xc7, 0x44, 0x0b, 0x29, 0xbb, 0x8c, 0x4f) - #define LINUX_EFI_RANDOM_SEED_TABLE_GUID EFI_GUID(0x1ce1e5bc, 0x7ceb, 0x42f2, 0x81, 0xe5, 0x8a, 0xad, 0xf1, 0x80, 0xf5, 0x7b) - -+#define EFI_CERT_SHA256_GUID EFI_GUID(0xc1c41626, 0x504c, 0x4092, 0xac, 0xa9, 0x41, 0xf9, 0x36, 0x93, 0x43, 0x28) -+#define EFI_CERT_X509_GUID EFI_GUID(0xa5c059a1, 0x94e4, 0x4aa7, 0x87, 0xb5, 0xab, 0x15, 0x5c, 0x2b, 0xf0, 0x72) +@@ -614,6 +614,10 @@ void efi_native_runtime_setup(void); + #define EFI_IMAGE_SECURITY_DATABASE_GUID EFI_GUID(0xd719b2cb, 0x3d3a, 0x4596, 0xa3, 0xbc, 0xda, 0xd0, 0x0e, 0x67, 0x65, 0x6f) + #define EFI_SHIM_LOCK_GUID EFI_GUID(0x605dab50, 0xe046, 0x4300, 0xab, 0xb6, 0x3d, 0xd8, 0x10, 0xdd, 0x8b, 0x23) + ++#define EFI_CERT_SHA256_GUID EFI_GUID(0xc1c41626, 0x504c, 0x4092, 0xac, 0xa9, 0x41, 0xf9, 0x36, 0x93, 0x43, 0x28) ++#define EFI_CERT_X509_GUID EFI_GUID(0xa5c059a1, 0x94e4, 0x4aa7, 0x87, 0xb5, 0xab, 0x15, 0x5c, 0x2b, 0xf0, 0x72) ++#define EFI_CERT_X509_SHA256_GUID EFI_GUID(0x3bd2a492, 0x96c0, 0x4079, 0xb4, 0x20, 0xfc, 0xf9, 0x8e, 0xf1, 0x03, 0xed) + - typedef struct { - efi_guid_t guid; - u64 table; -@@ -853,6 +856,20 @@ typedef struct { + /* + * This GUID is used to pass to the kernel proper the struct screen_info + * structure that was populated by the stub based on the GOP protocol instance +@@ -873,6 +877,27 @@ typedef struct { efi_memory_desc_t entry[0]; } efi_memory_attributes_table_t; - + +typedef struct { + efi_guid_t signature_owner; + u8 signature_data[]; @@ -45,6 +44,13 @@ index 5af91b58afae..190858d62fe3 100644 + u8 signature_header[]; + /* efi_signature_data_t signatures[][] */ +} efi_signature_list_t; ++ ++typedef u8 efi_sha256_hash_t[32]; ++ ++typedef struct { ++ efi_sha256_hash_t to_be_signed_hash; ++ efi_time_t time_of_revocation; ++} efi_cert_x509_sha256_t; + /* * All runtime access to EFI goes through this structure: diff --git a/Add-an-EFI-signature-blob-parser-and-key-loader.patch b/Add-an-EFI-signature-blob-parser-and-key-loader.patch index f57abc9f2..e3941eeaa 100644 --- a/Add-an-EFI-signature-blob-parser-and-key-loader.patch +++ b/Add-an-EFI-signature-blob-parser-and-key-loader.patch @@ -1,29 +1,38 @@ -From 822b4b3eb76ca451a416a51f0a7bfedfa5c5ea39 Mon Sep 17 00:00:00 2001 +From e4c62c12635a371e43bd17e8d33a936668264491 Mon Sep 17 00:00:00 2001 From: Dave Howells -Date: Tue, 23 Oct 2012 09:36:28 -0400 -Subject: [PATCH 16/20] Add an EFI signature blob parser and key loader. +Date: Fri, 5 May 2017 08:21:58 +0100 +Subject: [PATCH 2/4] efi: Add an EFI signature blob parser -X.509 certificates are loaded into the specified keyring as asymmetric type -keys. +Add a function to parse an EFI signature blob looking for elements of +interest. A list is made up of a series of sublists, where all the +elements in a sublist are of the same type, but sublists can be of +different types. + +For each sublist encountered, the function pointed to by the +get_handler_for_guid argument is called with the type specifier GUID and +returns either a pointer to a function to handle elements of that type or +NULL if the type is not of interest. + +If the sublist is of interest, each element is passed to the handler +function in turn. -[labbott@fedoraproject.org: Drop KEY_ALLOC_TRUSTED] Signed-off-by: David Howells --- - crypto/asymmetric_keys/Kconfig | 8 +++ - crypto/asymmetric_keys/Makefile | 1 + - crypto/asymmetric_keys/efi_parser.c | 108 ++++++++++++++++++++++++++++++++++++ - include/linux/efi.h | 4 ++ - 4 files changed, 121 insertions(+) - create mode 100644 crypto/asymmetric_keys/efi_parser.c + certs/Kconfig | 8 ++++ + certs/Makefile | 1 + + certs/efi_parser.c | 112 ++++++++++++++++++++++++++++++++++++++++++++++++++++ + include/linux/efi.h | 9 +++++ + 4 files changed, 130 insertions(+) + create mode 100644 certs/efi_parser.c + +diff --git a/certs/Kconfig b/certs/Kconfig +index 6ce51ed..630ae09 100644 +--- a/certs/Kconfig ++++ b/certs/Kconfig +@@ -82,4 +82,12 @@ config SYSTEM_BLACKLIST_HASH_LIST + wrapper to incorporate the list into the kernel. Each should + be a string of hex digits. -diff --git a/crypto/asymmetric_keys/Kconfig b/crypto/asymmetric_keys/Kconfig -index 331f6baf2df8..5f9002d3192e 100644 ---- a/crypto/asymmetric_keys/Kconfig -+++ b/crypto/asymmetric_keys/Kconfig -@@ -61,4 +61,12 @@ config SIGNED_PE_FILE_VERIFICATION - This option provides support for verifying the signature(s) on a - signed PE binary. - +config EFI_SIGNATURE_LIST_PARSER + bool "EFI signature list parser" + depends on EFI @@ -32,28 +41,28 @@ index 331f6baf2df8..5f9002d3192e 100644 + This option provides support for parsing EFI signature lists for + X.509 certificates and turning them into keys. + - endif # ASYMMETRIC_KEY_TYPE -diff --git a/crypto/asymmetric_keys/Makefile b/crypto/asymmetric_keys/Makefile -index 6516855bec18..c099fe15ed6d 100644 ---- a/crypto/asymmetric_keys/Makefile -+++ b/crypto/asymmetric_keys/Makefile -@@ -10,6 +10,7 @@ asymmetric_keys-y := \ - signature.o - - obj-$(CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE) += public_key.o + endmenu +diff --git a/certs/Makefile b/certs/Makefile +index 4119bb3..738151a 100644 +--- a/certs/Makefile ++++ b/certs/Makefile +@@ -9,6 +9,7 @@ obj-$(CONFIG_SYSTEM_BLACKLIST_KEYRING) += blacklist_hashes.o + else + obj-$(CONFIG_SYSTEM_BLACKLIST_KEYRING) += blacklist_nohashes.o + endif +obj-$(CONFIG_EFI_SIGNATURE_LIST_PARSER) += efi_parser.o - - # - # X.509 Certificate handling -diff --git a/crypto/asymmetric_keys/efi_parser.c b/crypto/asymmetric_keys/efi_parser.c + + ifeq ($(CONFIG_SYSTEM_TRUSTED_KEYRING),y) + +diff --git a/certs/efi_parser.c b/certs/efi_parser.c new file mode 100644 -index 000000000000..636feb18b733 +index 0000000..4e396f9 --- /dev/null -+++ b/crypto/asymmetric_keys/efi_parser.c -@@ -0,0 +1,108 @@ ++++ b/certs/efi_parser.c +@@ -0,0 +1,112 @@ +/* EFI signature/key/certificate list parser + * -+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved. ++ * Copyright (C) 2012, 2016 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + * + * This program is free software; you can redistribute it and/or @@ -67,27 +76,44 @@ index 000000000000..636feb18b733 +#include +#include +#include -+#include -+ -+static __initdata efi_guid_t efi_cert_x509_guid = EFI_CERT_X509_GUID; + +/** + * parse_efi_signature_list - Parse an EFI signature list for certificates ++ * @source: The source of the key + * @data: The data blob to parse + * @size: The size of the data blob -+ * @keyring: The keyring to add extracted keys to ++ * @get_handler_for_guid: Get the handler func for the sig type (or NULL) ++ * ++ * Parse an EFI signature list looking for elements of interest. A list is ++ * made up of a series of sublists, where all the elements in a sublist are of ++ * the same type, but sublists can be of different types. ++ * ++ * For each sublist encountered, the @get_handler_for_guid function is called ++ * with the type specifier GUID and returns either a pointer to a function to ++ * handle elements of that type or NULL if the type is not of interest. ++ * ++ * If the sublist is of interest, each element is passed to the handler ++ * function in turn. ++ * ++ * Error EBADMSG is returned if the list doesn't parse correctly and 0 is ++ * returned if the list was parsed correctly. No error can be returned from ++ * the @get_handler_for_guid function or the element handler function it ++ * returns. + */ -+int __init parse_efi_signature_list(const void *data, size_t size, struct key *keyring) ++int __init parse_efi_signature_list( ++ const char *source, ++ const void *data, size_t size, ++ efi_element_handler_t (*get_handler_for_guid)(const efi_guid_t *)) +{ ++ efi_element_handler_t handler; + unsigned offs = 0; -+ size_t lsize, esize, hsize, elsize; + + pr_devel("-->%s(,%zu)\n", __func__, size); + + while (size > 0) { -+ efi_signature_list_t list; + const efi_signature_data_t *elem; -+ key_ref_t key; ++ efi_signature_list_t list; ++ size_t lsize, esize, hsize, elsize; + + if (size < sizeof(list)) + return -EBADMSG; @@ -108,6 +134,7 @@ index 000000000000..636feb18b733 + __func__, offs); + return -EBADMSG; + } ++ + if (lsize < sizeof(list) || + lsize - sizeof(list) < hsize || + esize < sizeof(*elem) || @@ -117,7 +144,8 @@ index 000000000000..636feb18b733 + return -EBADMSG; + } + -+ if (efi_guidcmp(list.signature_type, efi_cert_x509_guid) != 0) { ++ handler = get_handler_for_guid(&list.signature_type); ++ if (!handler) { + data += lsize; + size -= lsize; + offs += lsize; @@ -132,24 +160,9 @@ index 000000000000..636feb18b733 + elem = data; + + pr_devel("ELEM[%04x]\n", offs); -+ -+ key = key_create_or_update( -+ make_key_ref(keyring, 1), -+ "asymmetric", -+ NULL, ++ handler(source, + &elem->signature_data, -+ esize - sizeof(*elem), -+ (KEY_POS_ALL & ~KEY_POS_SETATTR) | -+ KEY_USR_VIEW, -+ KEY_ALLOC_NOT_IN_QUOTA); -+ -+ if (IS_ERR(key)) -+ pr_err("Problem loading in-kernel X.509 certificate (%ld)\n", -+ PTR_ERR(key)); -+ else -+ pr_notice("Loaded cert '%s' linked to '%s'\n", -+ key_ref_to_ptr(key)->description, -+ keyring->description); ++ esize - sizeof(*elem)); + + data += esize; + size -= esize; @@ -160,16 +173,21 @@ index 000000000000..636feb18b733 + return 0; +} diff --git a/include/linux/efi.h b/include/linux/efi.h -index 190858d62fe3..668aa1244885 100644 +index 3259ad6..08024c6 100644 --- a/include/linux/efi.h +++ b/include/linux/efi.h -@@ -1025,6 +1025,10 @@ extern int efi_memattr_apply_permissions(struct mm_struct *mm, +@@ -1055,6 +1055,15 @@ extern int efi_memattr_apply_permissions(struct mm_struct *mm, char * __init efi_md_typeattr_format(char *buf, size_t size, const efi_memory_desc_t *md); - -+struct key; -+extern int __init parse_efi_signature_list(const void *data, size_t size, -+ struct key *keyring); + ++ ++typedef void (*efi_element_handler_t)(const char *source, ++ const void *element_data, ++ size_t element_size); ++extern int __init parse_efi_signature_list( ++ const char *source, ++ const void *data, size_t size, ++ efi_element_handler_t (*get_handler_for_guid)(const efi_guid_t *)); + /** * efi_range_is_wc - check the WC bit on an address range diff --git a/AllWinner-h3.patch b/AllWinner-h3.patch deleted file mode 100644 index c75da8aa8..000000000 --- a/AllWinner-h3.patch +++ /dev/null @@ -1,1080 +0,0 @@ -From patchwork Mon Mar 6 17:17:45 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v8, 1/6] ARM: dts: sun8i: h3: drop skeleton.dtsi inclusion in H3 DTSI -From: Icenowy Zheng -X-Patchwork-Id: 9607205 -Message-Id: <20170306171750.7491-2-icenowy@aosc.xyz> -To: Rob Herring , - Maxime Ripard , - Chen-Yu Tsai -Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, - linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Icenowy Zheng -Date: Tue, 7 Mar 2017 01:17:45 +0800 - -The skeleton.dtsi file is now deprecated, and do not exist in ARM64 -environment. - -Since we will soon reuse most part of H3 DTSI for H5, which is an ARM64 -chip, drop skeleton.dtsi inclusion now. - -Signed-off-by: Icenowy Zheng ---- -Changes in v8: -- Add h3: in commit message. - - arch/arm/boot/dts/sun8i-h3.dtsi | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -index 27780b97c863..9a3435527fde 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -40,8 +40,6 @@ - * OTHER DEALINGS IN THE SOFTWARE. - */ - --#include "skeleton.dtsi" -- - #include - #include - #include -From patchwork Mon Mar 6 17:17:46 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v8, - 2/6] ARM: dts: sun8i: h3: drop pinctrl-a10.h inclusion for H3 DTSI -From: Icenowy Zheng -X-Patchwork-Id: 9607207 -Message-Id: <20170306171750.7491-3-icenowy@aosc.xyz> -To: Rob Herring , - Maxime Ripard , - Chen-Yu Tsai -Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, - linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Icenowy Zheng -Date: Tue, 7 Mar 2017 01:17:46 +0800 - -After converting to generic pinconf binding, pinctrl-a10.h is now not -used at all. - -Drop its inclusion for H3 DTSI. - -Signed-off-by: Icenowy Zheng ---- -Changes in v8: -- Add h3: in commit message. - - arch/arm/boot/dts/sun8i-h3.dtsi | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -index 9a3435527fde..b250e6d03b57 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -42,7 +42,6 @@ - - #include - #include --#include - #include - - / { -From patchwork Mon Mar 6 17:17:47 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v8, - 3/6] ARM: dts: sun8i: h3: correct the GIC compatible in H3 to gic-400 -From: Icenowy Zheng -X-Patchwork-Id: 9607209 -Message-Id: <20170306171750.7491-4-icenowy@aosc.xyz> -To: Rob Herring , - Maxime Ripard , - Chen-Yu Tsai -Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, - linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Icenowy Zheng -Date: Tue, 7 Mar 2017 01:17:47 +0800 - -According to the datasheets provided by Allwinner, both Allwinner H3 and -H5 use GIC-400 as their interrupt controller. - -For better device tree reusing, correct the GIC compatible in H3 DTSI to -"arm,gic-400", thus this node can be reused in H5. - -Signed-off-by: Icenowy Zheng ---- -Changes in v8: -- Add h3: in commit message. - - arch/arm/boot/dts/sun8i-h3.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -index b250e6d03b57..c13fbfb92592 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -586,7 +586,7 @@ - }; - - gic: interrupt-controller@01c81000 { -- compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; -+ compatible = "arm,gic-400"; - reg = <0x01c81000 0x1000>, - <0x01c82000 0x2000>, - <0x01c84000 0x2000>, -From patchwork Mon Mar 6 17:17:48 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v8,4/6] arm: dts: sun8i: h3: split Allwinner H3 .dtsi -From: Icenowy Zheng -X-Patchwork-Id: 9607211 -Message-Id: <20170306171750.7491-5-icenowy@aosc.xyz> -To: Rob Herring , - Maxime Ripard , - Chen-Yu Tsai -Cc: devicetree@vger.kernel.org, Andre Przywara , - linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, - Icenowy Zheng , linux-arm-kernel@lists.infradead.org -Date: Tue, 7 Mar 2017 01:17:48 +0800 - -From: Andre Przywara - -The new Allwinner H5 SoC is pin-compatible to the H3 SoC, but with the -Cortex-A7 cores replaced by Cortex-A53 cores and the MMC controller -updated. So we should really share almost the whole .dtsi. -In preparation for that move the peripheral parts of the existing -sun8i-h3.dtsi into a new sunxi-h3-h5.dtsi. -The actual sun8i-h3.dtsi then includes that and defines the H3 specific -parts on top of it. - -Signed-off-by: Andre Przywara -[Icenowy: also split out mmc and gic, as well as pio and ccu's - compatible, and make drop of skeleton into a seperated patch] -Signed-off-by: Icenowy Zheng ---- -Changes in v8: -- Add h3: in commit message. -Changes in v7: -- Extract GIC, skeleton.dtsi and pinctrl-a10.h changes to seperate patches. -Changes in v6: -- Extract GIC device node to sunxi-h3-h5.dtsi and correct its compatible - as "arm,gic-400". -Changes in v3: -- Use label-based syntax to reference nodes in H3 DTSI file. -Changes in v2: -- Rebase on current linux-next (because of the add of audio codec) - - arch/arm/boot/dts/sun8i-h3.dtsi | 771 ++++----------------- - .../boot/dts/{sun8i-h3.dtsi => sunxi-h3-h5.dtsi} | 73 +- - 2 files changed, 133 insertions(+), 711 deletions(-) - rewrite arch/arm/boot/dts/sun8i-h3.dtsi (83%) - copy arch/arm/boot/dts/{sun8i-h3.dtsi => sunxi-h3-h5.dtsi} (90%) - -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -dissimilarity index 83% -index c13fbfb92592..b36f9f423c39 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -1,645 +1,126 @@ --/* -- * Copyright (C) 2015 Jens Kuske -- * -- * This file is dual-licensed: you can use it either under the terms -- * of the GPL or the X11 license, at your option. Note that this dual -- * licensing only applies to this file, and not this project as a -- * whole. -- * -- * a) This file is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This file is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * Or, alternatively, -- * -- * b) Permission is hereby granted, free of charge, to any person -- * obtaining a copy of this software and associated documentation -- * files (the "Software"), to deal in the Software without -- * restriction, including without limitation the rights to use, -- * copy, modify, merge, publish, distribute, sublicense, and/or -- * sell copies of the Software, and to permit persons to whom the -- * Software is furnished to do so, subject to the following -- * conditions: -- * -- * The above copyright notice and this permission notice shall be -- * included in all copies or substantial portions of the Software. -- * -- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -- * OTHER DEALINGS IN THE SOFTWARE. -- */ -- --#include --#include --#include -- --/ { -- interrupt-parent = <&gic>; -- -- cpus { -- #address-cells = <1>; -- #size-cells = <0>; -- -- cpu@0 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <0>; -- }; -- -- cpu@1 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <1>; -- }; -- -- cpu@2 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <2>; -- }; -- -- cpu@3 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <3>; -- }; -- }; -- -- timer { -- compatible = "arm,armv7-timer"; -- interrupts = , -- , -- , -- ; -- }; -- -- clocks { -- #address-cells = <1>; -- #size-cells = <1>; -- ranges; -- -- osc24M: osc24M_clk { -- #clock-cells = <0>; -- compatible = "fixed-clock"; -- clock-frequency = <24000000>; -- clock-output-names = "osc24M"; -- }; -- -- osc32k: osc32k_clk { -- #clock-cells = <0>; -- compatible = "fixed-clock"; -- clock-frequency = <32768>; -- clock-output-names = "osc32k"; -- }; -- -- apb0: apb0_clk { -- compatible = "fixed-factor-clock"; -- #clock-cells = <0>; -- clock-div = <1>; -- clock-mult = <1>; -- clocks = <&osc24M>; -- clock-output-names = "apb0"; -- }; -- -- apb0_gates: clk@01f01428 { -- compatible = "allwinner,sun8i-h3-apb0-gates-clk", -- "allwinner,sun4i-a10-gates-clk"; -- reg = <0x01f01428 0x4>; -- #clock-cells = <1>; -- clocks = <&apb0>; -- clock-indices = <0>, <1>; -- clock-output-names = "apb0_pio", "apb0_ir"; -- }; -- -- ir_clk: ir_clk@01f01454 { -- compatible = "allwinner,sun4i-a10-mod0-clk"; -- reg = <0x01f01454 0x4>; -- #clock-cells = <0>; -- clocks = <&osc32k>, <&osc24M>; -- clock-output-names = "ir"; -- }; -- }; -- -- soc { -- compatible = "simple-bus"; -- #address-cells = <1>; -- #size-cells = <1>; -- ranges; -- -- dma: dma-controller@01c02000 { -- compatible = "allwinner,sun8i-h3-dma"; -- reg = <0x01c02000 0x1000>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_DMA>; -- resets = <&ccu RST_BUS_DMA>; -- #dma-cells = <1>; -- }; -- -- mmc0: mmc@01c0f000 { -- compatible = "allwinner,sun7i-a20-mmc"; -- reg = <0x01c0f000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC0>, -- <&ccu CLK_MMC0>, -- <&ccu CLK_MMC0_OUTPUT>, -- <&ccu CLK_MMC0_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; -- resets = <&ccu RST_BUS_MMC0>; -- reset-names = "ahb"; -- interrupts = ; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- mmc1: mmc@01c10000 { -- compatible = "allwinner,sun7i-a20-mmc"; -- reg = <0x01c10000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC1>, -- <&ccu CLK_MMC1>, -- <&ccu CLK_MMC1_OUTPUT>, -- <&ccu CLK_MMC1_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; -- resets = <&ccu RST_BUS_MMC1>; -- reset-names = "ahb"; -- interrupts = ; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- mmc2: mmc@01c11000 { -- compatible = "allwinner,sun7i-a20-mmc"; -- reg = <0x01c11000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC2>, -- <&ccu CLK_MMC2>, -- <&ccu CLK_MMC2_OUTPUT>, -- <&ccu CLK_MMC2_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; -- resets = <&ccu RST_BUS_MMC2>; -- reset-names = "ahb"; -- interrupts = ; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- usbphy: phy@01c19400 { -- compatible = "allwinner,sun8i-h3-usb-phy"; -- reg = <0x01c19400 0x2c>, -- <0x01c1a800 0x4>, -- <0x01c1b800 0x4>, -- <0x01c1c800 0x4>, -- <0x01c1d800 0x4>; -- reg-names = "phy_ctrl", -- "pmu0", -- "pmu1", -- "pmu2", -- "pmu3"; -- clocks = <&ccu CLK_USB_PHY0>, -- <&ccu CLK_USB_PHY1>, -- <&ccu CLK_USB_PHY2>, -- <&ccu CLK_USB_PHY3>; -- clock-names = "usb0_phy", -- "usb1_phy", -- "usb2_phy", -- "usb3_phy"; -- resets = <&ccu RST_USB_PHY0>, -- <&ccu RST_USB_PHY1>, -- <&ccu RST_USB_PHY2>, -- <&ccu RST_USB_PHY3>; -- reset-names = "usb0_reset", -- "usb1_reset", -- "usb2_reset", -- "usb3_reset"; -- status = "disabled"; -- #phy-cells = <1>; -- }; -- -- ehci1: usb@01c1b000 { -- compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; -- reg = <0x01c1b000 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>; -- resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; -- phys = <&usbphy 1>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ohci1: usb@01c1b400 { -- compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; -- reg = <0x01c1b400 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>, -- <&ccu CLK_USB_OHCI1>; -- resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; -- phys = <&usbphy 1>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ehci2: usb@01c1c000 { -- compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; -- reg = <0x01c1c000 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>; -- resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; -- phys = <&usbphy 2>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ohci2: usb@01c1c400 { -- compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; -- reg = <0x01c1c400 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>, -- <&ccu CLK_USB_OHCI2>; -- resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; -- phys = <&usbphy 2>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ehci3: usb@01c1d000 { -- compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; -- reg = <0x01c1d000 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>; -- resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; -- phys = <&usbphy 3>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ohci3: usb@01c1d400 { -- compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; -- reg = <0x01c1d400 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>, -- <&ccu CLK_USB_OHCI3>; -- resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; -- phys = <&usbphy 3>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ccu: clock@01c20000 { -- compatible = "allwinner,sun8i-h3-ccu"; -- reg = <0x01c20000 0x400>; -- clocks = <&osc24M>, <&osc32k>; -- clock-names = "hosc", "losc"; -- #clock-cells = <1>; -- #reset-cells = <1>; -- }; -- -- pio: pinctrl@01c20800 { -- compatible = "allwinner,sun8i-h3-pinctrl"; -- reg = <0x01c20800 0x400>; -- interrupts = , -- ; -- clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>; -- clock-names = "apb", "hosc", "losc"; -- gpio-controller; -- #gpio-cells = <3>; -- interrupt-controller; -- #interrupt-cells = <3>; -- -- i2c0_pins: i2c0 { -- pins = "PA11", "PA12"; -- function = "i2c0"; -- }; -- -- i2c1_pins: i2c1 { -- pins = "PA18", "PA19"; -- function = "i2c1"; -- }; -- -- i2c2_pins: i2c2 { -- pins = "PE12", "PE13"; -- function = "i2c2"; -- }; -- -- mmc0_pins_a: mmc0@0 { -- pins = "PF0", "PF1", "PF2", "PF3", -- "PF4", "PF5"; -- function = "mmc0"; -- drive-strength = <30>; -- bias-pull-up; -- }; -- -- mmc0_cd_pin: mmc0_cd_pin@0 { -- pins = "PF6"; -- function = "gpio_in"; -- bias-pull-up; -- }; -- -- mmc1_pins_a: mmc1@0 { -- pins = "PG0", "PG1", "PG2", "PG3", -- "PG4", "PG5"; -- function = "mmc1"; -- drive-strength = <30>; -- bias-pull-up; -- }; -- -- mmc2_8bit_pins: mmc2_8bit { -- pins = "PC5", "PC6", "PC8", -- "PC9", "PC10", "PC11", -- "PC12", "PC13", "PC14", -- "PC15", "PC16"; -- function = "mmc2"; -- drive-strength = <30>; -- bias-pull-up; -- }; -- -- spdif_tx_pins_a: spdif@0 { -- pins = "PA17"; -- function = "spdif"; -- }; -- -- spi0_pins: spi0 { -- pins = "PC0", "PC1", "PC2", "PC3"; -- function = "spi0"; -- }; -- -- spi1_pins: spi1 { -- pins = "PA15", "PA16", "PA14", "PA13"; -- function = "spi1"; -- }; -- -- uart0_pins_a: uart0@0 { -- pins = "PA4", "PA5"; -- function = "uart0"; -- }; -- -- uart1_pins: uart1 { -- pins = "PG6", "PG7"; -- function = "uart1"; -- }; -- -- uart1_rts_cts_pins: uart1_rts_cts { -- pins = "PG8", "PG9"; -- function = "uart1"; -- }; -- -- uart2_pins: uart2 { -- pins = "PA0", "PA1"; -- function = "uart2"; -- }; -- -- uart3_pins: uart3 { -- pins = "PA13", "PA14"; -- function = "uart3"; -- }; -- }; -- -- timer@01c20c00 { -- compatible = "allwinner,sun4i-a10-timer"; -- reg = <0x01c20c00 0xa0>; -- interrupts = , -- ; -- clocks = <&osc24M>; -- }; -- -- spi0: spi@01c68000 { -- compatible = "allwinner,sun8i-h3-spi"; -- reg = <0x01c68000 0x1000>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; -- clock-names = "ahb", "mod"; -- dmas = <&dma 23>, <&dma 23>; -- dma-names = "rx", "tx"; -- pinctrl-names = "default"; -- pinctrl-0 = <&spi0_pins>; -- resets = <&ccu RST_BUS_SPI0>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- spi1: spi@01c69000 { -- compatible = "allwinner,sun8i-h3-spi"; -- reg = <0x01c69000 0x1000>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; -- clock-names = "ahb", "mod"; -- dmas = <&dma 24>, <&dma 24>; -- dma-names = "rx", "tx"; -- pinctrl-names = "default"; -- pinctrl-0 = <&spi1_pins>; -- resets = <&ccu RST_BUS_SPI1>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- wdt0: watchdog@01c20ca0 { -- compatible = "allwinner,sun6i-a31-wdt"; -- reg = <0x01c20ca0 0x20>; -- interrupts = ; -- }; -- -- spdif: spdif@01c21000 { -- #sound-dai-cells = <0>; -- compatible = "allwinner,sun8i-h3-spdif"; -- reg = <0x01c21000 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>; -- resets = <&ccu RST_BUS_SPDIF>; -- clock-names = "apb", "spdif"; -- dmas = <&dma 2>; -- dma-names = "tx"; -- status = "disabled"; -- }; -- -- pwm: pwm@01c21400 { -- compatible = "allwinner,sun8i-h3-pwm"; -- reg = <0x01c21400 0x8>; -- clocks = <&osc24M>; -- #pwm-cells = <3>; -- status = "disabled"; -- }; -- -- codec: codec@01c22c00 { -- #sound-dai-cells = <0>; -- compatible = "allwinner,sun8i-h3-codec"; -- reg = <0x01c22c00 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; -- clock-names = "apb", "codec"; -- resets = <&ccu RST_BUS_CODEC>; -- dmas = <&dma 15>, <&dma 15>; -- dma-names = "rx", "tx"; -- allwinner,codec-analog-controls = <&codec_analog>; -- status = "disabled"; -- }; -- -- uart0: serial@01c28000 { -- compatible = "snps,dw-apb-uart"; -- reg = <0x01c28000 0x400>; -- interrupts = ; -- reg-shift = <2>; -- reg-io-width = <4>; -- clocks = <&ccu CLK_BUS_UART0>; -- resets = <&ccu RST_BUS_UART0>; -- dmas = <&dma 6>, <&dma 6>; -- dma-names = "rx", "tx"; -- status = "disabled"; -- }; -- -- uart1: serial@01c28400 { -- compatible = "snps,dw-apb-uart"; -- reg = <0x01c28400 0x400>; -- interrupts = ; -- reg-shift = <2>; -- reg-io-width = <4>; -- clocks = <&ccu CLK_BUS_UART1>; -- resets = <&ccu RST_BUS_UART1>; -- dmas = <&dma 7>, <&dma 7>; -- dma-names = "rx", "tx"; -- status = "disabled"; -- }; -- -- uart2: serial@01c28800 { -- compatible = "snps,dw-apb-uart"; -- reg = <0x01c28800 0x400>; -- interrupts = ; -- reg-shift = <2>; -- reg-io-width = <4>; -- clocks = <&ccu CLK_BUS_UART2>; -- resets = <&ccu RST_BUS_UART2>; -- dmas = <&dma 8>, <&dma 8>; -- dma-names = "rx", "tx"; -- status = "disabled"; -- }; -- -- uart3: serial@01c28c00 { -- compatible = "snps,dw-apb-uart"; -- reg = <0x01c28c00 0x400>; -- interrupts = ; -- reg-shift = <2>; -- reg-io-width = <4>; -- clocks = <&ccu CLK_BUS_UART3>; -- resets = <&ccu RST_BUS_UART3>; -- dmas = <&dma 9>, <&dma 9>; -- dma-names = "rx", "tx"; -- status = "disabled"; -- }; -- -- i2c0: i2c@01c2ac00 { -- compatible = "allwinner,sun6i-a31-i2c"; -- reg = <0x01c2ac00 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_I2C0>; -- resets = <&ccu RST_BUS_I2C0>; -- pinctrl-names = "default"; -- pinctrl-0 = <&i2c0_pins>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- i2c1: i2c@01c2b000 { -- compatible = "allwinner,sun6i-a31-i2c"; -- reg = <0x01c2b000 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_I2C1>; -- resets = <&ccu RST_BUS_I2C1>; -- pinctrl-names = "default"; -- pinctrl-0 = <&i2c1_pins>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- i2c2: i2c@01c2b400 { -- compatible = "allwinner,sun6i-a31-i2c"; -- reg = <0x01c2b000 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_I2C2>; -- resets = <&ccu RST_BUS_I2C2>; -- pinctrl-names = "default"; -- pinctrl-0 = <&i2c2_pins>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- gic: interrupt-controller@01c81000 { -- compatible = "arm,gic-400"; -- reg = <0x01c81000 0x1000>, -- <0x01c82000 0x2000>, -- <0x01c84000 0x2000>, -- <0x01c86000 0x2000>; -- interrupt-controller; -- #interrupt-cells = <3>; -- interrupts = ; -- }; -- -- rtc: rtc@01f00000 { -- compatible = "allwinner,sun6i-a31-rtc"; -- reg = <0x01f00000 0x54>; -- interrupts = , -- ; -- }; -- -- apb0_reset: reset@01f014b0 { -- reg = <0x01f014b0 0x4>; -- compatible = "allwinner,sun6i-a31-clock-reset"; -- #reset-cells = <1>; -- }; -- -- codec_analog: codec-analog@01f015c0 { -- compatible = "allwinner,sun8i-h3-codec-analog"; -- reg = <0x01f015c0 0x4>; -- }; -- -- ir: ir@01f02000 { -- compatible = "allwinner,sun5i-a13-ir"; -- clocks = <&apb0_gates 1>, <&ir_clk>; -- clock-names = "apb", "ir"; -- resets = <&apb0_reset 1>; -- interrupts = ; -- reg = <0x01f02000 0x40>; -- status = "disabled"; -- }; -- -- r_pio: pinctrl@01f02c00 { -- compatible = "allwinner,sun8i-h3-r-pinctrl"; -- reg = <0x01f02c00 0x400>; -- interrupts = ; -- clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>; -- clock-names = "apb", "hosc", "losc"; -- resets = <&apb0_reset 0>; -- gpio-controller; -- #gpio-cells = <3>; -- interrupt-controller; -- #interrupt-cells = <3>; -- -- ir_pins_a: ir@0 { -- pins = "PL11"; -- function = "s_cir_rx"; -- }; -- }; -- }; --}; -+/* -+ * Copyright (C) 2015 Jens Kuske -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively, -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+#include "sunxi-h3-h5.dtsi" -+ -+/ { -+ cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ cpu@0 { -+ compatible = "arm,cortex-a7"; -+ device_type = "cpu"; -+ reg = <0>; -+ }; -+ -+ cpu@1 { -+ compatible = "arm,cortex-a7"; -+ device_type = "cpu"; -+ reg = <1>; -+ }; -+ -+ cpu@2 { -+ compatible = "arm,cortex-a7"; -+ device_type = "cpu"; -+ reg = <2>; -+ }; -+ -+ cpu@3 { -+ compatible = "arm,cortex-a7"; -+ device_type = "cpu"; -+ reg = <3>; -+ }; -+ }; -+ -+ timer { -+ compatible = "arm,armv7-timer"; -+ interrupts = , -+ , -+ , -+ ; -+ }; -+}; -+ -+&ccu { -+ compatible = "allwinner,sun8i-h3-ccu"; -+}; -+ -+&mmc0 { -+ compatible = "allwinner,sun7i-a20-mmc"; -+ clocks = <&ccu CLK_BUS_MMC0>, -+ <&ccu CLK_MMC0>, -+ <&ccu CLK_MMC0_OUTPUT>, -+ <&ccu CLK_MMC0_SAMPLE>; -+ clock-names = "ahb", -+ "mmc", -+ "output", -+ "sample"; -+}; -+ -+&mmc1 { -+ compatible = "allwinner,sun7i-a20-mmc"; -+ clocks = <&ccu CLK_BUS_MMC1>, -+ <&ccu CLK_MMC1>, -+ <&ccu CLK_MMC1_OUTPUT>, -+ <&ccu CLK_MMC1_SAMPLE>; -+ clock-names = "ahb", -+ "mmc", -+ "output", -+ "sample"; -+}; -+ -+&mmc2 { -+ compatible = "allwinner,sun7i-a20-mmc"; -+ clocks = <&ccu CLK_BUS_MMC2>, -+ <&ccu CLK_MMC2>, -+ <&ccu CLK_MMC2_OUTPUT>, -+ <&ccu CLK_MMC2_SAMPLE>; -+ clock-names = "ahb", -+ "mmc", -+ "output", -+ "sample"; -+}; -+ -+&pio { -+ compatible = "allwinner,sun8i-h3-pinctrl"; -+}; -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -similarity index 90% -copy from arch/arm/boot/dts/sun8i-h3.dtsi -copy to arch/arm/boot/dts/sunxi-h3-h5.dtsi -index c13fbfb92592..2494ea063cd4 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -46,43 +46,8 @@ - - / { - interrupt-parent = <&gic>; -- -- cpus { -- #address-cells = <1>; -- #size-cells = <0>; -- -- cpu@0 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <0>; -- }; -- -- cpu@1 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <1>; -- }; -- -- cpu@2 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <2>; -- }; -- -- cpu@3 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <3>; -- }; -- }; -- -- timer { -- compatible = "arm,armv7-timer"; -- interrupts = , -- , -- , -- ; -- }; -+ #address-cells = <1>; -+ #size-cells = <1>; - - clocks { - #address-cells = <1>; -@@ -147,16 +112,8 @@ - }; - - mmc0: mmc@01c0f000 { -- compatible = "allwinner,sun7i-a20-mmc"; -+ /* compatible and clocks are in per SoC .dtsi file */ - reg = <0x01c0f000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC0>, -- <&ccu CLK_MMC0>, -- <&ccu CLK_MMC0_OUTPUT>, -- <&ccu CLK_MMC0_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; - resets = <&ccu RST_BUS_MMC0>; - reset-names = "ahb"; - interrupts = ; -@@ -166,16 +123,8 @@ - }; - - mmc1: mmc@01c10000 { -- compatible = "allwinner,sun7i-a20-mmc"; -+ /* compatible and clocks are in per SoC .dtsi file */ - reg = <0x01c10000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC1>, -- <&ccu CLK_MMC1>, -- <&ccu CLK_MMC1_OUTPUT>, -- <&ccu CLK_MMC1_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; - resets = <&ccu RST_BUS_MMC1>; - reset-names = "ahb"; - interrupts = ; -@@ -185,16 +134,8 @@ - }; - - mmc2: mmc@01c11000 { -- compatible = "allwinner,sun7i-a20-mmc"; -+ /* compatible and clocks are in per SoC .dtsi file */ - reg = <0x01c11000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC2>, -- <&ccu CLK_MMC2>, -- <&ccu CLK_MMC2_OUTPUT>, -- <&ccu CLK_MMC2_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; - resets = <&ccu RST_BUS_MMC2>; - reset-names = "ahb"; - interrupts = ; -@@ -305,7 +246,7 @@ - }; - - ccu: clock@01c20000 { -- compatible = "allwinner,sun8i-h3-ccu"; -+ /* compatible is in per SoC .dtsi file */ - reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&osc32k>; - clock-names = "hosc", "losc"; -@@ -314,7 +255,7 @@ - }; - - pio: pinctrl@01c20800 { -- compatible = "allwinner,sun8i-h3-pinctrl"; -+ /* compatible is in per SoC .dtsi file */ - reg = <0x01c20800 0x400>; - interrupts = , - ; diff --git a/AllWinner-net-emac.patch b/AllWinner-net-emac.patch index ebe9a3c94..0e0a319d0 100644 --- a/AllWinner-net-emac.patch +++ b/AllWinner-net-emac.patch @@ -1,21 +1,20 @@ -From patchwork Tue Mar 14 14:18:37 2017 +From patchwork Mon May 1 12:45:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, 01/20] net-next: stmmac: export - stmmac_set_mac_addr/stmmac_get_mac_addr +Subject: [v5, + 01/20] net: stmmac: export stmmac_set_mac_addr/stmmac_get_mac_addr From: Corentin LABBE -X-Patchwork-Id: 9623505 -Message-Id: <20170314141856.24560-2-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706455 +Message-Id: <20170501124520.3769-2-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:37 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:01 +0200 Thoses symbol will be needed for the dwmac-sun8i ethernet driver. For letting it to be build as module, they need to be exported. @@ -26,7 +25,7 @@ Signed-off-by: Corentin Labbe 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c -index e60bfca..0ab985c8 100644 +index 38f9430..67af0bd 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c @@ -248,6 +248,7 @@ void stmmac_set_mac_addr(void __iomem *ioaddr, u8 addr[6], @@ -43,39 +42,39 @@ index e60bfca..0ab985c8 100644 } - +EXPORT_SYMBOL_GPL(stmmac_get_mac_addr); -From patchwork Tue Mar 14 14:18:38 2017 + +From patchwork Mon May 1 12:45:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,02/20] net-next: stmmac: add optional setup function +Subject: [v5,02/20] net: stmmac: add optional setup function From: Corentin LABBE -X-Patchwork-Id: 9623509 -Message-Id: <20170314141856.24560-3-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706501 +Message-Id: <20170501124520.3769-3-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:38 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:02 +0200 -Instead of ading more ifthen logic for adding a new mac_device_info +Instead of adding more ifthen logic for adding a new mac_device_info setup function, it is easier to add a function pointer to the function needed. Signed-off-by: Corentin Labbe --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 4 +++- - include/linux/stmmac.h | 3 +++ - 2 files changed, 6 insertions(+), 1 deletion(-) + include/linux/stmmac.h | 1 + + 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -index 4498a38..856ac57 100644 +index cd8c601..b82ab64 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -@@ -3101,7 +3101,9 @@ static int stmmac_hw_init(struct stmmac_priv *priv) +@@ -3947,7 +3947,9 @@ static int stmmac_hw_init(struct stmmac_priv *priv) struct mac_device_info *mac; /* Identify the MAC HW device */ @@ -87,50 +86,42 @@ index 4498a38..856ac57 100644 mac = dwmac1000_setup(priv->ioaddr, priv->plat->multicast_filter_bins, diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h -index fc273e9..8f09f18 100644 +index 3921cb9..8bb550b 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h -@@ -109,6 +109,8 @@ struct stmmac_axi { - bool axi_rb; - }; - -+struct stmmac_priv; -+ - struct plat_stmmacenet_data { - int bus_id; - int phy_addr; -@@ -136,6 +138,7 @@ struct plat_stmmacenet_data { +@@ -177,6 +177,7 @@ struct plat_stmmacenet_data { void (*fix_mac_speed)(void *priv, unsigned int speed); int (*init)(struct platform_device *pdev, void *priv); void (*exit)(struct platform_device *pdev, void *priv); -+ struct mac_device_info *(*setup)(struct stmmac_priv *priv); ++ struct mac_device_info *(*setup)(void *priv); void *bsp_priv; struct clk *stmmac_clk; struct clk *pclk; -From patchwork Tue Mar 14 14:18:39 2017 + +From patchwork Mon May 1 12:45:03 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, - 03/20] ARM: sun8i: dt: Add DT bindings documentation for Allwinner +Subject: [v5, + 03/20] dt-bindings: net: Add DT bindings documentation for Allwinner dwmac-sun8i From: Corentin LABBE -X-Patchwork-Id: 9623517 -Message-Id: <20170314141856.24560-4-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706457 +Message-Id: <20170501124520.3769-4-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:39 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:03 +0200 This patch adds documentation for Device-Tree bindings for the Allwinner dwmac-sun8i driver. Signed-off-by: Corentin Labbe +Acked-by: Rob Herring --- .../devicetree/bindings/net/dwmac-sun8i.txt | 77 ++++++++++++++++++++++ 1 file changed, 77 insertions(+) @@ -138,7 +129,7 @@ Signed-off-by: Corentin Labbe diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt new file mode 100644 -index 0000000..f01ef17 +index 0000000..05cd067 --- /dev/null +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt @@ -0,0 +1,77 @@ @@ -166,13 +157,13 @@ index 0000000..f01ef17 +- syscon: A phandle to the syscon of the SoC with one of the following + compatible string: + - allwinner,sun8i-h3-system-controller -+ - allwinner,sun8i-a64-system-controller ++ - allwinner,sun50i-a64-system-controller + - allwinner,sun8i-a83t-system-controller + +Optional properties: -+- allwinner,tx-delay: TX clock delay chain value. Range value is 0-0x07. Default is 0) -+- allwinner,rx-delay: RX clock delay chain value. Range value is 0-0x1F. Default is 0) -+Both delay properties are in 0.1ns step. ++- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0) ++- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0) ++Both delay properties need to be a multiple of 100. + +Optional properties for "allwinner,sun8i-h3-emac": +- allwinner,leds-active-low: EPHY LEDs are active low @@ -219,25 +210,27 @@ index 0000000..f01ef17 + }; + }; +}; -From patchwork Tue Mar 14 14:18:40 2017 + +From patchwork Mon May 1 12:45:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, - 04/20] ARM: sun8i: dt: Add DT bindings documentation for Allwinner - syscon +Subject: [v5, 04/20] dt-bindings: syscon: Add DT bindings documentation for + Allwinner syscon From: Corentin LABBE -X-Patchwork-Id: 9623533 -Message-Id: <20170314141856.24560-5-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706469 +Message-Id: <20170501124520.3769-5-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:40 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:04 +0200 + +This patch adds documentation for Device-Tree bindings for the +syscon present in allwinner devices. Signed-off-by: Corentin Labbe --- @@ -247,7 +240,7 @@ Signed-off-by: Corentin Labbe diff --git a/Documentation/devicetree/bindings/misc/allwinner,syscon.txt b/Documentation/devicetree/bindings/misc/allwinner,syscon.txt new file mode 100644 -index 0000000..9f5f1f5 +index 0000000..cb57691 --- /dev/null +++ b/Documentation/devicetree/bindings/misc/allwinner,syscon.txt @@ -0,0 +1,19 @@ @@ -262,31 +255,31 @@ index 0000000..9f5f1f5 +- reg: address and length of the register for the device. +- compatible: should be "syscon" and one of the following string: + "allwinner,sun8i-h3-system-controller" -+ "allwinner,sun8i-a64-system-controller" ++ "allwinner,sun50i-a64-system-controller" + "allwinner,sun8i-a83t-system-controller" + +Example: -+syscon: syscon@01c00000 { -+ compatible = "syscon", "allwinner,sun8i-h3-system-controller"; ++syscon: syscon@1c00000 { ++ compatible = "allwinner,sun8i-h3-system-controller", "syscon"; + reg = <0x01c00000 0x1000>; +}; -From patchwork Tue Mar 14 14:18:41 2017 + +From patchwork Mon May 1 12:45:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,05/20] net-next: stmmac: Add dwmac-sun8i +Subject: [v5,05/20] net: stmmac: Add dwmac-sun8i From: Corentin LABBE -X-Patchwork-Id: 9623523 -Message-Id: <20170314141856.24560-6-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706473 +Message-Id: <20170501124520.3769-6-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:41 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:05 +0200 The dwmac-sun8i is a heavy hacked version of stmmac hardware by allwinner. @@ -297,11 +290,11 @@ Signed-off-by: Corentin Labbe --- drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 + drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + - drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 938 +++++++++++++++++++++ - drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 27 +- + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 973 +++++++++++++++++++++ + drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 29 + .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 9 +- include/linux/stmmac.h | 1 + - 6 files changed, 984 insertions(+), 3 deletions(-) + 6 files changed, 1022 insertions(+), 2 deletions(-) create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -340,10 +333,10 @@ index 700c603..fd4937a 100644 stmmac-platform-objs:= stmmac_platform.o diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c new file mode 100644 -index 0000000..52ab67c +index 0000000..66eb980 --- /dev/null +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c -@@ -0,0 +1,938 @@ +@@ -0,0 +1,973 @@ +/* + * dwmac-sun8i.c - Allwinner sun8i DWMAC specific glue layer + * @@ -606,23 +599,24 @@ index 0000000..52ab67c + } +} + -+static void sun8i_dwmac_enable_dma_irq(void __iomem *ioaddr) ++static void sun8i_dwmac_enable_dma_irq(void __iomem *ioaddr, u32 chan) +{ + writel(EMAC_RX_INT | EMAC_TX_INT, ioaddr + EMAC_INT_EN); +} + -+static void sun8i_dwmac_disable_dma_irq(void __iomem *ioaddr) ++static void sun8i_dwmac_disable_dma_irq(void __iomem *ioaddr, u32 chan) +{ + writel(0, ioaddr + EMAC_INT_EN); +} + -+static void sun8i_dwmac_dma_start_tx(void __iomem *ioaddr) ++static void sun8i_dwmac_dma_start_tx(void __iomem *ioaddr, u32 chan) +{ + u32 v; + -+ v = readl(ioaddr + EMAC_TX_CTL0); -+ v |= EMAC_TX_TRANSMITTER_EN; -+ writel(v, ioaddr + EMAC_TX_CTL0); ++ v = readl(ioaddr + EMAC_TX_CTL1); ++ v |= EMAC_TX_DMA_START; ++ v |= EMAC_TX_DMA_EN; ++ writel(v, ioaddr + EMAC_TX_CTL1); +} + +static void sun8i_dwmac_enable_dma_transmission(void __iomem *ioaddr) @@ -632,47 +626,39 @@ index 0000000..52ab67c + v = readl(ioaddr + EMAC_TX_CTL1); + v |= EMAC_TX_DMA_START; + v |= EMAC_TX_DMA_EN; -+ writel_relaxed(v, ioaddr + EMAC_TX_CTL1); ++ writel(v, ioaddr + EMAC_TX_CTL1); +} + -+static void sun8i_dwmac_dma_stop_tx(void __iomem *ioaddr) ++static void sun8i_dwmac_dma_stop_tx(void __iomem *ioaddr, u32 chan) +{ + u32 v; + -+ v = readl(ioaddr + EMAC_TX_CTL0); -+ v &= ~EMAC_TX_TRANSMITTER_EN; -+ writel(v, ioaddr + EMAC_TX_CTL0); ++ v = readl(ioaddr + EMAC_TX_CTL1); ++ v &= ~EMAC_TX_DMA_EN; ++ writel(v, ioaddr + EMAC_TX_CTL1); +} + -+static void sun8i_dwmac_dma_start_rx(void __iomem *ioaddr) ++static void sun8i_dwmac_dma_start_rx(void __iomem *ioaddr, u32 chan) +{ + u32 v; + -+ v = readl(ioaddr + EMAC_RX_CTL0); -+ v |= EMAC_RX_RECEIVER_EN; -+ writel(v, ioaddr + EMAC_RX_CTL0); -+ + v = readl(ioaddr + EMAC_RX_CTL1); + v |= EMAC_RX_DMA_START; + v |= EMAC_RX_DMA_EN; + writel(v, ioaddr + EMAC_RX_CTL1); +} + -+static void sun8i_dwmac_dma_stop_rx(void __iomem *ioaddr) ++static void sun8i_dwmac_dma_stop_rx(void __iomem *ioaddr, u32 chan) +{ + u32 v; + -+ v = readl(ioaddr + EMAC_RX_CTL0); -+ v &= ~EMAC_RX_RECEIVER_EN; -+ writel(v, ioaddr + EMAC_RX_CTL0); -+ + v = readl(ioaddr + EMAC_RX_CTL1); + v &= ~EMAC_RX_DMA_EN; + writel(v, ioaddr + EMAC_RX_CTL1); +} + +static int sun8i_dwmac_dma_interrupt(void __iomem *ioaddr, -+ struct stmmac_extra_stats *x) ++ struct stmmac_extra_stats *x, u32 chan) +{ + u32 v; + int ret = 0; @@ -825,6 +811,27 @@ index 0000000..52ab67c + writel(v, ioaddr + EMAC_BASIC_CTL1); +} + ++static void sun8i_dwmac_set_mac(void __iomem *ioaddr, bool enable) ++{ ++ u32 t, r; ++ ++ t = readl(ioaddr + EMAC_TX_CTL0); ++ r = readl(ioaddr + EMAC_RX_CTL0); ++ if (enable) { ++ t |= EMAC_TX_TRANSMITTER_EN; ++ r |= EMAC_RX_RECEIVER_EN; ++ } else { ++ t &= ~EMAC_TX_TRANSMITTER_EN; ++ r &= ~EMAC_RX_RECEIVER_EN; ++ } ++ writel(t, ioaddr + EMAC_TX_CTL0); ++ writel(r, ioaddr + EMAC_RX_CTL0); ++} ++ ++/* Set MAC address at slot reg_n ++ * All slot > 0 need to be enabled with MAC_ADDR_TYPE_DST ++ * If addr is NULL, clear the slot ++ */ +static void sun8i_dwmac_set_umac_addr(struct mac_device_info *hw, + unsigned char *addr, + unsigned int reg_n) @@ -832,6 +839,11 @@ index 0000000..52ab67c + void __iomem *ioaddr = hw->pcsr; + u32 v; + ++ if (!addr) { ++ writel(0, ioaddr + EMAC_MACADDR_HI(reg_n)); ++ return; ++ } ++ + stmmac_set_mac_addr(ioaddr, addr, EMAC_MACADDR_HI(reg_n), + EMAC_MACADDR_LO(reg_n)); + if (reg_n > 0) { @@ -869,39 +881,44 @@ index 0000000..52ab67c +{ + void __iomem *ioaddr = hw->pcsr; + u32 v; -+ int i = 0; ++ int i = 1; + struct netdev_hw_addr *ha; ++ int macaddrs = netdev_uc_count(dev) + netdev_mc_count(dev) + 1; + -+ v = readl(ioaddr + EMAC_RX_FRM_FLT); -+ -+ v |= EMAC_FRM_FLT_CTL; ++ v = EMAC_FRM_FLT_CTL; + + if (dev->flags & IFF_PROMISC) { + v = EMAC_FRM_FLT_RXALL; + } else if (dev->flags & IFF_ALLMULTI) { -+ v = EMAC_FRM_FLT_MULTICAST; -+ } else if (!netdev_mc_empty(dev)) { -+ netdev_for_each_mc_addr(ha, dev) { -+ i++; -+ sun8i_dwmac_set_umac_addr(hw, ha->addr, i); ++ v |= EMAC_FRM_FLT_MULTICAST; ++ } else if (macaddrs <= hw->unicast_filter_entries) { ++ if (!netdev_mc_empty(dev)) { ++ netdev_for_each_mc_addr(ha, dev) { ++ sun8i_dwmac_set_umac_addr(hw, ha->addr, i); ++ i++; ++ } + } -+ } -+ -+ if (netdev_uc_count(dev) + i > hw->unicast_filter_entries) { ++ if (!netdev_uc_empty(dev)) { ++ netdev_for_each_uc_addr(ha, dev) { ++ sun8i_dwmac_set_umac_addr(hw, ha->addr, i); ++ i++; ++ } ++ } ++ } else { + netdev_info(dev, "Too many address, switching to promiscuous\n"); + v = EMAC_FRM_FLT_RXALL; -+ } else { -+ netdev_for_each_uc_addr(ha, dev) { -+ i++; -+ sun8i_dwmac_set_umac_addr(hw, ha->addr, i); -+ } + } ++ ++ /* Disable unused address filter slots */ ++ while (i < hw->unicast_filter_entries) ++ sun8i_dwmac_set_umac_addr(hw, NULL, i++); ++ + writel(v, ioaddr + EMAC_RX_FRM_FLT); +} + +static void sun8i_dwmac_flow_ctrl(struct mac_device_info *hw, -+ unsigned int duplex, -+ unsigned int fc, unsigned int pause_time) ++ unsigned int duplex, unsigned int fc, ++ unsigned int pause_time, u32 tx_cnt) +{ + void __iomem *ioaddr = hw->pcsr; + u32 v; @@ -981,7 +998,12 @@ index 0000000..52ab67c + } + } + -+ if (!of_property_read_u32(node, "allwinner,tx-delay", &val)) { ++ if (!of_property_read_u32(node, "allwinner,tx-delay-ps", &val)) { ++ if (val % 100) { ++ dev_err(priv->device, "tx-delay must be a multiple of 100\n"); ++ return -EINVAL; ++ } ++ val /= 100; + dev_dbg(priv->device, "set tx-delay to %x\n", val); + if (val <= SYSCON_ETXDC_MASK) { + reg &= ~(SYSCON_ETXDC_MASK << SYSCON_ETXDC_SHIFT); @@ -993,7 +1015,12 @@ index 0000000..52ab67c + } + } + -+ if (!of_property_read_u32(node, "allwinner,rx-delay", &val)) { ++ if (!of_property_read_u32(node, "allwinner,rx-delay-ps", &val)) { ++ if (val % 100) { ++ dev_err(priv->device, "rx-delay must be a multiple of 100\n"); ++ return -EINVAL; ++ } ++ val /= 100; + dev_dbg(priv->device, "set rx-delay to %x\n", val); + if (val <= SYSCON_ERXDC_MASK) { + reg &= ~(SYSCON_ERXDC_MASK << SYSCON_ERXDC_SHIFT); @@ -1043,21 +1070,20 @@ index 0000000..52ab67c + struct sunxi_priv_data *gmac = priv->plat->bsp_priv; + int ret; + -+ if (gmac->ephy_clk) { -+ ret = clk_prepare_enable(gmac->ephy_clk); -+ if (ret) { -+ dev_err(priv->device, "Cannot enable ephy\n"); -+ return ret; -+ } ++ if (!gmac->use_internal_phy) ++ return 0; ++ ++ ret = clk_prepare_enable(gmac->ephy_clk); ++ if (ret) { ++ dev_err(priv->device, "Cannot enable ephy\n"); ++ return ret; + } + -+ if (gmac->rst_ephy) { -+ ret = reset_control_deassert(gmac->rst_ephy); -+ if (ret) { -+ dev_err(priv->device, "Cannot deassert ephy\n"); -+ clk_disable_unprepare(gmac->ephy_clk); -+ return ret; -+ } ++ ret = reset_control_deassert(gmac->rst_ephy); ++ if (ret) { ++ dev_err(priv->device, "Cannot deassert ephy\n"); ++ clk_disable_unprepare(gmac->ephy_clk); ++ return ret; + } + + return 0; @@ -1065,10 +1091,11 @@ index 0000000..52ab67c + +static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac) +{ -+ if (gmac->ephy_clk) -+ clk_disable_unprepare(gmac->ephy_clk); -+ if (gmac->rst_ephy) -+ reset_control_assert(gmac->rst_ephy); ++ if (!gmac->use_internal_phy) ++ return 0; ++ ++ clk_disable_unprepare(gmac->ephy_clk); ++ reset_control_assert(gmac->rst_ephy); + return 0; +} + @@ -1116,6 +1143,7 @@ index 0000000..52ab67c + +static const struct stmmac_ops sun8i_dwmac_ops = { + .core_init = sun8i_dwmac_core_init, ++ .set_mac = sun8i_dwmac_set_mac, + .dump_regs = sun8i_dwmac_dump_mac_regs, + .rx_ipc = sun8i_dwmac_rx_ipc_enable, + .set_filter = sun8i_dwmac_set_filter, @@ -1124,9 +1152,10 @@ index 0000000..52ab67c + .get_umac_addr = sun8i_dwmac_get_umac_addr, +}; + -+static struct mac_device_info *sun8i_dwmac_setup(struct stmmac_priv *priv) ++static struct mac_device_info *sun8i_dwmac_setup(void *ppriv) +{ + struct mac_device_info *mac; ++ struct stmmac_priv *priv = ppriv; + int ret; + + mac = devm_kzalloc(priv->device, sizeof(*mac), GFP_KERNEL); @@ -1182,13 +1211,13 @@ index 0000000..52ab67c + + gmac->variant = of_device_get_match_data(&pdev->dev); + if (!gmac->variant) { -+ dev_err(&pdev->dev, "Missing sun8i-emac variant\n"); ++ dev_err(&pdev->dev, "Missing dwmac-sun8i variant\n"); + return -EINVAL; + } + + gmac->tx_clk = devm_clk_get(dev, "stmmaceth"); + if (IS_ERR(gmac->tx_clk)) { -+ dev_err(dev, "could not get tx clock\n"); ++ dev_err(dev, "Could not get TX clock\n"); + return PTR_ERR(gmac->tx_clk); + } + @@ -1197,7 +1226,7 @@ index 0000000..52ab67c + if (IS_ERR(gmac->regulator)) { + if (PTR_ERR(gmac->regulator) == -EPROBE_DEFER) + return -EPROBE_DEFER; -+ dev_info(dev, "no regulator found\n"); ++ dev_info(dev, "No regulator found\n"); + gmac->regulator = NULL; + } + @@ -1205,7 +1234,7 @@ index 0000000..52ab67c + "syscon"); + if (IS_ERR(gmac->regmap)) { + ret = PTR_ERR(gmac->regmap); -+ dev_err(&pdev->dev, "unable to map SYSCON:%d\n", ret); ++ dev_err(&pdev->dev, "Unable to map syscon: %d\n", ret); + return ret; + } + @@ -1216,8 +1245,7 @@ index 0000000..52ab67c + gmac->ephy_clk = of_clk_get(plat_dat->phy_node, 0); + if (IS_ERR(gmac->ephy_clk)) { + ret = PTR_ERR(gmac->ephy_clk); -+ dev_err(&pdev->dev, "Cannot get EPHY clock err=%d\n", -+ ret); ++ dev_err(&pdev->dev, "Cannot get EPHY clock: %d\n", ret); + return -EINVAL; + } + @@ -1272,7 +1300,7 @@ index 0000000..52ab67c + .probe = sun8i_dwmac_probe, + .remove = stmmac_pltfr_remove, + .driver = { -+ .name = "sun8i-dwmac", ++ .name = "dwmac-sun8i", + .pm = &stmmac_pltfr_pm_ops, + .of_match_table = sun8i_dwmac_match, + }, @@ -1283,10 +1311,10 @@ index 0000000..52ab67c +MODULE_DESCRIPTION("Allwinner sun8i DWMAC specific glue layer"); +MODULE_LICENSE("GPL"); diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -index 856ac57..05e8018 100644 +index b82ab64..39777a7 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -@@ -177,6 +177,17 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv) +@@ -235,6 +235,17 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv) else if ((clk_rate >= CSR_F_250M) && (clk_rate < CSR_F_300M)) priv->clk_csr = STMMAC_CSR_250_300M; } @@ -1304,18 +1332,22 @@ index 856ac57..05e8018 100644 } static void print_pkt(unsigned char *buf, int len) -@@ -697,6 +708,10 @@ static void stmmac_adjust_link(struct net_device *dev) +@@ -784,6 +795,14 @@ static void stmmac_adjust_link(struct net_device *dev) if (phydev->link) { u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG); -+ /* disable loopback */ -+ if (priv->plat->has_sun8i) -+ ctrl &= ~BIT(1); ++ /* dwmac-sun8i handle loopback in MAC_CTRL_REG */ ++ if (priv->plat->has_sun8i) { ++ if (dev->features & NETIF_F_LOOPBACK) ++ ctrl |= BIT(1); ++ else ++ ctrl &= ~BIT(1); ++ } + /* Now we make sure that we can be in full duplex mode. * If not, we operate in half-duplex mode. */ if (phydev->duplex != priv->oldduplex) { -@@ -714,6 +729,8 @@ static void stmmac_adjust_link(struct net_device *dev) +@@ -800,6 +819,8 @@ static void stmmac_adjust_link(struct net_device *dev) if (phydev->speed != priv->speed) { new_state = 1; @@ -1324,7 +1356,7 @@ index 856ac57..05e8018 100644 switch (phydev->speed) { case 1000: if (priv->plat->has_gmac || -@@ -725,6 +742,8 @@ static void stmmac_adjust_link(struct net_device *dev) +@@ -811,6 +832,8 @@ static void stmmac_adjust_link(struct net_device *dev) priv->plat->has_gmac4) { ctrl |= priv->hw->link.port; ctrl |= priv->hw->link.speed; @@ -1333,7 +1365,7 @@ index 856ac57..05e8018 100644 } else { ctrl &= ~priv->hw->link.port; } -@@ -734,6 +753,8 @@ static void stmmac_adjust_link(struct net_device *dev) +@@ -820,6 +843,8 @@ static void stmmac_adjust_link(struct net_device *dev) priv->plat->has_gmac4) { ctrl |= priv->hw->link.port; ctrl &= ~(priv->hw->link.speed); @@ -1342,16 +1374,7 @@ index 856ac57..05e8018 100644 } else { ctrl &= ~priv->hw->link.port; } -@@ -1702,7 +1723,7 @@ static int stmmac_hw_setup(struct net_device *dev, bool init_ptp) - /* Enable the MAC Rx/Tx */ - if (priv->synopsys_id >= DWMAC_CORE_4_00) - stmmac_dwmac4_set_mac(priv->ioaddr, true); -- else -+ else if (!priv->plat->has_sun8i) - stmmac_set_mac(priv->ioaddr, true); - - /* Set the HW DMA mode and the COE */ -@@ -3123,6 +3144,10 @@ static int stmmac_hw_init(struct stmmac_priv *priv) +@@ -3969,6 +3994,10 @@ static int stmmac_hw_init(struct stmmac_priv *priv) priv->hw = mac; @@ -1363,10 +1386,10 @@ index 856ac57..05e8018 100644 if (priv->synopsys_id >= DWMAC_CORE_4_00) { priv->hw->mode = &dwmac4_ring_mode_ops; diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c -index 0ba1caf..3c21862 100644 +index 7fc3a1e..3840529 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c -@@ -160,6 +160,12 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, +@@ -309,6 +309,12 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, struct device_node *np, struct device *dev) { bool mdio = true; @@ -1379,7 +1402,7 @@ index 0ba1caf..3c21862 100644 /* If phy-handle property is passed from DT, use it as the PHY */ plat->phy_node = of_parse_phandle(np, "phy-handle", 0); -@@ -176,8 +182,7 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, +@@ -325,8 +331,7 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, mdio = false; } @@ -1390,10 +1413,10 @@ index 0ba1caf..3c21862 100644 } else { /** diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h -index 8f09f18..100386c 100644 +index 8bb550b..108739f 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h -@@ -147,6 +147,7 @@ struct plat_stmmacenet_data { +@@ -186,6 +186,7 @@ struct plat_stmmacenet_data { struct reset_control *stmmac_rst; struct stmmac_axi *axi; int has_gmac4; @@ -1401,24 +1424,25 @@ index 8f09f18..100386c 100644 bool tso_en; int mac_port_sel_speed; bool en_tx_lpi_clockgating; -From patchwork Tue Mar 14 14:18:42 2017 + +From patchwork Mon May 1 12:45:06 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, 06/20] ARM: dts: sunxi-h3-h5: Add dt node for the syscon control +Subject: [v5, + 06/20] arm: sun8i: sunxi-h3-h5: Add dt node for the syscon control module From: Corentin LABBE -X-Patchwork-Id: 9623549 -Message-Id: <20170314141856.24560-7-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706459 +Message-Id: <20170501124520.3769-7-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:42 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:06 +0200 This patch add the dt node for the syscon register present on the Allwinner H3/H5 @@ -1432,39 +1456,39 @@ Signed-off-by: Corentin Labbe 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -index 2494ea0..07e4f36 100644 +index 1aeeacb..d9691fc 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -102,6 +102,12 @@ +@@ -83,6 +83,12 @@ #size-cells = <1>; ranges; -+ syscon: syscon@01c00000 { -+ compatible = "syscon", -+ "allwinner,sun8i-h3-system-controller"; ++ syscon: syscon@1c00000 { ++ compatible = "allwinner,sun8i-h3-system-controller", ++ "syscon"; + reg = <0x01c00000 0x1000>; + }; + dma: dma-controller@01c02000 { compatible = "allwinner,sun8i-h3-dma"; reg = <0x01c02000 0x1000>; -From patchwork Tue Mar 14 14:18:43 2017 + +From patchwork Mon May 1 12:45:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,07/20] ARM: dts: sunxi-h3-h5: add dwmac-sun8i ethernet driver +Subject: [v5,07/20] arm: sun8i: sunxi-h3-h5: add dwmac-sun8i ethernet driver From: Corentin LABBE -X-Patchwork-Id: 9623561 -Message-Id: <20170314141856.24560-8-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706465 +Message-Id: <20170501124520.3769-8-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:43 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:07 +0200 The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed. @@ -1474,21 +1498,21 @@ SoC H3/H5 have an internal PHY, so optionals syscon and ephy are set. Signed-off-by: Corentin Labbe --- - arch/arm/boot/dts/sunxi-h3-h5.dtsi | 33 +++++++++++++++++++++++++++++++++ - 1 file changed, 33 insertions(+) + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 34 ++++++++++++++++++++++++++++++++++ + 1 file changed, 34 insertions(+) diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -index 07e4f36..c35af5e 100644 +index d9691fc..45a9a30 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -272,6 +272,14 @@ +@@ -285,6 +285,14 @@ interrupt-controller; #interrupt-cells = <3>; -+ emac_rgmii_pins: emac0@0 { ++ emac_rgmii_pins: emac0 { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", -+ "PD5", "PD7", "PD8", "PD9", "PD10", -+ "PD12", "PD13", "PD15", "PD16", "PD17"; ++ "PD5", "PD7", "PD8", "PD9", "PD10", ++ "PD12", "PD13", "PD15", "PD16", "PD17"; + function = "emac"; + drive-strength = <40>; + }; @@ -1496,7 +1520,7 @@ index 07e4f36..c35af5e 100644 i2c0_pins: i2c0 { pins = "PA11", "PA12"; function = "i2c0"; -@@ -368,6 +376,31 @@ +@@ -381,6 +389,32 @@ clocks = <&osc24M>; }; @@ -1518,9 +1542,10 @@ index 07e4f36..c35af5e 100644 + #address-cells = <1>; + #size-cells = <0>; + int_mii_phy: ethernet-phy@1 { -+ reg = <1>; -+ clocks = <&ccu CLK_BUS_EPHY>; -+ resets = <&ccu RST_BUS_EPHY>; ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; + }; + }; + }; @@ -1528,107 +1553,23 @@ index 07e4f36..c35af5e 100644 spi0: spi@01c68000 { compatible = "allwinner,sun8i-h3-spi"; reg = <0x01c68000 0x1000>; -From patchwork Tue Mar 14 14:18:44 2017 + +From patchwork Mon May 1 12:45:08 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,08/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Banana Pi M2+ +Subject: [v5,08/20] arm: sun8i: orangepi-pc: Enable dwmac-sun8i From: Corentin LABBE -X-Patchwork-Id: 9623539 -Message-Id: <20170314141856.24560-9-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706463 +Message-Id: <20170501124520.3769-9-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, LABBE Corentin , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:44 +0100 - -From: LABBE Corentin - -The dwmac-sun8i hardware is present on the Banana Pi M2+ -It uses an external PHY rtl8211e via RGMII. - -This patch create the needed regulator, emac and phy nodes. - -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 37 +++++++++++++++++++++++++ - 1 file changed, 37 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -index 52acbe1..30b0a41 100644 ---- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -@@ -90,6 +90,18 @@ - pinctrl-0 = <&wifi_en_bpi_m2p>; - reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ - }; -+ -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&gmac_power_pin_orangepi>; -+ regulator-name = "gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ enable-active-high; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; -+ }; - }; - - &ehci1 { -@@ -186,3 +198,28 @@ - /* USB VBUS is on as long as VCC-IO is on */ - status = "okay"; - }; -+ -+&pio { -+ gmac_power_pin_orangepi: gmac_power_pin@0 { -+ pins = "PD6"; -+ function = "gpio_out"; -+ drive-strength = <10>; -+ }; -+}; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ reg = <0>; -+ }; -+}; -+ -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emac_rgmii_pins>; -+ phy-supply = <®_gmac_3v3>; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-mode = "rgmii"; -+ -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -From patchwork Tue Mar 14 14:18:45 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2,09/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange PI PC -From: Corentin LABBE -X-Patchwork-Id: 9623555 -Message-Id: <20170314141856.24560-10-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, LABBE Corentin , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:45 +0100 - -From: LABBE Corentin + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:08 +0200 The dwmac-sun8i hardware is present on the Orange PI PC. It uses the internal PHY. @@ -1641,96 +1582,102 @@ Signed-off-by: Corentin Labbe 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -index f148111..746c25a 100644 +index f148111..52e6575 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -@@ -53,6 +53,7 @@ +@@ -52,6 +52,7 @@ + compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3"; aliases { - serial0 = &uart0; + ethernet0 = &emac; + serial0 = &uart0; }; - chosen { -@@ -184,3 +185,10 @@ - /* USB VBUS is always on */ +@@ -109,6 +110,13 @@ status = "okay"; }; -+ + +&emac { + phy-handle = <&int_mii_phy>; + phy-mode = "mii"; + allwinner,leds-active-low; + status = "okay"; +}; -From patchwork Tue Mar 14 14:18:46 2017 ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + +From patchwork Mon May 1 12:45:09 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,10/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange Pi 2 +Subject: [v5,09/20] arm: sun8i: orangepi-zero: Enable dwmac-sun8i From: Corentin LABBE -X-Patchwork-Id: 9623557 -Message-Id: <20170314141856.24560-11-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706461 +Message-Id: <20170501124520.3769-10-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:46 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:09 +0200 -The dwmac-sun8i hardware is present on the Orange PI 2. +The dwmac-sun8i hardware is present on the Orange PI Zero. It uses the internal PHY. This patch create the needed emac node. Signed-off-by: Corentin Labbe --- - arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 ++++++++ + arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 8 ++++++++ 1 file changed, 8 insertions(+) -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -index 5b6d145..3f54b12 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -@@ -55,6 +55,7 @@ +diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts +index 9e8b082..dd3525a 100644 +--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts ++++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts +@@ -57,6 +57,7 @@ + aliases { serial0 = &uart0; /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ - ethernet1 = &rtl8189; + ethernet0 = &emac; + ethernet1 = &xr819; }; - chosen { -@@ -203,3 +204,10 @@ - usb1_vbus-supply = <®_usb1_vbus>; +@@ -103,6 +104,13 @@ status = "okay"; }; -+ + +&emac { + phy-handle = <&int_mii_phy>; + phy-mode = "mii"; + allwinner,leds-active-low; + status = "okay"; +}; -From patchwork Tue Mar 14 14:18:47 2017 ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>; + +From patchwork Mon May 1 12:45:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,11/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange PI One +Subject: [v5,10/20] arm: sun8i: orangepi-one: Enable dwmac-sun8i From: Corentin LABBE -X-Patchwork-Id: 9623541 -Message-Id: <20170314141856.24560-12-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706471 +Message-Id: <20170501124520.3769-11-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:47 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:10 +0200 The dwmac-sun8i hardware is present on the Orange PI One. It uses the internal PHY. @@ -1743,18 +1690,18 @@ Signed-off-by: Corentin Labbe 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -index ea8fd13..1f98ddc 100644 +index 5fea430..6880268 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -@@ -53,6 +53,7 @@ +@@ -52,6 +52,7 @@ + compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3"; aliases { - serial0 = &uart0; + ethernet0 = &emac; + serial0 = &uart0; }; - chosen { -@@ -93,6 +94,13 @@ +@@ -97,6 +98,13 @@ status = "okay"; }; @@ -1768,108 +1715,79 @@ index ea8fd13..1f98ddc 100644 &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; -From patchwork Tue Mar 14 14:18:48 2017 + +From patchwork Mon May 1 12:45:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,12/20] ARM: dts: sun8i: Enable dwmac-sun8i on the Orange Pi plus +Subject: [v5,11/20] arm: sun8i: orangepi-2: Enable dwmac-sun8i From: Corentin LABBE -X-Patchwork-Id: 9623569 -Message-Id: <20170314141856.24560-13-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706467 +Message-Id: <20170501124520.3769-12-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:48 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:11 +0200 -The dwmac-sun8i hardware is present on the Orange PI plus. -It uses an external PHY rtl8211e via RGMII. +The dwmac-sun8i hardware is present on the Orange PI 2. +It uses the internal PHY. -This patch create the needed regulator, emac and phy nodes. +This patch create the needed emac node. Signed-off-by: Corentin Labbe --- - arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 35 ++++++++++++++++++++++++++++ - 1 file changed, 35 insertions(+) + arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 ++++++++ + 1 file changed, 8 insertions(+) -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -index 8c40ab7..4e075a2 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -@@ -58,6 +58,18 @@ - enable-active-high; - gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; +diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts +index 5b6d145..cedd326 100644 +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts +@@ -54,6 +54,7 @@ + aliases { + serial0 = &uart0; + /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ ++ ethernet0 = &emac; + ethernet1 = &rtl8189; }; -+ -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&gmac_power_pin_orangepi>; -+ regulator-name = "gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ enable-active-high; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; -+ }; + +@@ -108,6 +109,13 @@ + status = "okay"; }; - &ehci3 { -@@ -86,8 +98,31 @@ - pins = "PG11"; - function = "gpio_out"; - }; -+ -+ gmac_power_pin_orangepi: gmac_power_pin@0 { -+ pins = "PD6"; -+ function = "gpio_out"; -+ drive-strength = <10>; -+ }; - }; - - &usbphy { - usb3_vbus-supply = <®_usb3_vbus>; - }; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ reg = <0>; -+ }; -+}; -+ +&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emac_rgmii_pins>; -+ phy-supply = <®_gmac_3v3>; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-mode = "rgmii"; -+ ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; + allwinner,leds-active-low; + status = "okay"; +}; -From patchwork Tue Mar 14 14:18:49 2017 ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + +From patchwork Mon May 1 12:45:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, - 13/20] ARM: dts: sun8i: orangepi-pc-plus: Set EMAC activity LEDs to - active high +Subject: [v5, + 12/20] arm: sun8i: orangepi-pc-plus: Set EMAC activity LEDs to active + high From: Corentin LABBE -X-Patchwork-Id: 9623593 -Message-Id: <20170314141856.24560-14-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706481 +Message-Id: <20170501124520.3769-13-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:49 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:12 +0200 On the Orange Pi PC Plus, the polarity of the LEDs on the RJ45 Ethernet port were changed from active low to active high. @@ -1881,36 +1799,39 @@ Signed-off-by: Corentin Labbe 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts -index 8b93f5c..0380769 100644 +index 8b93f5c..a10281b 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts -@@ -86,3 +86,8 @@ - /* eMMC is missing pull-ups */ - bias-pull-up; +@@ -53,6 +53,11 @@ + }; }; -+ + +&emac { + /* LEDs changed to active high on the plus */ + /delete-property/ allwinner,leds-active-low; +}; -From patchwork Tue Mar 14 14:18:50 2017 ++ + &mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; + +From patchwork Mon May 1 12:45:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, 14/20] ARM64: dts: sun50i-a64: Add dt node for the syscon control - module +Subject: [v5, 13/20] arm64: allwinner: sun50i-a64: Add dt node for the syscon + control module From: Corentin LABBE -X-Patchwork-Id: 9623591 -Message-Id: <20170314141856.24560-15-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706477 +Message-Id: <20170501124520.3769-14-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:50 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:13 +0200 This patch add the dt node for the syscon register present on the Allwinner A64. @@ -1924,39 +1845,40 @@ Signed-off-by: Corentin Labbe 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -index 1c64ea2..3b09af2 100644 +index c7f669f..d7341ba 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -@@ -121,6 +121,12 @@ +@@ -129,6 +129,12 @@ #size-cells = <1>; ranges; -+ syscon: syscon@01c00000 { -+ compatible = "syscon", -+ "allwinner,sun8i-h3-system-controller"; ++ syscon: syscon@1c00000 { ++ compatible = "allwinner,sun50i-a64-system-controller", ++ "syscon"; + reg = <0x01c00000 0x1000>; + }; + mmc0: mmc@1c0f000 { compatible = "allwinner,sun50i-a64-mmc"; reg = <0x01c0f000 0x1000>; -From patchwork Tue Mar 14 14:18:51 2017 + +From patchwork Mon May 1 12:45:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,15/20] ARM64: dts: sun50i-a64: add dwmac-sun8i Ethernet driver +Subject: [v5, + 14/20] arm64: allwinner: sun50i-a64: add dwmac-sun8i Ethernet driver From: Corentin LABBE -X-Patchwork-Id: 9623621 -Message-Id: <20170314141856.24560-16-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706485 +Message-Id: <20170501124520.3769-15-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:51 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:14 +0200 The dwmac-sun8i is an Ethernet MAC that supports 10/100/1000 Mbit connections. It is very similar to the device found in the Allwinner @@ -1967,30 +1889,28 @@ it disabled at this level. Signed-off-by: Corentin Labbe --- - arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 37 +++++++++++++++++++++++++++ - 1 file changed, 37 insertions(+) + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 35 +++++++++++++++++++++++++++ + 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -index 3b09af2..57d69e5 100644 +index d7341ba..18b3642 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -@@ -277,6 +277,23 @@ +@@ -287,6 +287,21 @@ bias-pull-up; }; + rmii_pins: rmii_pins { -+ pins = "PD10", "PD11", "PD13", "PD14", -+ "PD17", "PD18", "PD19", "PD20", -+ "PD22", "PD23"; ++ pins = "PD10", "PD11", "PD13", "PD14", "PD17", ++ "PD18", "PD19", "PD20", "PD22", "PD23"; + function = "emac"; + drive-strength = <40>; + }; + + rgmii_pins: rgmii_pins { -+ pins = "PD8", "PD9", "PD10", "PD11", -+ "PD12", "PD13", "PD15", -+ "PD16", "PD17", "PD18", "PD19", -+ "PD20", "PD21", "PD22", "PD23"; ++ pins = "PD8", "PD9", "PD10", "PD11", "PD12", ++ "PD13", "PD15", "PD16", "PD17", "PD18", ++ "PD19", "PD20", "PD21", "PD22", "PD23"; + function = "emac"; + drive-strength = <40>; + }; @@ -1998,7 +1918,7 @@ index 3b09af2..57d69e5 100644 uart0_pins_a: uart0@0 { pins = "PB8", "PB9"; function = "uart0"; -@@ -381,6 +398,26 @@ +@@ -391,6 +406,26 @@ #size-cells = <0>; }; @@ -2025,47 +1945,40 @@ index 3b09af2..57d69e5 100644 gic: interrupt-controller@1c81000 { compatible = "arm,gic-400"; reg = <0x01c81000 0x1000>, -From patchwork Tue Mar 14 14:18:52 2017 + +From patchwork Mon May 1 12:45:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,16/20] ARM: dts: sun50i-a64: enable dwmac-sun8i on pine64 +Subject: [v5,15/20] arm64: allwinner: pine64: Enable dwmac-sun8i From: Corentin LABBE -X-Patchwork-Id: 9623607 -Message-Id: <20170314141856.24560-17-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706489 +Message-Id: <20170501124520.3769-16-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:52 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:15 +0200 The dwmac-sun8i hardware is present on the pine64 It uses an external PHY via RMII. Signed-off-by: Corentin Labbe --- - arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 15 +++++++++++++++ - 1 file changed, 15 insertions(+) + arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -index c680ed3..b53994d 100644 +index c680ed3..3b491c0 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -@@ -109,3 +109,18 @@ - &usbphy { +@@ -70,6 +70,15 @@ status = "okay"; }; -+ -+&mdio { -+ ext_rmii_phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ + +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&rmii_pins>; @@ -2074,37 +1987,55 @@ index c680ed3..b53994d 100644 + status = "okay"; + +}; -From patchwork Tue Mar 14 14:18:53 2017 ++ + &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +@@ -80,6 +89,13 @@ + bias-pull-up; + }; + ++&mdio { ++ ext_rmii_phy1: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + +From patchwork Mon May 1 12:45:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2,17/20] ARM: dts: sun50i-a64: enable dwmac-sun8i on pine64 plus +Subject: [v5,16/20] arm64: allwinner: pine64-plus: Enable dwmac-sun8i From: Corentin LABBE -X-Patchwork-Id: 9623597 -Message-Id: <20170314141856.24560-18-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706511 +Message-Id: <20170501124520.3769-17-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:53 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:16 +0200 The dwmac-sun8i hardware is present on the pine64 plus. It uses an external PHY rtl8211e via RGMII. Signed-off-by: Corentin Labbe --- - arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 16 +++++++++++++++- - 1 file changed, 15 insertions(+), 1 deletion(-) + .../arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 17 ++++++++++++++++- + 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts -index 790d14d..8e06aed 100644 +index 790d14d..24f1aac 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts -@@ -46,5 +46,19 @@ +@@ -46,5 +46,20 @@ model = "Pine64+"; compatible = "pine64,pine64-plus", "allwinner,sun50i-a64"; @@ -2112,60 +2043,54 @@ index 790d14d..8e06aed 100644 + /* TODO: Camera, touchscreen, etc. */ +}; + -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; + status = "okay"; ++}; ++ ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; }; -From patchwork Tue Mar 14 14:18:54 2017 + +From patchwork Mon May 1 12:45:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: [v2, - 18/20] ARM: dts: sun50i-a64: enable dwmac-sun8i on the BananaPi M64 +Subject: [v5,17/20] arm64: allwinner: bananapi-m64: Enable dwmac-sun8i From: Corentin LABBE -X-Patchwork-Id: 9623595 -Message-Id: <20170314141856.24560-19-clabbe.montjoie@gmail.com> +X-Patchwork-Id: 9706509 +Message-Id: <20170501124520.3769-18-clabbe.montjoie@gmail.com> To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, - davem@davemloft.net -Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Tue, 14 Mar 2017 15:18:54 +0100 + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:17 +0200 The dwmac-sun8i hardware is present on the BananaPi M64. It uses an external PHY rtl8211e via RGMII. Signed-off-by: Corentin Labbe --- - arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) + arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -index 6872135..347c262 100644 +index 6872135..0d1f026 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -@@ -77,6 +77,20 @@ - bias-pull-up; +@@ -67,6 +67,14 @@ + }; }; -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; @@ -2173,7 +2098,420 @@ index 6872135..347c262 100644 + phy-handle = <&ext_rgmii_phy>; + status = "okay"; +}; ++ + &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +@@ -77,6 +85,13 @@ + bias-pull-up; + }; + ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; + &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; + +From patchwork Mon May 1 12:45:18 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v5,18/20] arm: sunxi: Enable dwmac-sun8i driver on sunxi_defconfig +From: Corentin LABBE +X-Patchwork-Id: 9706507 +Message-Id: <20170501124520.3769-19-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:18 +0200 + +Enable the dwmac-sun8i driver in the sunxi default configuration + +Signed-off-by: Corentin Labbe +--- + arch/arm/configs/sunxi_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig +index 5cd5dd70..504e022 100644 +--- a/arch/arm/configs/sunxi_defconfig ++++ b/arch/arm/configs/sunxi_defconfig +@@ -40,6 +40,7 @@ CONFIG_ATA=y + CONFIG_AHCI_SUNXI=y + CONFIG_NETDEVICES=y + CONFIG_SUN4I_EMAC=y ++CONFIG_DWMAC_SUN8I=y + # CONFIG_NET_VENDOR_ARC is not set + # CONFIG_NET_CADENCE is not set + # CONFIG_NET_VENDOR_BROADCOM is not set + +From patchwork Mon May 1 12:45:19 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v5, + 19/20] arm: multi_v7: Enable dwmac-sun8i driver on multi_v7_defconfig +From: Corentin LABBE +X-Patchwork-Id: 9706513 +Message-Id: <20170501124520.3769-20-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:19 +0200 + +Enable the dwmac-sun8i driver in the multi_v7 default configuration + +Signed-off-by: Corentin Labbe +--- + arch/arm/configs/multi_v7_defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig +index 2685e03..6da6af8 100644 +--- a/arch/arm/configs/multi_v7_defconfig ++++ b/arch/arm/configs/multi_v7_defconfig +@@ -257,6 +257,7 @@ CONFIG_SMSC911X=y + CONFIG_STMMAC_ETH=y + CONFIG_STMMAC_PLATFORM=y + CONFIG_DWMAC_DWC_QOS_ETH=y ++CONFIG_DWMAC_SUN8I=y + CONFIG_TI_CPSW=y + CONFIG_XILINX_EMACLITE=y + CONFIG_AT803X_PHY=y + +From patchwork Mon May 1 12:45:20 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v5,20/20] arm64: defconfig: Enable dwmac-sun8i driver on defconfig +From: Corentin LABBE +X-Patchwork-Id: 9706505 +Message-Id: <20170501124520.3769-21-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, wens@csie.org, + linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, + netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, + Corentin Labbe +Date: Mon, 1 May 2017 14:45:20 +0200 + +Enable the dwmac-sun8i ethernet driver as a module in the ARM64 defconfig. + +Signed-off-by: Corentin Labbe +--- + arch/arm64/configs/defconfig | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig +index ce07285..4575fbb 100644 +--- a/arch/arm64/configs/defconfig ++++ b/arch/arm64/configs/defconfig +@@ -193,6 +193,7 @@ CONFIG_RAVB=y + CONFIG_SMC91X=y + CONFIG_SMSC911X=y + CONFIG_STMMAC_ETH=m ++CONFIG_DWMAC_SUN8I=m + CONFIG_MDIO_BUS_MUX_MMIOREG=y + CONFIG_MESON_GXL_PHY=m + CONFIG_MICREL_PHY=y +From patchwork Mon Jun 5 19:21:26 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [1/5] ARM: sun8i: orangepi-plus: Enable dwmac-sun8i +From: Corentin LABBE +X-Patchwork-Id: 9767313 +Message-Id: <20170605192130.25320-2-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, + maxime.ripard@free-electrons.com, wens@csie.org, + catalin.marinas@arm.com, will.deacon@arm.com +Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, + Corentin Labbe , + linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org +Date: Mon, 5 Jun 2017 21:21:26 +0200 + +The dwmac-sun8i hardware is present on the Orange PI plus. +It uses an external PHY rtl8211e via RGMII. + +This patch create the needed regulator, emac and phy nodes. + +Signed-off-by: Corentin Labbe +--- + arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 32 ++++++++++++++++++++++++++++ + 1 file changed, 32 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +index 8c40ab7bfa72..331ed683ac62 100644 +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +@@ -47,6 +47,20 @@ + model = "Xunlong Orange Pi Plus / Plus 2"; + compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3"; + ++ aliases { ++ ethernet0 = &emac; ++ }; ++ ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; ++ + reg_usb3_vbus: usb3-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; +@@ -64,6 +78,24 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0>; ++ }; ++}; ++ + &mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; +From patchwork Mon Jun 5 19:21:27 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [2/5] ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i +From: Corentin LABBE +X-Patchwork-Id: 9767321 +Message-Id: <20170605192130.25320-3-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, + maxime.ripard@free-electrons.com, wens@csie.org, + catalin.marinas@arm.com, will.deacon@arm.com +Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, + Corentin Labbe , + linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org +Date: Mon, 5 Jun 2017 21:21:27 +0200 + +The dwmac-sun8i hardware is present on the Banana Pi M2+ +It uses an external PHY rtl8211e via RGMII. + +This patch create the needed regulator, emac and phy nodes. + +Signed-off-by: Corentin Labbe +--- + arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 29 +++++++++++++++++++++++++ + 1 file changed, 29 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +index 883072b611fa..d756ff825116 100644 +--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +@@ -52,6 +52,7 @@ + compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + serial1 = &uart1; + }; +@@ -84,6 +85,16 @@ + }; + }; + ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; ++ + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; +@@ -104,12 +115,30 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + status = "okay"; + }; + ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0>; ++ }; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; +From patchwork Mon Jun 5 19:21:28 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [3/5] ARM: sun50i: orangepi-pc2: Enable dwmac-sun8i +From: Corentin LABBE +X-Patchwork-Id: 9767347 +Message-Id: <20170605192130.25320-4-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, + maxime.ripard@free-electrons.com, wens@csie.org, + catalin.marinas@arm.com, will.deacon@arm.com +Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, + Corentin Labbe , + linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org +Date: Mon, 5 Jun 2017 21:21:28 +0200 + +The dwmac-sun8i hardware is present on the Orange PI PC2. +It uses an external PHY rtl8211e via RGMII. + +This patch create the needed regulator, emac and phy nodes. +Signed-off-by: Corentin Labbe +--- + .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 27 ++++++++++++++++++++++ + 1 file changed, 27 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts +index dfecc17dcc92..a8296feee884 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts +@@ -59,6 +59,7 @@ + }; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + }; + +@@ -91,6 +92,16 @@ + }; + }; + ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; ++ + reg_usb0_vbus: usb0-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb0-vbus"; +@@ -126,12 +137,28 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + status = "okay"; + }; + ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; +From patchwork Wed May 31 07:18:44 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v6,13/21] arm: sun8i: nanopi-neo: Enable dwmac-sun8i +From: Corentin LABBE +X-Patchwork-Id: 9756089 +Message-Id: <20170531071852.12422-14-clabbe.montjoie@gmail.com> +To: robh+dt@kernel.org, mark.rutland@arm.com, + maxime.ripard@free-electrons.com, + wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, + will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com +Cc: devicetree@vger.kernel.org, netdev@vger.kernel.org, + linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, + Corentin Labbe , + linux-arm-kernel@lists.infradead.org +Date: Wed, 31 May 2017 09:18:44 +0200 + +The dwmac-sun8i hardware is present on the NanoPi Neo. +It uses the internal PHY. +This patch create the needed emac node. + +Signed-off-by: Corentin Labbe +--- + arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts +index 8d2cc6e9a03f..78f6c24952dd 100644 +--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts +@@ -46,3 +46,10 @@ + model = "FriendlyARM NanoPi NEO"; + compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3"; + }; ++ ++&emac { ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ status = "okay"; ++}; diff --git a/CVE-2017-7645.patch b/CVE-2017-7645.patch deleted file mode 100644 index 0be019cc3..000000000 --- a/CVE-2017-7645.patch +++ /dev/null @@ -1,180 +0,0 @@ -From: "J. Bruce Fields" -Date: 2017-04-14 15:04:40 -Subject: [PATCH] nfsd: check for oversized NFSv2/v3 arguments - -A client can append random data to the end of an NFSv2 or NFSv3 RPC call -without our complaining; we'll just stop parsing at the end of the -expected data and ignore the rest. - -Encoded arguments and replies are stored together in an array of pages, -and if a call is too large it could leave inadequate space for the -reply. This is normally OK because NFS RPC's typically have either -short arguments and long replies (like READ) or long arguments and short -replies (like WRITE). But a client that sends an incorrectly long reply -can violate those assumptions. This was observed to cause crashes. - -So, insist that the argument not be any longer than we expect. - -Also, several operations increment rq_next_page in the decode routine -before checking the argument size, which can leave rq_next_page pointing -well past the end of the page array, causing trouble later in -svc_free_pages. - -As followup we may also want to rewrite the encoding routines to check -more carefully that they aren't running off the end of the page array. - -Reported-by: Tuomas Haanpää -Reported-by: Ari Kauppi -Cc: stable@vger.kernel.org -Signed-off-by: J. Bruce Fields ---- - fs/nfsd/nfs3xdr.c | 23 +++++++++++++++++------ - fs/nfsd/nfsxdr.c | 13 ++++++++++--- - include/linux/sunrpc/svc.h | 3 +-- - 3 files changed, 28 insertions(+), 11 deletions(-) - -diff --git a/fs/nfsd/nfs3xdr.c b/fs/nfsd/nfs3xdr.c -index dba2ff8eaa68..be66bcadfaea 100644 ---- a/fs/nfsd/nfs3xdr.c -+++ b/fs/nfsd/nfs3xdr.c -@@ -334,8 +334,11 @@ nfs3svc_decode_readargs(struct svc_rqst *rqstp, __be32 *p, - if (!p) - return 0; - p = xdr_decode_hyper(p, &args->offset); -- - args->count = ntohl(*p++); -+ -+ if (!xdr_argsize_check(rqstp, p)) -+ return 0; -+ - len = min(args->count, max_blocksize); - - /* set up the kvec */ -@@ -349,7 +352,7 @@ nfs3svc_decode_readargs(struct svc_rqst *rqstp, __be32 *p, - v++; - } - args->vlen = v; -- return xdr_argsize_check(rqstp, p); -+ return 1; - } - - int -@@ -536,9 +539,11 @@ nfs3svc_decode_readlinkargs(struct svc_rqst *rqstp, __be32 *p, - p = decode_fh(p, &args->fh); - if (!p) - return 0; -+ if (!xdr_argsize_check(rqstp, p)) -+ return 0; - args->buffer = page_address(*(rqstp->rq_next_page++)); - -- return xdr_argsize_check(rqstp, p); -+ return 1; - } - - int -@@ -564,10 +569,14 @@ nfs3svc_decode_readdirargs(struct svc_rqst *rqstp, __be32 *p, - args->verf = p; p += 2; - args->dircount = ~0; - args->count = ntohl(*p++); -+ -+ if (!xdr_argsize_check(rqstp, p)) -+ return 0; -+ - args->count = min_t(u32, args->count, PAGE_SIZE); - args->buffer = page_address(*(rqstp->rq_next_page++)); - -- return xdr_argsize_check(rqstp, p); -+ return 1; - } - - int -@@ -585,6 +594,9 @@ nfs3svc_decode_readdirplusargs(struct svc_rqst *rqstp, __be32 *p, - args->dircount = ntohl(*p++); - args->count = ntohl(*p++); - -+ if (!xdr_argsize_check(rqstp, p)) -+ return 0; -+ - len = args->count = min(args->count, max_blocksize); - while (len > 0) { - struct page *p = *(rqstp->rq_next_page++); -@@ -592,8 +604,7 @@ nfs3svc_decode_readdirplusargs(struct svc_rqst *rqstp, __be32 *p, - args->buffer = page_address(p); - len -= PAGE_SIZE; - } -- -- return xdr_argsize_check(rqstp, p); -+ return 1; - } - - int -diff --git a/fs/nfsd/nfsxdr.c b/fs/nfsd/nfsxdr.c -index 41b468a6a90f..79268369f7b3 100644 ---- a/fs/nfsd/nfsxdr.c -+++ b/fs/nfsd/nfsxdr.c -@@ -257,6 +257,9 @@ nfssvc_decode_readargs(struct svc_rqst *rqstp, __be32 *p, - len = args->count = ntohl(*p++); - p++; /* totalcount - unused */ - -+ if (!xdr_argsize_check(rqstp, p)) -+ return 0; -+ - len = min_t(unsigned int, len, NFSSVC_MAXBLKSIZE_V2); - - /* set up somewhere to store response. -@@ -272,7 +275,7 @@ nfssvc_decode_readargs(struct svc_rqst *rqstp, __be32 *p, - v++; - } - args->vlen = v; -- return xdr_argsize_check(rqstp, p); -+ return 1; - } - - int -@@ -360,9 +363,11 @@ nfssvc_decode_readlinkargs(struct svc_rqst *rqstp, __be32 *p, struct nfsd_readli - p = decode_fh(p, &args->fh); - if (!p) - return 0; -+ if (!xdr_argsize_check(rqstp, p)) -+ return 0; - args->buffer = page_address(*(rqstp->rq_next_page++)); - -- return xdr_argsize_check(rqstp, p); -+ return 1; - } - - int -@@ -400,9 +405,11 @@ nfssvc_decode_readdirargs(struct svc_rqst *rqstp, __be32 *p, - args->cookie = ntohl(*p++); - args->count = ntohl(*p++); - args->count = min_t(u32, args->count, PAGE_SIZE); -+ if (!xdr_argsize_check(rqstp, p)) -+ return 0; - args->buffer = page_address(*(rqstp->rq_next_page++)); - -- return xdr_argsize_check(rqstp, p); -+ return 1; - } - - /* -diff --git a/include/linux/sunrpc/svc.h b/include/linux/sunrpc/svc.h -index e770abeed32d..6ef19cf658b4 100644 ---- a/include/linux/sunrpc/svc.h -+++ b/include/linux/sunrpc/svc.h -@@ -336,8 +336,7 @@ xdr_argsize_check(struct svc_rqst *rqstp, __be32 *p) - { - char *cp = (char *)p; - struct kvec *vec = &rqstp->rq_arg.head[0]; -- return cp >= (char*)vec->iov_base -- && cp <= (char*)vec->iov_base + vec->iov_len; -+ return cp == (char *)vec->iov_base + vec->iov_len; - } - - static inline int --- -2.9.3 - --- -To unsubscribe from this list: send the line "unsubscribe linux-nfs" in -the body of a message to majordomo@vger.kernel.org -More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch b/MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch index 76084d472..08195ff4e 100644 --- a/MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch +++ b/MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch @@ -1,7 +1,7 @@ -From 8a4535bcfe24d317be675e53cdc8c61d22fdc7f3 Mon Sep 17 00:00:00 2001 +From 90dc66270b02981b19a085c6a9184e3452b7b3e8 Mon Sep 17 00:00:00 2001 From: Josh Boyer -Date: Fri, 26 Oct 2012 12:42:16 -0400 -Subject: [PATCH 18/20] MODSIGN: Import certificates from UEFI Secure Boot +Date: Fri, 5 May 2017 08:21:59 +0100 +Subject: [PATCH 3/4] MODSIGN: Import certificates from UEFI Secure Boot Secure Boot stores a list of allowed certificates in the 'db' variable. This imports those certificates into the system trusted keyring. This @@ -11,104 +11,68 @@ variable, a user can allow a module signed with that certificate to load. The shim UEFI bootloader has a similar certificate list stored in the 'MokListRT' variable. We import those as well. -In the opposite case, Secure Boot maintains a list of disallowed -certificates in the 'dbx' variable. We load those certificates into -the newly introduced system blacklist keyring and forbid any module -signed with those from loading. +Secure Boot also maintains a list of disallowed certificates in the 'dbx' +variable. We load those certificates into the newly introduced system +blacklist keyring and forbid any module signed with those from loading and +forbid the use within the kernel of any key with a matching hash. + +This facility is enabled by setting CONFIG_LOAD_UEFI_KEYS. Signed-off-by: Josh Boyer +Signed-off-by: David Howells --- - certs/system_keyring.c | 13 ++++++ - include/keys/system_keyring.h | 1 + - init/Kconfig | 9 ++++ - kernel/Makefile | 3 ++ - kernel/modsign_uefi.c | 99 +++++++++++++++++++++++++++++++++++++++++++ - 5 files changed, 125 insertions(+) - create mode 100644 kernel/modsign_uefi.c + certs/Kconfig | 16 ++++++ + certs/Makefile | 4 ++ + certs/load_uefi.c | 168 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 188 insertions(+) + create mode 100644 certs/load_uefi.c -diff --git a/certs/system_keyring.c b/certs/system_keyring.c -index 787eeead2f57..4d9123ed5c07 100644 ---- a/certs/system_keyring.c -+++ b/certs/system_keyring.c -@@ -30,6 +30,19 @@ extern __initconst const u8 system_certificate_list[]; - extern __initconst const unsigned long system_certificate_list_size; - - /** -+ * get_system_keyring - Return a pointer to the system keyring -+ * -+ */ -+struct key *get_system_keyring(void) -+{ -+ struct key *system_keyring = NULL; -+ -+ system_keyring = builtin_trusted_keys; -+ return system_keyring; -+} -+EXPORT_SYMBOL_GPL(get_system_keyring); -+ -+/** - * restrict_link_to_builtin_trusted - Restrict keyring addition by built in CA - * - * Restrict the addition of keys into a keyring based on the key-to-be-added -diff --git a/include/keys/system_keyring.h b/include/keys/system_keyring.h -index 5bc291a3d261..56ff5715ab67 100644 ---- a/include/keys/system_keyring.h -+++ b/include/keys/system_keyring.h -@@ -36,6 +36,7 @@ extern int restrict_link_by_builtin_and_secondary_trusted( - #ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING - extern struct key *system_blacklist_keyring; - #endif -+extern struct key *get_system_keyring(void); - - #ifdef CONFIG_IMA_BLACKLIST_KEYRING - extern struct key *ima_blacklist_keyring; -diff --git a/init/Kconfig b/init/Kconfig -index 461ad575a608..93646fd7b1c8 100644 ---- a/init/Kconfig -+++ b/init/Kconfig -@@ -2009,6 +2009,15 @@ config MODULE_SIG_ALL - comment "Do not forget to sign required modules with scripts/sign-file" - depends on MODULE_SIG_FORCE && !MODULE_SIG_ALL - -+config MODULE_SIG_UEFI -+ bool "Allow modules signed with certs stored in UEFI" -+ depends on MODULE_SIG && SYSTEM_BLACKLIST_KEYRING && EFI -+ select EFI_SIGNATURE_LIST_PARSER +diff --git a/certs/Kconfig b/certs/Kconfig +index 630ae09..edf9f75 100644 +--- a/certs/Kconfig ++++ b/certs/Kconfig +@@ -90,4 +90,20 @@ config EFI_SIGNATURE_LIST_PARSER + This option provides support for parsing EFI signature lists for + X.509 certificates and turning them into keys. + ++config LOAD_UEFI_KEYS ++ bool "Load certs and blacklist from UEFI db for module checking" ++ depends on SYSTEM_BLACKLIST_KEYRING ++ depends on SECONDARY_TRUSTED_KEYRING ++ depends on EFI ++ depends on EFI_SIGNATURE_LIST_PARSER + help -+ This will import certificates stored in UEFI and allow modules -+ signed with those to be loaded. It will also disallow loading -+ of modules stored in the UEFI dbx variable. ++ If the kernel is booted in secure boot mode, this option will cause ++ the kernel to load the certificates from the UEFI db and MokListRT ++ into the secondary trusted keyring. It will also load any X.509 ++ SHA256 hashes in the dbx list into the blacklist. + - choice - prompt "Which hash algorithm should modules be signed with?" - depends on MODULE_SIG -diff --git a/kernel/Makefile b/kernel/Makefile -index eb26e12c6c2a..e0c2268cb97e 100644 ---- a/kernel/Makefile -+++ b/kernel/Makefile -@@ -57,6 +57,7 @@ endif - obj-$(CONFIG_UID16) += uid16.o - obj-$(CONFIG_MODULES) += module.o - obj-$(CONFIG_MODULE_SIG) += module_signing.o -+obj-$(CONFIG_MODULE_SIG_UEFI) += modsign_uefi.o - obj-$(CONFIG_KALLSYMS) += kallsyms.o - obj-$(CONFIG_BSD_PROCESS_ACCT) += acct.o - obj-$(CONFIG_KEXEC_CORE) += kexec_core.o -@@ -113,6 +114,8 @@ obj-$(CONFIG_MEMBARRIER) += membarrier.o - - obj-$(CONFIG_HAS_IOMEM) += memremap.o - -+$(obj)/modsign_uefi.o: KBUILD_CFLAGS += -fshort-wchar ++ The effect of this is that, if the kernel is booted in secure boot ++ mode, modules signed with UEFI-stored keys will be permitted to be ++ loaded and keys that match the blacklist will be rejected. + - $(obj)/configs.o: $(obj)/config_data.h - - targets += config_data.gz -diff --git a/kernel/modsign_uefi.c b/kernel/modsign_uefi.c + endmenu +diff --git a/certs/Makefile b/certs/Makefile +index 738151a..a5e057a 100644 +--- a/certs/Makefile ++++ b/certs/Makefile +@@ -11,6 +11,10 @@ obj-$(CONFIG_SYSTEM_BLACKLIST_KEYRING) += blacklist_nohashes.o + endif + obj-$(CONFIG_EFI_SIGNATURE_LIST_PARSER) += efi_parser.o + ++obj-$(CONFIG_LOAD_UEFI_KEYS) += load_uefi.o ++$(obj)/load_uefi.o: KBUILD_CFLAGS += -fshort-wchar ++ ++ + ifeq ($(CONFIG_SYSTEM_TRUSTED_KEYRING),y) + + $(eval $(call config_filename,SYSTEM_TRUSTED_KEYS)) +diff --git a/certs/load_uefi.c b/certs/load_uefi.c new file mode 100644 -index 000000000000..fe4a6f2bf10a +index 0000000..b44e464 --- /dev/null -+++ b/kernel/modsign_uefi.c -@@ -0,0 +1,99 @@ ++++ b/certs/load_uefi.c +@@ -0,0 +1,168 @@ +#include +#include +#include @@ -117,14 +81,22 @@ index 000000000000..fe4a6f2bf10a +#include +#include +#include -+#include "module-internal.h" ++#include "internal.h" + -+static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid, unsigned long *size) ++static __initdata efi_guid_t efi_cert_x509_guid = EFI_CERT_X509_GUID; ++static __initdata efi_guid_t efi_cert_x509_sha256_guid = EFI_CERT_X509_SHA256_GUID; ++static __initdata efi_guid_t efi_cert_sha256_guid = EFI_CERT_SHA256_GUID; ++ ++/* ++ * Get a certificate list blob from the named EFI variable. ++ */ ++static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid, ++ unsigned long *size) +{ + efi_status_t status; + unsigned long lsize = 4; + unsigned long tmpdb[4]; -+ void *db = NULL; ++ void *db; + + status = efi.get_variable(name, guid, NULL, &lsize, &tmpdb); + if (status != EFI_BUFFER_TOO_SMALL) { @@ -135,23 +107,89 @@ index 000000000000..fe4a6f2bf10a + db = kmalloc(lsize, GFP_KERNEL); + if (!db) { + pr_err("Couldn't allocate memory for uefi cert list\n"); -+ goto out; ++ return NULL; + } + + status = efi.get_variable(name, guid, NULL, &lsize, db); + if (status != EFI_SUCCESS) { + kfree(db); -+ db = NULL; + pr_err("Error reading db var: 0x%lx\n", status); ++ return NULL; + } -+out: ++ + *size = lsize; + return db; +} + +/* -+ * * Load the certs contained in the UEFI databases -+ * */ ++ * Blacklist an X509 TBS hash. ++ */ ++static __init void uefi_blacklist_x509_tbs(const char *source, ++ const void *data, size_t len) ++{ ++ char *hash, *p; ++ ++ hash = kmalloc(4 + len * 2 + 1, GFP_KERNEL); ++ if (!hash) ++ return; ++ p = memcpy(hash, "tbs:", 4); ++ p += 4; ++ bin2hex(p, data, len); ++ p += len * 2; ++ *p = 0; ++ ++ mark_hash_blacklisted(hash); ++ kfree(hash); ++} ++ ++/* ++ * Blacklist the hash of an executable. ++ */ ++static __init void uefi_blacklist_binary(const char *source, ++ const void *data, size_t len) ++{ ++ char *hash, *p; ++ ++ hash = kmalloc(4 + len * 2 + 1, GFP_KERNEL); ++ if (!hash) ++ return; ++ p = memcpy(hash, "bin:", 4); ++ p += 4; ++ bin2hex(p, data, len); ++ p += len * 2; ++ *p = 0; ++ ++ mark_hash_blacklisted(hash); ++ kfree(hash); ++} ++ ++/* ++ * Return the appropriate handler for particular signature list types found in ++ * the UEFI db and MokListRT tables. ++ */ ++static __init efi_element_handler_t get_handler_for_db(const efi_guid_t *sig_type) ++{ ++ if (efi_guidcmp(*sig_type, efi_cert_x509_guid) == 0) ++ return add_trusted_secondary_key; ++ return 0; ++} ++ ++/* ++ * Return the appropriate handler for particular signature list types found in ++ * the UEFI dbx and MokListXRT tables. ++ */ ++static __init efi_element_handler_t get_handler_for_dbx(const efi_guid_t *sig_type) ++{ ++ if (efi_guidcmp(*sig_type, efi_cert_x509_sha256_guid) == 0) ++ return uefi_blacklist_x509_tbs; ++ if (efi_guidcmp(*sig_type, efi_cert_sha256_guid) == 0) ++ return uefi_blacklist_binary; ++ return 0; ++} ++ ++/* ++ * Load the certs contained in the UEFI databases ++ */ +static int __init load_uefi_certs(void) +{ + efi_guid_t secure_var = EFI_IMAGE_SECURITY_DATABASE_GUID; @@ -159,17 +197,9 @@ index 000000000000..fe4a6f2bf10a + void *db = NULL, *dbx = NULL, *mok = NULL; + unsigned long dbsize = 0, dbxsize = 0, moksize = 0; + int rc = 0; -+ struct key *keyring = NULL; + -+ /* Check if SB is enabled and just return if not */ -+ if (!efi_enabled(EFI_SECURE_BOOT)) -+ return 0; -+ -+ keyring = get_system_keyring(); -+ if (!keyring) { -+ pr_err("MODSIGN: Couldn't get system keyring\n"); -+ return -EINVAL; -+ } ++ if (!efi.get_variable) ++ return false; + + /* Get db, MokListRT, and dbx. They might not exist, so it isn't + * an error if we can't get them. @@ -178,7 +208,8 @@ index 000000000000..fe4a6f2bf10a + if (!db) { + pr_err("MODSIGN: Couldn't get UEFI db list\n"); + } else { -+ rc = parse_efi_signature_list(db, dbsize, keyring); ++ rc = parse_efi_signature_list("UEFI:db", ++ db, dbsize, get_handler_for_db); + if (rc) + pr_err("Couldn't parse db signatures: %d\n", rc); + kfree(db); @@ -188,7 +219,8 @@ index 000000000000..fe4a6f2bf10a + if (!mok) { + pr_info("MODSIGN: Couldn't get UEFI MokListRT\n"); + } else { -+ rc = parse_efi_signature_list(mok, moksize, keyring); ++ rc = parse_efi_signature_list("UEFI:MokListRT", ++ mok, moksize, get_handler_for_db); + if (rc) + pr_err("Couldn't parse MokListRT signatures: %d\n", rc); + kfree(mok); @@ -198,8 +230,9 @@ index 000000000000..fe4a6f2bf10a + if (!dbx) { + pr_info("MODSIGN: Couldn't get UEFI dbx list\n"); + } else { -+ rc = parse_efi_signature_list(dbx, dbxsize, -+ system_blacklist_keyring); ++ rc = parse_efi_signature_list("UEFI:dbx", ++ dbx, dbxsize, ++ get_handler_for_dbx); + if (rc) + pr_err("Couldn't parse dbx signatures: %d\n", rc); + kfree(dbx); diff --git a/MODSIGN-Support-not-importing-certs-from-db.patch b/MODSIGN-Support-not-importing-certs-from-db.patch index d7087b5e7..13fecd2f2 100644 --- a/MODSIGN-Support-not-importing-certs-from-db.patch +++ b/MODSIGN-Support-not-importing-certs-from-db.patch @@ -1,62 +1,62 @@ -From 9d2e5c61d5adcf7911f67ed44a1b0ff881f175bb Mon Sep 17 00:00:00 2001 +From 9f1958a0cc911e1f79b2733ee5029dbd819ff328 Mon Sep 17 00:00:00 2001 From: Josh Boyer -Date: Thu, 3 Oct 2013 10:14:23 -0400 -Subject: [PATCH 19/20] MODSIGN: Support not importing certs from db +Date: Fri, 5 May 2017 08:21:59 +0100 +Subject: [PATCH 4/4] MODSIGN: Allow the "db" UEFI variable to be suppressed If a user tells shim to not use the certs/hashes in the UEFI db variable -for verification purposes, shim will set a UEFI variable called MokIgnoreDB. -Have the uefi import code look for this and not import things from the db -variable. +for verification purposes, shim will set a UEFI variable called +MokIgnoreDB. Have the uefi import code look for this and ignore the db +variable if it is found. Signed-off-by: Josh Boyer +Signed-off-by: David Howells --- - kernel/modsign_uefi.c | 40 +++++++++++++++++++++++++++++++--------- - 1 file changed, 31 insertions(+), 9 deletions(-) + certs/load_uefi.c | 44 ++++++++++++++++++++++++++++++++++---------- + 1 file changed, 34 insertions(+), 10 deletions(-) -diff --git a/kernel/modsign_uefi.c b/kernel/modsign_uefi.c -index fe4a6f2bf10a..a41da14b1ffd 100644 ---- a/kernel/modsign_uefi.c -+++ b/kernel/modsign_uefi.c -@@ -8,6 +8,23 @@ - #include - #include "module-internal.h" - -+static __init int check_ignore_db(void) +diff --git a/certs/load_uefi.c b/certs/load_uefi.c +index b44e464..3d88459 100644 +--- a/certs/load_uefi.c ++++ b/certs/load_uefi.c +@@ -13,6 +13,26 @@ static __initdata efi_guid_t efi_cert_x509_sha256_guid = EFI_CERT_X509_SHA256_GU + static __initdata efi_guid_t efi_cert_sha256_guid = EFI_CERT_SHA256_GUID; + + /* ++ * Look to see if a UEFI variable called MokIgnoreDB exists and return true if ++ * it does. ++ * ++ * This UEFI variable is set by the shim if a user tells the shim to not use ++ * the certs/hashes in the UEFI db variable for verification purposes. If it ++ * is set, we should ignore the db variable also and the true return indicates ++ * this. ++ */ ++static __init bool uefi_check_ignore_db(void) +{ + efi_status_t status; + unsigned int db = 0; + unsigned long size = sizeof(db); + efi_guid_t guid = EFI_SHIM_LOCK_GUID; + -+ /* Check and see if the MokIgnoreDB variable exists. If that fails -+ * then we don't ignore DB. If it succeeds, we do. -+ */ + status = efi.get_variable(L"MokIgnoreDB", &guid, NULL, &size, &db); -+ if (status != EFI_SUCCESS) -+ return 0; -+ -+ return 1; ++ return status == EFI_SUCCESS; +} + - static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid, unsigned long *size) ++/* + * Get a certificate list blob from the named EFI variable. + */ + static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid, +@@ -113,7 +133,9 @@ static __init efi_element_handler_t get_handler_for_dbx(const efi_guid_t *sig_ty + } + + /* +- * Load the certs contained in the UEFI databases ++ * Load the certs contained in the UEFI databases into the secondary trusted ++ * keyring and the UEFI blacklisted X.509 cert SHA256 hashes into the blacklist ++ * keyring. + */ + static int __init load_uefi_certs(void) { - efi_status_t status; -@@ -47,7 +64,7 @@ static int __init load_uefi_certs(void) - efi_guid_t mok_var = EFI_SHIM_LOCK_GUID; - void *db = NULL, *dbx = NULL, *mok = NULL; - unsigned long dbsize = 0, dbxsize = 0, moksize = 0; -- int rc = 0; -+ int ignore_db, rc = 0; - struct key *keyring = NULL; - - /* Check if SB is enabled and just return if not */ -@@ -60,17 +77,22 @@ static int __init load_uefi_certs(void) - return -EINVAL; - } - -+ /* See if the user has setup Ignore DB mode */ -+ ignore_db = check_ignore_db(); -+ +@@ -129,15 +151,17 @@ static int __init load_uefi_certs(void) /* Get db, MokListRT, and dbx. They might not exist, so it isn't * an error if we can't get them. */ @@ -64,22 +64,24 @@ index fe4a6f2bf10a..a41da14b1ffd 100644 - if (!db) { - pr_err("MODSIGN: Couldn't get UEFI db list\n"); - } else { -- rc = parse_efi_signature_list(db, dbsize, keyring); +- rc = parse_efi_signature_list("UEFI:db", +- db, dbsize, get_handler_for_db); - if (rc) - pr_err("Couldn't parse db signatures: %d\n", rc); - kfree(db); -+ if (!ignore_db) { ++ if (!uefi_check_ignore_db()) { + db = get_cert_list(L"db", &secure_var, &dbsize); + if (!db) { + pr_err("MODSIGN: Couldn't get UEFI db list\n"); + } else { -+ rc = parse_efi_signature_list(db, dbsize, keyring); ++ rc = parse_efi_signature_list("UEFI:db", ++ db, dbsize, get_handler_for_db); + if (rc) + pr_err("Couldn't parse db signatures: %d\n", rc); + kfree(db); + } } - + mok = get_cert_list(L"MokListRT", &mok_var, &moksize); -- 2.9.3 diff --git a/arm-imx6-hummingboard2.patch b/arm-imx6-hummingboard2.patch index bcb93214e..9c55a7b81 100644 --- a/arm-imx6-hummingboard2.patch +++ b/arm-imx6-hummingboard2.patch @@ -26,21 +26,21 @@ index 011808490fed..ccdff6650541 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -353,6 +353,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6dl-gw552x.dtb \ - imx6dl-gw553x.dtb \ + imx6dl-gw5903.dtb \ + imx6dl-gw5904.dtb \ imx6dl-hummingboard.dtb \ + imx6dl-hummingboard2.dtb \ imx6dl-icore.dtb \ imx6dl-icore-rqs.dtb \ imx6dl-nit6xlite.dtb \ @@ -397,6 +398,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6q-gw553x.dtb \ + imx6q-gw5904.dtb \ imx6q-h100.dtb \ imx6q-hummingboard.dtb \ + imx6q-hummingboard2.dtb \ imx6q-icore.dtb \ - imx6q-icore-rqs.dtb \ - imx6q-marsboard.dtb \ + imx6q-icore-ofcap10.dtb \ + imx6q-icore-ofcap12.dtb \ diff --git a/arch/arm/boot/dts/imx6dl-hummingboard2.dts b/arch/arm/boot/dts/imx6dl-hummingboard2.dts new file mode 100644 index 000000000000..990b5050de5b diff --git a/arm-rk3288-tinker.patch b/arm-rk3288-tinker.patch deleted file mode 100644 index d7a4897b3..000000000 --- a/arm-rk3288-tinker.patch +++ /dev/null @@ -1,573 +0,0 @@ -From 223599514133293bb9afe7b82937140c3b275877 Mon Sep 17 00:00:00 2001 -From: Eddie Cai -Date: Tue, 14 Feb 2017 18:07:31 +0800 -Subject: ARM: dts: rockchip: add dts for RK3288-Tinker board - -This patch add basic support for RK3288-Tinker board. We can boot in to rootfs -with this patch. - -Signed-off-by: Eddie Cai -Signed-off-by: Heiko Stuebner ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/rk3288-tinker.dts | 536 ++++++++++++++++++++++++++++++++++++ - 2 files changed, 537 insertions(+) - create mode 100644 arch/arm/boot/dts/rk3288-tinker.dts - -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index 0118084..fb46849 100644 ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -695,6 +695,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ - rk3288-popmetal.dtb \ - rk3288-r89.dtb \ - rk3288-rock2-square.dtb \ -+ rk3288-tinker.dtb \ - rk3288-veyron-brain.dtb \ - rk3288-veyron-jaq.dtb \ - rk3288-veyron-jerry.dtb \ -diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts -new file mode 100644 -index 0000000..f601c78 ---- /dev/null -+++ b/arch/arm/boot/dts/rk3288-tinker.dts -@@ -0,0 +1,536 @@ -+/* -+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively, -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+/dts-v1/; -+ -+#include "rk3288.dtsi" -+#include -+ -+/ { -+ model = "Rockchip RK3288 Tinker Board"; -+ compatible = "asus,rk3288-tinker", "rockchip,rk3288"; -+ -+ memory { -+ reg = <0x0 0x80000000>; -+ device_type = "memory"; -+ }; -+ -+ ext_gmac: external-gmac-clock { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <125000000>; -+ clock-output-names = "ext_gmac"; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ autorepeat; -+ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwrbtn>; -+ -+ button@0 { -+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; -+ linux,code = ; -+ label = "GPIO Key Power"; -+ linux,input-type = <1>; -+ wakeup-source; -+ debounce-interval = <100>; -+ }; -+ }; -+ -+ gpio-leds { -+ compatible = "gpio-leds"; -+ -+ act-led { -+ gpios=<&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger="mmc0"; -+ }; -+ -+ heartbeat-led { -+ gpios=<&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger="heartbeat"; -+ }; -+ -+ pwr-led { -+ gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-on"; -+ }; -+ }; -+ -+ sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,name = "rockchip,tinker-codec"; -+ simple-audio-card,mclk-fs = <512>; -+ -+ simple-audio-card,codec { -+ sound-dai = <&hdmi>; -+ }; -+ -+ simple-audio-card,cpu { -+ sound-dai = <&i2s>; -+ }; -+ }; -+ -+ vcc_sys: vsys-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_sys"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ regulator-boot-on; -+ }; -+ -+ vcc_sd: sdmmc-regulator { -+ compatible = "regulator-fixed"; -+ gpio = <&gpio7 11 GPIO_ACTIVE_LOW>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc_pwr>; -+ regulator-name = "vcc_sd"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ vin-supply = <&vcc_io>; -+ }; -+}; -+ -+&cpu0 { -+ cpu0-supply = <&vdd_cpu>; -+}; -+ -+&gmac { -+ assigned-clocks = <&cru SCLK_MAC>; -+ assigned-clock-parents = <&ext_gmac>; -+ clock_in_out = "input"; -+ phy-mode = "rgmii"; -+ phy-supply = <&vcc33_lan>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rgmii_pins>; -+ snps,reset-gpio = <&gpio4 7 0>; -+ snps,reset-active-low; -+ snps,reset-delays-us = <0 10000 1000000>; -+ tx_delay = <0x30>; -+ rx_delay = <0x10>; -+ status = "ok"; -+}; -+ -+&hdmi { -+ ddc-i2c-bus = <&i2c5>; -+ status = "okay"; -+}; -+ -+&i2c0 { -+ clock-frequency = <400000>; -+ status = "okay"; -+ -+ rk808: pmic@1b { -+ compatible = "rockchip,rk808"; -+ reg = <0x1b>; -+ interrupt-parent = <&gpio0>; -+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>; -+ #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk808-clkout2"; -+ dvs-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>, -+ <&gpio0 12 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pmic_int &global_pwroff &dvs_1 &dvs_2>; -+ rockchip,system-power-controller; -+ wakeup-source; -+ -+ vcc1-supply = <&vcc_sys>; -+ vcc2-supply = <&vcc_sys>; -+ vcc3-supply = <&vcc_sys>; -+ vcc4-supply = <&vcc_sys>; -+ vcc6-supply = <&vcc_sys>; -+ vcc7-supply = <&vcc_sys>; -+ vcc8-supply = <&vcc_io>; -+ vcc9-supply = <&vcc_io>; -+ vcc10-supply = <&vcc_io>; -+ vcc11-supply = <&vcc_sys>; -+ vcc12-supply = <&vcc_io>; -+ vddio-supply = <&vcc_io>; -+ -+ regulators { -+ vdd_cpu: DCDC_REG1 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-name = "vdd_arm"; -+ regulator-ramp-delay = <6000>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_gpu: DCDC_REG2 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <850000>; -+ regulator-max-microvolt = <1250000>; -+ regulator-name = "vdd_gpu"; -+ regulator-ramp-delay = <6000>; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ -+ vcc_ddr: DCDC_REG3 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-name = "vcc_ddr"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_io: DCDC_REG4 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc_io"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcc18_ldo1: LDO_REG1 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc18_ldo1"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc33_mipi: LDO_REG2 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc33_mipi"; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_10: LDO_REG3 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ regulator-name = "vdd_10"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ -+ vcc18_codec: LDO_REG4 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc18_codec"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vccio_sd: LDO_REG5 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vccio_sd"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vdd10_lcd: LDO_REG6 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ regulator-name = "vdd10_lcd"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ -+ vcc_18: LDO_REG7 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc_18"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc18_lcd: LDO_REG8 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc18_lcd"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc33_sd: SWITCH_REG1 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-name = "vcc33_sd"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc33_lan: SWITCH_REG2 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-name = "vcc33_lan"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ }; -+ }; -+}; -+ -+&i2c2 { -+ status = "okay"; -+}; -+ -+&i2c5 { -+ status = "okay"; -+}; -+ -+&i2s { -+ #sound-dai-cells = <0>; -+ status = "okay"; -+}; -+ -+&io_domains { -+ status = "okay"; -+ -+ sdcard-supply = <&vccio_sd>; -+}; -+ -+&pinctrl { -+ pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { -+ drive-strength = <8>; -+ }; -+ -+ pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma { -+ bias-pull-up; -+ drive-strength = <8>; -+ }; -+ -+ backlight { -+ bl_en: bl-en { -+ rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ buttons { -+ pwrbtn: pwrbtn { -+ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ eth_phy { -+ eth_phy_pwr: eth-phy-pwr { -+ rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ pmic { -+ pmic_int: pmic-int { -+ rockchip,pins = ; -+ }; -+ -+ dvs_1: dvs-1 { -+ rockchip,pins = ; -+ }; -+ -+ dvs_2: dvs-2 { -+ rockchip,pins = ; -+ }; -+ }; -+ -+ sdmmc { -+ sdmmc_bus4: sdmmc-bus4 { -+ rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, -+ <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, -+ <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, -+ <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; -+ }; -+ -+ sdmmc_clk: sdmmc-clk { -+ rockchip,pins = <6 20 RK_FUNC_1 \ -+ &pcfg_pull_none_drv_8ma>; -+ }; -+ -+ sdmmc_cmd: sdmmc-cmd { -+ rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; -+ }; -+ -+ sdmmc_pwr: sdmmc-pwr { -+ rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ usb { -+ host_vbus_drv: host-vbus-drv { -+ rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ pwr_3g: pwr-3g { -+ rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+}; -+ -+&pwm0 { -+ status = "okay"; -+}; -+ -+&saradc { -+ vref-supply = <&vcc18_ldo1>; -+ status ="okay"; -+}; -+ -+&sdmmc { -+ bus-width = <4>; -+ cap-mmc-highspeed; -+ cap-sd-highspeed; -+ card-detect-delay = <200>; -+ disable-wp; /* wp not hooked up */ -+ num-slots = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; -+ status = "okay"; -+ vmmc-supply = <&vcc33_sd>; -+ vqmmc-supply = <&vccio_sd>; -+}; -+ -+&tsadc { -+ rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ -+ rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ -+ status = "okay"; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; -+ -+&uart1 { -+ status = "okay"; -+}; -+ -+&uart2 { -+ status = "okay"; -+}; -+ -+&uart3 { -+ status = "okay"; -+}; -+ -+&uart4 { -+ status = "okay"; -+}; -+ -+&usbphy { -+ status = "okay"; -+}; -+ -+&usb_host0_ehci { -+ status = "okay"; -+}; -+ -+&usb_host1 { -+ status = "okay"; -+}; -+ -+&usb_otg { -+ status= "okay"; -+}; -+ -+&vopb { -+ status = "okay"; -+}; -+ -+&vopb_mmu { -+ status = "okay"; -+}; -+ -+&vopl { -+ status = "okay"; -+}; -+ -+&vopl_mmu { -+ status = "okay"; -+}; -+ -+&wdt { -+ status = "okay"; -+}; --- -cgit v1.1 - diff --git a/arm64-hikey-fixes.patch b/arm64-hikey-fixes.patch deleted file mode 100644 index 18bc05b2b..000000000 --- a/arm64-hikey-fixes.patch +++ /dev/null @@ -1,77 +0,0 @@ -From patchwork Sat Apr 8 07:18:40 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: reset: hi6220: Set module license so that it can be loaded -From: Jeremy Linton -X-Patchwork-Id: 9670985 -Message-Id: <20170408071840.29380-1-lintonrjeremy@gmail.com> -To: linux-kernel@vger.kernel.org -Cc: p.zabel@pengutronix.de, saberlily.xia@hisilicon.com, - puck.chen@hisilicon.com, xinliang.liu@linaro.org, - Jeremy Linton -Date: Sat, 8 Apr 2017 02:18:40 -0500 - -The hi6220_reset driver can be built as a standalone module -yet it cannot be loaded because it depends on GPL exported symbols. - -Lets set the module license so that the module loads, and things like -the on-board kirin drm starts working. - -Signed-off-by: Jeremy Linton -reviewed-by: Xinliang Liu ---- - drivers/reset/hisilicon/hi6220_reset.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/drivers/reset/hisilicon/hi6220_reset.c b/drivers/reset/hisilicon/hi6220_reset.c -index 35ce53e..d5e5229 100644 ---- a/drivers/reset/hisilicon/hi6220_reset.c -+++ b/drivers/reset/hisilicon/hi6220_reset.c -@@ -155,3 +155,5 @@ static int __init hi6220_reset_init(void) - } - - postcore_initcall(hi6220_reset_init); -+ -+MODULE_LICENSE("GPL v2"); -From patchwork Mon Apr 3 05:28:42 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2,1/2] regulator: hi655x: Describe consumed platform device -From: Jeremy Linton -X-Patchwork-Id: 9658793 -Message-Id: <20170403052843.12711-2-lintonrjeremy@gmail.com> -To: linux-kernel@vger.kernel.org -Cc: broonie@kernel.org, lgirdwood@gmail.com, puck.chen@hisilicon.com, - lee.jones@linaro.org, Jeremy Linton -Date: Mon, 3 Apr 2017 00:28:42 -0500 - -The hi655x-regulator driver consumes a similarly named platform device. -Adding that to the module device table, allows modprobe to locate this -driver once the device is created. - -Signed-off-by: Jeremy Linton ---- - drivers/regulator/hi655x-regulator.c | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/drivers/regulator/hi655x-regulator.c b/drivers/regulator/hi655x-regulator.c -index 065c100..36ae54b 100644 ---- a/drivers/regulator/hi655x-regulator.c -+++ b/drivers/regulator/hi655x-regulator.c -@@ -214,7 +214,14 @@ static int hi655x_regulator_probe(struct platform_device *pdev) - return 0; - } - -+static const struct platform_device_id hi655x_regulator_table[] = { -+ { .name = "hi655x-regulator" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(platform, hi655x_regulator_table); -+ - static struct platform_driver hi655x_regulator_driver = { -+ .id_table = hi655x_regulator_table, - .driver = { - .name = "hi655x-regulator", - }, diff --git a/baseconfig/CONFIG_ADXL345_I2C b/baseconfig/CONFIG_ADXL345_I2C new file mode 100644 index 000000000..f6976b836 --- /dev/null +++ b/baseconfig/CONFIG_ADXL345_I2C @@ -0,0 +1 @@ +# CONFIG_ADXL345_I2C is not set diff --git a/baseconfig/CONFIG_ADXL345_SPI b/baseconfig/CONFIG_ADXL345_SPI new file mode 100644 index 000000000..186ab0d3a --- /dev/null +++ b/baseconfig/CONFIG_ADXL345_SPI @@ -0,0 +1 @@ +# CONFIG_ADXL345_SPI is not set diff --git a/baseconfig/CONFIG_ARM64_ERRATUM_858921 b/baseconfig/CONFIG_ARM64_ERRATUM_858921 new file mode 100644 index 000000000..055a6880c --- /dev/null +++ b/baseconfig/CONFIG_ARM64_ERRATUM_858921 @@ -0,0 +1 @@ +CONFIG_ARM64_ERRATUM_858921=y diff --git a/baseconfig/CONFIG_B43LEGACY_DEBUG b/baseconfig/CONFIG_B43LEGACY_DEBUG index 02f67a471..494982463 100644 --- a/baseconfig/CONFIG_B43LEGACY_DEBUG +++ b/baseconfig/CONFIG_B43LEGACY_DEBUG @@ -1 +1 @@ -CONFIG_B43LEGACY_DEBUG=y +# CONFIG_B43LEGACY_DEBUG is not set diff --git a/baseconfig/CONFIG_B43_DEBUG b/baseconfig/CONFIG_B43_DEBUG index 9346a4511..a2bf9bb1f 100644 --- a/baseconfig/CONFIG_B43_DEBUG +++ b/baseconfig/CONFIG_B43_DEBUG @@ -1 +1 @@ -CONFIG_B43_DEBUG=y +# CONFIG_B43_DEBUG is not set diff --git a/baseconfig/CONFIG_BACKLIGHT_ARCXCNN b/baseconfig/CONFIG_BACKLIGHT_ARCXCNN new file mode 100644 index 000000000..49161963d --- /dev/null +++ b/baseconfig/CONFIG_BACKLIGHT_ARCXCNN @@ -0,0 +1 @@ +CONFIG_BACKLIGHT_ARCXCNN=m diff --git a/baseconfig/CONFIG_BATTERY_LEGO_EV3 b/baseconfig/CONFIG_BATTERY_LEGO_EV3 new file mode 100644 index 000000000..3305bd311 --- /dev/null +++ b/baseconfig/CONFIG_BATTERY_LEGO_EV3 @@ -0,0 +1 @@ +# CONFIG_BATTERY_LEGO_EV3 is not set diff --git a/baseconfig/CONFIG_BCM_FLEXRM_MBOX b/baseconfig/CONFIG_BCM_FLEXRM_MBOX new file mode 100644 index 000000000..b47d4f392 --- /dev/null +++ b/baseconfig/CONFIG_BCM_FLEXRM_MBOX @@ -0,0 +1 @@ +# CONFIG_BCM_FLEXRM_MBOX is not set diff --git a/baseconfig/CONFIG_BFQ_GROUP_IOSCHED b/baseconfig/CONFIG_BFQ_GROUP_IOSCHED new file mode 100644 index 000000000..731981ca3 --- /dev/null +++ b/baseconfig/CONFIG_BFQ_GROUP_IOSCHED @@ -0,0 +1 @@ +CONFIG_BFQ_GROUP_IOSCHED=y diff --git a/baseconfig/CONFIG_BLK_DEV_HD b/baseconfig/CONFIG_BLK_DEV_HD deleted file mode 100644 index 9155aa284..000000000 --- a/baseconfig/CONFIG_BLK_DEV_HD +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_BLK_DEV_HD is not set diff --git a/baseconfig/CONFIG_BLK_DEV_THROTTLING_LOW b/baseconfig/CONFIG_BLK_DEV_THROTTLING_LOW new file mode 100644 index 000000000..802bc55b4 --- /dev/null +++ b/baseconfig/CONFIG_BLK_DEV_THROTTLING_LOW @@ -0,0 +1 @@ +# CONFIG_BLK_DEV_THROTTLING_LOW is not set diff --git a/baseconfig/CONFIG_BT_HCIUART_SERDEV b/baseconfig/CONFIG_BT_HCIUART_SERDEV new file mode 100644 index 000000000..0b0ef5abd --- /dev/null +++ b/baseconfig/CONFIG_BT_HCIUART_SERDEV @@ -0,0 +1 @@ +CONFIG_BT_HCIUART_SERDEV=y diff --git a/baseconfig/CONFIG_BT_QCOMSMD b/baseconfig/CONFIG_BT_QCOMSMD deleted file mode 100644 index d67bc39b0..000000000 --- a/baseconfig/CONFIG_BT_QCOMSMD +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_BT_QCOMSMD is not set diff --git a/baseconfig/CONFIG_CAN_HI311X b/baseconfig/CONFIG_CAN_HI311X new file mode 100644 index 000000000..a775c67f7 --- /dev/null +++ b/baseconfig/CONFIG_CAN_HI311X @@ -0,0 +1 @@ +CONFIG_CAN_HI311X=m diff --git a/baseconfig/CONFIG_CAN_MCBA_USB b/baseconfig/CONFIG_CAN_MCBA_USB new file mode 100644 index 000000000..9a21b3bcb --- /dev/null +++ b/baseconfig/CONFIG_CAN_MCBA_USB @@ -0,0 +1 @@ +CONFIG_CAN_MCBA_USB=m diff --git a/baseconfig/CONFIG_CAN_PEAK_PCIEFD b/baseconfig/CONFIG_CAN_PEAK_PCIEFD new file mode 100644 index 000000000..3a388b984 --- /dev/null +++ b/baseconfig/CONFIG_CAN_PEAK_PCIEFD @@ -0,0 +1 @@ +CONFIG_CAN_PEAK_PCIEFD=m diff --git a/baseconfig/CONFIG_CAN_VXCAN b/baseconfig/CONFIG_CAN_VXCAN new file mode 100644 index 000000000..a6e002cff --- /dev/null +++ b/baseconfig/CONFIG_CAN_VXCAN @@ -0,0 +1 @@ +CONFIG_CAN_VXCAN=m diff --git a/baseconfig/CONFIG_CEC_PLATFORM_DRIVERS b/baseconfig/CONFIG_CEC_PLATFORM_DRIVERS new file mode 100644 index 000000000..07bd8e955 --- /dev/null +++ b/baseconfig/CONFIG_CEC_PLATFORM_DRIVERS @@ -0,0 +1 @@ +CONFIG_CEC_PLATFORM_DRIVERS=y diff --git a/baseconfig/CONFIG_CROS_KBD_LED_BACKLIGHT b/baseconfig/CONFIG_CROS_KBD_LED_BACKLIGHT index 95f043d68..83b61e1e1 100644 --- a/baseconfig/CONFIG_CROS_KBD_LED_BACKLIGHT +++ b/baseconfig/CONFIG_CROS_KBD_LED_BACKLIGHT @@ -1 +1 @@ -# CONFIG_CROS_KBD_LED_BACKLIGHT is not set +CONFIG_CROS_KBD_LED_BACKLIGHT=m diff --git a/baseconfig/CONFIG_CRYPTO_DEV_CCREE b/baseconfig/CONFIG_CRYPTO_DEV_CCREE new file mode 100644 index 000000000..fe4fcee59 --- /dev/null +++ b/baseconfig/CONFIG_CRYPTO_DEV_CCREE @@ -0,0 +1 @@ +# CONFIG_CRYPTO_DEV_CCREE is not set diff --git a/baseconfig/CONFIG_CRYPTO_DH b/baseconfig/CONFIG_CRYPTO_DH index ea06ab3c2..c92378433 100644 --- a/baseconfig/CONFIG_CRYPTO_DH +++ b/baseconfig/CONFIG_CRYPTO_DH @@ -1 +1 @@ -CONFIG_CRYPTO_DH=m +CONFIG_CRYPTO_DH=y diff --git a/baseconfig/CONFIG_DM_INTEGRITY b/baseconfig/CONFIG_DM_INTEGRITY new file mode 100644 index 000000000..ee953fd2d --- /dev/null +++ b/baseconfig/CONFIG_DM_INTEGRITY @@ -0,0 +1 @@ +CONFIG_DM_INTEGRITY=m diff --git a/baseconfig/CONFIG_DRM_DW_HDMI_AHB_AUDIO b/baseconfig/CONFIG_DRM_DW_HDMI_AHB_AUDIO new file mode 100644 index 000000000..5c276f1dc --- /dev/null +++ b/baseconfig/CONFIG_DRM_DW_HDMI_AHB_AUDIO @@ -0,0 +1 @@ +# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set diff --git a/baseconfig/CONFIG_DRM_DW_HDMI_I2S_AUDIO b/baseconfig/CONFIG_DRM_DW_HDMI_I2S_AUDIO index 34ecaf242..d1f777db4 100644 --- a/baseconfig/CONFIG_DRM_DW_HDMI_I2S_AUDIO +++ b/baseconfig/CONFIG_DRM_DW_HDMI_I2S_AUDIO @@ -1 +1 @@ -CONFIG_DRM_DW_HDMI_I2S_AUDIO=m +# CONFIG_DRM_DW_HDMI_I2S_AUDIO is not set diff --git a/baseconfig/CONFIG_DRM_FBDEV_OVERALLOC b/baseconfig/CONFIG_DRM_FBDEV_OVERALLOC new file mode 100644 index 000000000..32e5c4520 --- /dev/null +++ b/baseconfig/CONFIG_DRM_FBDEV_OVERALLOC @@ -0,0 +1 @@ +CONFIG_DRM_FBDEV_OVERALLOC=100 diff --git a/baseconfig/CONFIG_DRM_LVDS_ENCODER b/baseconfig/CONFIG_DRM_LVDS_ENCODER new file mode 100644 index 000000000..e2ea277b3 --- /dev/null +++ b/baseconfig/CONFIG_DRM_LVDS_ENCODER @@ -0,0 +1 @@ +# CONFIG_DRM_LVDS_ENCODER is not set diff --git a/baseconfig/CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW b/baseconfig/CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW new file mode 100644 index 000000000..7aa3826f4 --- /dev/null +++ b/baseconfig/CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW @@ -0,0 +1 @@ +# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set diff --git a/baseconfig/CONFIG_DRM_MXSFB b/baseconfig/CONFIG_DRM_MXSFB index e24a8952c..550352f6d 100644 --- a/baseconfig/CONFIG_DRM_MXSFB +++ b/baseconfig/CONFIG_DRM_MXSFB @@ -1 +1 @@ -CONFIG_DRM_MXSFB=m +# CONFIG_DRM_MXSFB is not set diff --git a/baseconfig/x86/CONFIG_DRM_PANEL_LG_LG4573 b/baseconfig/CONFIG_DRM_PANEL_LG_LG4573 similarity index 100% rename from baseconfig/x86/CONFIG_DRM_PANEL_LG_LG4573 rename to baseconfig/CONFIG_DRM_PANEL_LG_LG4573 diff --git a/baseconfig/CONFIG_DRM_PANEL_LVDS b/baseconfig/CONFIG_DRM_PANEL_LVDS new file mode 100644 index 000000000..af4bf6e01 --- /dev/null +++ b/baseconfig/CONFIG_DRM_PANEL_LVDS @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_LVDS is not set diff --git a/baseconfig/x86/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 b/baseconfig/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 similarity index 100% rename from baseconfig/x86/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 rename to baseconfig/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 diff --git a/baseconfig/x86/CONFIG_DRM_PANEL_SAMSUNG_LD9040 b/baseconfig/CONFIG_DRM_PANEL_SAMSUNG_LD9040 similarity index 100% rename from baseconfig/x86/CONFIG_DRM_PANEL_SAMSUNG_LD9040 rename to baseconfig/CONFIG_DRM_PANEL_SAMSUNG_LD9040 diff --git a/baseconfig/CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 b/baseconfig/CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 new file mode 100644 index 000000000..8cb5243d1 --- /dev/null +++ b/baseconfig/CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set diff --git a/baseconfig/x86/i686/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 b/baseconfig/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 similarity index 100% rename from baseconfig/x86/i686/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 rename to baseconfig/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 diff --git a/baseconfig/x86/i686/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 b/baseconfig/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 similarity index 100% rename from baseconfig/x86/i686/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 rename to baseconfig/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 diff --git a/baseconfig/CONFIG_DRM_PANEL_SITRONIX_ST7789V b/baseconfig/CONFIG_DRM_PANEL_SITRONIX_ST7789V new file mode 100644 index 000000000..712cb79a7 --- /dev/null +++ b/baseconfig/CONFIG_DRM_PANEL_SITRONIX_ST7789V @@ -0,0 +1 @@ +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set diff --git a/baseconfig/CONFIG_DRM_RCAR_DW_HDMI b/baseconfig/CONFIG_DRM_RCAR_DW_HDMI new file mode 100644 index 000000000..d3dace0e8 --- /dev/null +++ b/baseconfig/CONFIG_DRM_RCAR_DW_HDMI @@ -0,0 +1 @@ +# CONFIG_DRM_RCAR_DW_HDMI is not set diff --git a/baseconfig/CONFIG_EARLY_PRINTK_USB_XDBC b/baseconfig/CONFIG_EARLY_PRINTK_USB_XDBC new file mode 100644 index 000000000..47e8f4090 --- /dev/null +++ b/baseconfig/CONFIG_EARLY_PRINTK_USB_XDBC @@ -0,0 +1 @@ +CONFIG_EARLY_PRINTK_USB_XDBC=y diff --git a/baseconfig/CONFIG_EDAC_GHES b/baseconfig/CONFIG_EDAC_GHES new file mode 100644 index 000000000..e68c7c4c2 --- /dev/null +++ b/baseconfig/CONFIG_EDAC_GHES @@ -0,0 +1 @@ +CONFIG_EDAC_GHES=y diff --git a/baseconfig/CONFIG_EDAC_MM_EDAC b/baseconfig/CONFIG_EDAC_MM_EDAC deleted file mode 100644 index 5f7fa223a..000000000 --- a/baseconfig/CONFIG_EDAC_MM_EDAC +++ /dev/null @@ -1 +0,0 @@ -CONFIG_EDAC_MM_EDAC=m diff --git a/baseconfig/CONFIG_GPIO_FTGPIO010 b/baseconfig/CONFIG_GPIO_FTGPIO010 new file mode 100644 index 000000000..3a1fb41ea --- /dev/null +++ b/baseconfig/CONFIG_GPIO_FTGPIO010 @@ -0,0 +1 @@ +# CONFIG_GPIO_FTGPIO010 is not set diff --git a/baseconfig/CONFIG_HD44780 b/baseconfig/CONFIG_HD44780 new file mode 100644 index 000000000..22e6cf3b3 --- /dev/null +++ b/baseconfig/CONFIG_HD44780 @@ -0,0 +1 @@ +CONFIG_HD44780=m diff --git a/baseconfig/CONFIG_HID_ACCUTOUCH b/baseconfig/CONFIG_HID_ACCUTOUCH new file mode 100644 index 000000000..7b8010de1 --- /dev/null +++ b/baseconfig/CONFIG_HID_ACCUTOUCH @@ -0,0 +1 @@ +CONFIG_HID_ACCUTOUCH=m diff --git a/baseconfig/CONFIG_HID_NTI b/baseconfig/CONFIG_HID_NTI new file mode 100644 index 000000000..c239c7052 --- /dev/null +++ b/baseconfig/CONFIG_HID_NTI @@ -0,0 +1 @@ +CONFIG_HID_NTI=m diff --git a/baseconfig/CONFIG_HID_SENSOR_HUMIDITY b/baseconfig/CONFIG_HID_SENSOR_HUMIDITY new file mode 100644 index 000000000..d50f5014a --- /dev/null +++ b/baseconfig/CONFIG_HID_SENSOR_HUMIDITY @@ -0,0 +1 @@ +CONFIG_HID_SENSOR_HUMIDITY=m diff --git a/baseconfig/CONFIG_HID_SENSOR_TEMP b/baseconfig/CONFIG_HID_SENSOR_TEMP new file mode 100644 index 000000000..6f1a98bc0 --- /dev/null +++ b/baseconfig/CONFIG_HID_SENSOR_TEMP @@ -0,0 +1 @@ +CONFIG_HID_SENSOR_TEMP=m diff --git a/baseconfig/CONFIG_I2C_MUX_LTC4306 b/baseconfig/CONFIG_I2C_MUX_LTC4306 new file mode 100644 index 000000000..f7c16456c --- /dev/null +++ b/baseconfig/CONFIG_I2C_MUX_LTC4306 @@ -0,0 +1 @@ +CONFIG_I2C_MUX_LTC4306=m diff --git a/baseconfig/CONFIG_IEEE802154_CA8210 b/baseconfig/CONFIG_IEEE802154_CA8210 new file mode 100644 index 000000000..d4a2158a3 --- /dev/null +++ b/baseconfig/CONFIG_IEEE802154_CA8210 @@ -0,0 +1 @@ +CONFIG_IEEE802154_CA8210=m diff --git a/baseconfig/CONFIG_IEEE802154_CA8210_DEBUGFS b/baseconfig/CONFIG_IEEE802154_CA8210_DEBUGFS new file mode 100644 index 000000000..e919384b7 --- /dev/null +++ b/baseconfig/CONFIG_IEEE802154_CA8210_DEBUGFS @@ -0,0 +1 @@ +# CONFIG_IEEE802154_CA8210_DEBUGFS is not set diff --git a/baseconfig/CONFIG_IIO_CROS_EC_SENSORS_COR b/baseconfig/CONFIG_IIO_CROS_EC_SENSORS_COR deleted file mode 100644 index f3d54f70e..000000000 --- a/baseconfig/CONFIG_IIO_CROS_EC_SENSORS_COR +++ /dev/null @@ -1 +0,0 @@ -CONFIG_IIO_CROS_EC_SENSORS_COR=m diff --git a/baseconfig/CONFIG_INPUT_MMA8450 b/baseconfig/CONFIG_INPUT_MMA8450 index 68519d153..105180917 100644 --- a/baseconfig/CONFIG_INPUT_MMA8450 +++ b/baseconfig/CONFIG_INPUT_MMA8450 @@ -1 +1 @@ -CONFIG_INPUT_MMA8450=m +# CONFIG_INPUT_MMA8450 is not set diff --git a/baseconfig/CONFIG_INPUT_MPU3050 b/baseconfig/CONFIG_INPUT_MPU3050 deleted file mode 100644 index 7c1afe068..000000000 --- a/baseconfig/CONFIG_INPUT_MPU3050 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_INPUT_MPU3050=m diff --git a/baseconfig/CONFIG_IOSCHED_BFQ b/baseconfig/CONFIG_IOSCHED_BFQ new file mode 100644 index 000000000..3023fb0b5 --- /dev/null +++ b/baseconfig/CONFIG_IOSCHED_BFQ @@ -0,0 +1 @@ +CONFIG_IOSCHED_BFQ=m diff --git a/baseconfig/CONFIG_IR_SIR b/baseconfig/CONFIG_IR_SIR new file mode 100644 index 000000000..34ff7a809 --- /dev/null +++ b/baseconfig/CONFIG_IR_SIR @@ -0,0 +1 @@ +CONFIG_IR_SIR=m diff --git a/baseconfig/CONFIG_JOYSTICK_PSXPAD_SPI b/baseconfig/CONFIG_JOYSTICK_PSXPAD_SPI new file mode 100644 index 000000000..d66d2b113 --- /dev/null +++ b/baseconfig/CONFIG_JOYSTICK_PSXPAD_SPI @@ -0,0 +1 @@ +CONFIG_JOYSTICK_PSXPAD_SPI=m diff --git a/baseconfig/CONFIG_JOYSTICK_PSXPAD_SPI_FF b/baseconfig/CONFIG_JOYSTICK_PSXPAD_SPI_FF new file mode 100644 index 000000000..c534b358b --- /dev/null +++ b/baseconfig/CONFIG_JOYSTICK_PSXPAD_SPI_FF @@ -0,0 +1 @@ +CONFIG_JOYSTICK_PSXPAD_SPI_FF=y diff --git a/baseconfig/CONFIG_KEYBOARD_QT1070 b/baseconfig/CONFIG_KEYBOARD_QT1070 index 7deb75f9a..f9f0b0a84 100644 --- a/baseconfig/CONFIG_KEYBOARD_QT1070 +++ b/baseconfig/CONFIG_KEYBOARD_QT1070 @@ -1 +1 @@ -# CONFIG_KEYBOARD_QT1070 is not set +CONFIG_KEYBOARD_QT1070=m diff --git a/baseconfig/CONFIG_LEDS_DELL_NETBOOKS b/baseconfig/CONFIG_LEDS_DELL_NETBOOKS deleted file mode 100644 index 45f9aee48..000000000 --- a/baseconfig/CONFIG_LEDS_DELL_NETBOOKS +++ /dev/null @@ -1 +0,0 @@ -CONFIG_LEDS_DELL_NETBOOKS=m diff --git a/baseconfig/CONFIG_LIRC_SASEM b/baseconfig/CONFIG_LIRC_SASEM deleted file mode 100644 index 4bfc392e8..000000000 --- a/baseconfig/CONFIG_LIRC_SASEM +++ /dev/null @@ -1 +0,0 @@ -CONFIG_LIRC_SASEM=m diff --git a/baseconfig/CONFIG_LOAD_UEFI_KEYS b/baseconfig/CONFIG_LOAD_UEFI_KEYS new file mode 100644 index 000000000..de1de5c25 --- /dev/null +++ b/baseconfig/CONFIG_LOAD_UEFI_KEYS @@ -0,0 +1 @@ +# CONFIG_LOAD_UEFI_KEYS is not set diff --git a/baseconfig/CONFIG_LTC2497 b/baseconfig/CONFIG_LTC2497 new file mode 100644 index 000000000..312f3db17 --- /dev/null +++ b/baseconfig/CONFIG_LTC2497 @@ -0,0 +1 @@ +# CONFIG_LTC2497 is not set diff --git a/baseconfig/CONFIG_LTC2632 b/baseconfig/CONFIG_LTC2632 new file mode 100644 index 000000000..8bc2b8bc4 --- /dev/null +++ b/baseconfig/CONFIG_LTC2632 @@ -0,0 +1 @@ +# CONFIG_LTC2632 is not set diff --git a/baseconfig/CONFIG_MAX1118 b/baseconfig/CONFIG_MAX1118 new file mode 100644 index 000000000..615bda2e2 --- /dev/null +++ b/baseconfig/CONFIG_MAX1118 @@ -0,0 +1 @@ +# CONFIG_MAX1118 is not set diff --git a/baseconfig/CONFIG_MAX1363 b/baseconfig/CONFIG_MAX1363 index d0090112c..08e944fb7 100644 --- a/baseconfig/CONFIG_MAX1363 +++ b/baseconfig/CONFIG_MAX1363 @@ -1 +1 @@ -# CONFIG_MAX1363 is not set +CONFIG_MAX1363=m diff --git a/baseconfig/CONFIG_MAX30102 b/baseconfig/CONFIG_MAX30102 new file mode 100644 index 000000000..5b4aacf3d --- /dev/null +++ b/baseconfig/CONFIG_MAX30102 @@ -0,0 +1 @@ +# CONFIG_MAX30102 is not set diff --git a/baseconfig/CONFIG_MAX9611 b/baseconfig/CONFIG_MAX9611 new file mode 100644 index 000000000..1cbc674e0 --- /dev/null +++ b/baseconfig/CONFIG_MAX9611 @@ -0,0 +1 @@ +# CONFIG_MAX9611 is not set diff --git a/baseconfig/CONFIG_MEDIA_CEC_RC b/baseconfig/CONFIG_MEDIA_CEC_RC new file mode 100644 index 000000000..1531c4b09 --- /dev/null +++ b/baseconfig/CONFIG_MEDIA_CEC_RC @@ -0,0 +1 @@ +CONFIG_MEDIA_CEC_RC=y diff --git a/baseconfig/CONFIG_MFD_CPCAP b/baseconfig/CONFIG_MFD_CPCAP index acf5bd3fe..0f0408181 100644 --- a/baseconfig/CONFIG_MFD_CPCAP +++ b/baseconfig/CONFIG_MFD_CPCAP @@ -1 +1 @@ -CONFIG_MFD_CPCAP=m +# CONFIG_MFD_CPCAP is not set diff --git a/baseconfig/CONFIG_MFD_EXYNOS_LPASS b/baseconfig/CONFIG_MFD_EXYNOS_LPASS deleted file mode 100644 index d733b0518..000000000 --- a/baseconfig/CONFIG_MFD_EXYNOS_LPASS +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MFD_EXYNOS_LPASS is not set diff --git a/baseconfig/CONFIG_MFD_TI_LMU b/baseconfig/CONFIG_MFD_TI_LMU new file mode 100644 index 000000000..4a84e3fd0 --- /dev/null +++ b/baseconfig/CONFIG_MFD_TI_LMU @@ -0,0 +1 @@ +# CONFIG_MFD_TI_LMU is not set diff --git a/baseconfig/CONFIG_MLX5_CORE_IPOIB b/baseconfig/CONFIG_MLX5_CORE_IPOIB new file mode 100644 index 000000000..d78d82d65 --- /dev/null +++ b/baseconfig/CONFIG_MLX5_CORE_IPOIB @@ -0,0 +1 @@ +CONFIG_MLX5_CORE_IPOIB=y diff --git a/baseconfig/CONFIG_MMC_SDHCI_XENON b/baseconfig/CONFIG_MMC_SDHCI_XENON new file mode 100644 index 000000000..7ced7b045 --- /dev/null +++ b/baseconfig/CONFIG_MMC_SDHCI_XENON @@ -0,0 +1 @@ +CONFIG_MMC_SDHCI_XENON=m diff --git a/baseconfig/CONFIG_MODULE_SIG_UEFI b/baseconfig/CONFIG_MODULE_SIG_UEFI deleted file mode 100644 index e4fb898f7..000000000 --- a/baseconfig/CONFIG_MODULE_SIG_UEFI +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MODULE_SIG_UEFI is not set diff --git a/baseconfig/CONFIG_MPU3050_I2C b/baseconfig/CONFIG_MPU3050_I2C index 92e6cbf51..2e9c7cc45 100644 --- a/baseconfig/CONFIG_MPU3050_I2C +++ b/baseconfig/CONFIG_MPU3050_I2C @@ -1 +1 @@ -# CONFIG_MPU3050_I2C is not set +CONFIG_MPU3050_I2C=m diff --git a/baseconfig/CONFIG_MQ_IOSCHED_KYBER b/baseconfig/CONFIG_MQ_IOSCHED_KYBER new file mode 100644 index 000000000..939264da2 --- /dev/null +++ b/baseconfig/CONFIG_MQ_IOSCHED_KYBER @@ -0,0 +1 @@ +CONFIG_MQ_IOSCHED_KYBER=m diff --git a/baseconfig/CONFIG_NET_9P_XEN b/baseconfig/CONFIG_NET_9P_XEN new file mode 100644 index 000000000..d2565ede3 --- /dev/null +++ b/baseconfig/CONFIG_NET_9P_XEN @@ -0,0 +1 @@ +CONFIG_NET_9P_XEN=m diff --git a/baseconfig/CONFIG_NET_DSA_LOOP b/baseconfig/CONFIG_NET_DSA_LOOP new file mode 100644 index 000000000..08b25de7c --- /dev/null +++ b/baseconfig/CONFIG_NET_DSA_LOOP @@ -0,0 +1 @@ +CONFIG_NET_DSA_LOOP=m diff --git a/baseconfig/CONFIG_NET_DSA_MT7530 b/baseconfig/CONFIG_NET_DSA_MT7530 new file mode 100644 index 000000000..722095c89 --- /dev/null +++ b/baseconfig/CONFIG_NET_DSA_MT7530 @@ -0,0 +1 @@ +CONFIG_NET_DSA_MT7530=m diff --git a/baseconfig/CONFIG_NET_DSA_SMSC_LAN9303_I2C b/baseconfig/CONFIG_NET_DSA_SMSC_LAN9303_I2C new file mode 100644 index 000000000..7c738fff2 --- /dev/null +++ b/baseconfig/CONFIG_NET_DSA_SMSC_LAN9303_I2C @@ -0,0 +1 @@ +CONFIG_NET_DSA_SMSC_LAN9303_I2C=m diff --git a/baseconfig/CONFIG_NET_DSA_SMSC_LAN9303_MDIO b/baseconfig/CONFIG_NET_DSA_SMSC_LAN9303_MDIO new file mode 100644 index 000000000..d7f1987e2 --- /dev/null +++ b/baseconfig/CONFIG_NET_DSA_SMSC_LAN9303_MDIO @@ -0,0 +1 @@ +CONFIG_NET_DSA_SMSC_LAN9303_MDIO=m diff --git a/baseconfig/CONFIG_NET_SCH_DEFAULT b/baseconfig/CONFIG_NET_SCH_DEFAULT new file mode 100644 index 000000000..a4c53d281 --- /dev/null +++ b/baseconfig/CONFIG_NET_SCH_DEFAULT @@ -0,0 +1 @@ +# CONFIG_NET_SCH_DEFAULT is not set diff --git a/baseconfig/powerpc/CONFIG_NR_DEV_DAX b/baseconfig/CONFIG_NR_DEV_DAX similarity index 100% rename from baseconfig/powerpc/CONFIG_NR_DEV_DAX rename to baseconfig/CONFIG_NR_DEV_DAX diff --git a/baseconfig/CONFIG_PCI_ENDPOINT b/baseconfig/CONFIG_PCI_ENDPOINT new file mode 100644 index 000000000..d90e2a4f7 --- /dev/null +++ b/baseconfig/CONFIG_PCI_ENDPOINT @@ -0,0 +1 @@ +# CONFIG_PCI_ENDPOINT is not set diff --git a/baseconfig/CONFIG_PCI_ENDPOINT_TEST b/baseconfig/CONFIG_PCI_ENDPOINT_TEST new file mode 100644 index 000000000..ac8854da9 --- /dev/null +++ b/baseconfig/CONFIG_PCI_ENDPOINT_TEST @@ -0,0 +1 @@ +# CONFIG_PCI_ENDPOINT_TEST is not set diff --git a/baseconfig/CONFIG_PCI_MSI_IRQ_DOMAIN b/baseconfig/CONFIG_PCI_MSI_IRQ_DOMAIN new file mode 100644 index 000000000..90bf4c7ca --- /dev/null +++ b/baseconfig/CONFIG_PCI_MSI_IRQ_DOMAIN @@ -0,0 +1 @@ +CONFIG_PCI_MSI_IRQ_DOMAIN=y diff --git a/baseconfig/CONFIG_PCI_SW_SWITCHTEC b/baseconfig/CONFIG_PCI_SW_SWITCHTEC new file mode 100644 index 000000000..f197a5ed6 --- /dev/null +++ b/baseconfig/CONFIG_PCI_SW_SWITCHTEC @@ -0,0 +1 @@ +CONFIG_PCI_SW_SWITCHTEC=m diff --git a/baseconfig/CONFIG_PINCTRL_MSM8994 b/baseconfig/CONFIG_PINCTRL_MSM8994 index 5dd58e746..977b1c3c4 100644 --- a/baseconfig/CONFIG_PINCTRL_MSM8994 +++ b/baseconfig/CONFIG_PINCTRL_MSM8994 @@ -1 +1 @@ -CONFIG_PINCTRL_MSM8994=m +# CONFIG_PINCTRL_MSM8994 is not set diff --git a/baseconfig/CONFIG_PINCTRL_TI_IODELAY b/baseconfig/CONFIG_PINCTRL_TI_IODELAY deleted file mode 100644 index cc5eb6a6c..000000000 --- a/baseconfig/CONFIG_PINCTRL_TI_IODELAY +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PINCTRL_TI_IODELAY is not set diff --git a/baseconfig/CONFIG_RAS_CEC b/baseconfig/CONFIG_RAS_CEC new file mode 100644 index 000000000..7b0901ca1 --- /dev/null +++ b/baseconfig/CONFIG_RAS_CEC @@ -0,0 +1 @@ +CONFIG_RAS_CEC=y diff --git a/baseconfig/CONFIG_REGULATOR_CPCAP b/baseconfig/CONFIG_REGULATOR_CPCAP deleted file mode 100644 index 02e701e66..000000000 --- a/baseconfig/CONFIG_REGULATOR_CPCAP +++ /dev/null @@ -1 +0,0 @@ -CONFIG_REGULATOR_CPCAP=m diff --git a/baseconfig/CONFIG_REGULATOR_TPS65132 b/baseconfig/CONFIG_REGULATOR_TPS65132 new file mode 100644 index 000000000..b82a99f6c --- /dev/null +++ b/baseconfig/CONFIG_REGULATOR_TPS65132 @@ -0,0 +1 @@ +# CONFIG_REGULATOR_TPS65132 is not set diff --git a/baseconfig/CONFIG_REGULATOR_VCTRL b/baseconfig/CONFIG_REGULATOR_VCTRL new file mode 100644 index 000000000..478bc6400 --- /dev/null +++ b/baseconfig/CONFIG_REGULATOR_VCTRL @@ -0,0 +1 @@ +CONFIG_REGULATOR_VCTRL=m diff --git a/baseconfig/CONFIG_RPMSG_CHAR b/baseconfig/CONFIG_RPMSG_CHAR new file mode 100644 index 000000000..3aa998906 --- /dev/null +++ b/baseconfig/CONFIG_RPMSG_CHAR @@ -0,0 +1 @@ +# CONFIG_RPMSG_CHAR is not set diff --git a/baseconfig/CONFIG_RTL8723BS b/baseconfig/CONFIG_RTL8723BS new file mode 100644 index 000000000..4837f05c7 --- /dev/null +++ b/baseconfig/CONFIG_RTL8723BS @@ -0,0 +1 @@ +CONFIG_RTL8723BS=m diff --git a/baseconfig/CONFIG_SENSORS_ADS1015 b/baseconfig/CONFIG_SENSORS_ADS1015 index 4fc01f323..928b4f25f 100644 --- a/baseconfig/CONFIG_SENSORS_ADS1015 +++ b/baseconfig/CONFIG_SENSORS_ADS1015 @@ -1 +1 @@ -CONFIG_SENSORS_ADS1015=m +# CONFIG_SENSORS_ADS1015 is not set diff --git a/baseconfig/CONFIG_SENSORS_ASPEED b/baseconfig/CONFIG_SENSORS_ASPEED new file mode 100644 index 000000000..7808f12a0 --- /dev/null +++ b/baseconfig/CONFIG_SENSORS_ASPEED @@ -0,0 +1 @@ +CONFIG_SENSORS_ASPEED=m diff --git a/baseconfig/CONFIG_SERIAL_8250_PCI b/baseconfig/CONFIG_SERIAL_8250_PCI index d48086e3e..c0ac5637f 100644 --- a/baseconfig/CONFIG_SERIAL_8250_PCI +++ b/baseconfig/CONFIG_SERIAL_8250_PCI @@ -1 +1 @@ -CONFIG_SERIAL_8250_PCI=m +CONFIG_SERIAL_8250_PCI=y diff --git a/baseconfig/CONFIG_SND_DESIGNWARE_PCM b/baseconfig/CONFIG_SND_DESIGNWARE_PCM index 4fb3ac59e..8f93f9dce 100644 --- a/baseconfig/CONFIG_SND_DESIGNWARE_PCM +++ b/baseconfig/CONFIG_SND_DESIGNWARE_PCM @@ -1 +1 @@ -CONFIG_SND_DESIGNWARE_PCM=m +CONFIG_SND_DESIGNWARE_PCM=y diff --git a/baseconfig/CONFIG_SND_FIREFACE b/baseconfig/CONFIG_SND_FIREFACE new file mode 100644 index 000000000..18782f689 --- /dev/null +++ b/baseconfig/CONFIG_SND_FIREFACE @@ -0,0 +1 @@ +CONFIG_SND_FIREFACE=m diff --git a/baseconfig/CONFIG_SND_FIREWIRE_MOTU b/baseconfig/CONFIG_SND_FIREWIRE_MOTU new file mode 100644 index 000000000..73299e869 --- /dev/null +++ b/baseconfig/CONFIG_SND_FIREWIRE_MOTU @@ -0,0 +1 @@ +CONFIG_SND_FIREWIRE_MOTU=m diff --git a/baseconfig/CONFIG_SND_I2S_HI6210_I2S b/baseconfig/CONFIG_SND_I2S_HI6210_I2S new file mode 100644 index 000000000..9ae15dc8a --- /dev/null +++ b/baseconfig/CONFIG_SND_I2S_HI6210_I2S @@ -0,0 +1 @@ +CONFIG_SND_I2S_HI6210_I2S=m diff --git a/baseconfig/CONFIG_SND_SOC_ADAU1761_I2C b/baseconfig/CONFIG_SND_SOC_ADAU1761_I2C new file mode 100644 index 000000000..54124be46 --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_ADAU1761_I2C @@ -0,0 +1 @@ +CONFIG_SND_SOC_ADAU1761_I2C=m diff --git a/baseconfig/CONFIG_SND_SOC_ADAU1761_SPI b/baseconfig/CONFIG_SND_SOC_ADAU1761_SPI new file mode 100644 index 000000000..fce8309a6 --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_ADAU1761_SPI @@ -0,0 +1 @@ +CONFIG_SND_SOC_ADAU1761_SPI=m diff --git a/baseconfig/CONFIG_SND_SOC_CS35L35 b/baseconfig/CONFIG_SND_SOC_CS35L35 new file mode 100644 index 000000000..3969b2fee --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_CS35L35 @@ -0,0 +1 @@ +CONFIG_SND_SOC_CS35L35=m diff --git a/baseconfig/CONFIG_SND_SOC_DIO2125 b/baseconfig/CONFIG_SND_SOC_DIO2125 new file mode 100644 index 000000000..d3121e77e --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_DIO2125 @@ -0,0 +1 @@ +CONFIG_SND_SOC_DIO2125=m diff --git a/baseconfig/CONFIG_SND_SOC_ES7134 b/baseconfig/CONFIG_SND_SOC_ES7134 new file mode 100644 index 000000000..ff087adce --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_ES7134 @@ -0,0 +1 @@ +CONFIG_SND_SOC_ES7134=m diff --git a/baseconfig/CONFIG_SND_SOC_MAX98927 b/baseconfig/CONFIG_SND_SOC_MAX98927 new file mode 100644 index 000000000..341a74d43 --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_MAX98927 @@ -0,0 +1 @@ +CONFIG_SND_SOC_MAX98927=m diff --git a/baseconfig/CONFIG_SND_SOC_NAU8824 b/baseconfig/CONFIG_SND_SOC_NAU8824 new file mode 100644 index 000000000..3551419c6 --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_NAU8824 @@ -0,0 +1 @@ +CONFIG_SND_SOC_NAU8824=m diff --git a/baseconfig/x86/CONFIG_SPI_ROCKCHIP b/baseconfig/CONFIG_SPI_ROCKCHIP similarity index 100% rename from baseconfig/x86/CONFIG_SPI_ROCKCHIP rename to baseconfig/CONFIG_SPI_ROCKCHIP diff --git a/baseconfig/CONFIG_SRF04 b/baseconfig/CONFIG_SRF04 new file mode 100644 index 000000000..7dcc9136e --- /dev/null +++ b/baseconfig/CONFIG_SRF04 @@ -0,0 +1 @@ +# CONFIG_SRF04 is not set diff --git a/baseconfig/CONFIG_SYSTEM_BLACKLIST_HASH_LIST b/baseconfig/CONFIG_SYSTEM_BLACKLIST_HASH_LIST new file mode 100644 index 000000000..858e87e78 --- /dev/null +++ b/baseconfig/CONFIG_SYSTEM_BLACKLIST_HASH_LIST @@ -0,0 +1 @@ +CONFIG_SYSTEM_BLACKLIST_HASH_LIST="" diff --git a/baseconfig/x86/CONFIG_TCG_CRB b/baseconfig/CONFIG_TCG_CRB similarity index 100% rename from baseconfig/x86/CONFIG_TCG_CRB rename to baseconfig/CONFIG_TCG_CRB diff --git a/baseconfig/CONFIG_TEE b/baseconfig/CONFIG_TEE new file mode 100644 index 000000000..accc7a854 --- /dev/null +++ b/baseconfig/CONFIG_TEE @@ -0,0 +1 @@ +# CONFIG_TEE is not set diff --git a/baseconfig/CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS b/baseconfig/CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS new file mode 100644 index 000000000..9288765d6 --- /dev/null +++ b/baseconfig/CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS @@ -0,0 +1 @@ +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 diff --git a/baseconfig/CONFIG_TIGON3_HWMON b/baseconfig/CONFIG_TIGON3_HWMON new file mode 100644 index 000000000..31215b555 --- /dev/null +++ b/baseconfig/CONFIG_TIGON3_HWMON @@ -0,0 +1 @@ +CONFIG_TIGON3_HWMON=y diff --git a/baseconfig/CONFIG_TI_ADS1015 b/baseconfig/CONFIG_TI_ADS1015 index 8a8d511c6..f57c3fdc4 100644 --- a/baseconfig/CONFIG_TI_ADS1015 +++ b/baseconfig/CONFIG_TI_ADS1015 @@ -1 +1 @@ -# CONFIG_TI_ADS1015 is not set +CONFIG_TI_ADS1015=m diff --git a/baseconfig/CONFIG_TOUCHSCREEN_TSC2007_IIO b/baseconfig/CONFIG_TOUCHSCREEN_TSC2007_IIO new file mode 100644 index 000000000..b67dd760f --- /dev/null +++ b/baseconfig/CONFIG_TOUCHSCREEN_TSC2007_IIO @@ -0,0 +1 @@ +CONFIG_TOUCHSCREEN_TSC2007_IIO=y diff --git a/baseconfig/CONFIG_TYPEC_FUSB302 b/baseconfig/CONFIG_TYPEC_FUSB302 new file mode 100644 index 000000000..9633e1956 --- /dev/null +++ b/baseconfig/CONFIG_TYPEC_FUSB302 @@ -0,0 +1 @@ +CONFIG_TYPEC_FUSB302=m diff --git a/baseconfig/CONFIG_TYPEC_TCPCI b/baseconfig/CONFIG_TYPEC_TCPCI new file mode 100644 index 000000000..46687f546 --- /dev/null +++ b/baseconfig/CONFIG_TYPEC_TCPCI @@ -0,0 +1 @@ +CONFIG_TYPEC_TCPCI=m diff --git a/baseconfig/CONFIG_TYPEC_TCPM b/baseconfig/CONFIG_TYPEC_TCPM new file mode 100644 index 000000000..8294bcc60 --- /dev/null +++ b/baseconfig/CONFIG_TYPEC_TCPM @@ -0,0 +1 @@ +CONFIG_TYPEC_TCPM=m diff --git a/baseconfig/CONFIG_TYPEC_WCOVE b/baseconfig/CONFIG_TYPEC_WCOVE new file mode 100644 index 000000000..8801ecb28 --- /dev/null +++ b/baseconfig/CONFIG_TYPEC_WCOVE @@ -0,0 +1 @@ +CONFIG_TYPEC_WCOVE=m diff --git a/baseconfig/CONFIG_UBIFS_FS_SECURITY b/baseconfig/CONFIG_UBIFS_FS_SECURITY new file mode 100644 index 000000000..cb238b9c2 --- /dev/null +++ b/baseconfig/CONFIG_UBIFS_FS_SECURITY @@ -0,0 +1 @@ +CONFIG_UBIFS_FS_SECURITY=y diff --git a/baseconfig/CONFIG_USB_PCI b/baseconfig/CONFIG_USB_PCI new file mode 100644 index 000000000..26c372a3a --- /dev/null +++ b/baseconfig/CONFIG_USB_PCI @@ -0,0 +1 @@ +CONFIG_USB_PCI=y diff --git a/baseconfig/CONFIG_USB_RAINSHADOW_CEC b/baseconfig/CONFIG_USB_RAINSHADOW_CEC new file mode 100644 index 000000000..c6605282b --- /dev/null +++ b/baseconfig/CONFIG_USB_RAINSHADOW_CEC @@ -0,0 +1 @@ +CONFIG_USB_RAINSHADOW_CEC=m diff --git a/baseconfig/CONFIG_VL6180 b/baseconfig/CONFIG_VL6180 new file mode 100644 index 000000000..b178334de --- /dev/null +++ b/baseconfig/CONFIG_VL6180 @@ -0,0 +1 @@ +CONFIG_VL6180=m diff --git a/baseconfig/CONFIG_VSOCKMON b/baseconfig/CONFIG_VSOCKMON new file mode 100644 index 000000000..82594c488 --- /dev/null +++ b/baseconfig/CONFIG_VSOCKMON @@ -0,0 +1 @@ +CONFIG_VSOCKMON=m diff --git a/baseconfig/CONFIG_W1_SLAVE_DS2438 b/baseconfig/CONFIG_W1_SLAVE_DS2438 new file mode 100644 index 000000000..34301a62e --- /dev/null +++ b/baseconfig/CONFIG_W1_SLAVE_DS2438 @@ -0,0 +1 @@ +CONFIG_W1_SLAVE_DS2438=m diff --git a/baseconfig/CONFIG_X86_MCELOG_LEGACY b/baseconfig/CONFIG_X86_MCELOG_LEGACY new file mode 100644 index 000000000..2a4755640 --- /dev/null +++ b/baseconfig/CONFIG_X86_MCELOG_LEGACY @@ -0,0 +1 @@ +CONFIG_X86_MCELOG_LEGACY=y diff --git a/baseconfig/CONFIG_ZX_TDM b/baseconfig/CONFIG_ZX_TDM new file mode 100644 index 000000000..9d2d9bf4c --- /dev/null +++ b/baseconfig/CONFIG_ZX_TDM @@ -0,0 +1 @@ +# CONFIG_ZX_TDM is not set diff --git a/baseconfig/arm/armv7/armv7/CONFIG_AK8975 b/baseconfig/arm/CONFIG_AK8975 similarity index 100% rename from baseconfig/arm/armv7/armv7/CONFIG_AK8975 rename to baseconfig/arm/CONFIG_AK8975 diff --git a/baseconfig/arm/CONFIG_BCM2835_THERMAL b/baseconfig/arm/CONFIG_BCM2835_THERMAL new file mode 100644 index 000000000..a6e3c0a6d --- /dev/null +++ b/baseconfig/arm/CONFIG_BCM2835_THERMAL @@ -0,0 +1 @@ +CONFIG_BCM2835_THERMAL=m diff --git a/baseconfig/arm/CONFIG_BCM_VIDEOCORE b/baseconfig/arm/CONFIG_BCM_VIDEOCORE new file mode 100644 index 000000000..6897b418e --- /dev/null +++ b/baseconfig/arm/CONFIG_BCM_VIDEOCORE @@ -0,0 +1 @@ +# CONFIG_BCM_VIDEOCORE is not set diff --git a/baseconfig/arm/armv7/CONFIG_CROS_EC_CHARDEV b/baseconfig/arm/CONFIG_CROS_EC_CHARDEV similarity index 100% rename from baseconfig/arm/armv7/CONFIG_CROS_EC_CHARDEV rename to baseconfig/arm/CONFIG_CROS_EC_CHARDEV diff --git a/baseconfig/arm/armv7/CONFIG_CROS_EC_PROTO b/baseconfig/arm/CONFIG_CROS_EC_PROTO similarity index 100% rename from baseconfig/arm/armv7/CONFIG_CROS_EC_PROTO rename to baseconfig/arm/CONFIG_CROS_EC_PROTO diff --git a/baseconfig/arm/armv7/CONFIG_DEFAULT_MMAP_MIN_ADDR b/baseconfig/arm/CONFIG_DEFAULT_MMAP_MIN_ADDR similarity index 100% rename from baseconfig/arm/armv7/CONFIG_DEFAULT_MMAP_MIN_ADDR rename to baseconfig/arm/CONFIG_DEFAULT_MMAP_MIN_ADDR diff --git a/baseconfig/arm/armv7/CONFIG_DRM_DW_HDMI b/baseconfig/arm/CONFIG_DRM_DW_HDMI similarity index 100% rename from baseconfig/arm/armv7/CONFIG_DRM_DW_HDMI rename to baseconfig/arm/CONFIG_DRM_DW_HDMI diff --git a/baseconfig/arm/CONFIG_DRM_DW_HDMI_AHB_AUDIO b/baseconfig/arm/CONFIG_DRM_DW_HDMI_AHB_AUDIO new file mode 100644 index 000000000..679147e29 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_DW_HDMI_AHB_AUDIO @@ -0,0 +1 @@ +CONFIG_DRM_DW_HDMI_AHB_AUDIO=m diff --git a/baseconfig/arm/CONFIG_DRM_DW_HDMI_I2S_AUDIO b/baseconfig/arm/CONFIG_DRM_DW_HDMI_I2S_AUDIO new file mode 100644 index 000000000..34ecaf242 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_DW_HDMI_I2S_AUDIO @@ -0,0 +1 @@ +CONFIG_DRM_DW_HDMI_I2S_AUDIO=m diff --git a/baseconfig/arm/CONFIG_DRM_LVDS_ENCODER b/baseconfig/arm/CONFIG_DRM_LVDS_ENCODER new file mode 100644 index 000000000..53f0efb59 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_LVDS_ENCODER @@ -0,0 +1 @@ +CONFIG_DRM_LVDS_ENCODER=m diff --git a/baseconfig/arm/CONFIG_DRM_MESON_DW_HDMI b/baseconfig/arm/CONFIG_DRM_MESON_DW_HDMI new file mode 100644 index 000000000..2590929f1 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_MESON_DW_HDMI @@ -0,0 +1 @@ +CONFIG_DRM_MESON_DW_HDMI=m diff --git a/baseconfig/arm/CONFIG_DRM_PANEL_LVDS b/baseconfig/arm/CONFIG_DRM_PANEL_LVDS new file mode 100644 index 000000000..6d4d3c7c6 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_PANEL_LVDS @@ -0,0 +1 @@ +CONFIG_DRM_PANEL_LVDS=m diff --git a/baseconfig/arm/CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 b/baseconfig/arm/CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 new file mode 100644 index 000000000..8334ac016 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 @@ -0,0 +1 @@ +CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=m diff --git a/baseconfig/arm/CONFIG_DRM_TOSHIBA_TC358767 b/baseconfig/arm/CONFIG_DRM_TOSHIBA_TC358767 new file mode 100644 index 000000000..dd9667384 --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_TOSHIBA_TC358767 @@ -0,0 +1 @@ +CONFIG_DRM_TOSHIBA_TC358767=m diff --git a/baseconfig/arm/armv7/CONFIG_I2C_CROS_EC_TUNNEL b/baseconfig/arm/CONFIG_I2C_CROS_EC_TUNNEL similarity index 100% rename from baseconfig/arm/armv7/CONFIG_I2C_CROS_EC_TUNNEL rename to baseconfig/arm/CONFIG_I2C_CROS_EC_TUNNEL diff --git a/baseconfig/arm/CONFIG_IIO_CROS_EC_BARO b/baseconfig/arm/CONFIG_IIO_CROS_EC_BARO new file mode 100644 index 000000000..c64555bfa --- /dev/null +++ b/baseconfig/arm/CONFIG_IIO_CROS_EC_BARO @@ -0,0 +1 @@ +CONFIG_IIO_CROS_EC_BARO=m diff --git a/baseconfig/arm/CONFIG_IIO_CROS_EC_LIGHT_PROX b/baseconfig/arm/CONFIG_IIO_CROS_EC_LIGHT_PROX new file mode 100644 index 000000000..deb1a6eb5 --- /dev/null +++ b/baseconfig/arm/CONFIG_IIO_CROS_EC_LIGHT_PROX @@ -0,0 +1 @@ +CONFIG_IIO_CROS_EC_LIGHT_PROX=m diff --git a/baseconfig/CONFIG_IIO_CROS_EC_SENSORS b/baseconfig/arm/CONFIG_IIO_CROS_EC_SENSORS similarity index 100% rename from baseconfig/CONFIG_IIO_CROS_EC_SENSORS rename to baseconfig/arm/CONFIG_IIO_CROS_EC_SENSORS diff --git a/baseconfig/CONFIG_IIO_CROS_EC_SENSORS_CORE b/baseconfig/arm/CONFIG_IIO_CROS_EC_SENSORS_CORE similarity index 100% rename from baseconfig/CONFIG_IIO_CROS_EC_SENSORS_CORE rename to baseconfig/arm/CONFIG_IIO_CROS_EC_SENSORS_CORE diff --git a/baseconfig/arm/CONFIG_KEYBOARD_ADC b/baseconfig/arm/CONFIG_KEYBOARD_ADC new file mode 100644 index 000000000..d9b66de57 --- /dev/null +++ b/baseconfig/arm/CONFIG_KEYBOARD_ADC @@ -0,0 +1 @@ +CONFIG_KEYBOARD_ADC=m diff --git a/baseconfig/arm/armv7/CONFIG_KEYBOARD_CROS_EC b/baseconfig/arm/CONFIG_KEYBOARD_CROS_EC similarity index 100% rename from baseconfig/arm/armv7/CONFIG_KEYBOARD_CROS_EC rename to baseconfig/arm/CONFIG_KEYBOARD_CROS_EC diff --git a/baseconfig/arm/CONFIG_KXSD9 b/baseconfig/arm/CONFIG_KXSD9 new file mode 100644 index 000000000..090669c9c --- /dev/null +++ b/baseconfig/arm/CONFIG_KXSD9 @@ -0,0 +1 @@ +CONFIG_KXSD9=m diff --git a/baseconfig/arm/CONFIG_KXSD9_I2C b/baseconfig/arm/CONFIG_KXSD9_I2C new file mode 100644 index 000000000..3d2256700 --- /dev/null +++ b/baseconfig/arm/CONFIG_KXSD9_I2C @@ -0,0 +1 @@ +CONFIG_KXSD9_I2C=m diff --git a/baseconfig/arm/CONFIG_KXSD9_SPI b/baseconfig/arm/CONFIG_KXSD9_SPI new file mode 100644 index 000000000..f4da57bbc --- /dev/null +++ b/baseconfig/arm/CONFIG_KXSD9_SPI @@ -0,0 +1 @@ +CONFIG_KXSD9_SPI=m diff --git a/baseconfig/arm/armv7/CONFIG_MFD_CROS_EC b/baseconfig/arm/CONFIG_MFD_CROS_EC similarity index 100% rename from baseconfig/arm/armv7/CONFIG_MFD_CROS_EC rename to baseconfig/arm/CONFIG_MFD_CROS_EC diff --git a/baseconfig/arm/armv7/CONFIG_MFD_CROS_EC_I2C b/baseconfig/arm/CONFIG_MFD_CROS_EC_I2C similarity index 100% rename from baseconfig/arm/armv7/CONFIG_MFD_CROS_EC_I2C rename to baseconfig/arm/CONFIG_MFD_CROS_EC_I2C diff --git a/baseconfig/arm/armv7/CONFIG_MFD_CROS_EC_SPI b/baseconfig/arm/CONFIG_MFD_CROS_EC_SPI similarity index 100% rename from baseconfig/arm/armv7/CONFIG_MFD_CROS_EC_SPI rename to baseconfig/arm/CONFIG_MFD_CROS_EC_SPI diff --git a/baseconfig/arm/CONFIG_PCIE_DW_HOST b/baseconfig/arm/CONFIG_PCIE_DW_HOST new file mode 100644 index 000000000..6aecdd9c1 --- /dev/null +++ b/baseconfig/arm/CONFIG_PCIE_DW_HOST @@ -0,0 +1 @@ +CONFIG_PCIE_DW_HOST=y diff --git a/baseconfig/arm/CONFIG_PCI_FTPCI100 b/baseconfig/arm/CONFIG_PCI_FTPCI100 new file mode 100644 index 000000000..f9fe5b6ea --- /dev/null +++ b/baseconfig/arm/CONFIG_PCI_FTPCI100 @@ -0,0 +1 @@ +# CONFIG_PCI_FTPCI100 is not set diff --git a/baseconfig/arm/armv7/CONFIG_PWM_CROS_EC b/baseconfig/arm/CONFIG_PWM_CROS_EC similarity index 100% rename from baseconfig/arm/armv7/CONFIG_PWM_CROS_EC rename to baseconfig/arm/CONFIG_PWM_CROS_EC diff --git a/baseconfig/arm/CONFIG_QCOM_SPMI_IADC b/baseconfig/arm/CONFIG_QCOM_SPMI_IADC deleted file mode 100644 index 1b31637a0..000000000 --- a/baseconfig/arm/CONFIG_QCOM_SPMI_IADC +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_QCOM_SPMI_IADC is not set diff --git a/baseconfig/arm/CONFIG_QCOM_SPMI_VADC b/baseconfig/arm/CONFIG_QCOM_SPMI_VADC deleted file mode 100644 index 54e057273..000000000 --- a/baseconfig/arm/CONFIG_QCOM_SPMI_VADC +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_QCOM_SPMI_VADC is not set diff --git a/baseconfig/arm/CONFIG_REGULATOR_FAN53555 b/baseconfig/arm/CONFIG_REGULATOR_FAN53555 index d62314c7d..5534cc406 100644 --- a/baseconfig/arm/CONFIG_REGULATOR_FAN53555 +++ b/baseconfig/arm/CONFIG_REGULATOR_FAN53555 @@ -1 +1 @@ -# CONFIG_REGULATOR_FAN53555 is not set +CONFIG_REGULATOR_FAN53555=m diff --git a/baseconfig/arm/CONFIG_REGULATOR_QCOM_SPMI b/baseconfig/arm/CONFIG_REGULATOR_QCOM_SPMI deleted file mode 100644 index fe224dc89..000000000 --- a/baseconfig/arm/CONFIG_REGULATOR_QCOM_SPMI +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_REGULATOR_QCOM_SPMI is not set diff --git a/baseconfig/arm/CONFIG_ROCKCHIP_ANALOGIX_DP b/baseconfig/arm/CONFIG_ROCKCHIP_ANALOGIX_DP index ee89108f9..4f8576d47 100644 --- a/baseconfig/arm/CONFIG_ROCKCHIP_ANALOGIX_DP +++ b/baseconfig/arm/CONFIG_ROCKCHIP_ANALOGIX_DP @@ -1 +1 @@ -CONFIG_ROCKCHIP_ANALOGIX_DP=m +CONFIG_ROCKCHIP_ANALOGIX_DP=y diff --git a/baseconfig/arm/CONFIG_ROCKCHIP_CDN_DP b/baseconfig/arm/CONFIG_ROCKCHIP_CDN_DP new file mode 100644 index 000000000..86d2137bd --- /dev/null +++ b/baseconfig/arm/CONFIG_ROCKCHIP_CDN_DP @@ -0,0 +1 @@ +CONFIG_ROCKCHIP_CDN_DP=y diff --git a/baseconfig/arm/CONFIG_ROCKCHIP_DW_HDMI b/baseconfig/arm/CONFIG_ROCKCHIP_DW_HDMI index 49748e701..80c330104 100644 --- a/baseconfig/arm/CONFIG_ROCKCHIP_DW_HDMI +++ b/baseconfig/arm/CONFIG_ROCKCHIP_DW_HDMI @@ -1 +1 @@ -CONFIG_ROCKCHIP_DW_HDMI=m +CONFIG_ROCKCHIP_DW_HDMI=y diff --git a/baseconfig/arm/CONFIG_ROCKCHIP_DW_MIPI_DSI b/baseconfig/arm/CONFIG_ROCKCHIP_DW_MIPI_DSI index 516f3b1c7..6c00423c8 100644 --- a/baseconfig/arm/CONFIG_ROCKCHIP_DW_MIPI_DSI +++ b/baseconfig/arm/CONFIG_ROCKCHIP_DW_MIPI_DSI @@ -1 +1 @@ -CONFIG_ROCKCHIP_DW_MIPI_DSI=m +CONFIG_ROCKCHIP_DW_MIPI_DSI=y diff --git a/baseconfig/arm/CONFIG_ROCKCHIP_INNO_HDMI b/baseconfig/arm/CONFIG_ROCKCHIP_INNO_HDMI index 34b798abf..50cf998df 100644 --- a/baseconfig/arm/CONFIG_ROCKCHIP_INNO_HDMI +++ b/baseconfig/arm/CONFIG_ROCKCHIP_INNO_HDMI @@ -1 +1 @@ -CONFIG_ROCKCHIP_INNO_HDMI=m +CONFIG_ROCKCHIP_INNO_HDMI=y diff --git a/baseconfig/arm/CONFIG_SUN50I_A64_CCU b/baseconfig/arm/CONFIG_SUN50I_A64_CCU deleted file mode 100644 index 9ce6c792a..000000000 --- a/baseconfig/arm/CONFIG_SUN50I_A64_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN50I_A64_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN5I_CCU b/baseconfig/arm/CONFIG_SUN5I_CCU deleted file mode 100644 index 26856d6b2..000000000 --- a/baseconfig/arm/CONFIG_SUN5I_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN5I_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN6I_A31_CCU b/baseconfig/arm/CONFIG_SUN6I_A31_CCU deleted file mode 100644 index 5ce1bb3f7..000000000 --- a/baseconfig/arm/CONFIG_SUN6I_A31_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN6I_A31_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN8I_A23_CCU b/baseconfig/arm/CONFIG_SUN8I_A23_CCU deleted file mode 100644 index 26ae1100c..000000000 --- a/baseconfig/arm/CONFIG_SUN8I_A23_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN8I_A23_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN8I_A33_CCU b/baseconfig/arm/CONFIG_SUN8I_A33_CCU deleted file mode 100644 index e1a357ee8..000000000 --- a/baseconfig/arm/CONFIG_SUN8I_A33_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN8I_A33_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUN8I_H3_CCU b/baseconfig/arm/CONFIG_SUN8I_H3_CCU index 02cfb2c97..542d6fc7d 100644 --- a/baseconfig/arm/CONFIG_SUN8I_H3_CCU +++ b/baseconfig/arm/CONFIG_SUN8I_H3_CCU @@ -1 +1 @@ -# CONFIG_SUN8I_H3_CCU is not set +CONFIG_SUN8I_H3_CCU=y diff --git a/baseconfig/arm/CONFIG_SUN8I_R_CCU b/baseconfig/arm/CONFIG_SUN8I_R_CCU new file mode 100644 index 000000000..0b88df0dc --- /dev/null +++ b/baseconfig/arm/CONFIG_SUN8I_R_CCU @@ -0,0 +1 @@ +CONFIG_SUN8I_R_CCU=y diff --git a/baseconfig/arm/CONFIG_SUN9I_A80_CCU b/baseconfig/arm/CONFIG_SUN9I_A80_CCU deleted file mode 100644 index 82686b27e..000000000 --- a/baseconfig/arm/CONFIG_SUN9I_A80_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN9I_A80_CCU is not set diff --git a/baseconfig/arm/CONFIG_SUNXI_CCU b/baseconfig/arm/CONFIG_SUNXI_CCU deleted file mode 100644 index a383113ef..000000000 --- a/baseconfig/arm/CONFIG_SUNXI_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUNXI_CCU is not set diff --git a/baseconfig/arm/armv7/CONFIG_USB_EHCI_HCD_ORION b/baseconfig/arm/CONFIG_USB_EHCI_HCD_ORION similarity index 100% rename from baseconfig/arm/armv7/CONFIG_USB_EHCI_HCD_ORION rename to baseconfig/arm/CONFIG_USB_EHCI_HCD_ORION diff --git a/baseconfig/arm/CONFIG_VIDEO_BCM2835 b/baseconfig/arm/CONFIG_VIDEO_BCM2835 new file mode 100644 index 000000000..192fdf645 --- /dev/null +++ b/baseconfig/arm/CONFIG_VIDEO_BCM2835 @@ -0,0 +1 @@ +# CONFIG_VIDEO_BCM2835 is not set diff --git a/baseconfig/arm/arm64/CONFIG_ACPI_BGRT b/baseconfig/arm/arm64/CONFIG_ACPI_BGRT new file mode 100644 index 000000000..13035dd82 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_ACPI_BGRT @@ -0,0 +1 @@ +CONFIG_ACPI_BGRT=y diff --git a/baseconfig/arm/arm64/CONFIG_APQ_GCC_8084 b/baseconfig/arm/arm64/CONFIG_APQ_GCC_8084 index 5ce9e62f4..bacb61e5e 100644 --- a/baseconfig/arm/arm64/CONFIG_APQ_GCC_8084 +++ b/baseconfig/arm/arm64/CONFIG_APQ_GCC_8084 @@ -1 +1 @@ -CONFIG_APQ_GCC_8084=m +CONFIG_APQ_GCC_8084=y diff --git a/baseconfig/arm/arm64/CONFIG_ARM64_RELOC_TEST b/baseconfig/arm/arm64/CONFIG_ARM64_RELOC_TEST new file mode 100644 index 000000000..864fc6a6b --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_ARM64_RELOC_TEST @@ -0,0 +1 @@ +# CONFIG_ARM64_RELOC_TEST is not set diff --git a/baseconfig/arm/arm64/CONFIG_ARM64_SW_TTBR0_PAN b/baseconfig/arm/arm64/CONFIG_ARM64_SW_TTBR0_PAN index 3b878e832..294c8ec50 100644 --- a/baseconfig/arm/arm64/CONFIG_ARM64_SW_TTBR0_PAN +++ b/baseconfig/arm/arm64/CONFIG_ARM64_SW_TTBR0_PAN @@ -1 +1 @@ -# CONFIG_ARM64_SW_TTBR0_PAN is not set +CONFIG_ARM64_SW_TTBR0_PAN=y diff --git a/baseconfig/arm/arm64/CONFIG_AXP20X_ADC b/baseconfig/arm/arm64/CONFIG_AXP20X_ADC new file mode 100644 index 000000000..025239f25 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_AXP20X_ADC @@ -0,0 +1 @@ +CONFIG_AXP20X_ADC=m diff --git a/baseconfig/arm/arm64/CONFIG_BATTERY_AXP20X b/baseconfig/arm/arm64/CONFIG_BATTERY_AXP20X new file mode 100644 index 000000000..75591a277 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_BATTERY_AXP20X @@ -0,0 +1 @@ +CONFIG_BATTERY_AXP20X=m diff --git a/baseconfig/arm/arm64/CONFIG_BT_QCOMSMD b/baseconfig/arm/arm64/CONFIG_BT_QCOMSMD new file mode 100644 index 000000000..9f36fb6a8 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_BT_QCOMSMD @@ -0,0 +1 @@ +CONFIG_BT_QCOMSMD=m diff --git a/baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI655X b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI655X new file mode 100644 index 000000000..18ddc0770 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_HI655X @@ -0,0 +1 @@ +CONFIG_COMMON_CLK_HI655X=m diff --git a/baseconfig/arm/arm64/CONFIG_COMMON_CLK_QCOM b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_QCOM index ec4000095..2b7c64357 100644 --- a/baseconfig/arm/arm64/CONFIG_COMMON_CLK_QCOM +++ b/baseconfig/arm/arm64/CONFIG_COMMON_CLK_QCOM @@ -1 +1 @@ -CONFIG_COMMON_CLK_QCOM=m +CONFIG_COMMON_CLK_QCOM=y diff --git a/baseconfig/arm/arm64/CONFIG_CRYPTO_DEV_CAVIUM_ZIP b/baseconfig/arm/arm64/CONFIG_CRYPTO_DEV_CAVIUM_ZIP new file mode 100644 index 000000000..d5226e157 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_CRYPTO_DEV_CAVIUM_ZIP @@ -0,0 +1 @@ +CONFIG_CRYPTO_DEV_CAVIUM_ZIP=m diff --git a/baseconfig/arm/arm64/CONFIG_CRYPTO_DEV_SAFEXCEL b/baseconfig/arm/arm64/CONFIG_CRYPTO_DEV_SAFEXCEL new file mode 100644 index 000000000..61cb97435 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_CRYPTO_DEV_SAFEXCEL @@ -0,0 +1 @@ +CONFIG_CRYPTO_DEV_SAFEXCEL=m diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI index e305e243b..87b627906 100644 --- a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI +++ b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI @@ -1 +1 @@ -# CONFIG_DRM_MSM_DSI is not set +CONFIG_DRM_MSM_DSI=y diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_14NM_PHY b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_14NM_PHY new file mode 100644 index 000000000..397f69094 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_14NM_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_14NM_PHY=y diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_20NM_PHY b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_20NM_PHY new file mode 100644 index 000000000..7595ae205 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_20NM_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_20NM_PHY=y diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_28NM_8960_PHY b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_28NM_8960_PHY new file mode 100644 index 000000000..5d86a4597 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_28NM_8960_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_28NM_8960_PHY=y diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_28NM_PHY b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_28NM_PHY new file mode 100644 index 000000000..ea1c4f918 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_28NM_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_28NM_PHY=y diff --git a/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_PLL b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_PLL new file mode 100644 index 000000000..16ac280e6 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_DRM_MSM_DSI_PLL @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_PLL=y diff --git a/baseconfig/arm/arm64/CONFIG_EDAC_THUNDERX b/baseconfig/arm/arm64/CONFIG_EDAC_THUNDERX new file mode 100644 index 000000000..dae44bb02 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_EDAC_THUNDERX @@ -0,0 +1 @@ +CONFIG_EDAC_THUNDERX=m diff --git a/baseconfig/arm/arm64/CONFIG_EXTCON_QCOM_SPMI_MISC b/baseconfig/arm/arm64/CONFIG_EXTCON_QCOM_SPMI_MISC new file mode 100644 index 000000000..b52487909 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_EXTCON_QCOM_SPMI_MISC @@ -0,0 +1 @@ +CONFIG_EXTCON_QCOM_SPMI_MISC=m diff --git a/baseconfig/arm/arm64/CONFIG_GPIO_PCA953X b/baseconfig/arm/arm64/CONFIG_GPIO_PCA953X deleted file mode 100644 index 15f1c9373..000000000 --- a/baseconfig/arm/arm64/CONFIG_GPIO_PCA953X +++ /dev/null @@ -1 +0,0 @@ -CONFIG_GPIO_PCA953X=m diff --git a/baseconfig/arm/arm64/CONFIG_GPIO_XLP b/baseconfig/arm/arm64/CONFIG_GPIO_XLP new file mode 100644 index 000000000..f99cd41f3 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_GPIO_XLP @@ -0,0 +1 @@ +CONFIG_GPIO_XLP=m diff --git a/baseconfig/arm/arm64/CONFIG_I2C_XLP9XX b/baseconfig/arm/arm64/CONFIG_I2C_XLP9XX new file mode 100644 index 000000000..bcc41c376 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_I2C_XLP9XX @@ -0,0 +1 @@ +CONFIG_I2C_XLP9XX=m diff --git a/baseconfig/arm/arm64/CONFIG_MMC_CAVIUM_THUNDERX b/baseconfig/arm/arm64/CONFIG_MMC_CAVIUM_THUNDERX new file mode 100644 index 000000000..8c4640a79 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_MMC_CAVIUM_THUNDERX @@ -0,0 +1 @@ +CONFIG_MMC_CAVIUM_THUNDERX=m diff --git a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8660 b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8660 index 457d918ff..9effe8611 100644 --- a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8660 +++ b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8660 @@ -1 +1 @@ -CONFIG_MSM_GCC_8660=m +CONFIG_MSM_GCC_8660=y diff --git a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8916 b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8916 index f65dc3662..87cf3fd89 100644 --- a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8916 +++ b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8916 @@ -1 +1 @@ -# CONFIG_MSM_GCC_8916 is not set +CONFIG_MSM_GCC_8916=y diff --git a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8960 b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8960 index a492a6821..03ba44b34 100644 --- a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8960 +++ b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8960 @@ -1 +1 @@ -CONFIG_MSM_GCC_8960=m +CONFIG_MSM_GCC_8960=y diff --git a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8974 b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8974 index 62f48a9e8..8ffbd8055 100644 --- a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8974 +++ b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8974 @@ -1 +1 @@ -CONFIG_MSM_GCC_8974=m +CONFIG_MSM_GCC_8974=y diff --git a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8996 b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8996 index 166ddcce5..4b01d318d 100644 --- a/baseconfig/arm/arm64/CONFIG_MSM_GCC_8996 +++ b/baseconfig/arm/arm64/CONFIG_MSM_GCC_8996 @@ -1 +1 @@ -CONFIG_MSM_GCC_8996=m +CONFIG_MSM_GCC_8996=y diff --git a/baseconfig/arm/arm64/CONFIG_NET_XGENE_V2 b/baseconfig/arm/arm64/CONFIG_NET_XGENE_V2 new file mode 100644 index 000000000..7d5cbcdbf --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_NET_XGENE_V2 @@ -0,0 +1 @@ +CONFIG_NET_XGENE_V2=m diff --git a/baseconfig/arm/arm64/CONFIG_PHY_QCOM_QMP b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_QMP new file mode 100644 index 000000000..cba57faf8 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_QMP @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_QMP=m diff --git a/baseconfig/arm/arm64/CONFIG_PHY_QCOM_QUSB2 b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_QUSB2 new file mode 100644 index 000000000..6512e59d2 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_QUSB2 @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_QUSB2=m diff --git a/baseconfig/arm/CONFIG_PHY_QCOM_USB_HS b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_USB_HS similarity index 100% rename from baseconfig/arm/CONFIG_PHY_QCOM_USB_HS rename to baseconfig/arm/arm64/CONFIG_PHY_QCOM_USB_HS diff --git a/baseconfig/arm/CONFIG_PHY_QCOM_USB_HSIC b/baseconfig/arm/arm64/CONFIG_PHY_QCOM_USB_HSIC similarity index 100% rename from baseconfig/arm/CONFIG_PHY_QCOM_USB_HSIC rename to baseconfig/arm/arm64/CONFIG_PHY_QCOM_USB_HSIC diff --git a/baseconfig/CONFIG_QCOM_ADSP_PIL b/baseconfig/arm/arm64/CONFIG_QCOM_ADSP_PIL similarity index 100% rename from baseconfig/CONFIG_QCOM_ADSP_PIL rename to baseconfig/arm/arm64/CONFIG_QCOM_ADSP_PIL diff --git a/baseconfig/arm/CONFIG_QCOM_IRQ_COMBINER b/baseconfig/arm/arm64/CONFIG_QCOM_IRQ_COMBINER similarity index 100% rename from baseconfig/arm/CONFIG_QCOM_IRQ_COMBINER rename to baseconfig/arm/arm64/CONFIG_QCOM_IRQ_COMBINER diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_L3_PMU b/baseconfig/arm/arm64/CONFIG_QCOM_L3_PMU new file mode 100644 index 000000000..ed899d66b --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_QCOM_L3_PMU @@ -0,0 +1 @@ +CONFIG_QCOM_L3_PMU=y diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_Q6V5_PIL b/baseconfig/arm/arm64/CONFIG_QCOM_Q6V5_PIL index b749a7daa..18d8fb792 100644 --- a/baseconfig/arm/arm64/CONFIG_QCOM_Q6V5_PIL +++ b/baseconfig/arm/arm64/CONFIG_QCOM_Q6V5_PIL @@ -1 +1 @@ -# CONFIG_QCOM_Q6V5_PIL is not set +CONFIG_QCOM_Q6V5_PIL=m diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_SMD b/baseconfig/arm/arm64/CONFIG_QCOM_SMD deleted file mode 100644 index d43fecfdb..000000000 --- a/baseconfig/arm/arm64/CONFIG_QCOM_SMD +++ /dev/null @@ -1 +0,0 @@ -CONFIG_QCOM_SMD=m diff --git a/baseconfig/arm/arm64/CONFIG_QCOM_WCNSS_PIL b/baseconfig/arm/arm64/CONFIG_QCOM_WCNSS_PIL index bb8c24d61..b13cefb38 100644 --- a/baseconfig/arm/arm64/CONFIG_QCOM_WCNSS_PIL +++ b/baseconfig/arm/arm64/CONFIG_QCOM_WCNSS_PIL @@ -1 +1 @@ -# CONFIG_QCOM_WCNSS_PIL is not set +CONFIG_QCOM_WCNSS_PIL=m diff --git a/baseconfig/arm/CONFIG_REGMAP_SPMI b/baseconfig/arm/arm64/CONFIG_REGMAP_SPMI similarity index 100% rename from baseconfig/arm/CONFIG_REGMAP_SPMI rename to baseconfig/arm/arm64/CONFIG_REGMAP_SPMI diff --git a/baseconfig/arm/arm64/CONFIG_RPMSG b/baseconfig/arm/arm64/CONFIG_RPMSG new file mode 100644 index 000000000..7cc8785d0 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_RPMSG @@ -0,0 +1 @@ +CONFIG_RPMSG=m diff --git a/baseconfig/arm/arm64/CONFIG_RPMSG_QCOM_SMD b/baseconfig/arm/arm64/CONFIG_RPMSG_QCOM_SMD new file mode 100644 index 000000000..f65af3d10 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_RPMSG_QCOM_SMD @@ -0,0 +1 @@ +CONFIG_RPMSG_QCOM_SMD=m diff --git a/baseconfig/arm/arm64/CONFIG_SND_SOC_MSM8916_WCD_ANALOG b/baseconfig/arm/arm64/CONFIG_SND_SOC_MSM8916_WCD_ANALOG new file mode 100644 index 000000000..207a5e523 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SND_SOC_MSM8916_WCD_ANALOG @@ -0,0 +1 @@ +CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m diff --git a/baseconfig/arm/arm64/CONFIG_SND_SOC_MSM8916_WCD_DIGITAL b/baseconfig/arm/arm64/CONFIG_SND_SOC_MSM8916_WCD_DIGITAL new file mode 100644 index 000000000..db12f036e --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SND_SOC_MSM8916_WCD_DIGITAL @@ -0,0 +1 @@ +CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m diff --git a/baseconfig/arm/arm64/CONFIG_SOC_TEGRA_FLOWCTRL b/baseconfig/arm/arm64/CONFIG_SOC_TEGRA_FLOWCTRL new file mode 100644 index 000000000..00413d459 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SOC_TEGRA_FLOWCTRL @@ -0,0 +1 @@ +CONFIG_SOC_TEGRA_FLOWCTRL=y diff --git a/baseconfig/arm/arm64/CONFIG_SPI_XLP b/baseconfig/arm/arm64/CONFIG_SPI_XLP new file mode 100644 index 000000000..6026d5f51 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SPI_XLP @@ -0,0 +1 @@ +CONFIG_SPI_XLP=m diff --git a/baseconfig/arm/CONFIG_SPMI b/baseconfig/arm/arm64/CONFIG_SPMI similarity index 100% rename from baseconfig/arm/CONFIG_SPMI rename to baseconfig/arm/arm64/CONFIG_SPMI diff --git a/baseconfig/arm/arm64/CONFIG_SUN4I_GPADC b/baseconfig/arm/arm64/CONFIG_SUN4I_GPADC new file mode 100644 index 000000000..97139c216 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SUN4I_GPADC @@ -0,0 +1 @@ +CONFIG_SUN4I_GPADC=m diff --git a/baseconfig/arm/arm64/CONFIG_SUN8I_H3_CCU b/baseconfig/arm/arm64/CONFIG_SUN8I_H3_CCU deleted file mode 100644 index 02cfb2c97..000000000 --- a/baseconfig/arm/arm64/CONFIG_SUN8I_H3_CCU +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SUN8I_H3_CCU is not set diff --git a/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_ULPI b/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_ULPI new file mode 100644 index 000000000..d1a5cf9eb --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_ULPI @@ -0,0 +1 @@ +CONFIG_USB_CHIPIDEA_ULPI=y diff --git a/baseconfig/arm/armv7/CONFIG_AHCI_DM816 b/baseconfig/arm/armv7/CONFIG_AHCI_DM816 new file mode 100644 index 000000000..ba4b51891 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_AHCI_DM816 @@ -0,0 +1 @@ +CONFIG_AHCI_DM816=m diff --git a/baseconfig/arm/armv7/CONFIG_AXP20X_ADC b/baseconfig/arm/armv7/CONFIG_AXP20X_ADC new file mode 100644 index 000000000..025239f25 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_AXP20X_ADC @@ -0,0 +1 @@ +CONFIG_AXP20X_ADC=m diff --git a/baseconfig/arm/armv7/CONFIG_BATTERY_AXP20X b/baseconfig/arm/armv7/CONFIG_BATTERY_AXP20X new file mode 100644 index 000000000..75591a277 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_BATTERY_AXP20X @@ -0,0 +1 @@ +CONFIG_BATTERY_AXP20X=m diff --git a/baseconfig/arm/armv7/CONFIG_CRYPTO_DEV_EXYNOS_RNG b/baseconfig/arm/armv7/CONFIG_CRYPTO_DEV_EXYNOS_RNG new file mode 100644 index 000000000..f60ff08ee --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_CRYPTO_DEV_EXYNOS_RNG @@ -0,0 +1 @@ +CONFIG_CRYPTO_DEV_EXYNOS_RNG=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_DW_HDMI_AHB_AUDIO b/baseconfig/arm/armv7/CONFIG_DRM_DW_HDMI_AHB_AUDIO index 679147e29..5c276f1dc 100644 --- a/baseconfig/arm/armv7/CONFIG_DRM_DW_HDMI_AHB_AUDIO +++ b/baseconfig/arm/armv7/CONFIG_DRM_DW_HDMI_AHB_AUDIO @@ -1 +1 @@ -CONFIG_DRM_DW_HDMI_AHB_AUDIO=m +# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_LG_LG4573 b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_LG_LG4573 deleted file mode 100644 index bdb9d96a2..000000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_LG_LG4573 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_LG_LG4573=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 deleted file mode 100644 index 6a1aa6578..000000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SAMSUNG_LD9040 b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SAMSUNG_LD9040 deleted file mode 100644 index aa66847bb..000000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SAMSUNG_LD9040 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_SAMSUNG_LD9040=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 deleted file mode 100644 index 8e8122a2d..000000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 deleted file mode 100644 index e5e36406d..000000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 deleted file mode 100644 index e3649f9de..000000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_SHARP_LS043T1LE01=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SIMPLE b/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SIMPLE deleted file mode 100644 index 1c716c97c..000000000 --- a/baseconfig/arm/armv7/CONFIG_DRM_PANEL_SIMPLE +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL_SIMPLE=m diff --git a/baseconfig/arm/armv7/CONFIG_HW_RANDOM_EXYNOS b/baseconfig/arm/armv7/CONFIG_HW_RANDOM_EXYNOS deleted file mode 100644 index 87c25300c..000000000 --- a/baseconfig/arm/armv7/CONFIG_HW_RANDOM_EXYNOS +++ /dev/null @@ -1 +0,0 @@ -CONFIG_HW_RANDOM_EXYNOS=m diff --git a/baseconfig/arm/armv7/CONFIG_IIO_CROS_EC_BARO b/baseconfig/arm/armv7/CONFIG_IIO_CROS_EC_BARO deleted file mode 100644 index 7b38ce09b..000000000 --- a/baseconfig/arm/armv7/CONFIG_IIO_CROS_EC_BARO +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_IIO_CROS_EC_BARO is not set diff --git a/baseconfig/arm/armv7/CONFIG_MFD_PM8921_CORE b/baseconfig/arm/armv7/CONFIG_MFD_PM8921_CORE deleted file mode 100644 index 226d75be9..000000000 --- a/baseconfig/arm/armv7/CONFIG_MFD_PM8921_CORE +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_MFD_PM8921_CORE is not set diff --git a/baseconfig/arm/armv7/CONFIG_MMA8452 b/baseconfig/arm/armv7/CONFIG_MMA8452 new file mode 100644 index 000000000..44b2d2ae8 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_MMA8452 @@ -0,0 +1 @@ +CONFIG_MMA8452=m diff --git a/baseconfig/arm/armv7/CONFIG_NVMEM_IMX_IIM b/baseconfig/arm/armv7/CONFIG_NVMEM_IMX_IIM new file mode 100644 index 000000000..9407e7a4b --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_NVMEM_IMX_IIM @@ -0,0 +1 @@ +CONFIG_NVMEM_IMX_IIM=m diff --git a/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX b/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX new file mode 100644 index 000000000..b401f79fb --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX @@ -0,0 +1 @@ +# CONFIG_PCI_DRA7XX is not set diff --git a/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX_EP b/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX_EP new file mode 100644 index 000000000..8a6a68062 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX_EP @@ -0,0 +1 @@ +# CONFIG_PCI_DRA7XX_EP is not set diff --git a/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX_HOST b/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX_HOST new file mode 100644 index 000000000..7bbb2fd97 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_PCI_DRA7XX_HOST @@ -0,0 +1 @@ +# CONFIG_PCI_DRA7XX_HOST is not set diff --git a/baseconfig/arm/armv7/CONFIG_QCOM_PM8XXX_XOADC b/baseconfig/arm/armv7/CONFIG_QCOM_PM8XXX_XOADC new file mode 100644 index 000000000..1060913dd --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_QCOM_PM8XXX_XOADC @@ -0,0 +1 @@ +CONFIG_QCOM_PM8XXX_XOADC=m diff --git a/baseconfig/arm/armv7/CONFIG_QCOM_SPMI_TEMP_ALARM b/baseconfig/arm/armv7/CONFIG_QCOM_SPMI_TEMP_ALARM deleted file mode 100644 index 69966daab..000000000 --- a/baseconfig/arm/armv7/CONFIG_QCOM_SPMI_TEMP_ALARM +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_QCOM_SPMI_TEMP_ALARM is not set diff --git a/baseconfig/arm/armv7/CONFIG_REGULATOR_ACT8865 b/baseconfig/arm/armv7/CONFIG_REGULATOR_ACT8865 deleted file mode 100644 index f1e82abd5..000000000 --- a/baseconfig/arm/armv7/CONFIG_REGULATOR_ACT8865 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_REGULATOR_ACT8865 is not set diff --git a/baseconfig/arm/armv7/CONFIG_REGULATOR_FAN53555 b/baseconfig/arm/armv7/CONFIG_REGULATOR_FAN53555 deleted file mode 100644 index 5534cc406..000000000 --- a/baseconfig/arm/armv7/CONFIG_REGULATOR_FAN53555 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_REGULATOR_FAN53555=m diff --git a/baseconfig/arm/armv7/CONFIG_ROCKCHIP_CDN_DP b/baseconfig/arm/armv7/CONFIG_ROCKCHIP_CDN_DP deleted file mode 100644 index 98a696d76..000000000 --- a/baseconfig/arm/armv7/CONFIG_ROCKCHIP_CDN_DP +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_ROCKCHIP_CDN_DP is not set diff --git a/baseconfig/arm/armv7/CONFIG_SND_SOC_MAX98090 b/baseconfig/arm/armv7/CONFIG_SND_SOC_MAX98090 new file mode 100644 index 000000000..c22ad4a46 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SND_SOC_MAX98090 @@ -0,0 +1 @@ +CONFIG_SND_SOC_MAX98090=m diff --git a/baseconfig/arm/armv7/CONFIG_SND_SOC_ODROID b/baseconfig/arm/armv7/CONFIG_SND_SOC_ODROID new file mode 100644 index 000000000..ece6cf56f --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SND_SOC_ODROID @@ -0,0 +1 @@ +CONFIG_SND_SOC_ODROID=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SOC_DRA7XX b/baseconfig/arm/armv7/CONFIG_SOC_DRA7XX similarity index 100% rename from baseconfig/arm/armv7/armv7/CONFIG_SOC_DRA7XX rename to baseconfig/arm/armv7/CONFIG_SOC_DRA7XX diff --git a/baseconfig/arm/armv7/CONFIG_SOC_TEGRA_FLOWCTRL b/baseconfig/arm/armv7/CONFIG_SOC_TEGRA_FLOWCTRL new file mode 100644 index 000000000..00413d459 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SOC_TEGRA_FLOWCTRL @@ -0,0 +1 @@ +CONFIG_SOC_TEGRA_FLOWCTRL=y diff --git a/baseconfig/arm/armv7/CONFIG_SUN4I_GPADC b/baseconfig/arm/armv7/CONFIG_SUN4I_GPADC new file mode 100644 index 000000000..97139c216 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SUN4I_GPADC @@ -0,0 +1 @@ +CONFIG_SUN4I_GPADC=m diff --git a/baseconfig/arm/armv7/CONFIG_SUN8I_H3_CCU b/baseconfig/arm/armv7/CONFIG_SUN8I_H3_CCU deleted file mode 100644 index 542d6fc7d..000000000 --- a/baseconfig/arm/armv7/CONFIG_SUN8I_H3_CCU +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SUN8I_H3_CCU=y diff --git a/baseconfig/arm/armv7/CONFIG_UBIFS_FS b/baseconfig/arm/armv7/CONFIG_UBIFS_FS deleted file mode 100644 index e71980df4..000000000 --- a/baseconfig/arm/armv7/CONFIG_UBIFS_FS +++ /dev/null @@ -1 +0,0 @@ -CONFIG_UBIFS_FS=m diff --git a/baseconfig/arm/armv7/CONFIG_UBIFS_FS_ADVANCED_COMPR b/baseconfig/arm/armv7/CONFIG_UBIFS_FS_ADVANCED_COMPR deleted file mode 100644 index f91c8cd6c..000000000 --- a/baseconfig/arm/armv7/CONFIG_UBIFS_FS_ADVANCED_COMPR +++ /dev/null @@ -1 +0,0 @@ -CONFIG_UBIFS_FS_ADVANCED_COMPR=y diff --git a/baseconfig/arm/armv7/CONFIG_UBIFS_FS_LZO b/baseconfig/arm/armv7/CONFIG_UBIFS_FS_LZO deleted file mode 100644 index e743a6b32..000000000 --- a/baseconfig/arm/armv7/CONFIG_UBIFS_FS_LZO +++ /dev/null @@ -1 +0,0 @@ -CONFIG_UBIFS_FS_LZO=y diff --git a/baseconfig/arm/armv7/CONFIG_UBIFS_FS_ZLIB b/baseconfig/arm/armv7/CONFIG_UBIFS_FS_ZLIB deleted file mode 100644 index 18bffa1f1..000000000 --- a/baseconfig/arm/armv7/CONFIG_UBIFS_FS_ZLIB +++ /dev/null @@ -1 +0,0 @@ -CONFIG_UBIFS_FS_ZLIB=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_APQ_GCC_8084 b/baseconfig/arm/armv7/armv7/CONFIG_APQ_GCC_8084 index 5ce9e62f4..bacb61e5e 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_APQ_GCC_8084 +++ b/baseconfig/arm/armv7/armv7/CONFIG_APQ_GCC_8084 @@ -1 +1 @@ -CONFIG_APQ_GCC_8084=m +CONFIG_APQ_GCC_8084=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_BT_QCOMSMD b/baseconfig/arm/armv7/armv7/CONFIG_BT_QCOMSMD new file mode 100644 index 000000000..9f36fb6a8 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_BT_QCOMSMD @@ -0,0 +1 @@ +CONFIG_BT_QCOMSMD=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_COMMON_CLK_QCOM b/baseconfig/arm/armv7/armv7/CONFIG_COMMON_CLK_QCOM index ec4000095..2b7c64357 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_COMMON_CLK_QCOM +++ b/baseconfig/arm/armv7/armv7/CONFIG_COMMON_CLK_QCOM @@ -1 +1 @@ -CONFIG_COMMON_CLK_QCOM=m +CONFIG_COMMON_CLK_QCOM=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI index e305e243b..87b627906 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI @@ -1 +1 @@ -# CONFIG_DRM_MSM_DSI is not set +CONFIG_DRM_MSM_DSI=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_14NM_PHY b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_14NM_PHY new file mode 100644 index 000000000..397f69094 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_14NM_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_14NM_PHY=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_20NM_PHY b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_20NM_PHY new file mode 100644 index 000000000..7595ae205 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_20NM_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_20NM_PHY=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_28NM_8960_PHY b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_28NM_8960_PHY new file mode 100644 index 000000000..5d86a4597 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_28NM_8960_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_28NM_8960_PHY=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_28NM_PHY b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_28NM_PHY new file mode 100644 index 000000000..ea1c4f918 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_28NM_PHY @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_28NM_PHY=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_PLL b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_PLL new file mode 100644 index 000000000..16ac280e6 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MSM_DSI_PLL @@ -0,0 +1 @@ +CONFIG_DRM_MSM_DSI_PLL=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_DRM_MXSFB b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MXSFB new file mode 100644 index 000000000..e24a8952c --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_DRM_MXSFB @@ -0,0 +1 @@ +CONFIG_DRM_MXSFB=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_EXTCON_QCOM_SPMI_MISC b/baseconfig/arm/armv7/armv7/CONFIG_EXTCON_QCOM_SPMI_MISC new file mode 100644 index 000000000..b52487909 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_EXTCON_QCOM_SPMI_MISC @@ -0,0 +1 @@ +CONFIG_EXTCON_QCOM_SPMI_MISC=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_IMX7_PM_DOMAINS b/baseconfig/arm/armv7/armv7/CONFIG_IMX7_PM_DOMAINS new file mode 100644 index 000000000..33e5c6a93 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_IMX7_PM_DOMAINS @@ -0,0 +1 @@ +CONFIG_IMX7_PM_DOMAINS=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8660 b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8660 index 457d918ff..9effe8611 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8660 +++ b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8660 @@ -1 +1 @@ -CONFIG_MSM_GCC_8660=m +CONFIG_MSM_GCC_8660=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8960 b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8960 index a492a6821..03ba44b34 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8960 +++ b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8960 @@ -1 +1 @@ -CONFIG_MSM_GCC_8960=m +CONFIG_MSM_GCC_8960=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8974 b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8974 index 62f48a9e8..8ffbd8055 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8974 +++ b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8974 @@ -1 +1 @@ -CONFIG_MSM_GCC_8974=m +CONFIG_MSM_GCC_8974=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8996 b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8996 index 166ddcce5..4b01d318d 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8996 +++ b/baseconfig/arm/armv7/armv7/CONFIG_MSM_GCC_8996 @@ -1 +1 @@ -CONFIG_MSM_GCC_8996=m +CONFIG_MSM_GCC_8996=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PCI_DRA7XX b/baseconfig/arm/armv7/armv7/CONFIG_PCI_DRA7XX deleted file mode 100644 index 7f8a147e3..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_PCI_DRA7XX +++ /dev/null @@ -1 +0,0 @@ -CONFIG_PCI_DRA7XX=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_QMP b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_QMP new file mode 100644 index 000000000..cba57faf8 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_QMP @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_QMP=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_QUSB2 b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_QUSB2 new file mode 100644 index 000000000..6512e59d2 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_QUSB2 @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_QUSB2=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_USB_HS b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_USB_HS new file mode 100644 index 000000000..61e98f856 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_USB_HS @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_USB_HS=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_USB_HSIC b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_USB_HSIC new file mode 100644 index 000000000..0b25aa233 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_PHY_QCOM_USB_HSIC @@ -0,0 +1 @@ +CONFIG_PHY_QCOM_USB_HSIC=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_ADSP_PIL b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_ADSP_PIL new file mode 100644 index 000000000..0aa258124 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_ADSP_PIL @@ -0,0 +1 @@ +CONFIG_QCOM_ADSP_PIL=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_Q6V5_PIL b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_Q6V5_PIL index b749a7daa..18d8fb792 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_Q6V5_PIL +++ b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_Q6V5_PIL @@ -1 +1 @@ -# CONFIG_QCOM_Q6V5_PIL is not set +CONFIG_QCOM_Q6V5_PIL=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_SMD b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_SMD deleted file mode 100644 index d43fecfdb..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_SMD +++ /dev/null @@ -1 +0,0 @@ -CONFIG_QCOM_SMD=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_SPMI_TEMP_ALARM b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_SPMI_TEMP_ALARM new file mode 100644 index 000000000..7155372b9 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_SPMI_TEMP_ALARM @@ -0,0 +1 @@ +CONFIG_QCOM_SPMI_TEMP_ALARM=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_WCNSS_PIL b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_WCNSS_PIL index bb8c24d61..b13cefb38 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_QCOM_WCNSS_PIL +++ b/baseconfig/arm/armv7/armv7/CONFIG_QCOM_WCNSS_PIL @@ -1 +1 @@ -# CONFIG_QCOM_WCNSS_PIL is not set +CONFIG_QCOM_WCNSS_PIL=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_REGMAP_SPMI b/baseconfig/arm/armv7/armv7/CONFIG_REGMAP_SPMI new file mode 100644 index 000000000..0c319596b --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_REGMAP_SPMI @@ -0,0 +1 @@ +CONFIG_REGMAP_SPMI=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_REGULATOR_FAN53555 b/baseconfig/arm/armv7/armv7/CONFIG_REGULATOR_FAN53555 deleted file mode 100644 index 5534cc406..000000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_REGULATOR_FAN53555 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_REGULATOR_FAN53555=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_RPMSG b/baseconfig/arm/armv7/armv7/CONFIG_RPMSG new file mode 100644 index 000000000..7cc8785d0 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_RPMSG @@ -0,0 +1 @@ +CONFIG_RPMSG=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_RPMSG_QCOM_SMD b/baseconfig/arm/armv7/armv7/CONFIG_RPMSG_QCOM_SMD new file mode 100644 index 000000000..f65af3d10 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_RPMSG_QCOM_SMD @@ -0,0 +1 @@ +CONFIG_RPMSG_QCOM_SMD=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SERIAL_UARTLITE_NR_UARTS b/baseconfig/arm/armv7/armv7/CONFIG_SERIAL_UARTLITE_NR_UARTS new file mode 100644 index 000000000..37161086e --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_SERIAL_UARTLITE_NR_UARTS @@ -0,0 +1 @@ +CONFIG_SERIAL_UARTLITE_NR_UARTS=1 diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_MSM8916_WCD_ANALOG b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_MSM8916_WCD_ANALOG new file mode 100644 index 000000000..f862f05a7 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_MSM8916_WCD_ANALOG @@ -0,0 +1 @@ +CONFIG_SND_SOC_MSM8916_WCD_ANALOg=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_MSM8916_WCD_DIGITAL b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_MSM8916_WCD_DIGITAL new file mode 100644 index 000000000..db12f036e --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_MSM8916_WCD_DIGITAL @@ -0,0 +1 @@ +CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SPMI b/baseconfig/arm/armv7/armv7/CONFIG_SPMI new file mode 100644 index 000000000..b340c89e6 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_SPMI @@ -0,0 +1 @@ +CONFIG_SPMI=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_ULPI b/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_ULPI new file mode 100644 index 000000000..d1a5cf9eb --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_ULPI @@ -0,0 +1 @@ +CONFIG_USB_CHIPIDEA_ULPI=y diff --git a/baseconfig/arm/armv7/lpae/CONFIG_SOC_DRA7XX b/baseconfig/arm/armv7/lpae/CONFIG_SOC_DRA7XX deleted file mode 100644 index a11bb6971..000000000 --- a/baseconfig/arm/armv7/lpae/CONFIG_SOC_DRA7XX +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SOC_DRA7XX is not set diff --git a/baseconfig/powerpc/CONFIG_CRYPTO_CRCT10DIF_VPMSUM b/baseconfig/powerpc/CONFIG_CRYPTO_CRCT10DIF_VPMSUM new file mode 100644 index 000000000..eb0464d08 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_CRYPTO_CRCT10DIF_VPMSUM @@ -0,0 +1 @@ +CONFIG_CRYPTO_CRCT10DIF_VPMSUM=m diff --git a/baseconfig/powerpc/CONFIG_CRYPTO_VPMSUM_TESTER b/baseconfig/powerpc/CONFIG_CRYPTO_VPMSUM_TESTER new file mode 100644 index 000000000..a3acefe62 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_CRYPTO_VPMSUM_TESTER @@ -0,0 +1 @@ +# CONFIG_CRYPTO_VPMSUM_TESTER is not set diff --git a/baseconfig/powerpc/CONFIG_PCI_MSI_IRQ_DOMAIN b/baseconfig/powerpc/CONFIG_PCI_MSI_IRQ_DOMAIN new file mode 100644 index 000000000..2d1ad5bb1 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_PCI_MSI_IRQ_DOMAIN @@ -0,0 +1 @@ +# CONFIG_PCI_MSI_IRQ_DOMAIN is not set diff --git a/baseconfig/powerpc/CONFIG_PPC_CPUFEATURES_ENABLE_UNKNOWN b/baseconfig/powerpc/CONFIG_PPC_CPUFEATURES_ENABLE_UNKNOWN new file mode 100644 index 000000000..46354e6a9 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_PPC_CPUFEATURES_ENABLE_UNKNOWN @@ -0,0 +1 @@ +CONFIG_PPC_CPUFEATURES_ENABLE_UNKNOWN=y diff --git a/baseconfig/powerpc/CONFIG_PPC_DT_CPU_FTRS b/baseconfig/powerpc/CONFIG_PPC_DT_CPU_FTRS new file mode 100644 index 000000000..aa61b1ff3 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_PPC_DT_CPU_FTRS @@ -0,0 +1 @@ +CONFIG_PPC_DT_CPU_FTRS=y diff --git a/baseconfig/powerpc/CONFIG_SPAPR_TCE_IOMMU b/baseconfig/powerpc/CONFIG_SPAPR_TCE_IOMMU index da6fd2882..ffe83031d 100644 --- a/baseconfig/powerpc/CONFIG_SPAPR_TCE_IOMMU +++ b/baseconfig/powerpc/CONFIG_SPAPR_TCE_IOMMU @@ -1 +1 @@ -# CONFIG_SPAPR_TCE_IOMMU is not set +CONFIG_SPAPR_TCE_IOMMU=y diff --git a/baseconfig/powerpc/CONFIG_USB_OHCI_HCD_PCI b/baseconfig/powerpc/CONFIG_USB_OHCI_HCD_PCI deleted file mode 100644 index a78b62cb5..000000000 --- a/baseconfig/powerpc/CONFIG_USB_OHCI_HCD_PCI +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_OHCI_HCD_PCI=y diff --git a/baseconfig/powerpc/CONFIG_VFIO_IOMMU_TYPE1 b/baseconfig/powerpc/CONFIG_VFIO_IOMMU_TYPE1 new file mode 100644 index 000000000..9f1df8c24 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_VFIO_IOMMU_TYPE1 @@ -0,0 +1 @@ +# CONFIG_VFIO_IOMMU_TYPE1 is not set diff --git a/baseconfig/s390x/CONFIG_ARCH_RANDOM b/baseconfig/s390x/CONFIG_ARCH_RANDOM new file mode 100644 index 000000000..51658fe1c --- /dev/null +++ b/baseconfig/s390x/CONFIG_ARCH_RANDOM @@ -0,0 +1 @@ +CONFIG_ARCH_RANDOM=y diff --git a/baseconfig/s390x/CONFIG_CRASH_DUMP b/baseconfig/s390x/CONFIG_CRASH_DUMP deleted file mode 100644 index 84bb04c03..000000000 --- a/baseconfig/s390x/CONFIG_CRASH_DUMP +++ /dev/null @@ -1 +0,0 @@ -CONFIG_CRASH_DUMP=y diff --git a/baseconfig/s390x/CONFIG_GENERIC_PHY b/baseconfig/s390x/CONFIG_GENERIC_PHY new file mode 100644 index 000000000..40cd1a4f5 --- /dev/null +++ b/baseconfig/s390x/CONFIG_GENERIC_PHY @@ -0,0 +1 @@ +CONFIG_GENERIC_PHY=y diff --git a/baseconfig/s390x/CONFIG_HW_RANDOM_S390 b/baseconfig/s390x/CONFIG_HW_RANDOM_S390 new file mode 100644 index 000000000..7108db8ff --- /dev/null +++ b/baseconfig/s390x/CONFIG_HW_RANDOM_S390 @@ -0,0 +1 @@ +CONFIG_HW_RANDOM_S390=m diff --git a/baseconfig/s390x/CONFIG_MAX_PHYSMEM_BITS b/baseconfig/s390x/CONFIG_MAX_PHYSMEM_BITS new file mode 100644 index 000000000..6ace7a163 --- /dev/null +++ b/baseconfig/s390x/CONFIG_MAX_PHYSMEM_BITS @@ -0,0 +1 @@ +CONFIG_MAX_PHYSMEM_BITS=46 diff --git a/baseconfig/s390x/CONFIG_MDIO_DEVICE b/baseconfig/s390x/CONFIG_MDIO_DEVICE new file mode 100644 index 000000000..67ac6bad8 --- /dev/null +++ b/baseconfig/s390x/CONFIG_MDIO_DEVICE @@ -0,0 +1 @@ +CONFIG_MDIO_DEVICE=m diff --git a/baseconfig/s390x/CONFIG_PCI_MSI_IRQ_DOMAIN b/baseconfig/s390x/CONFIG_PCI_MSI_IRQ_DOMAIN new file mode 100644 index 000000000..2d1ad5bb1 --- /dev/null +++ b/baseconfig/s390x/CONFIG_PCI_MSI_IRQ_DOMAIN @@ -0,0 +1 @@ +# CONFIG_PCI_MSI_IRQ_DOMAIN is not set diff --git a/baseconfig/s390x/CONFIG_S390_CCW_IOMMU b/baseconfig/s390x/CONFIG_S390_CCW_IOMMU new file mode 100644 index 000000000..7dd58dfa7 --- /dev/null +++ b/baseconfig/s390x/CONFIG_S390_CCW_IOMMU @@ -0,0 +1 @@ +CONFIG_S390_CCW_IOMMU=y diff --git a/baseconfig/s390x/CONFIG_VFIO_CCW b/baseconfig/s390x/CONFIG_VFIO_CCW new file mode 100644 index 000000000..15f7493a4 --- /dev/null +++ b/baseconfig/s390x/CONFIG_VFIO_CCW @@ -0,0 +1 @@ +CONFIG_VFIO_CCW=m diff --git a/baseconfig/x86/CONFIG_DELL_WMI_LED b/baseconfig/x86/CONFIG_DELL_WMI_LED new file mode 100644 index 000000000..23d945e59 --- /dev/null +++ b/baseconfig/x86/CONFIG_DELL_WMI_LED @@ -0,0 +1 @@ +CONFIG_DELL_WMI_LED=m diff --git a/baseconfig/x86/CONFIG_DRM_I915_DEBUG_VBLANK_EVADE b/baseconfig/x86/CONFIG_DRM_I915_DEBUG_VBLANK_EVADE new file mode 100644 index 000000000..d48518abd --- /dev/null +++ b/baseconfig/x86/CONFIG_DRM_I915_DEBUG_VBLANK_EVADE @@ -0,0 +1 @@ +# CONFIG_DRM_I915_DEBUG_VBLANK_EVADE is not set diff --git a/baseconfig/arm/armv7/CONFIG_DRM_PANEL b/baseconfig/x86/CONFIG_DRM_PANEL similarity index 100% rename from baseconfig/arm/armv7/CONFIG_DRM_PANEL rename to baseconfig/x86/CONFIG_DRM_PANEL diff --git a/baseconfig/x86/CONFIG_DRM_PANEL_LVDS b/baseconfig/x86/CONFIG_DRM_PANEL_LVDS new file mode 100644 index 000000000..6d4d3c7c6 --- /dev/null +++ b/baseconfig/x86/CONFIG_DRM_PANEL_LVDS @@ -0,0 +1 @@ +CONFIG_DRM_PANEL_LVDS=m diff --git a/baseconfig/CONFIG_EXTCON_INTEL_INT3496 b/baseconfig/x86/CONFIG_EXTCON_INTEL_INT3496 similarity index 100% rename from baseconfig/CONFIG_EXTCON_INTEL_INT3496 rename to baseconfig/x86/CONFIG_EXTCON_INTEL_INT3496 diff --git a/baseconfig/x86/CONFIG_INTEL_ATOMISP b/baseconfig/x86/CONFIG_INTEL_ATOMISP new file mode 100644 index 000000000..fde06c533 --- /dev/null +++ b/baseconfig/x86/CONFIG_INTEL_ATOMISP @@ -0,0 +1 @@ +# CONFIG_INTEL_ATOMISP is not set diff --git a/baseconfig/x86/CONFIG_INTEL_CHT_INT33FE b/baseconfig/x86/CONFIG_INTEL_CHT_INT33FE new file mode 100644 index 000000000..7657a9a07 --- /dev/null +++ b/baseconfig/x86/CONFIG_INTEL_CHT_INT33FE @@ -0,0 +1 @@ +CONFIG_INTEL_CHT_INT33FE=m diff --git a/baseconfig/x86/CONFIG_INTEL_INT0002_VGPIO b/baseconfig/x86/CONFIG_INTEL_INT0002_VGPIO new file mode 100644 index 000000000..f416f2ddc --- /dev/null +++ b/baseconfig/x86/CONFIG_INTEL_INT0002_VGPIO @@ -0,0 +1 @@ +# CONFIG_INTEL_INT0002_VGPIO is not set diff --git a/baseconfig/x86/CONFIG_INTEL_SOC_PMIC_CHTWC b/baseconfig/x86/CONFIG_INTEL_SOC_PMIC_CHTWC new file mode 100644 index 000000000..2d14c0346 --- /dev/null +++ b/baseconfig/x86/CONFIG_INTEL_SOC_PMIC_CHTWC @@ -0,0 +1 @@ +# CONFIG_INTEL_SOC_PMIC_CHTWC is not set diff --git a/baseconfig/x86/CONFIG_LOAD_UEFI_KEYS b/baseconfig/x86/CONFIG_LOAD_UEFI_KEYS new file mode 100644 index 000000000..22502e981 --- /dev/null +++ b/baseconfig/x86/CONFIG_LOAD_UEFI_KEYS @@ -0,0 +1 @@ +CONFIG_LOAD_UEFI_KEYS=y diff --git a/baseconfig/x86/CONFIG_MODULE_SIG_UEFI b/baseconfig/x86/CONFIG_MODULE_SIG_UEFI deleted file mode 100644 index c2bb7cecf..000000000 --- a/baseconfig/x86/CONFIG_MODULE_SIG_UEFI +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MODULE_SIG_UEFI=y diff --git a/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH b/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH new file mode 100644 index 000000000..0697694f9 --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH @@ -0,0 +1 @@ +CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH=m diff --git a/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH b/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH new file mode 100644 index 000000000..db07e5fb0 --- /dev/null +++ b/baseconfig/x86/CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH @@ -0,0 +1 @@ +CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH=m diff --git a/baseconfig/x86/CONFIG_XEN_DOM0 b/baseconfig/x86/CONFIG_XEN_DOM0 new file mode 100644 index 000000000..c5cb5d24a --- /dev/null +++ b/baseconfig/x86/CONFIG_XEN_DOM0 @@ -0,0 +1 @@ +CONFIG_XEN_DOM0=y diff --git a/baseconfig/x86/CONFIG_XEN_PV b/baseconfig/x86/CONFIG_XEN_PV new file mode 100644 index 000000000..89203e84e --- /dev/null +++ b/baseconfig/x86/CONFIG_XEN_PV @@ -0,0 +1 @@ +CONFIG_XEN_PV=y diff --git a/baseconfig/x86/CONFIG_XEN_PVHVM b/baseconfig/x86/CONFIG_XEN_PVHVM new file mode 100644 index 000000000..be722d220 --- /dev/null +++ b/baseconfig/x86/CONFIG_XEN_PVHVM @@ -0,0 +1 @@ +CONFIG_XEN_PVHVM=y diff --git a/baseconfig/x86/i686/CONFIG_DRM_PANEL b/baseconfig/x86/i686/CONFIG_DRM_PANEL deleted file mode 100644 index de8a9c247..000000000 --- a/baseconfig/x86/i686/CONFIG_DRM_PANEL +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL=y diff --git a/baseconfig/x86/CONFIG_EDAC_AMD76X b/baseconfig/x86/i686/CONFIG_EDAC_AMD76X similarity index 100% rename from baseconfig/x86/CONFIG_EDAC_AMD76X rename to baseconfig/x86/i686/CONFIG_EDAC_AMD76X diff --git a/baseconfig/x86/CONFIG_EDAC_E7XXX b/baseconfig/x86/i686/CONFIG_EDAC_E7XXX similarity index 100% rename from baseconfig/x86/CONFIG_EDAC_E7XXX rename to baseconfig/x86/i686/CONFIG_EDAC_E7XXX diff --git a/baseconfig/x86/CONFIG_EDAC_I82860 b/baseconfig/x86/i686/CONFIG_EDAC_I82860 similarity index 100% rename from baseconfig/x86/CONFIG_EDAC_I82860 rename to baseconfig/x86/i686/CONFIG_EDAC_I82860 diff --git a/baseconfig/x86/CONFIG_EDAC_I82875P b/baseconfig/x86/i686/CONFIG_EDAC_I82875P similarity index 100% rename from baseconfig/x86/CONFIG_EDAC_I82875P rename to baseconfig/x86/i686/CONFIG_EDAC_I82875P diff --git a/baseconfig/x86/CONFIG_EDAC_R82600 b/baseconfig/x86/i686/CONFIG_EDAC_R82600 similarity index 100% rename from baseconfig/x86/CONFIG_EDAC_R82600 rename to baseconfig/x86/i686/CONFIG_EDAC_R82600 diff --git a/baseconfig/x86/i686/CONFIG_EDAC_SBRIDGE b/baseconfig/x86/i686/CONFIG_EDAC_SBRIDGE deleted file mode 100644 index 8ffe20d85..000000000 --- a/baseconfig/x86/i686/CONFIG_EDAC_SBRIDGE +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_EDAC_SBRIDGE is not set diff --git a/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL b/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL deleted file mode 100644 index de8a9c247..000000000 --- a/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL=y diff --git a/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 b/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 deleted file mode 100644 index 9d584f6ab..000000000 --- a/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set diff --git a/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 b/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 deleted file mode 100644 index 64dedb057..000000000 --- a/baseconfig/x86/i686PAE/CONFIG_DRM_PANEL_SHARP_LS043T1LE01 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set diff --git a/baseconfig/x86/i686PAE/CONFIG_EDAC_AMD76X b/baseconfig/x86/i686PAE/CONFIG_EDAC_AMD76X new file mode 100644 index 000000000..fe5952e70 --- /dev/null +++ b/baseconfig/x86/i686PAE/CONFIG_EDAC_AMD76X @@ -0,0 +1 @@ +CONFIG_EDAC_AMD76X=m diff --git a/baseconfig/x86/i686PAE/CONFIG_EDAC_E7XXX b/baseconfig/x86/i686PAE/CONFIG_EDAC_E7XXX new file mode 100644 index 000000000..0322ddb69 --- /dev/null +++ b/baseconfig/x86/i686PAE/CONFIG_EDAC_E7XXX @@ -0,0 +1 @@ +CONFIG_EDAC_E7XXX=m diff --git a/baseconfig/x86/i686PAE/CONFIG_EDAC_I82860 b/baseconfig/x86/i686PAE/CONFIG_EDAC_I82860 new file mode 100644 index 000000000..5e132db1a --- /dev/null +++ b/baseconfig/x86/i686PAE/CONFIG_EDAC_I82860 @@ -0,0 +1 @@ +CONFIG_EDAC_I82860=m diff --git a/baseconfig/x86/i686PAE/CONFIG_EDAC_I82875P b/baseconfig/x86/i686PAE/CONFIG_EDAC_I82875P new file mode 100644 index 000000000..dbe32d406 --- /dev/null +++ b/baseconfig/x86/i686PAE/CONFIG_EDAC_I82875P @@ -0,0 +1 @@ +CONFIG_EDAC_I82875P=m diff --git a/baseconfig/x86/i686PAE/CONFIG_EDAC_R82600 b/baseconfig/x86/i686PAE/CONFIG_EDAC_R82600 new file mode 100644 index 000000000..93a01e506 --- /dev/null +++ b/baseconfig/x86/i686PAE/CONFIG_EDAC_R82600 @@ -0,0 +1 @@ +CONFIG_EDAC_R82600=m diff --git a/baseconfig/x86/i686PAE/CONFIG_EDAC_SBRIDGE b/baseconfig/x86/i686PAE/CONFIG_EDAC_SBRIDGE deleted file mode 100644 index 8ffe20d85..000000000 --- a/baseconfig/x86/i686PAE/CONFIG_EDAC_SBRIDGE +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_EDAC_SBRIDGE is not set diff --git a/baseconfig/x86/x86_64/CONFIG_AK8975 b/baseconfig/x86/x86_64/CONFIG_AK8975 new file mode 100644 index 000000000..547c21a99 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AK8975 @@ -0,0 +1 @@ +CONFIG_AK8975=m diff --git a/baseconfig/x86/x86_64/CONFIG_AXP20X_ADC b/baseconfig/x86/x86_64/CONFIG_AXP20X_ADC new file mode 100644 index 000000000..0960ee661 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AXP20X_ADC @@ -0,0 +1 @@ +# CONFIG_AXP20X_ADC is not set diff --git a/baseconfig/x86/x86_64/CONFIG_AXP20X_POWER b/baseconfig/x86/x86_64/CONFIG_AXP20X_POWER new file mode 100644 index 000000000..e02cee707 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AXP20X_POWER @@ -0,0 +1 @@ +# CONFIG_AXP20X_POWER is not set diff --git a/baseconfig/x86/x86_64/CONFIG_AXP288_ADC b/baseconfig/x86/x86_64/CONFIG_AXP288_ADC new file mode 100644 index 000000000..e138f36af --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AXP288_ADC @@ -0,0 +1 @@ +CONFIG_AXP288_ADC=m diff --git a/baseconfig/x86/x86_64/CONFIG_AXP288_CHARGER b/baseconfig/x86/x86_64/CONFIG_AXP288_CHARGER new file mode 100644 index 000000000..0418f962c --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AXP288_CHARGER @@ -0,0 +1 @@ +CONFIG_AXP288_CHARGER=m diff --git a/baseconfig/x86/x86_64/CONFIG_AXP288_FUEL_GAUGE b/baseconfig/x86/x86_64/CONFIG_AXP288_FUEL_GAUGE new file mode 100644 index 000000000..e171b954b --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AXP288_FUEL_GAUGE @@ -0,0 +1 @@ +CONFIG_AXP288_FUEL_GAUGE=m diff --git a/baseconfig/x86/x86_64/CONFIG_BATTERY_MAX17042 b/baseconfig/x86/x86_64/CONFIG_BATTERY_MAX17042 new file mode 100644 index 000000000..669e6ac2e --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_BATTERY_MAX17042 @@ -0,0 +1 @@ +CONFIG_BATTERY_MAX17042=m diff --git a/baseconfig/x86/x86_64/CONFIG_CHARGER_BQ24190 b/baseconfig/x86/x86_64/CONFIG_CHARGER_BQ24190 new file mode 100644 index 000000000..3128bb676 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_CHARGER_BQ24190 @@ -0,0 +1 @@ +CONFIG_CHARGER_BQ24190=m diff --git a/baseconfig/x86/x86_64/CONFIG_CHT_WC_PMIC_OPREGION b/baseconfig/x86/x86_64/CONFIG_CHT_WC_PMIC_OPREGION new file mode 100644 index 000000000..3aa5a5f70 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_CHT_WC_PMIC_OPREGION @@ -0,0 +1 @@ +CONFIG_CHT_WC_PMIC_OPREGION=y diff --git a/baseconfig/x86/x86_64/CONFIG_DRM_PANEL b/baseconfig/x86/x86_64/CONFIG_DRM_PANEL deleted file mode 100644 index de8a9c247..000000000 --- a/baseconfig/x86/x86_64/CONFIG_DRM_PANEL +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_PANEL=y diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON b/baseconfig/x86/x86_64/CONFIG_EXTCON new file mode 100644 index 000000000..0a7190c08 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EXTCON @@ -0,0 +1 @@ +CONFIG_EXTCON=m diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_AXP288 b/baseconfig/x86/x86_64/CONFIG_EXTCON_AXP288 new file mode 100644 index 000000000..7fadeb58d --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_AXP288 @@ -0,0 +1 @@ +CONFIG_EXTCON_AXP288=m diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_GPIO b/baseconfig/x86/x86_64/CONFIG_EXTCON_GPIO new file mode 100644 index 000000000..87ca2bd05 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_GPIO @@ -0,0 +1 @@ +# CONFIG_EXTCON_GPIO is not set diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_INTEL_CHT_WC b/baseconfig/x86/x86_64/CONFIG_EXTCON_INTEL_CHT_WC new file mode 100644 index 000000000..06e0472e8 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_INTEL_CHT_WC @@ -0,0 +1 @@ +CONFIG_EXTCON_INTEL_CHT_WC=m diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_MAX3355 b/baseconfig/x86/x86_64/CONFIG_EXTCON_MAX3355 new file mode 100644 index 000000000..680b5a774 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_MAX3355 @@ -0,0 +1 @@ +# CONFIG_EXTCON_MAX3355 is not set diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_RT8973A b/baseconfig/x86/x86_64/CONFIG_EXTCON_RT8973A new file mode 100644 index 000000000..e5f7236c9 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_RT8973A @@ -0,0 +1 @@ +# CONFIG_EXTCON_RT8973A is not set diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_SM5502 b/baseconfig/x86/x86_64/CONFIG_EXTCON_SM5502 new file mode 100644 index 000000000..916994aa9 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_SM5502 @@ -0,0 +1 @@ +# CONFIG_EXTCON_SM5502 is not set diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_USB_GPIO b/baseconfig/x86/x86_64/CONFIG_EXTCON_USB_GPIO new file mode 100644 index 000000000..7a0c9af30 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_USB_GPIO @@ -0,0 +1 @@ +# CONFIG_EXTCON_USB_GPIO is not set diff --git a/baseconfig/x86/x86_64/CONFIG_GPIO_AXP209 b/baseconfig/x86/x86_64/CONFIG_GPIO_AXP209 new file mode 100644 index 000000000..c71682292 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_GPIO_AXP209 @@ -0,0 +1 @@ +# CONFIG_GPIO_AXP209 is not set diff --git a/baseconfig/x86/x86_64/CONFIG_I2C_CHT_WC b/baseconfig/x86/x86_64/CONFIG_I2C_CHT_WC new file mode 100644 index 000000000..f656e03fc --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_I2C_CHT_WC @@ -0,0 +1 @@ +CONFIG_I2C_CHT_WC=m diff --git a/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_CORE b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_CORE new file mode 100644 index 000000000..f9cdc633b --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_CORE @@ -0,0 +1 @@ +CONFIG_I2C_DESIGNWARE_CORE=y diff --git a/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PCI b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PCI new file mode 100644 index 000000000..6103f947e --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PCI @@ -0,0 +1 @@ +CONFIG_I2C_DESIGNWARE_PCI=y diff --git a/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PLATFORM b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PLATFORM new file mode 100644 index 000000000..3d50a3e8a --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PLATFORM @@ -0,0 +1 @@ +CONFIG_I2C_DESIGNWARE_PLATFORM=y diff --git a/baseconfig/x86/x86_64/CONFIG_INFINIBAND_OPA_VNIC b/baseconfig/x86/x86_64/CONFIG_INFINIBAND_OPA_VNIC new file mode 100644 index 000000000..d79565e48 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INFINIBAND_OPA_VNIC @@ -0,0 +1 @@ +CONFIG_INFINIBAND_OPA_VNIC=m diff --git a/baseconfig/x86/x86_64/CONFIG_INPUT_AXP20X_PEK b/baseconfig/x86/x86_64/CONFIG_INPUT_AXP20X_PEK new file mode 100644 index 000000000..e2fbdf907 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INPUT_AXP20X_PEK @@ -0,0 +1 @@ +CONFIG_INPUT_AXP20X_PEK=m diff --git a/baseconfig/x86/x86_64/CONFIG_INTEL_INT0002_VGPIO b/baseconfig/x86/x86_64/CONFIG_INTEL_INT0002_VGPIO new file mode 100644 index 000000000..7ab08bb0e --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INTEL_INT0002_VGPIO @@ -0,0 +1 @@ +CONFIG_INTEL_INT0002_VGPIO=m diff --git a/baseconfig/x86/x86_64/CONFIG_INTEL_SOC_PMIC_CHTWC b/baseconfig/x86/x86_64/CONFIG_INTEL_SOC_PMIC_CHTWC new file mode 100644 index 000000000..2f8920510 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INTEL_SOC_PMIC_CHTWC @@ -0,0 +1 @@ +CONFIG_INTEL_SOC_PMIC_CHTWC=y diff --git a/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_I2C b/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_I2C new file mode 100644 index 000000000..8ec049b05 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_I2C @@ -0,0 +1 @@ +CONFIG_INV_MPU6050_I2C=m diff --git a/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_IIO b/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_IIO new file mode 100644 index 000000000..ae4889d92 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_IIO @@ -0,0 +1 @@ +CONFIG_INV_MPU6050_IIO=m diff --git a/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X b/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X new file mode 100644 index 000000000..ada79c0d1 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X @@ -0,0 +1 @@ +CONFIG_MFD_AXP20X=y diff --git a/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X_I2C b/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X_I2C new file mode 100644 index 000000000..22c60295b --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X_I2C @@ -0,0 +1 @@ +CONFIG_MFD_AXP20X_I2C=y diff --git a/baseconfig/x86/x86_64/CONFIG_NR_DEV_DAX b/baseconfig/x86/x86_64/CONFIG_NR_DEV_DAX deleted file mode 100644 index 3fd0f86b1..000000000 --- a/baseconfig/x86/x86_64/CONFIG_NR_DEV_DAX +++ /dev/null @@ -1 +0,0 @@ -CONFIG_NR_DEV_DAX=32768 diff --git a/baseconfig/x86/x86_64/CONFIG_SILEAD_DMI b/baseconfig/x86/x86_64/CONFIG_SILEAD_DMI new file mode 100644 index 000000000..25b017354 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_SILEAD_DMI @@ -0,0 +1 @@ +CONFIG_SILEAD_DMI=y diff --git a/baseconfig/x86/x86_64/CONFIG_USB_XHCI_PLATFORM b/baseconfig/x86/x86_64/CONFIG_USB_XHCI_PLATFORM new file mode 100644 index 000000000..060ebfc94 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_USB_XHCI_PLATFORM @@ -0,0 +1 @@ +CONFIG_USB_XHCI_PLATFORM=m diff --git a/baseconfig/x86/x86_64/CONFIG_XPOWER_PMIC_OPREGION b/baseconfig/x86/x86_64/CONFIG_XPOWER_PMIC_OPREGION new file mode 100644 index 000000000..8c98df142 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_XPOWER_PMIC_OPREGION @@ -0,0 +1 @@ +CONFIG_XPOWER_PMIC_OPREGION=y diff --git a/bcm2837-initial-support.patch b/bcm2837-initial-support.patch index d18446d2c..021ae1069 100644 --- a/bcm2837-initial-support.patch +++ b/bcm2837-initial-support.patch @@ -1,19 +1,19 @@ -From patchwork Wed Feb 8 22:40:24 2017 +From patchwork Tue Apr 25 16:45:08 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit -Subject: ARM: dts: Add devicetree for the Raspberry Pi 3, for arm32 (v3) +Subject: ARM: dts: Add devicetree for the Raspberry Pi 3, for arm32 (v6) From: Eric Anholt -X-Patchwork-Id: 9563699 -Message-Id: <20170208224024.30415-1-eric@anholt.net> -To: Florian Fainelli , Rob Herring , +X-Patchwork-Id: 9698781 +Message-Id: <20170425164508.32242-1-eric@anholt.net> +To: Lee Jones , Florian Fainelli , + Olof Johansson , Rob Herring , Mark Rutland , devicetree@vger.kernel.org -Cc: Stephen Warren , Lee Jones , - linux-kernel@vger.kernel.org, Eric Anholt , - bcm-kernel-feedback-list@broadcom.com, - linux-rpi-kernel@lists.infradead.org, - linux-arm-kernel@lists.infradead.org, Gerd Hoffmann -Date: Wed, 8 Feb 2017 14:40:24 -0800 +Cc: Stefan Wahren , linux-kernel@vger.kernel.org, + Eric Anholt , bcm-kernel-feedback-list@broadcom.com, + Gerd Hoffmann , linux-arm-kernel@lists.infradead.org, + linux-rpi-kernel@lists.infradead.org +Date: Tue, 25 Apr 2017 09:45:08 -0700 Raspbian and Fedora have decided to support the Pi3 in 32-bit mode for now, so it's useful to be able to test that mode on an upstream @@ -22,25 +22,16 @@ and 64-bit development. Signed-off-by: Eric Anholt --- - -v1: Gerd's patch that put the ../../../arm64/... link in the Makefile -v2: Michael's patch that #included from ../../../arm64/... in a new - bcm2837-rpi-3-b.dts. -v3: Mine, using symlinks to make sure that we don't break the split DT - tree. - arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 1 + - arch/arm/boot/dts/bcm2837.dtsi | 1 + - 3 files changed, 3 insertions(+) - create mode 120000 arch/arm/boot/dts/bcm2837-rpi-3-b.dts - create mode 120000 arch/arm/boot/dts/bcm2837.dtsi + 2 files changed, 2 insertions(+) + create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index 6576e3f000c9..416fdcedf5a1 100644 +index 011808490fed..eded842d9978 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile -@@ -70,6 +70,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ +@@ -72,6 +72,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ bcm2835-rpi-b-plus.dtb \ bcm2835-rpi-a-plus.dtb \ bcm2836-rpi-2-b.dtb \ @@ -49,18 +40,9 @@ index 6576e3f000c9..416fdcedf5a1 100644 dtb-$(CONFIG_ARCH_BCM_5301X) += \ bcm4708-asus-rt-ac56u.dtb \ diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -new file mode 120000 -index 000000000000..ceebc0e163fb +new file mode 100644 +index 000000000000..c72a27d908b6 --- /dev/null +++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts @@ -0,0 +1 @@ -+../../../arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts -\ No newline at end of file -diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi -new file mode 120000 -index 000000000000..53f1cd2bba47 ---- /dev/null -+++ b/arch/arm/boot/dts/bcm2837.dtsi -@@ -0,0 +1 @@ -+../../../arm64/boot/dts/broadcom/bcm2837.dtsi -\ No newline at end of file ++#include "../../../arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts" diff --git a/bcm283x-fixes.patch b/bcm283x-fixes.patch deleted file mode 100644 index fcddac501..000000000 --- a/bcm283x-fixes.patch +++ /dev/null @@ -1,218 +0,0 @@ -From patchwork Sun Jan 29 18:40:59 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2] ARM: bcm2835: dts: fix uart0 pinctrl node names -From: Baruch Siach -X-Patchwork-Id: 9544261 -Message-Id: -To: Stephen Warren , Lee Jones , - Eric Anholt -Cc: Baruch Siach , linux-rpi-kernel@lists.infradead.org, - linux-arm-kernel@lists.infradead.org -Date: Sun, 29 Jan 2017 20:40:59 +0200 - -Downstream kernel uses pins 32, 33 as UART0 (PL011) Rx/Tx to communicate with -the Bluetooth chip. So ALT3 of these pins is most likely not CTS/RTS. Change -the node name to reflect that. This matches section 6.2 "Alternative Function -Assignments" in the BCM2835 ARM Peripherals document. - -With this change in place, adding - - &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_gpio32 &gpclk2_gpio43>; - status = "okay"; - }; - -to bcm2837-rpi-3-b.dts does the right thing on my Raspberry Pi 3. - -Pins 30, 31 are CTS/RTS of UART0 in alternate function 3. Rename uart0_gpio30 -as well. - -While at it, fix a little typo in a nearby comment. - -Fixes: 21ff843931b ("ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.") -Acked-by: Stefan Wahren -Signed-off-by: Baruch Siach -Reviewed-by: Eric Anholt ---- -v2: - * Reference the ARM Peripherals document - * Fix subject typo (Stefan) - * Rename also uart0_gpio30 (Stefan) - * Add comment typo fix (Stefan) - * Add Stefan's ack ---- - arch/arm/boot/dts/bcm283x.dtsi | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index 9a44da190897..bc8ad417c8a3 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -292,17 +292,17 @@ - /* Separate from the uart0_gpio14 group - * because it conflicts with spi1_gpio16, and - * people often run uart0 on the two pins -- * without flow contrl. -+ * without flow control. - */ - uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 { - brcm,pins = <16 17>; - brcm,function = ; - }; -- uart0_gpio30: uart0_gpio30 { -+ uart0_ctsrts_gpio30: uart0_ctsrts_gpio30 { - brcm,pins = <30 31>; - brcm,function = ; - }; -- uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 { -+ uart0_gpio32: uart0_gpio32 { - brcm,pins = <32 33>; - brcm,function = ; - }; -From patchwork Sun Jan 29 19:53:10 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [1/2] ARM: bcm2835: dts: fix i2c0 pins -From: Baruch Siach -X-Patchwork-Id: 9544275 -Message-Id: <9290fa9eed6b5ff1c5c96b9dac41eca286b7eef9.1485719591.git.baruch@tkos.co.il> -To: Stephen Warren , Lee Jones , - Eric Anholt -Cc: Baruch Siach , linux-rpi-kernel@lists.infradead.org, - linux-arm-kernel@lists.infradead.org -Date: Sun, 29 Jan 2017 21:53:10 +0200 - -According to the BCM2835 ARM Peripherals document i2c0 doesn't map to pins 32, -34 but to 28, 29. - -Fixes: 21ff843931b ("ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.") -Signed-off-by: Baruch Siach ---- - arch/arm/boot/dts/bcm283x.dtsi | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index bc8ad417c8a3..2ae842921250 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -195,8 +195,8 @@ - brcm,pins = <0 1>; - brcm,function = ; - }; -- i2c0_gpio32: i2c0_gpio32 { -- brcm,pins = <32 34>; -+ i2c0_gpio28: i2c0_gpio28 { -+ brcm,pins = <28 29>; - brcm,function = ; - }; - i2c0_gpio44: i2c0_gpio44 { -From patchwork Sun Jan 29 19:53:11 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [2/2] ARM: bcm2835: dts: fix uart0/uart1 pins -From: Baruch Siach -X-Patchwork-Id: 9544277 -Message-Id: -To: Stephen Warren , Lee Jones , - Eric Anholt -Cc: Baruch Siach , linux-rpi-kernel@lists.infradead.org, - linux-arm-kernel@lists.infradead.org -Date: Sun, 29 Jan 2017 21:53:11 +0200 - -According to the BCM2835 ARM Peripherals document uart1 doesn't map to pins -36-39, but uart0 does. - -Also, split into separate Rx/Tx and CST/RTS groups to match other uart nodes. - -Fixes: 21ff843931b ("ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.") -Signed-off-by: Baruch Siach ---- - arch/arm/boot/dts/bcm283x.dtsi | 12 ++++++++---- - 1 file changed, 8 insertions(+), 4 deletions(-) - -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index 2ae842921250..9ee8346b8b19 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -306,6 +306,14 @@ - brcm,pins = <32 33>; - brcm,function = ; - }; -+ uart0_gpio36: uart0_gpio36 { -+ brcm,pins = <36 37>; -+ brcm,function = ; -+ }; -+ uart0_ctsrts_gpio38: uart0_ctsrts_gpio38 { -+ brcm,pins = <38 39>; -+ brcm,function = ; -+ }; - - uart1_gpio14: uart1_gpio14 { - brcm,pins = <14 15>; -@@ -323,10 +331,6 @@ - brcm,pins = <30 31>; - brcm,function = ; - }; -- uart1_gpio36: uart1_gpio36 { -- brcm,pins = <36 37 38 39>; -- brcm,function = ; -- }; - uart1_gpio40: uart1_gpio40 { - brcm,pins = <40 41>; - brcm,function = ; -From patchwork Mon Jan 30 18:44:39 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: ARM: bcm2835: dt: add index to the ethernet alias -From: Baruch Siach -X-Patchwork-Id: 9545945 -Message-Id: <5942321c5d0bfea54eac64ace2b217e8e0b6220d.1485801879.git.baruch@tkos.co.il> -To: Stephen Warren , Lee Jones , - Eric Anholt -Cc: Lubomir Rintel , Baruch Siach , - linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org -Date: Mon, 30 Jan 2017 20:44:39 +0200 - -An alias name should have an index number even when it is the only of its type. -This allows U-Boot to add the local-mac-address property. Otherwise U-Boot -skips the alias. - -Cc: Lubomir Rintel -Fixes: 6a93792774 ("ARM: bcm2835: dt: Add the ethernet to the device trees") -Signed-off-by: Baruch Siach -Acked-by: Lubomir Rintel ---- - arch/arm/boot/dts/bcm283x-rpi-smsc9512.dtsi | 2 +- - arch/arm/boot/dts/bcm283x-rpi-smsc9514.dtsi | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/arm/boot/dts/bcm283x-rpi-smsc9512.dtsi b/arch/arm/boot/dts/bcm283x-rpi-smsc9512.dtsi -index 12c981e51134..9a0599f711ff 100644 ---- a/arch/arm/boot/dts/bcm283x-rpi-smsc9512.dtsi -+++ b/arch/arm/boot/dts/bcm283x-rpi-smsc9512.dtsi -@@ -1,6 +1,6 @@ - / { - aliases { -- ethernet = ðernet; -+ ethernet0 = ðernet; - }; - }; - -diff --git a/arch/arm/boot/dts/bcm283x-rpi-smsc9514.dtsi b/arch/arm/boot/dts/bcm283x-rpi-smsc9514.dtsi -index 3f0a56ebcf1f..dc7ae776db5f 100644 ---- a/arch/arm/boot/dts/bcm283x-rpi-smsc9514.dtsi -+++ b/arch/arm/boot/dts/bcm283x-rpi-smsc9514.dtsi -@@ -1,6 +1,6 @@ - / { - aliases { -- ethernet = ðernet; -+ ethernet0 = ðernet; - }; - }; - diff --git a/bcm283x-hdmi-audio.patch b/bcm283x-hdmi-audio.patch deleted file mode 100644 index 3ed3d2d34..000000000 --- a/bcm283x-hdmi-audio.patch +++ /dev/null @@ -1,836 +0,0 @@ -From bbcb8aacb871edf0360e808180162591b11c6a35 Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Mon, 27 Feb 2017 12:28:01 -0800 -Subject: [PATCH 1/3] dt-bindings: Document the dmas and dma-names properties - for VC4 HDMI - -These are optional, but necessary for HDMI audio support. - -Signed-off-by: Boris Brezillon -Signed-off-by: Eric Anholt -Acked-by: Rob Herring -Link: http://patchwork.freedesktop.org/patch/msgid/20170227202803.12855-1-eric@anholt.net ---- - Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt -index 34c7fddcea39..ca02d3e4db91 100644 ---- a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt -+++ b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt -@@ -34,6 +34,9 @@ Optional properties for HDMI: - - hpd-gpios: The GPIO pin for HDMI hotplug detect (if it doesn't appear - as an interrupt/status bit in the HDMI controller - itself). See bindings/pinctrl/brcm,bcm2835-gpio.txt -+- dmas: Should contain one entry pointing to the DMA channel used to -+ transfer audio data -+- dma-names: Should contain "audio-rx" - - Required properties for DPI: - - compatible: Should be "brcm,bcm2835-dpi" --- -2.12.0 - -From 8e13e0d8ecf2202c707225a612d10c9534d849f7 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Mon, 27 Feb 2017 12:28:02 -0800 -Subject: [PATCH 2/3] drm/vc4: Add HDMI audio support - -The HDMI encoder IP embeds all needed blocks to output audio, with a -custom DAI called MAI moving audio between the two parts of the HDMI -core. This driver now exposes a sound card to let users stream audio -to their display. - -Using the hdmi-codec driver has been considered here, but MAI meant -having to significantly rework hdmi-codec, and it would have left -little shared code with the I2S mode anyway. - -The encoder requires that the audio be SPDIF-formatted frames only, -which alsalib will format-convert for us. - -This patch is the combined work of Eric Anholt (initial register setup -with a separate dmaengine driver and using simple-audio-card) and -Boris Brezillon (moving it all into HDMI, massive debug to get it -actually working), and which Eric has the permission to release. - -v2: Drop "-audio" from sound card name, since that's already implied - (suggestion by Boris) - -Signed-off-by: Eric Anholt -Acked-by: Boris Brezillon -Link: http://patchwork.freedesktop.org/patch/msgid/20170227202803.12855-2-eric@anholt.net ---- - drivers/gpu/drm/vc4/Kconfig | 4 + - drivers/gpu/drm/vc4/vc4_hdmi.c | 494 ++++++++++++++++++++++++++++++++++++++++- - drivers/gpu/drm/vc4/vc4_regs.h | 107 ++++++++- - 3 files changed, 603 insertions(+), 2 deletions(-) - -diff --git a/drivers/gpu/drm/vc4/Kconfig b/drivers/gpu/drm/vc4/Kconfig -index e1517d07cb7d..973b4203c0b2 100644 ---- a/drivers/gpu/drm/vc4/Kconfig -+++ b/drivers/gpu/drm/vc4/Kconfig -@@ -2,11 +2,15 @@ config DRM_VC4 - tristate "Broadcom VC4 Graphics" - depends on ARCH_BCM2835 || COMPILE_TEST - depends on DRM -+ depends on SND && SND_SOC - depends on COMMON_CLK - select DRM_KMS_HELPER - select DRM_KMS_CMA_HELPER - select DRM_GEM_CMA_HELPER - select DRM_PANEL -+ select SND_PCM -+ select SND_PCM_ELD -+ select SND_SOC_GENERIC_DMAENGINE_PCM - select DRM_MIPI_DSI - help - Choose this option if you have a system that has a Broadcom -diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c -index 93d5994f3a04..e4abf4bfc464 100644 ---- a/drivers/gpu/drm/vc4/vc4_hdmi.c -+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c -@@ -31,11 +31,27 @@ - #include "linux/clk.h" - #include "linux/component.h" - #include "linux/i2c.h" -+#include "linux/of_address.h" - #include "linux/of_gpio.h" - #include "linux/of_platform.h" -+#include "linux/rational.h" -+#include "sound/dmaengine_pcm.h" -+#include "sound/pcm_drm_eld.h" -+#include "sound/pcm_params.h" -+#include "sound/soc.h" - #include "vc4_drv.h" - #include "vc4_regs.h" - -+/* HDMI audio information */ -+struct vc4_hdmi_audio { -+ struct snd_soc_card card; -+ struct snd_soc_dai_link link; -+ int samplerate; -+ int channels; -+ struct snd_dmaengine_dai_dma_data dma_data; -+ struct snd_pcm_substream *substream; -+}; -+ - /* General HDMI hardware state. */ - struct vc4_hdmi { - struct platform_device *pdev; -@@ -43,6 +59,8 @@ struct vc4_hdmi { - struct drm_encoder *encoder; - struct drm_connector *connector; - -+ struct vc4_hdmi_audio audio; -+ - struct i2c_adapter *ddc; - void __iomem *hdmicore_regs; - void __iomem *hd_regs; -@@ -98,6 +116,10 @@ static const struct { - HDMI_REG(VC4_HDMI_SW_RESET_CONTROL), - HDMI_REG(VC4_HDMI_HOTPLUG_INT), - HDMI_REG(VC4_HDMI_HOTPLUG), -+ HDMI_REG(VC4_HDMI_MAI_CHANNEL_MAP), -+ HDMI_REG(VC4_HDMI_MAI_CONFIG), -+ HDMI_REG(VC4_HDMI_MAI_FORMAT), -+ HDMI_REG(VC4_HDMI_AUDIO_PACKET_CONFIG), - HDMI_REG(VC4_HDMI_RAM_PACKET_CONFIG), - HDMI_REG(VC4_HDMI_HORZA), - HDMI_REG(VC4_HDMI_HORZB), -@@ -108,6 +130,7 @@ static const struct { - HDMI_REG(VC4_HDMI_VERTB0), - HDMI_REG(VC4_HDMI_VERTB1), - HDMI_REG(VC4_HDMI_TX_PHY_RESET_CTL), -+ HDMI_REG(VC4_HDMI_TX_PHY_CTL0), - }; - - static const struct { -@@ -116,6 +139,9 @@ static const struct { - } hd_regs[] = { - HDMI_REG(VC4_HD_M_CTL), - HDMI_REG(VC4_HD_MAI_CTL), -+ HDMI_REG(VC4_HD_MAI_THR), -+ HDMI_REG(VC4_HD_MAI_FMT), -+ HDMI_REG(VC4_HD_MAI_SMP), - HDMI_REG(VC4_HD_VID_CTL), - HDMI_REG(VC4_HD_CSC_CTL), - HDMI_REG(VC4_HD_FRAME_COUNT), -@@ -215,6 +241,7 @@ static int vc4_hdmi_connector_get_modes(struct drm_connector *connector) - - drm_mode_connector_update_edid_property(connector, edid); - ret = drm_add_edid_modes(connector, edid); -+ drm_edid_to_eld(connector, edid); - - return ret; - } -@@ -300,7 +327,7 @@ static void vc4_hdmi_write_infoframe(struct drm_encoder *encoder, - struct drm_device *dev = encoder->dev; - struct vc4_dev *vc4 = to_vc4_dev(dev); - u32 packet_id = frame->any.type - 0x80; -- u32 packet_reg = VC4_HDMI_GCP_0 + VC4_HDMI_PACKET_STRIDE * packet_id; -+ u32 packet_reg = VC4_HDMI_RAM_PACKET(packet_id); - uint8_t buffer[VC4_HDMI_PACKET_STRIDE]; - ssize_t len, i; - int ret; -@@ -381,6 +408,24 @@ static void vc4_hdmi_set_spd_infoframe(struct drm_encoder *encoder) - vc4_hdmi_write_infoframe(encoder, &frame); - } - -+static void vc4_hdmi_set_audio_infoframe(struct drm_encoder *encoder) -+{ -+ struct drm_device *drm = encoder->dev; -+ struct vc4_dev *vc4 = drm->dev_private; -+ struct vc4_hdmi *hdmi = vc4->hdmi; -+ union hdmi_infoframe frame; -+ int ret; -+ -+ ret = hdmi_audio_infoframe_init(&frame.audio); -+ -+ frame.audio.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM; -+ frame.audio.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM; -+ frame.audio.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM; -+ frame.audio.channels = hdmi->audio.channels; -+ -+ vc4_hdmi_write_infoframe(encoder, &frame); -+} -+ - static void vc4_hdmi_set_infoframes(struct drm_encoder *encoder) - { - vc4_hdmi_set_avi_infoframe(encoder); -@@ -589,6 +634,447 @@ static const struct drm_encoder_helper_funcs vc4_hdmi_encoder_helper_funcs = { - .enable = vc4_hdmi_encoder_enable, - }; - -+/* HDMI audio codec callbacks */ -+static void vc4_hdmi_audio_set_mai_clock(struct vc4_hdmi *hdmi) -+{ -+ struct drm_device *drm = hdmi->encoder->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ u32 hsm_clock = clk_get_rate(hdmi->hsm_clock); -+ unsigned long n, m; -+ -+ rational_best_approximation(hsm_clock, hdmi->audio.samplerate, -+ VC4_HD_MAI_SMP_N_MASK >> -+ VC4_HD_MAI_SMP_N_SHIFT, -+ (VC4_HD_MAI_SMP_M_MASK >> -+ VC4_HD_MAI_SMP_M_SHIFT) + 1, -+ &n, &m); -+ -+ HD_WRITE(VC4_HD_MAI_SMP, -+ VC4_SET_FIELD(n, VC4_HD_MAI_SMP_N) | -+ VC4_SET_FIELD(m - 1, VC4_HD_MAI_SMP_M)); -+} -+ -+static void vc4_hdmi_set_n_cts(struct vc4_hdmi *hdmi) -+{ -+ struct drm_encoder *encoder = hdmi->encoder; -+ struct drm_crtc *crtc = encoder->crtc; -+ struct drm_device *drm = encoder->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ const struct drm_display_mode *mode = &crtc->state->adjusted_mode; -+ u32 samplerate = hdmi->audio.samplerate; -+ u32 n, cts; -+ u64 tmp; -+ -+ n = 128 * samplerate / 1000; -+ tmp = (u64)(mode->clock * 1000) * n; -+ do_div(tmp, 128 * samplerate); -+ cts = tmp; -+ -+ HDMI_WRITE(VC4_HDMI_CRP_CFG, -+ VC4_HDMI_CRP_CFG_EXTERNAL_CTS_EN | -+ VC4_SET_FIELD(n, VC4_HDMI_CRP_CFG_N)); -+ -+ /* -+ * We could get slightly more accurate clocks in some cases by -+ * providing a CTS_1 value. The two CTS values are alternated -+ * between based on the period fields -+ */ -+ HDMI_WRITE(VC4_HDMI_CTS_0, cts); -+ HDMI_WRITE(VC4_HDMI_CTS_1, cts); -+} -+ -+static inline struct vc4_hdmi *dai_to_hdmi(struct snd_soc_dai *dai) -+{ -+ struct snd_soc_card *card = snd_soc_dai_get_drvdata(dai); -+ -+ return snd_soc_card_get_drvdata(card); -+} -+ -+static int vc4_hdmi_audio_startup(struct snd_pcm_substream *substream, -+ struct snd_soc_dai *dai) -+{ -+ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); -+ struct drm_encoder *encoder = hdmi->encoder; -+ struct vc4_dev *vc4 = to_vc4_dev(encoder->dev); -+ int ret; -+ -+ if (hdmi->audio.substream && hdmi->audio.substream != substream) -+ return -EINVAL; -+ -+ hdmi->audio.substream = substream; -+ -+ /* -+ * If the HDMI encoder hasn't probed, or the encoder is -+ * currently in DVI mode, treat the codec dai as missing. -+ */ -+ if (!encoder->crtc || !(HDMI_READ(VC4_HDMI_RAM_PACKET_CONFIG) & -+ VC4_HDMI_RAM_PACKET_ENABLE)) -+ return -ENODEV; -+ -+ ret = snd_pcm_hw_constraint_eld(substream->runtime, -+ hdmi->connector->eld); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static int vc4_hdmi_audio_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) -+{ -+ return 0; -+} -+ -+static void vc4_hdmi_audio_reset(struct vc4_hdmi *hdmi) -+{ -+ struct drm_encoder *encoder = hdmi->encoder; -+ struct drm_device *drm = encoder->dev; -+ struct device *dev = &hdmi->pdev->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ int ret; -+ -+ ret = vc4_hdmi_stop_packet(encoder, HDMI_INFOFRAME_TYPE_AUDIO); -+ if (ret) -+ dev_err(dev, "Failed to stop audio infoframe: %d\n", ret); -+ -+ HD_WRITE(VC4_HD_MAI_CTL, VC4_HD_MAI_CTL_RESET); -+ HD_WRITE(VC4_HD_MAI_CTL, VC4_HD_MAI_CTL_ERRORF); -+ HD_WRITE(VC4_HD_MAI_CTL, VC4_HD_MAI_CTL_FLUSH); -+} -+ -+static void vc4_hdmi_audio_shutdown(struct snd_pcm_substream *substream, -+ struct snd_soc_dai *dai) -+{ -+ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); -+ -+ if (substream != hdmi->audio.substream) -+ return; -+ -+ vc4_hdmi_audio_reset(hdmi); -+ -+ hdmi->audio.substream = NULL; -+} -+ -+/* HDMI audio codec callbacks */ -+static int vc4_hdmi_audio_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params, -+ struct snd_soc_dai *dai) -+{ -+ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); -+ struct drm_encoder *encoder = hdmi->encoder; -+ struct drm_device *drm = encoder->dev; -+ struct device *dev = &hdmi->pdev->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ u32 audio_packet_config, channel_mask; -+ u32 channel_map, i; -+ -+ if (substream != hdmi->audio.substream) -+ return -EINVAL; -+ -+ dev_dbg(dev, "%s: %u Hz, %d bit, %d channels\n", __func__, -+ params_rate(params), params_width(params), -+ params_channels(params)); -+ -+ hdmi->audio.channels = params_channels(params); -+ hdmi->audio.samplerate = params_rate(params); -+ -+ HD_WRITE(VC4_HD_MAI_CTL, -+ VC4_HD_MAI_CTL_RESET | -+ VC4_HD_MAI_CTL_FLUSH | -+ VC4_HD_MAI_CTL_DLATE | -+ VC4_HD_MAI_CTL_ERRORE | -+ VC4_HD_MAI_CTL_ERRORF); -+ -+ vc4_hdmi_audio_set_mai_clock(hdmi); -+ -+ audio_packet_config = -+ VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_SAMPLE_FLAT | -+ VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_INACTIVE_CHANNELS | -+ VC4_SET_FIELD(0xf, VC4_HDMI_AUDIO_PACKET_B_FRAME_IDENTIFIER); -+ -+ channel_mask = GENMASK(hdmi->audio.channels - 1, 0); -+ audio_packet_config |= VC4_SET_FIELD(channel_mask, -+ VC4_HDMI_AUDIO_PACKET_CEA_MASK); -+ -+ /* Set the MAI threshold. This logic mimics the firmware's. */ -+ if (hdmi->audio.samplerate > 96000) { -+ HD_WRITE(VC4_HD_MAI_THR, -+ VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQHIGH) | -+ VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQLOW)); -+ } else if (hdmi->audio.samplerate > 48000) { -+ HD_WRITE(VC4_HD_MAI_THR, -+ VC4_SET_FIELD(0x14, VC4_HD_MAI_THR_DREQHIGH) | -+ VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQLOW)); -+ } else { -+ HD_WRITE(VC4_HD_MAI_THR, -+ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICHIGH) | -+ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICLOW) | -+ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQHIGH) | -+ VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQLOW)); -+ } -+ -+ HDMI_WRITE(VC4_HDMI_MAI_CONFIG, -+ VC4_HDMI_MAI_CONFIG_BIT_REVERSE | -+ VC4_SET_FIELD(channel_mask, VC4_HDMI_MAI_CHANNEL_MASK)); -+ -+ channel_map = 0; -+ for (i = 0; i < 8; i++) { -+ if (channel_mask & BIT(i)) -+ channel_map |= i << (3 * i); -+ } -+ -+ HDMI_WRITE(VC4_HDMI_MAI_CHANNEL_MAP, channel_map); -+ HDMI_WRITE(VC4_HDMI_AUDIO_PACKET_CONFIG, audio_packet_config); -+ vc4_hdmi_set_n_cts(hdmi); -+ -+ return 0; -+} -+ -+static int vc4_hdmi_audio_trigger(struct snd_pcm_substream *substream, int cmd, -+ struct snd_soc_dai *dai) -+{ -+ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); -+ struct drm_encoder *encoder = hdmi->encoder; -+ struct drm_device *drm = encoder->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ vc4_hdmi_set_audio_infoframe(encoder); -+ HDMI_WRITE(VC4_HDMI_TX_PHY_CTL0, -+ HDMI_READ(VC4_HDMI_TX_PHY_CTL0) & -+ ~VC4_HDMI_TX_PHY_RNG_PWRDN); -+ HD_WRITE(VC4_HD_MAI_CTL, -+ VC4_SET_FIELD(hdmi->audio.channels, -+ VC4_HD_MAI_CTL_CHNUM) | -+ VC4_HD_MAI_CTL_ENABLE); -+ break; -+ case SNDRV_PCM_TRIGGER_STOP: -+ HD_WRITE(VC4_HD_MAI_CTL, -+ VC4_HD_MAI_CTL_DLATE | -+ VC4_HD_MAI_CTL_ERRORE | -+ VC4_HD_MAI_CTL_ERRORF); -+ HDMI_WRITE(VC4_HDMI_TX_PHY_CTL0, -+ HDMI_READ(VC4_HDMI_TX_PHY_CTL0) | -+ VC4_HDMI_TX_PHY_RNG_PWRDN); -+ break; -+ default: -+ break; -+ } -+ -+ return 0; -+} -+ -+static inline struct vc4_hdmi * -+snd_component_to_hdmi(struct snd_soc_component *component) -+{ -+ struct snd_soc_card *card = snd_soc_component_get_drvdata(component); -+ -+ return snd_soc_card_get_drvdata(card); -+} -+ -+static int vc4_hdmi_audio_eld_ctl_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); -+ struct vc4_hdmi *hdmi = snd_component_to_hdmi(component); -+ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; -+ uinfo->count = sizeof(hdmi->connector->eld); -+ -+ return 0; -+} -+ -+static int vc4_hdmi_audio_eld_ctl_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); -+ struct vc4_hdmi *hdmi = snd_component_to_hdmi(component); -+ -+ memcpy(ucontrol->value.bytes.data, hdmi->connector->eld, -+ sizeof(hdmi->connector->eld)); -+ -+ return 0; -+} -+ -+static const struct snd_kcontrol_new vc4_hdmi_audio_controls[] = { -+ { -+ .access = SNDRV_CTL_ELEM_ACCESS_READ | -+ SNDRV_CTL_ELEM_ACCESS_VOLATILE, -+ .iface = SNDRV_CTL_ELEM_IFACE_PCM, -+ .name = "ELD", -+ .info = vc4_hdmi_audio_eld_ctl_info, -+ .get = vc4_hdmi_audio_eld_ctl_get, -+ }, -+}; -+ -+static const struct snd_soc_dapm_widget vc4_hdmi_audio_widgets[] = { -+ SND_SOC_DAPM_OUTPUT("TX"), -+}; -+ -+static const struct snd_soc_dapm_route vc4_hdmi_audio_routes[] = { -+ { "TX", NULL, "Playback" }, -+}; -+ -+static const struct snd_soc_codec_driver vc4_hdmi_audio_codec_drv = { -+ .component_driver = { -+ .controls = vc4_hdmi_audio_controls, -+ .num_controls = ARRAY_SIZE(vc4_hdmi_audio_controls), -+ .dapm_widgets = vc4_hdmi_audio_widgets, -+ .num_dapm_widgets = ARRAY_SIZE(vc4_hdmi_audio_widgets), -+ .dapm_routes = vc4_hdmi_audio_routes, -+ .num_dapm_routes = ARRAY_SIZE(vc4_hdmi_audio_routes), -+ }, -+}; -+ -+static const struct snd_soc_dai_ops vc4_hdmi_audio_dai_ops = { -+ .startup = vc4_hdmi_audio_startup, -+ .shutdown = vc4_hdmi_audio_shutdown, -+ .hw_params = vc4_hdmi_audio_hw_params, -+ .set_fmt = vc4_hdmi_audio_set_fmt, -+ .trigger = vc4_hdmi_audio_trigger, -+}; -+ -+static struct snd_soc_dai_driver vc4_hdmi_audio_codec_dai_drv = { -+ .name = "vc4-hdmi-hifi", -+ .playback = { -+ .stream_name = "Playback", -+ .channels_min = 2, -+ .channels_max = 8, -+ .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | -+ SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | -+ SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | -+ SNDRV_PCM_RATE_192000, -+ .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE, -+ }, -+}; -+ -+static const struct snd_soc_component_driver vc4_hdmi_audio_cpu_dai_comp = { -+ .name = "vc4-hdmi-cpu-dai-component", -+}; -+ -+static int vc4_hdmi_audio_cpu_dai_probe(struct snd_soc_dai *dai) -+{ -+ struct vc4_hdmi *hdmi = dai_to_hdmi(dai); -+ -+ snd_soc_dai_init_dma_data(dai, &hdmi->audio.dma_data, NULL); -+ -+ return 0; -+} -+ -+static struct snd_soc_dai_driver vc4_hdmi_audio_cpu_dai_drv = { -+ .name = "vc4-hdmi-cpu-dai", -+ .probe = vc4_hdmi_audio_cpu_dai_probe, -+ .playback = { -+ .stream_name = "Playback", -+ .channels_min = 1, -+ .channels_max = 8, -+ .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | -+ SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | -+ SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | -+ SNDRV_PCM_RATE_192000, -+ .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE, -+ }, -+ .ops = &vc4_hdmi_audio_dai_ops, -+}; -+ -+static const struct snd_dmaengine_pcm_config pcm_conf = { -+ .chan_names[SNDRV_PCM_STREAM_PLAYBACK] = "audio-rx", -+ .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config, -+}; -+ -+static int vc4_hdmi_audio_init(struct vc4_hdmi *hdmi) -+{ -+ struct snd_soc_dai_link *dai_link = &hdmi->audio.link; -+ struct snd_soc_card *card = &hdmi->audio.card; -+ struct device *dev = &hdmi->pdev->dev; -+ const __be32 *addr; -+ int ret; -+ -+ if (!of_find_property(dev->of_node, "dmas", NULL)) { -+ dev_warn(dev, -+ "'dmas' DT property is missing, no HDMI audio\n"); -+ return 0; -+ } -+ -+ /* -+ * Get the physical address of VC4_HD_MAI_DATA. We need to retrieve -+ * the bus address specified in the DT, because the physical address -+ * (the one returned by platform_get_resource()) is not appropriate -+ * for DMA transfers. -+ * This VC/MMU should probably be exposed to avoid this kind of hacks. -+ */ -+ addr = of_get_address(dev->of_node, 1, NULL, NULL); -+ hdmi->audio.dma_data.addr = be32_to_cpup(addr) + VC4_HD_MAI_DATA; -+ hdmi->audio.dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; -+ hdmi->audio.dma_data.maxburst = 2; -+ -+ ret = devm_snd_dmaengine_pcm_register(dev, &pcm_conf, 0); -+ if (ret) { -+ dev_err(dev, "Could not register PCM component: %d\n", ret); -+ return ret; -+ } -+ -+ ret = devm_snd_soc_register_component(dev, &vc4_hdmi_audio_cpu_dai_comp, -+ &vc4_hdmi_audio_cpu_dai_drv, 1); -+ if (ret) { -+ dev_err(dev, "Could not register CPU DAI: %d\n", ret); -+ return ret; -+ } -+ -+ /* register codec and codec dai */ -+ ret = snd_soc_register_codec(dev, &vc4_hdmi_audio_codec_drv, -+ &vc4_hdmi_audio_codec_dai_drv, 1); -+ if (ret) { -+ dev_err(dev, "Could not register codec: %d\n", ret); -+ return ret; -+ } -+ -+ dai_link->name = "MAI"; -+ dai_link->stream_name = "MAI PCM"; -+ dai_link->codec_dai_name = vc4_hdmi_audio_codec_dai_drv.name; -+ dai_link->cpu_dai_name = dev_name(dev); -+ dai_link->codec_name = dev_name(dev); -+ dai_link->platform_name = dev_name(dev); -+ -+ card->dai_link = dai_link; -+ card->num_links = 1; -+ card->name = "vc4-hdmi"; -+ card->dev = dev; -+ -+ /* -+ * Be careful, snd_soc_register_card() calls dev_set_drvdata() and -+ * stores a pointer to the snd card object in dev->driver_data. This -+ * means we cannot use it for something else. The hdmi back-pointer is -+ * now stored in card->drvdata and should be retrieved with -+ * snd_soc_card_get_drvdata() if needed. -+ */ -+ snd_soc_card_set_drvdata(card, hdmi); -+ ret = devm_snd_soc_register_card(dev, card); -+ if (ret) { -+ dev_err(dev, "Could not register sound card: %d\n", ret); -+ goto unregister_codec; -+ } -+ -+ return 0; -+ -+unregister_codec: -+ snd_soc_unregister_codec(dev); -+ -+ return ret; -+} -+ -+static void vc4_hdmi_audio_cleanup(struct vc4_hdmi *hdmi) -+{ -+ struct device *dev = &hdmi->pdev->dev; -+ -+ /* -+ * If drvdata is not set this means the audio card was not -+ * registered, just skip codec unregistration in this case. -+ */ -+ if (dev_get_drvdata(dev)) -+ snd_soc_unregister_codec(dev); -+} -+ - static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) - { - struct platform_device *pdev = to_platform_device(dev); -@@ -720,6 +1206,10 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) - goto err_destroy_encoder; - } - -+ ret = vc4_hdmi_audio_init(hdmi); -+ if (ret) -+ goto err_destroy_encoder; -+ - return 0; - - err_destroy_encoder: -@@ -741,6 +1231,8 @@ static void vc4_hdmi_unbind(struct device *dev, struct device *master, - struct vc4_dev *vc4 = drm->dev_private; - struct vc4_hdmi *hdmi = vc4->hdmi; - -+ vc4_hdmi_audio_cleanup(hdmi); -+ - vc4_hdmi_connector_destroy(hdmi->connector); - vc4_hdmi_encoder_destroy(hdmi->encoder); - -diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h -index 385405a2df05..932093936178 100644 ---- a/drivers/gpu/drm/vc4/vc4_regs.h -+++ b/drivers/gpu/drm/vc4/vc4_regs.h -@@ -446,11 +446,62 @@ - #define VC4_HDMI_HOTPLUG 0x00c - # define VC4_HDMI_HOTPLUG_CONNECTED BIT(0) - -+/* 3 bits per field, where each field maps from that corresponding MAI -+ * bus channel to the given HDMI channel. -+ */ -+#define VC4_HDMI_MAI_CHANNEL_MAP 0x090 -+ -+#define VC4_HDMI_MAI_CONFIG 0x094 -+# define VC4_HDMI_MAI_CONFIG_FORMAT_REVERSE BIT(27) -+# define VC4_HDMI_MAI_CONFIG_BIT_REVERSE BIT(26) -+# define VC4_HDMI_MAI_CHANNEL_MASK_MASK VC4_MASK(15, 0) -+# define VC4_HDMI_MAI_CHANNEL_MASK_SHIFT 0 -+ -+/* Last received format word on the MAI bus. */ -+#define VC4_HDMI_MAI_FORMAT 0x098 -+ -+#define VC4_HDMI_AUDIO_PACKET_CONFIG 0x09c -+# define VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_SAMPLE_FLAT BIT(29) -+# define VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_INACTIVE_CHANNELS BIT(24) -+# define VC4_HDMI_AUDIO_PACKET_FORCE_SAMPLE_PRESENT BIT(19) -+# define VC4_HDMI_AUDIO_PACKET_FORCE_B_FRAME BIT(18) -+# define VC4_HDMI_AUDIO_PACKET_B_FRAME_IDENTIFIER_MASK VC4_MASK(13, 10) -+# define VC4_HDMI_AUDIO_PACKET_B_FRAME_IDENTIFIER_SHIFT 10 -+/* If set, then multichannel, otherwise 2 channel. */ -+# define VC4_HDMI_AUDIO_PACKET_AUDIO_LAYOUT BIT(9) -+/* If set, then AUDIO_LAYOUT overrides audio_cea_mask */ -+# define VC4_HDMI_AUDIO_PACKET_FORCE_AUDIO_LAYOUT BIT(8) -+# define VC4_HDMI_AUDIO_PACKET_CEA_MASK_MASK VC4_MASK(7, 0) -+# define VC4_HDMI_AUDIO_PACKET_CEA_MASK_SHIFT 0 -+ - #define VC4_HDMI_RAM_PACKET_CONFIG 0x0a0 - # define VC4_HDMI_RAM_PACKET_ENABLE BIT(16) - - #define VC4_HDMI_RAM_PACKET_STATUS 0x0a4 - -+#define VC4_HDMI_CRP_CFG 0x0a8 -+/* When set, the CTS_PERIOD counts based on MAI bus sync pulse instead -+ * of pixel clock. -+ */ -+# define VC4_HDMI_CRP_USE_MAI_BUS_SYNC_FOR_CTS BIT(26) -+/* When set, no CRP packets will be sent. */ -+# define VC4_HDMI_CRP_CFG_DISABLE BIT(25) -+/* If set, generates CTS values based on N, audio clock, and video -+ * clock. N must be divisible by 128. -+ */ -+# define VC4_HDMI_CRP_CFG_EXTERNAL_CTS_EN BIT(24) -+# define VC4_HDMI_CRP_CFG_N_MASK VC4_MASK(19, 0) -+# define VC4_HDMI_CRP_CFG_N_SHIFT 0 -+ -+/* 20-bit fields containing CTS values to be transmitted if !EXTERNAL_CTS_EN */ -+#define VC4_HDMI_CTS_0 0x0ac -+#define VC4_HDMI_CTS_1 0x0b0 -+/* 20-bit fields containing number of clocks to send CTS0/1 before -+ * switching to the other one. -+ */ -+#define VC4_HDMI_CTS_PERIOD_0 0x0b4 -+#define VC4_HDMI_CTS_PERIOD_1 0x0b8 -+ - #define VC4_HDMI_HORZA 0x0c4 - # define VC4_HDMI_HORZA_VPOS BIT(14) - # define VC4_HDMI_HORZA_HPOS BIT(13) -@@ -512,7 +563,11 @@ - - #define VC4_HDMI_TX_PHY_RESET_CTL 0x2c0 - --#define VC4_HDMI_GCP_0 0x400 -+#define VC4_HDMI_TX_PHY_CTL0 0x2c4 -+# define VC4_HDMI_TX_PHY_RNG_PWRDN BIT(25) -+ -+#define VC4_HDMI_GCP(x) (0x400 + ((x) * 0x4)) -+#define VC4_HDMI_RAM_PACKET(x) (0x400 + ((x) * 0x24)) - #define VC4_HDMI_PACKET_STRIDE 0x24 - - #define VC4_HD_M_CTL 0x00c -@@ -522,6 +577,56 @@ - # define VC4_HD_M_ENABLE BIT(0) - - #define VC4_HD_MAI_CTL 0x014 -+/* Set when audio stream is received at a slower rate than the -+ * sampling period, so MAI fifo goes empty. Write 1 to clear. -+ */ -+# define VC4_HD_MAI_CTL_DLATE BIT(15) -+# define VC4_HD_MAI_CTL_BUSY BIT(14) -+# define VC4_HD_MAI_CTL_CHALIGN BIT(13) -+# define VC4_HD_MAI_CTL_WHOLSMP BIT(12) -+# define VC4_HD_MAI_CTL_FULL BIT(11) -+# define VC4_HD_MAI_CTL_EMPTY BIT(10) -+# define VC4_HD_MAI_CTL_FLUSH BIT(9) -+/* If set, MAI bus generates SPDIF (bit 31) parity instead of passing -+ * through. -+ */ -+# define VC4_HD_MAI_CTL_PAREN BIT(8) -+# define VC4_HD_MAI_CTL_CHNUM_MASK VC4_MASK(7, 4) -+# define VC4_HD_MAI_CTL_CHNUM_SHIFT 4 -+# define VC4_HD_MAI_CTL_ENABLE BIT(3) -+/* Underflow error status bit, write 1 to clear. */ -+# define VC4_HD_MAI_CTL_ERRORE BIT(2) -+/* Overflow error status bit, write 1 to clear. */ -+# define VC4_HD_MAI_CTL_ERRORF BIT(1) -+/* Single-shot reset bit. Read value is undefined. */ -+# define VC4_HD_MAI_CTL_RESET BIT(0) -+ -+#define VC4_HD_MAI_THR 0x018 -+# define VC4_HD_MAI_THR_PANICHIGH_MASK VC4_MASK(29, 24) -+# define VC4_HD_MAI_THR_PANICHIGH_SHIFT 24 -+# define VC4_HD_MAI_THR_PANICLOW_MASK VC4_MASK(21, 16) -+# define VC4_HD_MAI_THR_PANICLOW_SHIFT 16 -+# define VC4_HD_MAI_THR_DREQHIGH_MASK VC4_MASK(13, 8) -+# define VC4_HD_MAI_THR_DREQHIGH_SHIFT 8 -+# define VC4_HD_MAI_THR_DREQLOW_MASK VC4_MASK(5, 0) -+# define VC4_HD_MAI_THR_DREQLOW_SHIFT 0 -+ -+/* Format header to be placed on the MAI data. Unused. */ -+#define VC4_HD_MAI_FMT 0x01c -+ -+/* Register for DMAing in audio data to be transported over the MAI -+ * bus to the Falcon core. -+ */ -+#define VC4_HD_MAI_DATA 0x020 -+ -+/* Divider from HDMI HSM clock to MAI serial clock. Sampling period -+ * converges to N / (M + 1) cycles. -+ */ -+#define VC4_HD_MAI_SMP 0x02c -+# define VC4_HD_MAI_SMP_N_MASK VC4_MASK(31, 8) -+# define VC4_HD_MAI_SMP_N_SHIFT 8 -+# define VC4_HD_MAI_SMP_M_MASK VC4_MASK(7, 0) -+# define VC4_HD_MAI_SMP_M_SHIFT 0 - - #define VC4_HD_VID_CTL 0x038 - # define VC4_HD_VID_CTL_ENABLE BIT(31) --- -2.12.0 - -From 25ea82d7f7c869ff81ff8e64d24c5c4a896239fe Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Mon, 27 Feb 2017 12:28:03 -0800 -Subject: [PATCH 3/3] ARM: dts: bcm283x: Add HDMI audio related properties - -Add the dmas and dma-names properties to support HDMI audio. - -Signed-off-by: Boris Brezillon -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/bcm283x.dtsi | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index a3106aa446c6..a31b0b303ddc 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -499,6 +499,8 @@ - clocks = <&clocks BCM2835_PLLH_PIX>, - <&clocks BCM2835_CLOCK_HSM>; - clock-names = "pixel", "hdmi"; -+ dmas = <&dma 17>; -+ dma-names = "audio-rx"; - status = "disabled"; - }; - --- -2.12.0 - diff --git a/bcm283x-mmc-bcm2835.patch b/bcm283x-mmc-bcm2835.patch deleted file mode 100644 index f3b395db8..000000000 --- a/bcm283x-mmc-bcm2835.patch +++ /dev/null @@ -1,1827 +0,0 @@ -From patchwork Wed Mar 8 09:19:01 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,1/7] dt-bindings: Add binding for brcm,bcm2835-sdhost. -From: Gerd Hoffmann -X-Patchwork-Id: 9610673 -Message-Id: <1488964751-22763-2-git-send-email-kraxel@redhat.com> -To: linux-rpi-kernel@lists.infradead.org -Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, - f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, - rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, - linux@armlinux.org.uk, - linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, - bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , - catalin.marinas@arm.com, linux-mmc@vger.kernel.org, - linux-arm-kernel@lists.infradead.org -Date: Wed, 8 Mar 2017 10:19:01 +0100 - -From: Eric Anholt - -This is the other SD controller on the platform, which can be swapped -to the role of SD card host using pin muxing. - -Signed-off-by: Eric Anholt -Signed-off-by: Gerd Hoffmann -Acked-by: Rob Herring ---- - .../bindings/mmc/brcm,bcm2835-sdhost.txt | 23 ++++++++++++++++++++++ - 1 file changed, 23 insertions(+) - create mode 100644 Documentation/devicetree/bindings/mmc/brcm,bcm2835-sdhost.txt - -diff --git a/Documentation/devicetree/bindings/mmc/brcm,bcm2835-sdhost.txt b/Documentation/devicetree/bindings/mmc/brcm,bcm2835-sdhost.txt -new file mode 100644 -index 0000000..d876580 ---- /dev/null -+++ b/Documentation/devicetree/bindings/mmc/brcm,bcm2835-sdhost.txt -@@ -0,0 +1,23 @@ -+Broadcom BCM2835 SDHOST controller -+ -+This file documents differences between the core properties described -+by mmc.txt and the properties that represent the BCM2835 controller. -+ -+Required properties: -+- compatible: Should be "brcm,bcm2835-sdhost". -+- clocks: The clock feeding the SDHOST controller. -+ -+Optional properties: -+- dmas: DMA channel for read and write. -+ See Documentation/devicetree/bindings/dma/dma.txt for details -+ -+Example: -+ -+sdhost: mmc@7e202000 { -+ compatible = "brcm,bcm2835-sdhost"; -+ reg = <0x7e202000 0x100>; -+ interrupts = <2 24>; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ dmas = <&dma 13>; -+ dma-names = "rx-tx"; -+}; -From patchwork Wed Mar 8 09:19:03 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,2/7] mmc: bcm2835: Add new driver for the sdhost controller. -From: Gerd Hoffmann -X-Patchwork-Id: 9610701 -Message-Id: <1488964751-22763-4-git-send-email-kraxel@redhat.com> -To: linux-rpi-kernel@lists.infradead.org -Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, - f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, - rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, - linux@armlinux.org.uk, - linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, - bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , - catalin.marinas@arm.com, linux-mmc@vger.kernel.org, - linux-arm-kernel@lists.infradead.org -Date: Wed, 8 Mar 2017 10:19:03 +0100 - -From: Eric Anholt - -The 2835 has two SD controllers: The Arasan sdhci controller (supported -by the iproc driver) and a custom sdhost controller. This patch adds a -driver for the latter. - -The sdhci controller supports both sdcard and sdio. The sdhost -controller supports the sdcard only, but has better performance. Also -note that the rpi3 has sdio wifi, so driving the sdcard with the sdhost -controller allows to use the sdhci controller for wifi support. - -The configuration is done by devicetree via pin muxing. Both SD -controller are available on the same pins (2 pin groups = pin 22 to 27 + -pin 48 to 53). So it's possible to use both SD controllers at the same -time with different pin groups. - -The code was originally written by Phil Elwell in the downstream -Rasbperry Pi tree. In preparation for the upstream merge it was -cleaned up and the code base was moderized by Eric Anholt, Stefan -Wahren and Gerd Hoffmann. - -Signed-off-by: Eric Anholt -Signed-off-by: Stefan Wahren -Signed-off-by: Gerd Hoffmann ---- - drivers/mmc/host/Kconfig | 14 + - drivers/mmc/host/Makefile | 1 + - drivers/mmc/host/bcm2835.c | 1465 ++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 1480 insertions(+) - create mode 100644 drivers/mmc/host/bcm2835.c - -diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig -index f08691a..a638cd0 100644 ---- a/drivers/mmc/host/Kconfig -+++ b/drivers/mmc/host/Kconfig -@@ -799,6 +799,20 @@ config MMC_TOSHIBA_PCI - depends on PCI - help - -+config MMC_BCM2835 -+ tristate "Broadcom BCM2835 SDHOST MMC Controller support" -+ depends on ARCH_BCM2835 || COMPILE_TEST -+ depends on HAS_DMA -+ help -+ This selects the BCM2835 SDHOST MMC controller. If you have -+ a BCM2835 platform with SD or MMC devices, say Y or M here. -+ -+ Note that the BCM2835 has two SD controllers: The Arasan -+ sdhci controller (supported by MMC_SDHCI_IPROC) and a custom -+ sdhost controller (supported by this driver). -+ -+ If unsure, say N. -+ - config MMC_MTK - tristate "MediaTek SD/MMC Card Interface support" - depends on HAS_DMA -diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile -index 6d548c4..bc2c2e2 100644 ---- a/drivers/mmc/host/Makefile -+++ b/drivers/mmc/host/Makefile -@@ -59,6 +59,7 @@ obj-$(CONFIG_MMC_MOXART) += moxart-mmc.o - obj-$(CONFIG_MMC_SUNXI) += sunxi-mmc.o - obj-$(CONFIG_MMC_USDHI6ROL0) += usdhi6rol0.o - obj-$(CONFIG_MMC_TOSHIBA_PCI) += toshsd.o -+obj-$(CONFIG_MMC_BCM2835) += bcm2835.o - - obj-$(CONFIG_MMC_REALTEK_PCI) += rtsx_pci_sdmmc.o - obj-$(CONFIG_MMC_REALTEK_USB) += rtsx_usb_sdmmc.o -diff --git a/drivers/mmc/host/bcm2835.c b/drivers/mmc/host/bcm2835.c -new file mode 100644 -index 0000000..7d1b0db7 ---- /dev/null -+++ b/drivers/mmc/host/bcm2835.c -@@ -0,0 +1,1465 @@ -+/* -+ * bcm2835 sdhost driver. -+ * -+ * The 2835 has two SD controllers: The Arasan sdhci controller -+ * (supported by the iproc driver) and a custom sdhost controller -+ * (supported by this driver). -+ * -+ * The sdhci controller supports both sdcard and sdio. The sdhost -+ * controller supports the sdcard only, but has better performance. -+ * Also note that the rpi3 has sdio wifi, so driving the sdcard with -+ * the sdhost controller allows to use the sdhci controller for wifi -+ * support. -+ * -+ * The configuration is done by devicetree via pin muxing. Both -+ * SD controller are available on the same pins (2 pin groups = pin 22 -+ * to 27 + pin 48 to 53). So it's possible to use both SD controllers -+ * at the same time with different pin groups. -+ * -+ * Author: Phil Elwell -+ * Copyright (C) 2015-2016 Raspberry Pi (Trading) Ltd. -+ * -+ * Based on -+ * mmc-bcm2835.c by Gellert Weisz -+ * which is, in turn, based on -+ * sdhci-bcm2708.c by Broadcom -+ * sdhci-bcm2835.c by Stephen Warren and Oleksandr Tymoshenko -+ * sdhci.c and sdhci-pci.c by Pierre Ossman -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms and conditions of the GNU General Public License, -+ * version 2, as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program. If not, see . -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#define SDCMD 0x00 /* Command to SD card - 16 R/W */ -+#define SDARG 0x04 /* Argument to SD card - 32 R/W */ -+#define SDTOUT 0x08 /* Start value for timeout counter - 32 R/W */ -+#define SDCDIV 0x0c /* Start value for clock divider - 11 R/W */ -+#define SDRSP0 0x10 /* SD card response (31:0) - 32 R */ -+#define SDRSP1 0x14 /* SD card response (63:32) - 32 R */ -+#define SDRSP2 0x18 /* SD card response (95:64) - 32 R */ -+#define SDRSP3 0x1c /* SD card response (127:96) - 32 R */ -+#define SDHSTS 0x20 /* SD host status - 11 R/W */ -+#define SDVDD 0x30 /* SD card power control - 1 R/W */ -+#define SDEDM 0x34 /* Emergency Debug Mode - 13 R/W */ -+#define SDHCFG 0x38 /* Host configuration - 2 R/W */ -+#define SDHBCT 0x3c /* Host byte count (debug) - 32 R/W */ -+#define SDDATA 0x40 /* Data to/from SD card - 32 R/W */ -+#define SDHBLC 0x50 /* Host block count (SDIO/SDHC) - 9 R/W */ -+ -+#define SDCMD_NEW_FLAG 0x8000 -+#define SDCMD_FAIL_FLAG 0x4000 -+#define SDCMD_BUSYWAIT 0x800 -+#define SDCMD_NO_RESPONSE 0x400 -+#define SDCMD_LONG_RESPONSE 0x200 -+#define SDCMD_WRITE_CMD 0x80 -+#define SDCMD_READ_CMD 0x40 -+#define SDCMD_CMD_MASK 0x3f -+ -+#define SDCDIV_MAX_CDIV 0x7ff -+ -+#define SDHSTS_BUSY_IRPT 0x400 -+#define SDHSTS_BLOCK_IRPT 0x200 -+#define SDHSTS_SDIO_IRPT 0x100 -+#define SDHSTS_REW_TIME_OUT 0x80 -+#define SDHSTS_CMD_TIME_OUT 0x40 -+#define SDHSTS_CRC16_ERROR 0x20 -+#define SDHSTS_CRC7_ERROR 0x10 -+#define SDHSTS_FIFO_ERROR 0x08 -+/* Reserved */ -+/* Reserved */ -+#define SDHSTS_DATA_FLAG 0x01 -+ -+#define SDHSTS_TRANSFER_ERROR_MASK (SDHSTS_CRC7_ERROR | \ -+ SDHSTS_CRC16_ERROR | \ -+ SDHSTS_REW_TIME_OUT | \ -+ SDHSTS_FIFO_ERROR) -+ -+#define SDHSTS_ERROR_MASK (SDHSTS_CMD_TIME_OUT | \ -+ SDHSTS_TRANSFER_ERROR_MASK) -+ -+#define SDHCFG_BUSY_IRPT_EN BIT(10) -+#define SDHCFG_BLOCK_IRPT_EN BIT(8) -+#define SDHCFG_SDIO_IRPT_EN BIT(5) -+#define SDHCFG_DATA_IRPT_EN BIT(4) -+#define SDHCFG_SLOW_CARD BIT(3) -+#define SDHCFG_WIDE_EXT_BUS BIT(2) -+#define SDHCFG_WIDE_INT_BUS BIT(1) -+#define SDHCFG_REL_CMD_LINE BIT(0) -+ -+#define SDVDD_POWER_OFF 0 -+#define SDVDD_POWER_ON 1 -+ -+#define SDEDM_FORCE_DATA_MODE BIT(19) -+#define SDEDM_CLOCK_PULSE BIT(20) -+#define SDEDM_BYPASS BIT(21) -+ -+#define SDEDM_WRITE_THRESHOLD_SHIFT 9 -+#define SDEDM_READ_THRESHOLD_SHIFT 14 -+#define SDEDM_THRESHOLD_MASK 0x1f -+ -+#define SDEDM_FSM_MASK 0xf -+#define SDEDM_FSM_IDENTMODE 0x0 -+#define SDEDM_FSM_DATAMODE 0x1 -+#define SDEDM_FSM_READDATA 0x2 -+#define SDEDM_FSM_WRITEDATA 0x3 -+#define SDEDM_FSM_READWAIT 0x4 -+#define SDEDM_FSM_READCRC 0x5 -+#define SDEDM_FSM_WRITECRC 0x6 -+#define SDEDM_FSM_WRITEWAIT1 0x7 -+#define SDEDM_FSM_POWERDOWN 0x8 -+#define SDEDM_FSM_POWERUP 0x9 -+#define SDEDM_FSM_WRITESTART1 0xa -+#define SDEDM_FSM_WRITESTART2 0xb -+#define SDEDM_FSM_GENPULSES 0xc -+#define SDEDM_FSM_WRITEWAIT2 0xd -+#define SDEDM_FSM_STARTPOWDOWN 0xf -+ -+#define SDDATA_FIFO_WORDS 16 -+ -+#define FIFO_READ_THRESHOLD 4 -+#define FIFO_WRITE_THRESHOLD 4 -+#define SDDATA_FIFO_PIO_BURST 8 -+ -+#define PIO_THRESHOLD 1 /* Maximum block count for PIO (0 = always DMA) */ -+ -+struct bcm2835_host { -+ spinlock_t lock; -+ struct mutex mutex; -+ -+ void __iomem *ioaddr; -+ u32 phys_addr; -+ -+ struct mmc_host *mmc; -+ struct platform_device *pdev; -+ -+ int clock; /* Current clock speed */ -+ unsigned int max_clk; /* Max possible freq */ -+ struct work_struct dma_work; -+ struct delayed_work timeout_work; /* Timer for timeouts */ -+ struct sg_mapping_iter sg_miter; /* SG state for PIO */ -+ unsigned int blocks; /* remaining PIO blocks */ -+ int irq; /* Device IRQ */ -+ -+ u32 ns_per_fifo_word; -+ -+ /* cached registers */ -+ u32 hcfg; -+ u32 cdiv; -+ -+ struct mmc_request *mrq; /* Current request */ -+ struct mmc_command *cmd; /* Current command */ -+ struct mmc_data *data; /* Current data request */ -+ bool data_complete:1;/* Data finished before cmd */ -+ bool use_busy:1; /* Wait for busy interrupt */ -+ bool use_sbc:1; /* Send CMD23 */ -+ -+ /* for threaded irq handler */ -+ bool irq_block; -+ bool irq_busy; -+ bool irq_data; -+ -+ /* DMA part */ -+ struct dma_chan *dma_chan_rxtx; -+ struct dma_chan *dma_chan; -+ struct dma_slave_config dma_cfg_rx; -+ struct dma_slave_config dma_cfg_tx; -+ struct dma_async_tx_descriptor *dma_desc; -+ u32 dma_dir; -+ u32 drain_words; -+ struct page *drain_page; -+ u32 drain_offset; -+ bool use_dma; -+}; -+ -+static void bcm2835_dumpcmd(struct bcm2835_host *host, struct mmc_command *cmd, -+ const char *label) -+{ -+ struct device *dev = &host->pdev->dev; -+ -+ if (!cmd) -+ return; -+ -+ dev_dbg(dev, "%c%s op %d arg 0x%x flags 0x%x - resp %08x %08x %08x %08x, err %d\n", -+ (cmd == host->cmd) ? '>' : ' ', -+ label, cmd->opcode, cmd->arg, cmd->flags, -+ cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3], -+ cmd->error); -+} -+ -+static void bcm2835_dumpregs(struct bcm2835_host *host) -+{ -+ struct mmc_request *mrq = host->mrq; -+ struct device *dev = &host->pdev->dev; -+ -+ if (mrq) { -+ bcm2835_dumpcmd(host, mrq->sbc, "sbc"); -+ bcm2835_dumpcmd(host, mrq->cmd, "cmd"); -+ if (mrq->data) { -+ dev_dbg(dev, "data blocks %x blksz %x - err %d\n", -+ mrq->data->blocks, -+ mrq->data->blksz, -+ mrq->data->error); -+ } -+ bcm2835_dumpcmd(host, mrq->stop, "stop"); -+ } -+ -+ dev_dbg(dev, "=========== REGISTER DUMP ===========\n"); -+ dev_dbg(dev, "SDCMD 0x%08x\n", readl(host->ioaddr + SDCMD)); -+ dev_dbg(dev, "SDARG 0x%08x\n", readl(host->ioaddr + SDARG)); -+ dev_dbg(dev, "SDTOUT 0x%08x\n", readl(host->ioaddr + SDTOUT)); -+ dev_dbg(dev, "SDCDIV 0x%08x\n", readl(host->ioaddr + SDCDIV)); -+ dev_dbg(dev, "SDRSP0 0x%08x\n", readl(host->ioaddr + SDRSP0)); -+ dev_dbg(dev, "SDRSP1 0x%08x\n", readl(host->ioaddr + SDRSP1)); -+ dev_dbg(dev, "SDRSP2 0x%08x\n", readl(host->ioaddr + SDRSP2)); -+ dev_dbg(dev, "SDRSP3 0x%08x\n", readl(host->ioaddr + SDRSP3)); -+ dev_dbg(dev, "SDHSTS 0x%08x\n", readl(host->ioaddr + SDHSTS)); -+ dev_dbg(dev, "SDVDD 0x%08x\n", readl(host->ioaddr + SDVDD)); -+ dev_dbg(dev, "SDEDM 0x%08x\n", readl(host->ioaddr + SDEDM)); -+ dev_dbg(dev, "SDHCFG 0x%08x\n", readl(host->ioaddr + SDHCFG)); -+ dev_dbg(dev, "SDHBCT 0x%08x\n", readl(host->ioaddr + SDHBCT)); -+ dev_dbg(dev, "SDHBLC 0x%08x\n", readl(host->ioaddr + SDHBLC)); -+ dev_dbg(dev, "===========================================\n"); -+} -+ -+static void bcm2835_reset_internal(struct bcm2835_host *host) -+{ -+ u32 temp; -+ -+ writel(SDVDD_POWER_OFF, host->ioaddr + SDVDD); -+ writel(0, host->ioaddr + SDCMD); -+ writel(0, host->ioaddr + SDARG); -+ writel(0xf00000, host->ioaddr + SDTOUT); -+ writel(0, host->ioaddr + SDCDIV); -+ writel(0x7f8, host->ioaddr + SDHSTS); /* Write 1s to clear */ -+ writel(0, host->ioaddr + SDHCFG); -+ writel(0, host->ioaddr + SDHBCT); -+ writel(0, host->ioaddr + SDHBLC); -+ -+ /* Limit fifo usage due to silicon bug */ -+ temp = readl(host->ioaddr + SDEDM); -+ temp &= ~((SDEDM_THRESHOLD_MASK << SDEDM_READ_THRESHOLD_SHIFT) | -+ (SDEDM_THRESHOLD_MASK << SDEDM_WRITE_THRESHOLD_SHIFT)); -+ temp |= (FIFO_READ_THRESHOLD << SDEDM_READ_THRESHOLD_SHIFT) | -+ (FIFO_WRITE_THRESHOLD << SDEDM_WRITE_THRESHOLD_SHIFT); -+ writel(temp, host->ioaddr + SDEDM); -+ msleep(20); -+ writel(SDVDD_POWER_ON, host->ioaddr + SDVDD); -+ msleep(20); -+ host->clock = 0; -+ writel(host->hcfg, host->ioaddr + SDHCFG); -+ writel(host->cdiv, host->ioaddr + SDCDIV); -+} -+ -+static void bcm2835_reset(struct mmc_host *mmc) -+{ -+ struct bcm2835_host *host = mmc_priv(mmc); -+ -+ if (host->dma_chan) -+ dmaengine_terminate_sync(host->dma_chan); -+ bcm2835_reset_internal(host); -+} -+ -+static void bcm2835_finish_command(struct bcm2835_host *host); -+ -+static void bcm2835_wait_transfer_complete(struct bcm2835_host *host) -+{ -+ int timediff; -+ u32 alternate_idle; -+ -+ alternate_idle = (host->mrq->data->flags & MMC_DATA_READ) ? -+ SDEDM_FSM_READWAIT : SDEDM_FSM_WRITESTART1; -+ -+ timediff = 0; -+ -+ while (1) { -+ u32 edm, fsm; -+ -+ edm = readl(host->ioaddr + SDEDM); -+ fsm = edm & SDEDM_FSM_MASK; -+ -+ if ((fsm == SDEDM_FSM_IDENTMODE) || -+ (fsm == SDEDM_FSM_DATAMODE)) -+ break; -+ if (fsm == alternate_idle) { -+ writel(edm | SDEDM_FORCE_DATA_MODE, -+ host->ioaddr + SDEDM); -+ break; -+ } -+ -+ timediff++; -+ if (timediff == 100000) { -+ dev_err(&host->pdev->dev, -+ "wait_transfer_complete - still waiting after %d retries\n", -+ timediff); -+ bcm2835_dumpregs(host); -+ host->mrq->data->error = -ETIMEDOUT; -+ return; -+ } -+ cpu_relax(); -+ } -+} -+ -+static void bcm2835_dma_complete(void *param) -+{ -+ struct bcm2835_host *host = param; -+ -+ schedule_work(&host->dma_work); -+} -+ -+static void bcm2835_transfer_block_pio(struct bcm2835_host *host, bool is_read) -+{ -+ unsigned long flags; -+ size_t blksize; -+ unsigned long wait_max; -+ -+ blksize = host->data->blksz; -+ -+ wait_max = jiffies + msecs_to_jiffies(500); -+ -+ local_irq_save(flags); -+ -+ while (blksize) { -+ int copy_words; -+ u32 hsts = 0; -+ size_t len; -+ u32 *buf; -+ -+ if (!sg_miter_next(&host->sg_miter)) { -+ host->data->error = -EINVAL; -+ break; -+ } -+ -+ len = min(host->sg_miter.length, blksize); -+ if (len % 4) { -+ host->data->error = -EINVAL; -+ break; -+ } -+ -+ blksize -= len; -+ host->sg_miter.consumed = len; -+ -+ buf = (u32 *)host->sg_miter.addr; -+ -+ copy_words = len / 4; -+ -+ while (copy_words) { -+ int burst_words, words; -+ u32 edm; -+ -+ burst_words = min(SDDATA_FIFO_PIO_BURST, copy_words); -+ edm = readl(host->ioaddr + SDEDM); -+ if (is_read) -+ words = ((edm >> 4) & 0x1f); -+ else -+ words = SDDATA_FIFO_WORDS - ((edm >> 4) & 0x1f); -+ -+ if (words < burst_words) { -+ int fsm_state = (edm & SDEDM_FSM_MASK); -+ struct device *dev = &host->pdev->dev; -+ -+ if ((is_read && -+ (fsm_state != SDEDM_FSM_READDATA && -+ fsm_state != SDEDM_FSM_READWAIT && -+ fsm_state != SDEDM_FSM_READCRC)) || -+ (!is_read && -+ (fsm_state != SDEDM_FSM_WRITEDATA && -+ fsm_state != SDEDM_FSM_WRITESTART1 && -+ fsm_state != SDEDM_FSM_WRITESTART2))) { -+ hsts = readl(host->ioaddr + SDHSTS); -+ dev_err(dev, "fsm %x, hsts %08x\n", -+ fsm_state, hsts); -+ if (hsts & SDHSTS_ERROR_MASK) -+ break; -+ } -+ -+ if (time_after(jiffies, wait_max)) { -+ dev_err(dev, "PIO %s timeout - EDM %08x\n", -+ is_read ? "read" : "write", -+ edm); -+ hsts = SDHSTS_REW_TIME_OUT; -+ break; -+ } -+ ndelay((burst_words - words) * -+ host->ns_per_fifo_word); -+ continue; -+ } else if (words > copy_words) { -+ words = copy_words; -+ } -+ -+ copy_words -= words; -+ -+ while (words) { -+ if (is_read) -+ *(buf++) = readl(host->ioaddr + SDDATA); -+ else -+ writel(*(buf++), host->ioaddr + SDDATA); -+ words--; -+ } -+ } -+ -+ if (hsts & SDHSTS_ERROR_MASK) -+ break; -+ } -+ -+ sg_miter_stop(&host->sg_miter); -+ -+ local_irq_restore(flags); -+} -+ -+static void bcm2835_transfer_pio(struct bcm2835_host *host) -+{ -+ struct device *dev = &host->pdev->dev; -+ u32 sdhsts; -+ bool is_read; -+ -+ is_read = (host->data->flags & MMC_DATA_READ) != 0; -+ bcm2835_transfer_block_pio(host, is_read); -+ -+ sdhsts = readl(host->ioaddr + SDHSTS); -+ if (sdhsts & (SDHSTS_CRC16_ERROR | -+ SDHSTS_CRC7_ERROR | -+ SDHSTS_FIFO_ERROR)) { -+ dev_err(dev, "%s transfer error - HSTS %08x\n", -+ is_read ? "read" : "write", sdhsts); -+ host->data->error = -EILSEQ; -+ } else if ((sdhsts & (SDHSTS_CMD_TIME_OUT | -+ SDHSTS_REW_TIME_OUT))) { -+ dev_err(dev, "%s timeout error - HSTS %08x\n", -+ is_read ? "read" : "write", sdhsts); -+ host->data->error = -ETIMEDOUT; -+ } -+} -+ -+static -+void bcm2835_prepare_dma(struct bcm2835_host *host, struct mmc_data *data) -+{ -+ int len, dir_data, dir_slave; -+ struct dma_async_tx_descriptor *desc = NULL; -+ struct dma_chan *dma_chan; -+ -+ dma_chan = host->dma_chan_rxtx; -+ if (data->flags & MMC_DATA_READ) { -+ dir_data = DMA_FROM_DEVICE; -+ dir_slave = DMA_DEV_TO_MEM; -+ } else { -+ dir_data = DMA_TO_DEVICE; -+ dir_slave = DMA_MEM_TO_DEV; -+ } -+ -+ /* The block doesn't manage the FIFO DREQs properly for -+ * multi-block transfers, so don't attempt to DMA the final -+ * few words. Unfortunately this requires the final sg entry -+ * to be trimmed. N.B. This code demands that the overspill -+ * is contained in a single sg entry. -+ */ -+ -+ host->drain_words = 0; -+ if ((data->blocks > 1) && (dir_data == DMA_FROM_DEVICE)) { -+ struct scatterlist *sg; -+ u32 len; -+ int i; -+ -+ len = min((u32)(FIFO_READ_THRESHOLD - 1) * 4, -+ (u32)data->blocks * data->blksz); -+ -+ for_each_sg(data->sg, sg, data->sg_len, i) { -+ if (sg_is_last(sg)) { -+ WARN_ON(sg->length < len); -+ sg->length -= len; -+ host->drain_page = sg_page(sg); -+ host->drain_offset = sg->offset + sg->length; -+ } -+ } -+ host->drain_words = len / 4; -+ } -+ -+ /* The parameters have already been validated, so this will not fail */ -+ (void)dmaengine_slave_config(dma_chan, -+ (dir_data == DMA_FROM_DEVICE) ? -+ &host->dma_cfg_rx : -+ &host->dma_cfg_tx); -+ -+ len = dma_map_sg(dma_chan->device->dev, data->sg, data->sg_len, -+ dir_data); -+ -+ if (len > 0) { -+ desc = dmaengine_prep_slave_sg(dma_chan, data->sg, -+ len, dir_slave, -+ DMA_PREP_INTERRUPT | -+ DMA_CTRL_ACK); -+ } -+ -+ if (desc) { -+ desc->callback = bcm2835_dma_complete; -+ desc->callback_param = host; -+ host->dma_desc = desc; -+ host->dma_chan = dma_chan; -+ host->dma_dir = dir_data; -+ } -+} -+ -+static void bcm2835_start_dma(struct bcm2835_host *host) -+{ -+ dmaengine_submit(host->dma_desc); -+ dma_async_issue_pending(host->dma_chan); -+} -+ -+static void bcm2835_set_transfer_irqs(struct bcm2835_host *host) -+{ -+ u32 all_irqs = SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN | -+ SDHCFG_BUSY_IRPT_EN; -+ -+ if (host->dma_desc) { -+ host->hcfg = (host->hcfg & ~all_irqs) | -+ SDHCFG_BUSY_IRPT_EN; -+ } else { -+ host->hcfg = (host->hcfg & ~all_irqs) | -+ SDHCFG_DATA_IRPT_EN | -+ SDHCFG_BUSY_IRPT_EN; -+ } -+ -+ writel(host->hcfg, host->ioaddr + SDHCFG); -+} -+ -+static -+void bcm2835_prepare_data(struct bcm2835_host *host, struct mmc_command *cmd) -+{ -+ struct mmc_data *data = cmd->data; -+ -+ WARN_ON(host->data); -+ -+ host->data = data; -+ if (!data) -+ return; -+ -+ host->data_complete = false; -+ host->data->bytes_xfered = 0; -+ -+ if (!host->dma_desc) { -+ /* Use PIO */ -+ int flags = SG_MITER_ATOMIC; -+ -+ if (data->flags & MMC_DATA_READ) -+ flags |= SG_MITER_TO_SG; -+ else -+ flags |= SG_MITER_FROM_SG; -+ sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); -+ host->blocks = data->blocks; -+ } -+ -+ bcm2835_set_transfer_irqs(host); -+ -+ writel(data->blksz, host->ioaddr + SDHBCT); -+ writel(data->blocks, host->ioaddr + SDHBLC); -+} -+ -+static u32 bcm2835_read_wait_sdcmd(struct bcm2835_host *host, u32 max_ms) -+{ -+ struct device *dev = &host->pdev->dev; -+ u32 value; -+ int ret; -+ -+ ret = readl_poll_timeout(host->ioaddr + SDCMD, value, -+ !(value & SDCMD_NEW_FLAG), 1, 10); -+ if (ret == -ETIMEDOUT) -+ /* if it takes a while make poll interval bigger */ -+ ret = readl_poll_timeout(host->ioaddr + SDCMD, value, -+ !(value & SDCMD_NEW_FLAG), -+ 10, max_ms * 1000); -+ if (ret == -ETIMEDOUT) -+ dev_err(dev, "%s: timeout (%d ms)\n", __func__, max_ms); -+ -+ return value; -+} -+ -+static void bcm2835_finish_request(struct bcm2835_host *host) -+{ -+ struct dma_chan *terminate_chan = NULL; -+ struct mmc_request *mrq; -+ -+ cancel_delayed_work(&host->timeout_work); -+ -+ mrq = host->mrq; -+ -+ host->mrq = NULL; -+ host->cmd = NULL; -+ host->data = NULL; -+ -+ host->dma_desc = NULL; -+ terminate_chan = host->dma_chan; -+ host->dma_chan = NULL; -+ -+ if (terminate_chan) { -+ int err = dmaengine_terminate_all(terminate_chan); -+ -+ if (err) -+ dev_err(&host->pdev->dev, -+ "failed to terminate DMA (%d)\n", err); -+ } -+ -+ mmc_request_done(host->mmc, mrq); -+} -+ -+static -+bool bcm2835_send_command(struct bcm2835_host *host, struct mmc_command *cmd) -+{ -+ struct device *dev = &host->pdev->dev; -+ u32 sdcmd, sdhsts; -+ unsigned long timeout; -+ -+ WARN_ON(host->cmd); -+ -+ sdcmd = bcm2835_read_wait_sdcmd(host, 100); -+ if (sdcmd & SDCMD_NEW_FLAG) { -+ dev_err(dev, "previous command never completed.\n"); -+ bcm2835_dumpregs(host); -+ cmd->error = -EILSEQ; -+ bcm2835_finish_request(host); -+ return false; -+ } -+ -+ if (!cmd->data && cmd->busy_timeout > 9000) -+ timeout = DIV_ROUND_UP(cmd->busy_timeout, 1000) * HZ + HZ; -+ else -+ timeout = 10 * HZ; -+ schedule_delayed_work(&host->timeout_work, timeout); -+ -+ host->cmd = cmd; -+ -+ /* Clear any error flags */ -+ sdhsts = readl(host->ioaddr + SDHSTS); -+ if (sdhsts & SDHSTS_ERROR_MASK) -+ writel(sdhsts, host->ioaddr + SDHSTS); -+ -+ if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { -+ dev_err(dev, "unsupported response type!\n"); -+ cmd->error = -EINVAL; -+ bcm2835_finish_request(host); -+ return false; -+ } -+ -+ bcm2835_prepare_data(host, cmd); -+ -+ writel(cmd->arg, host->ioaddr + SDARG); -+ -+ sdcmd = cmd->opcode & SDCMD_CMD_MASK; -+ -+ host->use_busy = false; -+ if (!(cmd->flags & MMC_RSP_PRESENT)) { -+ sdcmd |= SDCMD_NO_RESPONSE; -+ } else { -+ if (cmd->flags & MMC_RSP_136) -+ sdcmd |= SDCMD_LONG_RESPONSE; -+ if (cmd->flags & MMC_RSP_BUSY) { -+ sdcmd |= SDCMD_BUSYWAIT; -+ host->use_busy = true; -+ } -+ } -+ -+ if (cmd->data) { -+ if (cmd->data->flags & MMC_DATA_WRITE) -+ sdcmd |= SDCMD_WRITE_CMD; -+ if (cmd->data->flags & MMC_DATA_READ) -+ sdcmd |= SDCMD_READ_CMD; -+ } -+ -+ writel(sdcmd | SDCMD_NEW_FLAG, host->ioaddr + SDCMD); -+ -+ return true; -+} -+ -+static void bcm2835_transfer_complete(struct bcm2835_host *host) -+{ -+ struct mmc_data *data; -+ -+ WARN_ON(!host->data_complete); -+ -+ data = host->data; -+ host->data = NULL; -+ -+ /* Need to send CMD12 if - -+ * a) open-ended multiblock transfer (no CMD23) -+ * b) error in multiblock transfer -+ */ -+ if (host->mrq->stop && (data->error || !host->use_sbc)) { -+ if (bcm2835_send_command(host, host->mrq->stop)) { -+ /* No busy, so poll for completion */ -+ if (!host->use_busy) -+ bcm2835_finish_command(host); -+ } -+ } else { -+ bcm2835_wait_transfer_complete(host); -+ bcm2835_finish_request(host); -+ } -+} -+ -+static void bcm2835_finish_data(struct bcm2835_host *host) -+{ -+ struct device *dev = &host->pdev->dev; -+ struct mmc_data *data; -+ -+ data = host->data; -+ -+ host->hcfg &= ~(SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN); -+ writel(host->hcfg, host->ioaddr + SDHCFG); -+ -+ data->bytes_xfered = data->error ? 0 : (data->blksz * data->blocks); -+ -+ host->data_complete = true; -+ -+ if (host->cmd) { -+ /* Data managed to finish before the -+ * command completed. Make sure we do -+ * things in the proper order. -+ */ -+ dev_dbg(dev, "Finished early - HSTS %08x\n", -+ readl(host->ioaddr + SDHSTS)); -+ } else { -+ bcm2835_transfer_complete(host); -+ } -+} -+ -+static void bcm2835_finish_command(struct bcm2835_host *host) -+{ -+ struct device *dev = &host->pdev->dev; -+ struct mmc_command *cmd = host->cmd; -+ u32 sdcmd; -+ -+ sdcmd = bcm2835_read_wait_sdcmd(host, 100); -+ -+ /* Check for errors */ -+ if (sdcmd & SDCMD_NEW_FLAG) { -+ dev_err(dev, "command never completed.\n"); -+ bcm2835_dumpregs(host); -+ host->cmd->error = -EIO; -+ bcm2835_finish_request(host); -+ return; -+ } else if (sdcmd & SDCMD_FAIL_FLAG) { -+ u32 sdhsts = readl(host->ioaddr + SDHSTS); -+ -+ /* Clear the errors */ -+ writel(SDHSTS_ERROR_MASK, host->ioaddr + SDHSTS); -+ -+ if (!(sdhsts & SDHSTS_CRC7_ERROR) || -+ (host->cmd->opcode != MMC_SEND_OP_COND)) { -+ if (sdhsts & SDHSTS_CMD_TIME_OUT) { -+ host->cmd->error = -ETIMEDOUT; -+ } else { -+ dev_err(dev, "unexpected command %d error\n", -+ host->cmd->opcode); -+ bcm2835_dumpregs(host); -+ host->cmd->error = -EILSEQ; -+ } -+ bcm2835_finish_request(host); -+ return; -+ } -+ } -+ -+ if (cmd->flags & MMC_RSP_PRESENT) { -+ if (cmd->flags & MMC_RSP_136) { -+ int i; -+ -+ for (i = 0; i < 4; i++) { -+ cmd->resp[3 - i] = -+ readl(host->ioaddr + SDRSP0 + i * 4); -+ } -+ } else { -+ cmd->resp[0] = readl(host->ioaddr + SDRSP0); -+ } -+ } -+ -+ if (cmd == host->mrq->sbc) { -+ /* Finished CMD23, now send actual command. */ -+ host->cmd = NULL; -+ if (bcm2835_send_command(host, host->mrq->cmd)) { -+ if (host->data && host->dma_desc) -+ /* DMA transfer starts now, PIO starts -+ * after irq -+ */ -+ bcm2835_start_dma(host); -+ -+ if (!host->use_busy) -+ bcm2835_finish_command(host); -+ } -+ } else if (cmd == host->mrq->stop) { -+ /* Finished CMD12 */ -+ bcm2835_finish_request(host); -+ } else { -+ /* Processed actual command. */ -+ host->cmd = NULL; -+ if (!host->data) -+ bcm2835_finish_request(host); -+ else if (host->data_complete) -+ bcm2835_transfer_complete(host); -+ } -+} -+ -+static void bcm2835_timeout(struct work_struct *work) -+{ -+ struct delayed_work *d = to_delayed_work(work); -+ struct bcm2835_host *host = -+ container_of(d, struct bcm2835_host, timeout_work); -+ struct device *dev = &host->pdev->dev; -+ -+ mutex_lock(&host->mutex); -+ -+ if (host->mrq) { -+ dev_err(dev, "timeout waiting for hardware interrupt.\n"); -+ bcm2835_dumpregs(host); -+ -+ if (host->data) { -+ host->data->error = -ETIMEDOUT; -+ bcm2835_finish_data(host); -+ } else { -+ if (host->cmd) -+ host->cmd->error = -ETIMEDOUT; -+ else -+ host->mrq->cmd->error = -ETIMEDOUT; -+ -+ bcm2835_finish_request(host); -+ } -+ } -+ -+ mutex_unlock(&host->mutex); -+} -+ -+static bool bcm2835_check_cmd_error(struct bcm2835_host *host, u32 intmask) -+{ -+ struct device *dev = &host->pdev->dev; -+ -+ if (!(intmask & SDHSTS_ERROR_MASK)) -+ return false; -+ -+ if (!host->cmd) -+ return true; -+ -+ dev_err(dev, "sdhost_busy_irq: intmask %08x\n", intmask); -+ if (intmask & SDHSTS_CRC7_ERROR) { -+ host->cmd->error = -EILSEQ; -+ } else if (intmask & (SDHSTS_CRC16_ERROR | -+ SDHSTS_FIFO_ERROR)) { -+ if (host->mrq->data) -+ host->mrq->data->error = -EILSEQ; -+ else -+ host->cmd->error = -EILSEQ; -+ } else if (intmask & SDHSTS_REW_TIME_OUT) { -+ if (host->mrq->data) -+ host->mrq->data->error = -ETIMEDOUT; -+ else -+ host->cmd->error = -ETIMEDOUT; -+ } else if (intmask & SDHSTS_CMD_TIME_OUT) { -+ host->cmd->error = -ETIMEDOUT; -+ } -+ bcm2835_dumpregs(host); -+ return true; -+} -+ -+static void bcm2835_check_data_error(struct bcm2835_host *host, u32 intmask) -+{ -+ if (!host->data) -+ return; -+ if (intmask & (SDHSTS_CRC16_ERROR | SDHSTS_FIFO_ERROR)) -+ host->data->error = -EILSEQ; -+ if (intmask & SDHSTS_REW_TIME_OUT) -+ host->data->error = -ETIMEDOUT; -+} -+ -+static void bcm2835_busy_irq(struct bcm2835_host *host) -+{ -+ if (WARN_ON(!host->cmd)) { -+ bcm2835_dumpregs(host); -+ return; -+ } -+ -+ if (WARN_ON(!host->use_busy)) { -+ bcm2835_dumpregs(host); -+ return; -+ } -+ host->use_busy = false; -+ -+ bcm2835_finish_command(host); -+} -+ -+static void bcm2835_data_irq(struct bcm2835_host *host, u32 intmask) -+{ -+ /* There are no dedicated data/space available interrupt -+ * status bits, so it is necessary to use the single shared -+ * data/space available FIFO status bits. It is therefore not -+ * an error to get here when there is no data transfer in -+ * progress. -+ */ -+ if (!host->data) -+ return; -+ -+ bcm2835_check_data_error(host, intmask); -+ if (host->data->error) -+ goto finished; -+ -+ if (host->data->flags & MMC_DATA_WRITE) { -+ /* Use the block interrupt for writes after the first block */ -+ host->hcfg &= ~(SDHCFG_DATA_IRPT_EN); -+ host->hcfg |= SDHCFG_BLOCK_IRPT_EN; -+ writel(host->hcfg, host->ioaddr + SDHCFG); -+ bcm2835_transfer_pio(host); -+ } else { -+ bcm2835_transfer_pio(host); -+ host->blocks--; -+ if ((host->blocks == 0) || host->data->error) -+ goto finished; -+ } -+ return; -+ -+finished: -+ host->hcfg &= ~(SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN); -+ writel(host->hcfg, host->ioaddr + SDHCFG); -+} -+ -+static void bcm2835_data_threaded_irq(struct bcm2835_host *host) -+{ -+ if (!host->data) -+ return; -+ if ((host->blocks == 0) || host->data->error) -+ bcm2835_finish_data(host); -+} -+ -+static void bcm2835_block_irq(struct bcm2835_host *host) -+{ -+ if (WARN_ON(!host->data)) { -+ bcm2835_dumpregs(host); -+ return; -+ } -+ -+ if (!host->dma_desc) { -+ WARN_ON(!host->blocks); -+ if (host->data->error || (--host->blocks == 0)) -+ bcm2835_finish_data(host); -+ else -+ bcm2835_transfer_pio(host); -+ } else if (host->data->flags & MMC_DATA_WRITE) { -+ bcm2835_finish_data(host); -+ } -+} -+ -+static irqreturn_t bcm2835_irq(int irq, void *dev_id) -+{ -+ irqreturn_t result = IRQ_NONE; -+ struct bcm2835_host *host = dev_id; -+ u32 intmask; -+ -+ spin_lock(&host->lock); -+ -+ intmask = readl(host->ioaddr + SDHSTS); -+ -+ writel(SDHSTS_BUSY_IRPT | -+ SDHSTS_BLOCK_IRPT | -+ SDHSTS_SDIO_IRPT | -+ SDHSTS_DATA_FLAG, -+ host->ioaddr + SDHSTS); -+ -+ if (intmask & SDHSTS_BLOCK_IRPT) { -+ bcm2835_check_data_error(host, intmask); -+ host->irq_block = true; -+ result = IRQ_WAKE_THREAD; -+ } -+ -+ if (intmask & SDHSTS_BUSY_IRPT) { -+ if (!bcm2835_check_cmd_error(host, intmask)) { -+ host->irq_busy = true; -+ result = IRQ_WAKE_THREAD; -+ } else { -+ result = IRQ_HANDLED; -+ } -+ } -+ -+ /* There is no true data interrupt status bit, so it is -+ * necessary to qualify the data flag with the interrupt -+ * enable bit. -+ */ -+ if ((intmask & SDHSTS_DATA_FLAG) && -+ (host->hcfg & SDHCFG_DATA_IRPT_EN)) { -+ bcm2835_data_irq(host, intmask); -+ host->irq_data = true; -+ result = IRQ_WAKE_THREAD; -+ } -+ -+ spin_unlock(&host->lock); -+ -+ return result; -+} -+ -+static irqreturn_t bcm2835_threaded_irq(int irq, void *dev_id) -+{ -+ struct bcm2835_host *host = dev_id; -+ unsigned long flags; -+ bool block, busy, data; -+ -+ spin_lock_irqsave(&host->lock, flags); -+ -+ block = host->irq_block; -+ busy = host->irq_busy; -+ data = host->irq_data; -+ host->irq_block = false; -+ host->irq_busy = false; -+ host->irq_data = false; -+ -+ spin_unlock_irqrestore(&host->lock, flags); -+ -+ mutex_lock(&host->mutex); -+ -+ if (block) -+ bcm2835_block_irq(host); -+ if (busy) -+ bcm2835_busy_irq(host); -+ if (data) -+ bcm2835_data_threaded_irq(host); -+ -+ mutex_unlock(&host->mutex); -+ -+ return IRQ_HANDLED; -+} -+ -+static void bcm2835_dma_complete_work(struct work_struct *work) -+{ -+ struct bcm2835_host *host = -+ container_of(work, struct bcm2835_host, dma_work); -+ struct mmc_data *data = host->data; -+ -+ mutex_lock(&host->mutex); -+ -+ if (host->dma_chan) { -+ dma_unmap_sg(host->dma_chan->device->dev, -+ data->sg, data->sg_len, -+ host->dma_dir); -+ -+ host->dma_chan = NULL; -+ } -+ -+ if (host->drain_words) { -+ unsigned long flags; -+ void *page; -+ u32 *buf; -+ -+ if (host->drain_offset & PAGE_MASK) { -+ host->drain_page += host->drain_offset >> PAGE_SHIFT; -+ host->drain_offset &= ~PAGE_MASK; -+ } -+ local_irq_save(flags); -+ page = kmap_atomic(host->drain_page); -+ buf = page + host->drain_offset; -+ -+ while (host->drain_words) { -+ u32 edm = readl(host->ioaddr + SDEDM); -+ -+ if ((edm >> 4) & 0x1f) -+ *(buf++) = readl(host->ioaddr + SDDATA); -+ host->drain_words--; -+ } -+ -+ kunmap_atomic(page); -+ local_irq_restore(flags); -+ } -+ -+ bcm2835_finish_data(host); -+ -+ mutex_unlock(&host->mutex); -+} -+ -+static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock) -+{ -+ int div; -+ -+ /* The SDCDIV register has 11 bits, and holds (div - 2). But -+ * in data mode the max is 50MHz wihout a minimum, and only -+ * the bottom 3 bits are used. Since the switch over is -+ * automatic (unless we have marked the card as slow...), -+ * chosen values have to make sense in both modes. Ident mode -+ * must be 100-400KHz, so can range check the requested -+ * clock. CMD15 must be used to return to data mode, so this -+ * can be monitored. -+ * -+ * clock 250MHz -> 0->125MHz, 1->83.3MHz, 2->62.5MHz, 3->50.0MHz -+ * 4->41.7MHz, 5->35.7MHz, 6->31.3MHz, 7->27.8MHz -+ * -+ * 623->400KHz/27.8MHz -+ * reset value (507)->491159/50MHz -+ * -+ * BUT, the 3-bit clock divisor in data mode is too small if -+ * the core clock is higher than 250MHz, so instead use the -+ * SLOW_CARD configuration bit to force the use of the ident -+ * clock divisor at all times. -+ */ -+ -+ if (clock < 100000) { -+ /* Can't stop the clock, but make it as slow as possible -+ * to show willing -+ */ -+ host->cdiv = SDCDIV_MAX_CDIV; -+ writel(host->cdiv, host->ioaddr + SDCDIV); -+ return; -+ } -+ -+ div = host->max_clk / clock; -+ if (div < 2) -+ div = 2; -+ if ((host->max_clk / div) > clock) -+ div++; -+ div -= 2; -+ -+ if (div > SDCDIV_MAX_CDIV) -+ div = SDCDIV_MAX_CDIV; -+ -+ clock = host->max_clk / (div + 2); -+ host->mmc->actual_clock = clock; -+ -+ /* Calibrate some delays */ -+ -+ host->ns_per_fifo_word = (1000000000 / clock) * -+ ((host->mmc->caps & MMC_CAP_4_BIT_DATA) ? 8 : 32); -+ -+ host->cdiv = div; -+ writel(host->cdiv, host->ioaddr + SDCDIV); -+ -+ /* Set the timeout to 500ms */ -+ writel(host->mmc->actual_clock / 2, host->ioaddr + SDTOUT); -+} -+ -+static void bcm2835_request(struct mmc_host *mmc, struct mmc_request *mrq) -+{ -+ struct bcm2835_host *host = mmc_priv(mmc); -+ struct device *dev = &host->pdev->dev; -+ u32 edm, fsm; -+ -+ /* Reset the error statuses in case this is a retry */ -+ if (mrq->sbc) -+ mrq->sbc->error = 0; -+ if (mrq->cmd) -+ mrq->cmd->error = 0; -+ if (mrq->data) -+ mrq->data->error = 0; -+ if (mrq->stop) -+ mrq->stop->error = 0; -+ -+ if (mrq->data && !is_power_of_2(mrq->data->blksz)) { -+ dev_err(dev, "unsupported block size (%d bytes)\n", -+ mrq->data->blksz); -+ mrq->cmd->error = -EINVAL; -+ mmc_request_done(mmc, mrq); -+ return; -+ } -+ -+ if (host->use_dma && mrq->data && (mrq->data->blocks > PIO_THRESHOLD)) -+ bcm2835_prepare_dma(host, mrq->data); -+ -+ mutex_lock(&host->mutex); -+ -+ WARN_ON(host->mrq); -+ host->mrq = mrq; -+ -+ edm = readl(host->ioaddr + SDEDM); -+ fsm = edm & SDEDM_FSM_MASK; -+ -+ if ((fsm != SDEDM_FSM_IDENTMODE) && -+ (fsm != SDEDM_FSM_DATAMODE)) { -+ dev_err(dev, "previous command (%d) not complete (EDM %08x)\n", -+ readl(host->ioaddr + SDCMD) & SDCMD_CMD_MASK, -+ edm); -+ bcm2835_dumpregs(host); -+ mrq->cmd->error = -EILSEQ; -+ bcm2835_finish_request(host); -+ mutex_unlock(&host->mutex); -+ return; -+ } -+ -+ host->use_sbc = !!mrq->sbc && (host->mrq->data->flags & MMC_DATA_READ); -+ if (host->use_sbc) { -+ if (bcm2835_send_command(host, mrq->sbc)) { -+ if (!host->use_busy) -+ bcm2835_finish_command(host); -+ } -+ } else if (bcm2835_send_command(host, mrq->cmd)) { -+ if (host->data && host->dma_desc) { -+ /* DMA transfer starts now, PIO starts after irq */ -+ bcm2835_start_dma(host); -+ } -+ -+ if (!host->use_busy) -+ bcm2835_finish_command(host); -+ } -+ -+ mutex_unlock(&host->mutex); -+} -+ -+static void bcm2835_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) -+{ -+ struct bcm2835_host *host = mmc_priv(mmc); -+ -+ mutex_lock(&host->mutex); -+ -+ if (!ios->clock || ios->clock != host->clock) { -+ bcm2835_set_clock(host, ios->clock); -+ host->clock = ios->clock; -+ } -+ -+ /* set bus width */ -+ host->hcfg &= ~SDHCFG_WIDE_EXT_BUS; -+ if (ios->bus_width == MMC_BUS_WIDTH_4) -+ host->hcfg |= SDHCFG_WIDE_EXT_BUS; -+ -+ host->hcfg |= SDHCFG_WIDE_INT_BUS; -+ -+ /* Disable clever clock switching, to cope with fast core clocks */ -+ host->hcfg |= SDHCFG_SLOW_CARD; -+ -+ writel(host->hcfg, host->ioaddr + SDHCFG); -+ -+ mutex_unlock(&host->mutex); -+} -+ -+static struct mmc_host_ops bcm2835_ops = { -+ .request = bcm2835_request, -+ .set_ios = bcm2835_set_ios, -+ .hw_reset = bcm2835_reset, -+}; -+ -+static int bcm2835_add_host(struct bcm2835_host *host) -+{ -+ struct mmc_host *mmc = host->mmc; -+ struct device *dev = &host->pdev->dev; -+ char pio_limit_string[20]; -+ int ret; -+ -+ mmc->f_max = host->max_clk; -+ mmc->f_min = host->max_clk / SDCDIV_MAX_CDIV; -+ -+ mmc->max_busy_timeout = ~0 / (mmc->f_max / 1000); -+ -+ dev_dbg(dev, "f_max %d, f_min %d, max_busy_timeout %d\n", -+ mmc->f_max, mmc->f_min, mmc->max_busy_timeout); -+ -+ /* host controller capabilities */ -+ mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED | -+ MMC_CAP_NEEDS_POLL | MMC_CAP_HW_RESET | MMC_CAP_ERASE | -+ MMC_CAP_CMD23; -+ -+ spin_lock_init(&host->lock); -+ mutex_init(&host->mutex); -+ -+ if (IS_ERR_OR_NULL(host->dma_chan_rxtx)) { -+ dev_warn(dev, "unable to initialise DMA channel. Falling back to PIO\n"); -+ host->use_dma = false; -+ } else { -+ host->use_dma = true; -+ -+ host->dma_cfg_tx.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; -+ host->dma_cfg_tx.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; -+ host->dma_cfg_tx.slave_id = 13; /* DREQ channel */ -+ host->dma_cfg_tx.direction = DMA_MEM_TO_DEV; -+ host->dma_cfg_tx.src_addr = 0; -+ host->dma_cfg_tx.dst_addr = host->phys_addr + SDDATA; -+ -+ host->dma_cfg_rx.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; -+ host->dma_cfg_rx.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; -+ host->dma_cfg_rx.slave_id = 13; /* DREQ channel */ -+ host->dma_cfg_rx.direction = DMA_DEV_TO_MEM; -+ host->dma_cfg_rx.src_addr = host->phys_addr + SDDATA; -+ host->dma_cfg_rx.dst_addr = 0; -+ -+ if (dmaengine_slave_config(host->dma_chan_rxtx, -+ &host->dma_cfg_tx) != 0 || -+ dmaengine_slave_config(host->dma_chan_rxtx, -+ &host->dma_cfg_rx) != 0) -+ host->use_dma = false; -+ } -+ -+ mmc->max_segs = 128; -+ mmc->max_req_size = 524288; -+ mmc->max_seg_size = mmc->max_req_size; -+ mmc->max_blk_size = 1024; -+ mmc->max_blk_count = 65535; -+ -+ /* report supported voltage ranges */ -+ mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; -+ -+ INIT_WORK(&host->dma_work, bcm2835_dma_complete_work); -+ INIT_DELAYED_WORK(&host->timeout_work, bcm2835_timeout); -+ -+ /* Set interrupt enables */ -+ host->hcfg = SDHCFG_BUSY_IRPT_EN; -+ -+ bcm2835_reset_internal(host); -+ -+ ret = request_threaded_irq(host->irq, bcm2835_irq, -+ bcm2835_threaded_irq, -+ 0, mmc_hostname(mmc), host); -+ if (ret) { -+ dev_err(dev, "failed to request IRQ %d: %d\n", host->irq, ret); -+ return ret; -+ } -+ -+ ret = mmc_add_host(mmc); -+ if (ret) { -+ free_irq(host->irq, host); -+ return ret; -+ } -+ -+ pio_limit_string[0] = '\0'; -+ if (host->use_dma && (PIO_THRESHOLD > 0)) -+ sprintf(pio_limit_string, " (>%d)", PIO_THRESHOLD); -+ dev_info(dev, "loaded - DMA %s%s\n", -+ host->use_dma ? "enabled" : "disabled", pio_limit_string); -+ -+ return 0; -+} -+ -+static int bcm2835_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct clk *clk; -+ struct resource *iomem; -+ struct bcm2835_host *host; -+ struct mmc_host *mmc; -+ const __be32 *regaddr_p; -+ int ret; -+ -+ dev_dbg(dev, "%s\n", __func__); -+ mmc = mmc_alloc_host(sizeof(*host), dev); -+ if (!mmc) -+ return -ENOMEM; -+ -+ mmc->ops = &bcm2835_ops; -+ host = mmc_priv(mmc); -+ host->mmc = mmc; -+ host->pdev = pdev; -+ spin_lock_init(&host->lock); -+ -+ iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ host->ioaddr = devm_ioremap_resource(dev, iomem); -+ if (IS_ERR(host->ioaddr)) { -+ ret = PTR_ERR(host->ioaddr); -+ goto err; -+ } -+ -+ /* Parse OF address directly to get the physical address for -+ * DMA to our registers. -+ */ -+ regaddr_p = of_get_address(pdev->dev.of_node, 0, NULL, NULL); -+ if (!regaddr_p) { -+ dev_err(dev, "Can't get phys address\n"); -+ ret = -EINVAL; -+ goto err; -+ } -+ -+ host->phys_addr = be32_to_cpup(regaddr_p); -+ -+ host->dma_chan = NULL; -+ host->dma_desc = NULL; -+ -+ host->dma_chan_rxtx = dma_request_slave_channel(dev, "rx-tx"); -+ -+ clk = devm_clk_get(dev, NULL); -+ if (IS_ERR(clk)) { -+ ret = PTR_ERR(clk); -+ if (ret != -EPROBE_DEFER) -+ dev_err(dev, "could not get clk: %d\n", ret); -+ goto err; -+ } -+ -+ host->max_clk = clk_get_rate(clk); -+ -+ host->irq = platform_get_irq(pdev, 0); -+ if (host->irq <= 0) { -+ dev_err(dev, "get IRQ failed\n"); -+ ret = -EINVAL; -+ goto err; -+ } -+ -+ ret = mmc_of_parse(mmc); -+ if (ret) -+ goto err; -+ -+ ret = bcm2835_add_host(host); -+ if (ret) -+ goto err; -+ -+ platform_set_drvdata(pdev, host); -+ -+ dev_dbg(dev, "%s -> OK\n", __func__); -+ -+ return 0; -+ -+err: -+ dev_dbg(dev, "%s -> err %d\n", __func__, ret); -+ mmc_free_host(mmc); -+ -+ return ret; -+} -+ -+static int bcm2835_remove(struct platform_device *pdev) -+{ -+ struct bcm2835_host *host = platform_get_drvdata(pdev); -+ -+ mmc_remove_host(host->mmc); -+ -+ writel(SDVDD_POWER_OFF, host->ioaddr + SDVDD); -+ -+ free_irq(host->irq, host); -+ -+ cancel_work_sync(&host->dma_work); -+ cancel_delayed_work_sync(&host->timeout_work); -+ -+ mmc_free_host(host->mmc); -+ platform_set_drvdata(pdev, NULL); -+ -+ return 0; -+} -+ -+static const struct of_device_id bcm2835_match[] = { -+ { .compatible = "brcm,bcm2835-sdhost" }, -+ { } -+}; -+MODULE_DEVICE_TABLE(of, bcm2835_match); -+ -+static struct platform_driver bcm2835_driver = { -+ .probe = bcm2835_probe, -+ .remove = bcm2835_remove, -+ .driver = { -+ .name = "sdhost-bcm2835", -+ .of_match_table = bcm2835_match, -+ }, -+}; -+module_platform_driver(bcm2835_driver); -+ -+MODULE_ALIAS("platform:sdhost-bcm2835"); -+MODULE_DESCRIPTION("BCM2835 SDHost driver"); -+MODULE_LICENSE("GPL v2"); -+MODULE_AUTHOR("Phil Elwell"); -From patchwork Wed Mar 8 09:19:05 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,3/7] mmc: bcm2835: add sdhost controller to devicetree -From: Gerd Hoffmann -X-Patchwork-Id: 9610693 -Message-Id: <1488964751-22763-6-git-send-email-kraxel@redhat.com> -To: linux-rpi-kernel@lists.infradead.org -Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, - f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, - rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, - linux@armlinux.org.uk, - linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, - bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , - catalin.marinas@arm.com, linux-mmc@vger.kernel.org, - linux-arm-kernel@lists.infradead.org -Date: Wed, 8 Mar 2017 10:19:05 +0100 - -Signed-off-by: Gerd Hoffmann -Acked-by: Eric Anholt -Acked-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm2835-rpi.dtsi | 6 ++++++ - arch/arm/boot/dts/bcm283x.dtsi | 10 ++++++++++ - 2 files changed, 16 insertions(+) - -diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi -index 1e00a28..8b95832 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -69,6 +69,12 @@ - bus-width = <4>; - }; - -+&sdhost { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdhost_gpio48>; -+ bus-width = <4>; -+}; -+ - &pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>; -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index 9798bc9..19099a5 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -350,6 +350,16 @@ - arm,primecell-periphid = <0x00241011>; - }; - -+ sdhost: mmc@7e202000 { -+ compatible = "brcm,bcm2835-sdhost"; -+ reg = <0x7e202000 0x100>; -+ interrupts = <2 24>; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ dmas = <&dma 13>; -+ dma-names = "rx-tx"; -+ status = "disabled"; -+ }; -+ - i2s: i2s@7e203000 { - compatible = "brcm,bcm2835-i2s"; - reg = <0x7e203000 0x20>, -From patchwork Wed Mar 8 09:19:07 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4, 4/7] arm: set CONFIG_MMC_BCM2835=y in bcm2835_defconfig and - multi_v7_defconfig -From: Gerd Hoffmann -X-Patchwork-Id: 9610689 -Message-Id: <1488964751-22763-8-git-send-email-kraxel@redhat.com> -To: linux-rpi-kernel@lists.infradead.org -Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, - f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, - rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, - linux@armlinux.org.uk, - linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, - bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , - catalin.marinas@arm.com, linux-mmc@vger.kernel.org, - linux-arm-kernel@lists.infradead.org -Date: Wed, 8 Mar 2017 10:19:07 +0100 - -We need to enable this controller so that we can switch the SD card's -pinmux over to it by default, which will improve storage performance. - -Read access (dd with 64k blocks on rpi2): - CONFIG_MMC_SDHCI_IPROC: 11-12 MB/s - CONFIG_MMC_BCM2835: 19-20 MB/s - -Differences on write access are pretty much in the noise. - -Signed-off-by: Gerd Hoffmann ---- - arch/arm/configs/bcm2835_defconfig | 1 + - arch/arm/configs/multi_v7_defconfig | 1 + - 2 files changed, 2 insertions(+) - -diff --git a/arch/arm/configs/bcm2835_defconfig b/arch/arm/configs/bcm2835_defconfig -index 4b89f4e..3767c24 100644 ---- a/arch/arm/configs/bcm2835_defconfig -+++ b/arch/arm/configs/bcm2835_defconfig -@@ -92,6 +92,7 @@ CONFIG_MMC=y - CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_PLTFM=y - CONFIG_MMC_SDHCI_IPROC=y -+CONFIG_MMC_BCM2835=y - CONFIG_NEW_LEDS=y - CONFIG_LEDS_CLASS=y - CONFIG_LEDS_GPIO=y -diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig -index a94126f..63b94d0 100644 ---- a/arch/arm/configs/multi_v7_defconfig -+++ b/arch/arm/configs/multi_v7_defconfig -@@ -730,6 +730,7 @@ CONFIG_MMC_DW_EXYNOS=y - CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SH_MMCIF=y - CONFIG_MMC_SUNXI=y -+CONFIG_MMC_BCM2835=y - CONFIG_NEW_LEDS=y - CONFIG_LEDS_CLASS=y - CONFIG_LEDS_CLASS_FLASH=m -From patchwork Wed Mar 8 09:19:09 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,5/7] arm64: set CONFIG_MMC_BCM2835=y in defconfig -From: Gerd Hoffmann -X-Patchwork-Id: 9610647 -Message-Id: <1488964751-22763-10-git-send-email-kraxel@redhat.com> -To: linux-rpi-kernel@lists.infradead.org -Cc: mark.rutland@arm.com, stefan.wahren@i2se.com, ulf.hansson@linaro.org, - f.fainelli@gmail.com, sbranden@broadcom.com, devicetree@vger.kernel.org, - rjui@broadcom.com, lee@kernel.org, will.deacon@arm.com, - linux@armlinux.org.uk, - linux-kernel@vger.kernel.org, eric@anholt.net, robh+dt@kernel.org, - bcm-kernel-feedback-list@broadcom.com, Gerd Hoffmann , - catalin.marinas@arm.com, linux-mmc@vger.kernel.org, - linux-arm-kernel@lists.infradead.org -Date: Wed, 8 Mar 2017 10:19:09 +0100 - -We need to enable this controller so that we can switch the SD card's -pinmux over to it by default, which will improve storage performance. - -Read access (dd with 64k blocks on rpi2): - CONFIG_MMC_SDHCI_IPROC: 11-12 MB/s - CONFIG_MMC_BCM2835: 19-20 MB/s - -Differences on write access are pretty much in the noise. - -Signed-off-by: Gerd Hoffmann ---- - arch/arm64/configs/defconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig -index 7c48028..519a55c 100644 ---- a/arch/arm64/configs/defconfig -+++ b/arch/arm64/configs/defconfig -@@ -398,6 +398,7 @@ CONFIG_MMC_DW_EXYNOS=y - CONFIG_MMC_DW_K3=y - CONFIG_MMC_DW_ROCKCHIP=y - CONFIG_MMC_SUNXI=y -+CONFIG_MMC_BCM2835=y - CONFIG_NEW_LEDS=y - CONFIG_LEDS_CLASS=y - CONFIG_LEDS_GPIO=y -From patchwork Sat Mar 25 13:17:00 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: mmc: bcm2835: Fix possible NULL ptr dereference in bcm2835_request -From: Stefan Wahren -X-Patchwork-Id: 9644591 -Message-Id: <1490447820-751-1-git-send-email-stefan.wahren@i2se.com> -To: Ulf Hansson , Eric Anholt , - Gerd Hoffmann -Cc: Jaehoon Chung , - Dan Carpenter , - linux-rpi-kernel@lists.infradead.org, linux-mmc@vger.kernel.org, - Stefan Wahren -Date: Sat, 25 Mar 2017 13:17:00 +0000 - -This fixes a NULL pointer dereference in case of a MMC request with a -set block count command and no data. - -Reported-by: Dan Carpenter -Signed-off-by: Stefan Wahren ---- - drivers/mmc/host/bcm2835.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/mmc/host/bcm2835.c b/drivers/mmc/host/bcm2835.c -index 7d1b0db..1f343a4 100644 ---- a/drivers/mmc/host/bcm2835.c -+++ b/drivers/mmc/host/bcm2835.c -@@ -1200,7 +1200,8 @@ static void bcm2835_request(struct mmc_host *mmc, struct mmc_request *mrq) - return; - } - -- host->use_sbc = !!mrq->sbc && (host->mrq->data->flags & MMC_DATA_READ); -+ host->use_sbc = !!mrq->sbc && host->mrq->data && -+ (host->mrq->data->flags & MMC_DATA_READ); - if (host->use_sbc) { - if (bcm2835_send_command(host, mrq->sbc)) { - if (!host->use_busy) diff --git a/drm-i915-turn-off-wc-mmaps.patch b/drm-i915-turn-off-wc-mmaps.patch deleted file mode 100644 index c81b89226..000000000 --- a/drm-i915-turn-off-wc-mmaps.patch +++ /dev/null @@ -1,21 +0,0 @@ -From: Dave Airlie -Date: Thu, 4 Jun 2015 07:12:20 -0400 -Subject: [PATCH] drm: i915: turn off wc mmaps - ---- - drivers/gpu/drm/i915/i915_dma.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c -index d2df321ba634..775a5b11a366 100644 ---- a/drivers/gpu/drm/i915/i915_dma.c -+++ b/drivers/gpu/drm/i915/i915_dma.c -@@ -151,7 +151,7 @@ static int i915_getparam(struct drm_device *dev, void *data, - value = 1; - break; - case I915_PARAM_MMAP_VERSION: -- value = 1; -+ value = 0; - break; - case I915_PARAM_SUBSLICE_TOTAL: - value = INTEL_INFO(dev)->subslice_total; diff --git a/efi-lockdown.patch b/efi-lockdown.patch index 54a7caa24..e04878458 100644 --- a/efi-lockdown.patch +++ b/efi-lockdown.patch @@ -243,8 +243,8 @@ index 447905e..d44e60e 100644 #include +#include + #include #include