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drop ARM BBB patches, not sure they're useful now, we can add updated ones back if strictly necessary. Drop highbank patch, fixed differently upstream, seems to work

This commit is contained in:
Peter Robinson 2015-07-21 21:08:36 +01:00
parent ab1baf6d54
commit 001b058a11
7 changed files with 0 additions and 437 deletions
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42
arm-dts-am335x-bone-common-add-uart2_pins-uart4_pins.patch
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@ -1,42 +0,0 @@
From: Robert Nelson <robertcnelson@gmail.com>
Date: Thu, 13 Mar 2014 14:18:52 -0500
Subject: [PATCH] arm: dts: am335x-bone-common: add
uart2_pins/uart4_pins/uart5_pins
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
---
arch/arm/boot/dts/am335x-bone-common.dtsi | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index ab90dc7f00f3..528961b32e92 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -109,6 +109,27 @@
>;
};
+ uart2_pins: pinmux_uart2_pins {
+ pinctrl-single,pins = <
+ 0x150 0x21 /* spi0_sclk.uart2_rxd | MODE1 */
+ 0x154 0x01 /* spi0_d0.uart2_txd | MODE1 */
+ >;
+ };
+
+ uart4_pins: pinmux_uart4_pins {
+ pinctrl-single,pins = <
+ 0x070 0x26 /* gpmc_wait0.uart4_rxd | MODE6 */
+ 0x074 0x06 /* gpmc_wpn.uart4_txd | MODE6 */
+ >;
+ };
+
+ uart5_pins: pinmux_uart5_pins {
+ pinctrl-single,pins = <
+ 0x0C4 0x24 /* lcd_data9.uart5_rxd | MODE4 */
+ 0x0C0 0x04 /* lcd_data8.uart5_txd | MODE4 */
+ >;
+ };
+
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */

218
arm-dts-am335x-bone-common-setup-default-pinmux-http.patch
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@ -1,218 +0,0 @@
From: Robert Nelson <robertcnelson@gmail.com>
Date: Tue, 31 Dec 2013 14:18:00 -0600
Subject: [PATCH] arm: dts: am335x-bone-common: setup default pinmux
http://elinux.org/Basic_Proto_Cape
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
---
arch/arm/boot/dts/am335x-bone-common.dtsi | 171 ++++++++++++++++++++++++++++++
1 file changed, 171 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index fec78349c1f3..ab90dc7f00f3 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -95,6 +95,20 @@
>;
};
+ uart1_pins: pinmux_uart1_pins {
+ pinctrl-single,pins = <
+ 0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
+ 0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
+ >;
+ };
+
+ uart1_pins: pinmux_uart1_pins {
+ pinctrl-single,pins = <
+ 0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
+ 0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
+ >;
+ };
+
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
@@ -175,6 +189,60 @@
0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
>;
};
+
+ spi0_pins: pinmux_spi0_pins {
+ pinctrl-single,pins = <
+ 0x150 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */
+ 0x154 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
+ 0x158 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
+ 0x15c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
+ >;
+ };
+
+ ehrpwm1_pin_p9_14: pinmux_ehrpwm1_pin_p9_14 {
+ pinctrl-single,pins = <
+ 0x048 0x6 /* P9_14 (ZCZ ball U14) | MODE 6 */
+ >;
+ };
+
+ ehrpwm1_pin_p9_16: pinmux_ehrpwm1_pin_p9_16 {
+ pinctrl-single,pins = <
+ 0x04c 0x6 /* P9_16 (ZCZ ball T14) | MODE 6 */
+ >;
+ };
+
+ ecap0_pin_p9_42: pinmux_ecap0_pin_p9_42 {
+ pinctrl-single,pins = <
+ 0x164 0x0 /* P9_42 (ZCZ ball C18) | MODE 0 */
+ >;
+ };
+
+ spi0_pins: pinmux_spi0_pins {
+ pinctrl-single,pins = <
+ 0x150 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */
+ 0x154 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
+ 0x158 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
+ 0x15c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
+ >;
+ };
+
+ ehrpwm1_pin_p9_14: pinmux_ehrpwm1_pin_p9_14 {
+ pinctrl-single,pins = <
+ 0x048 0x6 /* P9_14 (ZCZ ball U14) | MODE 6 */
+ >;
+ };
+
+ ehrpwm1_pin_p9_16: pinmux_ehrpwm1_pin_p9_16 {
+ pinctrl-single,pins = <
+ 0x04c 0x6 /* P9_16 (ZCZ ball T14) | MODE 6 */
+ >;
+ };
+
+ ecap0_pin_p9_42: pinmux_ecap0_pin_p9_42 {
+ pinctrl-single,pins = <
+ 0x164 0x0 /* P9_42 (ZCZ ball C18) | MODE 0 */
+ >;
+ };
};
&uart0 {
@@ -184,6 +252,20 @@
status = "okay";
};
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+
+ status = "okay";
+};
+
&usb {
status = "okay";
};
@@ -285,6 +367,55 @@
};
};
+&epwmss0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ecap0_pin_p9_42>;
+ status = "okay";
+
+ ecap@48300100 {
+ status = "okay";
+ };
+};
+
+&epwmss1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &ehrpwm1_pin_p9_14
+ &ehrpwm1_pin_p9_16
+ >;
+
+ status = "okay";
+
+ ehrpwm@48302200 {
+ status = "okay";
+ };
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ status = "okay";
+
+ spidev0: spi@0 {
+ compatible = "spidev";
+ reg = <0>;
+ spi-max-frequency = <16000000>;
+ spi-cpha;
+ };
+
+ spidev1: spi@1 {
+ compatible = "spidev";
+ reg = <1>;
+ spi-max-frequency = <16000000>;
+ };
+};
+
+&tscadc {
+ status = "okay";
+ adc {
+ ti,adc-channels = <4 5 6>;
+ };
+};
/include/ "tps65217.dtsi"
@@ -393,4 +524,44 @@
&sham {
status = "okay";
+
+};
+
+/ {
+ ocp {
+ //FIXME: these pwm's still need work, this guild isn't working..
+ //http://elinux.org/EBC_Exercise_13_Pulse_Width_Modulation
+ pwm_test_P9_14@0 {
+ compatible = "pwm_test";
+ pwms = <&ehrpwm1 0 500000 1>;
+ pwm-names = "PWM_P9_14";
+ pinctrl-names = "default";
+ pinctrl-0 = <&ehrpwm1_pin_p9_14>;
+ enabled = <1>;
+ duty = <0>;
+ status = "okay";
+ };
+
+ pwm_test_P9_16@0 {
+ compatible = "pwm_test";
+ pwms = <&ehrpwm1 0 500000 1>;
+ pwm-names = "PWM_P9_16";
+ pinctrl-names = "default";
+ pinctrl-0 = <&ehrpwm1_pin_p9_16>;
+ enabled = <1>;
+ duty = <0>;
+ status = "okay";
+ };
+
+ pwm_test_P9_42 {
+ compatible = "pwm_test";
+ pwms = <&ecap0 0 500000 1>;
+ pwm-names = "PWM_P9_42";
+ pinctrl-names = "default";
+ pinctrl-0 = <&ecap0_pin_p9_42>;
+ enabled = <1>;
+ duty = <0>;
+ status = "okay";
+ };
+ };
};

38
arm-dts-am335x-boneblack-add-cpu0-opp-points.patch
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@ -1,38 +0,0 @@
From: Robert Nelson <robertcnelson@gmail.com>
Date: Fri, 27 Dec 2013 13:14:19 -0600
Subject: [PATCH] arm: dts: am335x-boneblack: add cpu0 opp points
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
---
arch/arm/boot/dts/am335x-boneblack.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
index 0fd89c38cf02..20660917a06f 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -71,6 +71,24 @@
};
/ {
+ cpus {
+ cpu@0 {
+ cpu0-supply = <&dcdc2_reg>;
+ /*
+ * To consider voltage drop between PMIC and SoC,
+ * tolerance value is reduced to 2% from 4% and
+ * voltage value is increased as a precaution.
+ */
+ operating-points = <
+ /* kHz uV */
+ 1000000 1325000
+ 800000 1300000
+ 600000 1112000
+ 300000 969000
+ >;
+ };
+ };
+
hdmi {
compatible = "ti,tilcdc,slave";
i2c = <&i2c0>;

36
arm-dts-am335x-boneblack-lcdc-add-panel-info.patch
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@ -1,36 +0,0 @@
From: Robert Nelson <robertcnelson@gmail.com>
Date: Fri, 27 Dec 2013 13:05:09 -0600
Subject: [PATCH] arm: dts: am335x-boneblack: lcdc add panel-info
Bugzilla: 1012025
Upstream-status: In beagle github repository https://github.com/beagleboard/kernel
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
---
arch/arm/boot/dts/am335x-boneblack.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
index 5c42d259fa68..0fd89c38cf02 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -78,6 +78,19 @@
pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
status = "okay";
+
+ panel-info {
+ bpp = <16>;
+ ac-bias = <255>;
+ ac-bias-intrpt = <0>;
+ dma-burst-sz = <16>;
+ fdd = <16>;
+ sync-edge = <1>;
+ sync-ctrl = <1>;
+ raster-order = <0>;
+ fifo-th = <0>;
+ invert-pxl-clk;
+ };
};
};

57
arm-highbank-l2-reverts.patch
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@ -1,57 +0,0 @@
From: Kyle McMartin <kmcmartin@redhat.com>
Date: Tue, 30 Sep 2014 16:19:47 -0400
Subject: [PATCH] arm: highbank l2 reverts
Revert some v3.16 changes to mach-highbank which broke L2 cache enablement.
Will debug upstream separately, but we need F22/21 running there. (#1139762)
---
arch/arm/mach-highbank/highbank.c | 21 ++++++++++++---------
1 file changed, 12 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 231fba0d03e5..0de5a6ddd5eb 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -51,13 +51,11 @@ static void __init highbank_scu_map_io(void)
}
-static void highbank_l2c310_write_sec(unsigned long val, unsigned reg)
+static void highbank_l2x0_disable(void)
{
- if (reg == L2X0_CTRL)
- highbank_smc1(0x102, val);
- else
- WARN_ONCE(1, "Highbank L2C310: ignoring write to reg 0x%x\n",
- reg);
+ outer_flush_all();
+ /* Disable PL310 L2 Cache controller */
+ highbank_smc1(0x102, 0x0);
}
static void __init highbank_init_irq(void)
@@ -66,6 +64,14 @@ static void __init highbank_init_irq(void)
if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
highbank_scu_map_io();
+
+ /* Enable PL310 L2 Cache controller */
+ if (IS_ENABLED(CONFIG_CACHE_L2X0) &&
+ of_find_compatible_node(NULL, NULL, "arm,pl310-cache")) {
+ highbank_smc1(0x102, 0x1);
+ l2x0_of_init(0, ~0);
+ outer_cache.disable = highbank_l2x0_disable;
+ }
}
static void highbank_power_off(void)
@@ -179,9 +185,6 @@ DT_MACHINE_START(HIGHBANK, "Highbank")
#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
.dma_zone_size = (4ULL * SZ_1G),
#endif
- .l2c_aux_val = 0,
- .l2c_aux_mask = ~0,
- .l2c_write_sec = highbank_l2c310_write_sec,
.init_irq = highbank_init_irq,
.init_machine = highbank_init,
.dt_compat = highbank_match,

12
kernel.spec
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@ -504,20 +504,8 @@ Patch456: arm64-acpi-drop-expert-patch.patch
Patch457: ARM-tegra-usb-no-reset.patch
Patch458: arm-dts-am335x-boneblack-lcdc-add-panel-info.patch
Patch459: arm-dts-am335x-boneblack-add-cpu0-opp-points.patch
Patch460: arm-dts-am335x-bone-common-setup-default-pinmux-http.patch
Patch461: arm-dts-am335x-bone-common-add-uart2_pins-uart4_pins.patch
Patch462: pinctrl-pinctrl-single-must-be-initialized-early.patch
Patch463: arm-i.MX6-Utilite-device-dtb.patch
Patch464: arm-highbank-l2-reverts.patch
Patch465: Revert-Revert-ACPI-video-change-acpi-video-brightnes.patch
Patch466: input-kill-stupid-messages.patch

34
pinctrl-pinctrl-single-must-be-initialized-early.patch
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@ -1,34 +0,0 @@
From: Pantelis Antoniou <panto@antoniou-consulting.com>
Date: Sat, 15 Sep 2012 12:00:41 +0300
Subject: [PATCH] pinctrl: pinctrl-single must be initialized early.
When using pinctrl-single to handle i2c initialization, it has
to be done early. Whether this is the best way to do so, is an
exercise left to the reader.
---
drivers/pinctrl/pinctrl-single.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index b2de09d3b1a0..bced65ec07cc 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -2025,7 +2025,17 @@ static struct platform_driver pcs_driver = {
#endif
};
-module_platform_driver(pcs_driver);
+static int __init pcs_init(void)
+{
+ return platform_driver_register(&pcs_driver);
+}
+postcore_initcall(pcs_init);
+
+static void __exit pcs_exit(void)
+{
+ platform_driver_unregister(&pcs_driver);
+}
+module_exit(pcs_exit);
MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>");
MODULE_DESCRIPTION("One-register-per-pin type device tree based pinctrl driver");