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kernel/0144-feat-remove-nonret-cpu-idle-state.patch

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Update to 6.6.68 / release-1230
2024-12-27 22:35:16 +00:00
From 7455e797213999c259cf4d0a010e90517bf48fe4 Mon Sep 17 00:00:00 2001
Add EIC7700 6.6.66
2024-12-15 18:29:23 +00:00
From: congyuyang <congyuyang@eswincomputing.com>
Date: Thu, 8 Aug 2024 15:04:33 +0800
Update to 6.6.68 / release-1230
2024-12-27 22:35:16 +00:00
Subject: [PATCH 144/222] feat:remove nonret cpu idle state
Add EIC7700 6.6.66
2024-12-15 18:29:23 +00:00
Changelogs:
remove nonret cpu idle state to solve some interrupt problems.
Signed-off-by: congyuyang <congyuyang@eswincomputing.com>
---
.../dts/eswin/eswin-win2030-arch-d2d.dtsi | 23 +++++++------------
.../boot/dts/eswin/eswin-win2030-arch.dtsi | 15 ++++--------
2 files changed, 12 insertions(+), 26 deletions(-)
diff --git a/arch/riscv/boot/dts/eswin/eswin-win2030-arch-d2d.dtsi b/arch/riscv/boot/dts/eswin/eswin-win2030-arch-d2d.dtsi
index fa46f44bd3a1..828840c3e719 100644
--- a/arch/riscv/boot/dts/eswin/eswin-win2030-arch-d2d.dtsi
+++ b/arch/riscv/boot/dts/eswin/eswin-win2030-arch-d2d.dtsi
@@ -42,13 +42,6 @@ CPU_RET: cpu-retentive {
exit-latency-us = <40>;
min-residency-us = <80>;
};
- CPU_NONRET: cpu-nonretentive {
- compatible = "riscv,idle-state";
- riscv,sbi-suspend-param = <0x80000000>;
- entry-latency-us = <250>;
- exit-latency-us = <500>;
- min-residency-us = <950>;
- };
};
cpu-map {
#if (CHIPLET_AND_DIE & 0x2)
@@ -124,7 +117,7 @@ cpu_0: cpu@0 {
numa-node-id = <0>;
clocks = <&d0_clock WIN2030_CLK_CPU_EXT_SRC_CORE_CLK_0>;
operating-points-v2 = <&d0_cpu_opp_table>;
- cpu-idle-states = <&CPU_RET &CPU_NONRET>;
+ cpu-idle-states = <&CPU_RET>;
cpu0_intc: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
@@ -172,7 +165,7 @@ cpu_1: cpu@1 {
numa-node-id = <0>;
clocks = <&d0_clock WIN2030_CLK_CPU_EXT_SRC_CORE_CLK_1>;
operating-points-v2 = <&d0_cpu_opp_table>;
- cpu-idle-states = <&CPU_RET &CPU_NONRET>;
+ cpu-idle-states = <&CPU_RET>;
cpu1_intc: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
@@ -220,7 +213,7 @@ cpu_2: cpu@2 {
numa-node-id = <0>;
clocks = <&d0_clock WIN2030_CLK_CPU_EXT_SRC_CORE_CLK_2>;
operating-points-v2 = <&d0_cpu_opp_table>;
- cpu-idle-states = <&CPU_RET &CPU_NONRET>;
+ cpu-idle-states = <&CPU_RET>;
cpu2_intc: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
@@ -268,7 +261,7 @@ cpu_3: cpu@3 {
numa-node-id = <0>;
clocks = <&d0_clock WIN2030_CLK_CPU_EXT_SRC_CORE_CLK_3>;
operating-points-v2 = <&d0_cpu_opp_table>;
- cpu-idle-states = <&CPU_RET &CPU_NONRET>;
+ cpu-idle-states = <&CPU_RET>;
cpu3_intc: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
@@ -328,7 +321,7 @@ cpu_4: cpu@4 {
numa-node-id = <1>;
clocks = <&d1_clock WIN2030_CLK_CPU_EXT_SRC_CORE_CLK_0>;
operating-points-v2 = <&d1_cpu_opp_table>;
- cpu-idle-states = <&CPU_RET &CPU_NONRET>;
+ cpu-idle-states = <&CPU_RET>;
cpu4_intc: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
@@ -376,7 +369,7 @@ cpu_5: cpu@5 {
numa-node-id = <1>;
clocks = <&d1_clock WIN2030_CLK_CPU_EXT_SRC_CORE_CLK_1>;
operating-points-v2 = <&d1_cpu_opp_table>;
- cpu-idle-states = <&CPU_RET &CPU_NONRET>;
+ cpu-idle-states = <&CPU_RET>;
cpu5_intc: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
@@ -423,7 +416,7 @@ cpu_6: cpu@6 {
numa-node-id = <1>;
clocks = <&d1_clock WIN2030_CLK_CPU_EXT_SRC_CORE_CLK_2>;
operating-points-v2 = <&d1_cpu_opp_table>;
- cpu-idle-states = <&CPU_RET &CPU_NONRET>;
+ cpu-idle-states = <&CPU_RET>;
cpu6_intc: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
@@ -470,7 +463,7 @@ cpu_7: cpu@7 {
numa-node-id = <1>;
clocks = <&d1_clock WIN2030_CLK_CPU_EXT_SRC_CORE_CLK_3>;
operating-points-v2 = <&d1_cpu_opp_table>;
- cpu-idle-states = <&CPU_RET &CPU_NONRET>;
+ cpu-idle-states = <&CPU_RET>;
cpu7_intc: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
diff --git a/arch/riscv/boot/dts/eswin/eswin-win2030-arch.dtsi b/arch/riscv/boot/dts/eswin/eswin-win2030-arch.dtsi
index f20e1064ea7c..3f2582159f83 100644
--- a/arch/riscv/boot/dts/eswin/eswin-win2030-arch.dtsi
+++ b/arch/riscv/boot/dts/eswin/eswin-win2030-arch.dtsi
@@ -47,13 +47,6 @@ CPU_RET: cpu-retentive {
exit-latency-us = <40>;
min-residency-us = <80>;
};
- CPU_NONRET: cpu-nonretentive {
- compatible = "riscv,idle-state";
- riscv,sbi-suspend-param = <0x80000000>;
- entry-latency-us = <250>;
- exit-latency-us = <500>;
- min-residency-us = <950>;
- };
};
L17: cpu@0 {
clock-frequency = <0>;
@@ -91,7 +84,7 @@ L17: cpu@0 {
tlb-split;
clocks = <&d0_clock WIN2030_CLK_CPU_EXT_SRC_CORE_CLK_0>;
operating-points-v2 = <&d0_cpu_opp_table>;
- cpu-idle-states = <&CPU_RET &CPU_NONRET>;
+ cpu-idle-states = <&CPU_RET>;
L14: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
@@ -134,7 +127,7 @@ L22: cpu@1 {
tlb-split;
clocks = <&d0_clock WIN2030_CLK_CPU_EXT_SRC_CORE_CLK_1>;
operating-points-v2 = <&d0_cpu_opp_table>;
- cpu-idle-states = <&CPU_RET &CPU_NONRET>;
+ cpu-idle-states = <&CPU_RET>;
L19: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
@@ -177,7 +170,7 @@ L27: cpu@2 {
tlb-split;
clocks = <&d0_clock WIN2030_CLK_CPU_EXT_SRC_CORE_CLK_2>;
operating-points-v2 = <&d0_cpu_opp_table>;
- cpu-idle-states = <&CPU_RET &CPU_NONRET>;
+ cpu-idle-states = <&CPU_RET>;
L24: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
@@ -220,7 +213,7 @@ L32: cpu@3 {
tlb-split;
clocks = <&d0_clock WIN2030_CLK_CPU_EXT_SRC_CORE_CLK_3>;
operating-points-v2 = <&d0_cpu_opp_table>;
- cpu-idle-states = <&CPU_RET &CPU_NONRET>;
+ cpu-idle-states = <&CPU_RET>;
L29: interrupt-controller {
#interrupt-cells = <1>;
compatible = "riscv,cpu-intc";
--
2.47.0
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