214 lines
5.8 KiB
Diff
214 lines
5.8 KiB
Diff
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From sgruszka@redhat.com Thu Feb 3 07:58:52 2011
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Date: Thu, 3 Feb 2011 13:58:51 +0100
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From: Stanislaw Gruszka <sgruszka@redhat.com>
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To: kernel@lists.fedoraproject.org
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Cc: Kyle McMartin <kmcmartin@redhat.com>
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Subject: [PATCH F-15] ath5k: fix fast channel change
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Message-ID: <20110203125134.GA4515@redhat.com>
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From: Nick Kossifidis <mickflemm@gmail.com>
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Fast channel change fixes:
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a) Always set OFDM timings
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b) Don't re-activate PHY
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c) Enable only NF calibration, not AGC
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Resolves:
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https://bugzilla.redhat.com/show_bug.cgi?id=672778
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---
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drivers/net/wireless/ath/ath5k/phy.c | 142 +++++++++++++++++++++-------------
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1 files changed, 87 insertions(+), 55 deletions(-)
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diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c
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index 78c26fd..d673ab2 100644
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--- a/drivers/net/wireless/ath/ath5k/phy.c
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+++ b/drivers/net/wireless/ath/ath5k/phy.c
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@@ -282,6 +282,34 @@ int ath5k_hw_phy_disable(struct ath5k_hw *ah)
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return 0;
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}
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+/*
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+ * Wait for synth to settle
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+ */
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+static void ath5k_hw_wait_for_synth(struct ath5k_hw *ah,
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+ struct ieee80211_channel *channel)
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+{
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+ /*
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+ * On 5211+ read activation -> rx delay
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+ * and use it (100ns steps).
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+ */
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+ if (ah->ah_version != AR5K_AR5210) {
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+ u32 delay;
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+ delay = ath5k_hw_reg_read(ah, AR5K_PHY_RX_DELAY) &
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+ AR5K_PHY_RX_DELAY_M;
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+ delay = (channel->hw_value & CHANNEL_CCK) ?
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+ ((delay << 2) / 22) : (delay / 10);
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+ if (ah->ah_bwmode == AR5K_BWMODE_10MHZ)
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+ delay = delay << 1;
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+ if (ah->ah_bwmode == AR5K_BWMODE_5MHZ)
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+ delay = delay << 2;
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+ /* XXX: /2 on turbo ? Let's be safe
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+ * for now */
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+ udelay(100 + delay);
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+ } else {
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+ mdelay(1);
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+ }
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+}
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+
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/**********************\
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* RF Gain optimization *
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@@ -3237,6 +3265,13 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel,
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/* Failed */
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if (i >= 100)
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return -EIO;
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+
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+ /* Set channel and wait for synth */
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+ ret = ath5k_hw_channel(ah, channel);
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+ if (ret)
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+ return ret;
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+
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+ ath5k_hw_wait_for_synth(ah, channel);
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}
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/*
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@@ -3251,13 +3286,53 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel,
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if (ret)
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return ret;
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+ /* Write OFDM timings on 5212*/
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+ if (ah->ah_version == AR5K_AR5212 &&
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+ channel->hw_value & CHANNEL_OFDM) {
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+
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+ ret = ath5k_hw_write_ofdm_timings(ah, channel);
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+ if (ret)
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+ return ret;
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+
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+ /* Spur info is available only from EEPROM versions
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+ * greater than 5.3, but the EEPROM routines will use
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+ * static values for older versions */
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+ if (ah->ah_mac_srev >= AR5K_SREV_AR5424)
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+ ath5k_hw_set_spur_mitigation_filter(ah,
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+ channel);
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+ }
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+
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+ /* If we used fast channel switching
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+ * we are done, release RF bus and
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+ * fire up NF calibration.
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+ *
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+ * Note: Only NF calibration due to
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+ * channel change, not AGC calibration
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+ * since AGC is still running !
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+ */
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+ if (fast) {
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+ /*
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+ * Release RF Bus grant
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+ */
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+ AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_RFBUS_REQ,
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+ AR5K_PHY_RFBUS_REQ_REQUEST);
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+
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+ /*
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+ * Start NF calibration
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+ */
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+ AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,
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+ AR5K_PHY_AGCCTL_NF);
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+
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+ return ret;
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+ }
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+
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/*
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* For 5210 we do all initialization using
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* initvals, so we don't have to modify
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* any settings (5210 also only supports
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* a/aturbo modes)
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*/
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- if ((ah->ah_version != AR5K_AR5210) && !fast) {
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+ if (ah->ah_version != AR5K_AR5210) {
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/*
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* Write initial RF gain settings
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@@ -3276,22 +3351,6 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel,
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if (ret)
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return ret;
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- /* Write OFDM timings on 5212*/
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- if (ah->ah_version == AR5K_AR5212 &&
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- channel->hw_value & CHANNEL_OFDM) {
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-
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- ret = ath5k_hw_write_ofdm_timings(ah, channel);
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- if (ret)
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- return ret;
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-
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- /* Spur info is available only from EEPROM versions
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- * greater than 5.3, but the EEPROM routines will use
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- * static values for older versions */
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- if (ah->ah_mac_srev >= AR5K_SREV_AR5424)
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- ath5k_hw_set_spur_mitigation_filter(ah,
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- channel);
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- }
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-
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/*Enable/disable 802.11b mode on 5111
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(enable 2111 frequency converter + CCK)*/
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if (ah->ah_radio == AR5K_RF5111) {
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@@ -3322,47 +3381,20 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel,
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*/
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ath5k_hw_reg_write(ah, AR5K_PHY_ACT_ENABLE, AR5K_PHY_ACT);
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+ ath5k_hw_wait_for_synth(ah, channel);
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+
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/*
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- * On 5211+ read activation -> rx delay
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- * and use it.
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+ * Perform ADC test to see if baseband is ready
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+ * Set tx hold and check adc test register
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*/
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- if (ah->ah_version != AR5K_AR5210) {
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- u32 delay;
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- delay = ath5k_hw_reg_read(ah, AR5K_PHY_RX_DELAY) &
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- AR5K_PHY_RX_DELAY_M;
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- delay = (channel->hw_value & CHANNEL_CCK) ?
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- ((delay << 2) / 22) : (delay / 10);
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- if (ah->ah_bwmode == AR5K_BWMODE_10MHZ)
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- delay = delay << 1;
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- if (ah->ah_bwmode == AR5K_BWMODE_5MHZ)
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- delay = delay << 2;
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- /* XXX: /2 on turbo ? Let's be safe
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- * for now */
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- udelay(100 + delay);
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- } else {
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- mdelay(1);
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- }
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-
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- if (fast)
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- /*
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- * Release RF Bus grant
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- */
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- AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_RFBUS_REQ,
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- AR5K_PHY_RFBUS_REQ_REQUEST);
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- else {
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- /*
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- * Perform ADC test to see if baseband is ready
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- * Set tx hold and check adc test register
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- */
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- phy_tst1 = ath5k_hw_reg_read(ah, AR5K_PHY_TST1);
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- ath5k_hw_reg_write(ah, AR5K_PHY_TST1_TXHOLD, AR5K_PHY_TST1);
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- for (i = 0; i <= 20; i++) {
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- if (!(ath5k_hw_reg_read(ah, AR5K_PHY_ADC_TEST) & 0x10))
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- break;
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- udelay(200);
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- }
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- ath5k_hw_reg_write(ah, phy_tst1, AR5K_PHY_TST1);
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+ phy_tst1 = ath5k_hw_reg_read(ah, AR5K_PHY_TST1);
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+ ath5k_hw_reg_write(ah, AR5K_PHY_TST1_TXHOLD, AR5K_PHY_TST1);
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+ for (i = 0; i <= 20; i++) {
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+ if (!(ath5k_hw_reg_read(ah, AR5K_PHY_ADC_TEST) & 0x10))
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+ break;
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+ udelay(200);
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}
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+ ath5k_hw_reg_write(ah, phy_tst1, AR5K_PHY_TST1);
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/*
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* Start automatic gain control calibration
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