95 lines
3.2 KiB
Diff
95 lines
3.2 KiB
Diff
|
From c8ff7a795bf883c61b7d7f506b0bb7796db6cb01 Mon Sep 17 00:00:00 2001
|
||
|
|
From: Matt Porter <mporter@ti.com>
|
||
|
|
Date: Wed, 6 Mar 2013 19:56:05 +0000
|
||
|
|
Subject: [PATCH 03/13] dmaengine: add dma_get_slave_sg_limits()
|
||
|
|
|
||
|
|
Add a dmaengine API to retrieve slave SG transfer limits.
|
||
|
|
|
||
|
|
The API is optionally implemented by dmaengine drivers and when
|
||
|
|
unimplemented will return a NULL pointer. A client driver using
|
||
|
|
this API provides the required dma channel, address width, and
|
||
|
|
burst size of the transfer. dma_get_slave_sg_limits() returns an
|
||
|
|
SG limits structure with the maximum number and size of SG segments
|
||
|
|
that the given channel can handle.
|
||
|
|
|
||
|
|
Signed-off-by: Matt Porter <mporter@ti.com>
|
||
|
|
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
|
||
|
|
---
|
||
|
|
include/linux/dmaengine.h | 39 +++++++++++++++++++++++++++++++++++++++
|
||
|
|
1 file changed, 39 insertions(+)
|
||
|
|
|
||
|
|
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
|
||
|
|
index cb286b1..d71fe5d 100644
|
||
|
|
--- a/include/linux/dmaengine.h
|
||
|
|
+++ b/include/linux/dmaengine.h
|
||
|
|
@@ -370,6 +370,18 @@ struct dma_slave_config {
|
||
|
|
unsigned int slave_id;
|
||
|
|
};
|
||
|
|
|
||
|
|
+/* struct dma_slave_sg_limits - expose SG transfer limits of a channel
|
||
|
|
+ *
|
||
|
|
+ * @max_seg_nr: maximum number of SG segments supported on a SG/SLAVE
|
||
|
|
+ * channel (0 for no maximum or not a SG/SLAVE channel)
|
||
|
|
+ * @max_seg_len: maximum length of SG segments supported on a SG/SLAVE
|
||
|
|
+ * channel (0 for no maximum or not a SG/SLAVE channel)
|
||
|
|
+ */
|
||
|
|
+struct dma_slave_sg_limits {
|
||
|
|
+ u32 max_seg_nr;
|
||
|
|
+ u32 max_seg_len;
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
static inline const char *dma_chan_name(struct dma_chan *chan)
|
||
|
|
{
|
||
|
|
return dev_name(&chan->dev->device);
|
||
|
|
@@ -532,6 +544,7 @@ struct dma_tx_state {
|
||
|
|
* struct with auxiliary transfer status information, otherwise the call
|
||
|
|
* will just return a simple status code
|
||
|
|
* @device_issue_pending: push pending transactions to hardware
|
||
|
|
+ * @device_slave_sg_limits: return the slave SG capabilities
|
||
|
|
*/
|
||
|
|
struct dma_device {
|
||
|
|
|
||
|
|
@@ -597,6 +610,9 @@ struct dma_device {
|
||
|
|
dma_cookie_t cookie,
|
||
|
|
struct dma_tx_state *txstate);
|
||
|
|
void (*device_issue_pending)(struct dma_chan *chan);
|
||
|
|
+ struct dma_slave_sg_limits *(*device_slave_sg_limits)(
|
||
|
|
+ struct dma_chan *chan, enum dma_slave_buswidth addr_width,
|
||
|
|
+ u32 maxburst);
|
||
|
|
};
|
||
|
|
|
||
|
|
static inline int dmaengine_device_control(struct dma_chan *chan,
|
||
|
|
@@ -958,6 +974,29 @@ dma_set_tx_state(struct dma_tx_state *st, dma_cookie_t last, dma_cookie_t used,
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
+/**
|
||
|
|
+ * dma_get_slave_sg_limits - get DMAC SG transfer capabilities
|
||
|
|
+ * @chan: target DMA channel
|
||
|
|
+ * @addr_width: address width of the DMA transfer
|
||
|
|
+ * @maxburst: maximum DMA transfer burst size
|
||
|
|
+ *
|
||
|
|
+ * Get SG transfer capabilities for a specified channel. If the dmaengine
|
||
|
|
+ * driver does not implement SG transfer capabilities then NULL is
|
||
|
|
+ * returned.
|
||
|
|
+ */
|
||
|
|
+static inline struct dma_slave_sg_limits
|
||
|
|
+*dma_get_slave_sg_limits(struct dma_chan *chan,
|
||
|
|
+ enum dma_slave_buswidth addr_width,
|
||
|
|
+ u32 maxburst)
|
||
|
|
+{
|
||
|
|
+ if (chan->device->device_slave_sg_limits)
|
||
|
|
+ return chan->device->device_slave_sg_limits(chan,
|
||
|
|
+ addr_width,
|
||
|
|
+ maxburst);
|
||
|
|
+
|
||
|
|
+ return NULL;
|
||
|
|
+}
|
||
|
|
+
|
||
|
|
enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie);
|
||
|
|
#ifdef CONFIG_DMA_ENGINE
|
||
|
|
enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx);
|
||
|
|
--
|
||
|
|
1.8.2.1
|
||
|
|
|