2024-12-19 21:34:44 +00:00
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From d95edcdf7d82af88bcf89b01d0497070299dadbf Mon Sep 17 00:00:00 2001
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2024-12-15 18:29:23 +00:00
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From: linmin <linmin@eswincomputing.com>
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Date: Mon, 28 Oct 2024 16:44:02 +0800
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Subject: [PATCH 201/219] perf:change smmu print level,optimize ccache flush
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Changelogs:
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1.Changed the smmu event print level to dev_dbg for reducing the log
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when dsp cache prediction access to the invalid iova.
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2.Move mb(); outside of the for loop of ccache_flush64_range() to reduce
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the time cost of flusing cache.
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Signed-off-by: linmin <linmin@eswincomputing.com>
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---
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drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 4 ++--
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drivers/soc/sifive/sifive_ccache.c | 2 +-
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2 files changed, 3 insertions(+), 3 deletions(-)
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diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
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index c383426a0655..77d37ee6e71f 100644
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--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
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+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
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@@ -1661,9 +1661,9 @@ static irqreturn_t arm_smmu_evtq_thread(int irq, void *dev)
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if (!ret || !__ratelimit(&rs))
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continue;
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- dev_info(smmu->dev, "event 0x%02x received:\n", id);
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+ dev_dbg(smmu->dev, "event 0x%02x received:\n", id);
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for (i = 0; i < ARRAY_SIZE(evt); ++i)
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- dev_info(smmu->dev, "\t0x%016llx\n",
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+ dev_dbg(smmu->dev, "\t0x%016llx\n",
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(unsigned long long)evt[i]);
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cond_resched();
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diff --git a/drivers/soc/sifive/sifive_ccache.c b/drivers/soc/sifive/sifive_ccache.c
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index a88123c81ace..2010ccd64f86 100644
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--- a/drivers/soc/sifive/sifive_ccache.c
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+++ b/drivers/soc/sifive/sifive_ccache.c
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@@ -130,8 +130,8 @@ static void ccache_flush64_range(phys_addr_t paddr, size_t size)
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for (line = paddr; line < paddr + size;
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line += SIFIVE_CCACHE_FLUSH64_LINE_LEN) {
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writeq(line, ccache_base + SIFIVE_CCACHE_FLUSH64);
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- mb();
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}
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+ mb();
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}
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static const struct riscv_nonstd_cache_ops ccache_cmo_ops __initdata = {
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--
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2.47.0
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