191 lines
6.3 KiB
Diff
191 lines
6.3 KiB
Diff
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From patchwork Sun Apr 22 12:33:46 2018
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: serial: mvebu-uart: Fix local flags handling on termios update
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From: Marc Zyngier <Marc.Zyngier@arm.com>
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X-Patchwork-Id: 10354521
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Message-Id: <20180422123346.15538-1-marc.zyngier@arm.com>
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To: linux-arm-kernel@lists.infradead.org,
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linux-kernel@vger.kernel.org
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Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>,
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Allen Yan <yanwei@marvell.com>,
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Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
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Miquel Raynal <miquel.raynal@free-electrons.com>
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Date: Sun, 22 Apr 2018 13:33:46 +0100
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Commit 68a0db1d7da2 reworked the baud rate selection, but also added
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a (not so) subtle change in the way the local flags (c_lflag in the
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termios structure) are handled, forcing the new flags to always be the
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same as the old ones.
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The reason for that particular change is both obscure and undocumented.
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It also completely breaks userspace. Something as trivial as getty is
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unusable:
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<example>
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Debian GNU/Linux 9 sy-borg ttyMV0
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sy-borg login: root
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root
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[timeout]
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Debian GNU/Linux 9 sy-borg ttyMV0
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</example>
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which is quite obvious in retrospect: getty cannot get in control of
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the echo mode, is stuck in canonical mode, and times out without ever
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seeing anything valid. It also begs the question of how this change was
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ever tested.
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The fix is pretty obvious: stop messing with c_lflag, and the world
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will be a happier place.
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Cc: stable@vger.kernel.org # 4.15+
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Fixes: 68a0db1d7da2 ("serial: mvebu-uart: add function to change baudrate")
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Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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---
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drivers/tty/serial/mvebu-uart.c | 1 -
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1 file changed, 1 deletion(-)
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diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c
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index 750e5645dc85..f503fab1e268 100644
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--- a/drivers/tty/serial/mvebu-uart.c
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+++ b/drivers/tty/serial/mvebu-uart.c
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@@ -495,7 +495,6 @@ static void mvebu_uart_set_termios(struct uart_port *port,
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termios->c_iflag |= old->c_iflag & ~(INPCK | IGNPAR);
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termios->c_cflag &= CREAD | CBAUD;
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termios->c_cflag |= old->c_cflag & ~(CREAD | CBAUD);
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- termios->c_lflag = old->c_lflag;
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}
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spin_unlock_irqrestore(&port->lock, flags);
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From patchwork Sun Mar 25 19:57:36 2018
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 8bit
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Subject: arm64: dts: armada-3720-espressobin: wire up spi flash
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From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= <u.kleine-koenig@pengutronix.de>
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X-Patchwork-Id: 10306793
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Message-Id: <20180325195736.19782-1-u.kleine-koenig@pengutronix.de>
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To: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
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Gregory Clement <gregory.clement@bootlin.com>,
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Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Cc: Ellie Reeves <ellierevves@gmail.com>,
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linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de
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Date: Sun, 25 Mar 2018 21:57:36 +0200
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From: Ellie Reeves <ellierevves@gmail.com>
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This is the storage the machine boots from by default. The partitioning
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is taken from the U-Boot that is shipped with the board. There is some
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more space on the flash that isn't used.
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Signed-off-by: Ellie Reeves <ellierevves@gmail.com>
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Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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---
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.../boot/dts/marvell/armada-3720-espressobin.dts | 27 ++++++++++++++++++++++
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1 file changed, 27 insertions(+)
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diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
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index 882d6e4a04e4..5f98c2fecca4 100644
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--- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
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+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
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@@ -108,6 +108,33 @@
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status = "okay";
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};
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+&spi0 {
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+ status = "okay";
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+
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+ flash@0 {
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+ reg = <0>;
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+ compatible = "winbond,w25q32dw", "jedec,spi-flash";
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+ spi-max-frequency = <104000000>;
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+ m25p,fast-read;
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+
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+ partitions {
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+ compatible = "fixed-partitions";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ partition@0 {
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+ label = "uboot";
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+ reg = <0 0x180000>;
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+ };
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+
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+ partition@180000 {
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+ label = "ubootenv";
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+ reg = <0x180000 0x10000>;
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+ };
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+ };
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+ };
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+};
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+
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/* Exported on the micro USB connector J5 through an FTDI */
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&uart0 {
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pinctrl-names = "default";
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From patchwork Sat Apr 21 14:03:42 2018
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: arm64: dts: marvell: armada-37xx: reserve memory for ATF
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From: Miquel Raynal <miquel.raynal@bootlin.com>
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X-Patchwork-Id: 10354187
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Message-Id: <20180421140342.25082-1-miquel.raynal@bootlin.com>
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To: Gregory Clement <gregory.clement@bootlin.com>,
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Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
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Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Cc: Mark Rutland <mark.rutland@arm.com>, devicetree@vger.kernel.org,
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Antoine Tenart <antoine.tenart@bootlin.com>,
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Catalin Marinas <catalin.marinas@arm.com>,
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Will Deacon <will.deacon@arm.com>,
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Maxime Chevallier <maxime.chevallier@bootlin.com>,
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Nadav Haklai <nadavh@marvell.com>, Rob Herring <robh+dt@kernel.org>,
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Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
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Miquel Raynal <miquel.raynal@bootlin.com>, Victor Gu <xigu@marvell.com>,
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linux-arm-kernel@lists.infradead.org
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Date: Sat, 21 Apr 2018 16:03:42 +0200
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From: Victor Gu <xigu@marvell.com>
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The PSCI area should be reserved in Linux for PSCI operations such as
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suspend/resume.
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Reserve 2MiB of memory which matches the area used by ATF (BL1, BL2,
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BL3x, see [1] in ATF source code). This covers all PSCI code and data
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area and is 2MiB aligned, which is required by Linux for huge pages
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handling.
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[1] plat/marvell/a3700/common/include/platform_def.h
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Signed-off-by: Victor Gu <xigu@marvell.com>
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[miquel.raynal@bootlin.com: reword of commit message]
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Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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---
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arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 11 +++++++++++
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1 file changed, 11 insertions(+)
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diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
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index 97207a61bc79..429ce91bfc39 100644
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--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
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+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
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@@ -22,6 +22,17 @@
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serial1 = &uart1;
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};
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+ reserved-memory {
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+ #address-cells = <2>;
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+ #size-cells = <2>;
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+ ranges;
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+
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+ psci-area@4000000 {
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+ reg = <0 0x4000000 0 0x200000>;
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+ no-map;
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+ };
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+ };
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+
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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