89 lines
3.3 KiB
Diff
89 lines
3.3 KiB
Diff
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From patchwork Fri Nov 18 11:15:12 2016
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: [v3] ARM: Drop fixed 200 Hz timer requirement from Samsung platforms
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From: Krzysztof Kozlowski <krzk@kernel.org>
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X-Patchwork-Id: 9436225
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Message-Id: <1479467712-5218-1-git-send-email-krzk@kernel.org>
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To: Russell King <linux@armlinux.org.uk>, Kukjin Kim <kgene@kernel.org>,
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Krzysztof Kozlowski <krzk@kernel.org>,
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Javier Martinez Canillas <javier@osg.samsung.com>,
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linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org,
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linux-kernel@vger.kernel.org
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Cc: Arnd Bergmann <arnd@arndb.de>,
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Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>,
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Tomasz Figa <tomasz.figa@gmail.com>,
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Ben Dooks <ben.dooks@codethink.co.uk>,
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Sylwester Nawrocki <s.nawrocki@samsung.com>,
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Lee Jones <lee.jones@linaro.org>,
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Marek Szyprowski <m.szyprowski@samsung.com>
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Date: Fri, 18 Nov 2016 13:15:12 +0200
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All Samsung platforms, including the Exynos, are selecting HZ_FIXED with
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200 Hz. Unfortunately in case of multiplatform image this affects also
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other platforms when Exynos is enabled.
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This looks like an very old legacy code, dating back to initial
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upstreaming of S3C24xx. Probably it was required for s3c24xx timer
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driver, which was removed in commit ad38bdd15d5b ("ARM: SAMSUNG: Remove
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unused plat-samsung/time.c").
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Since then, this fixed 200 Hz spread everywhere, including out-of-tree
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Samsung kernels (SoC vendor's and Tizen's). I believe this choice
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was rather an effect of coincidence instead of conscious choice.
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On S3C24xx, the PWM counter is only 16 bit wide, and with the
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typical 12MHz input clock that overflows every 5.5ms. This works
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with HZ=200 or higher but not with HZ=100 which needs a 10ms
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interval between ticks. On Later chips (S3C64xx, S5P and EXYNOS),
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the counter is 32 bits and does not have this problem.
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The new samsung_pwm_timer driver solves the problem by scaling the input
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clock by a factor of 50 on S3C24xx, which makes it less accurate but
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allows HZ=100 as well as CONFIG_NO_HZ with fewer wakeups.
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Few perf mem and sched tests on Odroid XU3 board (Exynos5422, 4x Cortex
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A7, 4x Cortex A15) show no regressions when switching from 200 Hz to
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other values.
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Reported-by: Lee Jones <lee.jones@linaro.org>
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[Dropping of 200_HZ from S3C/S5P was suggested by Arnd]
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Reported-by: Arnd Bergmann <arnd@arndb.de>
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Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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Cc: Kukjin Kim <kgene@kernel.org>
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[Tested on Exynos5800]
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Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
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Acked-by: Kukjin Kim <kgene@kernel.org>
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[Tested on S3C2440]
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Tested-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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---
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Changes since v2:
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1. Extend message.
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2. Add Kukjin's ack.
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3. Add Sylwester's tested-by.
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Changes since v1:
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1. Add Javier's tested-by.
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2. Drop HZ_FIXED also from ARCH_S5PV210 and ARCH_S3C24XX after Arnd
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suggestions and analysis.
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---
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arch/arm/Kconfig | 3 +--
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1 file changed, 1 insertion(+), 2 deletions(-)
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diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
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index b5d529fdffab..ced2e08a9d08 100644
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--- a/arch/arm/Kconfig
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+++ b/arch/arm/Kconfig
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@@ -1496,8 +1496,7 @@ source kernel/Kconfig.preempt
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config HZ_FIXED
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int
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- default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \
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- ARCH_S5PV210 || ARCH_EXYNOS4
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+ default 200 if ARCH_EBSA110
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default 128 if SOC_AT91RM9200
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default 0
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