197 lines
9.8 KiB
Diff
197 lines
9.8 KiB
Diff
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Thu, 24 Jan 2019 04:07:05 -0800 (PST)
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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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To: linux-kernel@vger.kernel.org
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Subject: [PATCH] drm: enable uncached DMA optimization for ARM and arm64
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Date: Thu, 24 Jan 2019 13:06:58 +0100
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Message-Id: <20190124120658.30288-1-ard.biesheuvel@linaro.org>
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Cc: David Zhou <David1.Zhou@amd.com>,
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Maxime Ripard <maxime.ripard@bootlin.com>,
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Benjamin Herrenschmidt <benh@kernel.crashing.org>,
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Carsten Haitzler <Carsten.Haitzler@arm.com>,
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Ard Biesheuvel <ard.biesheuvel@linaro.org>, David Airlie <airlied@linux.ie>,
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dri-devel <dri-devel@lists.freedesktop.org>,
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Michel Daenzer <michel.daenzer@amd.com>, Robin Murphy <robin.murphy@arm.com>,
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Will Deacon <will.deacon@arm.com>, Christoph Hellwig <hch@infradead.org>,
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Junwei Zhang <Jerry.Zhang@amd.com>, Huang Rui <ray.huang@amd.com>,
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amd-gfx list <amd-gfx@lists.freedesktop.org>,
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Daniel Vetter <daniel@ffwll.ch>,
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Michael Ellerman <mpe@ellerman.id.au>,
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Alex Deucher <alexander.deucher@amd.com>, Sean Paul <sean@poorly.run>,
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Christian Koenig <christian.koenig@amd.com>,
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linux-arm-kernel@lists.infradead.org
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The DRM driver stack is designed to work with cache coherent devices
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only, but permits an optimization to be enabled in some cases, where
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for some buffers, both the CPU and the GPU use uncached mappings,
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removing the need for DMA snooping and allocation in the CPU caches.
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The use of uncached GPU mappings relies on the correct implementation
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of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU
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will use cached mappings nonetheless. On x86 platforms, this does not
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seem to matter, as uncached CPU mappings will snoop the caches in any
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case. However, on ARM and arm64, enabling this optimization on a
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platform where NoSnoop is ignored results in loss of coherency, which
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breaks correct operation of the device. Since we have no way of
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detecting whether NoSnoop works or not, just disable this
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optimization entirely for ARM and arm64.
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Cc: Christian Koenig <christian.koenig@amd.com>
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Cc: Alex Deucher <alexander.deucher@amd.com>
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Cc: David Zhou <David1.Zhou@amd.com>
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Cc: Huang Rui <ray.huang@amd.com>
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Cc: Junwei Zhang <Jerry.Zhang@amd.com>
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Cc: Michel Daenzer <michel.daenzer@amd.com>
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Cc: David Airlie <airlied@linux.ie>
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Cc: Daniel Vetter <daniel@ffwll.ch>
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Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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Cc: Maxime Ripard <maxime.ripard@bootlin.com>
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Cc: Sean Paul <sean@poorly.run>
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Cc: Michael Ellerman <mpe@ellerman.id.au>
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Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Cc: Will Deacon <will.deacon@arm.com>
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Cc: Christoph Hellwig <hch@infradead.org>
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Cc: Robin Murphy <robin.murphy@arm.com>
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Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>
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Cc: dri-devel <dri-devel@lists.freedesktop.org>
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Reported-by: Carsten Haitzler <Carsten.Haitzler@arm.com>
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Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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---
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include/drm/drm_cache.h | 18 ++++++++++++++++++
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1 file changed, 18 insertions(+)
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diff --git a/include/drm/drm_cache.h b/include/drm/drm_cache.h
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index bfe1639df02d..97fc498dc767 100644
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--- a/include/drm/drm_cache.h
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+++ b/include/drm/drm_cache.h
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@@ -47,6 +47,24 @@ static inline bool drm_arch_can_wc_memory(void)
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return false;
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#elif defined(CONFIG_MIPS) && defined(CONFIG_CPU_LOONGSON3)
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return false;
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+#elif defined(CONFIG_ARM) || defined(CONFIG_ARM64)
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+ /*
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+ * The DRM driver stack is designed to work with cache coherent devices
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+ * only, but permits an optimization to be enabled in some cases, where
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+ * for some buffers, both the CPU and the GPU use uncached mappings,
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+ * removing the need for DMA snooping and allocation in the CPU caches.
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+ *
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+ * The use of uncached GPU mappings relies on the correct implementation
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+ * of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU
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+ * will use cached mappings nonetheless. On x86 platforms, this does not
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+ * seem to matter, as uncached CPU mappings will snoop the caches in any
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+ * case. However, on ARM and arm64, enabling this optimization on a
|
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+ * platform where NoSnoop is ignored results in loss of coherency, which
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+ * breaks correct operation of the device. Since we have no way of
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+ * detecting whether NoSnoop works or not, just disable this
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+ * optimization entirely for ARM and arm64.
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+ */
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+ return false;
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#else
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return true;
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#endif
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