kernel/0062-fix-set-npu-default-freq-to-1.5G.patch

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2025-01-03 03:30:57 +00:00
From ba5da30440309bcd501e923f3a068aacf32568b7 Mon Sep 17 00:00:00 2001
2024-12-15 18:29:23 +00:00
From: yangwei1 <yangwei1@eswincomputing.com>
Date: Tue, 2 Jul 2024 20:09:02 +0800
2024-12-27 22:35:16 +00:00
Subject: [PATCH 062/222] fix:set npu default freq to 1.5G
2024-12-15 18:29:23 +00:00
Changelogs:
set npu default freq to 1.5G and voltage to 1.05v
---
drivers/memory/eswin/codacache/llc_spram.c | 32 +++++++++++++---------
1 file changed, 19 insertions(+), 13 deletions(-)
diff --git a/drivers/memory/eswin/codacache/llc_spram.c b/drivers/memory/eswin/codacache/llc_spram.c
index e84f3650ae37..4e9027dd5db9 100644
--- a/drivers/memory/eswin/codacache/llc_spram.c
+++ b/drivers/memory/eswin/codacache/llc_spram.c
@@ -683,7 +683,7 @@ static int llc_rst_init(struct platform_device *pdev)
return 0;
}
-static int llc_clk_set_parent(struct platform_device *pdev, u8 *is_high_freq)
+static int llc_clk_set_parent(struct platform_device *pdev, u8 *is_low_freq)
{
int ret;
struct spram_dev *spram = platform_get_drvdata(pdev);
@@ -700,18 +700,24 @@ static int llc_clk_set_parent(struct platform_device *pdev, u8 *is_high_freq)
if ((NULL == npu_regulator) || (IS_ERR(npu_regulator)))
{
dev_warn(dev, "failed to get npu regulator\n");
- *is_high_freq = 0;
+ *is_low_freq = 0;
+ return -ENODEV;
}
else
{
- *is_high_freq = of_property_read_bool(np, "apply_npu_high_freq");
- dev_dbg(dev, "success to get npu regulator,apply_npu_high_freq:%d\n",
- *is_high_freq);
+ *is_low_freq = (of_property_read_bool(np, "apply_npu_1G_freq"));
+ dev_dbg(dev, "success to get npu regulator,apply_npu_1G_freq:%d\n",
+ *is_low_freq);
}
- if (1 == *is_high_freq)
+
+ if (0 == *is_low_freq)
{
- regulator_set_voltage(npu_regulator, NPU_1P5G_VOLTAGE, NPU_1P5G_VOLTAGE);
- dev_dbg(dev, "set volt:%duV ret:%d\n", NPU_1P5G_VOLTAGE,ret);
+ ret = regulator_set_voltage(npu_regulator, NPU_1P5G_VOLTAGE, NPU_1P5G_VOLTAGE);
+ if(0 != ret)
+ {
+ dev_err(dev, "set volt:%duV ret:%d\n", NPU_1P5G_VOLTAGE,ret);
+ return -EINVAL;
+ }
/* devm_regulator_put(npu_regulator); */
mdelay(10);
ret = clk_set_parent(spram->mux_u_npu_core_3mux1_gfree,
@@ -738,7 +744,7 @@ static int llc_clk_set_parent(struct platform_device *pdev, u8 *is_high_freq)
return 0;
}
-static int llc_clk_set_frq(struct platform_device *pdev, u8 is_high_freq)
+static int llc_clk_set_frq(struct platform_device *pdev, u8 is_low_freq)
{
int ret;
unsigned long rate = 0;
@@ -755,7 +761,7 @@ static int llc_clk_set_frq(struct platform_device *pdev, u8 is_high_freq)
return ret;
}
- if (1 == is_high_freq)
+ if (0 == is_low_freq)
{
rate = clk_round_rate(spram->llc_clk, NPU_LLC_CLK_1P5G_RATE);
ret = clk_set_rate(spram->llc_clk, rate);
@@ -881,7 +887,7 @@ static int llc_clk_rst_print(struct platform_device *pdev)
static int llc_clk_rst_init(struct platform_device *pdev)
{
int ret = 0;
- u8 is_high_freq = 0;
+ u8 is_low_freq = 0;
dev_dbg(&pdev->dev, "---%s\n", __func__);
@@ -891,7 +897,7 @@ static int llc_clk_rst_init(struct platform_device *pdev)
return ret;
}
- ret = llc_clk_set_parent(pdev, &is_high_freq);
+ ret = llc_clk_set_parent(pdev, &is_low_freq);
if(ret != 0){
dev_err(&pdev->dev, "llc_clk_set_parent error: %d\n", ret);
return ret;
@@ -903,7 +909,7 @@ static int llc_clk_rst_init(struct platform_device *pdev)
return ret;
}
- ret = llc_clk_set_frq(pdev, is_high_freq);
+ ret = llc_clk_set_frq(pdev, is_low_freq);
if(ret != 0){
dev_err(&pdev->dev, "llc_clk_set_frq error: %d\n", ret);
return ret;
--
2.47.0