kernel/0026-fix-modify-ina226-addr-and-hold-time.patch

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2025-01-03 03:30:57 +00:00
From f2aa693751ed615b3237da26f919107be111495b Mon Sep 17 00:00:00 2001
2024-12-15 18:29:23 +00:00
From: yangwei1 <yangwei1@eswincomputing.com>
Date: Thu, 23 May 2024 20:30:07 +0800
2024-12-27 22:35:16 +00:00
Subject: [PATCH 026/222] fix:modify ina226 addr and hold time
2024-12-15 18:29:23 +00:00
Changelogs:
1.modify ina226 addr form 0x4c to 0x48 in i2c11
2.modify name of hold time from iic_hold_time to i2c-sda-hold-time-ns
---
arch/riscv/boot/dts/eswin/eic7700-evb-a2.dts | 22 +++++++++-----------
arch/riscv/boot/dts/eswin/eic7700-evb.dts | 21 +++++++++----------
2 files changed, 20 insertions(+), 23 deletions(-)
diff --git a/arch/riscv/boot/dts/eswin/eic7700-evb-a2.dts b/arch/riscv/boot/dts/eswin/eic7700-evb-a2.dts
index 8c2b945ed8a9..519c74d06f0e 100644
--- a/arch/riscv/boot/dts/eswin/eic7700-evb-a2.dts
+++ b/arch/riscv/boot/dts/eswin/eic7700-evb-a2.dts
@@ -793,35 +793,33 @@ rtc@51 {
&d0_aon_i2c1 {
/* ina226x4 */
status = "okay";
- eswin,syscfg = <&d0_sys_con 0x3C0 15>;
- iic_hold_time = <0x40>;
-
- u80_cpu: ina226@45 {
+ i2c-sda-hold-time-ns = <0x40>;
+ vdd_cpu: ina226@45 {
compatible = "ti,ina226";
#io-channel-cells = <1>;
- label = "ina226-u80_CPU";
+ label = "vdd_cpu";
reg = <0x45>;
shunt-resistor = <1000>;
};
- u82_soc: ina226@44 {
+ vdd_soc: ina226@44 {
compatible = "ti,ina226";
#io-channel-cells = <1>;
- label = "ina226-u82_soc";
+ label = "vdd_soc";
reg = <0x44>;
shunt-resistor = <1000>;
};
- u83_lpddr4: ina226@41 {
+ vdd_lpddr: ina226@41 {
compatible = "ti,ina226";
#io-channel-cells = <1>;
- label = "ina226-u83_lpddr4";
+ label = "vdd_lpddr";
reg = <0x41>;
shunt-resistor = <1000>;
};
- u99_dc: ina226@4c {
+ dc_in: ina226@48 {
compatible = "ti,ina226";
#io-channel-cells = <1>;
- label = "ina226-u99_dc";
- reg = <0x4c>;
+ label = "dc_in";
+ reg = <0x48>;
shunt-resistor = <1000>;
};
};
diff --git a/arch/riscv/boot/dts/eswin/eic7700-evb.dts b/arch/riscv/boot/dts/eswin/eic7700-evb.dts
index c627133f179c..a1e0766efd04 100644
--- a/arch/riscv/boot/dts/eswin/eic7700-evb.dts
+++ b/arch/riscv/boot/dts/eswin/eic7700-evb.dts
@@ -752,8 +752,7 @@ rtc@51 {
&d0_aon_i2c1 {
/* mpq8785 & ina226x4 */
status = "okay";
- eswin,syscfg = <&d0_sys_con 0x3C0 15>;
- iic_hold_time = <0x40>;
+ i2c-sda-hold-time-ns = <0x40>;
mpq8785@10 {
compatible = "mps,mpq8785";
reg = <0x10>;
@@ -771,32 +770,32 @@ npu_vcc1:npu_svcc{
};
};
};
- u80_cpu: ina226@45 {
+ vdd_cpu: ina226@45 {
compatible = "ti,ina226";
#io-channel-cells = <1>;
- label = "ina226-u80_CPU";
+ label = "vdd_cpu";
reg = <0x45>;
shunt-resistor = <1000>;
};
- u82_soc: ina226@44 {
+ vdd_soc: ina226@44 {
compatible = "ti,ina226";
#io-channel-cells = <1>;
- label = "ina226-u82_soc";
+ label = "vdd_soc";
reg = <0x44>;
shunt-resistor = <1000>;
};
- u83_lpddr4: ina226@41 {
+ vdd_lpddr: ina226@41 {
compatible = "ti,ina226";
#io-channel-cells = <1>;
- label = "ina226-u83_lpddr4";
+ label = "vdd_lpddr";
reg = <0x41>;
shunt-resistor = <1000>;
};
- u99_dc: ina226@4c {
+ dc_in: ina226@48 {
compatible = "ti,ina226";
#io-channel-cells = <1>;
- label = "ina226-u99_dc";
- reg = <0x4c>;
+ label = "dc_in";
+ reg = <0x48>;
shunt-resistor = <1000>;
};
};
--
2.47.0