372f9b9d16
Added patch for upstream issue #979 "Test suite segv on arm64" Moved jeprof util to jemalloc-devel, to give less dependencies on the library package, closes bz #1519586 Respun the patch removing explicit altivec usage. Not all ppc64 have altive
40 lines
1.5 KiB
Diff
40 lines
1.5 KiB
Diff
From 8cfc9dec37b312a2686f602bbcdd102ca07cca99 Mon Sep 17 00:00:00 2001
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From: David Goldblatt <davidgoldblatt@fb.com>
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Date: Fri, 29 Sep 2017 13:54:08 -0700
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Subject: [PATCH] ARM: Don't extend bit LG_VADDR to compute high address bits.
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In userspace ARM on Linux, zero-ing the high bits is the correct way to do this.
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This doesn't fix the fact that we currently set LG_VADDR to 48 on ARM, when in
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fact larger virtual address sizes are coming soon. We'll cross that bridge when
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we come to it.
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---
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include/jemalloc/internal/rtree.h | 12 ++++++++++++
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1 file changed, 12 insertions(+)
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diff --git a/include/jemalloc/internal/rtree.h b/include/jemalloc/internal/rtree.h
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index b5d4db39..4563db23 100644
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--- a/include/jemalloc/internal/rtree.h
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+++ b/include/jemalloc/internal/rtree.h
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@@ -178,9 +178,21 @@ rtree_leaf_elm_bits_read(tsdn_t *tsdn, rtree_t *rtree, rtree_leaf_elm_t *elm,
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JEMALLOC_ALWAYS_INLINE extent_t *
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rtree_leaf_elm_bits_extent_get(uintptr_t bits) {
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+# ifdef __aarch64__
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+ /*
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+ * aarch64 doesn't sign extend the highest virtual address bit to set
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+ * the higher ones. Instead, the high bits gets zeroed.
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+ */
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+ uintptr_t high_bit_mask = ((uintptr_t)1 << LG_VADDR) - 1;
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+ /* Mask off the slab bit. */
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+ uintptr_t low_bit_mask = ~(uintptr_t)1;
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+ uintptr_t mask = high_bit_mask & low_bit_mask;
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+ return (extent_t *)(bits & mask);
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+# else
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/* Restore sign-extended high bits, mask slab bit. */
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return (extent_t *)((uintptr_t)((intptr_t)(bits << RTREE_NHIB) >>
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RTREE_NHIB) & ~((uintptr_t)0x1));
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+# endif
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}
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JEMALLOC_ALWAYS_INLINE szind_t
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