New upstream release
Added patch for upstream issue #979 "Test suite segv on arm64" Moved jeprof util to jemalloc-devel, to give less dependencies on the library package, closes bz #1519586 Respun the patch removing explicit altivec usage. Not all ppc64 have altive
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jemalloc-5.0.1.no_explicit_altivec.patch
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13
jemalloc-5.0.1.no_explicit_altivec.patch
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@ -0,0 +1,13 @@
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--- configure.orig 2017-12-14 12:15:32.517920736 +0100
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+++ configure 2017-12-14 12:16:22.608660037 +0100
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@@ -6865,10 +6865,6 @@
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fi
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;;
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powerpc*)
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- cat >>confdefs.h <<_ACEOF
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-#define HAVE_ALTIVEC
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-_ACEOF
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-
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CPU_SPINWAIT='__asm__ volatile("or 31,31,31")'
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;;
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*)
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@ -1,7 +1,7 @@
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Name: jemalloc
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Version: 4.5.0
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Version: 5.0.1
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Release: 4%{?dist}
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Release: 1%{?dist}
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Summary: General-purpose scalable concurrent malloc implementation
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Group: System Environment/Libraries
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@ -10,9 +10,15 @@ URL: http://www.canonware.com/jemalloc/
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Source0: https://github.com/jemalloc/%{name}/releases/download/%{version}/%{name}-%{version}.tar.bz2
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BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n)
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# Disable explicit altivec
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Patch4: jemalloc-5.0.1.no_explicit_altivec.patch
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# No Transparent Hugepages on systems not supporting them
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Patch5: jemalloc-4.4.0.disable_thp.patch
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# Upstream issue #979
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Patch6: jemalloc_fix_test_suite_segv_aarch64.patch
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BuildRequires: /usr/bin/xsltproc
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BuildRequires: perl-generators
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%ifnarch s390 %{mips}
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@ -35,12 +41,16 @@ developing applications that use %{name}.
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%prep
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%setup -q
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%patch4
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# Disable thp on systems not supporting this, trusting that Fedora will enable
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# this on the build servers when ready for installed systems.
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%ifarch %ix86 %arm aarch64 s390x
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%define disable_thp --disable-thp
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%patch5
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%endif
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%patch6 -p1
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%build
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%ifarch %ix86
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@ -68,6 +78,7 @@ uname -a
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%configure %{?disable_thp}
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make %{?_smp_mflags}
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%check
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make check
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@ -91,7 +102,6 @@ rm -rf %{buildroot}
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%{_libdir}/libjemalloc.so.*
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%{_bindir}/jemalloc.sh
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%{_bindir}/jemalloc-config
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%{_bindir}/jeprof
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%{_libdir}/pkgconfig/jemalloc.pc
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%doc COPYING README VERSION
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%doc doc/jemalloc.html
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@ -99,6 +109,7 @@ rm -rf %{buildroot}
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%files devel
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%defattr(-,root,root,-)
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%{_includedir}/jemalloc
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%{_bindir}/jeprof
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%{_libdir}/libjemalloc.so
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%{_mandir}/man3/jemalloc.3*
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@ -107,6 +118,14 @@ rm -rf %{buildroot}
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%postun -p /sbin/ldconfig
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%changelog
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* Wed Dec 13 2017 Ingvar Hagelund <ingvar@redpill-linpro.com> - 5.0.1-1
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- New upstream release
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- Added patch for upstream issue #979 "Test suite segv on arm64"
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- Moved jeprof util to jemalloc-devel, to give less dependencies
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on the library package, closes bz #1519586
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- Respun the patch removing explicit altivec usage. Not all
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ppc64 have altive
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* Wed Aug 16 2017 Ingvar Hagelund <ingvar@redpill-linpro.com> - 4.5.0-4
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- Rather use ifarch than checking builder kernel for thp support
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- Cleanup; removed unnecessary patch for atomic ops on arm, pulled el5 support,
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jemalloc_fix_test_suite_segv_aarch64.patch
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jemalloc_fix_test_suite_segv_aarch64.patch
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@ -0,0 +1,39 @@
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From 8cfc9dec37b312a2686f602bbcdd102ca07cca99 Mon Sep 17 00:00:00 2001
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From: David Goldblatt <davidgoldblatt@fb.com>
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Date: Fri, 29 Sep 2017 13:54:08 -0700
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Subject: [PATCH] ARM: Don't extend bit LG_VADDR to compute high address bits.
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In userspace ARM on Linux, zero-ing the high bits is the correct way to do this.
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This doesn't fix the fact that we currently set LG_VADDR to 48 on ARM, when in
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fact larger virtual address sizes are coming soon. We'll cross that bridge when
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we come to it.
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---
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include/jemalloc/internal/rtree.h | 12 ++++++++++++
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1 file changed, 12 insertions(+)
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diff --git a/include/jemalloc/internal/rtree.h b/include/jemalloc/internal/rtree.h
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index b5d4db39..4563db23 100644
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--- a/include/jemalloc/internal/rtree.h
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+++ b/include/jemalloc/internal/rtree.h
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@@ -178,9 +178,21 @@ rtree_leaf_elm_bits_read(tsdn_t *tsdn, rtree_t *rtree, rtree_leaf_elm_t *elm,
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JEMALLOC_ALWAYS_INLINE extent_t *
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rtree_leaf_elm_bits_extent_get(uintptr_t bits) {
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+# ifdef __aarch64__
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+ /*
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+ * aarch64 doesn't sign extend the highest virtual address bit to set
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+ * the higher ones. Instead, the high bits gets zeroed.
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+ */
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+ uintptr_t high_bit_mask = ((uintptr_t)1 << LG_VADDR) - 1;
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+ /* Mask off the slab bit. */
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+ uintptr_t low_bit_mask = ~(uintptr_t)1;
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+ uintptr_t mask = high_bit_mask & low_bit_mask;
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+ return (extent_t *)(bits & mask);
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+# else
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/* Restore sign-extended high bits, mask slab bit. */
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return (extent_t *)((uintptr_t)((intptr_t)(bits << RTREE_NHIB) >>
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RTREE_NHIB) & ~((uintptr_t)0x1));
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+# endif
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}
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JEMALLOC_ALWAYS_INLINE szind_t
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