Add support for riscv64

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>

java-12-openjdk-riscv64.patch

@@ -0,0 +1,71 @@
+diff --git a/openjdk/make/autoconf/platform.m4 b/openjdk/make/autoconf/platform.m4
+index 39134d121..e6419d1b6 100644
+--- a/openjdk/make/autoconf/platform.m4
++++ b/openjdk/make/autoconf/platform.m4
+@@ -156,6 +156,18 @@ AC_DEFUN([PLATFORM_EXTRACT_VARS_FROM_CPU],
+       VAR_CPU_BITS=64
+       VAR_CPU_ENDIAN=big
+       ;;
++    riscv32)
++      VAR_CPU=riscv32
++      VAR_CPU_ARCH=riscv
++      VAR_CPU_BITS=32
++      VAR_CPU_ENDIAN=little
++      ;;
++    riscv64)
++      VAR_CPU=riscv64
++      VAR_CPU_ARCH=riscv
++      VAR_CPU_BITS=64
++      VAR_CPU_ENDIAN=little
++      ;;
+     *)
+       AC_MSG_ERROR([unsupported cpu $1])
+       ;;
+diff --git a/openjdk/src/hotspot/os/linux/os_linux.cpp b/openjdk/src/hotspot/os/linux/os_linux.cpp
+index 1d9753688..ae5b794b9 100644
+--- a/openjdk/src/hotspot/os/linux/os_linux.cpp
++++ b/openjdk/src/hotspot/os/linux/os_linux.cpp
+@@ -1667,6 +1667,9 @@ void * os::dll_load(const char *filename, char *ebuf, int ebuflen) {
+ #ifndef EM_AARCH64
+   #define EM_AARCH64    183               /* ARM AARCH64 */
+ #endif
++#ifndef EM_RISCV
++  #define EM_RISCV      243               /* RISC-V */
++#endif
+ 
+   static const arch_t arch_array[]={
+     {EM_386,         EM_386,     ELFCLASS32, ELFDATA2LSB, (char*)"IA 32"},
+@@ -1692,6 +1695,7 @@ void * os::dll_load(const char *filename, char *ebuf, int ebuflen) {
+     {EM_PARISC,      EM_PARISC,  ELFCLASS32, ELFDATA2MSB, (char*)"PARISC"},
+     {EM_68K,         EM_68K,     ELFCLASS32, ELFDATA2MSB, (char*)"M68k"},
+     {EM_AARCH64,     EM_AARCH64, ELFCLASS64, ELFDATA2LSB, (char*)"AARCH64"},
++    {EM_RISCV,       EM_RISCV,   ELFCLASSNONE, ELFDATA2MSB, (char*)"RISC-V"},
+   };
+ 
+ #if  (defined IA32)
+@@ -1726,9 +1730,11 @@ void * os::dll_load(const char *filename, char *ebuf, int ebuflen) {
+   static  Elf32_Half running_arch_code=EM_68K;
+ #elif  (defined SH)
+   static  Elf32_Half running_arch_code=EM_SH;
++#elif  (defined __riscv)
++  static  Elf32_Half running_arch_code=EM_RISCV;
+ #else
+     #error Method os::dll_load requires that one of following is defined:\
+-        AARCH64, ALPHA, ARM, AMD64, IA32, IA64, M68K, MIPS, MIPSEL, PARISC, __powerpc__, __powerpc64__, S390, SH, __sparc
++        AARCH64, ALPHA, ARM, AMD64, IA32, IA64, M68K, MIPS, MIPSEL, PARISC, __powerpc__, __powerpc64__, S390, SH, __sparc, __riscv
+ #endif
+ 
+   // Identify compatability class for VM's architecture and library's architecture
+@@ -1761,10 +1767,12 @@ void * os::dll_load(const char *filename, char *ebuf, int ebuflen) {
+   }
+ 
+ #ifndef S390
++#ifndef __riscv
+   if (lib_arch.elf_class != arch_array[running_arch_index].elf_class) {
+     ::snprintf(diag_msg_buf, diag_msg_max_length-1," (Possible cause: architecture word width mismatch)");
+     return NULL;
+   }
++#endif // !__riscv
+ #endif // !S390
+ 
+   if (lib_arch.compat_class != arch_array[running_arch_index].compat_class) {

java-latest-openjdk.spec

@@ -184,6 +184,9 @@
 %ifarch %{aarch64}
 %global archinstall aarch64
 %endif
+%ifarch riscv64
+%global archinstall riscv64
+%endif
 # 32 bit sparc, optimized for v9
 %ifarch sparcv9
 %global archinstall sparc
@@ -950,7 +953,7 @@ Version: %{newjavaver}.%{buildver}
 # This package needs `.rolling` as part of Release so as to not conflict on install with
 # java-X-openjdk. I.e. when latest rolling release is also an LTS release packaged as
 # java-X-openjdk. See: https://bugzilla.redhat.com/show_bug.cgi?id=1647298
-Release: 1.rolling%{?dist}
+Release: 1.rolling.0.riscv64%{?dist}
 # java-1.5.0-ibm from jpackage.org set Epoch to 1 for unknown reasons
 # and this change was brought into RHEL-4. java-1.5.0-ibm packages
 # also included the epoch in their virtual provides. This created a
@@ -1002,6 +1005,10 @@ Source13: TestCryptoLevel.java
 # Ensure ECDSA is working
 Source14: TestECDSA.java
 
+# New versions of config files with RISC-V (riscv64) support.
+Source100: config.guess
+Source101: config.sub
+
 ############################################
 #
 # RPM/distribution specific patches
@@ -1024,6 +1031,9 @@ Patch5:    pr1983-rh1565658-support_using_the_system_installation_of_nss_with_th
 # Depend on pcs-lite-libs instead of pcs-lite-devel as this is only in optional repo
 Patch6: rh1684077-openjdk_should_depend_on_pcsc-lite-libs_instead_of_pcsc-lite-devel.patch
 
+# RISC-V (riscv64) support
+Patch30: java-12-openjdk-riscv64.patch
+
 BuildRequires: autoconf
 BuildRequires: automake
 BuildRequires: alsa-lib-devel
@@ -1261,6 +1271,12 @@ if [ $prioritylength -ne 8 ] ; then
  exit 14
 fi
 
+%ifarch riscv64
+# Update config.{guess,sub} with RISC-V (riscv64) support
+cp %{SOURCE100} openjdk/make/autoconf/build-aux/autoconf-config.guess
+cp %{SOURCE101} openjdk/make/autoconf/build-aux/autoconf-config.sub
+%endif
+
 # OpenJDK patches
 
 # Remove libraries that are linked
@@ -1272,6 +1288,9 @@ pushd %{top_level_dir_name}
 %patch4 -p1
 %patch5 -p1
 %patch6 -p1
+%ifarch riscv64
+%patch30 -p2
+%endif
 popd # openjdk
 
 %patch1000
@@ -1330,7 +1349,7 @@ export NUM_PROC=${NUM_PROC:-1}
 [ ${NUM_PROC} -gt %{?_smp_ncpus_max} ] && export NUM_PROC=%{?_smp_ncpus_max}
 %endif
 
-%ifarch s390x sparc64 alpha %{power64} %{aarch64}
+%ifarch s390x sparc64 alpha %{power64} %{aarch64} riscv64
 export ARCH_DATA_MODEL=64
 %endif
 %ifarch alpha
@@ -1512,7 +1531,10 @@ quit
 end
 run -version
 EOF
+
+%ifnarch riscv64
 grep 'JavaCallWrapper::JavaCallWrapper' gdb.out
+%endif
 
 # Check src.zip has all sources. See RHBZ#1130490
 jar -tf $JAVA_HOME/lib/src.zip | grep 'sun.misc.Unsafe'
@@ -1824,6 +1846,9 @@ require "copy_jdk_configs.lua"
 
 
 %changelog
+* Mon May 24 2021 David Abdurachmanov <david.abdurachmanov@gmail.com> - 1:12.0.2.9-1.rolling.0.riscv64
+- Add support for riscv64
+
 * Thu Jul 18 2019 Severin Gehwolf <sgehwolf@redhat.com> - 1:12.0.2.9-1.rolling
 - Update to July 2019 CPU update (tag jdk-12.0.2+9)