Compare commits

...

2 Commits

Author SHA1 Message Date
1a25034f20
Disable ppc_stack_overflow_fix.patch
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
2018-09-27 13:29:03 +03:00
cef0e68d7f
Add support for RISC-v (riscv64)
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
2018-09-27 12:06:13 +03:00
4 changed files with 3369 additions and 4 deletions

1486
config.guess vendored Normal file

File diff suppressed because it is too large Load Diff

1790
config.sub vendored Normal file

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,71 @@
diff --git a/openjdk/common/autoconf/platform.m4 b/openjdk/common/autoconf/platform.m4
index 0dbf74cbe..dcf3f747b 100644
--- a/openjdk/common/autoconf/platform.m4
+++ b/openjdk/common/autoconf/platform.m4
@@ -96,6 +96,18 @@ AC_DEFUN([PLATFORM_EXTRACT_VARS_FROM_CPU],
VAR_CPU_BITS=64
VAR_CPU_ENDIAN=big
;;
+ riscv32)
+ VAR_CPU=riscv32
+ VAR_CPU_ARCH=riscv
+ VAR_CPU_BITS=32
+ VAR_CPU_ENDIAN=little
+ ;;
+ riscv64)
+ VAR_CPU=riscv64
+ VAR_CPU_ARCH=riscv
+ VAR_CPU_BITS=64
+ VAR_CPU_ENDIAN=little
+ ;;
*)
AC_MSG_ERROR([unsupported cpu $1])
;;
diff --git a/openjdk/hotspot/src/os/linux/vm/os_linux.cpp b/openjdk/hotspot/src/os/linux/vm/os_linux.cpp
index bcce508e0..6e2659d12 100644
--- a/openjdk/hotspot/src/os/linux/vm/os_linux.cpp
+++ b/openjdk/hotspot/src/os/linux/vm/os_linux.cpp
@@ -1743,6 +1743,9 @@ void * os::dll_load(const char *filename, char *ebuf, int ebuflen) {
#ifndef EM_AARCH64
#define EM_AARCH64 183 /* ARM AARCH64 */
#endif
+#ifndef EM_RISCV
+ #define EM_RISCV 243 /* RISC-V */
+#endif
static const arch_t arch_array[]={
{EM_386, EM_386, ELFCLASS32, ELFDATA2LSB, (char*)"IA 32"},
@@ -1766,6 +1769,7 @@ void * os::dll_load(const char *filename, char *ebuf, int ebuflen) {
{EM_PARISC, EM_PARISC, ELFCLASS32, ELFDATA2MSB, (char*)"PARISC"},
{EM_68K, EM_68K, ELFCLASS32, ELFDATA2MSB, (char*)"M68k"},
{EM_AARCH64, EM_AARCH64, ELFCLASS64, ELFDATA2LSB, (char*)"AARCH64"},
+ {EM_RISCV, EM_RISCV, ELFCLASSNONE, ELFDATA2MSB, (char*)"RISC-V"},
};
#if (defined IA32)
@@ -1798,9 +1802,11 @@ void * os::dll_load(const char *filename, char *ebuf, int ebuflen) {
static Elf32_Half running_arch_code=EM_MIPS;
#elif (defined M68K)
static Elf32_Half running_arch_code=EM_68K;
+#elif (defined __riscv)
+ static Elf32_Half running_arch_code=EM_RISCV;
#else
#error Method os::dll_load requires that one of following is defined:\
- AARCH64, ALPHA, ARM, AMD64, IA32, IA64, M68K, MIPS, MIPSEL, PARISC, __powerpc__, __powerpc64__, S390, __sparc
+ AARCH64, ALPHA, ARM, AMD64, IA32, IA64, M68K, MIPS, MIPSEL, PARISC, __powerpc__, __powerpc64__, S390, __sparc, __riscv
#endif
// Identify compatability class for VM's architecture and library's architecture
@@ -1833,10 +1839,12 @@ void * os::dll_load(const char *filename, char *ebuf, int ebuflen) {
}
#ifndef S390
+#ifndef __riscv
if (lib_arch.elf_class != arch_array[running_arch_index].elf_class) {
::snprintf(diag_msg_buf, diag_msg_max_length-1," (Possible cause: architecture word width mismatch)");
return NULL;
}
+#endif // !__riscv
#endif // !S390
if (lib_arch.compat_class != arch_array[running_arch_index].compat_class) {

View File

@ -113,6 +113,9 @@
%ifarch %{aarch64}
%global archinstall aarch64
%endif
%ifarch riscv64
%global archinstall riscv64
%endif
# 32 bit sparc, optimized for v9
%ifarch sparcv9
%global archinstall sparc
@ -853,7 +856,7 @@ Provides: java-%{javaver}-%{origin}-accessiblity = %{epoch}:%{version}-%{release
Name: java-%{majorver}-%{origin}
Version: %{newjavaver}.%{buildver}
Release: 4%{?dist}
Release: 4.1.riscv64%{?dist}
# java-1.5.0-ibm from jpackage.org set Epoch to 1 for unknown reasons,
# and this change was brought into RHEL-4. java-1.5.0-ibm packages
# also included the epoch in their virtual provides. This created a
@ -900,6 +903,10 @@ Source13: TestCryptoLevel.java
# Ensure ECDSA is working
Source14: TestECDSA.java
# New versions of config files with RISC-V (riscv64) support.
Source100: config.guess
Source101: config.sub
# RPM/distribution specific patches
# Ignore AWTError when assistive technologies are loaded
@ -924,10 +931,11 @@ Patch101: sorted-diff.patch
Patch102: java-1.9.0-openjdk-size_t.patch
Patch103: hotspot-min-max-macros.patch
Patch104: bootcycle_jobs.patch
Patch105: java-9-openjdk-riscv64.patch
#Patch300: jstack-pr1845.patch
Patch400: ppc_stack_overflow_fix.patch
#Patch400: ppc_stack_overflow_fix.patch
Patch401: aarch64BuildFailure.patch
# Non-OpenJDK fixes
@ -1210,6 +1218,10 @@ if [ $prioritylength -ne 7 ] ; then
fi
cp %{SOURCE2} .
# Update config.{guess,sub} with RISC-V (riscv64) support
cp %{SOURCE100} openjdk/common/autoconf/build-aux/
cp %{SOURCE101} openjdk/common/autoconf/build-aux/
# OpenJDK patches
# Remove libraries that are linked
@ -1232,9 +1244,12 @@ sh %{SOURCE12}
#%patch103 -p1
%patch104 -p1
# Add support for RISC-V (riscv64)
%patch105 -p2
# Zero PPC fixes.
# TODO: propose them upstream
%patch400 -p1
#patch400 -p1
%patch401 -p1
popd
@ -1294,7 +1309,7 @@ export NUM_PROC=${NUM_PROC:-1}
[ ${NUM_PROC} -gt %{?_smp_ncpus_max} ] && export NUM_PROC=%{?_smp_ncpus_max}
%endif
%ifarch s390x sparc64 alpha %{power64} %{aarch64}
%ifarch s390x sparc64 alpha %{power64} %{aarch64} riscv64
export ARCH_DATA_MODEL=64
%endif
%ifarch alpha
@ -1819,6 +1834,9 @@ require "copy_jdk_configs.lua"
%changelog
* Thu Sep 27 2018 David Abdurachmanov <david.abdurachmanov@gmail.com> - 1:9.0.1.11-4.1.riscv64
- Add support for RISC-V (riscv64)
* Wed Nov 22 2017 jvanek <jvanek@redhat.com> - 1:9.0.1.11-4
- added link to cacerts
- unlike jdk8, cacert link is absolute link