diff --git a/common/m4/gst-arch.m4 b/common/m4/gst-arch.m4
index 4ad7680..6da10fc 100644
--- a/common/m4/gst-arch.m4
+++ b/common/m4/gst-arch.m4
@@ -81,6 +81,9 @@ AC_DEFUN([AG_GST_ARCH],
     xcrisv32)
       HAVE_CPU_CRISV32=yes
       AC_DEFINE(HAVE_CPU_CRISV32, 1, [Define if the target CPU is a CRISv32]) ;;
+    xriscv64)
+      HAVE_CPU_RISCV64=yes
+      AC_DEFINE(HAVE_CPU_RISCV64, 1, [Define if the target CPU is RISCV64]) ;;
   esac
 
   dnl Determine endianness
@@ -111,7 +114,7 @@ AC_DEFUN([AG_GST_UNALIGNED_ACCESS], [
   AC_MSG_CHECKING([if unaligned memory access works correctly])
   if test x"$as_cv_unaligned_access" = x ; then
     case $host in
-      alpha*|arc*|arm*|aarch64*|hp*|mips*|sh*|sparc*|ia64*)
+      alpha*|arc*|arm*|aarch64*|hp*|mips*|sh*|sparc*|ia64*|riscv*)
         _AS_ECHO_N([(blacklisted) ])
         as_cv_unaligned_access=no
 	;;
diff --git a/meson.build b/meson.build
index 0442535..3dfc8f5 100644
--- a/meson.build
+++ b/meson.build
@@ -169,6 +169,7 @@ host_defines = [
   [ 'hppa', 'HAVE_CPU_HPPA' ],
   [ 'm68k', 'HAVE_CPU_M68K' ],
   [ 's390', 'HAVE_CPU_S390' ],
+  [ 'riscv64', 'HAVE_CPU_RISCV64' ],
 ]
 foreach h : host_defines
   if h.get(0) == host_machine.cpu()