diff --git a/gstreamer-add-riscv64.patch b/gstreamer-add-riscv64.patch new file mode 100644 index 0000000..ec5f67f --- /dev/null +++ b/gstreamer-add-riscv64.patch @@ -0,0 +1,48 @@ +diff --git a/common/m4/gst-arch.m4 b/common/m4/gst-arch.m4 +index 4ad7680..6da10fc 100644 +--- a/common/m4/gst-arch.m4 ++++ b/common/m4/gst-arch.m4 +@@ -81,6 +81,9 @@ AC_DEFUN([AG_GST_ARCH], + xcrisv32) + HAVE_CPU_CRISV32=yes + AC_DEFINE(HAVE_CPU_CRISV32, 1, [Define if the target CPU is a CRISv32]) ;; ++ xriscv64) ++ HAVE_CPU_RISCV64=yes ++ AC_DEFINE(HAVE_CPU_RISCV64, 1, [Define if the target CPU is RISCV64]) ;; + esac + + dnl Determine endianness +@@ -111,7 +114,7 @@ AC_DEFUN([AG_GST_UNALIGNED_ACCESS], [ + AC_MSG_CHECKING([if unaligned memory access works correctly]) + if test x"$as_cv_unaligned_access" = x ; then + case $host in +- alpha*|arc*|arm*|aarch64*|hp*|mips*|sh*|sparc*|ia64*) ++ alpha*|arc*|arm*|aarch64*|hp*|mips*|sh*|sparc*|ia64*|riscv*) + _AS_ECHO_N([(blacklisted) ]) + as_cv_unaligned_access=no + ;; +diff --git a/gst/gstconfig.h.in b/gst/gstconfig.h.in +index 6351c04..33dfed1 100644 +--- a/gst/gstconfig.h.in ++++ b/gst/gstconfig.h.in +@@ -104,7 +104,7 @@ + * http://docs.oracle.com/cd/E19205-01/820-4155/c++_faq.html#Vers6 + * https://software.intel.com/en-us/node/583402 + */ +-#if defined(__alpha__) || defined(__arc__) || defined(__arm__) || defined(__aarch64__) || defined(__bfin) || defined(__hppa__) || defined(__nios2__) || defined(__MICROBLAZE__) || defined(__mips__) || defined(__or1k__) || defined(__sh__) || defined(__SH4__) || defined(__sparc__) || defined(__sparc) || defined(__ia64__) || defined(_M_ALPHA) || defined(_M_ARM) || defined(_M_IA64) || defined(__xtensa__) || defined(__e2k__) ++#if defined(__alpha__) || defined(__arc__) || defined(__arm__) || defined(__aarch64__) || defined(__bfin) || defined(__hppa__) || defined(__nios2__) || defined(__MICROBLAZE__) || defined(__mips__) || defined(__or1k__) || defined(__sh__) || defined(__SH4__) || defined(__sparc__) || defined(__sparc) || defined(__ia64__) || defined(_M_ALPHA) || defined(_M_ARM) || defined(_M_IA64) || defined(__xtensa__) || defined(__e2k__) || defined(__riscv) + # define GST_HAVE_UNALIGNED_ACCESS 0 + #elif defined(__i386__) || defined(__i386) || defined(__amd64__) || defined(__amd64) || defined(__x86_64__) || defined(__ppc__) || defined(__ppc64__) || defined(__powerpc__) || defined(__powerpc64__) || defined(__m68k__) || defined(_M_IX86) || defined(_M_AMD64) || defined(_M_X64) || defined(__s390__) || defined(__s390x__) || defined(__zarch__) + # define GST_HAVE_UNALIGNED_ACCESS 1 +diff --git a/meson.build b/meson.build +index e6e315b..e4dc8b8 100644 +--- a/meson.build ++++ b/meson.build +@@ -122,6 +122,7 @@ host_defines = [ + [ 'hppa', 'HAVE_CPU_HPPA' ], + [ 'm68k', 'HAVE_CPU_M68K' ], + [ 's390', 'HAVE_CPU_S390' ], ++ [ 'riscv64', 'HAVE_CPU_RISCV64' ], + ] + foreach h : host_defines + if h.get(0) == host_machine.cpu() diff --git a/gstreamer1.spec b/gstreamer1.spec index 36ba987..b81b16d 100644 --- a/gstreamer1.spec +++ b/gstreamer1.spec @@ -10,7 +10,7 @@ Name: gstreamer1 Version: 1.14.1 -Release: 5%{?gitcommit:.git%{shortcommit}}%{?dist} +Release: 5%{?gitcommit:.git%{shortcommit}}.0.riscv64%{?dist} Summary: GStreamer streaming media framework runtime License: LGPLv2+ @@ -24,6 +24,7 @@ Source0: http://gstreamer.freedesktop.org/src/gstreamer/gstreamer-%{versi %endif ## For GStreamer RPM provides Patch0: gstreamer-inspect-rpm-format.patch +Patch1: gstreamer-add-riscv64.patch Source1: gstreamer1.prov Source2: gstreamer1.attr @@ -91,6 +92,7 @@ GStreamer streaming media framework. %prep %setup -q -n gstreamer-%{version} %patch0 -p1 -b .rpm-provides +%patch1 -p1 -b .riscv64 %build NOCONFIGURE=1 \ @@ -201,6 +203,9 @@ install -m0644 -D %{SOURCE2} $RPM_BUILD_ROOT%{_rpmconfigdir}/fileattrs/gstreamer %changelog +* Tue Jun 19 2018 David Abdurachmanov - 1.14.1-5.0.riscv64 +- Add support for RISC-V (riscv64) + * Fri Jun 15 2018 Wim Taymans - 1.14.1-5 - Remove xfig build dependency. It has not been needed since version 1.2.0