4e3257320c
Upstream commit: 55640ed3fde48360a8e8083be4843bd2dc7cecfe - i386: Regenerate ulps - linux: Fix missing internal 64 bit time_t stat usage - x86: Optimize L(less_vec) case in memcmp-evex-movbe.S - x86: Don't set Prefer_No_AVX512 for processors with AVX512 and AVX-VNNI - x86-64: Use notl in EVEX strcmp [BZ #28646] - x86: Shrink memcmp-sse4.S code size - x86: Double size of ERMS rep_movsb_threshold in dl-cacheinfo.h - x86: Optimize memmove-vec-unaligned-erms.S - x86-64: Replace movzx with movzbl - x86-64: Remove Prefer_AVX2_STRCMP - x86-64: Improve EVEX strcmp with masked load - x86: Replace sse2 instructions with avx in memcmp-evex-movbe.S - x86: Optimize memset-vec-unaligned-erms.S - x86: Optimize memcmp-evex-movbe.S for frontend behavior and size - x86: Modify ENTRY in sysdep.h so that p2align can be specified - x86-64: Optimize load of all bits set into ZMM register [BZ #28252] - scripts/glibcelf.py: Mark as UNSUPPORTED on Python 3.5 and earlier - dlfcn: Do not use rtld_active () to determine ld.so state (bug 29078) - INSTALL: Rephrase -with-default-link documentation - misc: Fix rare fortify crash on wchar funcs. [BZ 29030] - Default to --with-default-link=no (bug 25812) - scripts: Add glibcelf.py module
654 lines
18 KiB
Diff
654 lines
18 KiB
Diff
commit 5ec3416853c4150c4d13312e05f93a053586d528
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Author: Noah Goldstein <goldstein.w.n@gmail.com>
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Date: Tue Sep 21 18:45:03 2021 -0500
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x86: Optimize memcmp-evex-movbe.S for frontend behavior and size
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No bug.
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The frontend optimizations are to:
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1. Reorganize logically connected basic blocks so they are either in
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the same cache line or adjacent cache lines.
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2. Avoid cases when basic blocks unnecissarily cross cache lines.
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3. Try and 32 byte align any basic blocks possible without sacrificing
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code size. Smaller / Less hot basic blocks are used for this.
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Overall code size shrunk by 168 bytes. This should make up for any
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extra costs due to aligning to 64 bytes.
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In general performance before deviated a great deal dependending on
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whether entry alignment % 64 was 0, 16, 32, or 48. These changes
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essentially make it so that the current implementation is at least
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equal to the best alignment of the original for any arguments.
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The only additional optimization is in the page cross case. Branch on
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equals case was removed from the size == [4, 7] case. As well the [4,
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7] and [2, 3] case where swapped as [4, 7] is likely a more hot
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argument size.
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test-memcmp and test-wmemcmp are both passing.
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(cherry picked from commit 1bd8b8d58fc9967cc073d2c13bfb6befefca2faa)
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diff --git a/sysdeps/x86_64/multiarch/memcmp-evex-movbe.S b/sysdeps/x86_64/multiarch/memcmp-evex-movbe.S
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index 654dc7ac8ccb9445..2761b54f2e7dea9f 100644
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--- a/sysdeps/x86_64/multiarch/memcmp-evex-movbe.S
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+++ b/sysdeps/x86_64/multiarch/memcmp-evex-movbe.S
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@@ -34,7 +34,24 @@
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area.
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7. Use 2 vector compares when size is 2 * CHAR_PER_VEC or less.
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8. Use 4 vector compares when size is 4 * CHAR_PER_VEC or less.
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- 9. Use 8 vector compares when size is 8 * CHAR_PER_VEC or less. */
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+ 9. Use 8 vector compares when size is 8 * CHAR_PER_VEC or less.
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+
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+When possible the implementation tries to optimize for frontend in the
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+following ways:
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+Throughput:
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+ 1. All code sections that fit are able to run optimally out of the
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+ LSD.
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+ 2. All code sections that fit are able to run optimally out of the
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+ DSB
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+ 3. Basic blocks are contained in minimum number of fetch blocks
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+ necessary.
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+
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+Latency:
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+ 1. Logically connected basic blocks are put in the same
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+ cache-line.
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+ 2. Logically connected basic blocks that do not fit in the same
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+ cache-line are put in adjacent lines. This can get beneficial
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+ L2 spatial prefetching and L1 next-line prefetching. */
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# include <sysdep.h>
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@@ -47,9 +64,11 @@
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# ifdef USE_AS_WMEMCMP
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# define CHAR_SIZE 4
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# define VPCMP vpcmpd
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+# define VPTEST vptestmd
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# else
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# define CHAR_SIZE 1
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# define VPCMP vpcmpub
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+# define VPTEST vptestmb
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# endif
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# define VEC_SIZE 32
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@@ -75,7 +94,9 @@
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*/
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.section .text.evex,"ax",@progbits
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-ENTRY (MEMCMP)
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+/* Cache align memcmp entry. This allows for much more thorough
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+ frontend optimization. */
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+ENTRY_P2ALIGN (MEMCMP, 6)
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# ifdef __ILP32__
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/* Clear the upper 32 bits. */
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movl %edx, %edx
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@@ -89,7 +110,7 @@ ENTRY (MEMCMP)
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VPCMP $4, (%rdi), %YMM1, %k1
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kmovd %k1, %eax
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/* NB: eax must be destination register if going to
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- L(return_vec_[0,2]). For L(return_vec_3 destination register
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+ L(return_vec_[0,2]). For L(return_vec_3) destination register
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must be ecx. */
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testl %eax, %eax
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jnz L(return_vec_0)
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@@ -121,10 +142,6 @@ ENTRY (MEMCMP)
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testl %ecx, %ecx
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jnz L(return_vec_3)
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- /* Zero YMM0. 4x VEC reduction is done with vpxor + vtern so
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- compare with zero to get a mask is needed. */
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- vpxorq %XMM0, %XMM0, %XMM0
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-
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/* Go to 4x VEC loop. */
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cmpq $(CHAR_PER_VEC * 8), %rdx
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ja L(more_8x_vec)
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@@ -148,47 +165,61 @@ ENTRY (MEMCMP)
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VMOVU (VEC_SIZE * 2)(%rsi), %YMM3
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vpxorq (VEC_SIZE * 2)(%rdi), %YMM3, %YMM3
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- /* Or together YMM1, YMM2, and YMM3 into YMM3. */
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- vpternlogd $0xfe, %YMM1, %YMM2, %YMM3
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VMOVU (VEC_SIZE * 3)(%rsi), %YMM4
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/* Ternary logic to xor (VEC_SIZE * 3)(%rdi) with YMM4 while
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- oring with YMM3. Result is stored in YMM4. */
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- vpternlogd $0xde, (VEC_SIZE * 3)(%rdi), %YMM3, %YMM4
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- /* Compare YMM4 with 0. If any 1s s1 and s2 don't match. */
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- VPCMP $4, %YMM4, %YMM0, %k1
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+ oring with YMM1. Result is stored in YMM4. */
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+ vpternlogd $0xde, (VEC_SIZE * 3)(%rdi), %YMM1, %YMM4
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+
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+ /* Or together YMM2, YMM3, and YMM4 into YMM4. */
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+ vpternlogd $0xfe, %YMM2, %YMM3, %YMM4
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+
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+ /* Test YMM4 against itself. Store any CHAR mismatches in k1.
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+ */
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+ VPTEST %YMM4, %YMM4, %k1
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+ /* k1 must go to ecx for L(return_vec_0_1_2_3). */
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kmovd %k1, %ecx
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testl %ecx, %ecx
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jnz L(return_vec_0_1_2_3)
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/* NB: eax must be zero to reach here. */
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ret
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- /* NB: aligning 32 here allows for the rest of the jump targets
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- to be tuned for 32 byte alignment. Most important this ensures
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- the L(more_8x_vec) loop is 32 byte aligned. */
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- .p2align 5
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-L(less_vec):
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- /* Check if one or less CHAR. This is necessary for size = 0 but
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- is also faster for size = CHAR_SIZE. */
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- cmpl $1, %edx
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- jbe L(one_or_less)
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+ .p2align 4
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+L(8x_end_return_vec_0_1_2_3):
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+ movq %rdx, %rdi
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+L(8x_return_vec_0_1_2_3):
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+ addq %rdi, %rsi
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+L(return_vec_0_1_2_3):
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+ VPTEST %YMM1, %YMM1, %k0
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+ kmovd %k0, %eax
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+ testl %eax, %eax
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+ jnz L(return_vec_0)
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- /* Check if loading one VEC from either s1 or s2 could cause a
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- page cross. This can have false positives but is by far the
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- fastest method. */
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- movl %edi, %eax
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- orl %esi, %eax
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- andl $(PAGE_SIZE - 1), %eax
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- cmpl $(PAGE_SIZE - VEC_SIZE), %eax
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- jg L(page_cross_less_vec)
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+ VPTEST %YMM2, %YMM2, %k0
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+ kmovd %k0, %eax
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+ testl %eax, %eax
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+ jnz L(return_vec_1)
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- /* No page cross possible. */
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- VMOVU (%rsi), %YMM2
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- VPCMP $4, (%rdi), %YMM2, %k1
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- kmovd %k1, %eax
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- /* Create mask in ecx for potentially in bound matches. */
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- bzhil %edx, %eax, %eax
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- jnz L(return_vec_0)
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+ VPTEST %YMM3, %YMM3, %k0
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+ kmovd %k0, %eax
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+ testl %eax, %eax
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+ jnz L(return_vec_2)
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+L(return_vec_3):
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+ /* bsf saves 1 byte from tzcnt. This keep L(return_vec_3) in one
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+ fetch block and the entire L(*return_vec_0_1_2_3) in 1 cache
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+ line. */
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+ bsfl %ecx, %ecx
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+# ifdef USE_AS_WMEMCMP
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+ movl (VEC_SIZE * 3)(%rdi, %rcx, CHAR_SIZE), %eax
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+ xorl %edx, %edx
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+ cmpl (VEC_SIZE * 3)(%rsi, %rcx, CHAR_SIZE), %eax
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+ setg %dl
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+ leal -1(%rdx, %rdx), %eax
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+# else
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+ movzbl (VEC_SIZE * 3)(%rdi, %rcx), %eax
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+ movzbl (VEC_SIZE * 3)(%rsi, %rcx), %ecx
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+ subl %ecx, %eax
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+# endif
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ret
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.p2align 4
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@@ -209,10 +240,11 @@ L(return_vec_0):
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# endif
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ret
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- /* NB: No p2align necessary. Alignment % 16 is naturally 1
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- which is good enough for a target not in a loop. */
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+ .p2align 4
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L(return_vec_1):
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- tzcntl %eax, %eax
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+ /* bsf saves 1 byte over tzcnt and keeps L(return_vec_1) in one
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+ fetch block. */
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+ bsfl %eax, %eax
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# ifdef USE_AS_WMEMCMP
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movl VEC_SIZE(%rdi, %rax, CHAR_SIZE), %ecx
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xorl %edx, %edx
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@@ -226,10 +258,11 @@ L(return_vec_1):
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# endif
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ret
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- /* NB: No p2align necessary. Alignment % 16 is naturally 2
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- which is good enough for a target not in a loop. */
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+ .p2align 4,, 10
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L(return_vec_2):
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- tzcntl %eax, %eax
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+ /* bsf saves 1 byte over tzcnt and keeps L(return_vec_2) in one
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+ fetch block. */
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+ bsfl %eax, %eax
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# ifdef USE_AS_WMEMCMP
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movl (VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %ecx
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xorl %edx, %edx
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@@ -243,40 +276,6 @@ L(return_vec_2):
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# endif
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ret
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- .p2align 4
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-L(8x_return_vec_0_1_2_3):
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- /* Returning from L(more_8x_vec) requires restoring rsi. */
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- addq %rdi, %rsi
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-L(return_vec_0_1_2_3):
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- VPCMP $4, %YMM1, %YMM0, %k0
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- kmovd %k0, %eax
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- testl %eax, %eax
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- jnz L(return_vec_0)
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-
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- VPCMP $4, %YMM2, %YMM0, %k0
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- kmovd %k0, %eax
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- testl %eax, %eax
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- jnz L(return_vec_1)
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-
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- VPCMP $4, %YMM3, %YMM0, %k0
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- kmovd %k0, %eax
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- testl %eax, %eax
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- jnz L(return_vec_2)
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-L(return_vec_3):
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- tzcntl %ecx, %ecx
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-# ifdef USE_AS_WMEMCMP
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- movl (VEC_SIZE * 3)(%rdi, %rcx, CHAR_SIZE), %eax
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- xorl %edx, %edx
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- cmpl (VEC_SIZE * 3)(%rsi, %rcx, CHAR_SIZE), %eax
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- setg %dl
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- leal -1(%rdx, %rdx), %eax
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-# else
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- movzbl (VEC_SIZE * 3)(%rdi, %rcx), %eax
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- movzbl (VEC_SIZE * 3)(%rsi, %rcx), %ecx
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- subl %ecx, %eax
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-# endif
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- ret
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-
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.p2align 4
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L(more_8x_vec):
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/* Set end of s1 in rdx. */
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@@ -288,21 +287,19 @@ L(more_8x_vec):
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andq $-VEC_SIZE, %rdi
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/* Adjust because first 4x vec where check already. */
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subq $-(VEC_SIZE * 4), %rdi
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+
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.p2align 4
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L(loop_4x_vec):
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VMOVU (%rsi, %rdi), %YMM1
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vpxorq (%rdi), %YMM1, %YMM1
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-
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VMOVU VEC_SIZE(%rsi, %rdi), %YMM2
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vpxorq VEC_SIZE(%rdi), %YMM2, %YMM2
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-
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VMOVU (VEC_SIZE * 2)(%rsi, %rdi), %YMM3
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vpxorq (VEC_SIZE * 2)(%rdi), %YMM3, %YMM3
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- vpternlogd $0xfe, %YMM1, %YMM2, %YMM3
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-
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VMOVU (VEC_SIZE * 3)(%rsi, %rdi), %YMM4
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- vpternlogd $0xde, (VEC_SIZE * 3)(%rdi), %YMM3, %YMM4
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- VPCMP $4, %YMM4, %YMM0, %k1
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+ vpternlogd $0xde, (VEC_SIZE * 3)(%rdi), %YMM1, %YMM4
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+ vpternlogd $0xfe, %YMM2, %YMM3, %YMM4
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+ VPTEST %YMM4, %YMM4, %k1
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kmovd %k1, %ecx
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testl %ecx, %ecx
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jnz L(8x_return_vec_0_1_2_3)
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@@ -319,28 +316,25 @@ L(loop_4x_vec):
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cmpl $(VEC_SIZE * 2), %edi
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jae L(8x_last_2x_vec)
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+ vpxorq (VEC_SIZE * 2)(%rdx), %YMM3, %YMM3
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+
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VMOVU (%rsi, %rdx), %YMM1
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vpxorq (%rdx), %YMM1, %YMM1
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VMOVU VEC_SIZE(%rsi, %rdx), %YMM2
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vpxorq VEC_SIZE(%rdx), %YMM2, %YMM2
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-
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- vpxorq (VEC_SIZE * 2)(%rdx), %YMM3, %YMM3
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- vpternlogd $0xfe, %YMM1, %YMM2, %YMM3
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-
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VMOVU (VEC_SIZE * 3)(%rsi, %rdx), %YMM4
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- vpternlogd $0xde, (VEC_SIZE * 3)(%rdx), %YMM3, %YMM4
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- VPCMP $4, %YMM4, %YMM0, %k1
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+ vpternlogd $0xde, (VEC_SIZE * 3)(%rdx), %YMM1, %YMM4
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+ vpternlogd $0xfe, %YMM2, %YMM3, %YMM4
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+ VPTEST %YMM4, %YMM4, %k1
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kmovd %k1, %ecx
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- /* Restore s1 pointer to rdi. */
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- movq %rdx, %rdi
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testl %ecx, %ecx
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- jnz L(8x_return_vec_0_1_2_3)
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+ jnz L(8x_end_return_vec_0_1_2_3)
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/* NB: eax must be zero to reach here. */
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ret
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/* Only entry is from L(more_8x_vec). */
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- .p2align 4
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+ .p2align 4,, 10
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L(8x_last_2x_vec):
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VPCMP $4, (VEC_SIZE * 2)(%rdx), %YMM3, %k1
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kmovd %k1, %eax
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@@ -355,7 +349,31 @@ L(8x_last_1x_vec):
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jnz L(8x_return_vec_3)
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ret
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- .p2align 4
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+ /* Not ideally aligned (at offset +9 bytes in fetch block) but
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+ not aligning keeps it in the same cache line as
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+ L(8x_last_1x/2x_vec) so likely worth it. As well, saves code
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+ size. */
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+ .p2align 4,, 4
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+L(8x_return_vec_2):
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+ subq $VEC_SIZE, %rdx
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+L(8x_return_vec_3):
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+ bsfl %eax, %eax
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+# ifdef USE_AS_WMEMCMP
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+ leaq (%rdx, %rax, CHAR_SIZE), %rax
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+ movl (VEC_SIZE * 3)(%rax), %ecx
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+ xorl %edx, %edx
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+ cmpl (VEC_SIZE * 3)(%rsi, %rax), %ecx
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+ setg %dl
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+ leal -1(%rdx, %rdx), %eax
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+# else
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+ addq %rdx, %rax
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+ movzbl (VEC_SIZE * 3)(%rsi, %rax), %ecx
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+ movzbl (VEC_SIZE * 3)(%rax), %eax
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+ subl %ecx, %eax
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+# endif
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+ ret
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+
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+ .p2align 4,, 10
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L(last_2x_vec):
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/* Check second to last VEC. */
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VMOVU -(VEC_SIZE * 2)(%rsi, %rdx, CHAR_SIZE), %YMM1
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@@ -374,26 +392,49 @@ L(last_1x_vec):
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jnz L(return_vec_0_end)
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ret
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- .p2align 4
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-L(8x_return_vec_2):
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- subq $VEC_SIZE, %rdx
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-L(8x_return_vec_3):
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- tzcntl %eax, %eax
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+ .p2align 4,, 10
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+L(return_vec_1_end):
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+ /* Use bsf to save code size. This is necessary to have
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+ L(one_or_less) fit in aligning bytes between. */
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+ bsfl %eax, %eax
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+ addl %edx, %eax
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# ifdef USE_AS_WMEMCMP
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- leaq (%rdx, %rax, CHAR_SIZE), %rax
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- movl (VEC_SIZE * 3)(%rax), %ecx
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+ movl -(VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %ecx
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xorl %edx, %edx
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- cmpl (VEC_SIZE * 3)(%rsi, %rax), %ecx
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+ cmpl -(VEC_SIZE * 2)(%rsi, %rax, CHAR_SIZE), %ecx
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setg %dl
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leal -1(%rdx, %rdx), %eax
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# else
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- addq %rdx, %rax
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- movzbl (VEC_SIZE * 3)(%rsi, %rax), %ecx
|
|
- movzbl (VEC_SIZE * 3)(%rax), %eax
|
|
+ movzbl -(VEC_SIZE * 2)(%rsi, %rax), %ecx
|
|
+ movzbl -(VEC_SIZE * 2)(%rdi, %rax), %eax
|
|
subl %ecx, %eax
|
|
# endif
|
|
ret
|
|
|
|
+ /* NB: L(one_or_less) fits in alignment padding between
|
|
+ L(return_vec_1_end) and L(return_vec_0_end). */
|
|
+# ifdef USE_AS_WMEMCMP
|
|
+L(one_or_less):
|
|
+ jb L(zero)
|
|
+ movl (%rdi), %ecx
|
|
+ xorl %edx, %edx
|
|
+ cmpl (%rsi), %ecx
|
|
+ je L(zero)
|
|
+ setg %dl
|
|
+ leal -1(%rdx, %rdx), %eax
|
|
+ ret
|
|
+# else
|
|
+L(one_or_less):
|
|
+ jb L(zero)
|
|
+ movzbl (%rsi), %ecx
|
|
+ movzbl (%rdi), %eax
|
|
+ subl %ecx, %eax
|
|
+ ret
|
|
+# endif
|
|
+L(zero):
|
|
+ xorl %eax, %eax
|
|
+ ret
|
|
+
|
|
.p2align 4
|
|
L(return_vec_0_end):
|
|
tzcntl %eax, %eax
|
|
@@ -412,23 +453,56 @@ L(return_vec_0_end):
|
|
ret
|
|
|
|
.p2align 4
|
|
-L(return_vec_1_end):
|
|
+L(less_vec):
|
|
+ /* Check if one or less CHAR. This is necessary for size == 0
|
|
+ but is also faster for size == CHAR_SIZE. */
|
|
+ cmpl $1, %edx
|
|
+ jbe L(one_or_less)
|
|
+
|
|
+ /* Check if loading one VEC from either s1 or s2 could cause a
|
|
+ page cross. This can have false positives but is by far the
|
|
+ fastest method. */
|
|
+ movl %edi, %eax
|
|
+ orl %esi, %eax
|
|
+ andl $(PAGE_SIZE - 1), %eax
|
|
+ cmpl $(PAGE_SIZE - VEC_SIZE), %eax
|
|
+ jg L(page_cross_less_vec)
|
|
+
|
|
+ /* No page cross possible. */
|
|
+ VMOVU (%rsi), %YMM2
|
|
+ VPCMP $4, (%rdi), %YMM2, %k1
|
|
+ kmovd %k1, %eax
|
|
+ /* Check if any matches where in bounds. Intentionally not
|
|
+ storing result in eax to limit dependency chain if it goes to
|
|
+ L(return_vec_0_lv). */
|
|
+ bzhil %edx, %eax, %edx
|
|
+ jnz L(return_vec_0_lv)
|
|
+ xorl %eax, %eax
|
|
+ ret
|
|
+
|
|
+ /* Essentially duplicate of L(return_vec_0). Ends up not costing
|
|
+ any code as shrinks L(less_vec) by allowing 2-byte encoding of
|
|
+ the jump and ends up fitting in aligning bytes. As well fits on
|
|
+ same cache line as L(less_vec) so also saves a line from having
|
|
+ to be fetched on cold calls to memcmp. */
|
|
+ .p2align 4,, 4
|
|
+L(return_vec_0_lv):
|
|
tzcntl %eax, %eax
|
|
- addl %edx, %eax
|
|
# ifdef USE_AS_WMEMCMP
|
|
- movl -(VEC_SIZE * 2)(%rdi, %rax, CHAR_SIZE), %ecx
|
|
+ movl (%rdi, %rax, CHAR_SIZE), %ecx
|
|
xorl %edx, %edx
|
|
- cmpl -(VEC_SIZE * 2)(%rsi, %rax, CHAR_SIZE), %ecx
|
|
+ cmpl (%rsi, %rax, CHAR_SIZE), %ecx
|
|
+ /* NB: no partial register stall here because xorl zero idiom
|
|
+ above. */
|
|
setg %dl
|
|
leal -1(%rdx, %rdx), %eax
|
|
# else
|
|
- movzbl -(VEC_SIZE * 2)(%rsi, %rax), %ecx
|
|
- movzbl -(VEC_SIZE * 2)(%rdi, %rax), %eax
|
|
+ movzbl (%rsi, %rax), %ecx
|
|
+ movzbl (%rdi, %rax), %eax
|
|
subl %ecx, %eax
|
|
# endif
|
|
ret
|
|
|
|
-
|
|
.p2align 4
|
|
L(page_cross_less_vec):
|
|
/* if USE_AS_WMEMCMP it can only be 0, 4, 8, 12, 16, 20, 24, 28
|
|
@@ -439,108 +513,84 @@ L(page_cross_less_vec):
|
|
cmpl $8, %edx
|
|
jae L(between_8_15)
|
|
cmpl $4, %edx
|
|
- jae L(between_4_7)
|
|
-L(between_2_3):
|
|
- /* Load as big endian to avoid branches. */
|
|
- movzwl (%rdi), %eax
|
|
- movzwl (%rsi), %ecx
|
|
- shll $8, %eax
|
|
- shll $8, %ecx
|
|
- bswap %eax
|
|
- bswap %ecx
|
|
- movzbl -1(%rdi, %rdx), %edi
|
|
- movzbl -1(%rsi, %rdx), %esi
|
|
- orl %edi, %eax
|
|
- orl %esi, %ecx
|
|
- /* Subtraction is okay because the upper 8 bits are zero. */
|
|
- subl %ecx, %eax
|
|
- ret
|
|
- .p2align 4
|
|
-L(one_or_less):
|
|
- jb L(zero)
|
|
- movzbl (%rsi), %ecx
|
|
- movzbl (%rdi), %eax
|
|
- subl %ecx, %eax
|
|
+ jb L(between_2_3)
|
|
+
|
|
+ /* Load as big endian with overlapping movbe to avoid branches.
|
|
+ */
|
|
+ movbe (%rdi), %eax
|
|
+ movbe (%rsi), %ecx
|
|
+ shlq $32, %rax
|
|
+ shlq $32, %rcx
|
|
+ movbe -4(%rdi, %rdx), %edi
|
|
+ movbe -4(%rsi, %rdx), %esi
|
|
+ orq %rdi, %rax
|
|
+ orq %rsi, %rcx
|
|
+ subq %rcx, %rax
|
|
+ /* edx is guranteed to be positive int32 in range [4, 7]. */
|
|
+ cmovne %edx, %eax
|
|
+ /* ecx is -1 if rcx > rax. Otherwise 0. */
|
|
+ sbbl %ecx, %ecx
|
|
+ /* If rcx > rax, then ecx is 0 and eax is positive. If rcx ==
|
|
+ rax then eax and ecx are zero. If rax < rax then ecx is -1 so
|
|
+ eax doesn't matter. */
|
|
+ orl %ecx, %eax
|
|
ret
|
|
|
|
- .p2align 4
|
|
+ .p2align 4,, 8
|
|
L(between_8_15):
|
|
# endif
|
|
/* If USE_AS_WMEMCMP fall through into 8-15 byte case. */
|
|
- vmovq (%rdi), %XMM1
|
|
- vmovq (%rsi), %XMM2
|
|
- VPCMP $4, %XMM1, %XMM2, %k1
|
|
+ vmovq (%rdi), %xmm1
|
|
+ vmovq (%rsi), %xmm2
|
|
+ VPCMP $4, %xmm1, %xmm2, %k1
|
|
kmovd %k1, %eax
|
|
testl %eax, %eax
|
|
- jnz L(return_vec_0)
|
|
+ jnz L(return_vec_0_lv)
|
|
/* Use overlapping loads to avoid branches. */
|
|
- leaq -8(%rdi, %rdx, CHAR_SIZE), %rdi
|
|
- leaq -8(%rsi, %rdx, CHAR_SIZE), %rsi
|
|
- vmovq (%rdi), %XMM1
|
|
- vmovq (%rsi), %XMM2
|
|
- VPCMP $4, %XMM1, %XMM2, %k1
|
|
+ vmovq -8(%rdi, %rdx, CHAR_SIZE), %xmm1
|
|
+ vmovq -8(%rsi, %rdx, CHAR_SIZE), %xmm2
|
|
+ VPCMP $4, %xmm1, %xmm2, %k1
|
|
+ addl $(CHAR_PER_VEC - (8 / CHAR_SIZE)), %edx
|
|
kmovd %k1, %eax
|
|
testl %eax, %eax
|
|
- jnz L(return_vec_0)
|
|
- ret
|
|
-
|
|
- .p2align 4
|
|
-L(zero):
|
|
- xorl %eax, %eax
|
|
+ jnz L(return_vec_0_end)
|
|
ret
|
|
|
|
- .p2align 4
|
|
+ .p2align 4,, 8
|
|
L(between_16_31):
|
|
/* From 16 to 31 bytes. No branch when size == 16. */
|
|
- VMOVU (%rsi), %XMM2
|
|
- VPCMP $4, (%rdi), %XMM2, %k1
|
|
+
|
|
+ /* Use movups to save code size. */
|
|
+ movups (%rsi), %xmm2
|
|
+ VPCMP $4, (%rdi), %xmm2, %k1
|
|
kmovd %k1, %eax
|
|
testl %eax, %eax
|
|
- jnz L(return_vec_0)
|
|
-
|
|
+ jnz L(return_vec_0_lv)
|
|
/* Use overlapping loads to avoid branches. */
|
|
-
|
|
- VMOVU -16(%rsi, %rdx, CHAR_SIZE), %XMM2
|
|
- leaq -16(%rdi, %rdx, CHAR_SIZE), %rdi
|
|
- leaq -16(%rsi, %rdx, CHAR_SIZE), %rsi
|
|
- VPCMP $4, (%rdi), %XMM2, %k1
|
|
+ movups -16(%rsi, %rdx, CHAR_SIZE), %xmm2
|
|
+ VPCMP $4, -16(%rdi, %rdx, CHAR_SIZE), %xmm2, %k1
|
|
+ addl $(CHAR_PER_VEC - (16 / CHAR_SIZE)), %edx
|
|
kmovd %k1, %eax
|
|
testl %eax, %eax
|
|
- jnz L(return_vec_0)
|
|
- ret
|
|
-
|
|
-# ifdef USE_AS_WMEMCMP
|
|
- .p2align 4
|
|
-L(one_or_less):
|
|
- jb L(zero)
|
|
- movl (%rdi), %ecx
|
|
- xorl %edx, %edx
|
|
- cmpl (%rsi), %ecx
|
|
- je L(zero)
|
|
- setg %dl
|
|
- leal -1(%rdx, %rdx), %eax
|
|
+ jnz L(return_vec_0_end)
|
|
ret
|
|
-# else
|
|
|
|
- .p2align 4
|
|
-L(between_4_7):
|
|
- /* Load as big endian with overlapping movbe to avoid branches.
|
|
- */
|
|
- movbe (%rdi), %eax
|
|
- movbe (%rsi), %ecx
|
|
- shlq $32, %rax
|
|
- shlq $32, %rcx
|
|
- movbe -4(%rdi, %rdx), %edi
|
|
- movbe -4(%rsi, %rdx), %esi
|
|
- orq %rdi, %rax
|
|
- orq %rsi, %rcx
|
|
- subq %rcx, %rax
|
|
- jz L(zero_4_7)
|
|
- sbbl %eax, %eax
|
|
- orl $1, %eax
|
|
-L(zero_4_7):
|
|
+# ifndef USE_AS_WMEMCMP
|
|
+L(between_2_3):
|
|
+ /* Load as big endian to avoid branches. */
|
|
+ movzwl (%rdi), %eax
|
|
+ movzwl (%rsi), %ecx
|
|
+ shll $8, %eax
|
|
+ shll $8, %ecx
|
|
+ bswap %eax
|
|
+ bswap %ecx
|
|
+ movzbl -1(%rdi, %rdx), %edi
|
|
+ movzbl -1(%rsi, %rdx), %esi
|
|
+ orl %edi, %eax
|
|
+ orl %esi, %ecx
|
|
+ /* Subtraction is okay because the upper 8 bits are zero. */
|
|
+ subl %ecx, %eax
|
|
ret
|
|
# endif
|
|
-
|
|
END (MEMCMP)
|
|
#endif
|