4e3257320c
Upstream commit: 55640ed3fde48360a8e8083be4843bd2dc7cecfe - i386: Regenerate ulps - linux: Fix missing internal 64 bit time_t stat usage - x86: Optimize L(less_vec) case in memcmp-evex-movbe.S - x86: Don't set Prefer_No_AVX512 for processors with AVX512 and AVX-VNNI - x86-64: Use notl in EVEX strcmp [BZ #28646] - x86: Shrink memcmp-sse4.S code size - x86: Double size of ERMS rep_movsb_threshold in dl-cacheinfo.h - x86: Optimize memmove-vec-unaligned-erms.S - x86-64: Replace movzx with movzbl - x86-64: Remove Prefer_AVX2_STRCMP - x86-64: Improve EVEX strcmp with masked load - x86: Replace sse2 instructions with avx in memcmp-evex-movbe.S - x86: Optimize memset-vec-unaligned-erms.S - x86: Optimize memcmp-evex-movbe.S for frontend behavior and size - x86: Modify ENTRY in sysdep.h so that p2align can be specified - x86-64: Optimize load of all bits set into ZMM register [BZ #28252] - scripts/glibcelf.py: Mark as UNSUPPORTED on Python 3.5 and earlier - dlfcn: Do not use rtld_active () to determine ld.so state (bug 29078) - INSTALL: Rephrase -with-default-link documentation - misc: Fix rare fortify crash on wchar funcs. [BZ 29030] - Default to --with-default-link=no (bug 25812) - scripts: Add glibcelf.py module
31 lines
1.2 KiB
Diff
31 lines
1.2 KiB
Diff
commit f3a99b2216114f89b20329ae7664b764248b4bbd
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Author: H.J. Lu <hjl.tools@gmail.com>
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Date: Mon Dec 6 07:14:12 2021 -0800
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x86: Don't set Prefer_No_AVX512 for processors with AVX512 and AVX-VNNI
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Don't set Prefer_No_AVX512 on processors with AVX512 and AVX-VNNI since
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they won't lower CPU frequency when ZMM load and store instructions are
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used.
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(cherry picked from commit ceeffe968c01b1202e482f4855cb6baf5c6cb713)
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diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
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index f4d4049e391cbabd..09590d8794b1c6fb 100644
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--- a/sysdeps/x86/cpu-features.c
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+++ b/sysdeps/x86/cpu-features.c
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@@ -566,8 +566,11 @@ disable_tsx:
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|= bit_arch_Prefer_No_VZEROUPPER;
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else
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{
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- cpu_features->preferred[index_arch_Prefer_No_AVX512]
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- |= bit_arch_Prefer_No_AVX512;
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+ /* Processors with AVX512 and AVX-VNNI won't lower CPU frequency
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+ when ZMM load and store instructions are used. */
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+ if (!CPU_FEATURES_CPU_P (cpu_features, AVX_VNNI))
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+ cpu_features->preferred[index_arch_Prefer_No_AVX512]
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+ |= bit_arch_Prefer_No_AVX512;
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/* Avoid RTM abort triggered by VZEROUPPER inside a
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transactionally executing RTM region. */
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