silence the doc re-indexing script (#870694)

- sync some minor ghc.spec cleanup changes from master:
  use %buildroot and _smp_mflags again

ghc-7.4-silence-gen_contents_index.patch

@@ -0,0 +1,11 @@
+--- ghc-7.4.1/libraries/gen_contents_index~	2012-09-30 16:14:39.368295240 +0900
++++ ghc-7.4.1/libraries/gen_contents_index	2012-10-30 19:12:10.017398594 +0900
+@@ -50,7 +50,7 @@
+ esac
+ 
+ # Now create the combined contents and index pages
+-echo $HADDOCK_ARGS
++#echo $HADDOCK_ARGS
+ $HADDOCK --gen-index --gen-contents -o . \
+          -t "Haskell Hierarchical Libraries" \
+          -p "prologue.txt" \

ghc-llvmGen-fence-instruction.patch

@@ -0,0 +1,131 @@
+commit 102a5380574ed22eca32f8e63cae22f013153f0b
+Author: Ben Gamari <ben@panda.(none)>
+Date:   Tue Jan 24 19:56:35 2012 -0500
+
+    llvmGen: Use new fence instruction
+    
+    Signed-off-by: David Terei <davidterei@gmail.com>
+    
+    MERGED from commit 766da942097613fed56417e3e149997812f83105
+
+	Modified   compiler/llvmGen/Llvm.hs
+diff --git a/compiler/llvmGen/Llvm.hs b/compiler/llvmGen/Llvm.hs
+index aec492e..d516dab 100644
+--- a/compiler/llvmGen/Llvm.hs
++++ b/compiler/llvmGen/Llvm.hs
+@@ -20,6 +20,9 @@ module Llvm (
+         LlvmBlocks, LlvmBlock(..), LlvmBlockId,
+         LlvmParamAttr(..), LlvmParameter,
+ 
++        -- * Fence synchronization
++        LlvmSyncOrdering(..),
++
+         -- * Call Handling
+         LlvmCallConvention(..), LlvmCallType(..), LlvmParameterListType(..),
+         LlvmLinkageType(..), LlvmFuncAttr(..),
+	Modified   compiler/llvmGen/Llvm/AbsSyn.hs
+diff --git a/compiler/llvmGen/Llvm/AbsSyn.hs b/compiler/llvmGen/Llvm/AbsSyn.hs
+index 93bc62c..468b7e4 100644
+--- a/compiler/llvmGen/Llvm/AbsSyn.hs
++++ b/compiler/llvmGen/Llvm/AbsSyn.hs
+@@ -61,6 +61,11 @@ data LlvmFunction = LlvmFunction {
+ 
+ type LlvmFunctions  = [LlvmFunction]
+ 
++data LlvmSyncOrdering = SyncAcquire
++                      | SyncRelease
++                      | SyncAcqRel
++                      | SyncSeqCst
++                      deriving (Show, Eq)
+ 
+ -- | Llvm Statements
+ data LlvmStatement
+@@ -72,6 +77,11 @@ data LlvmStatement
+   = Assignment LlvmVar LlvmExpression
+ 
+   {- |
++    Memory fence operation
++  -}
++  | Fence Bool LlvmSyncOrdering
++
++  {- |
+     Always branch to the target label
+   -}
+   | Branch LlvmVar
+	Modified   compiler/llvmGen/Llvm/PpLlvm.hs
+diff --git a/compiler/llvmGen/Llvm/PpLlvm.hs b/compiler/llvmGen/Llvm/PpLlvm.hs
+index 217d02d..f3c8342 100644
+--- a/compiler/llvmGen/Llvm/PpLlvm.hs
++++ b/compiler/llvmGen/Llvm/PpLlvm.hs
+@@ -166,6 +166,7 @@ ppLlvmStatement :: LlvmStatement -> Doc
+ ppLlvmStatement stmt
+   = case stmt of
+         Assignment  dst expr      -> ppAssignment dst (ppLlvmExpression expr)
++        Fence       st ord	  -> ppFence st ord
+         Branch      target        -> ppBranch target
+         BranchIf    cond ifT ifF  -> ppBranchIf cond ifT ifF
+         Comment     comments      -> ppLlvmComments comments
+@@ -254,6 +255,17 @@ ppCmpOp op left right =
+ ppAssignment :: LlvmVar -> Doc -> Doc
+ ppAssignment var expr = (text $ getName var) <+> equals <+> expr
+ 
++ppFence :: Bool -> LlvmSyncOrdering -> Doc
++ppFence st ord =
++  let singleThread = case st of True  -> text "singlethread"
++				False -> empty
++  in text "fence" <+> singleThread <+> ppSyncOrdering ord
++
++ppSyncOrdering :: LlvmSyncOrdering -> Doc
++ppSyncOrdering SyncAcquire = text "acquire"
++ppSyncOrdering SyncRelease = text "release"
++ppSyncOrdering SyncAcqRel  = text "acq_rel"
++ppSyncOrdering SyncSeqCst  = text "seq_cst"
+ 
+ ppLoad :: LlvmVar -> Doc
+ ppLoad var = text "load" <+> texts var
+	Modified   compiler/llvmGen/LlvmCodeGen/CodeGen.hs
+diff --git a/compiler/llvmGen/LlvmCodeGen/CodeGen.hs b/compiler/llvmGen/LlvmCodeGen/CodeGen.hs
+index d8507ab..c505cc0 100644
+--- a/compiler/llvmGen/LlvmCodeGen/CodeGen.hs
++++ b/compiler/llvmGen/LlvmCodeGen/CodeGen.hs
+@@ -136,16 +136,13 @@ stmtToInstrs env stmt = case stmt of
+         -> return (env, unitOL $ Return Nothing, [])
+ 
+ 
+--- | Foreign Calls
+-genCall :: LlvmEnv -> CmmCallTarget -> [HintedCmmFormal] -> [HintedCmmActual]
+-              -> CmmReturnInfo -> UniqSM StmtData
++barrier :: LlvmEnv -> UniqSM StmtData
++barrier env = do
++    let s = Fence False SyncAcqRel
++    return (env, unitOL s, [])
+ 
+--- Write barrier needs to be handled specially as it is implemented as an LLVM
+--- intrinsic function.
+-genCall env (CmmPrim MO_WriteBarrier) _ _ _
+- | platformArch (getLlvmPlatform env) `elem` [ArchX86, ArchX86_64, ArchSPARC]
+-    = return (env, nilOL, [])
+- | otherwise = do
++oldBarrier :: LlvmEnv -> UniqSM StmtData
++oldBarrier env = do
+     let fname = fsLit "llvm.memory.barrier"
+     let funSig = LlvmFunctionDecl fname ExternallyVisible CC_Ccc LMVoid
+                     FixedArgs (tysToParams [i1, i1, i1, i1, i1]) llvmFunAlign
+@@ -166,6 +163,17 @@ genCall env (CmmPrim MO_WriteBarrier) _ _ _
+         lmTrue :: LlvmVar
+         lmTrue  = mkIntLit i1 (-1)
+ 
++-- | Foreign Calls
++genCall :: LlvmEnv -> CmmCallTarget -> [HintedCmmFormal] -> [HintedCmmActual]
++              -> CmmReturnInfo -> UniqSM StmtData
++
++-- Write barrier needs to be handled specially as it is implemented as an LLVM
++-- intrinsic function.
++genCall env (CmmPrim MO_WriteBarrier) _ _ _
++ | platformArch (getLlvmPlatform env) `elem` [ArchX86, ArchX86_64, ArchSPARC]
++    = return (env, nilOL, [])
++ | otherwise = barrier env
++
+ -- Handle popcnt function specifically since GHC only really has i32 and i64
+ -- types and things like Word8 are backed by an i32 and just present a logical
+ -- i8 range. So we must handle conversions from i32 to i8 explicitly as LLVM

ghc-llvmGen-improve-write-barrier.patch

@@ -0,0 +1,111 @@
+commit 932cdfd52d94cdfb074878e98767d0ff597262b6
+Author: Paolo Capriotti <p.capriotti@gmail.com>
+Date:   Mon Mar 26 18:56:14 2012 +0100
+
+    Improve support for LLVM >= 3.0 write barrier. (#5814)
+    
+    MERGED from commit d2d5ee16cf21c5b32333ff57ba0a65f89ff7e988
+
+	Modified   compiler/llvmGen/Llvm/AbsSyn.hs
+diff --git a/compiler/llvmGen/Llvm/AbsSyn.hs b/compiler/llvmGen/Llvm/AbsSyn.hs
+index 468b7e4..1b50d29 100644
+--- a/compiler/llvmGen/Llvm/AbsSyn.hs
++++ b/compiler/llvmGen/Llvm/AbsSyn.hs
+@@ -59,13 +59,24 @@ data LlvmFunction = LlvmFunction {
+     funcBody  :: LlvmBlocks
+   }
+ 
+-type LlvmFunctions  = [LlvmFunction]
+-
+-data LlvmSyncOrdering = SyncAcquire
+-                      | SyncRelease
+-                      | SyncAcqRel
+-                      | SyncSeqCst
+-                      deriving (Show, Eq)
++type LlvmFunctions = [LlvmFunction]
++
++-- | LLVM ordering types for synchronization purposes. (Introduced in LLVM
++-- 3.0). Please see the LLVM documentation for a better description.
++data LlvmSyncOrdering
++  -- | Some partial order of operations exists.
++  = SyncUnord
++  -- | A single total order for operations at a single address exists.
++  | SyncMonotonic
++  -- | Acquire synchronization operation.
++  | SyncAcquire
++  -- | Release synchronization operation.
++  | SyncRelease
++  -- | Acquire + Release synchronization operation.
++  | SyncAcqRel
++  -- | Full sequential Consistency operation.
++  | SyncSeqCst
++  deriving (Show, Eq)
+ 
+ -- | Llvm Statements
+ data LlvmStatement
+	Modified   compiler/llvmGen/Llvm/PpLlvm.hs
+diff --git a/compiler/llvmGen/Llvm/PpLlvm.hs b/compiler/llvmGen/Llvm/PpLlvm.hs
+index f3c8342..0a750c3 100644
+--- a/compiler/llvmGen/Llvm/PpLlvm.hs
++++ b/compiler/llvmGen/Llvm/PpLlvm.hs
+@@ -166,7 +166,7 @@ ppLlvmStatement :: LlvmStatement -> Doc
+ ppLlvmStatement stmt
+   = case stmt of
+         Assignment  dst expr      -> ppAssignment dst (ppLlvmExpression expr)
+-        Fence       st ord	  -> ppFence st ord
++        Fence       st ord        -> ppFence st ord
+         Branch      target        -> ppBranch target
+         BranchIf    cond ifT ifF  -> ppBranchIf cond ifT ifF
+         Comment     comments      -> ppLlvmComments comments
+@@ -258,14 +258,16 @@ ppAssignment var expr = (text $ getName var) <+> equals <+> expr
+ ppFence :: Bool -> LlvmSyncOrdering -> Doc
+ ppFence st ord =
+   let singleThread = case st of True  -> text "singlethread"
+-				False -> empty
++                                False -> empty
+   in text "fence" <+> singleThread <+> ppSyncOrdering ord
+ 
+ ppSyncOrdering :: LlvmSyncOrdering -> Doc
+-ppSyncOrdering SyncAcquire = text "acquire"
+-ppSyncOrdering SyncRelease = text "release"
+-ppSyncOrdering SyncAcqRel  = text "acq_rel"
+-ppSyncOrdering SyncSeqCst  = text "seq_cst"
++ppSyncOrdering SyncUnord     = text "unordered"
++ppSyncOrdering SyncMonotonic = text "monotonic"
++ppSyncOrdering SyncAcquire   = text "acquire"
++ppSyncOrdering SyncRelease   = text "release"
++ppSyncOrdering SyncAcqRel    = text "acq_rel"
++ppSyncOrdering SyncSeqCst    = text "seq_cst"
+ 
+ ppLoad :: LlvmVar -> Doc
+ ppLoad var = text "load" <+> texts var
+	Modified   compiler/llvmGen/LlvmCodeGen/CodeGen.hs
+diff --git a/compiler/llvmGen/LlvmCodeGen/CodeGen.hs b/compiler/llvmGen/LlvmCodeGen/CodeGen.hs
+index c505cc0..4a8d37f 100644
+--- a/compiler/llvmGen/LlvmCodeGen/CodeGen.hs
++++ b/compiler/llvmGen/LlvmCodeGen/CodeGen.hs
+@@ -136,11 +136,13 @@ stmtToInstrs env stmt = case stmt of
+         -> return (env, unitOL $ Return Nothing, [])
+ 
+ 
++-- | Memory barrier instruction for LLVM >= 3.0
+ barrier :: LlvmEnv -> UniqSM StmtData
+ barrier env = do
+-    let s = Fence False SyncAcqRel
++    let s = Fence False SyncSeqCst
+     return (env, unitOL s, [])
+ 
++-- | Memory barrier instruction for LLVM < 3.0
+ oldBarrier :: LlvmEnv -> UniqSM StmtData
+ oldBarrier env = do
+     let fname = fsLit "llvm.memory.barrier"
+@@ -172,7 +174,8 @@ genCall :: LlvmEnv -> CmmCallTarget -> [HintedCmmFormal] -> [HintedCmmActual]
+ genCall env (CmmPrim MO_WriteBarrier) _ _ _
+  | platformArch (getLlvmPlatform env) `elem` [ArchX86, ArchX86_64, ArchSPARC]
+     = return (env, nilOL, [])
+- | otherwise = barrier env
++ | getLlvmVer env > 29 = barrier env
++ | otherwise           = oldBarrier env
+ 
+ -- Handle popcnt function specifically since GHC only really has i32 and i64
+ -- types and things like Word8 are backed by an i32 and just present a logical

ghc.spec

@@ -1,16 +1,14 @@
 # Shared haskell libraries are supported for x86* archs
 # (disabled for other archs in ghc-rpm-macros)
 
-# To bootstrap a new version of ghc, uncomment the following:
+# To bootstrap build a new version of ghc, uncomment the following:
 #%%global ghc_bootstrapping 1
 #%%{?ghc_bootstrap}
-#%%global without_hscolour 1
 #%%global without_testsuite 1
 
 # To do a test build instead with shared libs, uncomment the following:
 #%%global ghc_bootstrapping 1
 #%%{?ghc_test}
-#%%global without_hscolour 1
 #%%global without_testsuite 1
 
 # unregisterized archs
@@ -30,7 +28,7 @@ Version: 7.4.1
 # - release can only be reset if all library versions get bumped simultaneously
 #   (eg for a major release)
 # - minor release numbers should be incremented monotonically
-Release: 6%{?dist}
+Release: 6.4%{?dist}
 Summary: Glasgow Haskell Compiler
 # fedora ghc has been bootstrapped on
 # %{ix86} x86_64 ppc alpha sparcv9 ppc64 armv7hl armv5tel s390 s390x
@@ -68,9 +66,6 @@ BuildRequires: ncurses-devel
 %if %{undefined without_manual}
 BuildRequires: libxslt, docbook-style-xsl
 %endif
-%if %{undefined without_haddock} && %{undefined without_hscolour}
-BuildRequires: hscolour
-%endif
 %if %{undefined without_testsuite}
 BuildRequires: python
 %endif
@@ -104,6 +99,9 @@ Patch12: fix-ARM-StgCRun-to-not-save-and-restore-r11-fp-regis.patch
 # Debian armhf fixes
 Patch13: ghc-debian-ARM-VFPv3D16.patch
 Patch14: ghc-debian-armhf_llvm_abi.patch
+Patch15: ghc-llvmGen-fence-instruction.patch
+Patch16: ghc-llvmGen-improve-write-barrier.patch
+Patch17: ghc-7.4-silence-gen_contents_index.patch
 
 %description
 GHC is a state-of-the-art, open source, compiler and interactive environment
@@ -205,9 +203,12 @@ except the ghc library, which is installed by the toplevel ghc metapackage.
 
 %prep
 %setup -q -n %{name}-%{version} %{!?without_testsuite:-b2}
+
+# tweaks to gen_contents_index
 %patch1 -p1 -b .orig
 %patch2 -p1
 %patch3 -p1
+%patch17 -p1
 
 # make sure we don't use these
 rm -r ghc-tarballs/{mingw,perl}
@@ -234,6 +235,8 @@ ln -s $(pkg-config --variable=includedir libffi)/*.h rts/dist/build
 %patch14 -p1 -b .arm
 autoreconf
 %endif
+%patch15 -p1 -b .15~
+%patch16 -p1 -b .16~
 
 %build
 # http://hackage.haskell.org/trac/ghc/wiki/Platforms
@@ -246,9 +249,6 @@ HADDOCK_DOCS = NO
 %if %{defined without_manual}
 BUILD_DOCBOOK_HTML = NO
 %endif
-%if %{undefined without_hscolour}
-HSCOLOUR_SRCS = NO
-%endif
 %ifarch armv7hl
 SRC_HC_OPTS += -D__ARM_PCS_VFP
 %endif
@@ -263,13 +263,10 @@ export CFLAGS="${CFLAGS:-%optflags}"
   --sharedstatedir=%{_sharedstatedir} --mandir=%{_mandir} \
   --with-gcc=%{_bindir}/gcc
 
-# >4 cpus tends to break build
-[ -z "$RPM_BUILD_NCPUS" ] && RPM_BUILD_NCPUS=$(%{_bindir}/getconf _NPROCESSORS_ONLN)
-[ "$RPM_BUILD_NCPUS" -gt 4 ] && RPM_BUILD_NCPUS=4
-make -j$RPM_BUILD_NCPUS
+make %{?_smp_mflags}
 
 %install
-make DESTDIR=${RPM_BUILD_ROOT} install
+make DESTDIR=%{buildroot} install
 
 for i in %{ghc_packages_list}; do
 name=$(echo $i | sed -e "s/\(.*\)-.*/\1/")
@@ -296,28 +293,28 @@ echo "%doc libraries/LICENSE.%1" >> ghc-%2.files
 %merge_filelist bin-package-db ghc
 
 %if %{undefined ghc_without_shared}
-ls $RPM_BUILD_ROOT%{ghclibdir}/libHS*.so >> ghc-base.files
-sed -i -e "s|^$RPM_BUILD_ROOT||g" ghc-base.files
+ls %{buildroot}%{ghclibdir}/libHS*.so >> ghc-base.files
+sed -i -e "s|^%{buildroot}||g" ghc-base.files
 %endif
-ls -d $RPM_BUILD_ROOT%{ghclibdir}/libHS*.a  $RPM_BUILD_ROOT%{ghclibdir}/package.conf.d/builtin_*.conf $RPM_BUILD_ROOT%{ghclibdir}/include >> ghc-base-devel.files
-sed -i -e "s|^$RPM_BUILD_ROOT||g" ghc-base-devel.files
+ls -d %{buildroot}%{ghclibdir}/libHS*.a  %{buildroot}%{ghclibdir}/package.conf.d/builtin_*.conf %{buildroot}%{ghclibdir}/include >> ghc-base-devel.files
+sed -i -e "s|^%{buildroot}||g" ghc-base-devel.files
 
 # these are handled as alternatives
 for i in hsc2hs runhaskell; do
-  if [ -x ${RPM_BUILD_ROOT}%{_bindir}/$i-ghc ]; then
-    rm ${RPM_BUILD_ROOT}%{_bindir}/$i
+  if [ -x %{buildroot}%{_bindir}/$i-ghc ]; then
+    rm %{buildroot}%{_bindir}/$i
   else
-    mv ${RPM_BUILD_ROOT}%{_bindir}/$i{,-ghc}
+    mv %{buildroot}%{_bindir}/$i{,-ghc}
   fi
-  touch ${RPM_BUILD_ROOT}%{_bindir}/$i
+  touch %{buildroot}%{_bindir}/$i
 done
 
 %ghc_strip_dynlinked
 
 %if %{undefined without_haddock}
-mkdir -p ${RPM_BUILD_ROOT}%{_sysconfdir}/cron.hourly
-install -p --mode=755 %SOURCE3 ${RPM_BUILD_ROOT}%{_sysconfdir}/cron.hourly/ghc-doc-index
-mkdir -p ${RPM_BUILD_ROOT}%{_localstatedir}/lib/ghc
+mkdir -p %{buildroot}%{_sysconfdir}/cron.hourly
+install -p --mode=755 %SOURCE3 %{buildroot}%{_sysconfdir}/cron.hourly/ghc-doc-index
+mkdir -p %{buildroot}%{_localstatedir}/lib/ghc
 %endif
 
 %check
@@ -435,6 +432,24 @@ fi
 %files libraries
 
 %changelog
+* Tue Oct 30 2012 Jens Petersen <petersen@redhat.com> - 7.4.1-6.4
+- silence the doc re-indexing script (#870694)
+
+* Thu Oct 25 2012 Jens Petersen <petersen@redhat.com> - 7.4.1-6.3
+- do not disable hscolour in build.mk
+- drop the explicit hscolour BR
+- without_hscolour should now be set by ghc-rpm-macros for bootstrapping
+
+* Wed Oct 24 2012 Jens Petersen <petersen@redhat.com> - 7.4.1-6.2
+- bring back the HS*.o lib files since ghci loads them faster
+  (see http://hackage.haskell.org/trac/ghc/ticket/7249)
+- sync some minor ghc.spec cleanup changes from master
+
+* Mon Oct  1 2012 Jens Petersen <petersen@redhat.com> - 7.4.1-6.1
+- backport two llvmGen patches from 7.4.2 for fence and better barrier support
+  to fix ARM build with llvm-3.1
+- forcibly remove redundant HS*.o files from ghc libs for now
+
 * Thu Jul 19 2012 Fedora Release Engineering <rel-eng@lists.fedoraproject.org> - 7.4.1-6
 - Rebuilt for https://fedoraproject.org/wiki/Fedora_18_Mass_Rebuild