From 3d57944f9393a1853c1be5b702819a0c4eb175aa Mon Sep 17 00:00:00 2001 From: Jens Petersen Date: Sat, 14 Apr 2012 01:46:47 +0900 Subject: [PATCH] add the new debian ARM patches --- ...to-not-save-and-restore-r11-fp-regis.patch | 29 ++++++++++++++++ ...n-clobbered-register-list-for-both-A.patch | 34 +++++++++++++++++++ ghc-debian-ARM-VFPv3D16.patch | 16 +++++++++ ghc-debian-armhf_llvm_abi.patch | 26 ++++++++++++++ 4 files changed, 105 insertions(+) create mode 100644 fix-ARM-StgCRun-to-not-save-and-restore-r11-fp-regis.patch create mode 100644 fix-ARM-s-StgCRun-clobbered-register-list-for-both-A.patch create mode 100644 ghc-debian-ARM-VFPv3D16.patch create mode 100644 ghc-debian-armhf_llvm_abi.patch diff --git a/fix-ARM-StgCRun-to-not-save-and-restore-r11-fp-regis.patch b/fix-ARM-StgCRun-to-not-save-and-restore-r11-fp-regis.patch new file mode 100644 index 0000000..98772f1 --- /dev/null +++ b/fix-ARM-StgCRun-to-not-save-and-restore-r11-fp-regis.patch @@ -0,0 +1,29 @@ +From 1cbf3bcae87dd102942d85ce71ea17d42d4b5f5a Mon Sep 17 00:00:00 2001 +From: Karel Gardas +Date: Tue, 14 Feb 2012 08:03:07 +0100 +Subject: [PATCH 2/2] fix ARM StgCRun to not save and restore r11/fp register twice + +--- + rts/StgCRun.c | 4 ++-- + 1 files changed, 2 insertions(+), 2 deletions(-) + +--- a/rts/StgCRun.c ++++ b/rts/StgCRun.c +@@ -632,7 +632,7 @@ + /* + * save callee-saves registers on behalf of the STG code. + */ +- "stmfd sp!, {r4-r11, fp, ip, lr}\n\t" ++ "stmfd sp!, {r4-r10, fp, ip, lr}\n\t" + #if !defined(arm_HOST_ARCH_PRE_ARMv6) + "vstmdb sp!, {d8-d11}\n\t" + #endif +@@ -669,7 +669,7 @@ + #if !defined(arm_HOST_ARCH_PRE_ARMv6) + "vldmia sp!, {d8-d11}\n\t" + #endif +- "ldmfd sp!, {r4-r11, fp, ip, lr}\n\t" ++ "ldmfd sp!, {r4-r10, fp, ip, lr}\n\t" + : "=r" (r) + : "r" (f), "r" (basereg), "i" (RESERVED_C_STACK_BYTES) + #if !defined(__thumb__) diff --git a/fix-ARM-s-StgCRun-clobbered-register-list-for-both-A.patch b/fix-ARM-s-StgCRun-clobbered-register-list-for-both-A.patch new file mode 100644 index 0000000..f033c18 --- /dev/null +++ b/fix-ARM-s-StgCRun-clobbered-register-list-for-both-A.patch @@ -0,0 +1,34 @@ +From 957f778cb971d63cbbea0c71c727c94474b1b905 Mon Sep 17 00:00:00 2001 +From: Karel Gardas +Date: Tue, 14 Feb 2012 08:01:47 +0100 +Subject: [PATCH 1/2] fix ARM's StgCRun clobbered register list for both ARM and Thumb modes + +--- + rts/StgCRun.c | 16 +++++++++++++++- + 1 files changed, 15 insertions(+), 1 deletions(-) + +--- a/rts/StgCRun.c ++++ b/rts/StgCRun.c +@@ -672,7 +672,21 @@ + "ldmfd sp!, {r4-r11, fp, ip, lr}\n\t" + : "=r" (r) + : "r" (f), "r" (basereg), "i" (RESERVED_C_STACK_BYTES) +- : "%r4", "%r5", "%r6", "%r8", "%r9", "%r10", "%r11", "%fp", "%ip", "%lr" ++#if !defined(__thumb__) ++ /* In ARM mode, r11/fp is frame-pointer and so we cannot mark ++ it as clobbered. If we do so, GCC complains with error. */ ++ : "%r4", "%r5", "%r6", "%r7", "%r8", "%r9", "%r10", "%ip", "%lr" ++#else ++ /* In Thumb mode r7 is frame-pointer and so we cannot mark it ++ as clobbered. On the other hand we mark as clobbered also ++ those regs not used in Thumb mode. Hard to judge if this is ++ needed, but certainly Haskell code is using them for ++ placing GHC's virtual registers there. See ++ includes/stg/MachRegs.h Please note that Haskell code is ++ compiled by GHC/LLVM into ARM code (not Thumb!), at least ++ as of February 2012 */ ++ : "%r4", "%r5", "%r6", "%r8", "%r9", "%r10", "%fp", "%ip", "%lr" ++#endif + ); + return r; + } diff --git a/ghc-debian-ARM-VFPv3D16.patch b/ghc-debian-ARM-VFPv3D16.patch new file mode 100644 index 0000000..ffe76cb --- /dev/null +++ b/ghc-debian-ARM-VFPv3D16.patch @@ -0,0 +1,16 @@ +Description: Use VFPv3-D16 FPU for ARM builds +Author: Jani Monoses + +Index: ghc/aclocal.m4 +=================================================================== +--- ghc.orig/aclocal.m4 2012-02-01 18:10:32.000000000 +0000 ++++ ghc/aclocal.m4 2012-03-10 16:40:32.415005650 +0000 +@@ -333,7 +333,7 @@ + ], + [changequote(, )dnl + ARM_ISA=ARMv7 +- ARM_ISA_EXT="[VFPv3,NEON]" ++ ARM_ISA_EXT="[VFPv3D16,NEON]" + changequote([, ])dnl + ]) + ]) diff --git a/ghc-debian-armhf_llvm_abi.patch b/ghc-debian-armhf_llvm_abi.patch new file mode 100644 index 0000000..c3b045e --- /dev/null +++ b/ghc-debian-armhf_llvm_abi.patch @@ -0,0 +1,26 @@ +Description: If we are on armhf, tell llvm to generate code for this ABI. Not + forwarded upstream, because they will do a more 'proper' patch. See upstream + bug #5914. +Author: Iain Lane + +Index: ghc/compiler/main/DriverPipeline.hs +=================================================================== +--- ghc.orig/compiler/main/DriverPipeline.hs 2012-03-10 16:41:46.000000000 +0000 ++++ ghc/compiler/main/DriverPipeline.hs 2012-03-10 16:42:59.209169474 +0000 +@@ -1,5 +1,5 @@ + {-# OPTIONS -fno-cse #-} +-{-# LANGUAGE NamedFieldPuns #-} ++{-# LANGUAGE NamedFieldPuns, CPP #-} + -- -fno-cse is needed for GLOBAL_VAR's to behave properly + + ----------------------------------------------------------------------------- +@@ -1379,6 +1379,9 @@ + then ["-mattr=+v7,+vfp3"] + else if (elem VFPv3D16 ext) + then ["-mattr=+v7,+vfp3,+d16"] ++#ifdef __ARM_PCS_VFP ++ ++ ["-float-abi=hard"] ++#endif + else [] + _ -> [] +