From FEDORA_PATCHES Mon Sep 17 00:00:00 2001 From: Fedora GDB patches Date: Fri, 27 Oct 2017 21:07:50 +0200 Subject: gdb-test-ivy-bridge.patch ;; Test GDB opcodes/ disassembly of Intel Ivy Bridge instructions (BZ 696890). ;;=fedoratest diff --git a/gdb/testsuite/gdb.arch/amd64-ivy-bridge.S b/gdb/testsuite/gdb.arch/amd64-ivy-bridge.S new file mode 100644 --- /dev/null +++ b/gdb/testsuite/gdb.arch/amd64-ivy-bridge.S @@ -0,0 +1,98 @@ +/* Copyright 2011 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + + This file is part of the gdb testsuite. */ + + .globl _start +_start: .text + +/* gas/i386/x86-64-rdrnd.s */ + .att_syntax prefix + rdrand %bx + rdrand %ebx + rdrand %rbx + rdrand %r8w + rdrand %r8d + rdrand %r8 + + .intel_syntax noprefix + rdrand bx + rdrand ebx + rdrand rbx + rdrand r8w + rdrand r8d + rdrand r8 + +/* gas/i386/x86-64-f16c.s */ + .att_syntax prefix + vcvtph2ps %xmm4,%ymm4 + vcvtph2ps (%r8),%ymm8 + vcvtph2ps %xmm4,%xmm6 + vcvtph2ps (%rcx),%xmm4 + vcvtps2ph $0x2,%ymm4,%xmm4 + vcvtps2ph $0x2,%ymm8,(%r8) + vcvtps2ph $0x2,%xmm4,%xmm4 + vcvtps2ph $0x2,%xmm4,(%rcx) + + .intel_syntax noprefix + vcvtph2ps ymm4,xmm4 + vcvtph2ps ymm8,XMMWORD PTR [r8] + vcvtph2ps ymm4,[rcx] + vcvtph2ps xmm6,xmm4 + vcvtph2ps xmm4,QWORD PTR [rcx] + vcvtph2ps xmm4,[rcx] + vcvtps2ph xmm4,ymm4,0x2 + vcvtps2ph XMMWORD PTR [rcx],ymm4,0x2 + vcvtps2ph [rcx],ymm4,0x2 + vcvtps2ph xmm4,xmm4,0x2 + vcvtps2ph QWORD PTR [r8],xmm8,0x2 + vcvtps2ph [rcx],xmm4,0x2 + +/* gas/i386/x86-64-fsgs.s */ + .att_syntax prefix + rdfsbase %ebx + rdfsbase %rbx + rdfsbase %r8d + rdfsbase %r8 + rdgsbase %ebx + rdgsbase %rbx + rdgsbase %r8d + rdgsbase %r8 + wrfsbase %ebx + wrfsbase %rbx + wrfsbase %r8d + wrfsbase %r8 + wrgsbase %ebx + wrgsbase %rbx + wrgsbase %r8d + wrgsbase %r8 + + .intel_syntax noprefix + rdfsbase ebx + rdfsbase rbx + rdfsbase r8d + rdfsbase r8 + rdgsbase ebx + rdgsbase rbx + rdgsbase r8d + rdgsbase r8 + wrfsbase ebx + wrfsbase rbx + wrfsbase r8d + wrfsbase r8 + wrgsbase ebx + wrgsbase rbx + wrgsbase r8d + wrgsbase r8 diff --git a/gdb/testsuite/gdb.arch/amd64-ivy-bridge.exp b/gdb/testsuite/gdb.arch/amd64-ivy-bridge.exp new file mode 100644 --- /dev/null +++ b/gdb/testsuite/gdb.arch/amd64-ivy-bridge.exp @@ -0,0 +1,170 @@ +# Copyright 2011 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +if {![istarget "x86_64-*-*"]} then { + return +} + +set testfile amd64-ivy-bridge +set test compilation +if [prepare_for_testing ${testfile}.exp ${testfile}.x ${testfile}.S [list debug "additional_flags=-m64 -nostdlib"]] { + fail $test + return -1 +} +pass $test + +gdb_test_no_output "set disassembly-flavor att" +# gas/i386/x86-64-rdrnd.d +# gas/i386/x86-64-f16c.d +# gas/i386/x86-64-fsgs.d +gdb_test "disassemble/r _start" "\r +Dump of assembler code for function _start:\r +\[^\r\n\]+:\t66 0f c7 f3\t\( \)?rdrand %bx\r +\[^\r\n\]+:\t0f c7 f3\t\( \)?rdrand %ebx\r +\[^\r\n\]+:\t48 0f c7 f3\t\( \)?rdrand %rbx\r +\[^\r\n\]+:\t66 41 0f c7 f0\t\( \)?rdrand %r8w\r +\[^\r\n\]+:\t41 0f c7 f0\t\( \)?rdrand %r8d\r +\[^\r\n\]+:\t49 0f c7 f0\t\( \)?rdrand %r8\r +\[^\r\n\]+:\t66 0f c7 f3\t\( \)?rdrand %bx\r +\[^\r\n\]+:\t0f c7 f3\t\( \)?rdrand %ebx\r +\[^\r\n\]+:\t48 0f c7 f3\t\( \)?rdrand %rbx\r +\[^\r\n\]+:\t66 41 0f c7 f0\t\( \)?rdrand %r8w\r +\[^\r\n\]+:\t41 0f c7 f0\t\( \)?rdrand %r8d\r +\[^\r\n\]+:\t49 0f c7 f0\t\( \)?rdrand %r8\r +\[^\r\n\]+:\tc4 e2 7d 13 e4\t\( \)?vcvtph2ps %xmm4,%ymm4\r +\[^\r\n\]+:\tc4 42 7d 13 00\t\( \)?vcvtph2ps \\(%r8\\),%ymm8\r +\[^\r\n\]+:\tc4 e2 79 13 f4\t\( \)?vcvtph2ps %xmm4,%xmm6\r +\[^\r\n\]+:\tc4 e2 79 13 21\t\( \)?vcvtph2ps \\(%rcx\\),%xmm4\r +\[^\r\n\]+:\tc4 e3 7d 1d e4 02\t\( \)?vcvtps2ph \\\$0x2,%ymm4,%xmm4\r +\[^\r\n\]+:\tc4 43 7d 1d 00 02\t\( \)?vcvtps2ph \\\$0x2,%ymm8,\\(%r8\\)\r +\[^\r\n\]+:\tc4 e3 79 1d e4 02\t\( \)?vcvtps2ph \\\$0x2,%xmm4,%xmm4\r +\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\( \)?vcvtps2ph \\\$0x2,%xmm4,\\(%rcx\\)\r +\[^\r\n\]+:\tc4 e2 7d 13 e4\t\( \)?vcvtph2ps %xmm4,%ymm4\r +\[^\r\n\]+:\tc4 42 7d 13 00\t\( \)?vcvtph2ps \\(%r8\\),%ymm8\r +\[^\r\n\]+:\tc4 e2 7d 13 21\t\( \)?vcvtph2ps \\(%rcx\\),%ymm4\r +\[^\r\n\]+:\tc4 e2 79 13 f4\t\( \)?vcvtph2ps %xmm4,%xmm6\r +\[^\r\n\]+:\tc4 e2 79 13 21\t\( \)?vcvtph2ps \\(%rcx\\),%xmm4\r +\[^\r\n\]+:\tc4 e2 79 13 21\t\( \)?vcvtph2ps \\(%rcx\\),%xmm4\r +\[^\r\n\]+:\tc4 e3 7d 1d e4 02\t\( \)?vcvtps2ph \\\$0x2,%ymm4,%xmm4\r +\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\( \)?vcvtps2ph \\\$0x2,%ymm4,\\(%rcx\\)\r +\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\( \)?vcvtps2ph \\\$0x2,%ymm4,\\(%rcx\\)\r +\[^\r\n\]+:\tc4 e3 79 1d e4 02\t\( \)?vcvtps2ph \\\$0x2,%xmm4,%xmm4\r +\[^\r\n\]+:\tc4 43 79 1d 00 02\t\( \)?vcvtps2ph \\\$0x2,%xmm8,\\(%r8\\)\r +\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\( \)?vcvtps2ph \\\$0x2,%xmm4,\\(%rcx\\)\r +\[^\r\n\]+:\tf3 0f ae c3\t\( \)?rdfsbase %ebx\r +\[^\r\n\]+:\tf3 48 0f ae c3\t\( \)?rdfsbase %rbx\r +\[^\r\n\]+:\tf3 41 0f ae c0\t\( \)?rdfsbase %r8d\r +\[^\r\n\]+:\tf3 49 0f ae c0\t\( \)?rdfsbase %r8\r +\[^\r\n\]+:\tf3 0f ae cb\t\( \)?rdgsbase %ebx\r +\[^\r\n\]+:\tf3 48 0f ae cb\t\( \)?rdgsbase %rbx\r +\[^\r\n\]+:\tf3 41 0f ae c8\t\( \)?rdgsbase %r8d\r +\[^\r\n\]+:\tf3 49 0f ae c8\t\( \)?rdgsbase %r8\r +\[^\r\n\]+:\tf3 0f ae d3\t\( \)?wrfsbase %ebx\r +\[^\r\n\]+:\tf3 48 0f ae d3\t\( \)?wrfsbase %rbx\r +\[^\r\n\]+:\tf3 41 0f ae d0\t\( \)?wrfsbase %r8d\r +\[^\r\n\]+:\tf3 49 0f ae d0\t\( \)?wrfsbase %r8\r +\[^\r\n\]+:\tf3 0f ae db\t\( \)?wrgsbase %ebx\r +\[^\r\n\]+:\tf3 48 0f ae db\t\( \)?wrgsbase %rbx\r +\[^\r\n\]+:\tf3 41 0f ae d8\t\( \)?wrgsbase %r8d\r +\[^\r\n\]+:\tf3 49 0f ae d8\t\( \)?wrgsbase %r8\r +\[^\r\n\]+:\tf3 0f ae c3\t\( \)?rdfsbase %ebx\r +\[^\r\n\]+:\tf3 48 0f ae c3\t\( \)?rdfsbase %rbx\r +\[^\r\n\]+:\tf3 41 0f ae c0\t\( \)?rdfsbase %r8d\r +\[^\r\n\]+:\tf3 49 0f ae c0\t\( \)?rdfsbase %r8\r +\[^\r\n\]+:\tf3 0f ae cb\t\( \)?rdgsbase %ebx\r +\[^\r\n\]+:\tf3 48 0f ae cb\t\( \)?rdgsbase %rbx\r +\[^\r\n\]+:\tf3 41 0f ae c8\t\( \)?rdgsbase %r8d\r +\[^\r\n\]+:\tf3 49 0f ae c8\t\( \)?rdgsbase %r8\r +\[^\r\n\]+:\tf3 0f ae d3\t\( \)?wrfsbase %ebx\r +\[^\r\n\]+:\tf3 48 0f ae d3\t\( \)?wrfsbase %rbx\r +\[^\r\n\]+:\tf3 41 0f ae d0\t\( \)?wrfsbase %r8d\r +\[^\r\n\]+:\tf3 49 0f ae d0\t\( \)?wrfsbase %r8\r +\[^\r\n\]+:\tf3 0f ae db\t\( \)?wrgsbase %ebx\r +\[^\r\n\]+:\tf3 48 0f ae db\t\( \)?wrgsbase %rbx\r +\[^\r\n\]+:\tf3 41 0f ae d8\t\( \)?wrgsbase %r8d\r +\[^\r\n\]+:\tf3 49 0f ae d8\t\( \)?wrgsbase %r8\r +End of assembler dump\\." "att" + +gdb_test_no_output "set disassembly-flavor intel" +# gas/i386/x86-64-rdrnd-intel.d +# gas/i386/x86-64-f16c-intel.d +# gas/i386/x86-64-fsgs-intel.d +gdb_test "disassemble/r _start" "\r +Dump of assembler code for function _start:\r +\[^\r\n\]+:\t66 0f c7 f3\t\( \)?rdrand bx\r +\[^\r\n\]+:\t0f c7 f3\t\( \)?rdrand ebx\r +\[^\r\n\]+:\t48 0f c7 f3\t\( \)?rdrand rbx\r +\[^\r\n\]+:\t66 41 0f c7 f0\t\( \)?rdrand r8w\r +\[^\r\n\]+:\t41 0f c7 f0\t\( \)?rdrand r8d\r +\[^\r\n\]+:\t49 0f c7 f0\t\( \)?rdrand r8\r +\[^\r\n\]+:\t66 0f c7 f3\t\( \)?rdrand bx\r +\[^\r\n\]+:\t0f c7 f3\t\( \)?rdrand ebx\r +\[^\r\n\]+:\t48 0f c7 f3\t\( \)?rdrand rbx\r +\[^\r\n\]+:\t66 41 0f c7 f0\t\( \)?rdrand r8w\r +\[^\r\n\]+:\t41 0f c7 f0\t\( \)?rdrand r8d\r +\[^\r\n\]+:\t49 0f c7 f0\t\( \)?rdrand r8\r +\[^\r\n\]+:\tc4 e2 7d 13 e4\t\( \)?vcvtph2ps ymm4,xmm4\r +\[^\r\n\]+:\tc4 42 7d 13 00\t\( \)?vcvtph2ps ymm8,XMMWORD PTR \\\[r8\\\]\r +\[^\r\n\]+:\tc4 e2 79 13 f4\t\( \)?vcvtph2ps xmm6,xmm4\r +\[^\r\n\]+:\tc4 e2 79 13 21\t\( \)?vcvtph2ps xmm4,QWORD PTR \\\[rcx\\\]\r +\[^\r\n\]+:\tc4 e3 7d 1d e4 02\t\( \)?vcvtps2ph xmm4,ymm4,0x2\r +\[^\r\n\]+:\tc4 43 7d 1d 00 02\t\( \)?vcvtps2ph XMMWORD PTR \\\[r8\\\],ymm8,0x2\r +\[^\r\n\]+:\tc4 e3 79 1d e4 02\t\( \)?vcvtps2ph xmm4,xmm4,0x2\r +\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\( \)?vcvtps2ph QWORD PTR \\\[rcx\\\],xmm4,0x2\r +\[^\r\n\]+:\tc4 e2 7d 13 e4\t\( \)?vcvtph2ps ymm4,xmm4\r +\[^\r\n\]+:\tc4 42 7d 13 00\t\( \)?vcvtph2ps ymm8,XMMWORD PTR \\\[r8\\\]\r +\[^\r\n\]+:\tc4 e2 7d 13 21\t\( \)?vcvtph2ps ymm4,XMMWORD PTR \\\[rcx\\\]\r +\[^\r\n\]+:\tc4 e2 79 13 f4\t\( \)?vcvtph2ps xmm6,xmm4\r +\[^\r\n\]+:\tc4 e2 79 13 21\t\( \)?vcvtph2ps xmm4,QWORD PTR \\\[rcx\\\]\r +\[^\r\n\]+:\tc4 e2 79 13 21\t\( \)?vcvtph2ps xmm4,QWORD PTR \\\[rcx\\\]\r +\[^\r\n\]+:\tc4 e3 7d 1d e4 02\t\( \)?vcvtps2ph xmm4,ymm4,0x2\r +\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\( \)?vcvtps2ph XMMWORD PTR \\\[rcx\\\],ymm4,0x2\r +\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\( \)?vcvtps2ph XMMWORD PTR \\\[rcx\\\],ymm4,0x2\r +\[^\r\n\]+:\tc4 e3 79 1d e4 02\t\( \)?vcvtps2ph xmm4,xmm4,0x2\r +\[^\r\n\]+:\tc4 43 79 1d 00 02\t\( \)?vcvtps2ph QWORD PTR \\\[r8\\\],xmm8,0x2\r +\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\( \)?vcvtps2ph QWORD PTR \\\[rcx\\\],xmm4,0x2\r +\[^\r\n\]+:\tf3 0f ae c3\t\( \)?rdfsbase ebx\r +\[^\r\n\]+:\tf3 48 0f ae c3\t\( \)?rdfsbase rbx\r +\[^\r\n\]+:\tf3 41 0f ae c0\t\( \)?rdfsbase r8d\r +\[^\r\n\]+:\tf3 49 0f ae c0\t\( \)?rdfsbase r8\r +\[^\r\n\]+:\tf3 0f ae cb\t\( \)?rdgsbase ebx\r +\[^\r\n\]+:\tf3 48 0f ae cb\t\( \)?rdgsbase rbx\r +\[^\r\n\]+:\tf3 41 0f ae c8\t\( \)?rdgsbase r8d\r +\[^\r\n\]+:\tf3 49 0f ae c8\t\( \)?rdgsbase r8\r +\[^\r\n\]+:\tf3 0f ae d3\t\( \)?wrfsbase ebx\r +\[^\r\n\]+:\tf3 48 0f ae d3\t\( \)?wrfsbase rbx\r +\[^\r\n\]+:\tf3 41 0f ae d0\t\( \)?wrfsbase r8d\r +\[^\r\n\]+:\tf3 49 0f ae d0\t\( \)?wrfsbase r8\r +\[^\r\n\]+:\tf3 0f ae db\t\( \)?wrgsbase ebx\r +\[^\r\n\]+:\tf3 48 0f ae db\t\( \)?wrgsbase rbx\r +\[^\r\n\]+:\tf3 41 0f ae d8\t\( \)?wrgsbase r8d\r +\[^\r\n\]+:\tf3 49 0f ae d8\t\( \)?wrgsbase r8\r +\[^\r\n\]+:\tf3 0f ae c3\t\( \)?rdfsbase ebx\r +\[^\r\n\]+:\tf3 48 0f ae c3\t\( \)?rdfsbase rbx\r +\[^\r\n\]+:\tf3 41 0f ae c0\t\( \)?rdfsbase r8d\r +\[^\r\n\]+:\tf3 49 0f ae c0\t\( \)?rdfsbase r8\r +\[^\r\n\]+:\tf3 0f ae cb\t\( \)?rdgsbase ebx\r +\[^\r\n\]+:\tf3 48 0f ae cb\t\( \)?rdgsbase rbx\r +\[^\r\n\]+:\tf3 41 0f ae c8\t\( \)?rdgsbase r8d\r +\[^\r\n\]+:\tf3 49 0f ae c8\t\( \)?rdgsbase r8\r +\[^\r\n\]+:\tf3 0f ae d3\t\( \)?wrfsbase ebx\r +\[^\r\n\]+:\tf3 48 0f ae d3\t\( \)?wrfsbase rbx\r +\[^\r\n\]+:\tf3 41 0f ae d0\t\( \)?wrfsbase r8d\r +\[^\r\n\]+:\tf3 49 0f ae d0\t\( \)?wrfsbase r8\r +\[^\r\n\]+:\tf3 0f ae db\t\( \)?wrgsbase ebx\r +\[^\r\n\]+:\tf3 48 0f ae db\t\( \)?wrgsbase rbx\r +\[^\r\n\]+:\tf3 41 0f ae d8\t\( \)?wrgsbase r8d\r +\[^\r\n\]+:\tf3 49 0f ae d8\t\( \)?wrgsbase r8\r +End of assembler dump\\." "intel" diff --git a/gdb/testsuite/gdb.arch/i386-ivy-bridge.S b/gdb/testsuite/gdb.arch/i386-ivy-bridge.S new file mode 100644 --- /dev/null +++ b/gdb/testsuite/gdb.arch/i386-ivy-bridge.S @@ -0,0 +1,67 @@ +/* Copyright 2011 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + + This file is part of the gdb testsuite. */ + + .globl _start +_start: .text + +/* gas/i386/rdrnd.s */ + .att_syntax prefix + rdrand %bx + rdrand %ebx + + .intel_syntax noprefix + rdrand bx + rdrand ebx + +/* gas/i386/f16c.s */ + .att_syntax prefix + vcvtph2ps %xmm4,%ymm4 + vcvtph2ps (%ecx),%ymm4 + vcvtph2ps %xmm4,%xmm6 + vcvtph2ps (%ecx),%xmm4 + vcvtps2ph $0x2,%ymm4,%xmm4 + vcvtps2ph $0x2,%ymm4,(%ecx) + vcvtps2ph $0x2,%xmm4,%xmm4 + vcvtps2ph $0x2,%xmm4,(%ecx) + + .intel_syntax noprefix + vcvtph2ps ymm4,xmm4 + vcvtph2ps ymm4,XMMWORD PTR [ecx] + vcvtph2ps ymm4,[ecx] + vcvtph2ps xmm6,xmm4 + vcvtph2ps xmm4,QWORD PTR [ecx] + vcvtph2ps xmm4,[ecx] + vcvtps2ph xmm4,ymm4,0x2 + vcvtps2ph XMMWORD PTR [ecx],ymm4,0x2 + vcvtps2ph [ecx],ymm4,0x2 + vcvtps2ph xmm4,xmm4,0x2 + vcvtps2ph QWORD PTR [ecx],xmm4,0x2 + vcvtps2ph [ecx],xmm4,0x2 + +/* gas/i386/fsgs.s */ + .att_syntax prefix + rdfsbase %ebx + rdgsbase %ebx + wrfsbase %ebx + wrgsbase %ebx + + .intel_syntax noprefix + rdfsbase ebx + rdgsbase ebx + wrfsbase ebx + wrgsbase ebx + diff --git a/gdb/testsuite/gdb.arch/i386-ivy-bridge.exp b/gdb/testsuite/gdb.arch/i386-ivy-bridge.exp new file mode 100644 --- /dev/null +++ b/gdb/testsuite/gdb.arch/i386-ivy-bridge.exp @@ -0,0 +1,106 @@ +# Copyright 2011 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +if {![istarget "x86_64-*-*"] && ![istarget "i?86-*-*"]} then { + return +} + +set testfile i386-ivy-bridge +set test compilation +if [prepare_for_testing ${testfile}.exp ${testfile}.x ${testfile}.S [list debug "additional_flags=-m32 -nostdlib"]] { + fail $test + return -1 +} +pass $test + +gdb_test_no_output "set disassembly-flavor att" +# gas/i386/rdrnd.d +# gas/i386/f16c.d +# gas/i386/fsgs.d +gdb_test "disassemble/r _start" "\r +Dump of assembler code for function _start:\r +\[^\r\n\]+:\t66 0f c7 f3\t\( \)?rdrand %bx\r +\[^\r\n\]+:\t0f c7 f3\t\( \)?rdrand %ebx\r +\[^\r\n\]+:\t66 0f c7 f3\t\( \)?rdrand %bx\r +\[^\r\n\]+:\t0f c7 f3\t\( \)?rdrand %ebx\r +\[^\r\n\]+:\tc4 e2 7d 13 e4\t\( \)?vcvtph2ps %xmm4,%ymm4\r +\[^\r\n\]+:\tc4 e2 7d 13 21\t\( \)?vcvtph2ps \\(%ecx\\),%ymm4\r +\[^\r\n\]+:\tc4 e2 79 13 f4\t\( \)?vcvtph2ps %xmm4,%xmm6\r +\[^\r\n\]+:\tc4 e2 79 13 21\t\( \)?vcvtph2ps \\(%ecx\\),%xmm4\r +\[^\r\n\]+:\tc4 e3 7d 1d e4 02\t\( \)?vcvtps2ph \\\$0x2,%ymm4,%xmm4\r +\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\( \)?vcvtps2ph \\\$0x2,%ymm4,\\(%ecx\\)\r +\[^\r\n\]+:\tc4 e3 79 1d e4 02\t\( \)?vcvtps2ph \\\$0x2,%xmm4,%xmm4\r +\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\( \)?vcvtps2ph \\\$0x2,%xmm4,\\(%ecx\\)\r +\[^\r\n\]+:\tc4 e2 7d 13 e4\t\( \)?vcvtph2ps %xmm4,%ymm4\r +\[^\r\n\]+:\tc4 e2 7d 13 21\t\( \)?vcvtph2ps \\(%ecx\\),%ymm4\r +\[^\r\n\]+:\tc4 e2 7d 13 21\t\( \)?vcvtph2ps \\(%ecx\\),%ymm4\r +\[^\r\n\]+:\tc4 e2 79 13 f4\t\( \)?vcvtph2ps %xmm4,%xmm6\r +\[^\r\n\]+:\tc4 e2 79 13 21\t\( \)?vcvtph2ps \\(%ecx\\),%xmm4\r +\[^\r\n\]+:\tc4 e2 79 13 21\t\( \)?vcvtph2ps \\(%ecx\\),%xmm4\r +\[^\r\n\]+:\tc4 e3 7d 1d e4 02\t\( \)?vcvtps2ph \\\$0x2,%ymm4,%xmm4\r +\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\( \)?vcvtps2ph \\\$0x2,%ymm4,\\(%ecx\\)\r +\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\( \)?vcvtps2ph \\\$0x2,%ymm4,\\(%ecx\\)\r +\[^\r\n\]+:\tc4 e3 79 1d e4 02\t\( \)?vcvtps2ph \\\$0x2,%xmm4,%xmm4\r +\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\( \)?vcvtps2ph \\\$0x2,%xmm4,\\(%ecx\\)\r +\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\( \)?vcvtps2ph \\\$0x2,%xmm4,\\(%ecx\\)\r +\[^\r\n\]+:\tf3 0f ae c3\t\( \)?rdfsbase %ebx\r +\[^\r\n\]+:\tf3 0f ae cb\t\( \)?rdgsbase %ebx\r +\[^\r\n\]+:\tf3 0f ae d3\t\( \)?wrfsbase %ebx\r +\[^\r\n\]+:\tf3 0f ae db\t\( \)?wrgsbase %ebx\r +\[^\r\n\]+:\tf3 0f ae c3\t\( \)?rdfsbase %ebx\r +\[^\r\n\]+:\tf3 0f ae cb\t\( \)?rdgsbase %ebx\r +\[^\r\n\]+:\tf3 0f ae d3\t\( \)?wrfsbase %ebx\r +\[^\r\n\]+:\tf3 0f ae db\t\( \)?wrgsbase %ebx\r +End of assembler dump\\." "att" + +gdb_test_no_output "set disassembly-flavor intel" +# gas/i386/rdrnd-intel.d +# gas/i386/f16c-intel.d +# gas/i386/fsgs-intel.d +gdb_test "disassemble/r _start" "\r +Dump of assembler code for function _start:\r +\[^\r\n\]+:\t66 0f c7 f3\t\( \)?rdrand bx\r +\[^\r\n\]+:\t0f c7 f3\t\( \)?rdrand ebx\r +\[^\r\n\]+:\t66 0f c7 f3\t\( \)?rdrand bx\r +\[^\r\n\]+:\t0f c7 f3\t\( \)?rdrand ebx\r +\[^\r\n\]+:\tc4 e2 7d 13 e4\t\( \)?vcvtph2ps ymm4,xmm4\r +\[^\r\n\]+:\tc4 e2 7d 13 21\t\( \)?vcvtph2ps ymm4,XMMWORD PTR \\\[ecx\\\]\r +\[^\r\n\]+:\tc4 e2 79 13 f4\t\( \)?vcvtph2ps xmm6,xmm4\r +\[^\r\n\]+:\tc4 e2 79 13 21\t\( \)?vcvtph2ps xmm4,QWORD PTR \\\[ecx\\\]\r +\[^\r\n\]+:\tc4 e3 7d 1d e4 02\t\( \)?vcvtps2ph xmm4,ymm4,0x2\r +\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\( \)?vcvtps2ph XMMWORD PTR \\\[ecx\\\],ymm4,0x2\r +\[^\r\n\]+:\tc4 e3 79 1d e4 02\t\( \)?vcvtps2ph xmm4,xmm4,0x2\r +\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\( \)?vcvtps2ph QWORD PTR \\\[ecx\\\],xmm4,0x2\r +\[^\r\n\]+:\tc4 e2 7d 13 e4\t\( \)?vcvtph2ps ymm4,xmm4\r +\[^\r\n\]+:\tc4 e2 7d 13 21\t\( \)?vcvtph2ps ymm4,XMMWORD PTR \\\[ecx\\\]\r +\[^\r\n\]+:\tc4 e2 7d 13 21\t\( \)?vcvtph2ps ymm4,XMMWORD PTR \\\[ecx\\\]\r +\[^\r\n\]+:\tc4 e2 79 13 f4\t\( \)?vcvtph2ps xmm6,xmm4\r +\[^\r\n\]+:\tc4 e2 79 13 21\t\( \)?vcvtph2ps xmm4,QWORD PTR \\\[ecx\\\]\r +\[^\r\n\]+:\tc4 e2 79 13 21\t\( \)?vcvtph2ps xmm4,QWORD PTR \\\[ecx\\\]\r +\[^\r\n\]+:\tc4 e3 7d 1d e4 02\t\( \)?vcvtps2ph xmm4,ymm4,0x2\r +\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\( \)?vcvtps2ph XMMWORD PTR \\\[ecx\\\],ymm4,0x2\r +\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\( \)?vcvtps2ph XMMWORD PTR \\\[ecx\\\],ymm4,0x2\r +\[^\r\n\]+:\tc4 e3 79 1d e4 02\t\( \)?vcvtps2ph xmm4,xmm4,0x2\r +\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\( \)?vcvtps2ph QWORD PTR \\\[ecx\\\],xmm4,0x2\r +\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\( \)?vcvtps2ph QWORD PTR \\\[ecx\\\],xmm4,0x2\r +\[^\r\n\]+:\tf3 0f ae c3\t\( \)?rdfsbase ebx\r +\[^\r\n\]+:\tf3 0f ae cb\t\( \)?rdgsbase ebx\r +\[^\r\n\]+:\tf3 0f ae d3\t\( \)?wrfsbase ebx\r +\[^\r\n\]+:\tf3 0f ae db\t\( \)?wrgsbase ebx\r +\[^\r\n\]+:\tf3 0f ae c3\t\( \)?rdfsbase ebx\r +\[^\r\n\]+:\tf3 0f ae cb\t\( \)?rdgsbase ebx\r +\[^\r\n\]+:\tf3 0f ae d3\t\( \)?wrfsbase ebx\r +\[^\r\n\]+:\tf3 0f ae db\t\( \)?wrgsbase ebx\r +End of assembler dump\\." "intel"