[testsuite] Various testsuite fixes.

- [aarch64] Fix gdb.cp/nextoverthrow.exp regression (Yao Qi).
This commit is contained in:
Jan Kratochvil 2016-10-12 10:26:19 +02:00
parent 1c3e2fa7ac
commit 425d099f6b
7 changed files with 694 additions and 5 deletions

View File

@ -35,7 +35,7 @@ Index: gdb-7.5.50.20130215/gdb/testsuite/gdb.arch/powerpc-power6.exp
+
+set testfile "powerpc-power6"
+set srcfile ${testfile}.s
+set objfile ${objdir}/${subdir}/${testfile}.o
+set objfile [standard_output_file ${testfile}.o]
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${objfile}" object {debug}] != "" } {
+ untested "PowerPC prologue tests"

View File

@ -68,7 +68,7 @@ http://sourceware.org/ml/gdb-patches/2007-09/msg00228.html
+
+set testfile "ppc-clobbered-registers-O2"
+set srcfile ${testfile}.c
+set binfile ${objdir}/${subdir}/${testfile}
+set binfile [standard_output_file ${testfile}]
+set compile_flags "debug additional_flags=-O2"
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable ${compile_flags}] != "" } {

View File

@ -0,0 +1,145 @@
http://sourceware.org/ml/gdb-patches/2016-10/msg00287.html
Subject: Re: aarch64 regression: gdb.cp/nextoverthrow.exp [Re: [PATCH master+7.12] [AArch64] Match instruction "STP with base register" in prologue]
Jan Kratochvil <jan.kratochvil@redhat.com> writes:
>> Could you open a ticket in bugzilla for this error? I am testing a patc=
h.
>
> https://sourceware.org/bugzilla/show_bug.cgi?id=3D20682
Thanks, here is the patch...
--=20
Yao (=E9=BD=90=E5=B0=A7)
=46rom 5794d10bcda63da8fc47d0a76c29669af83ed48b Mon Sep 17 00:00:00 2001
From: Yao Qi <yao.qi@linaro.org>
Date: Tue, 11 Oct 2016 12:12:46 +0100
Subject: [PATCH] [AArch64] Track FP registers in prologue analyzer
Subject: [PATCH] [AArch64] Track FP registers in prologue analyzer
We don't track FP registers in aarch64 prologue analyzer, so this causes
an internal error when FP registers are saved by "stp" instruction in
prologue (stp d8, d9, [sp,#128]),
tbreak _Unwind_RaiseException^M
aarch64-tdep.c:335: internal-error: CORE_ADDR aarch64_analyze_prologue(gdb=
arch*, CORE_ADDR, CORE_ADDR, aarch64_prologue_cache*): Assertion `inst.oper=
ands[0].type =3D=3D AARCH64_OPND_Rt' failed.^M
A problem internal to GDB has been detected,
This patch teaches GDB to track FP registers (D registers) in prologue
analyzer.
gdb:
2016-10-12 Yao Qi <yao.qi@linaro.org>
PR tdep/20682
* aarch64-tdep.c: Replace 32 with AARCH64_D_REGISTER_COUNT.
(aarch64_analyze_prologue): Extend array 'regs' for D registers.
Assert that operand 0 and 1 can be X or D registers. Update
register number for D registers. Update registers in frame
cache.
* aarch64-tdep.h (AARCH64_D_REGISTER_COUNT): New macro.
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index 16dd365..be72785 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -68,7 +68,7 @@
=20
/* Pseudo register base numbers. */
#define AARCH64_Q0_REGNUM 0
-#define AARCH64_D0_REGNUM (AARCH64_Q0_REGNUM + 32)
+#define AARCH64_D0_REGNUM (AARCH64_Q0_REGNUM + AARCH64_D_REGISTER_COUNT)
#define AARCH64_S0_REGNUM (AARCH64_D0_REGNUM + 32)
#define AARCH64_H0_REGNUM (AARCH64_S0_REGNUM + 32)
#define AARCH64_B0_REGNUM (AARCH64_H0_REGNUM + 32)
@@ -206,11 +206,12 @@ aarch64_analyze_prologue (struct gdbarch *gdbarch,
{
enum bfd_endian byte_order_for_code =3D gdbarch_byte_order_for_code (gdb=
arch);
int i;
- pv_t regs[AARCH64_X_REGISTER_COUNT];
+ /* Track X registers and D registers in prologue. */
+ pv_t regs[AARCH64_X_REGISTER_COUNT + AARCH64_D_REGISTER_COUNT];
struct pv_area *stack;
struct cleanup *back_to;
=20
- for (i =3D 0; i < AARCH64_X_REGISTER_COUNT; i++)
+ for (i =3D 0; i < AARCH64_X_REGISTER_COUNT + AARCH64_D_REGISTER_COUNT; i=
++)
regs[i] =3D pv_register (i, 0);
stack =3D make_pv_area (AARCH64_SP_REGNUM, gdbarch_addr_bit (gdbarch));
back_to =3D make_cleanup_free_pv_area (stack);
@@ -328,13 +329,15 @@ aarch64_analyze_prologue (struct gdbarch *gdbarch,
&& strcmp ("stp", inst.opcode->name) =3D=3D 0)
{
/* STP with addressing mode Pre-indexed and Base register. */
- unsigned rt1 =3D inst.operands[0].reg.regno;
- unsigned rt2 =3D inst.operands[1].reg.regno;
+ unsigned rt1;
+ unsigned rt2;
unsigned rn =3D inst.operands[2].addr.base_regno;
int32_t imm =3D inst.operands[2].addr.offset.imm;
=20
- gdb_assert (inst.operands[0].type =3D=3D AARCH64_OPND_Rt);
- gdb_assert (inst.operands[1].type =3D=3D AARCH64_OPND_Rt2);
+ gdb_assert (inst.operands[0].type =3D=3D AARCH64_OPND_Rt
+ || inst.operands[0].type =3D=3D AARCH64_OPND_Ft);
+ gdb_assert (inst.operands[1].type =3D=3D AARCH64_OPND_Rt2
+ || inst.operands[1].type =3D=3D AARCH64_OPND_Ft2);
gdb_assert (inst.operands[2].type =3D=3D AARCH64_OPND_ADDR_SIMM7);
gdb_assert (!inst.operands[2].addr.offset.is_reg);
=20
@@ -349,6 +352,17 @@ aarch64_analyze_prologue (struct gdbarch *gdbarch,
pv_add_constant (regs[rn], imm + 8)))
break;
=20
+ rt1 =3D inst.operands[0].reg.regno;
+ rt2 =3D inst.operands[1].reg.regno;
+ if (inst.operands[0].type =3D=3D AARCH64_OPND_Ft)
+ {
+ /* Only bottom 64-bit of each V register (D register) need
+ to be preserved. */
+ gdb_assert (inst.operands[0].qualifier =3D=3D AARCH64_OPND_QLF_S_D);
+ rt1 +=3D AARCH64_X_REGISTER_COUNT;
+ rt2 +=3D AARCH64_X_REGISTER_COUNT;
+ }
+
pv_area_store (stack, pv_add_constant (regs[rn], imm), 8,
regs[rt1]);
pv_area_store (stack, pv_add_constant (regs[rn], imm + 8), 8,
@@ -408,6 +422,16 @@ aarch64_analyze_prologue (struct gdbarch *gdbarch,
cache->saved_regs[i].addr =3D offset;
}
=20
+ for (i =3D 0; i < AARCH64_D_REGISTER_COUNT; i++)
+ {
+ int regnum =3D gdbarch_num_regs (gdbarch);
+ CORE_ADDR offset;
+
+ if (pv_area_find_reg (stack, gdbarch, i + AARCH64_X_REGISTER_COUNT,
+ &offset))
+ cache->saved_regs[i + regnum + AARCH64_D0_REGNUM].addr =3D offset;
+ }
+
do_cleanups (back_to);
return start;
}
diff --git a/gdb/aarch64-tdep.h b/gdb/aarch64-tdep.h
index a95b613..6252820 100644
--- a/gdb/aarch64-tdep.h
+++ b/gdb/aarch64-tdep.h
@@ -68,6 +68,8 @@ enum aarch64_regnum
=20
/* Total number of general (X) registers. */
#define AARCH64_X_REGISTER_COUNT 32
+/* Total number of D registers. */
+#define AARCH64_D_REGISTER_COUNT 32
=20
/* The maximum number of modified instructions generated for one
single-stepped instruction. */

View File

@ -26,7 +26,7 @@
+
+set testfile "powerpc-power7"
+set srcfile ${testfile}.s
+set objfile ${objdir}/${subdir}/${testfile}.o
+set objfile [standard_output_file ${testfile}.o]
+
+if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${objfile}" object {debug}] != "" } {
+ untested "PowerPC Power7 instructions disassembly"

View File

@ -0,0 +1,226 @@
These testcases have been created by compiling glibc-2.17-78 on
RHEL-7.1 s390x/ppc64 boxes, and then taking the "select.o" file
present at $builddir/misc/select.o.
Index: gdb-7.6.1/gdb/testsuite/gdb.arch/s390x-prologue-skip.exp
===================================================================
--- /dev/null
+++ gdb-7.6.1/gdb/testsuite/gdb.arch/s390x-prologue-skip.exp
@@ -0,0 +1,34 @@
+# Copyright 2015 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+if { ![istarget s390x-*linux-*] || ![is_lp64_target] } {
+ verbose "Skipping s390x-prologue-skip.exp"
+ return
+}
+
+set testfile "s390x-prologue-skip"
+set uufile "${srcdir}/${subdir}/${testfile}.o.uu"
+set ofile "${srcdir}/${subdir}/${testfile}.o"
+
+if { [catch "system \"uudecode -o ${ofile} ${uufile}\"" ] != 0 } {
+ untested "failed uudecode"
+ return -1
+}
+
+gdb_exit
+gdb_start
+gdb_load $ofile
+
+gdb_test "break select" "Breakpoint $decimal at 0x48: file ../sysdeps/unix/syscall-template.S, line 81." "breakpoint on select"
Index: gdb-7.6.1/gdb/testsuite/gdb.arch/s390x-prologue-skip.o.uu
===================================================================
--- /dev/null
+++ gdb-7.6.1/gdb/testsuite/gdb.arch/s390x-prologue-skip.o.uu
@@ -0,0 +1,64 @@
+begin 644 s390x-prologue-skip.o.uu
+M?T5,1@("`0`````````````!`!8````!````````````````````````````
+M``+```````!```````!``!(`#^LE\!``).O?\&@`)+D$`.^G^_]@X^#P```D
+MP.4`````N00``NLE\+``!`J.N00`TKD$`"#`Y0````"Y!``MZ]_Q"``$I_0`
+M"L`0`````+\/$`"G=/_7"HZG2?`!N2$`),"T``````?^````5@`"````.0$!
+M^PX-``$!`0$````!```!+BXO<WES9&5P<R]U;FEX``!S>7-C86QL+71E;7!L
+M871E+E,``0`````)`@```````````]```0)F$P("``$!````CP`"``````@!
+M```````````````````````````N+B]S>7-D97!S+W5N:7@O<WES8V%L;"UT
+M96UP;&%T92Y3`"]R;V]T+V=L:6)C+V=L:6)C+3(N,3<M-S@N96PW+G-R8R]G
+M;&EB8RTR+C$W+6,W-3AA-C@V+VUI<V,`1TY5($%3(#(N,C,N-3(N,"XQ`(`!
+M`1$`$`81`1(!`P@;""4($P4`````````````````+``"``````@`````````
+M`````````````````&@`````````````````````````%``````!>E(``7@.
+M`1L,#Z`!````````&````!P`````````1`!,CP6.!HT'2`[``@```!`````X
+M`````````"```````"YS>6UT86(`+G-T<G1A8@`N<VAS=')T86(`+G)E;&$N
+M=&5X=``N9&%T80`N8G-S`"YN;W1E+D=.52US=&%C:P`N<F5L82YD96)U9U]L
+M:6YE`"YR96QA+F1E8G5G7VEN9F\`+F1E8G5G7V%B8G)E=@`N<F5L82YD96)U
+M9U]A<F%N9V5S`"YR96QA+F5H7V9R86UE````````````````````````````
+M````````````````````````````````````````````````````````````
+M````````(`````$`````````!@```````````````````$``````````:```
+M``````````````````0``````````````!L````$````````````````````
+M``````````F``````````&`````0`````0`````````(`````````!@````F
+M`````0`````````#````````````````````J```````````````````````
+M````````!```````````````+`````@``````````P``````````````````
+M`*@```````````````````````````````0``````````````#$````!````
+M``````````````````````````"H```````````````````````````````!
+M``````````````!&`````0``````````````````````````````J```````
+M``!:`````````````````````0``````````````00````0`````````````
+M````````````````">``````````&````!`````&``````````@`````````
+M&````%<````!``````````````````````````````$"`````````),`````
+M```````````````!``````````````!2````!```````````````````````
+M```````)^`````````!@````$`````@`````````"``````````8````8P``
+M``$``````````````````````````````94`````````%```````````````
+M``````$``````````````'8````!``````````````````````````````&P
+M`````````#`````````````````````0``````````````!Q````!```````
+M```````````````````````*6``````````P````$`````L`````````"```
+M```````8````B@````$``````````@```````````````````>``````````
+M2`````````````````````@``````````````(4````$````````````````
+M``````````````J(`````````#`````0````#0`````````(`````````!@`
+M```1`````P`````````````````````````````"*`````````"4````````
+M`````````````0```````````````0````(`````````````````````````
+M````!T`````````!L````!$````*``````````@`````````&`````D````#
+M``````````````````````````````CP`````````(X`````````````````
+M```!`````````````````````````````````````````````````P```0``
+M`````````````````````````P```P```````````````````````````P``
+M!````````````````````````````P``"```````````````````````````
+M`P``"@```````````````````````````P``!@``````````````````````
+M`````P``"P```````````````````````````P``#0``````````````````
+M`````````P``!0`````````````````````````!$```````````````````
+M```````````;$``````````````````````````````V$@```0````````!(
+M`````````"`````_$`````````````````````````````!7$@```0``````
+M``!6`````````!````!I$`````````````````````````````!Y(@```0``
+M``````!(`````````"````"'(@```0````````!(`````````"``7U]L:6)C
+M7V5N86)L95]A<WEN8V-A;F-E;`!?7VQI8F-?9&ES86)L95]A<WEN8V-A;F-E
+M;`!?7W-E;&5C=`!?7VQI8F-?;75L=&EP;&5?=&AR96%D<P!?7W-E;&5C=%]N
+M;V-A;F-E;`!?7W-Y<V-A;&Q?97)R;W(`7U]L:6)C7W-E;&5C=`!S96QE8W0`
+M````````````'`````H````3``````````(`````````-@````L````3````
+M``````(`````````2@````T````3``````````(`````````8@````\````3
+M``````````(`````````1@````$````6````````````````````!@````4`
+M```$````````````````````#`````8````$````````````````````$```
+M``$````6````````````````````&`````$````6`````````&@`````````
+M!@````0````$````````````````````$`````$````6````````````````
+L````(`````$````%````````````````````/`````$````%`````````$@`
+`
+end
Index: gdb-7.6.1/gdb/testsuite/gdb.arch/ppc64-prologue-skip.exp
===================================================================
--- /dev/null
+++ gdb-7.6.1/gdb/testsuite/gdb.arch/ppc64-prologue-skip.exp
@@ -0,0 +1,34 @@
+# Copyright 2015 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+if { ![istarget powerpc64-*linux-*] || ![is_lp64_target] } {
+ verbose "Skipping ppc64-prologue-skip.exp"
+ return
+}
+
+set testfile "ppc64-prologue-skip"
+set uufile "${srcdir}/${subdir}/${testfile}.o.uu"
+set ofile "${srcdir}/${subdir}/${testfile}.o"
+
+if { [catch "system \"uudecode -o ${ofile} ${uufile}\"" ] != 0 } {
+ untested "failed uudecode"
+ return -1
+}
+
+gdb_exit
+gdb_start
+gdb_load $ofile
+
+gdb_test "break ___newselect_nocancel" "Breakpoint $decimal at 0xc: file ../sysdeps/unix/syscall-template.S, line 81." "breakpoint on ___newselect_nocancel"
Index: gdb-7.6.1/gdb/testsuite/gdb.arch/ppc64-prologue-skip.o.uu
===================================================================
--- /dev/null
+++ gdb-7.6.1/gdb/testsuite/gdb.arch/ppc64-prologue-skip.o.uu
@@ -0,0 +1,70 @@
+begin 644 ppc64-skip-prologue.o.uu
+M?T5,1@("`0`````````````!`!4````!````````````````````````````
+M``-(``````!```````!``!0`$8%-B-`L"@``0,(`-#@``(Y$```"3.,`('P(
+M`J;X`0`0^"'_D4@```%@````Z`$`@#@A`'!\"`.F3H``(/@A_X%]*`*F^2$`
+MD/CA`-#XP0#(^*$`P/B!`+CX80"P2````6````#X80!PZ.$`T.C!`,CHH0#`
+MZ($`N.AA`+`X``".1````GP``";X80!X^`$`B.AA`'!(```!8````.DA`)#H
+M`0"(Z&$`>'TH`Z9\#_$@."$`@$SC`"!+__]@```````,($``````````O``(
+M7U]S96QE8W0```````````````````````````!6``(````Y!`'[#@T``0$!
+M`0````$```$N+B]S>7-D97!S+W5N:7@``'-Y<V-A;&PM=&5M<&QA=&4N4P`!
+M``````D"```````````#T``!`BT3`@D``0$```"/``(`````"`$`````````
+M`````````````````"XN+W-Y<V1E<',O=6YI>"]S>7-C86QL+71E;7!L871E
+M+E,`+W)O;W0O9VQI8F,O9VQI8F,M,BXQ-RTW."YE;#<N<W)C+V=L:6)C+3(N
+M,3<M8S<U.&$V.#8O;6ES8P!'3E4@05,@,BXR,RXU,BXP+C$`@`$!$0`0!A$!
+M$@$#"!L()0@3!0`````````````````L``(`````"```````````````````
+M````````V``````````````````````````0``````%Z4@`$>$$!&PP!````
+M`#`````8`````````+P`20YP$4%^1`X`009!0@Z``4(107Y2$49_20X`!D$&
+M1@``````+G-Y;71A8@`N<W1R=&%B`"YS:'-T<G1A8@`N<F5L82YT97AT`"YD
+M871A`"YB<W,`+G)E;&$N;W!D`"YN;W1E+D=.52US=&%C:P`N<F5L82YD96)U
+M9U]L:6YE`"YR96QA+F1E8G5G7VEN9F\`+F1E8G5G7V%B8G)E=@`N<F5L82YD
+M96)U9U]A<F%N9V5S`"YR96QA+F5H7V9R86UE````````````````````````
+M````````````````````````````````````````````````````````````
+M`````````"`````!``````````8```````````````````!``````````-@`
+M```````````````````$```````````````;````!```````````````````
+M```````````*>`````````!(````$@````$`````````"``````````8````
+M)@````$``````````P```````````````````1@`````````````````````
+M``````````$``````````````"P````(``````````,`````````````````
+M``$8```````````````````````````````!```````````````V`````0``
+M```````#```````````````````!&``````````0````````````````````
+M"```````````````,0````0`````````````````````````````"L``````
+M````,````!(````%``````````@`````````&````#L````!````````````
+M``````````````````$H```````````````````````````````!````````
+M``````!0`````0`````````````````````````````!*`````````!:````
+M`````````````````0``````````````2P````0`````````````````````
+M````````"O``````````&````!(````(``````````@`````````&````&$`
+M```!``````````````````````````````&"`````````),`````````````
+M```````!``````````````!<````!``````````````````````````````+
+M"`````````!@````$@````H`````````"``````````8````;0````$`````
+M`````````````````````````A4`````````%`````````````````````$`
+M`````````````(`````!``````````````````````````````(P````````
+M`#`````````````````````0``````````````![````!```````````````
+M```````````````+:``````````P````$@````T`````````"``````````8
+M````E`````$``````````@```````````````````F``````````2```````
+M``````````````@``````````````(\````$````````````````````````
+M``````N8`````````!@````2````#P`````````(`````````!@````1````
+M`P`````````````````````````````"J`````````">````````````````
+M`````0```````````````0````(`````````````````````````````"$@`
+M```````!L````!,````+``````````@`````````&`````D````#````````
+M``````````````````````GX`````````'H````````````````````!````
+M`````````````````````````````````````````````P```0``````````
+M`````````````````P```P```````````````````````````P``!```````
+M`````````````````````P``!0```````````````````````````P``"@``
+M`````````````````````````P``#````````````````````````````P``
+M"````````````````````````````P``#0``````````````````````````
+M`P``#P```````````````````````````P``!P``````````````````````
+M```!$@``!0```````````````````-@````*$@```0`````````,````````
+M`#`````@$``````````````````````````````P$```````````````````
+M``````````!*$`````````````````````````````!E(@``!0``````````
+M`````````-@```!S(@``!0```````````````````-@`7U]S96QE8W0`7U]?
+M;F5W<V5L96-T7VYO8V%N8V5L`%]?<WES8V%L;%]E<G)O<@!?7VQI8F-?96YA
+M8FQE7V%S>6YC8V%N8V5L`%]?;&EB8U]D:7-A8FQE7V%S>6YC8V%N8V5L`%]?
+M;&EB8U]S96QE8W0`<V5L96-T```````````````````D````#0````H`````
+M``````````````!<````#@````H```````````````````"4````#P````H`
+M`````````````````````````0```"8````````````````````(````````
+M`#,```````````````````!&`````0```"8````````````````````&````
+M!@````$````````````````````,````!P````$````````````````````0
+M`````0```"8````````````````````8`````0```"8`````````V```````
+M```&````!0````$````````````````````0`````0```"8`````````````
+6```````<`````0```!H`````````````
+`
+end

View File

@ -112,3 +112,300 @@ Date: Wed Oct 5 21:56:46 2016 +0200
+ "#0 ($hex in )?func.*\r\n#1 <signal handler called>\r\n#2 ($hex in )?main.*"
gdb_test "finish" "Run till exit from \#0 func.*<signal handler called>"
commit 20c2c024c1e89e402a57e8c3577fb9777709d9a4
Author: Carl E. Love <carll@oc4738070240.ibm.com>
Date: Fri Aug 19 11:06:38 2016 -0700
Fix missing files for ld when test suite not compiled in the source directory
This patch fixes an issues with six test suite expect files that do not
run correctly when the test suite is not built in the source directory. The
issue is these tests are not using the current "standard_testfile" call
but rather using the older set command to initialize the "testfile",
"srcfile" and "binprefix" variables or are missing the set for the
"binprefix" variable.
-----------------------------------------------
gdb/testsuite/ChangeLog
2016-08-19 Carl Love <cel@us.ibm.com>
* gdb.arch/altivec-regs.exp: Use standard_testfile instead of
maintaining separate logic for constructing the output path.
* gdb.arch/powerpc-d128-regs.exp: Likewise.
* gdb.arch/ppc-dfp.exp: Likewise.
* gdb.arch/ppc-fp.exp: Likewise.
* gdb.arch/vsx-regs.exp: Likewise.
* gdb.arch/altivec-abi.exp: Likewise, plus added local variable
binprefix for generating the additional binary files.
### a/gdb/testsuite/ChangeLog
### b/gdb/testsuite/ChangeLog
## -1,3 +1,14 @@
+2016-08-19 Carl Love <cel@us.ibm.com>
+
+ * gdb.arch/altivec-regs.exp: Use standard_testfile instead of
+ maintaining separate logic for constructing the output path.
+ * gdb.arch/powerpc-d128-regs.exp: Likewise.
+ * gdb.arch/ppc-dfp.exp: Likewise.
+ * gdb.arch/ppc-fp.exp: Likewise.
+ * gdb.arch/vsx-regs.exp: Likewise.
+ * gdb.arch/altivec-abi.exp: Likewise, plus added local variable
+ binprefix for generating the additional binary files.
+
2016-08-19 Pedro Alves <palves@redhat.com>
* gdb.trace/mi-trace-frame-collected.exp
--- a/gdb/testsuite/gdb.arch/altivec-abi.exp
+++ b/gdb/testsuite/gdb.arch/altivec-abi.exp
@@ -26,9 +26,7 @@ if {![istarget "powerpc*"] || [skip_altivec_tests]} then {
return
}
-set testfile "altivec-abi"
-set binfile ${objdir}/${subdir}/${testfile}
-set srcfile ${testfile}.c
+standard_testfile
if [get_compiler_info] {
warning "get_compiler failed"
@@ -146,6 +144,8 @@ proc altivec_abi_tests { extra_flags force_abi } {
}
if [test_compiler_info gcc*] {
+ set binprefix ${binfile}
+
with_test_prefix "default ABI, auto" {
altivec_abi_tests "additional_flags=-maltivec" "auto"
}
@@ -156,23 +156,23 @@ if [test_compiler_info gcc*] {
# On 64-bit GNU/Linux with GCC 4.1 and 4.2, -mabi=no-altivec
# was broken, so skip those tests there.
if { ![is_lp64_target] || ![test_compiler_info "gcc-4-\[12\]-*"] } {
- set binfile ${objdir}/${subdir}/${testfile}-ge-ge
+ set binfile ${binprefix}-ge-ge
with_test_prefix "generic ABI, forced" {
altivec_abi_tests "additional_flags=-maltivec additional_flags=-mabi=no-altivec" "generic"
}
- set binfile ${objdir}/${subdir}/${testfile}-ge-auto
+ set binfile ${binprefix}-ge-auto
with_test_prefix "generic ABI, auto" {
altivec_abi_tests "additional_flags=-maltivec additional_flags=-mabi=no-altivec" "auto"
}
}
- set binfile ${objdir}/${subdir}/${testfile}-av-av
+ set binfile ${binprefix}-av-av
with_test_prefix "AltiVec ABI, forced" {
altivec_abi_tests "additional_flags=-maltivec additional_flags=-mabi=altivec" "altivec"
}
- set binfile ${objdir}/${subdir}/${testfile}-av-auto
+ set binfile ${binprefix}-av-auto
with_test_prefix "AltiVec ABI, auto" {
altivec_abi_tests "additional_flags=-maltivec additional_flags=-mabi=altivec" "auto"
}
--- a/gdb/testsuite/gdb.arch/altivec-regs.exp
+++ b/gdb/testsuite/gdb.arch/altivec-regs.exp
@@ -27,9 +27,7 @@ if {![istarget "powerpc*"] || [skip_altivec_tests]} then {
return
}
-set testfile "altivec-regs"
-set binfile ${objdir}/${subdir}/${testfile}
-set srcfile ${testfile}.c
+standard_testfile
set compile_flags {debug nowarnings}
if [get_compiler_info] {
--- a/gdb/testsuite/gdb.arch/powerpc-d128-regs.exp
+++ b/gdb/testsuite/gdb.arch/powerpc-d128-regs.exp
@@ -25,9 +25,7 @@ if ![istarget "powerpc64*-*"] then {
return
}
-set testfile "powerpc-d128-regs"
-set srcfile ${testfile}.c
-set binfile ${objdir}/${subdir}/${testfile}
+standard_testfile
if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable {quiet debug}] != "" } {
untested powerpc-d128-regs.exp
--- a/gdb/testsuite/gdb.arch/ppc-dfp.exp
+++ b/gdb/testsuite/gdb.arch/ppc-dfp.exp
@@ -21,9 +21,7 @@ if ![istarget "powerpc*"] then {
return
}
-set testfile "ppc-dfp"
-set binfile ${objdir}/${subdir}/${testfile}
-set srcfile ${testfile}.c
+standard_testfile
if [get_compiler_info] {
warning "get_compiler failed"
--- a/gdb/testsuite/gdb.arch/ppc-fp.exp
+++ b/gdb/testsuite/gdb.arch/ppc-fp.exp
@@ -21,9 +21,7 @@ if ![istarget "powerpc*"] then {
return
}
-set testfile "ppc-fp"
-set binfile ${objdir}/${subdir}/${testfile}
-set srcfile ${testfile}.c
+standard_testfile
if [get_compiler_info] {
warning "get_compiler failed"
--- a/gdb/testsuite/gdb.arch/vsx-regs.exp
+++ b/gdb/testsuite/gdb.arch/vsx-regs.exp
@@ -24,9 +24,7 @@ if {![istarget "powerpc*"] || [skip_vsx_tests]} then {
return
}
-set testfile "vsx-regs"
-set binfile ${objdir}/${subdir}/${testfile}
-set srcfile ${testfile}.c
+standard_testfile
set compile_flags {debug nowarnings quiet}
if [get_compiler_info] {
http://sourceware.org/ml/gdb-patches/2016-10/msg00258.html
Subject: [testsuite obv] Use standard_output_file
From: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Tue, 11 Oct 2016 16:43:58 +0200
Subject: [PATCH] testsuite: Use standard_output_file
Subject: [PATCH] testsuite: Use standard_output_file
gdb/testsuite/ChangeLog
2016-10-11 Jan Kratochvil <jan.kratochvil@redhat.com>
* gdb.arch/powerpc-prologue.exp: Use standard_output_file.
* gdb.arch/ppc64-symtab-cordic.exp: Likewise.
* gdb.arch/vsx-regs.exp: Likewise.
---
gdb/testsuite/ChangeLog | 6 ++++++
gdb/testsuite/gdb.arch/powerpc-prologue.exp | 2 +-
gdb/testsuite/gdb.arch/ppc64-symtab-cordic.exp | 4 ++--
gdb/testsuite/gdb.arch/vsx-regs.exp | 2 +-
4 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/gdb/testsuite/ChangeLog b/gdb/testsuite/ChangeLog
index 9c7df29..b6ba0ec 100644
### a/gdb/testsuite/ChangeLog
### b/gdb/testsuite/ChangeLog
## -1,3 +1,9 @@
+2016-10-11 Jan Kratochvil <jan.kratochvil@redhat.com>
+
+ * gdb.arch/powerpc-prologue.exp: Use standard_output_file
+ * gdb.arch/ppc64-symtab-cordic.exp: Likewise.
+ * gdb.arch/vsx-regs.exp: Likewise.
+
2016-10-07 Yao Qi <yao.qi@linaro.org>
* gdb.xml/tdesc-regs.exp: Set regdir to "arm/".
diff --git a/gdb/testsuite/gdb.arch/powerpc-prologue.exp b/gdb/testsuite/gdb.arch/powerpc-prologue.exp
index 341ae02..0c74d7e 100644
--- a/gdb/testsuite/gdb.arch/powerpc-prologue.exp
+++ b/gdb/testsuite/gdb.arch/powerpc-prologue.exp
@@ -24,7 +24,7 @@ if {[istarget *-*-aix*] || ![istarget "powerpc-*-*"]} then {
set testfile "powerpc-prologue"
set srcfile ${testfile}.c
-set binfile ${objdir}/${subdir}/${testfile}
+set binfile [standard_output_file ${testfile}]
# Don't use "debug", so that we don't have line information for the assembly
# fragments.
diff --git a/gdb/testsuite/gdb.arch/ppc64-symtab-cordic.exp b/gdb/testsuite/gdb.arch/ppc64-symtab-cordic.exp
index c8cb429..3fdc490 100644
--- a/gdb/testsuite/gdb.arch/ppc64-symtab-cordic.exp
+++ b/gdb/testsuite/gdb.arch/ppc64-symtab-cordic.exp
@@ -21,9 +21,9 @@ if {![istarget "powerpc*"] || ![is_lp64_target]} {
standard_testfile
set kobz2file ${srcdir}/${subdir}/cordic.ko.bz2
-set kofile ${objdir}/${subdir}/cordic.ko
+set kofile [standard_output_file cordic.ko]
set kodebugbz2file ${srcdir}/${subdir}/cordic.ko.debug.bz2
-set kodebugfile ${objdir}/${subdir}/cordic.ko.debug
+set kodebugfile [standard_output_file cordic.ko.debug]
if {[catch "system \"bzip2 -dc ${kobz2file} >${kofile}\""] != 0} {
untested "failed bzip2 for ${kobz2file}"
diff --git a/gdb/testsuite/gdb.arch/vsx-regs.exp b/gdb/testsuite/gdb.arch/vsx-regs.exp
index 307f12a..31e58e6 100644
--- a/gdb/testsuite/gdb.arch/vsx-regs.exp
+++ b/gdb/testsuite/gdb.arch/vsx-regs.exp
@@ -152,7 +152,7 @@ for {set i 0} {$i < 32} {incr i 1} {
# later when loading the core file (i.e., different register values for different
# vector register banks).
-set corefile "${objdir}/${subdir}/vsx-core.test"
+set corefile [standard_output_file vsx-core.test]
set core_supported [gdb_gcore_cmd "$corefile" "Save a VSX-enabled corefile"]
# Now run the F32~F63/VR0~VR31 tests.
--
2.7.4
http://sourceware.org/ml/gdb-patches/2016-10/msg00268.html
Subject: [testsuite obv] Fix gdb.arch/powerpc-prologue.c compilation
From: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Tue, 11 Oct 2016 19:09:05 +0200
Subject: [PATCH] testsuite: Fix gdb.arch/powerpc-prologue.c compilation
Subject: [PATCH] testsuite: Fix gdb.arch/powerpc-prologue.c compilation
gcc-6.2.1
gdb compile failed, gdb/testsuite/gdb.arch/powerpc-prologue.c: In function 'main':
gdb/testsuite/gdb.arch/powerpc-prologue.c:32:3: warning: implicit declaration of function 'optimized_1' [-Wimplicit-function-declaration]
optimized_1 ();
^~~~~~~~~~~
gdb/testsuite/ChangeLog
2016-10-11 Jan Kratochvil <jan.kratochvil@redhat.com>
* gdb.arch/powerpc-prologue.c (optimized_1): New declaration.
---
gdb/testsuite/ChangeLog | 4 ++++
gdb/testsuite/gdb.arch/powerpc-prologue.c | 1 +
2 files changed, 5 insertions(+)
diff --git a/gdb/testsuite/ChangeLog b/gdb/testsuite/ChangeLog
index b6ba0ec..b4ccd4a 100644
### a/gdb/testsuite/ChangeLog
### b/gdb/testsuite/ChangeLog
## -1,5 +1,9 @@
2016-10-11 Jan Kratochvil <jan.kratochvil@redhat.com>
+ * gdb.arch/powerpc-prologue.c (optimized_1): New declaration.
+
+2016-10-11 Jan Kratochvil <jan.kratochvil@redhat.com>
+
* gdb.arch/powerpc-prologue.exp: Use standard_output_file
* gdb.arch/ppc64-symtab-cordic.exp: Likewise.
* gdb.arch/vsx-regs.exp: Likewise.
diff --git a/gdb/testsuite/gdb.arch/powerpc-prologue.c b/gdb/testsuite/gdb.arch/powerpc-prologue.c
index 6c10dfc..a1b8065 100644
--- a/gdb/testsuite/gdb.arch/powerpc-prologue.c
+++ b/gdb/testsuite/gdb.arch/powerpc-prologue.c
@@ -24,6 +24,7 @@
#endif
void gdb2029 (void);
+void optimized_1 (void);
int
main (void)
--
2.7.4

View File

@ -26,7 +26,7 @@ Version: 7.12
# The release always contains a leading reserved number, start it at 1.
# `upstream' is not a part of `name' to stay fully rpm dependencies compatible for the testing.
Release: 22%{?dist}
Release: 23%{?dist}
License: GPLv3+ and GPLv3+ with exceptions and GPLv2+ and GPLv2+ with exceptions and GPL+ and LGPLv2+ and BSD and Public Domain and GFDL
Group: Development/Debuggers
@ -566,6 +566,10 @@ Patch978: gdb-jit-reader-multilib.patch
# Test 'info type-printers' Python error (RH BZ 1350436).
Patch992: gdb-rhbz1350436-type-printers-error.patch
# Fix '[ppc64] and [s390x] wrong prologue skip on -O2 -g code' (Jan
# Kratochvil, RH BZ 1084404).
Patch1026: gdb-rhbz1084404-ppc64-s390x-wrong-prologue-skip-O2-g-3of3.patch
# Never kill PID on: gdb exec PID (Jan Kratochvil, RH BZ 1219747).
Patch1053: gdb-bz1219747-attach-kills.patch
@ -602,6 +606,9 @@ Patch1144: gdb-bison-old.patch
Patch1145: gdb-testsuite-casts.patch
Patch1146: gdb-testsuite-m-static.patch
# [aarch64] Fix gdb.cp/nextoverthrow.exp regression (Yao Qi).
Patch1148: gdb-aarch64-nextoverthrow.patch
%if 0%{!?rhel:1} || 0%{?rhel} > 6
# RL_STATE_FEDORA_GDB would not be found for:
# Patch642: gdb-readline62-ask-more-rh.patch
@ -682,8 +689,17 @@ BuildRequires: gcc-java libgcj%{bits_local} libgcj%{bits_other}
# for gcc-java linkage:
BuildRequires: zlib-devel%{bits_local} zlib-devel%{bits_other}
%endif
# Exception for RHEL<=7
%ifarch aarch64
%if 0%{!?rhel:1} || 0%{?rhel} > 7
BuildRequires: gcc-go
BuildRequires: libgo-devel%{bits_local} libgo-devel%{bits_other}
%endif
%else
%if 0%{!?rhel:1} || 0%{?rhel} > 6
BuildRequires: gcc-go
BuildRequires: libgo-devel%{bits_local} libgo-devel%{bits_other}
%endif
%endif
# archer-sergiodj-stap-patch-split
BuildRequires: systemtap-sdt-devel
@ -733,7 +749,6 @@ BuildRequires: libquadmath%{bits_local} libquadmath%{bits_other}
BuildRequires: libquadmath%{bits_local} libquadmath%{bits_other}
%endif
%endif
BuildRequires: libgo-devel%{bits_local} libgo-devel%{bits_other}
%endif
BuildRequires: glibc-static%{bits_local}
# multilib glibc-static is open Bug 488472:
@ -928,6 +943,7 @@ find -name "*.info*"|xargs rm -f
%patch927 -p1
%patch978 -p1
%patch992 -p1
%patch1026 -p1
%patch1053 -p1
%patch1056 -p1
%patch1073 -p1
@ -953,6 +969,7 @@ done
%patch1144 -p1
%patch1145 -p1
%patch1146 -p1
%patch1148 -p1
%patch1075 -p1
%if 0%{?rhel:1} && 0%{?rhel} <= 7
@ -1510,6 +1527,10 @@ then
fi
%changelog
* Wed Oct 12 2016 Jan Kratochvil <jan.kratochvil@redhat.com> - 7.12-23.fc25
- [testsuite] Various testsuite fixes.
- [aarch64] Fix gdb.cp/nextoverthrow.exp regression (Yao Qi).
* Fri Oct 7 2016 Jan Kratochvil <jan.kratochvil@redhat.com> - 7.12-22.fc25
- Fix .spec build: error: Macro %%buildisa has empty body