188 lines
6.9 KiB
Diff
188 lines
6.9 KiB
Diff
2019-02-23 Jakub Jelinek <jakub@redhat.com>
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PR target/70341
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* config/arm/arm.md (arm_casesi_internal): New define_expand. Rename
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old define_insn to ...
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(*arm_casesi_internal): ... this. Add mode to LABEL_REFs.
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* config/arm/thumb2.md (thumb2_casesi_internal): New define_expand.
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Rename old define_insn to ...
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(*thumb2_casesi_internal): ... this. Add mode to LABEL_REFs.
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(thumb2_casesi_internal_pic): New define_expand. Rename old
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define_insn to ...
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(*thumb2_casesi_internal_pic): ... this. Add mode to LABEL_REFs.
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* config/aarch64/aarch64.md (casesi): Create the casesi_dispatch
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MEM manually here, set MEM_READONLY_P and MEM_NOTRAP_P on it.
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--- gcc/config/arm/arm.md.jj 2019-02-18 20:48:32.643732307 +0100
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+++ gcc/config/arm/arm.md 2019-02-21 14:40:50.603452028 +0100
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@@ -8914,16 +8914,35 @@ (define_expand "casesi"
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;; The USE in this pattern is needed to tell flow analysis that this is
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;; a CASESI insn. It has no other purpose.
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-(define_insn "arm_casesi_internal"
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+(define_expand "arm_casesi_internal"
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+ [(parallel [(set (pc)
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+ (if_then_else
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+ (leu (match_operand:SI 0 "s_register_operand")
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+ (match_operand:SI 1 "arm_rhs_operand"))
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+ (match_dup 4)
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+ (label_ref:SI (match_operand 3 ""))))
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+ (clobber (reg:CC CC_REGNUM))
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+ (use (label_ref:SI (match_operand 2 "")))])]
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+ "TARGET_ARM"
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+{
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+ operands[4] = gen_rtx_MULT (SImode, operands[0], GEN_INT (4));
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+ operands[4] = gen_rtx_PLUS (SImode, operands[4],
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+ gen_rtx_LABEL_REF (SImode, operands[2]));
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+ operands[4] = gen_rtx_MEM (SImode, operands[4]);
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+ MEM_READONLY_P (operands[4]) = 1;
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+ MEM_NOTRAP_P (operands[4]) = 1;
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+})
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+
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+(define_insn "*arm_casesi_internal"
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[(parallel [(set (pc)
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(if_then_else
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(leu (match_operand:SI 0 "s_register_operand" "r")
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(match_operand:SI 1 "arm_rhs_operand" "rI"))
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(mem:SI (plus:SI (mult:SI (match_dup 0) (const_int 4))
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- (label_ref (match_operand 2 "" ""))))
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- (label_ref (match_operand 3 "" ""))))
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+ (label_ref:SI (match_operand 2 "" ""))))
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+ (label_ref:SI (match_operand 3 "" ""))))
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(clobber (reg:CC CC_REGNUM))
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- (use (label_ref (match_dup 2)))])]
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+ (use (label_ref:SI (match_dup 2)))])]
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"TARGET_ARM"
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"*
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if (flag_pic)
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--- gcc/config/arm/thumb2.md.jj 2019-01-01 12:37:28.280792453 +0100
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+++ gcc/config/arm/thumb2.md 2019-02-21 15:00:26.811137210 +0100
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@@ -1079,17 +1079,37 @@ (define_insn "thumb2_zero_extendqisi2_v6
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(set_attr "neg_pool_range" "*,250")]
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)
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-(define_insn "thumb2_casesi_internal"
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+(define_expand "thumb2_casesi_internal"
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+ [(parallel [(set (pc)
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+ (if_then_else
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+ (leu (match_operand:SI 0 "s_register_operand")
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+ (match_operand:SI 1 "arm_rhs_operand"))
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+ (match_dup 4)
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+ (label_ref:SI (match_operand 3 ""))))
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+ (clobber (reg:CC CC_REGNUM))
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+ (clobber (match_scratch:SI 5))
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+ (use (label_ref:SI (match_operand 2 "")))])]
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+ "TARGET_THUMB2 && !flag_pic"
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+{
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+ operands[4] = gen_rtx_MULT (SImode, operands[0], GEN_INT (4));
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+ operands[4] = gen_rtx_PLUS (SImode, operands[4],
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+ gen_rtx_LABEL_REF (SImode, operands[2]));
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+ operands[4] = gen_rtx_MEM (SImode, operands[4]);
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+ MEM_READONLY_P (operands[4]) = 1;
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+ MEM_NOTRAP_P (operands[4]) = 1;
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+})
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+
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+(define_insn "*thumb2_casesi_internal"
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[(parallel [(set (pc)
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(if_then_else
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(leu (match_operand:SI 0 "s_register_operand" "r")
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(match_operand:SI 1 "arm_rhs_operand" "rI"))
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(mem:SI (plus:SI (mult:SI (match_dup 0) (const_int 4))
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- (label_ref (match_operand 2 "" ""))))
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- (label_ref (match_operand 3 "" ""))))
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+ (label_ref:SI (match_operand 2 "" ""))))
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+ (label_ref:SI (match_operand 3 "" ""))))
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(clobber (reg:CC CC_REGNUM))
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(clobber (match_scratch:SI 4 "=&r"))
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- (use (label_ref (match_dup 2)))])]
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+ (use (label_ref:SI (match_dup 2)))])]
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"TARGET_THUMB2 && !flag_pic"
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"* return thumb2_output_casesi(operands);"
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[(set_attr "conds" "clob")
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@@ -1097,18 +1117,39 @@ (define_insn "thumb2_casesi_internal"
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(set_attr "type" "multiple")]
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)
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-(define_insn "thumb2_casesi_internal_pic"
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+(define_expand "thumb2_casesi_internal_pic"
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+ [(parallel [(set (pc)
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+ (if_then_else
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+ (leu (match_operand:SI 0 "s_register_operand")
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+ (match_operand:SI 1 "arm_rhs_operand"))
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+ (match_dup 4)
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+ (label_ref:SI (match_operand 3 ""))))
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+ (clobber (reg:CC CC_REGNUM))
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+ (clobber (match_scratch:SI 5))
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+ (clobber (match_scratch:SI 6))
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+ (use (label_ref:SI (match_operand 2 "")))])]
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+ "TARGET_THUMB2 && flag_pic"
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+{
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+ operands[4] = gen_rtx_MULT (SImode, operands[0], GEN_INT (4));
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+ operands[4] = gen_rtx_PLUS (SImode, operands[4],
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+ gen_rtx_LABEL_REF (SImode, operands[2]));
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+ operands[4] = gen_rtx_MEM (SImode, operands[4]);
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+ MEM_READONLY_P (operands[4]) = 1;
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+ MEM_NOTRAP_P (operands[4]) = 1;
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+})
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+
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+(define_insn "*thumb2_casesi_internal_pic"
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[(parallel [(set (pc)
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(if_then_else
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(leu (match_operand:SI 0 "s_register_operand" "r")
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(match_operand:SI 1 "arm_rhs_operand" "rI"))
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(mem:SI (plus:SI (mult:SI (match_dup 0) (const_int 4))
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- (label_ref (match_operand 2 "" ""))))
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- (label_ref (match_operand 3 "" ""))))
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+ (label_ref:SI (match_operand 2 "" ""))))
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+ (label_ref:SI (match_operand 3 "" ""))))
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(clobber (reg:CC CC_REGNUM))
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(clobber (match_scratch:SI 4 "=&r"))
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(clobber (match_scratch:SI 5 "=r"))
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- (use (label_ref (match_dup 2)))])]
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+ (use (label_ref:SI (match_dup 2)))])]
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"TARGET_THUMB2 && flag_pic"
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"* return thumb2_output_casesi(operands);"
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[(set_attr "conds" "clob")
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--- gcc/config/aarch64/aarch64.md.jj 2019-01-19 09:39:18.847831222 +0100
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+++ gcc/config/aarch64/aarch64.md 2019-02-21 15:25:27.874532191 +0100
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@@ -622,13 +622,27 @@ (define_expand "casesi"
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operands[0], operands[2], operands[4]));
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operands[2] = force_reg (DImode, gen_rtx_LABEL_REF (DImode, operands[3]));
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- emit_jump_insn (gen_casesi_dispatch (operands[2], operands[0],
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- operands[3]));
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+ operands[2]
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+ = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, operands[2], operands[0]),
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+ UNSPEC_CASESI);
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+ operands[2] = gen_rtx_MEM (DImode, operands[2]);
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+ MEM_READONLY_P (operands[2]) = 1;
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+ MEM_NOTRAP_P (operands[2]) = 1;
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+ emit_jump_insn (gen_casesi_dispatch (operands[2], operands[3]));
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DONE;
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}
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)
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-(define_insn "casesi_dispatch"
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+(define_expand "casesi_dispatch"
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+ [(parallel
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+ [(set (pc) (match_operand:DI 0 ""))
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+ (clobber (reg:CC CC_REGNUM))
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+ (clobber (match_scratch:DI 2))
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+ (clobber (match_scratch:DI 3))
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+ (use (label_ref:DI (match_operand 1 "")))])]
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+ "")
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+
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+(define_insn "*casesi_dispatch"
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[(parallel
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[(set (pc)
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(mem:DI (unspec [(match_operand:DI 0 "register_operand" "r")
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@@ -637,7 +651,7 @@ (define_insn "casesi_dispatch"
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(clobber (reg:CC CC_REGNUM))
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(clobber (match_scratch:DI 3 "=r"))
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(clobber (match_scratch:DI 4 "=r"))
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- (use (label_ref (match_operand 2 "" "")))])]
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+ (use (label_ref:DI (match_operand 2 "" "")))])]
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""
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"*
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return aarch64_output_casesi (operands);
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