40 lines
1.8 KiB
Diff
40 lines
1.8 KiB
Diff
2019-02-18 Jakub Jelinek <jakub@redhat.com>
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PR bootstrap/88714
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* constraints.md (q): Remove.
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* config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use rk constraint
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instead of q.
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--- gcc/config/arm/constraints.md.jj 2019-01-01 12:37:27.032812929 +0100
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+++ gcc/config/arm/constraints.md 2019-02-18 20:18:51.816941795 +0100
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@@ -90,9 +90,6 @@ (define_constraint "PJ"
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(define_register_constraint "k" "STACK_REG"
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"@internal The stack register.")
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-(define_register_constraint "q" "(TARGET_ARM && TARGET_LDRD) ? CORE_REGS : GENERAL_REGS"
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- "@internal In ARM state with LDRD support, core registers, otherwise general registers.")
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-
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(define_register_constraint "b" "TARGET_THUMB ? BASE_REGS : NO_REGS"
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"@internal
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Thumb only. The union of the low registers and the stack register.")
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--- gcc/config/arm/ldrdstrd.md.jj 2019-02-18 20:19:34.976233961 +0100
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+++ gcc/config/arm/ldrdstrd.md 2019-02-18 20:19:54.555912842 +0100
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@@ -159,7 +159,7 @@ (define_peephole2 ; swap the destination
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(define_insn "*arm_ldrd"
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[(parallel [(set (match_operand:SI 0 "s_register_operand" "=r")
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(match_operand:SI 2 "memory_operand" "m"))
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- (set (match_operand:SI 1 "s_register_operand" "=q")
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+ (set (match_operand:SI 1 "s_register_operand" "=rk")
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(match_operand:SI 3 "memory_operand" "m"))])]
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"TARGET_LDRD && TARGET_ARM && reload_completed
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&& valid_operands_ldrd_strd (operands, true)"
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@@ -180,7 +180,7 @@ (define_insn "*arm_strd"
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[(parallel [(set (match_operand:SI 2 "memory_operand" "=m")
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(match_operand:SI 0 "s_register_operand" "r"))
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(set (match_operand:SI 3 "memory_operand" "=m")
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- (match_operand:SI 1 "s_register_operand" "q"))])]
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+ (match_operand:SI 1 "s_register_operand" "rk"))])]
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"TARGET_LDRD && TARGET_ARM && reload_completed
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&& valid_operands_ldrd_strd (operands, false)"
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{
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