77 lines
2.3 KiB
Diff
77 lines
2.3 KiB
Diff
2018-03-12 Jakub Jelinek <jakub@redhat.com>
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PR target/84786
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* config/i386/sse.md (sse2_loadhpd): Use Yv constraint rather than v
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on the last operand.
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* gcc.target/i386/avx512f-pr84786-1.c: New test.
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* gcc.target/i386/avx512f-pr84786-2.c: New test.
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--- gcc/config/i386/sse.md.jj 2018-03-05 17:00:24.568655800 +0100
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+++ gcc/config/i386/sse.md 2018-03-12 11:05:48.917401886 +0100
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@@ -9022,14 +9022,14 @@ (define_expand "sse2_loadhpd_exp"
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;; see comment above inline_secondary_memory_needed function in i386.c
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(define_insn "sse2_loadhpd"
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[(set (match_operand:V2DF 0 "nonimmediate_operand"
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- "=x,v,x,v,o,o ,o")
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+ "=x,v,x,v ,o,o ,o")
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(vec_concat:V2DF
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(vec_select:DF
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(match_operand:V2DF 1 "nonimmediate_operand"
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- " 0,v,0,v,0,0 ,0")
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+ " 0,v,0,v ,0,0 ,0")
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(parallel [(const_int 0)]))
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(match_operand:DF 2 "nonimmediate_operand"
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- " m,m,x,v,x,*f,r")))]
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+ " m,m,x,Yv,x,*f,r")))]
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"TARGET_SSE2 && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
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"@
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movhpd\t{%2, %0|%0, %2}
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--- gcc/testsuite/gcc.target/i386/avx512f-pr84786-1.c.jj 2018-03-12 11:32:33.563665173 +0100
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+++ gcc/testsuite/gcc.target/i386/avx512f-pr84786-1.c 2018-03-12 11:35:33.964695384 +0100
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@@ -0,0 +1,25 @@
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+/* PR target/84786 */
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+/* { dg-do run { target { ! ia32 } } } */
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+/* { dg-options "-mavx512f -mno-avx512vl -O2" } */
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+/* { dg-require-effective-target avx512f } */
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+
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+#include "avx512f-check.h"
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+
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+typedef double V __attribute__((vector_size (16)));
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+
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+__attribute__((noipa)) V
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+foo (V x, double y)
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+{
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+ register double z __asm ("xmm18");
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+ asm volatile ("" : "=v" (z) : "0" (y));
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+ x[1] = z;
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+ return x;
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+}
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+
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+static void
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+avx512f_test (void)
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+{
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+ V a = foo ((V) { 1.0, 2.0 }, 3.0);
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+ if (a[0] != 1.0 || a[1] != 3.0)
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+ abort ();
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+}
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--- gcc/testsuite/gcc.target/i386/avx512f-pr84786-2.c.jj 2018-03-12 11:32:43.445666826 +0100
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+++ gcc/testsuite/gcc.target/i386/avx512f-pr84786-2.c 2018-03-12 11:35:45.260697279 +0100
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@@ -0,0 +1,16 @@
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+/* PR target/84786 */
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+/* { dg-do compile { target { ! ia32 } } } */
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+/* { dg-options "-mavx512f -mno-avx512vl -O2" } */
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+
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+typedef double V __attribute__((vector_size (16)));
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+
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+__attribute__((noipa)) V
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+foo (V x, double y)
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+{
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+ register double z __asm ("xmm18");
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+ asm volatile ("" : "=v" (z) : "0" (y));
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+ x[1] = z;
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+ return x;
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+}
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+
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+/* { dg-final { scan-assembler-not "vunpcklpd\[\^\n\r]*xmm(1\[6-9]|\[23]\[0-9])" } } */
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