79 lines
2.8 KiB
Diff
79 lines
2.8 KiB
Diff
2020-03-26 Jakub Jelinek <jakub@redhat.com>
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PR target/94343
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* config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
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!TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
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operand is a register. Don't enable masked variants for V*[QH]Imode.
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* gcc.target/i386/avx512f-pr94343.c: New test.
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* gcc.target/i386/avx512vl-pr94343.c: New test.
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--- gcc/config/i386/sse.md.jj 2020-03-06 11:35:46.284074858 +0100
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+++ gcc/config/i386/sse.md 2020-03-26 18:49:39.644131577 +0100
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@@ -12796,14 +12796,29 @@ (define_expand "one_cmpl<mode>2"
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})
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(define_insn "<mask_codefor>one_cmpl<mode>2<mask_name>"
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- [(set (match_operand:VI 0 "register_operand" "=v")
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- (xor:VI (match_operand:VI 1 "nonimmediate_operand" "vm")
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- (match_operand:VI 2 "vector_all_ones_operand" "BC")))]
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- "TARGET_AVX512F"
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- "vpternlog<ternlogsuffix>\t{$0x55, %1, %0, %0<mask_operand3>|%0<mask_operand3>, %0, %1, 0x55}"
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+ [(set (match_operand:VI 0 "register_operand" "=v,v")
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+ (xor:VI (match_operand:VI 1 "nonimmediate_operand" "v,m")
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+ (match_operand:VI 2 "vector_all_ones_operand" "BC,BC")))]
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+ "TARGET_AVX512F
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+ && (!<mask_applied>
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+ || <ssescalarmode>mode == SImode
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+ || <ssescalarmode>mode == DImode)"
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+{
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+ if (TARGET_AVX512VL)
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+ return "vpternlog<ternlogsuffix>\t{$0x55, %1, %0, %0<mask_operand3>|%0<mask_operand3>, %0, %1, 0x55}";
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+ else
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+ return "vpternlog<ternlogsuffix>\t{$0x55, %g1, %g0, %g0<mask_operand3>|%g0<mask_operand3>, %g0, %g1, 0x55}";
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+}
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[(set_attr "type" "sselog")
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(set_attr "prefix" "evex")
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- (set_attr "mode" "<sseinsnmode>")])
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+ (set (attr "mode")
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+ (if_then_else (match_test "TARGET_AVX512VL")
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+ (const_string "<sseinsnmode>")
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+ (const_string "XI")))
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+ (set (attr "enabled")
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+ (if_then_else (eq_attr "alternative" "1")
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+ (symbol_ref "<MODE_SIZE> == 64 || TARGET_AVX512VL")
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+ (const_int 1)))])
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(define_expand "<sse2_avx2>_andnot<mode>3"
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[(set (match_operand:VI_AVX2 0 "register_operand")
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--- gcc/testsuite/gcc.target/i386/avx512f-pr94343.c.jj 2020-03-26 17:47:40.008654504 +0100
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+++ gcc/testsuite/gcc.target/i386/avx512f-pr94343.c 2020-03-26 17:48:37.169811375 +0100
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@@ -0,0 +1,12 @@
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+/* PR target/94343 */
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+/* { dg-do compile } */
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+/* { dg-options "-O2 -mavx512f -mno-avx512vl" } */
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+/* { dg-final { scan-assembler-not "vpternlogd\[^\n\r]*xmm\[0-9]*" } } */
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+
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+typedef int __v4si __attribute__((vector_size (16)));
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+
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+__v4si
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+foo (__v4si a)
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+{
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+ return ~a;
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+}
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--- gcc/testsuite/gcc.target/i386/avx512vl-pr94343.c.jj 2020-03-26 17:48:53.232573115 +0100
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+++ gcc/testsuite/gcc.target/i386/avx512vl-pr94343.c 2020-03-26 17:49:08.034352968 +0100
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@@ -0,0 +1,12 @@
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+/* PR target/94343 */
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+/* { dg-do compile } */
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+/* { dg-options "-O2 -mavx512vl" } */
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+/* { dg-final { scan-assembler "vpternlogd\[^\n\r]*xmm\[0-9]*" } } */
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+
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+typedef int __v4si __attribute__((vector_size (16)));
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+
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+__v4si
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+foo (__v4si a)
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+{
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+ return ~a;
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+}
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