104 lines
3.5 KiB
Diff
104 lines
3.5 KiB
Diff
From b81d476756a1f17617f0837761785c4b5d1d195d Mon Sep 17 00:00:00 2001
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From: Dimitar Dimitrov <dimitar@dinux.eu>
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Date: Mon, 5 Jun 2023 21:39:16 +0300
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Subject: [PATCH] riscv: Fix scope for memory model calculation
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During libgcc configure stage for riscv32-none-elf, when
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"--enable-checking=yes,rtl" has been activated, the following error
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is observed:
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during RTL pass: final
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conftest.c: In function 'main':
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conftest.c:16:1: internal compiler error: RTL check: expected code 'const_int', have 'reg' in riscv_print_operand, at config/riscv/riscv.cc:4462
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16 | }
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| ^
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0x843c4d rtl_check_failed_code1(rtx_def const*, rtx_code, char const*, int, char const*)
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/mnt/nvme/dinux/local-workspace/gcc/gcc/rtl.cc:916
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0x8ea823 riscv_print_operand
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/mnt/nvme/dinux/local-workspace/gcc/gcc/config/riscv/riscv.cc:4462
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0xde84b5 output_operand(rtx_def*, int)
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/mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:3632
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0xde8ef8 output_asm_insn(char const*, rtx_def**)
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/mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:3544
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0xded33b output_asm_insn(char const*, rtx_def**)
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/mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:3421
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0xded33b final_scan_insn_1
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/mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:2841
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0xded6cb final_scan_insn(rtx_insn*, _IO_FILE*, int, int, int*)
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/mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:2887
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0xded8b7 final_1
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/mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:1979
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0xdee518 rest_of_handle_final
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/mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:4240
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0xdee518 execute
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/mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:4318
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Fix by moving the calculation of memmodel to the cases where it is used.
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Regression tested for riscv32-none-elf. No changes in gcc.sum and
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g++.sum.
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PR target/109725
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gcc/ChangeLog:
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* config/riscv/riscv.cc (riscv_print_operand): Calculate
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memmodel only when it is valid.
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Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
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---
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gcc/config/riscv/riscv.cc | 13 +++++++++----
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1 file changed, 9 insertions(+), 4 deletions(-)
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diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
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index 59899268918d..01eebc83cc58 100644
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--- a/gcc/config/riscv/riscv.cc
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+++ b/gcc/config/riscv/riscv.cc
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@@ -4391,7 +4391,6 @@ riscv_print_operand (FILE *file, rtx op, int letter)
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}
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machine_mode mode = GET_MODE (op);
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enum rtx_code code = GET_CODE (op);
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- const enum memmodel model = memmodel_base (INTVAL (op));
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switch (letter)
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{
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@@ -4528,7 +4527,8 @@ riscv_print_operand (FILE *file, rtx op, int letter)
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fputs (GET_RTX_NAME (code), file);
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break;
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- case 'A':
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+ case 'A': {
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+ const enum memmodel model = memmodel_base (INTVAL (op));
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if (riscv_memmodel_needs_amo_acquire (model)
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&& riscv_memmodel_needs_amo_release (model))
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fputs (".aqrl", file);
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@@ -4537,18 +4537,23 @@ riscv_print_operand (FILE *file, rtx op, int letter)
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else if (riscv_memmodel_needs_amo_release (model))
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fputs (".rl", file);
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break;
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+ }
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- case 'I':
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+ case 'I': {
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+ const enum memmodel model = memmodel_base (INTVAL (op));
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if (model == MEMMODEL_SEQ_CST)
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fputs (".aqrl", file);
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else if (riscv_memmodel_needs_amo_acquire (model))
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fputs (".aq", file);
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break;
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+ }
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- case 'J':
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+ case 'J': {
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+ const enum memmodel model = memmodel_base (INTVAL (op));
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if (riscv_memmodel_needs_amo_release (model))
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fputs (".rl", file);
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break;
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+ }
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case 'i':
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if (code != REG)
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--
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2.39.3
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