633 lines
24 KiB
Diff
633 lines
24 KiB
Diff
From 444d909b323d94639e60aab6c4089ff839c0f0e9 Mon Sep 17 00:00:00 2001
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From: Patrick O'Neill <patrick@rivosinc.com>
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Date: Fri, 7 Apr 2023 13:13:21 -0700
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Subject: [PATCH] RISC-V: Table A.6 conformance tests
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These tests cover basic cases to ensure the atomic mappings follow the
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strengthened Table A.6 mappings that are compatible with Table A.7.
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2023-04-27 Patrick O'Neill <patrick@rivosinc.com>
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gcc/testsuite/ChangeLog:
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* gcc.target/riscv/amo-table-a-6-amo-add-1.c: New test.
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* gcc.target/riscv/amo-table-a-6-amo-add-2.c: New test.
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* gcc.target/riscv/amo-table-a-6-amo-add-3.c: New test.
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* gcc.target/riscv/amo-table-a-6-amo-add-4.c: New test.
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* gcc.target/riscv/amo-table-a-6-amo-add-5.c: New test.
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* gcc.target/riscv/amo-table-a-6-compare-exchange-1.c: New test.
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* gcc.target/riscv/amo-table-a-6-compare-exchange-2.c: New test.
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* gcc.target/riscv/amo-table-a-6-compare-exchange-3.c: New test.
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* gcc.target/riscv/amo-table-a-6-compare-exchange-4.c: New test.
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* gcc.target/riscv/amo-table-a-6-compare-exchange-5.c: New test.
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* gcc.target/riscv/amo-table-a-6-compare-exchange-6.c: New test.
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* gcc.target/riscv/amo-table-a-6-compare-exchange-7.c: New test.
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* gcc.target/riscv/amo-table-a-6-fence-1.c: New test.
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* gcc.target/riscv/amo-table-a-6-fence-2.c: New test.
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* gcc.target/riscv/amo-table-a-6-fence-3.c: New test.
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* gcc.target/riscv/amo-table-a-6-fence-4.c: New test.
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* gcc.target/riscv/amo-table-a-6-fence-5.c: New test.
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* gcc.target/riscv/amo-table-a-6-load-1.c: New test.
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* gcc.target/riscv/amo-table-a-6-load-2.c: New test.
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* gcc.target/riscv/amo-table-a-6-load-3.c: New test.
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* gcc.target/riscv/amo-table-a-6-store-1.c: New test.
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* gcc.target/riscv/amo-table-a-6-store-2.c: New test.
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* gcc.target/riscv/amo-table-a-6-store-compat-3.c: New test.
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* gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c: New test.
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* gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c: New test.
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* gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c: New test.
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* gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c: New test.
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* gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c: New test.
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Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
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---
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.../gcc.target/riscv/amo-table-a-6-amo-add-1.c | 15 +++++++++++++++
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.../gcc.target/riscv/amo-table-a-6-amo-add-2.c | 15 +++++++++++++++
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.../gcc.target/riscv/amo-table-a-6-amo-add-3.c | 15 +++++++++++++++
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.../gcc.target/riscv/amo-table-a-6-amo-add-4.c | 15 +++++++++++++++
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.../gcc.target/riscv/amo-table-a-6-amo-add-5.c | 15 +++++++++++++++
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.../riscv/amo-table-a-6-compare-exchange-1.c | 9 +++++++++
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.../riscv/amo-table-a-6-compare-exchange-2.c | 9 +++++++++
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.../riscv/amo-table-a-6-compare-exchange-3.c | 9 +++++++++
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.../riscv/amo-table-a-6-compare-exchange-4.c | 9 +++++++++
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.../riscv/amo-table-a-6-compare-exchange-5.c | 9 +++++++++
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.../riscv/amo-table-a-6-compare-exchange-6.c | 10 ++++++++++
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.../riscv/amo-table-a-6-compare-exchange-7.c | 9 +++++++++
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.../gcc.target/riscv/amo-table-a-6-fence-1.c | 14 ++++++++++++++
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.../gcc.target/riscv/amo-table-a-6-fence-2.c | 15 +++++++++++++++
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.../gcc.target/riscv/amo-table-a-6-fence-3.c | 15 +++++++++++++++
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.../gcc.target/riscv/amo-table-a-6-fence-4.c | 15 +++++++++++++++
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.../gcc.target/riscv/amo-table-a-6-fence-5.c | 15 +++++++++++++++
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.../gcc.target/riscv/amo-table-a-6-load-1.c | 16 ++++++++++++++++
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.../gcc.target/riscv/amo-table-a-6-load-2.c | 17 +++++++++++++++++
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.../gcc.target/riscv/amo-table-a-6-load-3.c | 18 ++++++++++++++++++
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.../gcc.target/riscv/amo-table-a-6-store-1.c | 16 ++++++++++++++++
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.../gcc.target/riscv/amo-table-a-6-store-2.c | 17 +++++++++++++++++
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.../riscv/amo-table-a-6-store-compat-3.c | 18 ++++++++++++++++++
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.../riscv/amo-table-a-6-subword-amo-add-1.c | 9 +++++++++
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.../riscv/amo-table-a-6-subword-amo-add-2.c | 9 +++++++++
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.../riscv/amo-table-a-6-subword-amo-add-3.c | 9 +++++++++
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.../riscv/amo-table-a-6-subword-amo-add-4.c | 9 +++++++++
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.../riscv/amo-table-a-6-subword-amo-add-5.c | 9 +++++++++
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28 files changed, 360 insertions(+)
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-1.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-2.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-3.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-4.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-5.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-1.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-2.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-3.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-4.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-5.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-6.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-7.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-1.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-2.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-3.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-4.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-5.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-1.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-2.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-3.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-1.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-2.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-compat-3.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c
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create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c
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diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-1.c
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new file mode 100644
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index 000000000000..071a33928fe9
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-1.c
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@@ -0,0 +1,15 @@
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+/* { dg-do compile } */
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+/* Verify that atomic op mappings match Table A.6's recommended mapping. */
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+/* { dg-options "-O3" } */
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+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
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+/* { dg-final { check-function-bodies "**" "" } } */
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+
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+/*
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+** foo:
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+** amoadd\.w\tzero,a1,0\(a0\)
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+** ret
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+*/
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+void foo (int* bar, int* baz)
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+{
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+ __atomic_add_fetch(bar, baz, __ATOMIC_RELAXED);
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+}
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diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-2.c
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new file mode 100644
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index 000000000000..d6b2d91db2ab
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-2.c
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@@ -0,0 +1,15 @@
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+/* { dg-do compile } */
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+/* Verify that atomic op mappings match Table A.6's recommended mapping. */
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+/* { dg-options "-O3" } */
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+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
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+/* { dg-final { check-function-bodies "**" "" } } */
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+
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+/*
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+** foo:
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+** amoadd\.w\.aq\tzero,a1,0\(a0\)
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+** ret
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+*/
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+void foo (int* bar, int* baz)
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+{
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+ __atomic_add_fetch(bar, baz, __ATOMIC_ACQUIRE);
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+}
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diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-3.c
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new file mode 100644
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index 000000000000..68a69ed8b780
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-3.c
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@@ -0,0 +1,15 @@
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+/* { dg-do compile } */
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+/* Verify that atomic op mappings match Table A.6's recommended mapping. */
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+/* { dg-options "-O3" } */
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+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
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+/* { dg-final { check-function-bodies "**" "" } } */
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+
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+/*
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+** foo:
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+** amoadd\.w\.rl\tzero,a1,0\(a0\)
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+** ret
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+*/
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+void foo (int* bar, int* baz)
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+{
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+ __atomic_add_fetch(bar, baz, __ATOMIC_RELEASE);
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+}
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diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-4.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-4.c
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new file mode 100644
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index 000000000000..b5cac4c47970
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-4.c
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@@ -0,0 +1,15 @@
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+/* { dg-do compile } */
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+/* Verify that atomic op mappings match Table A.6's recommended mapping. */
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+/* { dg-options "-O3" } */
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+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
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+/* { dg-final { check-function-bodies "**" "" } } */
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+
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+/*
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+** foo:
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+** amoadd\.w\.aqrl\tzero,a1,0\(a0\)
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+** ret
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+*/
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+void foo (int* bar, int* baz)
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+{
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+ __atomic_add_fetch(bar, baz, __ATOMIC_ACQ_REL);
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+}
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diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-5.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-5.c
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new file mode 100644
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index 000000000000..268e58cb95f0
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-5.c
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@@ -0,0 +1,15 @@
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+/* { dg-do compile } */
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+/* Verify that atomic op mappings match Table A.6's recommended mapping. */
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+/* { dg-options "-O3" } */
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+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
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+/* { dg-final { check-function-bodies "**" "" } } */
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+
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+/*
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+** foo:
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+** amoadd\.w\.aqrl\tzero,a1,0\(a0\)
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+** ret
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+*/
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+void foo (int* bar, int* baz)
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+{
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+ __atomic_add_fetch(bar, baz, __ATOMIC_SEQ_CST);
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+}
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diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-1.c
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new file mode 100644
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index 000000000000..8349e7a69ac2
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-1.c
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@@ -0,0 +1,9 @@
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+/* { dg-do compile } */
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+/* Verify that compare exchange mappings match Table A.6's recommended mapping. */
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+/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
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+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
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+
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+void foo (int bar, int baz, int qux)
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+{
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+ __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_RELAXED, __ATOMIC_RELAXED);
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+}
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diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-2.c
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new file mode 100644
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index 000000000000..bf30b298b4b5
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-2.c
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@@ -0,0 +1,9 @@
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+/* { dg-do compile } */
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+/* Verify that compare exchange mappings match Table A.6's recommended mapping. */
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+/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
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+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
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+
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+void foo (int bar, int baz, int qux)
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+{
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+ __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_CONSUME, __ATOMIC_CONSUME);
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+}
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diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-3.c
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new file mode 100644
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index 000000000000..41444ec95e90
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-3.c
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@@ -0,0 +1,9 @@
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+/* { dg-do compile } */
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+/* Verify that compare exchange mappings match Table A.6's recommended mapping. */
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+/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
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+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
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+
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+void foo (int bar, int baz, int qux)
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+{
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+ __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_ACQUIRE, __ATOMIC_ACQUIRE);
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+}
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diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-4.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-4.c
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new file mode 100644
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index 000000000000..dc2d7bd300d3
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-4.c
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@@ -0,0 +1,9 @@
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+/* { dg-do compile } */
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+/* Verify that compare exchange mappings match Table A.6's recommended mapping. */
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+/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
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+/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
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+
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+void foo (int bar, int baz, int qux)
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+{
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+ __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
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+}
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diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-5.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-5.c
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new file mode 100644
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index 000000000000..53246210900c
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-5.c
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@@ -0,0 +1,9 @@
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+/* { dg-do compile } */
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+/* Verify that compare exchange mappings match Table A.6's recommended mapping. */
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+/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
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+/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
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+
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+void foo (int bar, int baz, int qux)
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+{
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+ __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST);
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+}
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diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-6.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-6.c
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new file mode 100644
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index 000000000000..1376ac2a95bb
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-6.c
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@@ -0,0 +1,10 @@
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+/* { dg-do compile } */
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+/* Verify that compare exchange mappings match Table A.6's recommended mapping. */
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+/* Mixed mappings need to be unioned. */
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+/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
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+/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
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+
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+void foo (int bar, int baz, int qux)
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+{
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+ __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_RELEASE, __ATOMIC_ACQUIRE);
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+}
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diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-7.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-7.c
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new file mode 100644
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index 000000000000..98083cbae083
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--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-7.c
|
|
@@ -0,0 +1,9 @@
|
|
+/* { dg-do compile } */
|
|
+/* Verify that compare exchange mappings match Table A.6's recommended mapping. */
|
|
+/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
|
|
+/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
|
|
+
|
|
+void foo (int bar, int baz, int qux)
|
|
+{
|
|
+ __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_SEQ_CST, __ATOMIC_RELAXED);
|
|
+}
|
|
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-1.c
|
|
new file mode 100644
|
|
index 000000000000..bf590489c398
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-1.c
|
|
@@ -0,0 +1,14 @@
|
|
+/* { dg-do compile } */
|
|
+/* Verify that fence mappings match Table A.6's recommended mapping. */
|
|
+/* { dg-options "-O3" } */
|
|
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
|
|
+/* { dg-final { check-function-bodies "**" "" } } */
|
|
+
|
|
+/*
|
|
+** foo:
|
|
+** ret
|
|
+*/
|
|
+void foo()
|
|
+{
|
|
+ __atomic_thread_fence(__ATOMIC_RELAXED);
|
|
+}
|
|
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-2.c
|
|
new file mode 100644
|
|
index 000000000000..9848f8cae31a
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-2.c
|
|
@@ -0,0 +1,15 @@
|
|
+/* { dg-do compile } */
|
|
+/* Verify that fence mappings match Table A.6's recommended mapping. */
|
|
+/* { dg-options "-O3" } */
|
|
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
|
|
+/* { dg-final { check-function-bodies "**" "" } } */
|
|
+
|
|
+/*
|
|
+** foo:
|
|
+** fence\tr,rw
|
|
+** ret
|
|
+*/
|
|
+void foo()
|
|
+{
|
|
+ __atomic_thread_fence(__ATOMIC_ACQUIRE);
|
|
+}
|
|
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-3.c
|
|
new file mode 100644
|
|
index 000000000000..3c3ce6e0d182
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-3.c
|
|
@@ -0,0 +1,15 @@
|
|
+/* { dg-do compile } */
|
|
+/* Verify that fence mappings match Table A.6's recommended mapping. */
|
|
+/* { dg-options "-O3" } */
|
|
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
|
|
+/* { dg-final { check-function-bodies "**" "" } } */
|
|
+
|
|
+/*
|
|
+** foo:
|
|
+** fence\trw,w
|
|
+** ret
|
|
+*/
|
|
+void foo()
|
|
+{
|
|
+ __atomic_thread_fence(__ATOMIC_RELEASE);
|
|
+}
|
|
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-4.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-4.c
|
|
new file mode 100644
|
|
index 000000000000..12d717170858
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-4.c
|
|
@@ -0,0 +1,15 @@
|
|
+/* { dg-do compile } */
|
|
+/* Verify that fence mappings match Table A.6's recommended mapping. */
|
|
+/* { dg-options "-O3" } */
|
|
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
|
|
+/* { dg-final { check-function-bodies "**" "" } } */
|
|
+
|
|
+/*
|
|
+** foo:
|
|
+** fence\.tso
|
|
+** ret
|
|
+*/
|
|
+void foo()
|
|
+{
|
|
+ __atomic_thread_fence(__ATOMIC_ACQ_REL);
|
|
+}
|
|
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-5.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-5.c
|
|
new file mode 100644
|
|
index 000000000000..9567b604c2c9
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-5.c
|
|
@@ -0,0 +1,15 @@
|
|
+/* { dg-do compile } */
|
|
+/* Verify that fence mappings match Table A.6's recommended mapping. */
|
|
+/* { dg-options "-O3" } */
|
|
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
|
|
+/* { dg-final { check-function-bodies "**" "" } } */
|
|
+
|
|
+/*
|
|
+** foo:
|
|
+** fence\trw,rw
|
|
+** ret
|
|
+*/
|
|
+void foo()
|
|
+{
|
|
+ __atomic_thread_fence(__ATOMIC_SEQ_CST);
|
|
+}
|
|
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-1.c
|
|
new file mode 100644
|
|
index 000000000000..3c79035e46d6
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-1.c
|
|
@@ -0,0 +1,16 @@
|
|
+/* { dg-do compile } */
|
|
+/* Verify that load mappings match Table A.6's recommended mapping. */
|
|
+/* { dg-options "-O3" } */
|
|
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
|
|
+/* { dg-final { check-function-bodies "**" "" } } */
|
|
+
|
|
+/*
|
|
+** foo:
|
|
+** lw\ta[0-9]+,0\(a0\)
|
|
+** sw\ta[0-9]+,0\(a1\)
|
|
+** ret
|
|
+*/
|
|
+void foo (int* bar, int* baz)
|
|
+{
|
|
+ __atomic_load(bar, baz, __ATOMIC_RELAXED);
|
|
+}
|
|
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-2.c
|
|
new file mode 100644
|
|
index 000000000000..7d74841846fa
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-2.c
|
|
@@ -0,0 +1,17 @@
|
|
+/* { dg-do compile } */
|
|
+/* Verify that load mappings match Table A.6's recommended mapping. */
|
|
+/* { dg-options "-O3" } */
|
|
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
|
|
+/* { dg-final { check-function-bodies "**" "" } } */
|
|
+
|
|
+/*
|
|
+** foo:
|
|
+** lw\ta[0-9]+,0\(a0\)
|
|
+** fence\tr,rw
|
|
+** sw\ta[0-9]+,0\(a1\)
|
|
+** ret
|
|
+*/
|
|
+void foo (int* bar, int* baz)
|
|
+{
|
|
+ __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
|
|
+}
|
|
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-3.c
|
|
new file mode 100644
|
|
index 000000000000..ab95fa660d25
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-3.c
|
|
@@ -0,0 +1,18 @@
|
|
+/* { dg-do compile } */
|
|
+/* Verify that load mappings match Table A.6's recommended mapping. */
|
|
+/* { dg-options "-O3" } */
|
|
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
|
|
+/* { dg-final { check-function-bodies "**" "" } } */
|
|
+
|
|
+/*
|
|
+** foo:
|
|
+** fence\trw,rw
|
|
+** lw\ta[0-9]+,0\(a0\)
|
|
+** fence\tr,rw
|
|
+** sw\ta[0-9]+,0\(a1\)
|
|
+** ret
|
|
+*/
|
|
+void foo (int* bar, int* baz)
|
|
+{
|
|
+ __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
|
|
+}
|
|
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-1.c
|
|
new file mode 100644
|
|
index 000000000000..d852fddf03de
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-1.c
|
|
@@ -0,0 +1,16 @@
|
|
+/* { dg-do compile } */
|
|
+/* Verify that store mappings match Table A.6's recommended mapping. */
|
|
+/* { dg-options "-O3" } */
|
|
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
|
|
+/* { dg-final { check-function-bodies "**" "" } } */
|
|
+
|
|
+/*
|
|
+** foo:
|
|
+** lw\ta[0-9]+,0\(a1\)
|
|
+** sw\ta[0-9]+,0\(a0\)
|
|
+** ret
|
|
+*/
|
|
+void foo (int* bar, int* baz)
|
|
+{
|
|
+ __atomic_store(bar, baz, __ATOMIC_RELAXED);
|
|
+}
|
|
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-2.c
|
|
new file mode 100644
|
|
index 000000000000..ccb5e2af7cc1
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-2.c
|
|
@@ -0,0 +1,17 @@
|
|
+/* { dg-do compile } */
|
|
+/* Verify that store mappings match Table A.6's recommended mapping. */
|
|
+/* { dg-options "-O3" } */
|
|
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
|
|
+/* { dg-final { check-function-bodies "**" "" } } */
|
|
+
|
|
+/*
|
|
+** foo:
|
|
+** lw\ta[0-9]+,0\(a1\)
|
|
+** fence\trw,w
|
|
+** sw\ta[0-9]+,0\(a0\)
|
|
+** ret
|
|
+*/
|
|
+void foo (int* bar, int* baz)
|
|
+{
|
|
+ __atomic_store(bar, baz, __ATOMIC_RELEASE);
|
|
+}
|
|
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-compat-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-compat-3.c
|
|
new file mode 100644
|
|
index 000000000000..761889f18cf9
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-compat-3.c
|
|
@@ -0,0 +1,18 @@
|
|
+/* { dg-do compile } */
|
|
+/* Verify that store mapping are compatible with Table A.6 & A.7. */
|
|
+/* { dg-options "-O3" } */
|
|
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
|
|
+/* { dg-final { check-function-bodies "**" "" } } */
|
|
+
|
|
+/*
|
|
+** foo:
|
|
+** lw\ta[0-9]+,0\(a1\)
|
|
+** fence\trw,w
|
|
+** sw\ta[0-9]+,0\(a0\)
|
|
+** fence\trw,rw
|
|
+** ret
|
|
+*/
|
|
+void foo (int* bar, int* baz)
|
|
+{
|
|
+ __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
|
|
+}
|
|
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c
|
|
new file mode 100644
|
|
index 000000000000..d7d887dd1814
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c
|
|
@@ -0,0 +1,9 @@
|
|
+/* { dg-do compile } */
|
|
+/* Verify that subword atomic op mappings match Table A.6's recommended mapping. */
|
|
+/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
|
|
+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
|
|
+
|
|
+void foo (short* bar, short* baz)
|
|
+{
|
|
+ __atomic_add_fetch(bar, baz, __ATOMIC_RELAXED);
|
|
+}
|
|
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c
|
|
new file mode 100644
|
|
index 000000000000..897bad26ebdf
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c
|
|
@@ -0,0 +1,9 @@
|
|
+/* { dg-do compile } */
|
|
+/* Verify that subword atomic op mappings match Table A.6's recommended mapping. */
|
|
+/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
|
|
+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
|
|
+
|
|
+void foo (short* bar, short* baz)
|
|
+{
|
|
+ __atomic_add_fetch(bar, baz, __ATOMIC_ACQUIRE);
|
|
+}
|
|
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c
|
|
new file mode 100644
|
|
index 000000000000..79efca2839a8
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c
|
|
@@ -0,0 +1,9 @@
|
|
+/* { dg-do compile } */
|
|
+/* Verify that subword atomic op mappings match Table A.6's recommended mapping. */
|
|
+/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
|
|
+/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
|
|
+
|
|
+void foo (short* bar, short* baz)
|
|
+{
|
|
+ __atomic_add_fetch(bar, baz, __ATOMIC_RELEASE);
|
|
+}
|
|
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c
|
|
new file mode 100644
|
|
index 000000000000..772ac1be6ebc
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c
|
|
@@ -0,0 +1,9 @@
|
|
+/* { dg-do compile } */
|
|
+/* Verify that subword atomic op mappings match Table A.6's recommended mapping. */
|
|
+/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
|
|
+/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
|
|
+
|
|
+void foo (short* bar, short* baz)
|
|
+{
|
|
+ __atomic_add_fetch(bar, baz, __ATOMIC_ACQ_REL);
|
|
+}
|
|
diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c
|
|
new file mode 100644
|
|
index 000000000000..b0bec66990e0
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c
|
|
@@ -0,0 +1,9 @@
|
|
+/* { dg-do compile } */
|
|
+/* Verify that subword atomic op mappings match Table A.6's recommended mapping. */
|
|
+/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
|
|
+/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
|
|
+
|
|
+void foo (short* bar, short* baz)
|
|
+{
|
|
+ __atomic_add_fetch(bar, baz, __ATOMIC_SEQ_CST);
|
|
+}
|
|
--
|
|
2.39.3
|
|
|