2018-03-12 Jakub Jelinek PR target/84786 * config/i386/sse.md (sse2_loadhpd): Use Yv constraint rather than v on the last operand. * gcc.target/i386/avx512f-pr84786-1.c: New test. * gcc.target/i386/avx512f-pr84786-2.c: New test. --- gcc/config/i386/sse.md.jj 2018-03-05 17:00:24.568655800 +0100 +++ gcc/config/i386/sse.md 2018-03-12 11:05:48.917401886 +0100 @@ -9022,14 +9022,14 @@ (define_expand "sse2_loadhpd_exp" ;; see comment above inline_secondary_memory_needed function in i386.c (define_insn "sse2_loadhpd" [(set (match_operand:V2DF 0 "nonimmediate_operand" - "=x,v,x,v,o,o ,o") + "=x,v,x,v ,o,o ,o") (vec_concat:V2DF (vec_select:DF (match_operand:V2DF 1 "nonimmediate_operand" - " 0,v,0,v,0,0 ,0") + " 0,v,0,v ,0,0 ,0") (parallel [(const_int 0)])) (match_operand:DF 2 "nonimmediate_operand" - " m,m,x,v,x,*f,r")))] + " m,m,x,Yv,x,*f,r")))] "TARGET_SSE2 && !(MEM_P (operands[1]) && MEM_P (operands[2]))" "@ movhpd\t{%2, %0|%0, %2} --- gcc/testsuite/gcc.target/i386/avx512f-pr84786-1.c.jj 2018-03-12 11:32:33.563665173 +0100 +++ gcc/testsuite/gcc.target/i386/avx512f-pr84786-1.c 2018-03-12 11:35:33.964695384 +0100 @@ -0,0 +1,25 @@ +/* PR target/84786 */ +/* { dg-do run { target { ! ia32 } } } */ +/* { dg-options "-mavx512f -mno-avx512vl -O2" } */ +/* { dg-require-effective-target avx512f } */ + +#include "avx512f-check.h" + +typedef double V __attribute__((vector_size (16))); + +__attribute__((noipa)) V +foo (V x, double y) +{ + register double z __asm ("xmm18"); + asm volatile ("" : "=v" (z) : "0" (y)); + x[1] = z; + return x; +} + +static void +avx512f_test (void) +{ + V a = foo ((V) { 1.0, 2.0 }, 3.0); + if (a[0] != 1.0 || a[1] != 3.0) + abort (); +} --- gcc/testsuite/gcc.target/i386/avx512f-pr84786-2.c.jj 2018-03-12 11:32:43.445666826 +0100 +++ gcc/testsuite/gcc.target/i386/avx512f-pr84786-2.c 2018-03-12 11:35:45.260697279 +0100 @@ -0,0 +1,16 @@ +/* PR target/84786 */ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mavx512f -mno-avx512vl -O2" } */ + +typedef double V __attribute__((vector_size (16))); + +__attribute__((noipa)) V +foo (V x, double y) +{ + register double z __asm ("xmm18"); + asm volatile ("" : "=v" (z) : "0" (y)); + x[1] = z; + return x; +} + +/* { dg-final { scan-assembler-not "vunpcklpd\[\^\n\r]*xmm(1\[6-9]|\[23]\[0-9])" } } */