diff --git a/libphobos/configure.tgt b/libphobos/configure.tgt index 0471bfd..811fdfa 100644 --- a/libphobos/configure.tgt +++ b/libphobos/configure.tgt @@ -32,6 +32,8 @@ case "${target}" in ;; x86_64-*-netbsd* | i?86-*-netbsd*) ;; + riscv*-*-linux*) + ;; *) UNSUPPORTED=1 ;; diff --git a/libphobos/libdruntime/core/atomic.d b/libphobos/libdruntime/core/atomic.d index 0b39cdd..5a6c4b8 100644 --- a/libphobos/libdruntime/core/atomic.d +++ b/libphobos/libdruntime/core/atomic.d @@ -1353,7 +1353,7 @@ else version (GNU) private bool casImpl(T,V1,V2)( shared(T)* here, V1 ifThis, V2 writeThis ) pure nothrow @nogc @trusted { - static assert(GNU_Have_Atomics, "cas() not supported on this architecture"); + static assert(GNU_Have_Atomics || GNU_Have_LibAtomic, "cas() not supported on this architecture"); bool res = void; static if (T.sizeof == byte.sizeof) @@ -1406,7 +1406,7 @@ else version (GNU) { static assert(ms != MemoryOrder.rel, "Invalid MemoryOrder for atomicLoad"); static assert(__traits(isPOD, T), "argument to atomicLoad() must be POD"); - static assert(GNU_Have_Atomics, "atomicLoad() not supported on this architecture"); + static assert(GNU_Have_Atomics || GNU_Have_LibAtomic, "atomicLoad() not supported on this architecture"); static if (T.sizeof == ubyte.sizeof) { @@ -1444,7 +1444,7 @@ else version (GNU) { static assert(ms != MemoryOrder.acq, "Invalid MemoryOrder for atomicStore"); static assert(__traits(isPOD, T), "argument to atomicLoad() must be POD"); - static assert(GNU_Have_Atomics, "atomicStore() not supported on this architecture"); + static assert(GNU_Have_Atomics || GNU_Have_LibAtomic, "atomicStore() not supported on this architecture"); static if (T.sizeof == ubyte.sizeof) { diff --git a/libphobos/libdruntime/rt/sections_elf_shared.d b/libphobos/libdruntime/rt/sections_elf_shared.d index d4e1ff0..45c1dcb 100644 --- a/libphobos/libdruntime/rt/sections_elf_shared.d +++ b/libphobos/libdruntime/rt/sections_elf_shared.d @@ -10,6 +10,9 @@ module rt.sections_elf_shared; +version (RISCV32) version = RISCV_Any; +version (RISCV64) version = RISCV_Any; + version (CRuntime_Glibc) enum SharedELF = true; else version (FreeBSD) enum SharedELF = true; else version (NetBSD) enum SharedELF = true; @@ -671,7 +674,16 @@ version (Shared) if (dyn.d_tag == DT_STRTAB) { version (linux) - strtab = cast(const(char)*)dyn.d_un.d_ptr; + { + // This might change in future glibc releases (after 2.29) as dynamic sections + // are not required to be read-only on RISC-V. This was copy & pasted from MIPS while + // upstreaming RISC-V support. Otherwise MIPS is the only arch which sets in glibc: + // #define DL_RO_DYN_SECTION 1 + version (RISCV_Any) + strtab = cast(const(char)*)(info.dlpi_addr + dyn.d_un.d_ptr); // relocate + else + strtab = cast(const(char)*)dyn.d_un.d_ptr; + } else version (FreeBSD) strtab = cast(const(char)*)(info.dlpi_addr + dyn.d_un.d_ptr); // relocate else version (NetBSD) diff --git a/libphobos/src/std/experimental/allocator/building_blocks/region.d b/libphobos/src/std/experimental/allocator/building_blocks/region.d index dfcecce..cafe059 100644 --- a/libphobos/src/std/experimental/allocator/building_blocks/region.d +++ b/libphobos/src/std/experimental/allocator/building_blocks/region.d @@ -391,7 +391,8 @@ struct InSituRegion(size_t size, size_t minAlign = platformAlignment) else version (PPC) enum growDownwards = Yes.growDownwards; else version (PPC64) enum growDownwards = Yes.growDownwards; else version (MIPS32) enum growDownwards = Yes.growDownwards; - else version (MIPS64) enum growDownwards = Yes.growDownwards; + else version (RISCV32) enum growDownwards = Yes.growDownwards; + else version (RISCV64) enum growDownwards = Yes.growDownwards; else version (SPARC) enum growDownwards = Yes.growDownwards; else version (SystemZ) enum growDownwards = Yes.growDownwards; else static assert(0, "Dunno how the stack grows on this architecture."); diff --git a/libphobos/src/std/math.d b/libphobos/src/std/math.d index e98e746..9fe7465 100644 --- a/libphobos/src/std/math.d +++ b/libphobos/src/std/math.d @@ -162,6 +162,8 @@ version (AArch64) version = ARM_Any; version (ARM) version = ARM_Any; version (SPARC) version = SPARC_Any; version (SPARC64) version = SPARC_Any; +version (RISCV32) version = RISCV_Any; +version (RISCV64) version = RISCV_Any; version (D_InlineAsm_X86) { @@ -4683,6 +4685,7 @@ private: // The Pentium SSE2 status register is 32 bits. // The ARM and PowerPC FPSCR is a 32-bit register. // The SPARC FSR is a 32bit register (64 bits for SPARC 7 & 8, but high bits are uninteresting). + // The RISC-V (32 & 64 bit) fcsr is 32-bit register. uint flags; version (CRuntime_Microsoft) @@ -4754,6 +4757,15 @@ private: return result; } } + else version (RISCV_Any) + { + uint result = void; + asm pure nothrow @nogc + { + "frflags %0" : "=r" (result); + } + return result; + } else assert(0, "Not yet supported"); } @@ -4828,6 +4840,14 @@ private: } } } + else version (RISCV_Any) + { + uint newValues = 0x0; + asm pure nothrow @nogc + { + "fsflags %0" : : "r" (newValues); + } + } else assert(0, "Not yet supported"); } @@ -4987,6 +5007,10 @@ else version (PPC_Any) { version = IeeeFlagsSupport; } +else version (RISCV_Any) +{ + version = IeeeFlagsSupport; +} else version (MIPS_Any) { version = IeeeFlagsSupport; @@ -5226,6 +5250,21 @@ struct FloatingPointControl | inexactException, } } + else version (RISCV_Any) + { + enum : ExceptionMask + { + inexactException = 0x01, + divByZeroException = 0x02, + underflowException = 0x04, + overflowException = 0x08, + invalidException = 0x10, + severeExceptions = overflowException | divByZeroException + | invalidException, + allExceptions = severeExceptions | underflowException + | inexactException, + } + } else version (X86_Any) { enum : ExceptionMask @@ -5338,6 +5377,10 @@ private: { alias ControlState = uint; } + else version (RISCV_Any) + { + alias ControlState = uint; + } else version (X86_Any) { alias ControlState = ushort; @@ -5397,6 +5440,15 @@ private: } return cont; } + else version (RISCV_Any) + { + ControlState cont; + asm pure nothrow @nogc + { + "frcsr %0" : "=r" (cont); + } + return cont; + } else assert(0, "Not yet supported"); } @@ -5482,6 +5534,13 @@ private: } } } + else version (RISCV_Any) + { + asm pure nothrow @nogc + { + "fscsr %0" : : "r" (newState); + } + } else assert(0, "Not yet supported"); }