2020-03-26 Jakub Jelinek PR target/94343 * config/i386/sse.md (one_cmpl2): If !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input operand is a register. Don't enable masked variants for V*[QH]Imode. * gcc.target/i386/avx512f-pr94343.c: New test. * gcc.target/i386/avx512vl-pr94343.c: New test. --- gcc/config/i386/sse.md.jj 2020-03-06 11:35:46.284074858 +0100 +++ gcc/config/i386/sse.md 2020-03-26 18:49:39.644131577 +0100 @@ -12796,14 +12796,29 @@ (define_expand "one_cmpl2" }) (define_insn "one_cmpl2" - [(set (match_operand:VI 0 "register_operand" "=v") - (xor:VI (match_operand:VI 1 "nonimmediate_operand" "vm") - (match_operand:VI 2 "vector_all_ones_operand" "BC")))] - "TARGET_AVX512F" - "vpternlog\t{$0x55, %1, %0, %0|%0, %0, %1, 0x55}" + [(set (match_operand:VI 0 "register_operand" "=v,v") + (xor:VI (match_operand:VI 1 "nonimmediate_operand" "v,m") + (match_operand:VI 2 "vector_all_ones_operand" "BC,BC")))] + "TARGET_AVX512F + && (! + || mode == SImode + || mode == DImode)" +{ + if (TARGET_AVX512VL) + return "vpternlog\t{$0x55, %1, %0, %0|%0, %0, %1, 0x55}"; + else + return "vpternlog\t{$0x55, %g1, %g0, %g0|%g0, %g0, %g1, 0x55}"; +} [(set_attr "type" "sselog") (set_attr "prefix" "evex") - (set_attr "mode" "")]) + (set (attr "mode") + (if_then_else (match_test "TARGET_AVX512VL") + (const_string "") + (const_string "XI"))) + (set (attr "enabled") + (if_then_else (eq_attr "alternative" "1") + (symbol_ref " == 64 || TARGET_AVX512VL") + (const_int 1)))]) (define_expand "_andnot3" [(set (match_operand:VI_AVX2 0 "register_operand") --- gcc/testsuite/gcc.target/i386/avx512f-pr94343.c.jj 2020-03-26 17:47:40.008654504 +0100 +++ gcc/testsuite/gcc.target/i386/avx512f-pr94343.c 2020-03-26 17:48:37.169811375 +0100 @@ -0,0 +1,12 @@ +/* PR target/94343 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512f -mno-avx512vl" } */ +/* { dg-final { scan-assembler-not "vpternlogd\[^\n\r]*xmm\[0-9]*" } } */ + +typedef int __v4si __attribute__((vector_size (16))); + +__v4si +foo (__v4si a) +{ + return ~a; +} --- gcc/testsuite/gcc.target/i386/avx512vl-pr94343.c.jj 2020-03-26 17:48:53.232573115 +0100 +++ gcc/testsuite/gcc.target/i386/avx512vl-pr94343.c 2020-03-26 17:49:08.034352968 +0100 @@ -0,0 +1,12 @@ +/* PR target/94343 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl" } */ +/* { dg-final { scan-assembler "vpternlogd\[^\n\r]*xmm\[0-9]*" } } */ + +typedef int __v4si __attribute__((vector_size (16))); + +__v4si +foo (__v4si a) +{ + return ~a; +}