From d6279ef7800d8d3c0cec208900e9c443af875bd1 Mon Sep 17 00:00:00 2001 From: kito Date: Fri, 20 Sep 2019 10:41:51 +0000 Subject: [PATCH] RISC-V: Fix more splitters accidentally calling gen_reg_rtx. PR target/91683 * config/riscv/riscv-protos.h (riscv_split_symbol): New bool parameter. (riscv_move_integer): Likewise. * config/riscv/riscv.c (riscv_split_integer): Pass FALSE for new riscv_move_integer arg. (riscv_legitimize_move): Likewise. (riscv_force_temporary): New parameter in_splitter. Don't call force_reg if true. (riscv_unspec_offset_high): Pass FALSE for new riscv_force_temporary arg. (riscv_add_offset): Likewise. (riscv_split_symbol): New parameter in_splitter. Pass to riscv_force_temporary. (riscv_legitimize_address): Pass FALSE for new riscv_split_symbol arg. (riscv_move_integer): New parameter in_splitter. New local can_create_psuedo. Don't call riscv_split_integer or force_reg when in_splitter TRUE. (riscv_legitimize_const_move): Pass FALSE for new riscv_move_integer, riscv_split_symbol, and riscv_force_temporary args. * config/riscv/riscv.md (low+1): Pass TRUE for new riscv_move_integer arg. (low+2): Pass TRUE for new riscv_split_symbol arg. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-9-branch@275997 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/config/riscv/riscv-protos.h | 4 +-- gcc/config/riscv/riscv.c | 45 ++++++++++++++++++++------------- gcc/config/riscv/riscv.md | 6 ++--- 4 files changed, 62 insertions(+), 22 deletions(-) diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h index 8b510f87df87..5b0bbdd7cb4e 100644 --- a/gcc/config/riscv/riscv-protos.h +++ b/gcc/config/riscv/riscv-protos.h @@ -44,10 +44,10 @@ extern int riscv_const_insns (rtx); extern int riscv_split_const_insns (rtx); extern int riscv_load_store_insns (rtx, rtx_insn *); extern rtx riscv_emit_move (rtx, rtx); -extern bool riscv_split_symbol (rtx, rtx, machine_mode, rtx *); +extern bool riscv_split_symbol (rtx, rtx, machine_mode, rtx *, bool); extern bool riscv_split_symbol_type (enum riscv_symbol_type); extern rtx riscv_unspec_address (rtx, enum riscv_symbol_type); -extern void riscv_move_integer (rtx, rtx, HOST_WIDE_INT); +extern void riscv_move_integer (rtx, rtx, HOST_WIDE_INT, bool); extern bool riscv_legitimize_move (machine_mode, rtx, rtx); extern rtx riscv_subword (rtx, bool); extern bool riscv_split_64bit_move_p (rtx, rtx); diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c index 35219956c80d..5cb295d3abba 100644 --- a/gcc/config/riscv/riscv.c +++ b/gcc/config/riscv/riscv.c @@ -508,8 +508,8 @@ riscv_split_integer (HOST_WIDE_INT val, machine_mode mode) unsigned HOST_WIDE_INT hival = sext_hwi ((val - loval) >> 32, 32); rtx hi = gen_reg_rtx (mode), lo = gen_reg_rtx (mode); - riscv_move_integer (hi, hi, hival); - riscv_move_integer (lo, lo, loval); + riscv_move_integer (hi, hi, hival, FALSE); + riscv_move_integer (lo, lo, loval, FALSE); hi = gen_rtx_fmt_ee (ASHIFT, mode, hi, GEN_INT (32)); hi = force_reg (mode, hi); @@ -1021,9 +1021,12 @@ riscv_force_binary (machine_mode mode, enum rtx_code code, rtx x, rtx y) are allowed, copy it into a new register, otherwise use DEST. */ static rtx -riscv_force_temporary (rtx dest, rtx value) +riscv_force_temporary (rtx dest, rtx value, bool in_splitter) { - if (can_create_pseudo_p ()) + /* We can't call gen_reg_rtx from a splitter, because this might realloc + the regno_reg_rtx array, which would invalidate reg rtx pointers in the + combine undo buffer. */ + if (can_create_pseudo_p () && !in_splitter) return force_reg (Pmode, value); else { @@ -1082,7 +1085,7 @@ static rtx riscv_unspec_offset_high (rtx temp, rtx addr, enum riscv_symbol_type symbol_type) { addr = gen_rtx_HIGH (Pmode, riscv_unspec_address (addr, symbol_type)); - return riscv_force_temporary (temp, addr); + return riscv_force_temporary (temp, addr, FALSE); } /* Load an entry from the GOT for a TLS GD access. */ @@ -1130,7 +1133,8 @@ static rtx riscv_tls_add_tp_le (rtx dest, rtx base, rtx sym) is guaranteed to be a legitimate address for mode MODE. */ bool -riscv_split_symbol (rtx temp, rtx addr, machine_mode mode, rtx *low_out) +riscv_split_symbol (rtx temp, rtx addr, machine_mode mode, rtx *low_out, + bool in_splitter) { enum riscv_symbol_type symbol_type; @@ -1146,7 +1150,7 @@ riscv_split_symbol (rtx temp, rtx addr, machine_mode mode, rtx *low_out) case SYMBOL_ABSOLUTE: { rtx high = gen_rtx_HIGH (Pmode, copy_rtx (addr)); - high = riscv_force_temporary (temp, high); + high = riscv_force_temporary (temp, high, in_splitter); *low_out = gen_rtx_LO_SUM (Pmode, high, addr); } break; @@ -1205,8 +1209,9 @@ riscv_add_offset (rtx temp, rtx reg, HOST_WIDE_INT offset) overflow, so we need to force a sign-extension check. */ high = gen_int_mode (CONST_HIGH_PART (offset), Pmode); offset = CONST_LOW_PART (offset); - high = riscv_force_temporary (temp, high); - reg = riscv_force_temporary (temp, gen_rtx_PLUS (Pmode, high, reg)); + high = riscv_force_temporary (temp, high, FALSE); + reg = riscv_force_temporary (temp, gen_rtx_PLUS (Pmode, high, reg), + FALSE); } return plus_constant (Pmode, reg, offset); } @@ -1315,7 +1320,7 @@ riscv_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, return riscv_legitimize_tls_address (x); /* See if the address can split into a high part and a LO_SUM. */ - if (riscv_split_symbol (NULL, x, mode, &addr)) + if (riscv_split_symbol (NULL, x, mode, &addr, FALSE)) return riscv_force_address (addr, mode); /* Handle BASE + OFFSET using riscv_add_offset. */ @@ -1337,17 +1342,23 @@ riscv_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, /* Load VALUE into DEST. TEMP is as for riscv_force_temporary. */ void -riscv_move_integer (rtx temp, rtx dest, HOST_WIDE_INT value) +riscv_move_integer (rtx temp, rtx dest, HOST_WIDE_INT value, + bool in_splitter) { struct riscv_integer_op codes[RISCV_MAX_INTEGER_OPS]; machine_mode mode; int i, num_ops; rtx x; + /* We can't call gen_reg_rtx from a splitter, because this might realloc + the regno_reg_rtx array, which would invalidate reg rtx pointers in the + combine undo buffer. */ + bool can_create_pseudo = can_create_pseudo_p () && ! in_splitter; + mode = GET_MODE (dest); num_ops = riscv_build_integer (codes, value, mode); - if (can_create_pseudo_p () && num_ops > 2 /* not a simple constant */ + if (can_create_pseudo && num_ops > 2 /* not a simple constant */ && num_ops >= riscv_split_integer_cost (value)) x = riscv_split_integer (value, mode); else @@ -1357,7 +1368,7 @@ riscv_move_integer (rtx temp, rtx dest, HOST_WIDE_INT value) for (i = 1; i < num_ops; i++) { - if (!can_create_pseudo_p ()) + if (!can_create_pseudo) x = riscv_emit_set (temp, x); else x = force_reg (mode, x); @@ -1381,12 +1392,12 @@ riscv_legitimize_const_move (machine_mode mode, rtx dest, rtx src) /* Split moves of big integers into smaller pieces. */ if (splittable_const_int_operand (src, mode)) { - riscv_move_integer (dest, dest, INTVAL (src)); + riscv_move_integer (dest, dest, INTVAL (src), FALSE); return; } /* Split moves of symbolic constants into high/low pairs. */ - if (riscv_split_symbol (dest, src, MAX_MACHINE_MODE, &src)) + if (riscv_split_symbol (dest, src, MAX_MACHINE_MODE, &src, FALSE)) { riscv_emit_set (dest, src); return; @@ -1407,7 +1418,7 @@ riscv_legitimize_const_move (machine_mode mode, rtx dest, rtx src) if (offset != const0_rtx && (targetm.cannot_force_const_mem (mode, src) || can_create_pseudo_p ())) { - base = riscv_force_temporary (dest, base); + base = riscv_force_temporary (dest, base, FALSE); riscv_emit_move (dest, riscv_add_offset (NULL, base, INTVAL (offset))); return; } @@ -1416,7 +1427,7 @@ riscv_legitimize_const_move (machine_mode mode, rtx dest, rtx src) /* When using explicit relocs, constant pool references are sometimes not legitimate addresses. */ - riscv_split_symbol (dest, XEXP (src, 0), mode, &XEXP (src, 0)); + riscv_split_symbol (dest, XEXP (src, 0), mode, &XEXP (src, 0), FALSE); riscv_emit_move (dest, src); } diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index 7850c41f3c7e..e40535c9e405 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -1284,7 +1284,7 @@ "" [(const_int 0)] { - riscv_move_integer (operands[2], operands[0], INTVAL (operands[1])); + riscv_move_integer (operands[2], operands[0], INTVAL (operands[1]), TRUE); DONE; }) @@ -1293,11 +1293,11 @@ [(set (match_operand:P 0 "register_operand") (match_operand:P 1)) (clobber (match_operand:P 2 "register_operand"))] - "riscv_split_symbol (operands[2], operands[1], MAX_MACHINE_MODE, NULL)" + "riscv_split_symbol (operands[2], operands[1], MAX_MACHINE_MODE, NULL, TRUE)" [(set (match_dup 0) (match_dup 3))] { riscv_split_symbol (operands[2], operands[1], - MAX_MACHINE_MODE, &operands[3]); + MAX_MACHINE_MODE, &operands[3], TRUE); }) ;; 64-bit integer moves