Bump release

Signed-off-by: David Abdurachmanov <davidlt@rivosinc.com>

.fmf/version

@@ -0,0 +1 @@
+1

.gitignore

@@ -6,3 +6,105 @@
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0180b20de73778fe1e67060f66c7f47630aeb949.patch

@@ -0,0 +1,49 @@
+From 0180b20de73778fe1e67060f66c7f47630aeb949 Mon Sep 17 00:00:00 2001
+From: Patrick O'Neill <patrick@rivosinc.com>
+Date: Wed, 5 Apr 2023 09:46:37 -0700
+Subject: [PATCH] RISC-V: Enforce atomic compare_exchange SEQ_CST
+
+This patch enforces SEQ_CST for atomic compare_exchange ops.
+
+Replace Fence/LR.aq/SC.aq pairs with SEQ_CST LR.aqrl/SC.rl pairs
+recommended by table A.6 of the ISA manual.
+
+2023-04-27 Patrick O'Neill <patrick@rivosinc.com>
+
+gcc/ChangeLog:
+
+	* config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
+	FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
+	pair.
+
+Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
+---
+ gcc/config/riscv/sync.md | 11 +++++++++--
+ 1 file changed, 9 insertions(+), 2 deletions(-)
+
+diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md
+index 0c83ef046070..5620d6ffa587 100644
+--- a/gcc/config/riscv/sync.md
++++ b/gcc/config/riscv/sync.md
+@@ -297,9 +297,16 @@
+ 	 UNSPEC_COMPARE_AND_SWAP))
+    (clobber (match_scratch:GPR 6 "=&r"))]
+   "TARGET_ATOMIC"
+-  "%F5 1: lr.<amo>%A5 %0,%1; bne %0,%z2,1f; sc.<amo>%A4 %6,%z3,%1; bnez %6,1b; 1:"
++  {
++    return "1:\;"
++	   "lr.<amo>.aqrl\t%0,%1\;"
++	   "bne\t%0,%z2,1f\;"
++	   "sc.<amo>.rl\t%6,%z3,%1\;"
++	   "bnez\t%6,1b\;"
++	   "1:";
++  }
+   [(set_attr "type" "atomic")
+-   (set (attr "length") (const_int 20))])
++   (set (attr "length") (const_int 16))])
+ 
+ (define_expand "atomic_compare_and_swap<mode>"
+   [(match_operand:SI 0 "register_operand" "")   ;; bool output
+-- 
+2.39.3
+

0e42ac31fdeffdcec22f1935534693d4cef62e0b.patch

@@ -0,0 +1,69 @@
+From 0e42ac31fdeffdcec22f1935534693d4cef62e0b Mon Sep 17 00:00:00 2001
+From: Patrick O'Neill <patrick@rivosinc.com>
+Date: Fri, 7 Apr 2023 15:14:17 -0700
+Subject: [PATCH] RISC-V: Weaken atomic loads
+
+This change brings atomic loads in line with table A.6 of the ISA
+manual.
+
+2023-04-27 Patrick O'Neill <patrick@rivosinc.com>
+
+gcc/ChangeLog:
+
+	* config/riscv/sync.md (atomic_load<mode>): Implement atomic
+	load mapping.
+
+Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
+---
+ gcc/config/riscv/sync.md | 28 ++++++++++++++++++++++++++--
+ 1 file changed, 26 insertions(+), 2 deletions(-)
+
+diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md
+index ba132d8a1cea..6e7c762ac577 100644
+--- a/gcc/config/riscv/sync.md
++++ b/gcc/config/riscv/sync.md
+@@ -26,6 +26,7 @@
+   UNSPEC_SYNC_OLD_OP_SUBWORD
+   UNSPEC_SYNC_EXCHANGE
+   UNSPEC_SYNC_EXCHANGE_SUBWORD
++  UNSPEC_ATOMIC_LOAD
+   UNSPEC_ATOMIC_STORE
+   UNSPEC_MEMORY_BARRIER
+ ])
+@@ -66,8 +67,31 @@
+ 
+ ;; Atomic memory operations.
+ 
+-;; Implement atomic stores with conservative fences.  Fall back to fences for
+-;; atomic loads.
++(define_insn "atomic_load<mode>"
++  [(set (match_operand:GPR 0 "register_operand" "=r")
++    (unspec_volatile:GPR
++      [(match_operand:GPR 1 "memory_operand" "A")
++       (match_operand:SI 2 "const_int_operand")]      ;; model
++      UNSPEC_ATOMIC_LOAD))]
++  "TARGET_ATOMIC"
++  {
++    enum memmodel model = (enum memmodel) INTVAL (operands[2]);
++    model = memmodel_base (model);
++
++    if (model == MEMMODEL_SEQ_CST)
++      return "fence\trw,rw\;"
++	     "l<amo>\t%0,%1\;"
++	     "fence\tr,rw";
++    if (model == MEMMODEL_ACQUIRE)
++      return "l<amo>\t%0,%1\;"
++	     "fence\tr,rw";
++    else
++      return "l<amo>\t%0,%1";
++  }
++  [(set_attr "type" "atomic")
++   (set (attr "length") (const_int 12))])
++
++;; Implement atomic stores with conservative fences.
+ ;; This allows us to be compatible with the ISA manual Table A.6 and Table A.7.
+ (define_insn "atomic_store<mode>"
+   [(set (match_operand:GPR 0 "memory_operand" "=A")
+-- 
+2.39.3
+

1e9180b3298def6c01d9055d558fdb52231f8d2d.patch

@@ -0,0 +1,35 @@
+From 1e9180b3298def6c01d9055d558fdb52231f8d2d Mon Sep 17 00:00:00 2001
+From: Martin Liska <mliska@suse.cz>
+Date: Wed, 3 May 2023 16:35:26 +0200
+Subject: [PATCH] riscv: fix error: control reaches end of non-void function
+
+Fixes:
+gcc/config/riscv/sync.md:66:1: error: control reaches end of non-void function [-Werror=return-type]
+66 |   [(set (attr "length") (const_int 4))])
+   | ^
+
+	PR target/109713
+
+gcc/ChangeLog:
+
+	* config/riscv/sync.md: Add gcc_unreachable to a switch.
+---
+ gcc/config/riscv/sync.md | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md
+index 6e7c762ac577..9fc626267de3 100644
+--- a/gcc/config/riscv/sync.md
++++ b/gcc/config/riscv/sync.md
+@@ -62,6 +62,8 @@
+ 	return "fence\tr,rw";
+     else if (model == MEMMODEL_RELEASE)
+ 	return "fence\trw,w";
++    else
++	gcc_unreachable ();
+   }
+   [(set (attr "length") (const_int 4))])
+ 
+-- 
+2.39.3
+

36a84e538bb9d3feb1762200074f39a1e9ff4fce.patch

@@ -0,0 +1,57 @@
+From 36a84e538bb9d3feb1762200074f39a1e9ff4fce Mon Sep 17 00:00:00 2001
+From: Patrick O'Neill <patrick@rivosinc.com>
+Date: Fri, 7 Apr 2023 10:44:09 -0700
+Subject: [PATCH] RISC-V: Weaken mem_thread_fence
+
+This change brings atomic fences in line with table A.6 of the ISA
+manual.
+
+Relax mem_thread_fence according to the memmodel given.
+
+2023-04-27 Patrick O'Neill <patrick@rivosinc.com>
+
+gcc/ChangeLog:
+
+	* config/riscv/sync.md (mem_thread_fence_1): Change fence
+	depending on the given memory model.
+
+Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
+---
+ gcc/config/riscv/sync.md | 16 +++++++++++++---
+ 1 file changed, 13 insertions(+), 3 deletions(-)
+
+diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md
+index 3e6345e83a35..ba132d8a1cea 100644
+--- a/gcc/config/riscv/sync.md
++++ b/gcc/config/riscv/sync.md
+@@ -45,14 +45,24 @@
+   DONE;
+ })
+ 
+-;; Until the RISC-V memory model (hence its mapping from C++) is finalized,
+-;; conservatively emit a full FENCE.
+ (define_insn "mem_thread_fence_1"
+   [(set (match_operand:BLK 0 "" "")
+ 	(unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))
+    (match_operand:SI 1 "const_int_operand" "")] ;; model
+   ""
+-  "fence\tiorw,iorw")
++  {
++    enum memmodel model = (enum memmodel) INTVAL (operands[1]);
++    model = memmodel_base (model);
++    if (model == MEMMODEL_SEQ_CST)
++	return "fence\trw,rw";
++    else if (model == MEMMODEL_ACQ_REL)
++	return "fence.tso";
++    else if (model == MEMMODEL_ACQUIRE)
++	return "fence\tr,rw";
++    else if (model == MEMMODEL_RELEASE)
++	return "fence\trw,w";
++  }
++  [(set (attr "length") (const_int 4))])
+ 
+ ;; Atomic memory operations.
+ 
+-- 
+2.39.3
+

444d909b323d94639e60aab6c4089ff839c0f0e9.patch

@@ -0,0 +1,632 @@
+From 444d909b323d94639e60aab6c4089ff839c0f0e9 Mon Sep 17 00:00:00 2001
+From: Patrick O'Neill <patrick@rivosinc.com>
+Date: Fri, 7 Apr 2023 13:13:21 -0700
+Subject: [PATCH] RISC-V: Table A.6 conformance tests
+
+These tests cover basic cases to ensure the atomic mappings follow the
+strengthened Table A.6 mappings that are compatible with Table A.7.
+
+2023-04-27 Patrick O'Neill <patrick@rivosinc.com>
+
+gcc/testsuite/ChangeLog:
+
+	* gcc.target/riscv/amo-table-a-6-amo-add-1.c: New test.
+	* gcc.target/riscv/amo-table-a-6-amo-add-2.c: New test.
+	* gcc.target/riscv/amo-table-a-6-amo-add-3.c: New test.
+	* gcc.target/riscv/amo-table-a-6-amo-add-4.c: New test.
+	* gcc.target/riscv/amo-table-a-6-amo-add-5.c: New test.
+	* gcc.target/riscv/amo-table-a-6-compare-exchange-1.c: New test.
+	* gcc.target/riscv/amo-table-a-6-compare-exchange-2.c: New test.
+	* gcc.target/riscv/amo-table-a-6-compare-exchange-3.c: New test.
+	* gcc.target/riscv/amo-table-a-6-compare-exchange-4.c: New test.
+	* gcc.target/riscv/amo-table-a-6-compare-exchange-5.c: New test.
+	* gcc.target/riscv/amo-table-a-6-compare-exchange-6.c: New test.
+	* gcc.target/riscv/amo-table-a-6-compare-exchange-7.c: New test.
+	* gcc.target/riscv/amo-table-a-6-fence-1.c: New test.
+	* gcc.target/riscv/amo-table-a-6-fence-2.c: New test.
+	* gcc.target/riscv/amo-table-a-6-fence-3.c: New test.
+	* gcc.target/riscv/amo-table-a-6-fence-4.c: New test.
+	* gcc.target/riscv/amo-table-a-6-fence-5.c: New test.
+	* gcc.target/riscv/amo-table-a-6-load-1.c: New test.
+	* gcc.target/riscv/amo-table-a-6-load-2.c: New test.
+	* gcc.target/riscv/amo-table-a-6-load-3.c: New test.
+	* gcc.target/riscv/amo-table-a-6-store-1.c: New test.
+	* gcc.target/riscv/amo-table-a-6-store-2.c: New test.
+	* gcc.target/riscv/amo-table-a-6-store-compat-3.c: New test.
+	* gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c: New test.
+	* gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c: New test.
+	* gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c: New test.
+	* gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c: New test.
+	* gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c: New test.
+
+Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
+---
+ .../gcc.target/riscv/amo-table-a-6-amo-add-1.c | 15 +++++++++++++++
+ .../gcc.target/riscv/amo-table-a-6-amo-add-2.c | 15 +++++++++++++++
+ .../gcc.target/riscv/amo-table-a-6-amo-add-3.c | 15 +++++++++++++++
+ .../gcc.target/riscv/amo-table-a-6-amo-add-4.c | 15 +++++++++++++++
+ .../gcc.target/riscv/amo-table-a-6-amo-add-5.c | 15 +++++++++++++++
+ .../riscv/amo-table-a-6-compare-exchange-1.c   |  9 +++++++++
+ .../riscv/amo-table-a-6-compare-exchange-2.c   |  9 +++++++++
+ .../riscv/amo-table-a-6-compare-exchange-3.c   |  9 +++++++++
+ .../riscv/amo-table-a-6-compare-exchange-4.c   |  9 +++++++++
+ .../riscv/amo-table-a-6-compare-exchange-5.c   |  9 +++++++++
+ .../riscv/amo-table-a-6-compare-exchange-6.c   | 10 ++++++++++
+ .../riscv/amo-table-a-6-compare-exchange-7.c   |  9 +++++++++
+ .../gcc.target/riscv/amo-table-a-6-fence-1.c   | 14 ++++++++++++++
+ .../gcc.target/riscv/amo-table-a-6-fence-2.c   | 15 +++++++++++++++
+ .../gcc.target/riscv/amo-table-a-6-fence-3.c   | 15 +++++++++++++++
+ .../gcc.target/riscv/amo-table-a-6-fence-4.c   | 15 +++++++++++++++
+ .../gcc.target/riscv/amo-table-a-6-fence-5.c   | 15 +++++++++++++++
+ .../gcc.target/riscv/amo-table-a-6-load-1.c    | 16 ++++++++++++++++
+ .../gcc.target/riscv/amo-table-a-6-load-2.c    | 17 +++++++++++++++++
+ .../gcc.target/riscv/amo-table-a-6-load-3.c    | 18 ++++++++++++++++++
+ .../gcc.target/riscv/amo-table-a-6-store-1.c   | 16 ++++++++++++++++
+ .../gcc.target/riscv/amo-table-a-6-store-2.c   | 17 +++++++++++++++++
+ .../riscv/amo-table-a-6-store-compat-3.c       | 18 ++++++++++++++++++
+ .../riscv/amo-table-a-6-subword-amo-add-1.c    |  9 +++++++++
+ .../riscv/amo-table-a-6-subword-amo-add-2.c    |  9 +++++++++
+ .../riscv/amo-table-a-6-subword-amo-add-3.c    |  9 +++++++++
+ .../riscv/amo-table-a-6-subword-amo-add-4.c    |  9 +++++++++
+ .../riscv/amo-table-a-6-subword-amo-add-5.c    |  9 +++++++++
+ 28 files changed, 360 insertions(+)
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-1.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-2.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-3.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-4.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-5.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-1.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-2.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-3.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-4.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-5.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-6.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-7.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-1.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-2.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-3.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-4.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-5.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-1.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-2.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-3.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-1.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-2.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-compat-3.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c
+
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-1.c
+new file mode 100644
+index 000000000000..071a33928fe9
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-1.c
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* Verify that atomic op mappings match Table A.6's recommended mapping.  */
++/* { dg-options "-O3" } */
++/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++/*
++** foo:
++**	amoadd\.w\tzero,a1,0\(a0\)
++**	ret
++*/
++void foo (int* bar, int* baz)
++{
++  __atomic_add_fetch(bar, baz, __ATOMIC_RELAXED);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-2.c
+new file mode 100644
+index 000000000000..d6b2d91db2ab
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-2.c
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* Verify that atomic op mappings match Table A.6's recommended mapping.  */
++/* { dg-options "-O3" } */
++/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++/*
++** foo:
++**	amoadd\.w\.aq\tzero,a1,0\(a0\)
++**	ret
++*/
++void foo (int* bar, int* baz)
++{
++  __atomic_add_fetch(bar, baz, __ATOMIC_ACQUIRE);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-3.c
+new file mode 100644
+index 000000000000..68a69ed8b780
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-3.c
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* Verify that atomic op mappings match Table A.6's recommended mapping.  */
++/* { dg-options "-O3" } */
++/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++/*
++** foo:
++**	amoadd\.w\.rl\tzero,a1,0\(a0\)
++**	ret
++*/
++void foo (int* bar, int* baz)
++{
++  __atomic_add_fetch(bar, baz, __ATOMIC_RELEASE);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-4.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-4.c
+new file mode 100644
+index 000000000000..b5cac4c47970
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-4.c
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* Verify that atomic op mappings match Table A.6's recommended mapping.  */
++/* { dg-options "-O3" } */
++/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++/*
++** foo:
++**	amoadd\.w\.aqrl\tzero,a1,0\(a0\)
++**	ret
++*/
++void foo (int* bar, int* baz)
++{
++  __atomic_add_fetch(bar, baz, __ATOMIC_ACQ_REL);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-5.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-5.c
+new file mode 100644
+index 000000000000..268e58cb95f0
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-amo-add-5.c
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* Verify that atomic op mappings match Table A.6's recommended mapping.  */
++/* { dg-options "-O3" } */
++/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++/*
++** foo:
++**	amoadd\.w\.aqrl\tzero,a1,0\(a0\)
++**	ret
++*/
++void foo (int* bar, int* baz)
++{
++  __atomic_add_fetch(bar, baz, __ATOMIC_SEQ_CST);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-1.c
+new file mode 100644
+index 000000000000..8349e7a69ac2
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-1.c
+@@ -0,0 +1,9 @@
++/* { dg-do compile } */
++/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
++/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
++/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
++
++void foo (int bar, int baz, int qux)
++{
++  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_RELAXED, __ATOMIC_RELAXED);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-2.c
+new file mode 100644
+index 000000000000..bf30b298b4b5
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-2.c
+@@ -0,0 +1,9 @@
++/* { dg-do compile } */
++/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
++/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
++/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
++
++void foo (int bar, int baz, int qux)
++{
++  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_CONSUME, __ATOMIC_CONSUME);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-3.c
+new file mode 100644
+index 000000000000..41444ec95e90
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-3.c
+@@ -0,0 +1,9 @@
++/* { dg-do compile } */
++/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
++/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
++/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
++
++void foo (int bar, int baz, int qux)
++{
++  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_ACQUIRE, __ATOMIC_ACQUIRE);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-4.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-4.c
+new file mode 100644
+index 000000000000..dc2d7bd300d3
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-4.c
+@@ -0,0 +1,9 @@
++/* { dg-do compile } */
++/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
++/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
++/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
++
++void foo (int bar, int baz, int qux)
++{
++  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-5.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-5.c
+new file mode 100644
+index 000000000000..53246210900c
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-5.c
+@@ -0,0 +1,9 @@
++/* { dg-do compile } */
++/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
++/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
++/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
++
++void foo (int bar, int baz, int qux)
++{
++  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-6.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-6.c
+new file mode 100644
+index 000000000000..1376ac2a95bb
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-6.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
++/* Mixed mappings need to be unioned.  */
++/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
++/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
++
++void foo (int bar, int baz, int qux)
++{
++  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_RELEASE, __ATOMIC_ACQUIRE);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-7.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-7.c
+new file mode 100644
+index 000000000000..98083cbae083
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-compare-exchange-7.c
+@@ -0,0 +1,9 @@
++/* { dg-do compile } */
++/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
++/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
++/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
++
++void foo (int bar, int baz, int qux)
++{
++  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_SEQ_CST, __ATOMIC_RELAXED);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-1.c
+new file mode 100644
+index 000000000000..bf590489c398
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-1.c
+@@ -0,0 +1,14 @@
++/* { dg-do compile } */
++/* Verify that fence mappings match Table A.6's recommended mapping.  */
++/* { dg-options "-O3" } */
++/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++/*
++** foo:
++**	ret
++*/
++void foo()
++{
++  __atomic_thread_fence(__ATOMIC_RELAXED);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-2.c
+new file mode 100644
+index 000000000000..9848f8cae31a
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-2.c
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* Verify that fence mappings match Table A.6's recommended mapping.  */
++/* { dg-options "-O3" } */
++/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++/*
++** foo:
++**	fence\tr,rw
++**	ret
++*/
++void foo()
++{
++  __atomic_thread_fence(__ATOMIC_ACQUIRE);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-3.c
+new file mode 100644
+index 000000000000..3c3ce6e0d182
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-3.c
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* Verify that fence mappings match Table A.6's recommended mapping.  */
++/* { dg-options "-O3" } */
++/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++/*
++** foo:
++**	fence\trw,w
++**	ret
++*/
++void foo()
++{
++  __atomic_thread_fence(__ATOMIC_RELEASE);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-4.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-4.c
+new file mode 100644
+index 000000000000..12d717170858
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-4.c
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* Verify that fence mappings match Table A.6's recommended mapping.  */
++/* { dg-options "-O3" } */
++/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++/*
++** foo:
++**	fence\.tso
++**	ret
++*/
++void foo()
++{
++  __atomic_thread_fence(__ATOMIC_ACQ_REL);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-5.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-5.c
+new file mode 100644
+index 000000000000..9567b604c2c9
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-fence-5.c
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* Verify that fence mappings match Table A.6's recommended mapping.  */
++/* { dg-options "-O3" } */
++/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++/*
++** foo:
++**	fence\trw,rw
++**	ret
++*/
++void foo()
++{
++  __atomic_thread_fence(__ATOMIC_SEQ_CST);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-1.c
+new file mode 100644
+index 000000000000..3c79035e46d6
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-1.c
+@@ -0,0 +1,16 @@
++/* { dg-do compile } */
++/* Verify that load mappings match Table A.6's recommended mapping.  */
++/* { dg-options "-O3" } */
++/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++/*
++** foo:
++**	lw\ta[0-9]+,0\(a0\)
++**	sw\ta[0-9]+,0\(a1\)
++**	ret
++*/
++void foo (int* bar, int* baz)
++{
++  __atomic_load(bar, baz, __ATOMIC_RELAXED);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-2.c
+new file mode 100644
+index 000000000000..7d74841846fa
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-2.c
+@@ -0,0 +1,17 @@
++/* { dg-do compile } */
++/* Verify that load mappings match Table A.6's recommended mapping.  */
++/* { dg-options "-O3" } */
++/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++/*
++** foo:
++**	lw\ta[0-9]+,0\(a0\)
++**	fence\tr,rw
++**	sw\ta[0-9]+,0\(a1\)
++**	ret
++*/
++void foo (int* bar, int* baz)
++{
++  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-3.c
+new file mode 100644
+index 000000000000..ab95fa660d25
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-load-3.c
+@@ -0,0 +1,18 @@
++/* { dg-do compile } */
++/* Verify that load mappings match Table A.6's recommended mapping.  */
++/* { dg-options "-O3" } */
++/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++/*
++** foo:
++**	fence\trw,rw
++**	lw\ta[0-9]+,0\(a0\)
++**	fence\tr,rw
++**	sw\ta[0-9]+,0\(a1\)
++**	ret
++*/
++void foo (int* bar, int* baz)
++{
++  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-1.c
+new file mode 100644
+index 000000000000..d852fddf03de
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-1.c
+@@ -0,0 +1,16 @@
++/* { dg-do compile } */
++/* Verify that store mappings match Table A.6's recommended mapping.  */
++/* { dg-options "-O3" } */
++/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++/*
++** foo:
++**	lw\ta[0-9]+,0\(a1\)
++**	sw\ta[0-9]+,0\(a0\)
++**	ret
++*/
++void foo (int* bar, int* baz)
++{
++  __atomic_store(bar, baz, __ATOMIC_RELAXED);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-2.c
+new file mode 100644
+index 000000000000..ccb5e2af7cc1
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-2.c
+@@ -0,0 +1,17 @@
++/* { dg-do compile } */
++/* Verify that store mappings match Table A.6's recommended mapping.  */
++/* { dg-options "-O3" } */
++/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++/*
++** foo:
++**	lw\ta[0-9]+,0\(a1\)
++**	fence\trw,w
++**	sw\ta[0-9]+,0\(a0\)
++**	ret
++*/
++void foo (int* bar, int* baz)
++{
++  __atomic_store(bar, baz, __ATOMIC_RELEASE);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-compat-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-compat-3.c
+new file mode 100644
+index 000000000000..761889f18cf9
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-store-compat-3.c
+@@ -0,0 +1,18 @@
++/* { dg-do compile } */
++/* Verify that store mapping are compatible with Table A.6 & A.7.  */
++/* { dg-options "-O3" } */
++/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++/*
++** foo:
++**	lw\ta[0-9]+,0\(a1\)
++**	fence\trw,w
++**	sw\ta[0-9]+,0\(a0\)
++**	fence\trw,rw
++**	ret
++*/
++void foo (int* bar, int* baz)
++{
++  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c
+new file mode 100644
+index 000000000000..d7d887dd1814
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c
+@@ -0,0 +1,9 @@
++/* { dg-do compile } */
++/* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
++/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
++/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
++
++void foo (short* bar, short* baz)
++{
++  __atomic_add_fetch(bar, baz, __ATOMIC_RELAXED);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c
+new file mode 100644
+index 000000000000..897bad26ebdf
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c
+@@ -0,0 +1,9 @@
++/* { dg-do compile } */
++/* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
++/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
++/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
++
++void foo (short* bar, short* baz)
++{
++  __atomic_add_fetch(bar, baz, __ATOMIC_ACQUIRE);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c
+new file mode 100644
+index 000000000000..79efca2839a8
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c
+@@ -0,0 +1,9 @@
++/* { dg-do compile } */
++/* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
++/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
++/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
++
++void foo (short* bar, short* baz)
++{
++  __atomic_add_fetch(bar, baz, __ATOMIC_RELEASE);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c
+new file mode 100644
+index 000000000000..772ac1be6ebc
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c
+@@ -0,0 +1,9 @@
++/* { dg-do compile } */
++/* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
++/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
++/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
++
++void foo (short* bar, short* baz)
++{
++  __atomic_add_fetch(bar, baz, __ATOMIC_ACQ_REL);
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c
+new file mode 100644
+index 000000000000..b0bec66990e0
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c
+@@ -0,0 +1,9 @@
++/* { dg-do compile } */
++/* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
++/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
++/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
++
++void foo (short* bar, short* baz)
++{
++  __atomic_add_fetch(bar, baz, __ATOMIC_SEQ_CST);
++}
+-- 
+2.39.3
+

4b6751b6a1fd054b33a57cfb942fb895b624f3e8.patch

@@ -0,0 +1,45 @@
+From 4b6751b6a1fd054b33a57cfb942fb895b624f3e8 Mon Sep 17 00:00:00 2001
+From: Patrick O'Neill <patrick@rivosinc.com>
+Date: Wed, 5 Apr 2023 09:44:57 -0700
+Subject: [PATCH] RISC-V: Enforce Libatomic LR/SC SEQ_CST
+
+Replace LR.aq/SC.rl pairs with the SEQ_CST LR.aqrl/SC.rl pairs
+recommended by table A.6 of the ISA manual.
+
+2023-04-27 Patrick O'Neill <patrick@rivosinc.com>
+
+libgcc/ChangeLog:
+
+	* config/riscv/atomic.c: Change LR.aq/SC.rl pairs into
+	sequentially consistent LR.aqrl/SC.rl pairs.
+
+Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
+---
+ libgcc/config/riscv/atomic.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/libgcc/config/riscv/atomic.c b/libgcc/config/riscv/atomic.c
+index 573d163ea049..bd2b033132ba 100644
+--- a/libgcc/config/riscv/atomic.c
++++ b/libgcc/config/riscv/atomic.c
+@@ -41,7 +41,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+     unsigned old, tmp1, tmp2;						\
+ 									\
+     asm volatile ("1:\n\t"						\
+-		  "lr.w.aq %[old], %[mem]\n\t"				\
++		  "lr.w.aqrl %[old], %[mem]\n\t"			\
+ 		  #insn " %[tmp1], %[old], %[value]\n\t"		\
+ 		  invert						\
+ 		  "and %[tmp1], %[tmp1], %[mask]\n\t"			\
+@@ -75,7 +75,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+     unsigned old, tmp1;							\
+ 									\
+     asm volatile ("1:\n\t"						\
+-		  "lr.w.aq %[old], %[mem]\n\t"				\
++		  "lr.w.aqrl %[old], %[mem]\n\t"			\
+ 		  "and %[tmp1], %[old], %[mask]\n\t"			\
+ 		  "bne %[tmp1], %[o], 1f\n\t"				\
+ 		  "and %[tmp1], %[old], %[not_mask]\n\t"		\
+-- 
+2.39.3
+

687fce7962fb56caf1c2b3ecb4cf3dd543e4f5c6.patch

@@ -0,0 +1,41 @@
+From 687fce7962fb56caf1c2b3ecb4cf3dd543e4f5c6 Mon Sep 17 00:00:00 2001
+From: Patrick O'Neill <patrick@rivosinc.com>
+Date: Wed, 5 Apr 2023 09:47:05 -0700
+Subject: [PATCH] RISC-V: Add AMO release bits
+
+This patch sets the relevant .rl bits on amo operations.
+
+2023-04-27 Patrick O'Neill <patrick@rivosinc.com>
+
+gcc/ChangeLog:
+
+	* config/riscv/riscv.cc (riscv_print_operand): Change behavior
+	of %A to include release bits.
+
+Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
+---
+ gcc/config/riscv/riscv.cc | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
+index 11b897aca5c4..df55c427b1b3 100644
+--- a/gcc/config/riscv/riscv.cc
++++ b/gcc/config/riscv/riscv.cc
+@@ -4498,8 +4498,13 @@ riscv_print_operand (FILE *file, rtx op, int letter)
+       break;
+ 
+     case 'A':
+-      if (riscv_memmodel_needs_amo_acquire (model))
++      if (riscv_memmodel_needs_amo_acquire (model)
++	  && riscv_memmodel_needs_release_fence (model))
++	fputs (".aqrl", file);
++      else if (riscv_memmodel_needs_amo_acquire (model))
+ 	fputs (".aq", file);
++      else if (riscv_memmodel_needs_release_fence (model))
++	fputs (".rl", file);
+       break;
+ 
+     case 'F':
+-- 
+2.39.3
+

71506544eef580f59e5816f0a48a67aebbe5eed5.patch

@@ -0,0 +1,349 @@
+From 71506544eef580f59e5816f0a48a67aebbe5eed5 Mon Sep 17 00:00:00 2001
+From: Patrick O'Neill <patrick@rivosinc.com>
+Date: Wed, 5 Apr 2023 09:49:20 -0700
+Subject: [PATCH] RISC-V: Weaken LR/SC pairs
+
+Introduce the %I and %J flags for setting the .aqrl bits on LR/SC pairs
+as needed.
+
+Atomic compare and exchange ops provide success and failure memory
+models. C++17 and later place no restrictions on the relative strength
+of each model, so ensure we cover both by using a model that enforces
+the ordering of both given models.
+
+This change brings LR/SC ops in line with table A.6 of the ISA manual.
+
+2023-04-27 Patrick O'Neill <patrick@rivosinc.com>
+
+gcc/ChangeLog:
+
+	* config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
+	riscv_union_memmodels function to sync.md.
+	* config/riscv/riscv.cc (riscv_union_memmodels): Add function to
+	get the union of two memmodels in sync.md.
+	(riscv_print_operand): Add %I and %J flags that output the
+	optimal LR/SC flag bits for a given memory model.
+	* config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
+	bits on SC op and replace with optimized %I, %J flags.
+
+Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
+---
+ gcc/config/riscv/riscv-protos.h |   3 +
+ gcc/config/riscv/riscv.cc       |  44 ++++++++++++
+ gcc/config/riscv/sync.md        | 114 +++++++++++++++++++-------------
+ 3 files changed, 114 insertions(+), 47 deletions(-)
+
+diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
+index 02b33e020207..b5616fb3e88c 100644
+--- a/gcc/config/riscv/riscv-protos.h
++++ b/gcc/config/riscv/riscv-protos.h
+@@ -22,6 +22,8 @@ along with GCC; see the file COPYING3.  If not see
+ #ifndef GCC_RISCV_PROTOS_H
+ #define GCC_RISCV_PROTOS_H
+ 
++#include "memmodel.h"
++
+ /* Symbol types we understand.  The order of this list must match that of
+    the unspec enum in riscv.md, subsequent to UNSPEC_ADDRESS_FIRST.  */
+ enum riscv_symbol_type {
+@@ -81,6 +83,7 @@ extern bool riscv_v_ext_vector_mode_p (machine_mode);
+ extern bool riscv_shamt_matches_mask_p (int, HOST_WIDE_INT);
+ extern void riscv_subword_address (rtx, rtx *, rtx *, rtx *, rtx *);
+ extern void riscv_lshift_subword (machine_mode, rtx, rtx, rtx *);
++extern enum memmodel riscv_union_memmodels (enum memmodel, enum memmodel);
+ 
+ /* Routines implemented in riscv-c.cc.  */
+ void riscv_cpu_cpp_builtins (cpp_reader *);
+diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
+index 951f6b5cf42d..59899268918d 100644
+--- a/gcc/config/riscv/riscv.cc
++++ b/gcc/config/riscv/riscv.cc
+@@ -4284,6 +4284,36 @@ riscv_print_operand_reloc (FILE *file, rtx op, bool hi_reloc)
+   fputc (')', file);
+ }
+ 
++/* Return the memory model that encapuslates both given models.  */
++
++enum memmodel
++riscv_union_memmodels (enum memmodel model1, enum memmodel model2)
++{
++  model1 = memmodel_base (model1);
++  model2 = memmodel_base (model2);
++
++  enum memmodel weaker = model1 <= model2 ? model1: model2;
++  enum memmodel stronger = model1 > model2 ? model1: model2;
++
++  switch (stronger)
++    {
++      case MEMMODEL_SEQ_CST:
++      case MEMMODEL_ACQ_REL:
++	return stronger;
++      case MEMMODEL_RELEASE:
++	if (weaker == MEMMODEL_ACQUIRE || weaker == MEMMODEL_CONSUME)
++	  return MEMMODEL_ACQ_REL;
++	else
++	  return stronger;
++      case MEMMODEL_ACQUIRE:
++      case MEMMODEL_CONSUME:
++      case MEMMODEL_RELAXED:
++	return stronger;
++      default:
++	gcc_unreachable ();
++    }
++}
++
+ /* Return true if the .AQ suffix should be added to an AMO to implement the
+    acquire portion of memory model MODEL.  */
+ 
+@@ -4337,6 +4367,8 @@ riscv_memmodel_needs_amo_release (enum memmodel model)
+    'R'	Print the low-part relocation associated with OP.
+    'C'	Print the integer branch condition for comparison OP.
+    'A'	Print the atomic operation suffix for memory model OP.
++   'I'	Print the LR suffix for memory model OP.
++   'J'	Print the SC suffix for memory model OP.
+    'z'	Print x0 if OP is zero, otherwise print OP normally.
+    'i'	Print i if the operand is not a register.
+    'S'	Print shift-index of single-bit mask OP.
+@@ -4506,6 +4538,18 @@ riscv_print_operand (FILE *file, rtx op, int letter)
+ 	fputs (".rl", file);
+       break;
+ 
++    case 'I':
++      if (model == MEMMODEL_SEQ_CST)
++	fputs (".aqrl", file);
++      else if (riscv_memmodel_needs_amo_acquire (model))
++	fputs (".aq", file);
++      break;
++
++    case 'J':
++      if (riscv_memmodel_needs_amo_release (model))
++	fputs (".rl", file);
++      break;
++
+     case 'i':
+       if (code != REG)
+         fputs ("i", file);
+diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md
+index 9a3b57bd09fd..3e6345e83a35 100644
+--- a/gcc/config/riscv/sync.md
++++ b/gcc/config/riscv/sync.md
+@@ -116,21 +116,22 @@
+ 	(unspec_volatile:SI
+ 	  [(any_atomic:SI (match_dup 1)
+ 		     (match_operand:SI 2 "register_operand" "rI")) ;; value for op
+-	   (match_operand:SI 3 "register_operand" "rI")]	   ;; mask
++	   (match_operand:SI 3 "const_int_operand")]		   ;; model
+ 	 UNSPEC_SYNC_OLD_OP_SUBWORD))
+-    (match_operand:SI 4 "register_operand" "rI")		   ;; not_mask
+-    (clobber (match_scratch:SI 5 "=&r"))			   ;; tmp_1
+-    (clobber (match_scratch:SI 6 "=&r"))]			   ;; tmp_2
++    (match_operand:SI 4 "register_operand" "rI")		   ;; mask
++    (match_operand:SI 5 "register_operand" "rI")		   ;; not_mask
++    (clobber (match_scratch:SI 6 "=&r"))			   ;; tmp_1
++    (clobber (match_scratch:SI 7 "=&r"))]			   ;; tmp_2
+   "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
+   {
+     return "1:\;"
+-	   "lr.w.aqrl\t%0, %1\;"
+-	   "<insn>\t%5, %0, %2\;"
+-	   "and\t%5, %5, %3\;"
+-	   "and\t%6, %0, %4\;"
+-	   "or\t%6, %6, %5\;"
+-	   "sc.w.rl\t%5, %6, %1\;"
+-	   "bnez\t%5, 1b";
++	   "lr.w%I3\t%0, %1\;"
++	   "<insn>\t%6, %0, %2\;"
++	   "and\t%6, %6, %4\;"
++	   "and\t%7, %0, %5\;"
++	   "or\t%7, %7, %6\;"
++	   "sc.w%J3\t%6, %7, %1\;"
++	   "bnez\t%6, 1b";
+   }
+   [(set (attr "length") (const_int 28))])
+ 
+@@ -151,6 +152,7 @@
+   rtx old = gen_reg_rtx (SImode);
+   rtx mem = operands[1];
+   rtx value = operands[2];
++  rtx model = operands[3];
+   rtx aligned_mem = gen_reg_rtx (SImode);
+   rtx shift = gen_reg_rtx (SImode);
+   rtx mask = gen_reg_rtx (SImode);
+@@ -162,7 +164,7 @@
+   riscv_lshift_subword (<MODE>mode, value, shift, &shifted_value);
+ 
+   emit_insn (gen_subword_atomic_fetch_strong_nand (old, aligned_mem,
+-						   shifted_value,
++						   shifted_value, model,
+ 						   mask, not_mask));
+ 
+   emit_move_insn (old, gen_rtx_ASHIFTRT (SImode, old,
+@@ -180,22 +182,23 @@
+ 	(unspec_volatile:SI
+ 	  [(not:SI (and:SI (match_dup 1)
+ 			   (match_operand:SI 2 "register_operand" "rI"))) ;; value for op
+-	   (match_operand:SI 3 "register_operand" "rI")]		  ;; mask
++	   (match_operand:SI 3 "const_int_operand")]			  ;; mask
+ 	 UNSPEC_SYNC_OLD_OP_SUBWORD))
+-    (match_operand:SI 4 "register_operand" "rI")			  ;; not_mask
+-    (clobber (match_scratch:SI 5 "=&r"))				  ;; tmp_1
+-    (clobber (match_scratch:SI 6 "=&r"))]				  ;; tmp_2
++    (match_operand:SI 4 "register_operand" "rI")			  ;; mask
++    (match_operand:SI 5 "register_operand" "rI")			  ;; not_mask
++    (clobber (match_scratch:SI 6 "=&r"))				  ;; tmp_1
++    (clobber (match_scratch:SI 7 "=&r"))]				  ;; tmp_2
+   "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
+   {
+     return "1:\;"
+-	   "lr.w.aqrl\t%0, %1\;"
+-	   "and\t%5, %0, %2\;"
+-	   "not\t%5, %5\;"
+-	   "and\t%5, %5, %3\;"
+-	   "and\t%6, %0, %4\;"
+-	   "or\t%6, %6, %5\;"
+-	   "sc.w.rl\t%5, %6, %1\;"
+-	   "bnez\t%5, 1b";
++	   "lr.w%I3\t%0, %1\;"
++	   "and\t%6, %0, %2\;"
++	   "not\t%6, %6\;"
++	   "and\t%6, %6, %4\;"
++	   "and\t%7, %0, %5\;"
++	   "or\t%7, %7, %6\;"
++	   "sc.w%J3\t%6, %7, %1\;"
++	   "bnez\t%6, 1b";
+   }
+   [(set (attr "length") (const_int 32))])
+ 
+@@ -216,6 +219,7 @@
+   rtx old = gen_reg_rtx (SImode);
+   rtx mem = operands[1];
+   rtx value = operands[2];
++  rtx model = operands[3];
+   rtx aligned_mem = gen_reg_rtx (SImode);
+   rtx shift = gen_reg_rtx (SImode);
+   rtx mask = gen_reg_rtx (SImode);
+@@ -228,7 +232,8 @@
+ 
+   emit_insn (gen_subword_atomic_fetch_strong_<atomic_optab> (old, aligned_mem,
+ 							     shifted_value,
+-							     mask, not_mask));
++							     model, mask,
++							     not_mask));
+ 
+   emit_move_insn (old, gen_rtx_ASHIFTRT (SImode, old,
+ 					 gen_lowpart (QImode, shift)));
+@@ -261,6 +266,7 @@
+   rtx old = gen_reg_rtx (SImode);
+   rtx mem = operands[1];
+   rtx value = operands[2];
++  rtx model = operands[3];
+   rtx aligned_mem = gen_reg_rtx (SImode);
+   rtx shift = gen_reg_rtx (SImode);
+   rtx mask = gen_reg_rtx (SImode);
+@@ -272,7 +278,8 @@
+   riscv_lshift_subword (<MODE>mode, value, shift, &shifted_value);
+ 
+   emit_insn (gen_subword_atomic_exchange_strong (old, aligned_mem,
+-						 shifted_value, not_mask));
++						 shifted_value, model,
++						 not_mask));
+ 
+   emit_move_insn (old, gen_rtx_ASHIFTRT (SImode, old,
+ 					 gen_lowpart (QImode, shift)));
+@@ -286,18 +293,19 @@
+ 	(match_operand:SI 1 "memory_operand" "+A"))	 ;; mem location
+    (set (match_dup 1)
+ 	(unspec_volatile:SI
+-	  [(match_operand:SI 2 "reg_or_0_operand" "rI")  ;; value
+-	   (match_operand:SI 3 "reg_or_0_operand" "rI")] ;; not_mask
++	  [(match_operand:SI 2 "reg_or_0_operand" "rI")	 ;; value
++	   (match_operand:SI 3 "const_int_operand")]	 ;; model
+       UNSPEC_SYNC_EXCHANGE_SUBWORD))
+-    (clobber (match_scratch:SI 4 "=&r"))]		 ;; tmp_1
++    (match_operand:SI 4 "reg_or_0_operand" "rI")	 ;; not_mask
++    (clobber (match_scratch:SI 5 "=&r"))]		 ;; tmp_1
+   "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
+   {
+     return "1:\;"
+-	   "lr.w.aqrl\t%0, %1\;"
+-	   "and\t%4, %0, %3\;"
+-	   "or\t%4, %4, %2\;"
+-	   "sc.w.rl\t%4, %4, %1\;"
+-	   "bnez\t%4, 1b";
++	   "lr.w%I3\t%0, %1\;"
++	   "and\t%5, %0, %4\;"
++	   "or\t%5, %5, %2\;"
++	   "sc.w%J3\t%5, %5, %1\;"
++	   "bnez\t%5, 1b";
+   }
+   [(set (attr "length") (const_int 20))])
+ 
+@@ -313,10 +321,15 @@
+    (clobber (match_scratch:GPR 6 "=&r"))]
+   "TARGET_ATOMIC"
+   {
++    enum memmodel model_success = (enum memmodel) INTVAL (operands[4]);
++    enum memmodel model_failure = (enum memmodel) INTVAL (operands[5]);
++    /* Find the union of the two memory models so we can satisfy both success
++       and failure memory models.  */
++    operands[5] = GEN_INT (riscv_union_memmodels (model_success, model_failure));
+     return "1:\;"
+-	   "lr.<amo>.aqrl\t%0,%1\;"
++	   "lr.<amo>%I5\t%0,%1\;"
+ 	   "bne\t%0,%z2,1f\;"
+-	   "sc.<amo>.rl\t%6,%z3,%1\;"
++	   "sc.<amo>%J5\t%6,%z3,%1\;"
+ 	   "bnez\t%6,1b\;"
+ 	   "1:";
+   }
+@@ -440,9 +453,15 @@
+   emit_move_insn (shifted_o, gen_rtx_AND (SImode, shifted_o, mask));
+   emit_move_insn (shifted_n, gen_rtx_AND (SImode, shifted_n, mask));
+ 
++  enum memmodel model_success = (enum memmodel) INTVAL (operands[4]);
++  enum memmodel model_failure = (enum memmodel) INTVAL (operands[5]);
++  /* Find the union of the two memory models so we can satisfy both success
++     and failure memory models.  */
++  rtx model = GEN_INT (riscv_union_memmodels (model_success, model_failure));
++
+   emit_insn (gen_subword_atomic_cas_strong (old, aligned_mem,
+ 					    shifted_o, shifted_n,
+-					    mask, not_mask));
++					    model, mask, not_mask));
+ 
+   emit_move_insn (old, gen_rtx_ASHIFTRT (SImode, old,
+ 					 gen_lowpart (QImode, shift)));
+@@ -459,19 +478,20 @@
+ 	(unspec_volatile:SI [(match_operand:SI 2 "reg_or_0_operand" "rJ")  ;; expected value
+ 			     (match_operand:SI 3 "reg_or_0_operand" "rJ")] ;; desired value
+ 	 UNSPEC_COMPARE_AND_SWAP_SUBWORD))
+-	(match_operand:SI 4 "register_operand" "rI")			   ;; mask
+-	(match_operand:SI 5 "register_operand" "rI")			   ;; not_mask
+-	(clobber (match_scratch:SI 6 "=&r"))]				   ;; tmp_1
++	(match_operand:SI 4 "const_int_operand")			   ;; model
++	(match_operand:SI 5 "register_operand" "rI")			   ;; mask
++	(match_operand:SI 6 "register_operand" "rI")			   ;; not_mask
++	(clobber (match_scratch:SI 7 "=&r"))]				   ;; tmp_1
+   "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
+   {
+     return "1:\;"
+-	   "lr.w.aqrl\t%0, %1\;"
+-	   "and\t%6, %0, %4\;"
+-	   "bne\t%6, %z2, 1f\;"
+-	   "and\t%6, %0, %5\;"
+-	   "or\t%6, %6, %3\;"
+-	   "sc.w.rl\t%6, %6, %1\;"
+-	   "bnez\t%6, 1b\;"
++	   "lr.w%I4\t%0, %1\;"
++	   "and\t%7, %0, %5\;"
++	   "bne\t%7, %z2, 1f\;"
++	   "and\t%7, %0, %6\;"
++	   "or\t%7, %7, %3\;"
++	   "sc.w%J4\t%7, %7, %1\;"
++	   "bnez\t%7, 1b\;"
+ 	   "1:";
+   }
+   [(set (attr "length") (const_int 28))])
+-- 
+2.39.3
+

74abe200bc9b06e10f0f3cad74f11da4fae90cd3.patch

@@ -0,0 +1,87 @@
+From 74abe200bc9b06e10f0f3cad74f11da4fae90cd3 Mon Sep 17 00:00:00 2001
+From: Patrick O'Neill <patrick@rivosinc.com>
+Date: Wed, 5 Apr 2023 09:56:33 -0700
+Subject: [PATCH] RISC-V: Strengthen atomic stores
+
+This change makes atomic stores strictly stronger than table A.6 of the
+ISA manual. This mapping makes the overall patchset compatible with
+table A.7 as well.
+
+2023-04-27 Patrick O'Neill <patrick@rivosinc.com>
+
+	PR target/89835
+
+gcc/ChangeLog:
+
+	* config/riscv/sync.md (atomic_store<mode>): Use simple store
+	instruction in combination with fence(s).
+
+gcc/testsuite/ChangeLog:
+
+	* gcc.target/riscv/pr89835.c: New test.
+
+Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
+---
+ gcc/config/riscv/sync.md                 | 21 ++++++++++++++++++---
+ gcc/testsuite/gcc.target/riscv/pr89835.c |  9 +++++++++
+ 2 files changed, 27 insertions(+), 3 deletions(-)
+ create mode 100644 gcc/testsuite/gcc.target/riscv/pr89835.c
+
+diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md
+index 5620d6ffa587..1acb78a9ae4c 100644
+--- a/gcc/config/riscv/sync.md
++++ b/gcc/config/riscv/sync.md
+@@ -56,7 +56,9 @@
+ 
+ ;; Atomic memory operations.
+ 
+-;; Implement atomic stores with amoswap.  Fall back to fences for atomic loads.
++;; Implement atomic stores with conservative fences.  Fall back to fences for
++;; atomic loads.
++;; This allows us to be compatible with the ISA manual Table A.6 and Table A.7.
+ (define_insn "atomic_store<mode>"
+   [(set (match_operand:GPR 0 "memory_operand" "=A")
+     (unspec_volatile:GPR
+@@ -64,9 +66,22 @@
+        (match_operand:SI 2 "const_int_operand")]      ;; model
+       UNSPEC_ATOMIC_STORE))]
+   "TARGET_ATOMIC"
+-  "%F2amoswap.<amo>%A2 zero,%z1,%0"
++  {
++    enum memmodel model = (enum memmodel) INTVAL (operands[2]);
++    model = memmodel_base (model);
++
++    if (model == MEMMODEL_SEQ_CST)
++      return "fence\trw,w\;"
++	     "s<amo>\t%z1,%0\;"
++	     "fence\trw,rw";
++    if (model == MEMMODEL_RELEASE)
++      return "fence\trw,w\;"
++	     "s<amo>\t%z1,%0";
++    else
++      return "s<amo>\t%z1,%0";
++  }
+   [(set_attr "type" "atomic")
+-   (set (attr "length") (const_int 8))])
++   (set (attr "length") (const_int 12))])
+ 
+ (define_insn "atomic_<atomic_optab><mode>"
+   [(set (match_operand:GPR 0 "memory_operand" "+A")
+diff --git a/gcc/testsuite/gcc.target/riscv/pr89835.c b/gcc/testsuite/gcc.target/riscv/pr89835.c
+new file mode 100644
+index 000000000000..ab190e11b608
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/pr89835.c
+@@ -0,0 +1,9 @@
++/* { dg-do compile } */
++/* Verify that relaxed atomic stores use simple store instuctions.  */
++/* { dg-final { scan-assembler-not "amoswap" } } */
++
++void
++foo(int bar, int baz)
++{
++  __atomic_store_n(&bar, baz, __ATOMIC_RELAXED);
++}
+-- 
+2.39.3
+

76ae6cd70f2ad4137a6d0ce32f618bc6ef2ca0b9.patch

@@ -0,0 +1,80 @@
+From 76ae6cd70f2ad4137a6d0ce32f618bc6ef2ca0b9 Mon Sep 17 00:00:00 2001
+From: Patrick O'Neill <patrick@rivosinc.com>
+Date: Wed, 5 Apr 2023 09:44:33 -0700
+Subject: [PATCH] RISC-V: Eliminate SYNC memory models
+
+Remove references to MEMMODEL_SYNC_* models by converting via
+memmodel_base().
+
+2023-04-27 Patrick O'Neill <patrick@rivosinc.com>
+
+gcc/ChangeLog:
+
+	* config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
+	sanitize memmodel input with memmodel_base.
+
+Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
+---
+ gcc/config/riscv/riscv.cc | 11 +++--------
+ 1 file changed, 3 insertions(+), 8 deletions(-)
+
+diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
+index 9c626904e893..11b897aca5c4 100644
+--- a/gcc/config/riscv/riscv.cc
++++ b/gcc/config/riscv/riscv.cc
+@@ -4294,14 +4294,11 @@ riscv_memmodel_needs_amo_acquire (enum memmodel model)
+     {
+       case MEMMODEL_ACQ_REL:
+       case MEMMODEL_SEQ_CST:
+-      case MEMMODEL_SYNC_SEQ_CST:
+       case MEMMODEL_ACQUIRE:
+       case MEMMODEL_CONSUME:
+-      case MEMMODEL_SYNC_ACQUIRE:
+ 	return true;
+ 
+       case MEMMODEL_RELEASE:
+-      case MEMMODEL_SYNC_RELEASE:
+       case MEMMODEL_RELAXED:
+ 	return false;
+ 
+@@ -4320,14 +4317,11 @@ riscv_memmodel_needs_release_fence (enum memmodel model)
+     {
+       case MEMMODEL_ACQ_REL:
+       case MEMMODEL_SEQ_CST:
+-      case MEMMODEL_SYNC_SEQ_CST:
+       case MEMMODEL_RELEASE:
+-      case MEMMODEL_SYNC_RELEASE:
+ 	return true;
+ 
+       case MEMMODEL_ACQUIRE:
+       case MEMMODEL_CONSUME:
+-      case MEMMODEL_SYNC_ACQUIRE:
+       case MEMMODEL_RELAXED:
+ 	return false;
+ 
+@@ -4366,6 +4360,7 @@ riscv_print_operand (FILE *file, rtx op, int letter)
+     }
+   machine_mode mode = GET_MODE (op);
+   enum rtx_code code = GET_CODE (op);
++  const enum memmodel model = memmodel_base (INTVAL (op));
+ 
+   switch (letter)
+     {
+@@ -4503,12 +4498,12 @@ riscv_print_operand (FILE *file, rtx op, int letter)
+       break;
+ 
+     case 'A':
+-      if (riscv_memmodel_needs_amo_acquire ((enum memmodel) INTVAL (op)))
++      if (riscv_memmodel_needs_amo_acquire (model))
+ 	fputs (".aq", file);
+       break;
+ 
+     case 'F':
+-      if (riscv_memmodel_needs_release_fence ((enum memmodel) INTVAL (op)))
++      if (riscv_memmodel_needs_release_fence (model))
+ 	fputs ("fence iorw,ow; ", file);
+       break;
+ 
+-- 
+2.39.3
+

93c4226585cc53fd86dfa3ca2d70d5b417d960b3.patch

@@ -0,0 +1,37 @@
+From 93c4226585cc53fd86dfa3ca2d70d5b417d960b3 Mon Sep 17 00:00:00 2001
+From: xuli <xuli1@eswincomputing.com>
+Date: Tue, 22 Aug 2023 06:21:00 +0000
+Subject: [PATCH] RISCV: Fix PR111074 [GCC13 BUG]
+
+his patch fixes this issue happens on GCC-13.
+https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111074
+
+This patch should be backported to GCC-13.
+GCC-14 has rewritten propagate_avl function, so there is no issue.
+
+PR target/111074
+
+gcc/ChangeLog:
+
+	* config/riscv/riscv-vsetvl.cc (extract_single_source): Fix bug.
+---
+ gcc/config/riscv/riscv-vsetvl.cc | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
+index 789eb04b78d0..bd45cb97e63b 100644
+--- a/gcc/config/riscv/riscv-vsetvl.cc
++++ b/gcc/config/riscv/riscv-vsetvl.cc
+@@ -1183,6 +1183,9 @@ extract_single_source (set_info *set)
+     return nullptr;
+   hash_set<set_info *> sets = get_all_sets (set, true, false, true);
+ 
++  if (sets.is_empty ())
++    return nullptr;
++
+   insn_info *first_insn = (*sets.begin ())->insn ();
+   if (first_insn->is_artificial ())
+     return nullptr;
+-- 
+2.39.3
+

97672bd599e32ec6d488a7532b4ad15311810a46.patch

@@ -0,0 +1,473 @@
+From 97672bd599e32ec6d488a7532b4ad15311810a46 Mon Sep 17 00:00:00 2001
+From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
+Date: Wed, 9 Aug 2023 18:51:42 +0800
+Subject: [PATCH] RISC-V: Fix VLMAX AVL incorrect local anticipate [VSETVL
+ PASS]
+
+Realize we have a bug in VSETVL PASS which is triggered by strided_load_run-1.c in RV32 system.
+
+FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-1.c execution test
+FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-1.c execution test
+FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-1.c execution test
+FAIL: gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-1.c execution test
+
+This is because VSETVL PASS incorrect hoist vsetvl instruction:
+
+...
+   10156:	0d9075d7          	vsetvli	a1,zero,e64,m2,ta,ma ---> pollute 'a1' register which will be used by following insns.
+   1015a:	01d586b3          	add	a3,a1,t4  --------> use 'a1'
+   1015e:	5e070257          	vmv.v.v	v4,v14
+   10162:	b7032257          	vmacc.vv	v4,v6,v16
+   10166:	26440257          	vand.vv	v4,v4,v8
+   1016a:	22880227          	vs2r.v	v4,(a6)
+   1016e:	00b6b7b3          	sltu	a5,a3,a1
+   10172:	22888227          	vs2r.v	v4,(a7)
+   10176:	9e60b157          	vmv2r.v	v2,v6
+   1017a:	97ba                	add	a5,a5,a4
+   1017c:	a6a62157          	vmadd.vv	v2,v12,v10
+   10180:	26240157          	vand.vv	v2,v2,v8
+   10184:	22830127          	vs2r.v	v2,(t1)
+   10188:	873e                	mv	a4,a5
+   1018a:	982a                	add	a6,a6,a0
+   1018c:	98aa                	add	a7,a7,a0
+   1018e:	932a                	add	t1,t1,a0
+   10190:	85b6                	mv	a1,a3       -----> set 'a1'
+...
+
+gcc/ChangeLog:
+
+	* config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p):
+	Fix incorrect anticipate info.
+
+gcc/testsuite/ChangeLog:
+
+	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c: Adjust tests.
+	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c: Ditto.
+	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c: Ditto.
+	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c: Ditto.
+	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c: Ditto.
+	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c: Ditto.
+	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c: Ditto.
+	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c: Ditto.
+	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c: Ditto.
+	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c: Ditto.
+	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c: Ditto.
+	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c: Ditto.
+---
+ gcc/config/riscv/riscv-vsetvl.cc              |  4 ++-
+ .../riscv/rvv/vsetvl/vlmax_back_prop-1.c      |  2 +-
+ .../riscv/rvv/vsetvl/vlmax_back_prop-2.c      |  2 +-
+ .../riscv/rvv/vsetvl/vlmax_back_prop-24.c     |  2 +-
+ .../riscv/rvv/vsetvl/vlmax_back_prop-25.c     | 31 +++++++++----------
+ .../riscv/rvv/vsetvl/vlmax_back_prop-26.c     | 30 +++++++++---------
+ .../riscv/rvv/vsetvl/vlmax_back_prop-3.c      |  2 +-
+ .../riscv/rvv/vsetvl/vlmax_back_prop-36.c     |  2 +-
+ .../riscv/rvv/vsetvl/vlmax_back_prop-4.c      |  2 +-
+ .../riscv/rvv/vsetvl/vlmax_conflict-7.c       |  2 +-
+ .../riscv/rvv/vsetvl/vlmax_switch_vtype-14.c  | 10 +++---
+ .../riscv/rvv/vsetvl/vlmax_switch_vtype-15.c  | 14 ++++-----
+ .../riscv/rvv/vsetvl/vlmax_switch_vtype-16.c  |  4 +--
+ 13 files changed, 53 insertions(+), 54 deletions(-)
+
+diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
+index fbd269881064..789eb04b78d0 100644
+--- a/gcc/config/riscv/riscv-vsetvl.cc
++++ b/gcc/config/riscv/riscv-vsetvl.cc
+@@ -330,7 +330,9 @@ anticipatable_occurrence_p (const bb_info *bb, const vector_insn_info dem)
+   if (dem.has_avl_reg ())
+     {
+       /* rs1 (avl) are not modified in the basic block prior to the VSETVL.  */
+-      if (!vlmax_avl_p (dem.get_avl ()))
++      rtx avl
++	= has_vl_op (insn->rtl ()) ? get_vl (insn->rtl ()) : dem.get_avl ();
++      if (!vlmax_avl_p (avl))
+ 	{
+ 	  set_info *set = dem.get_avl_source ();
+ 	  /* If it's undefined, it's not anticipatable conservatively.  */
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c
+index b0c40e8a0cb2..0bddcd78e9b4 100644
+--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c
++++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c
+@@ -33,4 +33,4 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+ 
+ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+ /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+-/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
++/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c
+index a09f50439249..b0a82df41a8e 100644
+--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c
++++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c
+@@ -47,4 +47,4 @@ void f (int32_t * restrict in, int32_t * restrict out, int n, int cond)
+ }
+ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+ /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+-/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
++/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c
+index bc98e5f8269f..fe41d15cb281 100644
+--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c
++++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c
+@@ -30,7 +30,7 @@ void f (int32_t * restrict in, int32_t * restrict out, int n, int cond)
+   *(vint32mf2_t*)(out + 7000) = v;
+  
+   for (int i = 0; i < n; i++) {
+-    vbool64_t v;
++    vbool64_t v = *(vbool64_t*)(in + i + 9000);
+     *(vbool64_t*)(out + i + 700) = v;
+   }
+ }
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c
+index 0a10827daf51..c566f8a4751d 100644
+--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c
++++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c
+@@ -10,7 +10,7 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vint8mf8_t*)(out + 100) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vint16mf4_t v2;
++        vint16mf4_t v2 = __riscv_vmv_v_x_i16mf4 (0, __riscv_vsetvlmax_e16mf4 ());
+         *(vint16mf4_t*)(out + i + 100) = v2;
+       }
+   } else if (cond == 1) {
+@@ -18,7 +18,7 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vint8mf8_t*)(out + 200) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vint32mf2_t v2;
++        vint32mf2_t v2 = __riscv_vmv_v_x_i32mf2 (0, __riscv_vsetvlmax_e32mf2 ());
+         *(vint32mf2_t*)(out + i + 200) = v2;
+       }
+   } else if (cond == 2) {
+@@ -26,7 +26,7 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vint8mf8_t*)(out + 300) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vint8mf8_t v2;
++        vint8mf8_t v2 = __riscv_vmv_v_x_i8mf8 (0, __riscv_vsetvlmax_e8mf8 ());
+         *(vint8mf8_t*)(out + i + 300) = v2;
+       }
+   } else if (cond == 3) {
+@@ -34,7 +34,7 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vint8mf8_t*)(out + 400) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vint64m1_t v2;
++        vint64m1_t v2 = __riscv_vmv_v_x_i64m1 (0, __riscv_vsetvlmax_e64m1 ());
+         *(vint64m1_t*)(out + i + 400) = v2;
+       }
+   } else if (cond == 4) {
+@@ -42,7 +42,7 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vint8mf8_t*)(out + 500) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vfloat32mf2_t v2;
++        vfloat32mf2_t v2 = __riscv_vfmv_v_f_f32mf2 (0, __riscv_vsetvlmax_e32mf2 ());
+         *(vfloat32mf2_t*)(out + i + 500) = v2;
+       }
+   } else if (cond == 5) {
+@@ -50,7 +50,7 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vuint8mf8_t*)(out + 600) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vuint16mf4_t v2;
++        vuint16mf4_t v2 = __riscv_vmv_v_x_u16mf4 (0, __riscv_vsetvlmax_e16mf4 ());
+         *(vuint16mf4_t*)(out + i + 600) = v2;
+       }
+   } else if (cond == 6) {
+@@ -58,7 +58,7 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vuint8mf8_t*)(out + 700) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vuint32mf2_t v2;
++        vuint32mf2_t v2 = __riscv_vmv_v_x_u32mf2 (0, __riscv_vsetvlmax_e32mf2 ());
+         *(vuint32mf2_t*)(out + i + 700) = v2;
+       }
+   } else if (cond == 7) {
+@@ -66,7 +66,7 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vuint8mf8_t*)(out + 800) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vuint8mf8_t v2;
++        vuint8mf8_t v2 = __riscv_vmv_v_x_u8mf8 (0, __riscv_vsetvlmax_e8mf8 ());
+         *(vuint8mf8_t*)(out + i + 800) = v2;
+       }
+   } else if (cond == 8) {
+@@ -74,7 +74,7 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vuint8mf8_t*)(out + 900) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vuint64m1_t v2;
++        vuint64m1_t v2 = __riscv_vmv_v_x_u64m1 (0, __riscv_vsetvlmax_e64m1 ());
+         *(vuint64m1_t*)(out + i + 900) = v2;
+       }
+   } else {
+@@ -82,15 +82,14 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vuint8mf8_t*)(out + 1000) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vfloat32mf2_t v2;
++        vfloat32mf2_t v2 = *(vfloat32mf2_t*)(in + i + 9000);
+         *(vfloat32mf2_t*)(out + i + 1000) = v2;
+       }
+   }
+ }
+ 
+-/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+-/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+-/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+-/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 10 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+-/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+-/* { dg-final { scan-assembler-times {vsetvli} 20 { target { no-opts "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
++/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
++/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
++/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
++/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
++/* { dg-final { scan-assembler-times {vsetvli} 10 { target { no-opts "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c
+index a65407513986..d0e752581889 100644
+--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c
++++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c
+@@ -10,7 +10,7 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vint8mf8_t*)(out + 100) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vint16mf4_t v2;
++        vint16mf4_t v2 = __riscv_vmv_v_x_i16mf4 (0, __riscv_vsetvlmax_e16mf4 ());
+         *(vint16mf4_t*)(out + i + 100) = v2;
+       }
+   } else if (cond == 1) {
+@@ -18,7 +18,7 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vint8mf8_t*)(out + 200) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vint32mf2_t v2;
++        vint32mf2_t v2 = __riscv_vmv_v_x_i32mf2 (0, __riscv_vsetvlmax_e32mf2 ());
+         *(vint32mf2_t*)(out + i + 200) = v2;
+       }
+   } else if (cond == 2) {
+@@ -26,7 +26,7 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vint8mf8_t*)(out + 300) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vint8mf8_t v2;
++        vint8mf8_t v2 = __riscv_vmv_v_x_i8mf8 (0, __riscv_vsetvlmax_e8mf8 ());
+         *(vint8mf8_t*)(out + i + 300) = v2;
+       }
+   } else if (cond == 3) {
+@@ -34,7 +34,7 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vint8mf8_t*)(out + 400) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vint64m1_t v2;
++        vint64m1_t v2 = __riscv_vmv_v_x_i64m1 (0, __riscv_vsetvlmax_e64m1 ());
+         *(vint64m1_t*)(out + i + 400) = v2;
+       }
+   } else if (cond == 4) {
+@@ -42,7 +42,7 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vint8mf8_t*)(out + 500) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vfloat32mf2_t v2;
++        vfloat32mf2_t v2 = __riscv_vfmv_v_f_f32mf2 (0, __riscv_vsetvlmax_e32mf2 ());
+         *(vfloat32mf2_t*)(out + i + 500) = v2;
+       }
+   } else if (cond == 5) {
+@@ -50,7 +50,7 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vuint8mf8_t*)(out + 600) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vuint16mf4_t v2;
++        vuint16mf4_t v2 = __riscv_vmv_v_x_u16mf4 (0, __riscv_vsetvlmax_e16mf4 ());
+         *(vuint16mf4_t*)(out + i + 600) = v2;
+       }
+   } else if (cond == 6) {
+@@ -58,7 +58,7 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vuint8mf8_t*)(out + 700) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vuint32mf2_t v2;
++        vuint32mf2_t v2 = __riscv_vmv_v_x_u32mf2 (0, __riscv_vsetvlmax_e32mf2 ());
+         *(vuint32mf2_t*)(out + i + 700) = v2;
+       }
+   } else if (cond == 7) {
+@@ -66,7 +66,7 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vuint8mf8_t*)(out + 800) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vuint8mf8_t v2;
++        vuint8mf8_t v2 = __riscv_vmv_v_x_u8mf8 (0, __riscv_vsetvlmax_e8mf8 ());
+         *(vuint8mf8_t*)(out + i + 800) = v2;
+       }
+   } else if (cond == 8) {
+@@ -74,16 +74,14 @@ void f (void * restrict in, void * restrict out, int n, int cond)
+     *(vuint8mf8_t*)(out + 900) = v;
+     for (int i = 0; i < n; i++)
+       {
+-        vuint64m1_t v2;
++        vuint64m1_t v2 = *(vuint64m1_t*)(in + i + 9000);
+         *(vuint64m1_t*)(out + i + 900) = v2;
+       }
+   }
+ }
+ 
+-/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+-/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+-/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+-/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+-/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+-/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 8 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+-/* { dg-final { scan-assembler-times {vsetvli} 17 { target { no-opts "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
++/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
++/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
++/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
++/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
++/* { dg-final { scan-assembler-times {vsetvli} 9 { target { no-opts "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c
+index a16c5f506347..334c0756f993 100644
+--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c
++++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c
+@@ -43,5 +43,5 @@ void f (int32_t * restrict in, int32_t * restrict out, int n, int cond)
+ }
+ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+ /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0"  no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+-/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
++/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+ 
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c
+index a6009b74101d..9be774c958b5 100644
+--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c
++++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c
+@@ -37,7 +37,7 @@ void f (int32_t * restrict in, int32_t * restrict out, int32_t * restrict in2, i
+    }
+   for (int i = 0; i < n; i++) 
+     {
+-      vint8mf8_t v1;
++      vint8mf8_t v1 = *(vint8mf8_t*)(in2 + i + 20);
+       *(vint8mf8_t*)(out + i + 10) = v1;
+     }
+ }
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c
+index fd2ba4470e6f..2f7f0ce81dac 100644
+--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c
++++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c
+@@ -100,5 +100,5 @@ void f (int32_t * restrict in, int32_t * restrict out, int n, int cond)
+ }
+ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+ /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0"  no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+-/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
++/* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+ 
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c
+index 60ad108666f8..b5ba532db098 100644
+--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c
++++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c
+@@ -20,6 +20,6 @@ void f (int32_t * restrict in, int32_t * restrict out, size_t n, size_t cond, si
+     }
+ }
+ 
+-/* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
++/* { dg-final { scan-assembler-times {vsetvli} 5 { target { no-opts "-O0"  no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+ /* { dg-final { scan-assembler-times {j\s+\.L[0-9]+\s+\.L[0-9]+:\s+vlm\.v} 1 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*m8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0" no-opts "-O1"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c
+index f416a231f0e0..1fc97f8b6f2d 100644
+--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c
++++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c
+@@ -6,7 +6,7 @@
+ void f (void * restrict in, void * restrict out, int32_t * a, int32_t * b, int n, int cond)
+ {
+   for (int i = 0; i < n; i++) {
+-    vint16mf4_t v;
++    vint16mf4_t v = __riscv_vmv_v_x_i16mf4 (0, __riscv_vsetvlmax_e16mf4 ());
+     *(vint16mf4_t*)(out + i + 700) = v;
+   }
+   for (int i = 0; i < n; i++) {
+@@ -19,15 +19,15 @@ void f (void * restrict in, void * restrict out, int32_t * a, int32_t * b, int n
+     a[i] = a[i] - b[i];
+   }
+   for (int i = 0; i < n; i++) {
+-    vint32mf2_t v;
++    vint32mf2_t v = __riscv_vmv_v_x_i32mf2 (0, __riscv_vsetvlmax_e32mf2 ());
+     *(vint32mf2_t*)(out + i + 7000) = v;
+   }
+   for (int i = 0; i < n; i++) {
+-    vint64m1_t v;
++    vint64m1_t v = __riscv_vmv_v_x_i64m1 (0, __riscv_vsetvlmax_e64m1 ());
+     *(vint64m1_t*)(out + i + 8000) = v;
+   }
+   for (int i = 0; i < n; i++) {
+-    vint8mf8_t v;
++    vint8mf8_t v = __riscv_vmv_v_x_i8mf8 (0, __riscv_vsetvlmax_e8mf8 ());
+     *(vint8mf8_t*)(out + i + 9000) = v;
+   }
+ }
+@@ -36,4 +36,4 @@ void f (void * restrict in, void * restrict out, int32_t * a, int32_t * b, int n
+ /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-flto" no-opts "-g" } } } } */
+ /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0"  no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-flto" no-opts "-g" } } } } */
+ /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0"  no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-flto" no-opts "-g" } } } } */
+-/* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-Os" no-opts "-Oz" no-opts "-flto" no-opts "-g" } } } } */
++/* { dg-final { scan-assembler-times {vsetvli} 4 { target { no-opts "-O0" "-O1" no-opts "-funroll-loops" no-opts "-Os" no-opts "-Oz" no-opts "-flto" no-opts "-g" } } } } */
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c
+index a39b48ccb998..f3b37661fbeb 100644
+--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c
++++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c
+@@ -6,7 +6,7 @@
+ void f (void * restrict in, void * restrict out, int32_t * a, int32_t * b, int n, int cond)
+ {
+   for (int i = 0; i < n; i++) {
+-    vint16mf4_t v;
++    vint16mf4_t v = __riscv_vmv_v_x_i16mf4 (0, __riscv_vsetvlmax_e16mf4 ());
+     *(vint16mf4_t*)(out + i + 700) = v;
+   }
+   for (int i = 0; i < n; i++) {
+@@ -19,27 +19,27 @@ void f (void * restrict in, void * restrict out, int32_t * a, int32_t * b, int n
+     a[i] = a[i] - b[i];
+   }
+   for (int i = 0; i < n; i++) {
+-    vint32mf2_t v;
++    vint32mf2_t v = __riscv_vmv_v_x_i32mf2 (0, __riscv_vsetvlmax_e32mf2 ());
+     *(vint32mf2_t*)(out + i + 7000) = v;
+   }
+   for (int i = 0; i < n; i++) {
+-    vint16mf2_t v;
++    vint16mf2_t v = __riscv_vmv_v_x_i16mf2 (0, __riscv_vsetvlmax_e16mf2 ());
+     *(vint16mf2_t*)(out + i + 777) = v;
+   }
+   for (int i = 0; i < n; i++) {
+-    vint64m1_t v;
++    vint64m1_t v = __riscv_vmv_v_x_i64m1 (0, __riscv_vsetvlmax_e64m1 ());
+     *(vint64m1_t*)(out + i + 8000) = v;
+   }
+   for (int i = 0; i < n; i++) {
+-    vfloat32mf2_t v;
++    vfloat32mf2_t v = __riscv_vfmv_v_f_f32mf2 (0, __riscv_vsetvlmax_e32mf2 ());
+     *(vfloat32mf2_t*)(out + i + 7777) = v;
+   }
+   for (int i = 0; i < n; i++) {
+-    vuint16mf2_t v;
++    vuint16mf2_t v = __riscv_vmv_v_x_u16mf2 (0, __riscv_vsetvlmax_e16mf2 ());
+     *(vuint16mf2_t*)(out + i + 888) = v;
+   }
+   for (int i = 0; i < n; i++) {
+-    vint8mf8_t v;
++    vint8mf8_t v = __riscv_vmv_v_x_i8mf8 (0, __riscv_vsetvlmax_e8mf8 ());
+     *(vint8mf8_t*)(out + i + 9000) = v;
+   }
+ }
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c
+index 1ab92df0fdca..8e04fe8c9f6f 100644
+--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c
++++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c
+@@ -55,6 +55,6 @@ void f (void * restrict in, void * restrict out, int32_t * a, int32_t * b, int n
+ /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e32,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0" no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-flto" no-opts "-g" } } } } */
+ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf2,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0"  no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-flto" no-opts "-g" } } } } */
+ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e64,\s*m1,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0"  no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-flto" no-opts "-g" } } } } */
+-/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0"  no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-flto" no-opts "-g" } } } } */
++/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 2 { target { no-opts "-O0"  no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-flto" no-opts "-g" } } } } */
+ /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 3 { target { no-opts "-O0"  no-opts "-funroll-loops" no-opts "-O1" no-opts "-Os" no-opts "-Oz" no-opts "-flto" no-opts "-g" } } } } */
+-/* { dg-final { scan-assembler-times {vsetvli} 10 { target { no-opts "-O0" no-opts "-O1" no-opts "-funroll-loops" no-opts "-Os" no-opts "-Oz" no-opts "-flto" no-opts "-g" } } } } */
++/* { dg-final { scan-assembler-times {vsetvli} 11 { target { no-opts "-O0" no-opts "-O1" no-opts "-funroll-loops" no-opts "-Os" no-opts "-Oz" no-opts "-flto" no-opts "-g" } } } } */
+-- 
+2.39.3
+

9f8d1d448e6c10fbad3bb41f4d7322fac8df4cd0.patch

@@ -0,0 +1,137 @@
+From 9f8d1d448e6c10fbad3bb41f4d7322fac8df4cd0 Mon Sep 17 00:00:00 2001
+From: Li Xu <xuli1@eswincomputing.com>
+Date: Wed, 10 May 2023 04:02:13 +0000
+Subject: [PATCH] RISC-V: Insert vsetivli zero, 0 for vmv.x.s/vfmv.f.s
+ instructions satisfying REG_P(operand[1]) in -O0.
+
+This issue happens is because the operand1 of scalar move can be
+REG_P (operand[1]) in the O0 case, which causes the VSETVL PASS to
+not insert the vsetvl instruction correctly, and the compiler crashes.
+
+Consider this following case:
+int16_t foo1 (void *base, size_t vl)
+{
+    int16_t maxVal = __riscv_vmv_x_s_i16m1_i16 (__riscv_vle16_v_i16m1 (base, vl));
+    return maxVal;
+}
+
+Before this patch:
+bug.c:15:1: internal compiler error: Segmentation fault
+   15 | }
+      | ^
+0x145d723 crash_signal
+	../.././riscv-gcc/gcc/toplev.cc:314
+0x22929dd const_csr_operand(rtx_def*, machine_mode)
+	../.././riscv-gcc/gcc/config/riscv/predicates.md:44
+0x2292a21 csr_operand(rtx_def*, machine_mode)
+	../.././riscv-gcc/gcc/config/riscv/predicates.md:46
+0x23dfbb0 recog_356
+	../.././riscv-gcc/gcc/config/riscv/iterators.md:72
+0x23efecd recog(rtx_def*, rtx_insn*, int*)
+	../.././riscv-gcc/gcc/config/riscv/iterators.md:89
+0xdddc15 recog_memoized(rtx_insn*)
+	../.././riscv-gcc/gcc/recog.h:273
+
+After this patch:
+	vsetivli	zero,0,e16,m1,ta,ma
+	vmv.x.s	a5,v1
+
+gcc/ChangeLog:
+
+	* config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
+	intruction replace null avl with (const_int 0).
+
+gcc/testsuite/ChangeLog:
+
+	* gcc.target/riscv/rvv/base/scalar_move-10.c: New test.
+	* gcc.target/riscv/rvv/base/scalar_move-11.c: New test.
+---
+ gcc/config/riscv/riscv-vsetvl.cc              |  5 +++
+ .../riscv/rvv/base/scalar_move-10.c           | 31 +++++++++++++++++++
+ .../riscv/rvv/base/scalar_move-11.c           | 20 ++++++++++++
+ 3 files changed, 56 insertions(+)
+ create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-10.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-11.c
+
+diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
+index bd45cb97e63b..0cf4bc818e2a 100644
+--- a/gcc/config/riscv/riscv-vsetvl.cc
++++ b/gcc/config/riscv/riscv-vsetvl.cc
+@@ -618,6 +618,11 @@ static rtx
+ gen_vsetvl_pat (enum vsetvl_type insn_type, const vl_vtype_info &info, rtx vl)
+ {
+   rtx avl = info.get_avl ();
++  /* if optimization == 0 and the instruction is vmv.x.s/vfmv.f.s,
++     set the value of avl to (const_int 0) so that VSETVL PASS will
++     insert vsetvl correctly.*/
++  if (info.has_avl_no_reg ())
++    avl = GEN_INT (0);
+   rtx sew = gen_int_mode (info.get_sew (), Pmode);
+   rtx vlmul = gen_int_mode (info.get_vlmul (), Pmode);
+   rtx ta = gen_int_mode (info.get_ta (), Pmode);
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-10.c b/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-10.c
+new file mode 100644
+index 000000000000..9760d77fb22b
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-10.c
+@@ -0,0 +1,31 @@
++/* { dg-do compile } */
++/* { dg-options "-march=rv64gcv -mabi=lp64d -O0" } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++#include "riscv_vector.h"
++
++/*
++** foo1:
++** ...
++** vsetivli\tzero,0,e16,m1,t[au],m[au]
++** vmv.x.s\t[a-x0-9]+,v[0-9]+
++** ...
++*/
++int16_t foo1 (void *base, size_t vl)
++{
++    int16_t maxVal = __riscv_vmv_x_s_i16m1_i16 (__riscv_vle16_v_i16m1 (base, vl));
++    return maxVal;
++}
++
++/*
++** foo2:
++** ...
++** vsetivli\tzero,0,e32,m1,t[au],m[au]
++** vfmv.f.s\tf[a-x0-9]+,v[0-9]+
++** ...
++*/
++float foo2 (void *base, size_t vl)
++{
++    float maxVal = __riscv_vfmv_f_s_f32m1_f32 (__riscv_vle32_v_f32m1 (base, vl));
++    return maxVal;
++}
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-11.c b/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-11.c
+new file mode 100644
+index 000000000000..8036acd0a529
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-11.c
+@@ -0,0 +1,20 @@
++/* { dg-do compile } */
++/* { dg-options "-march=rv32gcv -mabi=ilp32d -O0" } */
++/* { dg-final { check-function-bodies "**" "" } } */
++
++#include "riscv_vector.h"
++
++/*
++** foo:
++** ...
++** vsetivli\tzero,0,e64,m4,t[au],m[au]
++** vmv.x.s\t[a-x0-9]+,v[0-9]+
++** vsetivli\tzero,0,e64,m4,t[au],m[au]
++** vmv.x.s\t[a-x0-9]+,v[0-9]+
++** ...
++*/
++int16_t foo (void *base, size_t vl)
++{
++    int16_t maxVal = __riscv_vmv_x_s_i64m4_i64 (__riscv_vle64_v_i64m4 (base, vl));
++    return maxVal;
++}
+-- 
+2.39.3
+

a8a7ba2e295908f40bb6f3b0965c298fb8228e22.patch

@@ -0,0 +1,30 @@
+From a8a7ba2e295908f40bb6f3b0965c298fb8228e22 Mon Sep 17 00:00:00 2001
+From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
+Date: Wed, 23 Aug 2023 07:06:50 +0800
+Subject: [PATCH] RISC-V: Add riscv-vsetvl.def to t-riscv
+
+This patch will be backport to GCC 13 and commit to trunk.
+gcc/ChangeLog:
+
+	* config/riscv/t-riscv: Add riscv-vsetvl.def
+---
+ gcc/config/riscv/t-riscv | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/gcc/config/riscv/t-riscv b/gcc/config/riscv/t-riscv
+index 1252d6f851ac..f3ce66ccdd4f 100644
+--- a/gcc/config/riscv/t-riscv
++++ b/gcc/config/riscv/t-riscv
+@@ -62,7 +62,8 @@ riscv-vsetvl.o: $(srcdir)/config/riscv/riscv-vsetvl.cc \
+   $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) $(REGS_H) \
+   $(TARGET_H) tree-pass.h df.h rtl-ssa.h cfgcleanup.h insn-config.h \
+   insn-attr.h insn-opinit.h tm-constrs.h cfgrtl.h cfganal.h lcm.h \
+-  predict.h profile-count.h $(srcdir)/config/riscv/riscv-vsetvl.h
++  predict.h profile-count.h $(srcdir)/config/riscv/riscv-vsetvl.h \
++  $(srcdir)/config/riscv/riscv-vsetvl.def
+ 	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
+ 		$(srcdir)/config/riscv/riscv-vsetvl.cc
+ 
+-- 
+2.39.3
+

b81d476756a1f17617f0837761785c4b5d1d195d.patch

@@ -0,0 +1,103 @@
+From b81d476756a1f17617f0837761785c4b5d1d195d Mon Sep 17 00:00:00 2001
+From: Dimitar Dimitrov <dimitar@dinux.eu>
+Date: Mon, 5 Jun 2023 21:39:16 +0300
+Subject: [PATCH] riscv: Fix scope for memory model calculation
+
+During libgcc configure stage for riscv32-none-elf, when
+"--enable-checking=yes,rtl" has been activated, the following error
+is observed:
+
+  during RTL pass: final
+  conftest.c: In function 'main':
+  conftest.c:16:1: internal compiler error: RTL check: expected code 'const_int', have 'reg' in riscv_print_operand, at config/riscv/riscv.cc:4462
+     16 | }
+        | ^
+  0x843c4d rtl_check_failed_code1(rtx_def const*, rtx_code, char const*, int, char const*)
+          /mnt/nvme/dinux/local-workspace/gcc/gcc/rtl.cc:916
+  0x8ea823 riscv_print_operand
+          /mnt/nvme/dinux/local-workspace/gcc/gcc/config/riscv/riscv.cc:4462
+  0xde84b5 output_operand(rtx_def*, int)
+          /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:3632
+  0xde8ef8 output_asm_insn(char const*, rtx_def**)
+          /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:3544
+  0xded33b output_asm_insn(char const*, rtx_def**)
+          /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:3421
+  0xded33b final_scan_insn_1
+          /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:2841
+  0xded6cb final_scan_insn(rtx_insn*, _IO_FILE*, int, int, int*)
+          /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:2887
+  0xded8b7 final_1
+          /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:1979
+  0xdee518 rest_of_handle_final
+          /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:4240
+  0xdee518 execute
+          /mnt/nvme/dinux/local-workspace/gcc/gcc/final.cc:4318
+
+Fix by moving the calculation of memmodel to the cases where it is used.
+
+Regression tested for riscv32-none-elf. No changes in gcc.sum and
+g++.sum.
+
+	PR target/109725
+
+gcc/ChangeLog:
+
+	* config/riscv/riscv.cc (riscv_print_operand): Calculate
+	memmodel only when it is valid.
+
+Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
+---
+ gcc/config/riscv/riscv.cc | 13 +++++++++----
+ 1 file changed, 9 insertions(+), 4 deletions(-)
+
+diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
+index 59899268918d..01eebc83cc58 100644
+--- a/gcc/config/riscv/riscv.cc
++++ b/gcc/config/riscv/riscv.cc
+@@ -4391,7 +4391,6 @@ riscv_print_operand (FILE *file, rtx op, int letter)
+     }
+   machine_mode mode = GET_MODE (op);
+   enum rtx_code code = GET_CODE (op);
+-  const enum memmodel model = memmodel_base (INTVAL (op));
+ 
+   switch (letter)
+     {
+@@ -4528,7 +4527,8 @@ riscv_print_operand (FILE *file, rtx op, int letter)
+       fputs (GET_RTX_NAME (code), file);
+       break;
+ 
+-    case 'A':
++    case 'A': {
++      const enum memmodel model = memmodel_base (INTVAL (op));
+       if (riscv_memmodel_needs_amo_acquire (model)
+ 	  && riscv_memmodel_needs_amo_release (model))
+ 	fputs (".aqrl", file);
+@@ -4537,18 +4537,23 @@ riscv_print_operand (FILE *file, rtx op, int letter)
+       else if (riscv_memmodel_needs_amo_release (model))
+ 	fputs (".rl", file);
+       break;
++    }
+ 
+-    case 'I':
++    case 'I': {
++      const enum memmodel model = memmodel_base (INTVAL (op));
+       if (model == MEMMODEL_SEQ_CST)
+ 	fputs (".aqrl", file);
+       else if (riscv_memmodel_needs_amo_acquire (model))
+ 	fputs (".aq", file);
+       break;
++    }
+ 
+-    case 'J':
++    case 'J': {
++      const enum memmodel model = memmodel_base (INTVAL (op));
+       if (riscv_memmodel_needs_amo_release (model))
+ 	fputs (".rl", file);
+       break;
++    }
+ 
+     case 'i':
+       if (code != REG)
+-- 
+2.39.3
+

cb398a612ed5f5110adaaaea338447b6e933067d.patch

@@ -0,0 +1,117 @@
+From cb398a612ed5f5110adaaaea338447b6e933067d Mon Sep 17 00:00:00 2001
+From: Patrick O'Neill <patrick@rivosinc.com>
+Date: Wed, 5 Apr 2023 09:48:06 -0700
+Subject: [PATCH] RISC-V: Eliminate AMO op fences
+
+Atomic operations with the appropriate bits set already enfore release
+semantics. Remove unnecessary release fences from atomic ops.
+
+This change brings AMO ops in line with table A.6 of the ISA manual.
+
+2023-04-27 Patrick O'Neill <patrick@rivosinc.com>
+
+gcc/ChangeLog:
+
+	* config/riscv/riscv.cc
+	(riscv_memmodel_needs_amo_release): Change function name.
+	(riscv_print_operand): Remove unneeded %F case.
+	* config/riscv/sync.md: Remove unneeded fences.
+
+Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
+---
+ gcc/config/riscv/riscv.cc | 16 +++++-----------
+ gcc/config/riscv/sync.md  | 12 ++++++------
+ 2 files changed, 11 insertions(+), 17 deletions(-)
+
+diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
+index df55c427b1b3..951f6b5cf42d 100644
+--- a/gcc/config/riscv/riscv.cc
++++ b/gcc/config/riscv/riscv.cc
+@@ -4307,11 +4307,11 @@ riscv_memmodel_needs_amo_acquire (enum memmodel model)
+     }
+ }
+ 
+-/* Return true if a FENCE should be emitted to before a memory access to
+-   implement the release portion of memory model MODEL.  */
++/* Return true if the .RL suffix should be added to an AMO to implement the
++   release portion of memory model MODEL.  */
+ 
+ static bool
+-riscv_memmodel_needs_release_fence (enum memmodel model)
++riscv_memmodel_needs_amo_release (enum memmodel model)
+ {
+   switch (model)
+     {
+@@ -4337,7 +4337,6 @@ riscv_memmodel_needs_release_fence (enum memmodel model)
+    'R'	Print the low-part relocation associated with OP.
+    'C'	Print the integer branch condition for comparison OP.
+    'A'	Print the atomic operation suffix for memory model OP.
+-   'F'	Print a FENCE if the memory model requires a release.
+    'z'	Print x0 if OP is zero, otherwise print OP normally.
+    'i'	Print i if the operand is not a register.
+    'S'	Print shift-index of single-bit mask OP.
+@@ -4499,19 +4498,14 @@ riscv_print_operand (FILE *file, rtx op, int letter)
+ 
+     case 'A':
+       if (riscv_memmodel_needs_amo_acquire (model)
+-	  && riscv_memmodel_needs_release_fence (model))
++	  && riscv_memmodel_needs_amo_release (model))
+ 	fputs (".aqrl", file);
+       else if (riscv_memmodel_needs_amo_acquire (model))
+ 	fputs (".aq", file);
+-      else if (riscv_memmodel_needs_release_fence (model))
++      else if (riscv_memmodel_needs_amo_release (model))
+ 	fputs (".rl", file);
+       break;
+ 
+-    case 'F':
+-      if (riscv_memmodel_needs_release_fence (model))
+-	fputs ("fence iorw,ow; ", file);
+-      break;
+-
+     case 'i':
+       if (code != REG)
+         fputs ("i", file);
+diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md
+index 1acb78a9ae4c..9a3b57bd09fd 100644
+--- a/gcc/config/riscv/sync.md
++++ b/gcc/config/riscv/sync.md
+@@ -91,9 +91,9 @@
+ 	   (match_operand:SI 2 "const_int_operand")] ;; model
+ 	 UNSPEC_SYNC_OLD_OP))]
+   "TARGET_ATOMIC"
+-  "%F2amo<insn>.<amo>%A2 zero,%z1,%0"
++  "amo<insn>.<amo>%A2\tzero,%z1,%0"
+   [(set_attr "type" "atomic")
+-   (set (attr "length") (const_int 8))])
++   (set (attr "length") (const_int 4))])
+ 
+ (define_insn "atomic_fetch_<atomic_optab><mode>"
+   [(set (match_operand:GPR 0 "register_operand" "=&r")
+@@ -105,9 +105,9 @@
+ 	   (match_operand:SI 3 "const_int_operand")] ;; model
+ 	 UNSPEC_SYNC_OLD_OP))]
+   "TARGET_ATOMIC"
+-  "%F3amo<insn>.<amo>%A3 %0,%z2,%1"
++  "amo<insn>.<amo>%A3\t%0,%z2,%1"
+   [(set_attr "type" "atomic")
+-   (set (attr "length") (const_int 8))])
++   (set (attr "length") (const_int 4))])
+ 
+ (define_insn "subword_atomic_fetch_strong_<atomic_optab>"
+   [(set (match_operand:SI 0 "register_operand" "=&r")		   ;; old value at mem
+@@ -247,9 +247,9 @@
+    (set (match_dup 1)
+ 	(match_operand:GPR 2 "register_operand" "0"))]
+   "TARGET_ATOMIC"
+-  "%F3amoswap.<amo>%A3 %0,%z2,%1"
++  "amoswap.<amo>%A3\t%0,%z2,%1"
+   [(set_attr "type" "atomic")
+-   (set (attr "length") (const_int 8))])
++   (set (attr "length") (const_int 4))])
+ 
+ (define_expand "atomic_exchange<mode>"
+   [(match_operand:SHORT 0 "register_operand") ;; old value at mem
+-- 
+2.39.3
+

e0bd6c2bee0614fc4112a0a86a808edd0d550b6f.patch

@@ -0,0 +1,63 @@
+From e0bd6c2bee0614fc4112a0a86a808edd0d550b6f Mon Sep 17 00:00:00 2001
+From: Patrick O'Neill <patrick@rivosinc.com>
+Date: Fri, 21 Apr 2023 13:11:35 -0700
+Subject: [PATCH] RISC-V: Enforce subword atomic LR/SC SEQ_CST
+
+Replace LR.aq/SC.rl pairs with the SEQ_CST LR.aqrl/SC.rl pairs
+recommended by table A.6 of the ISA manual.
+
+2023-04-27 Patrick O'Neill <patrick@rivosinc.com>
+
+gcc/ChangeLog:
+
+	* config/riscv/sync.md: Change LR.aq/SC.rl pairs into
+	sequentially consistent LR.aqrl/SC.rl pairs.
+
+Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
+---
+ gcc/config/riscv/sync.md | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md
+index 192745282626..0c83ef046070 100644
+--- a/gcc/config/riscv/sync.md
++++ b/gcc/config/riscv/sync.md
+@@ -109,7 +109,7 @@
+   "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
+   {
+     return "1:\;"
+-	   "lr.w.aq\t%0, %1\;"
++	   "lr.w.aqrl\t%0, %1\;"
+ 	   "<insn>\t%5, %0, %2\;"
+ 	   "and\t%5, %5, %3\;"
+ 	   "and\t%6, %0, %4\;"
+@@ -173,7 +173,7 @@
+   "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
+   {
+     return "1:\;"
+-	   "lr.w.aq\t%0, %1\;"
++	   "lr.w.aqrl\t%0, %1\;"
+ 	   "and\t%5, %0, %2\;"
+ 	   "not\t%5, %5\;"
+ 	   "and\t%5, %5, %3\;"
+@@ -278,7 +278,7 @@
+   "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
+   {
+     return "1:\;"
+-	   "lr.w.aq\t%0, %1\;"
++	   "lr.w.aqrl\t%0, %1\;"
+ 	   "and\t%4, %0, %3\;"
+ 	   "or\t%4, %4, %2\;"
+ 	   "sc.w.rl\t%4, %4, %1\;"
+@@ -443,7 +443,7 @@
+   "TARGET_ATOMIC && TARGET_INLINE_SUBWORD_ATOMIC"
+   {
+     return "1:\;"
+-	   "lr.w.aq\t%0, %1\;"
++	   "lr.w.aqrl\t%0, %1\;"
+ 	   "and\t%6, %0, %4\;"
+ 	   "bne\t%6, %z2, 1f\;"
+ 	   "and\t%6, %0, %5\;"
+-- 
+2.39.3
+

ffd676ef2c9849231626a532343c7ec908558c33.patch

@@ -0,0 +1,239 @@
+From ffd676ef2c9849231626a532343c7ec908558c33 Mon Sep 17 00:00:00 2001
+From: yulong <shiyulong@iscas.ac.cn>
+Date: Tue, 8 Aug 2023 12:12:32 +0800
+Subject: [PATCH] RISC-V: Fix a bug that causes an error insn.
+MIME-Version: 1.0
+Content-Type: text/plain; charset=utf8
+Content-Transfer-Encoding: 8bit
+
+I test the following rvv intrinsics.
+vint64m1_t test_vslide1up_vx_i64m1_m(vbool64_t mask, vint64m1_t src, int64_t value, size_t vl) {
+  return __riscv_vslide1up_vx_i64m1_m(mask, src, value, vl);
+}
+And I got an error info,t hat is error:
+  unrecognizable insn:(insn 17 16 18 2
+    (set (reg:RVVMIDI 134 [ _1 ])(if_then_else:RVVMIDI
+      (unspec:RVVMF64BI [(reg/v:SI 142 [ vl ])(const_int 2 [x2])(const_int 日 [o])(reg:SI 66 vl)(reg:SI 67 vtype)] UNSPEC_VPREDICATE
+   (vec_merge:RVVMIDI (reg:RVVMIDI 134 [ _1 ])(unspec:RVVMIDI [(reg:sI 日 zero)] UNSPEC_VUNDEF)
+   (reg/v:RVVMF64BI 137 [ mask ]))
+   (unspec:RVVM1DI[(reg:sI 日 zero)] UNSPEC_VUNDEF)))
+
+This patch fix it.
+
+gcc/ChangeLog:
+
+	* config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
+
+gcc/testsuite/ChangeLog:
+
+	* gcc.target/riscv/rvv/base/vslide1down-1.c: New test.
+	* gcc.target/riscv/rvv/base/vslide1down-2.c: New test.
+	* gcc.target/riscv/rvv/base/vslide1down-3.c: New test.
+	* gcc.target/riscv/rvv/base/vslide1up-1.c: New test.
+	* gcc.target/riscv/rvv/base/vslide1up-2.c: New test.
+	* gcc.target/riscv/rvv/base/vslide1up-3.c: New test.
+---
+ gcc/config/riscv/riscv-v.cc                   |  5 ++---
+ .../gcc.target/riscv/rvv/base/vslide1down-1.c | 22 +++++++++++++++++++
+ .../gcc.target/riscv/rvv/base/vslide1down-2.c | 22 +++++++++++++++++++
+ .../gcc.target/riscv/rvv/base/vslide1down-3.c | 22 +++++++++++++++++++
+ .../gcc.target/riscv/rvv/base/vslide1up-1.c   | 22 +++++++++++++++++++
+ .../gcc.target/riscv/rvv/base/vslide1up-2.c   | 22 +++++++++++++++++++
+ .../gcc.target/riscv/rvv/base/vslide1up-3.c   | 22 +++++++++++++++++++
+ 7 files changed, 134 insertions(+), 3 deletions(-)
+ create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vslide1down-1.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vslide1down-2.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vslide1down-3.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vslide1up-1.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vslide1up-2.c
+ create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vslide1up-3.c
+
+diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
+index 392f5d02e17c..722ed27bd267 100644
+--- a/gcc/config/riscv/riscv-v.cc
++++ b/gcc/config/riscv/riscv-v.cc
+@@ -701,9 +701,8 @@ slide1_sew64_helper (int unspec, machine_mode mode, machine_mode demote_mode,
+ 			     CONSTM1_RTX (demote_mask_mode), merge, temp,
+ 			     demote_scalar_op2, vl_x2, ta, ma, ops[8]));
+ 
+-  if (rtx_equal_p (ops[1], CONSTM1_RTX (GET_MODE (ops[1]))))
+-    return true;
+-  else
++  if (!rtx_equal_p (ops[1], CONSTM1_RTX (GET_MODE (ops[1])))
++      && !rtx_equal_p (ops[2], RVV_VUNDEF (GET_MODE (ops[2]))))
+     emit_insn (gen_pred_merge (mode, ops[0], ops[2], ops[2], ops[0], ops[1],
+ 			       force_vector_length_operand (ops[5]), ops[6],
+ 			       ops[8]));
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vslide1down-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vslide1down-1.c
+new file mode 100644
+index 000000000000..541745be2a1e
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vslide1down-1.c
+@@ -0,0 +1,22 @@
++/* { dg-do compile } */
++/* { dg-options "-march=rv32gc_zve64x -mabi=ilp32d -Wno-psabi -O3 -fno-schedule-insns -fno-schedule-insns2" } */
++
++#include "riscv_vector.h"
++
++vint64m1_t test_vslide1down_vx_i64m1_m(vbool64_t mask, vint64m1_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1down_vx_i64m1_m(mask, src, value, vl);
++}
++
++vint64m2_t test_vslide1down_vx_i64m2_m(vbool32_t mask, vint64m2_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1down_vx_i64m2_m(mask, src, value, vl);
++}
++
++vint64m4_t test_vslide1down_vx_i64m4_m(vbool16_t mask, vint64m4_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1down_vx_i64m4_m(mask, src, value, vl);
++}
++
++vint64m8_t test_vslide1down_vx_i64m8_m(vbool8_t mask, vint64m8_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1down_vx_i64m8_m(mask, src, value, vl);
++}
++
++/* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+vslide1down\.[ivxfswum.]+\s+} 4 } } */
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vslide1down-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vslide1down-2.c
+new file mode 100644
+index 000000000000..9b5a240a9e69
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vslide1down-2.c
+@@ -0,0 +1,22 @@
++/* { dg-do compile } */
++/* { dg-options "-march=rv32gc_zve64d -mabi=ilp32d -Wno-psabi -O3 -fno-schedule-insns -fno-schedule-insns2" } */
++
++#include "riscv_vector.h"
++
++vint64m1_t test_vslide1down_vx_i64m1_m(vbool64_t mask, vint64m1_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1down_vx_i64m1_m(mask, src, value, vl);
++}
++
++vint64m2_t test_vslide1down_vx_i64m2_m(vbool32_t mask, vint64m2_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1down_vx_i64m2_m(mask, src, value, vl);
++}
++
++vint64m4_t test_vslide1down_vx_i64m4_m(vbool16_t mask, vint64m4_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1down_vx_i64m4_m(mask, src, value, vl);
++}
++
++vint64m8_t test_vslide1down_vx_i64m8_m(vbool8_t mask, vint64m8_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1down_vx_i64m8_m(mask, src, value, vl);
++}
++
++/* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+vslide1down\.[ivxfswum.]+\s+} 4 } } */
+\ No newline at end of file
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vslide1down-3.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vslide1down-3.c
+new file mode 100644
+index 000000000000..7b05c85a243a
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vslide1down-3.c
+@@ -0,0 +1,22 @@
++/* { dg-do compile } */
++/* { dg-options "-march=rv32gc_zve64f -mabi=ilp32d -Wno-psabi -O3 -fno-schedule-insns -fno-schedule-insns2" } */
++
++#include "riscv_vector.h"
++
++vint64m1_t test_vslide1down_vx_i64m1_m(vbool64_t mask, vint64m1_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1down_vx_i64m1_m(mask, src, value, vl);
++}
++
++vint64m2_t test_vslide1down_vx_i64m2_m(vbool32_t mask, vint64m2_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1down_vx_i64m2_m(mask, src, value, vl);
++}
++
++vint64m4_t test_vslide1down_vx_i64m4_m(vbool16_t mask, vint64m4_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1down_vx_i64m4_m(mask, src, value, vl);
++}
++
++vint64m8_t test_vslide1down_vx_i64m8_m(vbool8_t mask, vint64m8_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1down_vx_i64m8_m(mask, src, value, vl);
++}
++
++/* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+vslide1down\.[ivxfswum.]+\s+} 4 } } */
+\ No newline at end of file
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vslide1up-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vslide1up-1.c
+new file mode 100644
+index 000000000000..74e8e5e63f70
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vslide1up-1.c
+@@ -0,0 +1,22 @@
++/* { dg-do compile } */
++/* { dg-options "-march=rv32gc_zve64x -mabi=ilp32d -Wno-psabi -O3 -fno-schedule-insns -fno-schedule-insns2" } */
++
++#include "riscv_vector.h"
++
++vint64m1_t test_vslide1up_vx_i64m1_m(vbool64_t mask, vint64m1_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1up_vx_i64m1_m(mask, src, value, vl);
++}
++
++vint64m2_t test_vslide1up_vx_i64m2_m(vbool32_t mask, vint64m2_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1up_vx_i64m2_m(mask, src, value, vl);
++}
++
++vint64m4_t test_vslide1up_vx_i64m4_m(vbool16_t mask, vint64m4_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1up_vx_i64m4_m(mask, src, value, vl);
++}
++
++vint64m8_t test_vslide1up_vx_i64m8_m(vbool8_t mask, vint64m8_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1up_vx_i64m8_m(mask, src, value, vl);
++}
++
++/* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+vslide1up\.[ivxfswum.]+\s+} 4 } } */
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vslide1up-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vslide1up-2.c
+new file mode 100644
+index 000000000000..e7e2ee950c73
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vslide1up-2.c
+@@ -0,0 +1,22 @@
++/* { dg-do compile } */
++/* { dg-options "-march=rv32gc_zve64d -mabi=ilp32d -Wno-psabi -O3 -fno-schedule-insns -fno-schedule-insns2" } */
++
++#include "riscv_vector.h"
++
++vint64m1_t test_vslide1up_vx_i64m1_m(vbool64_t mask, vint64m1_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1up_vx_i64m1_m(mask, src, value, vl);
++}
++
++vint64m2_t test_vslide1up_vx_i64m2_m(vbool32_t mask, vint64m2_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1up_vx_i64m2_m(mask, src, value, vl);
++}
++
++vint64m4_t test_vslide1up_vx_i64m4_m(vbool16_t mask, vint64m4_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1up_vx_i64m4_m(mask, src, value, vl);
++}
++
++vint64m8_t test_vslide1up_vx_i64m8_m(vbool8_t mask, vint64m8_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1up_vx_i64m8_m(mask, src, value, vl);
++}
++
++/* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+vslide1up\.[ivxfswum.]+\s+} 4 } } */
+diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vslide1up-3.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vslide1up-3.c
+new file mode 100644
+index 000000000000..b0b3af24e644
+--- /dev/null
++++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vslide1up-3.c
+@@ -0,0 +1,22 @@
++/* { dg-do compile } */
++/* { dg-options "-march=rv32gc_zve64f -mabi=ilp32d -Wno-psabi -O3 -fno-schedule-insns -fno-schedule-insns2" } */
++
++#include "riscv_vector.h"
++
++vint64m1_t test_vslide1up_vx_i64m1_m(vbool64_t mask, vint64m1_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1up_vx_i64m1_m(mask, src, value, vl);
++}
++
++vint64m2_t test_vslide1up_vx_i64m2_m(vbool32_t mask, vint64m2_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1up_vx_i64m2_m(mask, src, value, vl);
++}
++
++vint64m4_t test_vslide1up_vx_i64m4_m(vbool16_t mask, vint64m4_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1up_vx_i64m4_m(mask, src, value, vl);
++}
++
++vint64m8_t test_vslide1up_vx_i64m8_m(vbool8_t mask, vint64m8_t src, int64_t value, size_t vl) {
++  return __riscv_vslide1up_vx_i64m8_m(mask, src, value, vl);
++}
++
++/* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+vslide1up\.[ivxfswum.]+\s+} 4 } } */
+-- 
+2.39.3
+

gating.yaml

@@ -0,0 +1,16 @@
+--- !Policy
+product_versions:
+  - fedora-*
+decision_context: bodhi_update_push_stable
+subject_type: koji_build
+rules:
+  - !PassingTestCaseRule {test_case_name: fedora-ci.koji-build.tier0.functional}
+  - !PassingTestCaseRule {test_case_name: baseos-qe.koji-build.scratch-build.validation}
+--- !Policy
+product_versions:
+  - rhel-9
+decision_context: osci_compose_gate
+rules:
+  - !PassingTestCaseRule {test_case_name: baseos-ci.brew-build.tier1-gating.functional}
+  - !PassingTestCaseRule {test_case_name: baseos-ci.brew-build.tier1-gating-p9.functional}
+  - !PassingTestCaseRule {test_case_name: baseos-qe.koji-build.scratch-build.validation}

gcc10-Wno-format-security.patch

@@ -1,27 +0,0 @@
-2017-02-25  Jakub Jelinek  <jakub@redhat.com>
-
-	* configure.ac: When adding -Wno-format, also add -Wno-format-security.
-	* configure: Regenerated.
-
---- gcc/configure.ac.jj	2017-02-13 12:20:53.000000000 +0100
-+++ gcc/configure.ac	2017-02-25 12:42:32.859175403 +0100
-@@ -480,7 +480,7 @@ AC_ARG_ENABLE(build-format-warnings,
-   AS_HELP_STRING([--disable-build-format-warnings],[don't use -Wformat while building GCC]),
-   [],[enable_build_format_warnings=yes])
- AS_IF([test $enable_build_format_warnings = no],
--      [wf_opt=-Wno-format],[wf_opt=])
-+      [wf_opt="-Wno-format -Wno-format-security"],[wf_opt=])
- ACX_PROG_CXX_WARNING_OPTS(
- 	m4_quote(m4_do([-W -Wall -Wno-narrowing -Wwrite-strings ],
- 		       [-Wcast-qual -Wno-error=format-diag $wf_opt])),
---- gcc/configure.jj	2017-02-13 12:20:52.000000000 +0100
-+++ gcc/configure	2017-02-25 12:42:50.041946391 +0100
-@@ -6647,7 +6647,7 @@ else
- fi
- 
- if test $enable_build_format_warnings = no; then :
--  wf_opt=-Wno-format
-+  wf_opt="-Wno-format -Wno-format-security"
- else
-   wf_opt=
- fi

gcc10-foffload-default.patch

@@ -1,122 +0,0 @@
-2019-01-17  Jakub Jelinek  <jakub@redhat.com>
-
-	* gcc.c (offload_targets_default): New variable.
-	(process_command): Set it if -foffload is defaulted.
-	(driver::maybe_putenv_OFFLOAD_TARGETS): Add OFFLOAD_TARGET_DEFAULT=1
-	into environment if -foffload has been defaulted.
-	* lto-wrapper.c (OFFLOAD_TARGET_DEFAULT_ENV): Define.
-	(compile_offload_image): If OFFLOAD_TARGET_DEFAULT
-	is in the environment, don't fail if corresponding mkoffload
-	can't be found.
-	(compile_images_for_offload_targets): Likewise.  Free and clear
-	offload_names if no valid offload is found.
-libgomp/
-	* target.c (gomp_load_plugin_for_device): If a plugin can't be
-	dlopened, assume it has no devices silently.
-
---- gcc/gcc.c.jj	2017-01-17 10:28:40.000000000 +0100
-+++ gcc/gcc.c	2017-01-20 16:26:29.649962902 +0100
-@@ -290,6 +290,10 @@ static const char *spec_host_machine = D
- 
- static char *offload_targets = NULL;
- 
-+/* Set to true if -foffload has not been used and offload_targets
-+   is set to the configured in default.  */
-+static bool offload_targets_default;
-+
- /* Nonzero if cross-compiling.
-    When -b is used, the value comes from the `specs' file.  */
- 
-@@ -4457,7 +4461,10 @@ process_command (unsigned int decoded_op
-   /* If the user didn't specify any, default to all configured offload
-      targets.  */
-   if (ENABLE_OFFLOADING && offload_targets == NULL)
--    handle_foffload_option (OFFLOAD_TARGETS);
-+    {
-+      handle_foffload_option (OFFLOAD_TARGETS);
-+      offload_targets_default = true;
-+    }
- 
-   if (output_file
-       && strcmp (output_file, "-") != 0
-@@ -7693,6 +7700,8 @@ driver::maybe_putenv_OFFLOAD_TARGETS ()
-       obstack_grow (&collect_obstack, offload_targets,
- 		    strlen (offload_targets) + 1);
-       xputenv (XOBFINISH (&collect_obstack, char *));
-+      if (offload_targets_default)
-+	  xputenv ("OFFLOAD_TARGET_DEFAULT=1");
-     }
- 
-   free (offload_targets);
---- gcc/lto-wrapper.c.jj	2017-01-01 12:45:34.000000000 +0100
-+++ gcc/lto-wrapper.c	2017-01-20 16:34:18.294016997 +0100
-@@ -52,6 +52,7 @@ along with GCC; see the file COPYING3.
- /* Environment variable, used for passing the names of offload targets from GCC
-    driver to lto-wrapper.  */
- #define OFFLOAD_TARGET_NAMES_ENV	"OFFLOAD_TARGET_NAMES"
-+#define OFFLOAD_TARGET_DEFAULT_ENV	"OFFLOAD_TARGET_DEFAULT"
- 
- enum lto_mode_d {
-   LTO_MODE_NONE,			/* Not doing LTO.  */
-@@ -822,6 +823,12 @@ compile_offload_image (const char *targe
- 	break;
-       }
- 
-+  if (!compiler && getenv (OFFLOAD_TARGET_DEFAULT_ENV))
-+    {
-+      free_array_of_ptrs ((void **) paths, n_paths);
-+      return NULL;
-+    }
-+
-   if (!compiler)
-     fatal_error (input_location,
- 		 "could not find %s in %s (consider using %<-B%>)",
-@@ -885,6 +892,7 @@ compile_images_for_offload_targets (unsi
-   unsigned num_targets = parse_env_var (target_names, &names, NULL);
- 
-   int next_name_entry = 0;
-+  bool hsa_seen = false;
-   const char *compiler_path = getenv ("COMPILER_PATH");
-   if (!compiler_path)
-     goto out;
-@@ -897,18 +905,26 @@ compile_images_for_offload_targets (unsi
-       /* HSA does not use LTO-like streaming and a different compiler, skip
- 	 it. */
-       if (strcmp (names[i], "hsa") == 0)
--	continue;
-+	{
-+	  hsa_seen = true;
-+	  continue;
-+	}
- 
-       offload_names[next_name_entry]
- 	= compile_offload_image (names[i], compiler_path, in_argc, in_argv,
- 				 compiler_opts, compiler_opt_count,
- 				 linker_opts, linker_opt_count);
-       if (!offload_names[next_name_entry])
--	fatal_error (input_location,
--		     "problem with building target image for %s", names[i]);
-+	continue;
-       next_name_entry++;
-     }
- 
-+  if (next_name_entry == 0 && !hsa_seen)
-+    {
-+      free (offload_names);
-+      offload_names = NULL;
-+    }
-+
-  out:
-   free_array_of_ptrs ((void **) names, num_targets);
- }
---- libgomp/target.c.jj	2017-01-01 12:45:52.000000000 +0100
-+++ libgomp/target.c	2017-01-20 20:12:13.756710875 +0100
-@@ -2356,7 +2356,7 @@ gomp_load_plugin_for_device (struct gomp
- 
-   void *plugin_handle = dlopen (plugin_name, RTLD_LAZY);
-   if (!plugin_handle)
--    goto dl_fail;
-+    return 0;
- 
-   /* Check if all required functions are available in the plugin and store
-      their handlers.  None of the symbols can legitimately be NULL,

gcc10-i386-libgomp.patch

@@ -1,11 +0,0 @@
---- libgomp/configure.tgt.jj	2008-01-10 20:53:48.000000000 +0100
-+++ libgomp/configure.tgt	2008-03-27 12:44:51.000000000 +0100
-@@ -67,7 +67,7 @@ if test $enable_linux_futex = yes; then
- 	    ;;
- 	  *)
- 	    if test -z "$with_arch"; then
--	      XCFLAGS="${XCFLAGS} -march=i486 -mtune=${target_cpu}"
-+	      XCFLAGS="${XCFLAGS} -march=i486 -mtune=generic"
- 	    fi
- 	esac
- 	;;

gcc10-rh1574936.patch

@@ -1,30 +0,0 @@
-crt files and statically linked libgcc objects cause false positives
-in annobin coverage, so we add the assembler flag to generate notes
-for them.
-
-The patch also adds notes to libgcc_s.so, but this is harmless because
-these notes only confer that there is no other annobin markup.
-
-2018-07-25  Florian Weimer  <fweimer@redhat.com>
-
-	* Makefile.in (LIBGCC2_CFLAGS, CRTSTUFF_CFLAGS): Add
-	-Wa,--generate-missing-build-notes=yes.
-
---- libgcc/Makefile.in	2018-01-13 13:05:41.000000000 +0100
-+++ libgcc/Makefile.in	2018-07-25 13:15:02.036226940 +0200
-@@ -246,6 +246,7 @@ LIBGCC2_DEBUG_CFLAGS = -g
- LIBGCC2_CFLAGS = -O2 $(LIBGCC2_INCLUDES) $(GCC_CFLAGS) $(HOST_LIBGCC2_CFLAGS) \
- 		 $(LIBGCC2_DEBUG_CFLAGS) -DIN_LIBGCC2 \
- 		 -fbuilding-libgcc -fno-stack-protector \
-+		 -Wa,--generate-missing-build-notes=yes \
- 		 $(INHIBIT_LIBC_CFLAGS)
- 
- # Additional options to use when compiling libgcc2.a.
-@@ -301,6 +302,7 @@ CRTSTUFF_CFLAGS = -O2 $(GCC_CFLAGS) $(IN
-   $(NO_PIE_CFLAGS) -finhibit-size-directive -fno-inline -fno-exceptions \
-   -fno-zero-initialized-in-bss -fno-toplevel-reorder -fno-tree-vectorize \
-   -fbuilding-libgcc -fno-stack-protector $(FORCE_EXPLICIT_EH_REGISTRY) \
-+  -Wa,--generate-missing-build-notes=yes \
-   $(INHIBIT_LIBC_CFLAGS) $(USE_TM_CLONE_REGISTRY)
- 
- # Extra flags to use when compiling crt{begin,end}.o.

gcc13-Wno-format-security.patch

@@ -0,0 +1,62 @@
+2022-01-07  Jakub Jelinek  <jakub@redhat.com>
+
+	* Makefile.tpl (GOCFLAGS, GDCFLAGS): Filter out -Wformat-security.
+	* Makefile.in: Regenerated.
+
+2017-02-25  Jakub Jelinek  <jakub@redhat.com>
+
+	* configure.ac: When adding -Wno-format, also add -Wno-format-security.
+	* configure: Regenerated.
+
+--- gcc/configure.ac.jj	2017-02-13 12:20:53.000000000 +0100
++++ gcc/configure.ac	2017-02-25 12:42:32.859175403 +0100
+@@ -570,7 +570,7 @@ AC_ARG_ENABLE(build-format-warnings,
+   AS_HELP_STRING([--disable-build-format-warnings],[don't use -Wformat while building GCC]),
+   [],[enable_build_format_warnings=yes])
+ AS_IF([test $enable_build_format_warnings = no],
+-      [wf_opt=-Wno-format],[wf_opt=])
++      [wf_opt="-Wno-format -Wno-format-security"],[wf_opt=])
+ ACX_PROG_CXX_WARNING_OPTS(
+ 	m4_quote(m4_do([-W -Wall -Wno-narrowing -Wwrite-strings ],
+ 		       [-Wcast-qual $wf_opt])),
+--- gcc/configure.jj	2017-02-13 12:20:52.000000000 +0100
++++ gcc/configure	2017-02-25 12:42:50.041946391 +0100
+@@ -7077,7 +7077,7 @@ else
+ fi
+ 
+ if test $enable_build_format_warnings = no; then :
+-  wf_opt=-Wno-format
++  wf_opt="-Wno-format -Wno-format-security"
+ else
+   wf_opt=
+ fi
+--- Makefile.tpl.jj	2021-12-30 15:12:42.188164847 +0100
++++ Makefile.tpl	2022-01-07 12:06:12.115550714 +0100
+@@ -446,9 +446,9 @@ LDFLAGS = @LDFLAGS@
+ LIBCFLAGS = $(CFLAGS)
+ CXXFLAGS = @CXXFLAGS@
+ LIBCXXFLAGS = $(CXXFLAGS) -fno-implicit-templates
+-GOCFLAGS = $(CFLAGS)
+-GDCFLAGS = $(CFLAGS)
+-GM2FLAGS = $(CFLAGS)
++GOCFLAGS = $(filter-out -Wformat-security,$(CFLAGS))
++GDCFLAGS = $(filter-out -Wformat-security,$(CFLAGS))
++GM2FLAGS = $(filter-out -Wformat-security,$(CFLAGS))
+ 
+ # Pass additional PGO and LTO compiler options to the PGO build.
+ BUILD_CFLAGS = $(PGO_BUILD_CFLAGS) $(PGO_BUILD_LTO_CFLAGS)
+--- Makefile.in.jj	2021-12-30 15:12:42.188164847 +0100
++++ Makefile.in	2022-01-07 12:06:27.335334561 +0100
+@@ -443,9 +443,9 @@ LDFLAGS = @LDFLAGS@
+ LIBCFLAGS = $(CFLAGS)
+ CXXFLAGS = @CXXFLAGS@
+ LIBCXXFLAGS = $(CXXFLAGS) -fno-implicit-templates
+-GOCFLAGS = $(CFLAGS)
+-GDCFLAGS = $(CFLAGS)
+-GM2FLAGS = $(CFLAGS)
++GOCFLAGS = $(filter-out -Wformat-security,$(CFLAGS))
++GDCFLAGS = $(filter-out -Wformat-security,$(CFLAGS))
++GM2FLAGS = $(filter-out -Wformat-security,$(CFLAGS))
+ 
+ # Pass additional PGO and LTO compiler options to the PGO build.
+ BUILD_CFLAGS = $(PGO_BUILD_CFLAGS) $(PGO_BUILD_LTO_CFLAGS)

gcc13-d-shared-libphobos.patch

@@ -5,9 +5,9 @@
 
 --- gcc/d/d-spec.cc.jj	2019-01-01 12:37:49.502444257 +0100
 +++ gcc/d/d-spec.cc	2019-01-17 17:09:45.364949246 +0100
-@@ -405,9 +405,9 @@ lang_specific_driver (cl_decoded_option
+@@ -408,9 +408,9 @@ lang_specific_driver (cl_decoded_option
    /* Add `-lgphobos' if we haven't already done so.  */
-   if (phobos_library != PHOBOS_NOLINK && need_phobos)
+   if (phobos_library != PHOBOS_NOLINK)
      {
 -      /* Default to static linking.  */
 -      if (phobos_library != PHOBOS_DYNAMIC)
@@ -17,4 +17,4 @@
 +	phobos_library = PHOBOS_DYNAMIC;
  
  #ifdef HAVE_LD_STATIC_DYNAMIC
-       if (phobos_library == PHOBOS_DYNAMIC && static_link)
+       if (phobos_library == PHOBOS_STATIC && !static_link)

gcc13-fortran-fdec-duplicates.patch

@@ -0,0 +1,215 @@
+From 23b1fcb104c666429451ffaf936f8da5fcd3d43a Mon Sep 17 00:00:00 2001
+From: Mark Eggleston <markeggleston@gcc.gnu.org>
+Date: Fri, 22 Jan 2021 12:29:47 +0000
+Subject: [PATCH 01/10] Allow duplicate declarations.
+
+Enabled by -fdec-duplicates and -fdec.
+
+Some fixes by Jim MacArthur <jim.macarthur@codethink.co.uk>
+Addition of -fdec-duplicates by Mark Eggleston <mark.eggleston@codethink.com>
+---
+ gcc/fortran/lang.opt                          |  4 ++++
+ gcc/fortran/options.cc                        |  1 +
+ gcc/fortran/symbol.cc                         | 21 +++++++++++++++++--
+ .../gfortran.dg/duplicate_type_4.f90          | 13 ++++++++++++
+ .../gfortran.dg/duplicate_type_5.f90          | 13 ++++++++++++
+ .../gfortran.dg/duplicate_type_6.f90          | 13 ++++++++++++
+ .../gfortran.dg/duplicate_type_7.f90          | 13 ++++++++++++
+ .../gfortran.dg/duplicate_type_8.f90          | 12 +++++++++++
+ .../gfortran.dg/duplicate_type_9.f90          | 12 +++++++++++
+ 9 files changed, 100 insertions(+), 2 deletions(-)
+ create mode 100644 gcc/testsuite/gfortran.dg/duplicate_type_4.f90
+ create mode 100644 gcc/testsuite/gfortran.dg/duplicate_type_5.f90
+ create mode 100644 gcc/testsuite/gfortran.dg/duplicate_type_6.f90
+ create mode 100644 gcc/testsuite/gfortran.dg/duplicate_type_7.f90
+ create mode 100644 gcc/testsuite/gfortran.dg/duplicate_type_8.f90
+ create mode 100644 gcc/testsuite/gfortran.dg/duplicate_type_9.f90
+
+diff --git a/gcc/fortran/lang.opt b/gcc/fortran/lang.opt
+index 2b1977c523b..52bd522051e 100644
+--- a/gcc/fortran/lang.opt
++++ b/gcc/fortran/lang.opt
+@@ -469,6 +469,10 @@ Fortran Var(flag_dec_char_conversions)
+ Enable the use of character literals in assignments and data statements
+ for non-character variables.
+ 
++fdec-duplicates
++Fortran Var(flag_dec_duplicates)
++Allow varibles to be duplicated in the type specification matches.
++
+ fdec-include
+ Fortran Var(flag_dec_include)
+ Enable legacy parsing of INCLUDE as statement.
+diff --git a/gcc/fortran/options.cc b/gcc/fortran/options.cc
+index 3a0b98bf1ec..f19ba87f8a0 100644
+--- a/gcc/fortran/options.cc
++++ b/gcc/fortran/options.cc
+@@ -77,6 +77,7 @@ set_dec_flags (int value)
+   SET_BITFLAG (flag_dec_format_defaults, value, value);
+   SET_BITFLAG (flag_dec_blank_format_item, value, value);
+   SET_BITFLAG (flag_dec_char_conversions, value, value);
++  SET_BITFLAG (flag_dec_duplicates, value, value);
+ }
+ 
+ /* Finalize DEC flags.  */
+diff --git a/gcc/fortran/symbol.cc b/gcc/fortran/symbol.cc
+index 3b988d1be22..9843175cc2a 100644
+--- a/gcc/fortran/symbol.cc
++++ b/gcc/fortran/symbol.cc
+@@ -1995,6 +1995,8 @@ gfc_add_type (gfc_symbol *sym, gfc_typespec *ts, locus *where)
+   if (sym->attr.result && type == BT_UNKNOWN && sym->ns->proc_name)
+     type = sym->ns->proc_name->ts.type;
+ 
++  flavor = sym->attr.flavor;
++
+   if (type != BT_UNKNOWN && !(sym->attr.function && sym->attr.implicit_type)
+       && !(gfc_state_stack->previous && gfc_state_stack->previous->previous
+ 	   && gfc_state_stack->previous->previous->state == COMP_SUBMODULE)
+@@ -2007,6 +2009,23 @@ gfc_add_type (gfc_symbol *sym, gfc_typespec *ts, locus *where)
+       else if (sym->attr.function && sym->attr.result)
+ 	gfc_error ("Symbol %qs at %L already has basic type of %s",
+ 		   sym->ns->proc_name->name, where, gfc_basic_typename (type));
++      else if (flag_dec_duplicates)
++	{
++	  /* Ignore temporaries and class/procedure names */
++	  if (sym->ts.type == BT_DERIVED || sym->ts.type == BT_CLASS
++	      || sym->ts.type == BT_PROCEDURE)
++	    return false;
++
++	  if (gfc_compare_types (&sym->ts, ts)
++	      && (flavor == FL_UNKNOWN || flavor == FL_VARIABLE
++	      || flavor == FL_PROCEDURE))
++	    {
++	      return gfc_notify_std (GFC_STD_LEGACY,
++				     "Symbol '%qs' at %L already has "
++				     "basic type of %s", sym->name, where,
++				     gfc_basic_typename (type));
++	    }
++	}
+       else
+ 	gfc_error ("Symbol %qs at %L already has basic type of %s", sym->name,
+ 		   where, gfc_basic_typename (type));
+@@ -2020,8 +2039,6 @@ gfc_add_type (gfc_symbol *sym, gfc_typespec *ts, locus *where)
+       return false;
+     }
+ 
+-  flavor = sym->attr.flavor;
+-
+   if (flavor == FL_PROGRAM || flavor == FL_BLOCK_DATA || flavor == FL_MODULE
+       || flavor == FL_LABEL
+       || (flavor == FL_PROCEDURE && sym->attr.subroutine)
+diff --git a/gcc/testsuite/gfortran.dg/duplicate_type_4.f90 b/gcc/testsuite/gfortran.dg/duplicate_type_4.f90
+new file mode 100644
+index 00000000000..cdd29ea8846
+--- /dev/null
++++ b/gcc/testsuite/gfortran.dg/duplicate_type_4.f90
+@@ -0,0 +1,13 @@
++! { dg-do compile }
++! { dg-options "-std=f95" }
++
++! PR fortran/30239
++! Check for errors when a symbol gets declared a type twice, even if it
++! is the same.
++
++INTEGER FUNCTION foo ()
++  IMPLICIT NONE
++  INTEGER :: x
++  INTEGER :: x ! { dg-error "basic type of" }
++  x = 42
++END FUNCTION foo
+diff --git a/gcc/testsuite/gfortran.dg/duplicate_type_5.f90 b/gcc/testsuite/gfortran.dg/duplicate_type_5.f90
+new file mode 100644
+index 00000000000..00f931809aa
+--- /dev/null
++++ b/gcc/testsuite/gfortran.dg/duplicate_type_5.f90
+@@ -0,0 +1,13 @@
++! { dg-do run }
++! { dg-options "-fdec" }
++!
++! Test case contributed by Mark Eggleston <mark.eggleston@codethink.com>
++!
++
++program test
++  implicit none
++  integer :: x
++  integer :: x
++  x = 42
++  if (x /= 42) stop 1
++end program test
+diff --git a/gcc/testsuite/gfortran.dg/duplicate_type_6.f90 b/gcc/testsuite/gfortran.dg/duplicate_type_6.f90
+new file mode 100644
+index 00000000000..f0df27e323c
+--- /dev/null
++++ b/gcc/testsuite/gfortran.dg/duplicate_type_6.f90
+@@ -0,0 +1,13 @@
++! { dg-do run }
++! { dg-options "-std=legacy -fdec-duplicates" }
++!
++! Test case contributed by Mark Eggleston <mark.eggleston@codethink.com>
++!
++
++program test
++  implicit none
++  integer :: x
++  integer :: x
++  x = 42
++  if (x /= 42) stop 1
++end program test
+diff --git a/gcc/testsuite/gfortran.dg/duplicate_type_7.f90 b/gcc/testsuite/gfortran.dg/duplicate_type_7.f90
+new file mode 100644
+index 00000000000..f32472ff586
+--- /dev/null
++++ b/gcc/testsuite/gfortran.dg/duplicate_type_7.f90
+@@ -0,0 +1,13 @@
++! { dg-do run }
++! { dg-options "-fdec-duplicates" }
++!
++! Test case contributed by Mark Eggleston <mark.eggleston@codethink.com>
++!
++
++program test
++  implicit none
++  integer :: x
++  integer :: x! { dg-warning "Legacy Extension" }
++  x = 42
++  if (x /= 42) stop 1
++end program test
+diff --git a/gcc/testsuite/gfortran.dg/duplicate_type_8.f90 b/gcc/testsuite/gfortran.dg/duplicate_type_8.f90
+new file mode 100644
+index 00000000000..23c94add179
+--- /dev/null
++++ b/gcc/testsuite/gfortran.dg/duplicate_type_8.f90
+@@ -0,0 +1,12 @@
++! { dg-do compile }
++! { dg-options "-fdec -fno-dec-duplicates" }
++!
++! Test case contributed by Mark Eggleston <mark.eggleston@codethink.com>
++!
++
++integer function foo ()
++  implicit none
++  integer :: x
++  integer :: x ! { dg-error "basic type of" }
++  x = 42
++end function foo
+diff --git a/gcc/testsuite/gfortran.dg/duplicate_type_9.f90 b/gcc/testsuite/gfortran.dg/duplicate_type_9.f90
+new file mode 100644
+index 00000000000..d5edee4d8ee
+--- /dev/null
++++ b/gcc/testsuite/gfortran.dg/duplicate_type_9.f90
+@@ -0,0 +1,12 @@
++! { dg-do compile }
++! { dg-options "-fdec-duplicates -fno-dec-duplicates" }
++!
++! Test case contributed by Mark Eggleston <mark.eggleston@codethink.com>
++!
++
++integer function foo ()
++  implicit none
++  integer :: x
++  integer :: x ! { dg-error "basic type of" }
++  x = 42
++end function foo
+-- 
+2.27.0
+

gcc13-hack.patch

@@ -65,8 +65,8 @@
  				GOCFLAGS="$(GOCFLAGS) $${flags}" \
  				GDCFLAGS="$(GDCFLAGS) $${flags}" \
  				CXXFLAGS="$(CXXFLAGS) $${flags}" \
---- libcpp/macro.c.jj	2019-01-09 13:01:21.420552123 +0100
-+++ libcpp/macro.c	2019-01-11 18:18:17.736876285 +0100
+--- libcpp/macro.cc.jj	2019-01-09 13:01:21.420552123 +0100
++++ libcpp/macro.cc	2019-01-11 18:18:17.736876285 +0100
 @@ -3256,8 +3256,6 @@ static cpp_macro *
  create_iso_definition (cpp_reader *pfile)
  {
@@ -98,9 +98,9 @@
  	      goto out;
  	    }
  
---- libcpp/expr.c.jj	2019-01-09 13:01:22.415535734 +0100
-+++ libcpp/expr.c	2019-01-11 18:16:23.444726882 +0100
-@@ -788,16 +788,17 @@ cpp_classify_number (cpp_reader *pfile,
+--- libcpp/expr.cc.jj	2019-01-09 13:01:22.415535734 +0100
++++ libcpp/expr.cc	2019-01-11 18:16:23.444726882 +0100
+@@ -803,16 +803,17 @@ cpp_classify_number (cpp_reader *pfile,
        if ((result & CPP_N_WIDTH) == CPP_N_LARGE
  	  && CPP_OPTION (pfile, cpp_warn_long_long))
          {
@@ -123,4 +123,4 @@
 +				      : N_("use of C99 long long integer constant"));
          }
  
-       result |= CPP_N_INTEGER;
+       if ((result & CPP_N_SIZE_T) == CPP_N_SIZE_T

gcc13-isl-dl.patch

@@ -26,11 +26,11 @@
  # Generate header and source files from the machine description,
  # and compile them.
 --- gcc/graphite.h.jj	2016-01-27 12:44:06.000000000 +0100
-+++ gcc/graphite.h	2016-01-27 13:26:38.309876856 +0100
-@@ -39,6 +39,590 @@ along with GCC; see the file COPYING3.
- #include <isl/schedule_node.h>
- #include <isl/id.h>
- #include <isl/space.h>
++++ gcc/graphite.h	2022-11-03 19:14:50.369690720 +0100
+@@ -24,6 +24,591 @@ along with GCC; see the file COPYING3.
+ 
+ #include "sese.h"
+ 
 +#include <isl/version.h>
 +#include <dlfcn.h>
 +
@@ -41,15 +41,15 @@
 +  DYNSYM (isl_aff_set_coefficient_si); \
 +  DYNSYM (isl_aff_set_constant_si); \
 +  DYNSYM (isl_aff_zero_on_domain); \
-+  DYNSYM (isl_band_free); \
-+  DYNSYM (isl_band_get_children); \
-+  DYNSYM (isl_band_get_partial_schedule); \
-+  DYNSYM (isl_band_has_children); \
-+  DYNSYM (isl_band_list_free); \
-+  DYNSYM (isl_band_list_get_band); \
-+  DYNSYM (isl_band_list_get_ctx); \
-+  DYNSYM (isl_band_list_n_band); \
-+  DYNSYM (isl_band_n_member); \
++  /* DYNSYM (isl_band_free); */ \
++  /* DYNSYM (isl_band_get_children); */ \
++  /* DYNSYM (isl_band_get_partial_schedule); */ \
++  /* DYNSYM (isl_band_has_children); */ \
++  /* DYNSYM (isl_band_list_free); */ \
++  /* DYNSYM (isl_band_list_get_band); */ \
++  /* DYNSYM (isl_band_list_get_ctx); */ \
++  /* DYNSYM (isl_band_list_n_band); */ \
++  /* DYNSYM (isl_band_n_member); */ \
 +  DYNSYM (isl_basic_map_add_constraint); \
 +  DYNSYM (isl_basic_map_project_out); \
 +  DYNSYM (isl_basic_map_universe); \
@@ -91,7 +91,7 @@
 +  DYNSYM (isl_map_is_empty); \
 +  DYNSYM (isl_map_lex_ge); \
 +  DYNSYM (isl_map_lex_le); \
-+  DYNSYM (isl_map_n_out); \
++  /* DYNSYM (isl_map_n_out); */ \
 +  DYNSYM (isl_map_range); \
 +  DYNSYM (isl_map_set_tuple_id); \
 +  DYNSYM (isl_map_universe); \
@@ -124,7 +124,7 @@
 +  DYNSYM (isl_pw_aff_sub); \
 +  DYNSYM (isl_pw_aff_zero_set); \
 +  DYNSYM (isl_schedule_free); \
-+  DYNSYM (isl_schedule_get_band_forest); \
++  /* DYNSYM (isl_schedule_get_band_forest); */ \
 +  DYNSYM (isl_set_add_constraint); \
 +  DYNSYM (isl_set_add_dims); \
 +  DYNSYM (isl_set_apply); \
@@ -615,20 +615,21 @@
 +#define isl_version (*isl_pointers__.p_isl_version)
 +#define isl_options_get_on_error (*isl_pointers__.p_isl_options_get_on_error)
 +#define isl_ctx_reset_error (*isl_pointers__.p_isl_ctx_reset_error)
- 
++
  typedef struct poly_dr *poly_dr_p;
  
-@@ -461,5 +1045,6 @@ extern void build_scops (vec<scop_p> *);
+ typedef struct poly_bb *poly_bb_p;
+@@ -448,5 +1033,6 @@ extern tree cached_scalar_evolution_in_r
  extern void dot_all_sese (FILE *, vec<sese_l> &);
  extern void dot_sese (sese_l &);
  extern void dot_cfg ();
 +extern const char *get_isl_version (bool);
  
  #endif
---- gcc/graphite.c.jj	2015-11-04 14:15:32.000000000 +0100
-+++ gcc/graphite.c	2015-11-04 14:56:02.645536409 +0100
+--- gcc/graphite.cc.jj	2015-11-04 14:15:32.000000000 +0100
++++ gcc/graphite.cc	2015-11-04 14:56:02.645536409 +0100
 @@ -60,6 +60,35 @@ along with GCC; see the file COPYING3.
- #include "tree-into-ssa.h"
+ #include "tree-ssa-propagate.h"
  #include "graphite.h"
  
 +__typeof (isl_pointers__) isl_pointers__;
@@ -640,7 +641,7 @@
 +
 +  if (isl_pointers__.inited)
 +    return isl_pointers__.h != NULL;
-+  h = dlopen ("libisl.so.15", RTLD_LAZY);
++  h = dlopen ("libisl.so.23", RTLD_LAZY);
 +  isl_pointers__.h = h;
 +  if (h == NULL)
 +    return false;
@@ -663,7 +664,7 @@
  /* Print global statistics to FILE.  */
  
  static void
-@@ -365,6 +394,15 @@ graphite_transform_loops (void)
+@@ -424,6 +453,15 @@ graphite_transform_loops (void)
    if (parallelized_function_p (cfun->decl))
      return;
  
@@ -679,7 +680,7 @@
    calculate_dominance_info (CDI_DOMINATORS);
  
    /* We rely on post-dominators during merging of SESE regions so those
-@@ -455,6 +493,14 @@ graphite_transform_loops (void)
+@@ -519,6 +557,14 @@ graphite_transform_loops (void)
      }
  }
  
@@ -694,8 +695,8 @@
  #else /* If isl is not available: #ifndef HAVE_isl.  */
  
  static void
---- gcc/toplev.c.jj	2017-02-19 13:02:31.000000000 +0100
-+++ gcc/toplev.c	2017-02-19 16:50:25.536301350 +0100
+--- gcc/toplev.cc.jj	2017-02-19 13:02:31.000000000 +0100
++++ gcc/toplev.cc	2017-02-19 16:50:25.536301350 +0100
 @@ -94,6 +94,7 @@ along with GCC; see the file COPYING3.
  
  #ifdef HAVE_isl

gcc13-isl-dl2.patch

@@ -0,0 +1,71 @@
+2011-04-04  Jakub Jelinek  <jakub@redhat.com>
+
+	* toplev.cc (toplev_main_argv): New variable.
+	(toplev_main): Initialize it.
+	* graphite.cc (init_isl_pointers): Load libisl.so.23 from gcc's private
+	directory.
+
+--- gcc/toplev.cc.jj	2008-12-09 23:59:10.000000000 +0100
++++ gcc/toplev.cc	2009-01-27 14:33:52.000000000 +0100
+@@ -113,6 +113,8 @@ static void finalize (bool);
+ static void crash_signal (int) ATTRIBUTE_NORETURN;
+ static void compile_file (void);
+ 
++const char **toplev_main_argv;
++
+ /* Decoded options, and number of such options.  */
+ struct cl_decoded_option *save_decoded_options;
+ unsigned int save_decoded_options_count;
+@@ -2239,6 +2241,8 @@ toplev::main (int argc, char **argv)
+ 
+   expandargv (&argc, &argv);
+ 
++  toplev_main_argv = CONST_CAST2 (const char **, char **, argv);
++
+   /* Initialization of GCC's environment, and diagnostics.  */
+   general_init (argv[0], m_init_signals);
+ 
+--- gcc/graphite.cc.jj	2010-12-01 10:24:32.000000000 -0500
++++ gcc/graphite.cc	2010-12-01 11:46:07.832118193 -0500
+@@ -64,11 +64,39 @@ __typeof (isl_pointers__) isl_pointers__
+ static bool
+ init_isl_pointers (void)
+ {
+-  void *h;
++  void *h = NULL;
++  extern const char **toplev_main_argv;
++  char *buf, *p;
++  size_t len;
+ 
+   if (isl_pointers__.inited)
+     return isl_pointers__.h != NULL;
+-  h = dlopen ("libisl.so.23", RTLD_LAZY);
++  len = progname - toplev_main_argv[0];
++  buf = XALLOCAVAR (char, len + sizeof "libisl.so.23");
++  memcpy (buf, toplev_main_argv[0], len);
++  strcpy (buf + len, "libisl.so.23");
++  len += sizeof "libisl.so.23";
++  p = strstr (buf, "/libexec/");
++  if (p != NULL)
++    {
++      while (1)
++	{
++	  char *q = strstr (p + 8, "/libexec/");
++	  if (q == NULL)
++	    break;
++	  p = q;
++	}
++      memmove (p + 4, p + 8, len - (p + 8 - buf));
++      h = dlopen (buf, RTLD_LAZY);
++      if (h == NULL)
++	{
++	  len = progname - toplev_main_argv[0];
++	  memcpy (buf, toplev_main_argv[0], len);
++	  strcpy (buf + len, "libisl.so.23");
++	}
++    }
++  if (h == NULL)
++    h = dlopen (buf, RTLD_LAZY);
+   isl_pointers__.h = h;
+   if (h == NULL)
+     return false;

gcc13-libstdc++-docs.patch

@@ -4,7 +4,7 @@
        <a class="link" href="https://www.fsf.org" target="_top">FSF
        </a>
      </p><p>
-+      Release 10.0.1
++      Release 13.2.1
 +    </p><p>
        Permission is granted to copy, distribute and/or modify this
        document under the terms of the GNU Free Documentation
@@ -17,7 +17,7 @@
  </p><p>
 -  The API documentation, rendered into HTML, can be viewed online
 +  The API documentation, rendered into HTML, can be viewed locally
-+  <a class="link" href="api/index.html" target="_top">for the 10.0.1 release</a>,
++  <a class="link" href="api/index.html" target="_top">for the 13.2.1 release</a>,
 +  online
    <a class="link" href="http://gcc.gnu.org/onlinedocs/" target="_top">for each GCC release</a>
    and

gcc13-libtool-no-rpath.patch

@@ -5,7 +5,7 @@ libtool sucks.
  	  rpath="$finalize_rpath"
  	  test "$mode" != relink && rpath="$compile_rpath$rpath"
  	  for libdir in $rpath; do
-+	    case "$libdir" in /usr/lib|/usr/lib64|/usr/lib/../lib|/usr/lib/../lib64) continue;; esac
++	    case "$libdir" in /usr/lib|/usr/lib64|/usr/lib/../lib|/usr/lib/../lib64|/usr/lib/../lib64/lp64d) continue;; esac
  	    if test -n "$hardcode_libdir_flag_spec"; then
  	      if test -n "$hardcode_libdir_separator"; then
  		if test -z "$hardcode_libdirs"; then
@@ -13,7 +13,7 @@ libtool sucks.
        rpath=
        hardcode_libdirs=
        for libdir in $compile_rpath $finalize_rpath; do
-+	case "$libdir" in /usr/lib|/usr/lib64|/usr/lib/../lib|/usr/lib/../lib64) continue;; esac
++	case "$libdir" in /usr/lib|/usr/lib64|/usr/lib/../lib|/usr/lib/../lib64|/usr/lib/../lib64/lp64d) continue;; esac
  	if test -n "$hardcode_libdir_flag_spec"; then
  	  if test -n "$hardcode_libdir_separator"; then
  	    if test -z "$hardcode_libdirs"; then
@@ -21,7 +21,7 @@ libtool sucks.
        rpath=
        hardcode_libdirs=
        for libdir in $finalize_rpath; do
-+	case "$libdir" in /usr/lib|/usr/lib64|/usr/lib/../lib|/usr/lib/../lib64) continue;; esac
++	case "$libdir" in /usr/lib|/usr/lib64|/usr/lib/../lib|/usr/lib/../lib64|/usr/lib/../lib64/lp64d) continue;; esac
  	if test -n "$hardcode_libdir_flag_spec"; then
  	  if test -n "$hardcode_libdir_separator"; then
  	    if test -z "$hardcode_libdirs"; then

gcc13-rh1574936.patch

@@ -0,0 +1,21 @@
+crt files and statically linked libgcc objects cause false positives
+in annobin coverage, so we add the assembler flag to generate notes
+for them.
+
+The patch also adds notes to libgcc_s.so, but this is harmless because
+these notes only confer that there is no other annobin markup.
+
+2018-07-25  Florian Weimer  <fweimer@redhat.com>
+
+	* config/t-linux (LIBGCC2_CFLAGS, CRTSTUFF_CFLAGS): Add
+	-Wa,--generate-missing-build-notes=yes.
+
+--- libgcc/config/t-linux	2022-12-15 19:25:20.581394950 +0100
++++ libgcc/config/t-linux	2023-03-21 22:00:37.054478562 +0100
+@@ -1,3 +1,6 @@
+ # Override t-slibgcc-elf-ver to export some libgcc symbols with
+ # the symbol versions that glibc used.
+ SHLIB_MAPFILES += $(srcdir)/config/libgcc-glibc.ver
++
++LIBGCC2_CFLAGS += -Wa,--generate-missing-build-notes=yes
++CRTSTUFF_CFLAGS += -Wa,--generate-missing-build-notes=yes

gcc13-sparc-config-detection.patch

@@ -1,21 +1,21 @@
 --- gcc/config.gcc.jj	2008-04-24 15:42:46.000000000 -0500
 +++ gcc/config.gcc	2008-04-24 15:44:51.000000000 -0500
-@@ -2790,7 +2790,7 @@ sparc-*-rtems*)
- 	tm_file="${tm_file} dbxelf.h elfos.h sparc/sysv4.h sparc/sp-elf.h sparc/rtemself.h rtems.h newlib-stdint.h"
+@@ -3330,7 +3330,7 @@ sparc-*-rtems*)
+ 	tm_file="${tm_file} elfos.h sparc/sysv4.h sparc/sp-elf.h sparc/rtemself.h rtems.h newlib-stdint.h"
  	tmake_file="${tmake_file} sparc/t-sparc sparc/t-rtems"
  	;;
 -sparc-*-linux*)
 +sparc-*-linux* | sparcv9-*-linux*)
- 	tm_file="${tm_file} dbxelf.h elfos.h sparc/sysv4.h gnu-user.h linux.h glibc-stdint.h sparc/tso.h"
+ 	tm_file="${tm_file} elfos.h sparc/sysv4.h gnu-user.h linux.h glibc-stdint.h sparc/tso.h"
  	extra_options="${extra_options} sparc/long-double-switch.opt"
  	case ${target} in
-@@ -2844,7 +2844,7 @@ sparc64-*-rtems*)
+@@ -3384,7 +3384,7 @@ sparc64-*-rtems*)
  	extra_options="${extra_options}"
  	tmake_file="${tmake_file} sparc/t-sparc sparc/t-rtems-64"
  	;;
 -sparc64-*-linux*)
 +sparc64*-*-linux*)
- 	tm_file="sparc/biarch64.h ${tm_file} dbxelf.h elfos.h sparc/sysv4.h gnu-user.h linux.h glibc-stdint.h sparc/default64.h sparc/linux64.h sparc/tso.h"
+ 	tm_file="sparc/biarch64.h ${tm_file} elfos.h sparc/sysv4.h gnu-user.h linux.h glibc-stdint.h sparc/default64.h sparc/linux64.h sparc/tso.h"
  	extra_options="${extra_options} sparc/long-double-switch.opt"
  	tmake_file="${tmake_file} sparc/t-sparc sparc/t-linux64"
 --- libgcc/config.host.jj	2008-04-24 15:46:19.000000000 -0500

isl-rh2155127.patch

@@ -0,0 +1,85 @@
+From: Sven Verdoolaege <sven.verdoolaege@gmail.com>
+Date: Mon, 6 Jun 2022 12:56:02 +0000 (+0200)
+Subject: update m4/ax_prog_cc_for_build.m4
+X-Git-Tag: isl-0.25~11
+X-Git-Url: https://repo.or.cz/isl.git/commitdiff_plain/b4dcdfadc29a6c9f410a72f345f3f32725b1d38b
+
+update m4/ax_prog_cc_for_build.m4
+
+In particular, update to the latest version from the autoconf archive,
+but preserve the changes from isl-0.22.1-358-gcd42abdf2
+(m4/ax_prog_cc_for_build.m4: do not override host compiler dependency style,
+Tue Jun 9 10:54:10 2020 +0200).
+
+Signed-off-by: Sven Verdoolaege <sven.verdoolaege@gmail.com>
+
+--- isl-0.24/m4/ax_prog_cc_for_build.m4.jj	2021-03-02 12:07:09.000000000 +0100
++++ isl-0.24/m4/ax_prog_cc_for_build.m4	2022-12-20 18:11:18.855777817 +0100
+@@ -32,7 +32,7 @@
+ #   and this notice are preserved. This file is offered as-is, without any
+ #   warranty.
+ 
+-#serial 18
++#serial 21
+ 
+ AU_ALIAS([AC_PROG_CC_FOR_BUILD], [AX_PROG_CC_FOR_BUILD])
+ AC_DEFUN([AX_PROG_CC_FOR_BUILD], [dnl
+@@ -44,6 +44,8 @@ dnl Use the standard macros, but make th
+ dnl
+ pushdef([ac_cv_prog_CPP], ac_cv_build_prog_CPP)dnl
+ pushdef([ac_cv_prog_cc_c89], ac_cv_build_prog_cc_c89)dnl
++pushdef([ac_cv_prog_cc_c99], ac_cv_build_prog_cc_c99)dnl
++pushdef([ac_cv_prog_cc_c11], ac_cv_build_prog_cc_c11)dnl
+ pushdef([ac_cv_prog_gcc], ac_cv_build_prog_gcc)dnl
+ pushdef([ac_cv_prog_cc_works], ac_cv_build_prog_cc_works)dnl
+ pushdef([ac_cv_prog_cc_cross], ac_cv_build_prog_cc_cross)dnl
+@@ -86,7 +88,21 @@ AS_IF([test -n "$build"],      [ac_build
+       [test -n "$build_alias"],[ac_build_tool_prefix="$build_alias-"])
+ 
+ AC_LANG_PUSH([C])
++
++dnl The pushdef([ac_cv_c_compiler_gnu], ...) currently does not cover
++dnl the use of this variable in _AC_LANG_COMPILER_GNU called by
++dnl AC_PROG_CC. Unset this cache variable temporarily as a workaround.
++was_set_c_compiler_gnu=${[ac_cv_c_compiler_gnu]+y}
++AS_IF([test ${was_set_c_compiler_gnu}],
++    [saved_c_compiler_gnu=$[ac_cv_c_compiler_gnu]
++    AS_UNSET([[ac_cv_c_compiler_gnu]])])
++
+ AC_PROG_CC
++
++dnl Restore ac_cv_c_compiler_gnu
++AS_IF([test ${was_set_c_compiler_gnu}],
++  [[ac_cv_c_compiler_gnu]=$[saved_c_compiler_gnu]])
++
+ _AC_COMPILER_EXEEXT
+ _AC_COMPILER_OBJEXT
+ AC_PROG_CPP
+--- isl-0.24/configure.jj	2021-04-26 11:13:19.000000000 +0200
++++ isl-0.24/configure	2022-12-20 18:11:36.882518568 +0100
+@@ -5002,6 +4990,13 @@ ac_compile='$CC_FOR_BUILD -c $CFLAGS_FOR
+ ac_link='$CC_FOR_BUILD -o conftest$ac_build_exeext $CFLAGS_FOR_BUILD $CPPFLAGS_FOR_BUILD $LDFLAGS_FOR_BUILD conftest.$ac_ext $LIBS >&5'
+ ac_compiler_gnu=$ac_cv_build_c_compiler_gnu
+ 
++
++was_set_c_compiler_gnu=${ac_cv_c_compiler_gnu+y}
++if test ${was_set_c_compiler_gnu}; then :
++  saved_c_compiler_gnu=$ac_cv_c_compiler_gnu
++    { ac_cv_c_compiler_gnu=; unset ac_cv_c_compiler_gnu;}
++fi
++
+ ac_ext=c
+ ac_cpp='$CPP_FOR_BUILD $CPPFLAGS_FOR_BUILD'
+ ac_compile='$CC_FOR_BUILD -c $CFLAGS_FOR_BUILD $CPPFLAGS_FOR_BUILD conftest.$ac_ext >&5'
+@@ -5728,6 +5723,11 @@ else
+ fi
+ 
+ 
++
++if test ${was_set_c_compiler_gnu}; then :
++  ac_cv_c_compiler_gnu=$saved_c_compiler_gnu
++fi
++
+ cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 

plans/ci.fmf

@@ -0,0 +1,10 @@
+summary: CI Gating Plan
+discover:
+    how: fmf
+    directory: tests
+prepare:
+    - name: prepare
+      how: shell
+      script: ./plans/prepare.sh
+execute:
+    how: tmt

plans/prepare.sh

@@ -0,0 +1,54 @@
+#!/bin/bash
+
+#
+# Setup task for Fedora CI system.  Install the x86_64 GCC build under test
+# along with its respective i686 (compat arch) bits needed for the testing.
+# KOJI_TASK_ID per https://github.com/fedora-ci/dist-git-pipeline/pull/50 .
+#
+
+set -x
+
+true "V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V-V"
+
+echo "KOJI_TASK_ID=$KOJI_TASK_ID"
+
+. /etc/os-release
+
+if [ "$ID" == "fedora" ] && [ "$(arch)" == "x86_64" ]; then
+
+    if [ -z "${KOJI_TASK_ID}" ]; then
+        echo "Missing koji task ID, skipping ..."
+        exit 0
+    fi
+
+    tmpd=`mktemp -d`
+    pushd $tmpd
+        koji download-task $KOJI_TASK_ID --noprogress --arch=src
+        ls
+        VR=$(rpm -qp gcc* --queryformat='%{version}-%{release}')
+    popd
+    rm -rf $tmpd
+
+    tmpd=`mktemp -d`
+    pushd $tmpd
+        koji download-task $KOJI_TASK_ID --noprogress --arch=x86_64 --arch=noarch
+        rm -f *debuginfo*
+        ls
+        dnf -y install *.rpm
+    popd
+    rm -rf $tmpd
+
+    tmpd=`mktemp -d`
+    pushd $tmpd
+        koji download-task $KOJI_TASK_ID --noprogress --arch=i686
+        rm -f *debuginfo*
+        ls
+        yum -y install libgcc-$VR* libgfortran-$VR* libgomp-$VR* libitm-$VR* \
+                       libstdc++-devel-$VR* libstdc++-$VR* libstdc++-static-$VR*
+    popd
+    rm -rf $tmpd
+else
+    echo "Not Fedora x86_64, skipping..."
+fi
+
+true "^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^-^"

sources

@@ -1,3 +1,4 @@
-SHA512 (gcc-10.0.1-20200216.tar.xz) = 56507e273b00e85ed4145e80df65d9b4e4791f23e7cb5d931f85b9420cbf3a7125ba49978dc73c2987c0a6101f741dc5a60a08cb3346d4c5082400cbcfcdd008
-SHA512 (newlib-cygwin-50e2a63b04bdd018484605fbb954fd1bd5147fa0.tar.xz) = 9ceea0b883185fe489724d54a7e909bb6ed4785fcadf80162033dc6a133e2657337175601278e4155d1f8fac275ff9c8a02572aea876166c608774c809f832e9
-SHA512 (nvptx-tools-5f6f343a302d620b0868edab376c00b15741e39e.tar.xz) = f6d10db94fa1570ae0f94df073fa3c73c8e5ee16d59070b53d94f7db0de8a031bc44d7f3f1852533da04b625ce758e022263855ed43cfc6867e0708d001e53c7
+SHA512 (gcc-13.2.1-20230728.tar.xz) = 7698968e1eabfe8ae8ff79806d9c15a50e861b2776ea5968e6b1f2ebf399d7b62cc4066d7d43b3cd791b790f41c2da401c33a0b258b640bf4c1f1cebd2cac99a
+SHA512 (isl-0.24.tar.bz2) = aab3bddbda96b801d0f56d2869f943157aad52a6f6e6a61745edd740234c635c38231af20bc3f1a08d416a5e973a90e18249078ed8e4ae2f1d5de57658738e95
+SHA512 (newlib-cygwin-9e09d6ed83cce4777a5950412647ccc603040409.tar.xz) = bef3fa04f7b1a915fc1356ebed114698b5cc835e9fa04b0becff05a9efc76c59fb376482990873d222d7acdcfee3c4f30f5a4cb7f3be1f291f1fa5f1c7a9d983
+SHA512 (nvptx-tools-93e00909ceb9cbbc104f0fcba56c0361ffb3ca4b.tar.xz) = c719fad8689b2b6f3c888d0308604ddef884037d71ec3e755c68052d30075a181c29358fda516833ace437921b17602b147be7886317be94ec9736faa8cb52be

tests/Regression/394271-gcc-optimization-error-for-neg-number-abs/abs.c

@@ -0,0 +1,12 @@
+#include <stdio.h>
+#include <stdlib.h>
+
+int
+main ()
+{
+  int i = 2;
+  if (-10 * abs (i - 1) == 10 * abs (i - 1))
+    return 1;
+
+  return 0;
+}

tests/Regression/394271-gcc-optimization-error-for-neg-number-abs/main.fmf

@@ -0,0 +1,26 @@
+summary: gcc optimization error for neg number * abs() [extract_muldiv]
+description: |
+    abs() from gcc was broken so it gave wrong results.
+contact: mcermak@redhat.com
+component:
+  - gcc
+test: bash ./runtest.sh
+path: /tests/Regression/394271-gcc-optimization-error-for-neg-number-abs
+framework: beakerlib
+require:
+  - gcc
+duration: 5m
+enabled: true
+tier: '1'
+link:
+  - relates: https://bugzilla.redhat.com/show_bug.cgi?id=394271
+tag:
+  - CI-Tier-1
+  - DTS8-INTEROP-CI
+  - DTS9-INTEROP-CI
+  - Tier1
+  - dts_smoke
+  - dts_stable
+extra-nitrate: TC#0062143
+extra-summary: /tools/gcc/Regression/gcc/394271-gcc-optimization-error-for-neg-number-abs
+extra-task: /tools/gcc/Regression/gcc/394271-gcc-optimization-error-for-neg-number-abs

tests/Regression/394271-gcc-optimization-error-for-neg-number-abs/runtest.sh

@@ -0,0 +1,52 @@
+#!/bin/bash
+
+# Copyright (c) 2008, 2012 Red Hat, Inc. All rights reserved.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+# 
+# Author: Michal Nowak <mnowak@redhat.com>
+#	  Marek Polacek <polacek@redhat.com>
+
+# Include rhts environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+GCC="${GCC:-$(type -P gcc)}"
+PACKAGE=$(rpm --qf '%{name}' -qf $GCC)
+
+rlJournalStart
+    rlPhaseStartSetup
+        rlAssertRpm $PACKAGE
+        rlRun "TmpDir=\`mktemp -d\`"
+        rlRun "cp -v abs.c $TmpDir"
+        rlRun "pushd $TmpDir"
+        gcc -dumpversion | grep -q '^4\.4' && export OLDGCC="true"
+    rlPhaseEnd
+
+    rlPhaseStartTest "Testing the executable"
+    OPTS="-O0 -O1 -O2 -O3 -Os -Ofast -Og"
+    if [ "$OLDGCC" = "true" ]; then
+        OPTS=${OPTS/ -Ofast -Og/}
+    fi
+    for opt in "" $OPTS; do
+        rlRun "$GCC -g $opt -o abs$opt abs.c" 0 "Compiling the test case [ $opt ]"
+        rlRun "./abs$opt" 0 "Checking whether we have an working executable [ $opt ]"
+    done
+    rlPhaseEnd
+
+    rlPhaseStartCleanup
+        rlRun "popd"
+        rlRun "rm -r $TmpDir"
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/462397-unzip-problem-with-CRC-error-for-src-4.1.0.zip-file/main.fmf

@@ -0,0 +1,29 @@
+summary: unzip problem with CRC error for src-4.1.0.zip file on s390x
+description: |
+    A customer has been trying to unzip the file src-4.1.0.zip
+    which is contained libgcj4-src-4.1.0-18.EL4.s390x.rpm. However,
+    unzip command can't run correctly with the CRC errors
+    It seems that the src-4.1.0.zip is broken.
+contact: mcermak@redhat.com
+component:
+  - gcc
+test: bash ./runtest.sh
+framework: beakerlib
+require:
+  - gcc
+  - libgcj-src
+duration: 5m
+enabled: true
+tag:
+  - CI-Tier-1
+  - Tier1
+tier: '1'
+link:
+  - relates: https://bugzilla.redhat.com/show_bug.cgi?id=462397
+adjust:
+  - enabled: false
+    when: distro != rhel-5 and distro != rhel-6
+    continue: false
+extra-nitrate: TC#0147365
+extra-summary: /tools/gcc/Sanity/462397-unzip-problem-with-CRC-error-for-src-4.1.0.zip-file
+extra-task: /tools/gcc/Sanity/462397-unzip-problem-with-CRC-error-for-src-4.1.0.zip-file

tests/Regression/462397-unzip-problem-with-CRC-error-for-src-4.1.0.zip-file/runtest.sh

@@ -0,0 +1,53 @@
+#!/bin/bash
+
+# Copyright (c) 2008, 2012 Red Hat, Inc. All rights reserved.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+# 
+# Author: Michal Nowak <mnowak@redhat.com>
+#         Marek Polacek <polacek@redhat.com>
+
+# Include rhts environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+PACKAGES=(gcc libgcj-src)
+
+rlJournalStart
+    rlPhaseStartSetup
+        for p in "${PACKAGES[@]}"; do
+            rlAssertRpm "$p"
+        done; unset p
+        rlRun "TmpDir=\`mktemp -d\`"
+        rlRun "pushd $TmpDir"
+    rlPhaseEnd
+
+srclist="/usr/share/java/src-*"
+for src in ${srclist}; do
+
+    rlPhaseStartTest "Try to unzip src file"
+        rm -rf tmp/; mkdir tmp/
+        rlRun "cp -fv ${src} tmp/" 0 "[${src}]: Copy the zip file to tmp/"
+        cd tmp/
+        rlRun "unzip ${src}" 0 "[${src}] Verify that is possible to unzip ${src}"
+        cd ..
+    rlPhaseEnd
+
+done
+
+    rlPhaseStartCleanup
+        rlRun "popd"
+        rlRun "rm -r $TmpDir"
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/465974-DW_TAG_common_block-has-incorrect-placement-scope/abc.f90

@@ -0,0 +1,22 @@
+      subroutine a
+      INTEGER*4 a_i
+      common /block/a_i
+      a_i = 1
+      end subroutine a
+      subroutine b
+      INTEGER*4 b_i
+      common /block/b_i
+      a_i = 3
+      b_i = 2
+      end subroutine b
+      subroutine c
+      INTEGER*4 a_i
+      common /block/a_i
+      if (a_i .ne. 2) call abort
+      end subroutine c
+      program abc
+      call a
+      call b
+      call c
+      end program abc
+

tests/Regression/465974-DW_TAG_common_block-has-incorrect-placement-scope/main.fmf

@@ -0,0 +1,38 @@
+summary: Fortran DW_TAG_common_block has incorrect placement/scope
+description: |+
+    Problem: gcc-4.3.2 / gfortran-4.3.2 (in the forthcoming tech-preview for
+    RHEL5.3) appears to also have the "DW_TAG_common_block has incorrect
+    placement/scope" issues listed in the following gcc upstream bug:
+
+    http://gcc.gnu.org/bugzilla/show_bug.cgi?id=37738
+
+    What gfortran is doing currently is:
+
+    (1) Merges all common blocks into a single one.
+    (2) Places this single common block into the first subroutine where it was
+    used.
+
+contact: mcermak@redhat.com
+component:
+  - gcc
+test: bash ./runtest.sh
+path: /tests/Regression/465974-DW_TAG_common_block-has-incorrect-placement-scope
+framework: beakerlib
+require:
+  - gcc
+  - gcc-gfortran
+duration: 5m
+tier: '1'
+enabled: true
+link:
+  - relates: https://bugzilla.redhat.com/show_bug.cgi?id=465974
+tag:
+  - CI-Tier-1
+  - DTS8-INTEROP-CI
+  - DTS9-INTEROP-CI
+  - Tier1
+  - dts_smoke
+  - dts_stable
+extra-nitrate: TC#0062268
+extra-summary: /tools/gcc/g77/465974-DW_TAG_common_block-has-incorrect-placement-scope
+extra-task: /tools/gcc/g77/465974-DW_TAG_common_block-has-incorrect-placement-scope

tests/Regression/465974-DW_TAG_common_block-has-incorrect-placement-scope/runtest.sh

@@ -0,0 +1,56 @@
+#!/bin/bash
+# Copyright (c) 2008, 2012 Red Hat, Inc. All rights reserved.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+# 
+# Author: Michal Nowak <mnowak@redhat.com>
+#         Marek Polacek <polacek@redhat.com>
+
+# Include rhts environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+PACKAGES=(gcc gcc-gfortran) 
+
+GFORTRAN=${GFORTRAN:-gfortran}
+
+rlJournalStart
+    rlPhaseStartSetup
+        if type gcc | grep -q -v toolset; then
+            # assert only of not devtoolset/gcc-toolset
+            for p in "${PACKAGES[@]}"; do
+                rlAssertRpm "$p"
+            done; unset p
+        fi
+        rlRun "TmpDir=\`mktemp -d\`"
+        rlRun "cp -v abc.f90 $TmpDir"
+        rlRun "pushd $TmpDir"
+    rlPhaseEnd
+
+    rlPhaseStartTest "Testing the executable via readelf -w"
+        # Compile
+        rlRun "$GFORTRAN -g -o abc abc.f90" 0 "Compiling the test case: abc.f90"
+        rlRun "./abc" 0 "Checking whether we have an working executable"
+        rlWatchdog "readelf -w abc 2>&1 | tee gcc-readelf.log" 10
+        rlAssert0 "Checking if 'readelf' ends itself" $?
+        # Test
+        cb=$(grep Abbrev gcc-readelf.log | grep DW_TAG_common_block -c)
+        rlRun "if [ ${cb} -eq 3 ]; then true; else false; fi" 0 "Expected amount of common blocks is 3; got ${cb}"
+    rlPhaseEnd
+
+    rlPhaseStartCleanup
+        rlRun "popd"
+        rlRun "rm -r $TmpDir"
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/515799-RHEL5-gcc-if-more-than-one-fno-builtin/builtin.c

@@ -0,0 +1,29 @@
+#include <stdio.h>
+
+/* Compile flags:
+ *   gcc -fno-builtin-isascii -fno-builtin-isalnum -o builtin builtin.c
+ *
+ * Expected output:
+ *   Using custom isascii() function
+ *   ret = 0
+ *
+ * Expected return value:
+ *   0
+ */
+
+int isascii(int c)
+{
+        printf("Using custom isascii() function\n");
+        return 0;
+}
+
+main()
+{
+        int c = 65;
+        int ret;
+
+        ret = isascii(c);
+        printf("ret = %d\n", ret);
+
+        return ret;
+}

tests/Regression/515799-RHEL5-gcc-if-more-than-one-fno-builtin/main.fmf

@@ -0,0 +1,33 @@
+summary: 'Test for bz515799 ([RHEL5] gcc: if more than one -fno-builtin-*)'
+description: |
+    Bug summary: [RHEL5] gcc: if more than one -fno-builtin-* options are specified, only the last one is effective
+    Bugzilla link: https://bugzilla.redhat.com/show_bug.cgi?id=515799
+
+    This test compiles builtin.c with the flags '-fno-builtin-isascii 
+    -fno-builtin-isalnum'.  This program contains a custom isascii() function
+    that always returns 0.  If gcc honors the -fno-builtin-isascii flag, it
+    will return 0.  If not, it will use the built-in isascii() function which
+    will return 1.
+contact: mcermak@redhat.com
+component:
+  - gcc
+test: bash ./runtest.sh
+path: /tests/Regression/515799-RHEL5-gcc-if-more-than-one-fno-builtin
+framework: beakerlib
+require:
+  - gcc
+duration: 5m
+enabled: true
+tier: '1'
+link:
+  - relates: https://bugzilla.redhat.com/show_bug.cgi?id=515799
+tag:
+  - CI-Tier-1
+  - DTS8-INTEROP-CI
+  - DTS9-INTEROP-CI
+  - Tier1
+  - dts_smoke
+  - dts_stable
+extra-nitrate: TC#0063259
+extra-summary: /tools/gcc/Regression/gcc/515799-RHEL5-gcc-if-more-than-one-fno-builtin
+extra-task: /tools/gcc/Regression/gcc/515799-RHEL5-gcc-if-more-than-one-fno-builtin

tests/Regression/515799-RHEL5-gcc-if-more-than-one-fno-builtin/runtest.sh

@@ -0,0 +1,58 @@
+#!/bin/bash
+# vim: dict=/usr/share/rhts-library/dictionary.vim cpt=.,w,b,u,t,i,k
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   runtest.sh of /tools/gcc/Regression/gcc/515799-RHEL5-gcc-if-more-than-one-fno-builtin
+#   Description: Test for bz515799 ([RHEL5] gcc: if more than one -fno-builtin-*)
+#   Author: Jeffrey Bastian <jbastian@redhat.com>
+#           Marek Polacek <polacek@redhat.com>
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   Copyright (c) 2009, 2012 Red Hat, Inc. All rights reserved.
+#
+#   This copyrighted material is made available to anyone wishing
+#   to use, modify, copy, or redistribute it subject to the terms
+#   and conditions of the GNU General Public License version 2.
+#
+#   This program is distributed in the hope that it will be
+#   useful, but WITHOUT ANY WARRANTY; without even the implied
+#   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+#   PURPOSE. See the GNU General Public License for more details.
+#
+#   You should have received a copy of the GNU General Public
+#   License along with this program; if not, write to the Free
+#   Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+#   Boston, MA 02110-1301, USA.
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+# Include rhts environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+PACKAGES=(gcc)
+
+GCC=${GCC:-gcc}
+
+rlJournalStart
+    rlPhaseStartSetup
+        for p in "${PACKAGES[@]}"; do
+            rlAssertRpm "$p"
+        done; unset p
+        rlRun "TmpDir=\`mktemp -d\`"
+        rlRun "cp -v builtin.c $TmpDir"
+        rlRun "pushd $TmpDir"
+    rlPhaseEnd
+
+    rlPhaseStartTest 
+        rlRun "$GCC -fno-builtin-isascii -fno-builtin-isalnum -o builtin builtin.c"
+        rlAssertExists "builtin"
+        rlRun "./builtin"
+    rlPhaseEnd
+
+    rlPhaseStartCleanup
+        rlRun "popd"
+        rlRun "rm -r $TmpDir"
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/537941-libltdl-may-load-library-in-current-directory/foo.java

@@ -0,0 +1,5 @@
+public class foo {
+	public static void main(String[] args) {
+		System.loadLibrary("foolib");
+	}
+} 

tests/Regression/537941-libltdl-may-load-library-in-current-directory/main.fmf

@@ -0,0 +1,39 @@
+summary: 'CVE-2009-3736 libtool: libltdl may load and execute code from a library
+    in the current directory'
+description: |
+    cat > ~/foo.java <\EOF public class foo { public static void main(String[] args) { System.loadLibrary("foolib"); } } EOF 
+    cd 
+    gcj -C foo.java 
+    cd /tmp 
+    strace -f -v -s1024 gij -cp ~/ foo 2>&1 | grep foolib 
+
+    (resp. s/gcj/gcj4/g;s/gij/gij4/ for gcc4 testing). 
+
+    If any relative path is seen, it is wrong. Bad examples are 
+
+    {lib,}foolib.la 
+    {hwcap,0,nosegneg}/{lib,}foolib.{so,la}
+contact: mcermak@redhat.com
+component:
+  - gcc
+test: ./runtest.sh
+framework: beakerlib
+require:
+  - gcc
+  - gcc-java
+  - libgcj
+  - strace
+duration: 5m
+enabled: false
+tag:
+  - CI-Tier-1
+  - Tier1
+tier: '1'
+link:
+  - relates: https://bugzilla.redhat.com/show_bug.cgi?id=537941
+adjust:
+  - enabled: true
+    when: distro == rhel-6 or distro == rhel-5
+extra-nitrate: TC#0062145
+extra-summary: /tools/gcc/Regression/gcj/537941-libltdl-may-load-library-in-current-directory
+extra-task: /tools/gcc/Regression/gcj/537941-libltdl-may-load-library-in-current-directory

tests/Regression/537941-libltdl-may-load-library-in-current-directory/runtest.sh

@@ -0,0 +1,71 @@
+#!/bin/bash
+
+# Copyright (c) 2008, 2012 Red Hat, Inc. All rights reserved.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+# 
+# Author: Michal Nowak <mnowak@redhat.com>
+#         Marek Polacek <polacek@redhat.com>
+
+# Include rhts environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+PACKAGES=(gcc libgcj strace gcc-java)
+
+rlJournalStart
+    rlPhaseStartSetup
+        for p in "${PACKAGES[@]}"; do
+            rlAssertRpm "$p"
+        done; unset p
+        rlRun "TmpDir=\`mktemp -d\`"
+        rlRun "cp -v foo.java $TmpDir"
+        rlRun "pushd $TmpDir"
+    rlPhaseEnd
+
+# I weeded out the if (isRHEL 3) support.
+for gj in "" "4"; do
+    gcj_name="/usr/bin/gcj${gj}"
+    gij_name="/usr/bin/gij${gj}"
+    if [ -x ${gcj_name} ] && [ -x ${gij_name} ]; then
+        gcj_basename=$(basename ${gcj_name})
+        gij_basename=$(basename ${gij_name})
+
+            rlPhaseStartTest "[${gij_basename}] Interpreting and compiling via java"
+                rlRun "${gcj_name} -C foo.java" 0 "[${gcj_basename}] Creating bytecode"
+                mv foo.class ~
+                pushd /tmp
+
+                echo "Dry run w/o strace"
+                ${gij_basename} -cp ~/ foo
+
+                echo "=== Dry run end ==="
+                strace -f -v -s1024 ${gij_basename} -cp ~/ foo 2>&1 | tee out.${gij_basename}
+                echo
+                grep foolib out.${gij_basename}
+                foolib_cnt="$(grep foolib out.${gij_basename} -c)"
+                echo
+                rlRun "if [ ${foolib_cnt} -ne 0 ]; then egrep '\"libfoolib.la|\"foolib.la' out.${gij_basename}; else echo \"Zero lines w/ foolib\"; true; fi" 1 "[${gij_basename}] Interpreting test case" # use 'true' (sic!)
+                popd
+                rm -f ~/foo.class
+            rlPhaseEnd
+
+    fi
+done
+
+    rlPhaseStartCleanup
+        rlRun "popd"
+        rlRun "rm -r $TmpDir"
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/bz1611637-immintrin_h_include_list_does_not_match_release/main.fmf

@@ -0,0 +1,32 @@
+summary: Test for BZ#1611637 (devtoolset-8-gcc includes avx512vbmi2intrin.h but)
+description: |
+    Bug summary: devtoolset-8-gcc includes avx512vbmi2intrin.h but does not contain it
+    Bugzilla link: https://bugzilla.redhat.com/show_bug.cgi?id=1611637
+
+    The list of intrinsic headers keeps changing every release, sometimes
+    even on the release branch, and %files needs to be in sync with what has
+    been changed in gcc/config.gcc. immintrin.h is one of those headers and
+    this test makes sure that we can #include it.
+contact: Vaclav Kadlcik <vkadlcik@redhat.com>
+component:
+  - gcc
+test: bash ./runtest.sh
+framework: beakerlib
+require:
+  - gcc
+duration: 5m
+enabled: true
+tag:
+  - CI-Tier-1
+link:
+  - relates: https://bugzilla.redhat.com/show_bug.cgi?id=1611637
+adjust:
+  - enabled: false
+    when: arch != x86_64
+    continue: false
+  - enabled: false
+    when: distro == rhel-5
+    continue: false
+extra-nitrate: TC#0575308
+extra-summary: /tools/gcc/Regression/bz1611637-immintrin_h_include_list_does_not_match_release
+extra-task: /tools/gcc/Regression/bz1611637-immintrin_h_include_list_does_not_match_release

tests/Regression/bz1611637-immintrin_h_include_list_does_not_match_release/runtest.sh

@@ -0,0 +1,54 @@
+#!/bin/bash
+# vim: dict+=/usr/share/beakerlib/dictionary.vim cpt=.,w,b,u,t,i,k
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   runtest.sh of /tools/gcc/Regression/bz1611637-immintrin_h_include_list_does_not_match_release
+#   Description: Test for BZ#1611637 (devtoolset-8-gcc includes avx512vbmi2intrin.h but)
+#   Author: Michael Petlan <mpetlan@redhat.com>
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   Copyright (c) 2018 Red Hat, Inc.
+#
+#   This program is free software: you can redistribute it and/or
+#   modify it under the terms of the GNU General Public License as
+#   published by the Free Software Foundation, either version 2 of
+#   the License, or (at your option) any later version.
+#
+#   This program is distributed in the hope that it will be
+#   useful, but WITHOUT ANY WARRANTY; without even the implied
+#   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+#   PURPOSE.  See the GNU General Public License for more details.
+#
+#   You should have received a copy of the GNU General Public License
+#   along with this program. If not, see http://www.gnu.org/licenses/.
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+# Include Beaker environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+GCC=${GCC:-gcc}
+
+rlJournalStart
+    rlPhaseStartSetup
+        cat > a.c <<EOF
+#include <immintrin.h>
+int main(void)
+{
+  return 0;
+}
+EOF
+        rlAssertExists "a.c"
+    rlPhaseEnd
+
+    rlPhaseStartTest
+        rlRun "$GCC -o a a.c"
+        rlAssertExists "a"
+    rlPhaseEnd
+
+    rlPhaseStartCleanup
+        rlRun "rm -f a a.c"
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/bz1815504-Regression-in-the-line-information-debug/main.fmf

@@ -0,0 +1,12 @@
+summary: Test for BZ#1815504 (Regression in the line information debug)
+description: |
+    Bug summary: Regression in the line information debug information generated by gcc
+    Bugzilla link: https://bugzilla.redhat.com/show_bug.cgi?id=1815504
+recommend:
+- gcc
+- valgrind
+duration: 5m
+link:
+-   relates: https://bugzilla.redhat.com/show_bug.cgi?id=1815504
+extra-summary: /tools/gcc/Regression/bz1815504-Regression-in-the-line-information-debug
+extra-task: /tools/gcc/Regression/bz1815504-Regression-in-the-line-information-debug

tests/Regression/bz1815504-Regression-in-the-line-information-debug/runtest.sh

@@ -0,0 +1,50 @@
+#!/bin/bash
+# vim: dict+=/usr/share/beakerlib/dictionary.vim cpt=.,w,b,u,t,i,k
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   runtest.sh of /tools/gcc/Regression/bz1815504-Regression-in-the-line-information-debug
+#   Description: Test for BZ#1815504 (Regression in the line information debug)
+#   Author: Alexandra Hájková <ahajkova@redhat.com>
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   Copyright (c) 2021 Red Hat, Inc.
+#
+#   This program is free software: you can redistribute it and/or
+#   modify it under the terms of the GNU General Public License as
+#   published by the Free Software Foundation, either version 2 of
+#   the License, or (at your option) any later version.
+#
+#   This program is distributed in the hope that it will be
+#   useful, but WITHOUT ANY WARRANTY; without even the implied
+#   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+#   PURPOSE.  See the GNU General Public License for more details.
+#
+#   You should have received a copy of the GNU General Public License
+#   along with this program. If not, see http://www.gnu.org/licenses/.
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+# Include Beaker environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+PACKAGE="gcc"
+
+rlJournalStart
+    rlPhaseStartSetup
+        rlAssertRpm $PACKAGE
+        rlRun "TmpDir=\$(mktemp -d)" 0 "Creating tmp directory"
+        rlRun "pushd $TmpDir"
+    rlPhaseEnd
+
+    rlPhaseStartTest
+        rlRun "valgrind -q date &> log" 0
+        rlAssertNotGrep "Can't handle inlined call info entry with line number" log
+    rlPhaseEnd
+
+    rlPhaseStartCleanup
+        rlRun "popd"
+        rlRun "rm -r $TmpDir" 0 "Removing tmp directory"
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/bz1852781-Compiling-with-flto-and-g-removes-CET-support/main.fmf

@@ -0,0 +1,17 @@
+summary: Test for BZ#1852781 (Compiling with -flto and -g removes CET support)
+description: |
+    Bug summary: Compiling with -flto and -g removes CET support
+    Bugzilla link: https://bugzilla.redhat.com/show_bug.cgi?id=1852781
+contact: Alexandra Hájková <ahajkova@redhat.com>
+component:
+- gcc
+test: ./runtest.sh
+framework: beakerlib
+recommend:
+- gcc
+- binutils
+duration: 15m
+link:
+-   relates: https://bugzilla.redhat.com/show_bug.cgi?id=1852781
+extra-summary: /tools/gcc/Regression/bz1852781-Compiling-with-flto-and-g-removes-CET-support
+extra-task: /tools/gcc/Regression/bz1852781-Compiling-with-flto-and-g-removes-CET-support

tests/Regression/bz1852781-Compiling-with-flto-and-g-removes-CET-support/runtest.sh

@@ -0,0 +1,55 @@
+#!/bin/bash
+# vim: dict+=/usr/share/beakerlib/dictionary.vim cpt=.,w,b,u,t,i,k
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   runtest.sh of /tools/gcc/Regression/bz1852781-Compiling-with-flto-and-g-removes-CET-support
+#   Description: Test for BZ#1852781 (Compiling with -flto and -g removes CET support)
+#   Author: Alexandra Hájková <ahajkova@redhat.com>
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   Copyright (c) 2020 Red Hat, Inc.
+#
+#   This program is free software: you can redistribute it and/or
+#   modify it under the terms of the GNU General Public License as
+#   published by the Free Software Foundation, either version 2 of
+#   the License, or (at your option) any later version.
+#
+#   This program is distributed in the hope that it will be
+#   useful, but WITHOUT ANY WARRANTY; without even the implied
+#   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+#   PURPOSE.  See the GNU General Public License for more details.
+#
+#   You should have received a copy of the GNU General Public License
+#   along with this program. If not, see http://www.gnu.org/licenses/.
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+# Include Beaker environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+PACKAGE="gcc"
+TESTPROG="x"
+
+rlJournalStart
+    rlPhaseStartSetup
+        rlAssertRpm $PACKAGE
+        rlRun "TmpDir=\$(mktemp -d)" 0 "Creating tmp directory"
+        rlRun "cp $TESTPROG.c $TmpDir"
+        rlRun "pushd $TmpDir"
+    rlPhaseEnd
+
+    rlPhaseStartTest
+        rlRun "gcc -flto -c -fcf-protection -g $TESTPROG.c"
+        rlRun "gcc -flto -Wl,-z,cet-report=error -fcf-protection -g $TESTPROG.o &> log"
+        rlAssertNotGrep " missing IBT and SHSTK properties" log
+        rlRun "readelf --wide --notes a.out | grep IBT &> log"
+        rlAsserGrep "IBT, SHSTK" log
+    rlPhaseEnd
+
+    rlPhaseStartCleanup
+        rlRun "popd"
+        rlRun "rm -r $TmpDir" 0 "Removing tmp directory"
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/bz1852781-Compiling-with-flto-and-g-removes-CET-support/x.c

@@ -0,0 +1,8 @@
+#include <stdio.h>
+
+int
+main ()
+{
+  printf ("hello\n");
+  return 0;
+}

tests/Regression/bz1853900-typeinfo-for-std-codecvt-utf8-wchar-t-1114111ul/main.fmf

@@ -0,0 +1,17 @@
+summary: Test for BZ#1853900 (typeinfo for stdcodecvt_utf8<wchar_t, 1114111ul,)
+description: |
+    Bug summary: typeinfo for std::codecvt_utf8<wchar_t, 1114111ul, (std::codecvt_mode)0> not found
+    Bugzilla link: https://bugzilla.redhat.com/show_bug.cgi?id=1853900
+contact: Alexandra Hájková <ahajkova@redhat.com>
+component:
+- gcc
+test: ./runtest.sh
+framework: beakerlib
+recommend:
+- gcc
+- gcc-c++
+duration: 10m
+link:
+-   relates: https://bugzilla.redhat.com/show_bug.cgi?id=1853900
+extra-summary: /tools/gcc/Regression/bz1853900-typeinfo-for-std-codecvt-utf8-wchar-t-1114111ul
+extra-task: /tools/gcc/Regression/bz1853900-typeinfo-for-std-codecvt-utf8-wchar-t-1114111ul

tests/Regression/bz1853900-typeinfo-for-std-codecvt-utf8-wchar-t-1114111ul/runtest.sh

@@ -0,0 +1,52 @@
+#!/bin/bash
+# vim: dict+=/usr/share/beakerlib/dictionary.vim cpt=.,w,b,u,t,i,k
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   runtest.sh of /tools/gcc/Regression/bz1853900-typeinfo-for-std-codecvt-utf8-wchar-t-1114111ul
+#   Description: Test for BZ#1853900 (typeinfo for stdcodecvt_utf8<wchar_t, 1114111ul,)
+#   Author: Alexandra Hájková <ahajkova@redhat.com>
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   Copyright (c) 2020 Red Hat, Inc.
+#
+#   This program is free software: you can redistribute it and/or
+#   modify it under the terms of the GNU General Public License as
+#   published by the Free Software Foundation, either version 2 of
+#   the License, or (at your option) any later version.
+#
+#   This program is distributed in the hope that it will be
+#   useful, but WITHOUT ANY WARRANTY; without even the implied
+#   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+#   PURPOSE.  See the GNU General Public License for more details.
+#
+#   You should have received a copy of the GNU General Public License
+#   along with this program. If not, see http://www.gnu.org/licenses/.
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+# Include Beaker environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+PACKAGE="gcc"
+TESTPROG="test.cc"
+
+rlJournalStart
+    rlPhaseStartSetup
+        rlAssertRpm $PACKAGE
+        rlRun "TmpDir=\$(mktemp -d)" 0 "Creating tmp directory"
+        rlRun "cp $TESTPROG $TmpDir"
+        rlRun "pushd $TmpDir"
+    rlPhaseEnd
+
+    rlPhaseStartTest
+        rlRun "g++ -std=c++17 $TESTPROG &> log"
+        rlAssertNotGrep "hidden symbol " log
+    rlPhaseEnd
+
+    rlPhaseStartCleanup
+        rlRun "popd"
+        rlRun "rm -r $TmpDir" 0 "Removing tmp directory"
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/bz1853900-typeinfo-for-std-codecvt-utf8-wchar-t-1114111ul/test.cc

@@ -0,0 +1,7 @@
+#include <filesystem>
+
+namespace fs = std::filesystem;
+int main() {
+    fs::create_directory("sandbox");
+    fs::remove_all("sandbox");
+}

tests/Regression/bz1878841-GOMP-parallel-loop-nonmonotonic-dynamic-and/main.fmf

@@ -0,0 +1,16 @@
+summary: Test for BZ#1878841 (GOMP_parallel_loop_nonmonotonic_dynamic and)
+description: |
+    Bug summary: GOMP_parallel_loop_nonmonotonic_dynamic and GOMP_loop_nonmonotonic_dynamic_next missing
+    Bugzilla link: https://bugzilla.redhat.com/show_bug.cgi?id=1878841
+contact: Alexandra Hájková <ahajkova@redhat.com>
+component:
+- gcc
+test: ./runtest.sh
+framework: beakerlib
+recommend:
+- gcc
+duration: 5m
+link:
+-   relates: https://bugzilla.redhat.com/show_bug.cgi?id=1878841
+extra-summary: /tools/gcc/Regression/bz1878841-GOMP-parallel-loop-nonmonotonic-dynamic-and
+extra-task: /tools/gcc/Regression/bz1878841-GOMP-parallel-loop-nonmonotonic-dynamic-and

tests/Regression/bz1878841-GOMP-parallel-loop-nonmonotonic-dynamic-and/runtest.sh

@@ -0,0 +1,52 @@
+#!/bin/bash
+# vim: dict+=/usr/share/beakerlib/dictionary.vim cpt=.,w,b,u,t,i,k
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   runtest.sh of /tools/gcc/Regression/bz1878841-GOMP-parallel-loop-nonmonotonic-dynamic-and
+#   Description: Test for BZ#1878841 (GOMP_parallel_loop_nonmonotonic_dynamic and)
+#   Author: Alexandra Hájková <ahajkova@redhat.com>
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   Copyright (c) 2020 Red Hat, Inc.
+#
+#   This program is free software: you can redistribute it and/or
+#   modify it under the terms of the GNU General Public License as
+#   published by the Free Software Foundation, either version 2 of
+#   the License, or (at your option) any later version.
+#
+#   This program is distributed in the hope that it will be
+#   useful, but WITHOUT ANY WARRANTY; without even the implied
+#   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+#   PURPOSE.  See the GNU General Public License for more details.
+#
+#   You should have received a copy of the GNU General Public License
+#   along with this program. If not, see http://www.gnu.org/licenses/.
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+# Include Beaker environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+PACKAGE="gcc"
+TESTPROG="tst"
+
+rlJournalStart
+    rlPhaseStartSetup
+        rlAssertRpm $PACKAGE
+        rlRun "TmpDir=\$(mktemp -d)" 0 "Creating tmp directory"
+        rlRun "cp $TESTPROG.c $TmpDir"
+        rlRun "pushd $TmpDir"
+    rlPhaseEnd
+
+    rlPhaseStartTest
+        rlRun "gcc -fopenmp $TESTPROG.c &> log"
+        rlAssertNotGrep "undefined reference to `GOMP_parallel_loop_nonmonotonic_dynamic`" log
+    rlPhaseEnd
+
+    rlPhaseStartCleanup
+        rlRun "popd"
+        rlRun "rm -r $TmpDir" 0 "Removing tmp directory"
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/bz1878841-GOMP-parallel-loop-nonmonotonic-dynamic-and/tst.c

@@ -0,0 +1,6 @@
+#include <omp.h>
+int main ()
+{
+  #pragma omp parallel for schedule(dynamic)
+  for (int i = 0; i < 10; i++);
+}

tests/Regression/bz1893340-Variadic-arguments-are-missing-from-debugging-data/b.gdb

@@ -0,0 +1,2 @@
+info functions foo
+q

tests/Regression/bz1893340-Variadic-arguments-are-missing-from-debugging-data/main.fmf

@@ -0,0 +1,17 @@
+summary: Test for BZ#1893340 (Variadic arguments are missing from debugging data)
+description: |
+    Bug summary: Variadic arguments are missing from debugging data when building with -flto
+    Bugzilla link: https://bugzilla.redhat.com/show_bug.cgi?id=1893340
+contact: Alexandra Hájková <ahajkova@redhat.com>
+component:
+- gcc
+test: ./runtest.sh
+framework: beakerlib
+recommend:
+- gcc
+- gdb
+duration: 5m
+link:
+-   relates: https://bugzilla.redhat.com/show_bug.cgi?id=1893340
+extra-summary: /tools/gcc/Regression/bz1893340-Variadic-arguments-are-missing-from-debugging-data
+extra-task: /tools/gcc/Regression/bz1893340-Variadic-arguments-are-missing-from-debugging-data

tests/Regression/bz1893340-Variadic-arguments-are-missing-from-debugging-data/runtest.sh

@@ -0,0 +1,52 @@
+#!/bin/bash
+# vim: dict+=/usr/share/beakerlib/dictionary.vim cpt=.,w,b,u,t,i,k
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   runtest.sh of /tools/gcc/Regression/bz1893340-Variadic-arguments-are-missing-from-debugging-data
+#   Description: Test for BZ#1893340 (Variadic arguments are missing from debugging data)
+#   Author: Alexandra Hájková <ahajkova@redhat.com>
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   Copyright (c) 2021 Red Hat, Inc.
+#
+#   This program is free software: you can redistribute it and/or
+#   modify it under the terms of the GNU General Public License as
+#   published by the Free Software Foundation, either version 2 of
+#   the License, or (at your option) any later version.
+#
+#   This program is distributed in the hope that it will be
+#   useful, but WITHOUT ANY WARRANTY; without even the implied
+#   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+#   PURPOSE.  See the GNU General Public License for more details.
+#
+#   You should have received a copy of the GNU General Public License
+#   along with this program. If not, see http://www.gnu.org/licenses/.
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+# Include Beaker environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+PACKAGE="gcc"
+
+rlJournalStart
+    rlPhaseStartSetup
+        rlAssertRpm $PACKAGE
+        rlRun "TmpDir=\$(mktemp -d)" 0 "Creating tmp directory"
+        rlRun "cp test.c b.gdb $TmpDir"
+        rlRun "pushd $TmpDir"
+    rlPhaseEnd
+
+    rlPhaseStartTest
+    rlRun "gcc -fPIC -shared -o libtest.so -O0 -g test.c"
+    rlRun "gdb -x b.gdb libtest.so > gdb.log"
+    rlAssertGrep "void foo(int, ...);" gdb.log
+    rlPhaseEnd
+
+    rlPhaseStartCleanup
+        rlRun "popd"
+        rlRun "rm -r $TmpDir" 0 "Removing tmp directory"
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/bz1893340-Variadic-arguments-are-missing-from-debugging-data/test.c

@@ -0,0 +1,6 @@
+#include <stdarg.h>
+void foo(int args, ...) {
+    va_list ap;
+    va_start(ap, args);
+    va_end(ap);
+}

tests/Regression/bz1896093-Compiling-with-flto-auto-fails-if-make-is-not/main.fmf

@@ -0,0 +1,16 @@
+summary: Test for BZ#1896093 (Compiling with -flto=auto fails if make is not)
+description: |
+    Bug summary: Compiling with -flto=auto fails if make is not installed
+    Bugzilla link: https://bugzilla.redhat.com/show_bug.cgi?id=1896093
+contact: Alexandra Hájková <ahajkova@redhat.com>
+component:
+- gcc
+test: ./runtest.sh
+framework: beakerlib
+recommend:
+- gcc
+duration: 5m
+link:
+-   relates: https://bugzilla.redhat.com/show_bug.cgi?id=1896093
+extra-summary: /tools/gcc/Regression/bz1896093-Compiling-with-flto-auto-fails-if-make-is-not
+extra-task: /tools/gcc/Regression/bz1896093-Compiling-with-flto-auto-fails-if-make-is-not

tests/Regression/bz1896093-Compiling-with-flto-auto-fails-if-make-is-not/runtest.sh

@@ -0,0 +1,56 @@
+#!/bin/bash
+# vim: dict+=/usr/share/beakerlib/dictionary.vim cpt=.,w,b,u,t,i,k
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   runtest.sh of /tools/gcc/Regression/bz1896093-Compiling-with-flto-auto-fails-if-make-is-not
+#   Description: Test for BZ#1896093 (Compiling with -flto=auto fails if make is not)
+#   Author: Alexandra Hájková <ahajkova@redhat.com>
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   Copyright (c) 2020 Red Hat, Inc.
+#
+#   This program is free software: you can redistribute it and/or
+#   modify it under the terms of the GNU General Public License as
+#   published by the Free Software Foundation, either version 2 of
+#   the License, or (at your option) any later version.
+#
+#   This program is distributed in the hope that it will be
+#   useful, but WITHOUT ANY WARRANTY; without even the implied
+#   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+#   PURPOSE.  See the GNU General Public License for more details.
+#
+#   You should have received a copy of the GNU General Public License
+#   along with this program. If not, see http://www.gnu.org/licenses/.
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+# Include Beaker environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+PACKAGE="gcc"
+
+rlJournalStart
+    rlPhaseStartSetup
+        MAKE_WAS_PRESENT=false
+        rpm -q make &>/dev/null && MAKE_WAS_PRESENT=true
+        rlAssertRpm $PACKAGE
+        rlRun "TmpDir=\$(mktemp -d)" 0 "Creating tmp directory"
+        rlRun "pushd $TmpDir"
+        rlRun "rpm -e --nodeps make" 0,1
+    rlPhaseEnd
+
+    rlPhaseStartTest
+        echo "void main() { }" | gcc -x c -flto=auto - &> log
+        rlAssertNotGrep "lto-wrapper: fatal error: execvp: No such file or directory" log
+    rlPhaseEnd
+
+    rlPhaseStartCleanup
+        if $MAKE_WAS_PRESENT; then
+            rpm -q make &>/dev/null || rlRun "yum -y install make"
+        fi
+        rlRun "popd"
+        rlRun "rm -r $TmpDir" 0 "Removing tmp directory"
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/bz1927579-libgfortran-seems-to-be-missing/alloc1.f90

@@ -0,0 +1,5 @@
+program test_allocated
+  integer :: i = 4
+  real(4), allocatable :: x(:)
+  if (.not. allocated(x)) allocate(x(i))
+end program test_allocated

tests/Regression/bz1927579-libgfortran-seems-to-be-missing/main.fmf

@@ -0,0 +1,17 @@
+summary: Test for BZ#1927579 (libgfortran seems to be missing)
+description: |
+    Bug summary: libgfortran seems to be missing _gfortran_os_error_at
+    Bugzilla link: https://bugzilla.redhat.com/show_bug.cgi?id=1927579
+contact: Alexandra Hájková <ahajkova@redhat.com>
+component:
+- gcc
+test: ./runtest.sh
+framework: beakerlib
+recommend:
+- gcc
+- gcc-gfortran
+duration: 5m
+link:
+-   relates: https://bugzilla.redhat.com/show_bug.cgi?id=1927579
+extra-summary: /tools/gcc/Regression/bz1927579-libgfortran-seems-to-be-missing
+extra-task: /tools/gcc/Regression/bz1927579-libgfortran-seems-to-be-missing

tests/Regression/bz1927579-libgfortran-seems-to-be-missing/runtest.sh

@@ -0,0 +1,51 @@
+#!/bin/bash
+# vim: dict+=/usr/share/beakerlib/dictionary.vim cpt=.,w,b,u,t,i,k
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   runtest.sh of /tools/gcc/Regression/bz1927579-libgfortran-seems-to-be-missing
+#   Description: Test for BZ#1927579 (libgfortran seems to be missing)
+#   Author: Alexandra Hájková <ahajkova@redhat.com>
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   Copyright (c) 2021 Red Hat, Inc.
+#
+#   This program is free software: you can redistribute it and/or
+#   modify it under the terms of the GNU General Public License as
+#   published by the Free Software Foundation, either version 2 of
+#   the License, or (at your option) any later version.
+#
+#   This program is distributed in the hope that it will be
+#   useful, but WITHOUT ANY WARRANTY; without even the implied
+#   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+#   PURPOSE.  See the GNU General Public License for more details.
+#
+#   You should have received a copy of the GNU General Public License
+#   along with this program. If not, see http://www.gnu.org/licenses/.
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+# Include Beaker environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+PACKAGE="gcc"
+
+rlJournalStart
+    rlPhaseStartSetup
+        rlAssertRpm $PACKAGE
+        rlRun "TmpDir=\$(mktemp -d)" 0 "Creating tmp directory"
+        rlRun "cp alloc1.f90 $TmpDir"
+        rlRun "pushd $TmpDir"
+    rlPhaseEnd
+
+    rlPhaseStartTest
+    rlRun "gfortran alloc1.f90" &> log
+    rlAssertNotGrep "alloc1.f90:(.text+0x131): undefined reference" log
+    rlPhaseEnd
+
+    rlPhaseStartCleanup
+        rlRun "popd"
+        rlRun "rm -r $TmpDir" 0 "Removing tmp directory"
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/bz1939638-gcc-toolset-10-libasan-devel-depends-on-the-wrong/main.fmf

@@ -0,0 +1,17 @@
+summary: Test for BZ#1939638 (gcc-toolset-10-libasan-devel depends on the wrong)
+description: |
+    Bug summary: gcc-toolset-10-libasan-devel depends on the wrong libasan
+    Bugzilla link: https://bugzilla.redhat.com/show_bug.cgi?id=1939638
+contact: Alexandra Hájková <ahajkova@redhat.com>
+component:
+- gcc
+test: ./runtest.sh
+framework: beakerlib
+recommend:
+- gcc
+- libasan
+duration: 5m
+link:
+-   relates: https://bugzilla.redhat.com/show_bug.cgi?id=1939638
+extra-summary: /tools/gcc/Regression/bz1939638-gcc-toolset-10-libasan-devel-depends-on-the-wrong
+extra-task: /tools/gcc/Regression/bz1939638-gcc-toolset-10-libasan-devel-depends-on-the-wrong

tests/Regression/bz1939638-gcc-toolset-10-libasan-devel-depends-on-the-wrong/runtest.sh

@@ -0,0 +1,50 @@
+#!/bin/bash
+# vim: dict+=/usr/share/beakerlib/dictionary.vim cpt=.,w,b,u,t,i,k
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   runtest.sh of /tools/gcc/Regression/bz1939638-gcc-toolset-10-libasan-devel-depends-on-the-wrong
+#   Description: Test for BZ#1939638 (gcc-toolset-10-libasan-devel depends on the wrong)
+#   Author: Alexandra Hájková <ahajkova@redhat.com>
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   Copyright (c) 2021 Red Hat, Inc.
+#
+#   This program is free software: you can redistribute it and/or
+#   modify it under the terms of the GNU General Public License as
+#   published by the Free Software Foundation, either version 2 of
+#   the License, or (at your option) any later version.
+#
+#   This program is distributed in the hope that it will be
+#   useful, but WITHOUT ANY WARRANTY; without even the implied
+#   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+#   PURPOSE.  See the GNU General Public License for more details.
+#
+#   You should have received a copy of the GNU General Public License
+#   along with this program. If not, see http://www.gnu.org/licenses/.
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+# Include Beaker environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+PACKAGE="gcc"
+
+rlJournalStart
+    rlPhaseStartSetup
+        rlAssertRpm $PACKAGE
+        rlRun "TmpDir=\$(mktemp -d)" 0 "Creating tmp directory"
+        rlRun "pushd $TmpDir"
+    rlPhaseEnd
+
+    rlPhaseStartTest
+        rlRun "echo 'int main () { return 0; }' | gcc -xc -fsanitize=address -" &> log
+        rlAssertNotGrep "cannot find /usr/lib64/libasan" log
+    rlPhaseEnd
+
+    rlPhaseStartCleanup
+        rlRun "popd"
+        rlRun "rm -r $TmpDir" 0 "Removing tmp directory"
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/bz1960701-Wrong-code-regression-starting-with-gcc-8-2/main.fmf

@@ -0,0 +1,27 @@
+summary: Test for BZ#1960701 (Wrong-code regression starting with gcc 8.2)
+description: |
+    Bug summary: Wrong-code regression starting with gcc 8.2
+    Bugzilla link: https://bugzilla.redhat.com/show_bug.cgi?id=1960701
+contact: Vaclav Kadlcik <vkadlcik@redhat.com>
+component:
+- gcc
+test: bash ./runtest.sh
+framework: beakerlib
+require:
+- gcc-c++
+duration: 15m
+enabled: true
+tag:
+  - CI-Tier-1
+link:
+-   relates: https://bugzilla.redhat.com/show_bug.cgi?id=1960701
+adjust:
+  - enabled: false
+    when: distro < rhel-8 and collection is not defined
+    continue: false
+  - enabled: false
+    when: distro ~< rhel-8.5 and collection is not defined
+    continue: false
+extra-nitrate: TC#0610780
+extra-summary: /tools/gcc/Regression/bz1960701-Wrong-code-regression-starting-with-gcc-8-2
+extra-task: /tools/gcc/Regression/bz1960701-Wrong-code-regression-starting-with-gcc-8-2

tests/Regression/bz1960701-Wrong-code-regression-starting-with-gcc-8-2/reproducer.cc

@@ -0,0 +1,14 @@
+#include <vector>
+
+struct T {
+  unsigned a;
+  float b {8.};
+};
+
+int main()
+{
+  T t = {1};
+  std::vector<T> tt = {{1}, {2}};
+  if (t.a != 1 || t.b != 8.0f || tt[0].a != 1 || tt[0].b != 8.0f || tt[1].a != 2 || tt[1].b != 8.0f)
+    __builtin_abort ();
+}

tests/Regression/bz1960701-Wrong-code-regression-starting-with-gcc-8-2/runtest.sh

@@ -0,0 +1,66 @@
+#!/usr/bin/env bash
+# vim: dict+=/usr/share/beakerlib/dictionary.vim cpt=.,w,b,u,t,i,k
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   runtest.sh of /tools/gcc/Regression/bz1960701-Wrong-code-regression-starting-with-gcc-8-2
+#   Description: Test for BZ#1960701 (Wrong-code regression starting with gcc 8.2)
+#   Author: Vaclav Kadlcik <vkadlcik@redhat.com>
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   Copyright (c) 2021 Red Hat, Inc.
+#
+#   This program is free software: you can redistribute it and/or
+#   modify it under the terms of the GNU General Public License as
+#   published by the Free Software Foundation, either version 2 of
+#   the License, or (at your option) any later version.
+#
+#   This program is distributed in the hope that it will be
+#   useful, but WITHOUT ANY WARRANTY; without even the implied
+#   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+#   PURPOSE.  See the GNU General Public License for more details.
+#
+#   You should have received a copy of the GNU General Public License
+#   along with this program. If not, see http://www.gnu.org/licenses/.
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+# Include Beaker environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+# Notes on relevancy
+#
+# The test is applicable to GCCs supporting -std=c++17. In practice,
+#   * any supported toolset GCC
+#   * system GCC of RHEL 8+; however the respective fix landed in 8.5
+#     and isn't planned for backporting.
+#
+# Suggested TCMS relevancy:
+#   distro < rhel-8 && collection !defined: False
+#   distro < rhel-8.5 && collection !defined: False
+
+GCC="${GCC:-$(type -P gcc)}"
+PACKAGE=$(rpm --qf '%{name}\n' -qf $GCC | head -1)
+PACKAGES="${PACKAGE} ${PACKAGE}-c++"
+
+rlJournalStart
+    rlPhaseStartSetup
+        rlLogInfo "PACKAGES=$PACKAGES"
+        rlLogInfo "COLLECTIONS=$COLLECTIONS"
+        rlAssertRpm --all
+        rlRun "TmpDir=\$(mktemp -d)"
+        rlRun "cp reproducer.cc $TmpDir"
+        rlRun "pushd $TmpDir"
+    rlPhaseEnd
+
+    rlPhaseStartTest
+        rlRun 'g++ -o reproducer -Wall -Wextra -std=c++17 reproducer.cc'
+        rlRun './reproducer'
+    rlPhaseEnd
+
+    rlPhaseStartCleanup
+        rlRun 'popd'
+        rlRun "rm -r $TmpDir"
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/bz1965951-Wrong-code-regression-starting-with-gcc-8-5/main.fmf

@@ -0,0 +1,16 @@
+summary: Test for BZ#1965951 (Wrong-code regression starting with gcc 8.5)
+description: |
+    Bug summary: Wrong-code regression starting with gcc 8.5
+    Bugzilla link: https://bugzilla.redhat.com/show_bug.cgi?id=1965951
+contact: Vaclav Kadlcik <vkadlcik@redhat.com>
+component:
+- gcc
+test: ./runtest.sh
+framework: beakerlib
+recommend:
+- gcc-c++
+duration: 15m
+link:
+-   relates: https://bugzilla.redhat.com/show_bug.cgi?id=1965951
+extra-summary: /tools/gcc/Regression/bz1965951-Wrong-code-regression-starting-with-gcc-8-5
+extra-task: /tools/gcc/Regression/bz1965951-Wrong-code-regression-starting-with-gcc-8-5

tests/Regression/bz1965951-Wrong-code-regression-starting-with-gcc-8-5/reproducer.cc

@@ -0,0 +1,12 @@
+#include <iostream>
+struct S1 { virtual ~S1() = default; };
+struct S2 { virtual void f1() = 0; };
+struct S3: S1, S2 {
+    void f1() { f2(); }
+    virtual void f2() = 0;
+};
+struct S4: S3 {
+    void f2() { std::cout << "called\n"; }
+    using S2::f1;
+};
+int main() { S4().f1(); }

tests/Regression/bz1965951-Wrong-code-regression-starting-with-gcc-8-5/runtest.sh

@@ -0,0 +1,55 @@
+#!/usr/bin/env bash
+# vim: dict+=/usr/share/beakerlib/dictionary.vim cpt=.,w,b,u,t,i,k
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   runtest.sh of /tools/gcc/Regression/bz1965951-Wrong-code-regression-starting-with-gcc-8-5
+#   Description: Test for BZ#1965951 (Wrong-code regression starting with gcc 8.5)
+#   Author: Vaclav Kadlcik <vkadlcik@redhat.com>
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   Copyright (c) 2021 Red Hat, Inc.
+#
+#   This program is free software: you can redistribute it and/or
+#   modify it under the terms of the GNU General Public License as
+#   published by the Free Software Foundation, either version 2 of
+#   the License, or (at your option) any later version.
+#
+#   This program is distributed in the hope that it will be
+#   useful, but WITHOUT ANY WARRANTY; without even the implied
+#   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+#   PURPOSE.  See the GNU General Public License for more details.
+#
+#   You should have received a copy of the GNU General Public License
+#   along with this program. If not, see http://www.gnu.org/licenses/.
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+# Include Beaker environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+GCC="${GCC:-$(type -P gcc)}"
+PACKAGE=$(rpm --qf '%{name}\n' -qf $GCC | head -1)
+PACKAGES="${PACKAGE} ${PACKAGE}-c++"
+
+rlJournalStart
+    rlPhaseStartSetup
+        rlLogInfo "PACKAGES=$PACKAGES"
+        rlRun "dnf -y install $PACKAGES" 0-255
+        rlAssertRpm --all
+        rlRun "TmpDir=\$(mktemp -d)"
+        rlRun "cp reproducer.cc $TmpDir"
+        rlRun "pushd $TmpDir"
+    rlPhaseEnd
+
+    rlPhaseStartTest
+        rlRun 'g++ -o reproducer reproducer.cc'
+        rlRun './reproducer'
+    rlPhaseEnd
+
+    rlPhaseStartCleanup
+        rlRun 'popd'
+        rlRun "rm -r $TmpDir"
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/bz576287-SystemTap-fails-to-retrieve-location-attribute-for-local-variable/main.fmf

@@ -0,0 +1,26 @@
+summary: SystemTap fails to retrieve location attribute for local variable
+description: ''
+contact: mcermak@redhat.com
+component:
+  - gcc
+  - systemtap
+test: bash ./runtest.sh
+framework: beakerlib
+require:
+  - gcc
+  - systemtap
+  - kernel-devel
+  - kernel-headers
+duration: 50m
+enabled: true
+tag:
+  - CI-Tier-1
+  - STAP-EWA
+  - mcu_stap
+  - mcu_stap_6g
+  - mcu_stap_7g
+link:
+  - relates: https://bugzilla.redhat.com/show_bug.cgi?id=576287
+extra-nitrate: TC#0062256
+extra-summary: /tools/gcc/Regression/gcc/bz576287-SystemTap-fails-to-retrieve-location-attribute-for-local-variable
+extra-task: /tools/gcc/Regression/gcc/bz576287-SystemTap-fails-to-retrieve-location-attribute-for-local-variable

tests/Regression/bz576287-SystemTap-fails-to-retrieve-location-attribute-for-local-variable/runtest.sh

@@ -0,0 +1,57 @@
+#!/bin/bash
+
+#   Copyright (c) 2010 Red Hat, Inc. All rights reserved.
+#
+#   This program is free software: you can redistribute it and/or
+#   modify it under the terms of the GNU General Public License as
+#   published by the Free Software Foundation, either version 3 of
+#   the License, or (at your option) any later version.
+#
+#   This program is distributed in the hope that it will be
+#   useful, but WITHOUT ANY WARRANTY; without even the implied
+#   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+#   PURPOSE.  See the GNU General Public License for more details.
+#
+#   You should have received a copy of the GNU General Public License
+#   along with this program. If not, see http://www.gnu.org/licenses/.
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+# Include rhts environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+PACKAGE="gcc"
+
+rlJournalStart
+    rlPhaseStartSetup
+        rlAssertRpm $PACKAGE
+        kernel_uname="$(uname -a | awk '{ print $3 }')"
+        kernel_arch="$(uname -a | awk '{ print $12 }')"
+        echo kernel_arch: $kernel_arch
+        kernel_version="$(echo ${kernel_uname} | sed 's/-/ /' | awk '{ print $1 }')"
+        echo kernel_version: $kernel_version
+        kernel_release="$(echo ${kernel_uname} | sed 's/-/ /' | awk '{ print $2 }' | sed 's/\./ /g' | awk '{ print $1,".",$2 }' | sed 's/ //g')"
+        echo kernel_release_1: $kernel_release
+        if $(echo ${kernel_release} | grep -iq PAE); then
+            kernel_release="$(echo ${kernel_release} | sed 's/PAE//g' | sed 's/pae//g')"
+            PAE="PAE-"
+        fi
+        echo kernel_release_2: $kernel_release
+        if rlIsRHEL 6; then
+                arch="${kernel_arch}-"
+        fi
+        kernel_debug="http://download.devel.redhat.com/brewroot/packages/kernel/${kernel_version}/${kernel_release}/${kernel_arch}/kernel-${PAE}debuginfo-${kernel_version}-${kernel_release}.${kernel_arch}.rpm"
+        kernel_debug_common="http://download.devel.redhat.com/brewroot/packages/kernel/${kernel_version}/${kernel_release}/${kernel_arch}/kernel-debuginfo-common-${arch}${kernel_version}-${kernel_release}.${kernel_arch}.rpm"
+        echo ">>> $kernel_debug $kernel_debug_common"
+        debuginfo-install -y kernel
+        rpmquery kernel-debuginfo || rpm -ivh ${kernel_debug} ${kernel_debug_common}
+    rlPhaseEnd
+
+    rlPhaseStartTest opt-O$opt
+        rlRun "stap -vvvv -p2 -e 'probe kernel.function(\"sig_ignored\") {println($$parms)}' 2>&1 | grep 'variable location problem'" 1 "gcc produced good enough debuginfo w/o 'variable location problem'"
+    rlPhaseEnd
+
+    rlPhaseStartCleanup
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/bz703059-g-fails-to-compile-a-program-that-has-a-template/f.cc

@@ -0,0 +1,15 @@
+template <bool C> int func (void);
+
+template <class T> struct Foo
+{
+  static const unsigned int a = sizeof (T);
+
+  //enum { b = a };
+
+  enum
+  {
+    c = sizeof (func < (a == 0) > ())
+  };
+};
+
+Foo <int> x;

tests/Regression/bz703059-g-fails-to-compile-a-program-that-has-a-template/main.fmf

@@ -0,0 +1,28 @@
+summary: Try to compile a program that has a template parameter with a boolean expression
+    involving a templated static constant
+description: ''
+contact: mcermak@redhat.com
+component:
+  - gcc
+test: bash ./runtest.sh
+path: /tests/Regression/bz703059-g-fails-to-compile-a-program-that-has-a-template
+framework: beakerlib
+require:
+  - gcc
+  - gcc-c++
+  - file
+duration: 5m
+enabled: true
+tier: '1'
+link:
+  - relates: https://bugzilla.redhat.com/show_bug.cgi?id=703059
+tag:
+  - CI-Tier-1
+  - DTS8-INTEROP-CI
+  - DTS9-INTEROP-CI
+  - Tier1
+  - dts_smoke
+  - dts_stable
+extra-nitrate: TC#0111110
+extra-summary: /tools/gcc/Regression/bz703059-g-fails-to-compile-a-program-that-has-a-template
+extra-task: /tools/gcc/Regression/bz703059-g-fails-to-compile-a-program-that-has-a-template

tests/Regression/bz703059-g-fails-to-compile-a-program-that-has-a-template/runtest.sh

@@ -0,0 +1,54 @@
+#!/bin/bash
+# vim: dict=/usr/share/beakerlib/dictionary.vim cpt=.,w,b,u,t,i,k
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   runtest.sh of /tools/gcc/Regression/bz703059-g-fails-to-compile-a-program-that-has-a-template
+#   Description: Try to compile a program that has a template parameter with a boolean expression involving a templated static constant
+#   Author: Marek Polacek <mpolacek@redhat.com>
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   Copyright (c) 2011, 2012 Red Hat, Inc. All rights reserved.
+#
+#   This copyrighted material is made available to anyone wishing
+#   to use, modify, copy, or redistribute it subject to the terms
+#   and conditions of the GNU General Public License version 2.
+#
+#   This program is distributed in the hope that it will be
+#   useful, but WITHOUT ANY WARRANTY; without even the implied
+#   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+#   PURPOSE. See the GNU General Public License for more details.
+#
+#   You should have received a copy of the GNU General Public
+#   License along with this program; if not, write to the Free
+#   Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+#   Boston, MA 02110-1301, USA.
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+# Include rhts environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+GXX=${GXX:-g++}
+
+rlJournalStart
+    rlPhaseStartSetup
+        rlLog "GXX = $GXX"
+        rlLog "Installed within `rpmquery -f $(which $GXX)`"
+        rlRun "TmpDir=\`mktemp -d\`"
+        rlRun "cp -v f.cc $TmpDir"
+        rlRun "pushd $TmpDir"
+    rlPhaseEnd
+
+    rlPhaseStartTest
+        rlRun "$GXX -c f.cc"
+        rlAssertExists "f.o"
+        rlRun "file f.o | grep ELF" # Basic obj file sanity check
+    rlPhaseEnd
+
+    rlPhaseStartCleanup
+        rlRun "popd"
+        rlRun "rm -r $TmpDir"
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/unused_parameter_warning/main.fmf

@@ -0,0 +1,31 @@
+summary: Check to see if g++ throws unused parameter warnings with standard libraries
+    with option -Wall
+contact: mcermak@redhat.com
+component:
+  - gcc
+test: bash ./runtest.sh
+path: /tests/Regression/unused_parameter_warning
+framework: beakerlib
+require:
+  - gcc-c++
+  - glibc-devel
+  - libstdc++-devel
+recommend:
+  - gcc44-c++
+  - glibc-devel.ppc64
+  - glibc-devel.ppc
+  - libstdc++43-devel.ppc
+  - libstdc++44-devel.ppc
+  - libstdc++-devel.ppc
+duration: 10m
+enabled: true
+tier: '1'
+link:
+  - relates: https://bugzilla.redhat.com/show_bug.cgi?id=201342
+tag:
+  - CI-Tier-1
+  - Tier1
+  - dts_stable
+extra-nitrate: TC#0062265
+extra-summary: /tools/gcc/c++/unused_parameter_warning
+extra-task: /tools/gcc/c++/unused_parameter_warning

tests/Regression/unused_parameter_warning/runtest.sh

@@ -0,0 +1,60 @@
+#!/bin/bash
+# vim: dict=/usr/share/rhts-library/dictionary.vim cpt=.,w,b,u,t,i,k
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   Copyright (c) 2009, 2012 Red Hat, Inc. All rights reserved.
+#   
+#   This copyrighted material is made available to anyone wishing
+#   to use, modify, copy, or redistribute it subject to the terms
+#   and conditions of the GNU General Public License version 2.
+#   
+#   This program is distributed in the hope that it will be
+#   useful, but WITHOUT ANY WARRANTY; without even the implied
+#   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+#   PURPOSE. See the GNU General Public License for more details.
+#   
+#   You should have received a copy of the GNU General Public
+#   License along with this program; if not, write to the Free
+#   Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+#   Boston, MA 02110-1301, USA.
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+# g++ - check for unused parameter warning
+# expected exit code is 0
+#
+# Author: Sachin Prabhu <sprabhu@redhat.com>
+# Maintainer: Marek Polacek <polacek@redhat.com>
+
+
+# Include Beaker environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+PACKAGES=(gcc gcc-c++ grep)
+
+GXX=${GXX:-g++}
+
+rlJournalStart
+    rlPhaseStartSetup
+        for p in "${PACKAGES[@]}"; do
+            rlAssertRpm "$p"
+        done; unset p
+        rlLog "GXX = $GXX"
+        rlLog "Installed within `rpmquery -f $(which $GXX)`"
+        rlRun "TmpDir=\`mktemp -d\`"
+        rlRun "cp -v test.cpp $TmpDir"
+        rlRun "pushd $TmpDir"
+    rlPhaseEnd
+
+    rlPhaseStartTest
+        rlRun "$GXX -W -Wall -o test.bin test.cpp &> output"
+        cat output
+        rlRun "grep -E 'warning:\W+unused\W+parameter' -q output" 1 "'warning: unused parameter' not present"
+    rlPhaseEnd
+
+    rlPhaseStartCleanup
+        rlRun "popd"
+        rlRun "rm -r $TmpDir" 0 "Removing tmp directory"
+    rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd

tests/Regression/unused_parameter_warning/test.cpp

@@ -0,0 +1,2 @@
+#include <sstream>
+int main() {}

tests/Sanity/compile-rpm/main.fmf

@@ -0,0 +1,45 @@
+summary: Compile a Red Hat RPM package.
+description: ''
+contact: mcermak@redhat.com
+component:
+  - gcc
+test: bash ./runtest.sh
+path: /tests/Sanity/compile-rpm
+framework: beakerlib
+require:
+  - autoconf
+  - bison
+  - dejagnu
+  - elfutils-libelf-devel
+  - expat-devel
+  - flex
+  - gcc
+  - gdb
+  - glibc-devel
+  - grep
+  - libselinux-devel
+  - make
+  - mpfr-devel
+  - ncurses-devel
+  - python-devel
+  - readline-devel
+  - rpm-build
+  - rpm-devel
+  - texinfo
+  - xz-devel
+  - yum-utils
+  - zlib-devel
+duration: 240m
+adjust:
+  - require+:
+    - ncurses-devel.i686
+    - ncurses-devel.x86_64
+    when: arch == x86_64
+  - enabled: false
+    # Too "heavy" for Fedora CI (for now)
+    when: distro == fedora and trigger is defined
+    continue: false
+enabled: true
+extra-nitrate: TC#0142522
+extra-summary: /tools/gcc/Sanity/compile-rpm
+extra-task: /tools/gcc/Sanity/compile-rpm

tests/Sanity/compile-rpm/runtest.sh

@@ -0,0 +1,99 @@
+#!/bin/bash
+# vim: dict=/usr/share/beakerlib/dictionary.vim cpt=.,w,b,u,t,i,k
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   runtest.sh of /tools/gcc/Sanity/compile-rpm
+#   Description: Compile a Red Hat RPM package.
+#   Author: Marek Polacek <polacek@redhat.com>
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#
+#   Copyright (c) 2012 Red Hat, Inc. All rights reserved.
+#
+#   This copyrighted material is made available to anyone wishing
+#   to use, modify, copy, or redistribute it subject to the terms
+#   and conditions of the GNU General Public License version 2.
+#
+#   This program is distributed in the hope that it will be
+#   useful, but WITHOUT ANY WARRANTY; without even the implied
+#   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
+#   PURPOSE. See the GNU General Public License for more details.
+#
+#   You should have received a copy of the GNU General Public
+#   License along with this program; if not, write to the Free
+#   Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+#   Boston, MA 02110-1301, USA.
+#
+# ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+# Include Beaker environment
+. /usr/share/beakerlib/beakerlib.sh || exit 1
+
+GCC=${GCC:-gcc}
+
+# Set the variabile UNDER_DTS on non-empty string, when run under devtoolset.
+if $( echo `which gcc` | grep -qE '/opt/rh/' ); then
+  UNDER_DTS="true"
+  # Set the actual version of DTS
+  DTS=`which gcc | awk 'BEGIN { FS="/" } { print $4 }'`
+fi
+
+rlJournalStart
+  rlPhaseStartSetup
+    # Work around troubles with buildroot packages being out-of-sync
+    if rlIsRHEL; then
+      rlMountRedhat
+      for i in libipt source-highlight libbabeltrace; do
+        rpm -q $i &>/dev/null || rlRun "yum -y install $i" 0-255
+        rpm -q ${i}-devel &>/dev/null || rlRun "yum -y install ${i}-devel" 0-255
+        d=/mnt/redhat/brewroot/packages/$i
+        if rpm -q $i &>/dev/null && ! rpm -q ${i}-devel &>/dev/null; then
+          if [[ -e /mnt/redhat/brewroot/packages/$i ]]; then
+            d=/mnt/redhat/brewroot/packages/$i
+          else
+            d=/mnt/redhat/brewroot/packages/${i#lib}
+          fi
+          rlRun "yum -y install $d/$(rpm -q --qf='%{VERSION}/%{RELEASE}/%{ARCH}' $i)/${i}-devel-$(rpm -q --qf='%{VERSION}-%{RELEASE}.%{ARCH}' $i).rpm"
+        fi
+      done
+    fi
+
+    rlRun "TmpDir=\$(mktemp -d)"
+    rlRun "pushd $TmpDir"
+
+    if [ -z ${UNDER_DTS} ]; then
+      rlFetchSrcForInstalled gdb || yumdownloader --source gdb
+    else
+      rlFetchSrcForInstalled $DTS-gdb || yumdownloader --source $DTS-gdb
+    fi
+
+    if [ -z  ${UNDER_DTS} ]; then
+      srpm=$(rpmquery gdb --queryformat=%{NAME}-%{VERSION}-%{RELEASE})".src.rpm"
+    else
+      srpm=$(rpmquery $DTS-gdb --queryformat=%{NAME}-%{VERSION}-%{RELEASE})".src.rpm"
+    fi
+    rlRun "rpm -Uvh $srpm"
+    spec_dir=$(rpm --eval=%_specdir)
+    build_dir=$(rpm --eval=%_builddir)
+
+    if [ -z  ${UNDER_DTS} ]; then
+      pkg_dir=$(rpmquery gdb} --queryformat=%{NAME}-%{VERSION})
+    else
+      pkg_dir=$(rpmquery $DTS-gdb} --queryformat=%{NAME}-%{VERSION})
+    fi
+
+    yum-builddep -y $spec_dir/gdb.spec
+  rlPhaseEnd
+
+  rlPhaseStartTest
+    rlRun "CC=$GCC rpmbuild -bb $spec_dir/gdb.spec &> BUILD_LOG"
+    test $? -eq 0 || tail -n 20 BUILD_LOG
+  rlPhaseEnd
+
+  rlPhaseStartCleanup
+    rlBundleLogs "Build-log" BUILD_LOG
+    rlRun "popd"
+    rlRun "rm -r $TmpDir"
+  rlPhaseEnd
+rlJournalPrintText
+rlJournalEnd