5.0.0-0.8

This commit is contained in:
Jakub Jelinek 2015-02-06 14:10:27 +01:00
parent 274be4f351
commit ff74606e8e
5 changed files with 120 additions and 4 deletions

1
.gitignore vendored
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@ -1,3 +1,4 @@
/gcc-5.0.0-20150123.tar.bz2 /gcc-5.0.0-20150123.tar.bz2
/gcc-5.0.0-20150130.tar.bz2 /gcc-5.0.0-20150130.tar.bz2
/gcc-5.0.0-20150205.tar.bz2 /gcc-5.0.0-20150205.tar.bz2
/gcc-5.0.0-20150206.tar.bz2

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@ -1,9 +1,9 @@
%global DATE 20150205 %global DATE 20150206
%global SVNREV 220439 %global SVNREV 220476
%global gcc_version 5.0.0 %global gcc_version 5.0.0
# Note, gcc_release must be integer, if you want to add suffixes to # Note, gcc_release must be integer, if you want to add suffixes to
# %{release}, append them after %{gcc_release} on Release: line. # %{release}, append them after %{gcc_release} on Release: line.
%global gcc_release 0.7 %global gcc_release 0.8
%global _unpackaged_files_terminate_build 0 %global _unpackaged_files_terminate_build 0
%global _performance_build 1 %global _performance_build 1
%global multilib_64_archs sparc64 ppc64 ppc64p7 s390x x86_64 %global multilib_64_archs sparc64 ppc64 ppc64p7 s390x x86_64
@ -200,6 +200,8 @@ Patch13: gcc5-aarch64-async-unw-tables.patch
Patch14: gcc5-libsanitize-aarch64-va42.patch Patch14: gcc5-libsanitize-aarch64-va42.patch
Patch15: gcc5-pr61925.patch Patch15: gcc5-pr61925.patch
Patch16: gcc5-pr64878.patch Patch16: gcc5-pr64878.patch
Patch17: gcc5-pr64893.patch
Patch18: gcc5-hjl.patch
# On ARM EABI systems, we do want -gnueabi to be part of the # On ARM EABI systems, we do want -gnueabi to be part of the
# target triple. # target triple.
@ -751,6 +753,8 @@ rm -f libgo/go/crypto/elliptic/p224{,_test}.go
%patch14 -p0 -b .libsanitize-aarch64-va42~ %patch14 -p0 -b .libsanitize-aarch64-va42~
%patch15 -p0 -b .pr61925~ %patch15 -p0 -b .pr61925~
%patch16 -p0 -b .pr64878~ %patch16 -p0 -b .pr64878~
%patch17 -p0 -b .pr64893~
%patch18 -p0 -b .hjl~
%if 0%{?_enable_debug_packages} %if 0%{?_enable_debug_packages}
mkdir dwz-wrapper mkdir dwz-wrapper
@ -2936,6 +2940,12 @@ fi
%doc rpm.doc/changelogs/libcc1/ChangeLog* %doc rpm.doc/changelogs/libcc1/ChangeLog*
%changelog %changelog
* Fri Feb 6 2015 Jakub Jelinek <jakub@redhat.com> 5.0.0-0.8
- update from the trunk
- PRs fortran/60289, fortran/64943, rtl-optimization/64957, target/17306,
target/43264, target/58400, target/64876
- fix aarch64 bootstrap issue (PR target/64893)
* Thu Feb 5 2015 Jakub Jelinek <jakub@redhat.com> 5.0.0-0.7 * Thu Feb 5 2015 Jakub Jelinek <jakub@redhat.com> 5.0.0-0.7
- update from the trunk - update from the trunk
- PRs ada/64349, c++/64877, c++/64901, c/64824, c/64868, fortran/64757, - PRs ada/64349, c++/64877, c++/64901, c/64824, c/64868, fortran/64757,

33
gcc5-hjl.patch Normal file
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@ -0,0 +1,33 @@
Revert:
2015-02-05 H.J. Lu <hongjiu.lu@intel.com>
* lto-plugin.c (claim_file_handler): Pass handle to
release_input_file.
2015-02-05 H.J. Lu <hongjiu.lu@intel.com>
* lto-plugin.c (claim_file_handler): Call release_input_file only
if file is claimed.
--- lto-plugin/lto-plugin.c (revision 220461)
+++ lto-plugin/lto-plugin.c (revision 220454)
@@ -998,9 +998,6 @@ claim_file_handler (const struct ld_plug
*claimed = 1;
- if (release_input_file)
- release_input_file (file->handle);
-
goto cleanup;
err:
@@ -1010,6 +1007,9 @@ claim_file_handler (const struct ld_plug
if (obj.objfile)
simple_object_release_read (obj.objfile);
+ if (release_input_file)
+ release_input_file (file);
+
return LDPS_OK;
}

72
gcc5-pr64893.patch Normal file
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@ -0,0 +1,72 @@
2015-02-05 Andrew Pinski <apinski@cavium.com>
PR target/64893
* config/aarch64/aarch64-builtins.c (aarch64_init_simd_builtins):
Change the first argument type to size_type_node and add another
size_type_node.
(aarch64_simd_expand_builtin): Handle the new argument to
AARCH64_SIMD_BUILTIN_LANE_CHECK and don't ICE but rather
print sorry out when the first two arguments are not integer constants.
* config/aarch64/arm_neon.h (__AARCH64_LANE_CHECK):
Pass the sizeof directly to __builtin_aarch64_im_lane_boundsi.
* testsuite/c-c++-common/torture/aarch64-vect-lane-1.c: New testcase.
--- gcc/config/aarch64/aarch64-builtins.c
+++ gcc/config/aarch64/aarch64-builtins.c
@@ -712,7 +712,8 @@ aarch64_init_simd_builtins (void)
aarch64_init_simd_builtin_scalar_types ();
tree lane_check_fpr = build_function_type_list (void_type_node,
- intSI_type_node,
+ size_type_node,
+ size_type_node,
intSI_type_node,
NULL);
aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_LANE_CHECK] =
@@ -1001,13 +1002,18 @@ aarch64_simd_expand_builtin (int fcode, tree exp, rtx target)
{
if (fcode == AARCH64_SIMD_BUILTIN_LANE_CHECK)
{
- tree nlanes = CALL_EXPR_ARG (exp, 0);
- gcc_assert (TREE_CODE (nlanes) == INTEGER_CST);
- rtx lane_idx = expand_normal (CALL_EXPR_ARG (exp, 1));
- if (CONST_INT_P (lane_idx))
- aarch64_simd_lane_bounds (lane_idx, 0, TREE_INT_CST_LOW (nlanes), exp);
+ rtx totalsize = expand_normal (CALL_EXPR_ARG (exp, 0));
+ rtx elementsize = expand_normal (CALL_EXPR_ARG (exp, 1));
+ if (CONST_INT_P (totalsize) && CONST_INT_P (elementsize) && elementsize != const0_rtx)
+ {
+ rtx lane_idx = expand_normal (CALL_EXPR_ARG (exp, 2));
+ if (CONST_INT_P (lane_idx))
+ aarch64_simd_lane_bounds (lane_idx, 0, UINTVAL (totalsize) / UINTVAL (elementsize), exp);
+ else
+ error ("%Klane index must be a constant immediate", exp);
+ }
else
- error ("%Klane index must be a constant immediate", exp);
+ sorry ("%Ktotal size and element size must be a constant immediate", exp);
/* Don't generate any RTL. */
return const0_rtx;
}
--- gcc/config/aarch64/arm_neon.h
+++ gcc/config/aarch64/arm_neon.h
@@ -541,7 +541,7 @@ typedef struct poly16x8x4_t
#define __AARCH64_NUM_LANES(__v) (sizeof (__v) / sizeof (__v[0]))
#define __AARCH64_LANE_CHECK(__vec, __idx) \
- __builtin_aarch64_im_lane_boundsi (__AARCH64_NUM_LANES (__vec), __idx)
+ __builtin_aarch64_im_lane_boundsi (sizeof(__vec), sizeof(__vec[0]), __idx)
/* For big-endian, GCC's vector indices are the opposite way around
to the architectural lane indices used by Neon intrinsics. */
--- gcc/testsuite/c-c++-common/torture/aarch64-vect-lane-1.c
+++ gcc/testsuite/c-c++-common/torture/aarch64-vect-lane-1.c
@@ -0,0 +1,8 @@
+// { dg-do compile { target "aarch64*-*-*" } }
+#include <arm_neon.h>
+int
+search_line_fast (uint32x2_t t)
+{
+ return vget_lane_u32 (t, 0);
+}
+

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7a2f0142ef9c636fec15e8896a1b637c gcc-5.0.0-20150205.tar.bz2 4b96ee5767427edbaf2a12581341224e gcc-5.0.0-20150206.tar.bz2