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9.0.1-0.9

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This commit is contained in:
Jakub Jelinek 2019-03-09 11:52:56 +01:00
parent f790525bec
commit bad9bc25a4
8 changed files with 54 additions and 324 deletions
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1
.gitignore vendored
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@ -67,3 +67,4 @@
/gcc-9.0.1-20190219.tar.xz
/gcc-9.0.1-20190221.tar.xz
/gcc-9.0.1-20190227.tar.xz
/gcc-9.0.1-20190309.tar.xz

49
gcc.spec
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@ -1,10 +1,10 @@
%global DATE 20190227
%global SVNREV 269254
%global DATE 20190309
%global SVNREV 269524
%global gcc_version 9.0.1
%global gcc_major 9
# Note, gcc_release must be integer, if you want to add suffixes to
# %%{release}, append them after %%{gcc_release} on Release: line.
%global gcc_release 0.8
%global gcc_release 0.9
%global nvptx_tools_gitrev c28050f60193b3b95a18866a96f03334e874e78f
%global nvptx_newlib_gitrev aadc8eb0ec43b7cd0dd2dfb484bae63c8b05ef24
%global _unpackaged_files_terminate_build 0
@ -254,11 +254,8 @@ Patch8: gcc9-foffload-default.patch
Patch9: gcc9-Wno-format-security.patch
Patch10: gcc9-rh1574936.patch
Patch11: gcc9-d-shared-libphobos.patch
Patch12: gcc9-pr89014.patch
Patch13: gcc9-pr89093.patch
Patch14: gcc9-pr70341.patch
Patch15: gcc9-pr89490.patch
Patch16: gcc9-pr89434.patch
Patch12: gcc9-pr89093.patch
Patch13: gcc9-pr89629.patch
Patch1000: nvptx-tools-no-ptxas.patch
Patch1001: nvptx-tools-build.patch
@ -769,11 +766,8 @@ to NVidia PTX capable devices if available.
%patch10 -p0 -b .rh1574936~
%endif
%patch11 -p0 -b .d-shared-libphobos~
%patch12 -p0 -b .pr89014~
%patch13 -p0 -b .pr89093~
%patch14 -p0 -b .pr70341~
%patch15 -p0 -b .pr89490~
%patch16 -p0 -b .pr89434~
%patch12 -p0 -b .pr89093~
%patch13 -p0 -b .pr89629~
cd nvptx-tools-%{nvptx_tools_gitrev}
%patch1000 -p1 -b .nvptx-tools-no-ptxas~
@ -1888,7 +1882,7 @@ echo gcc-%{version}-%{release}.%{_arch} > $FULLPATH/rpmver
cd obj-%{gcc_target_platform}
# run the tests.
make %{?_smp_mflags} -k check ALT_CC_UNDER_TEST=gcc ALT_CXX_UNDER_TEST=g++ \
LC_ALL=C make %{?_smp_mflags} -k check ALT_CC_UNDER_TEST=gcc ALT_CXX_UNDER_TEST=g++ \
%if 0%{?fedora} >= 20 || 0%{?rhel} > 7
RUNTESTFLAGS="--target_board=unix/'{,-fstack-protector-strong}'" || :
%else
@ -2962,6 +2956,33 @@ end
%endif
%changelog
* Sat Mar 9 2019 Jakub Jelinek <jakub@redhat.com> 9.0.1-0.9
- update from trunk
- PRs bootstrap/89539, bootstrap/89560, c++/22149, c++/63540, c++/71446,
c++/80916, c++/82075, c++/84518, c++/84605, c++/86485, c++/86969,
c++/87068, c++/87148, c++/87378, c++/88049, c++/88123, c++/88183,
c++/88820, c++/88857, c++/89381, c++/89511, c++/89513, c++/89522,
c++/89532, c++/89537, c++/89576, c++/89585, c++/89599, c++/89622,
c/85870, c/89520, c/89521, c/89525, debug/89631, fortran/71203,
fortran/72714, fortran/77583, fortran/89433, fortran/89516,
gcov-profile/89577, go/63560, go/89227, go/89406, ipa/80000,
ipa/88235, libgfortran/89593, libstdc++/86655, libstdc++/88996,
libstdc++/89562, libstdc++/89608, lto/87525, lto/88585,
middle-end/89497, middle-end/89503, middle-end/89541,
middle-end/89572, middle-end/89578, middle-end/89590,
middle-end/89618, other/80058, rtl-optimization/85899,
rtl-optimization/88845, rtl-optimization/89634, sanitizer/88684,
target/68924, target/78782, target/79645, target/79846, target/79926,
target/80003, target/80190, target/85665, target/86952, target/87558,
target/89222, target/89455, target/89506, target/89517, target/89587,
target/89602, testsuite/89441, testsuite/89551, translation/79999,
tree-optimization/89437, tree-optimization/89487,
tree-optimization/89535, tree-optimization/89536,
tree-optimization/89550, tree-optimization/89566,
tree-optimization/89570, tree-optimization/89594,
tree-optimization/89595
- fix libstdc++ hashing of > 2GB strings (PR libstdc++/89629)
* Wed Feb 27 2019 Jakub Jelinek <jakub@redhat.com> 9.0.1-0.8
- update from trunk
- PRs c++/84585, c++/84676, c++/87685, c++/88294, c++/88394, c++/88419,

187
gcc9-pr70341.patch
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@ -1,187 +0,0 @@
2019-02-23 Jakub Jelinek <jakub@redhat.com>
PR target/70341
* config/arm/arm.md (arm_casesi_internal): New define_expand. Rename
old define_insn to ...
(*arm_casesi_internal): ... this. Add mode to LABEL_REFs.
* config/arm/thumb2.md (thumb2_casesi_internal): New define_expand.
Rename old define_insn to ...
(*thumb2_casesi_internal): ... this. Add mode to LABEL_REFs.
(thumb2_casesi_internal_pic): New define_expand. Rename old
define_insn to ...
(*thumb2_casesi_internal_pic): ... this. Add mode to LABEL_REFs.
* config/aarch64/aarch64.md (casesi): Create the casesi_dispatch
MEM manually here, set MEM_READONLY_P and MEM_NOTRAP_P on it.
--- gcc/config/arm/arm.md.jj 2019-02-18 20:48:32.643732307 +0100
+++ gcc/config/arm/arm.md 2019-02-21 14:40:50.603452028 +0100
@@ -8914,16 +8914,35 @@ (define_expand "casesi"
;; The USE in this pattern is needed to tell flow analysis that this is
;; a CASESI insn. It has no other purpose.
-(define_insn "arm_casesi_internal"
+(define_expand "arm_casesi_internal"
+ [(parallel [(set (pc)
+ (if_then_else
+ (leu (match_operand:SI 0 "s_register_operand")
+ (match_operand:SI 1 "arm_rhs_operand"))
+ (match_dup 4)
+ (label_ref:SI (match_operand 3 ""))))
+ (clobber (reg:CC CC_REGNUM))
+ (use (label_ref:SI (match_operand 2 "")))])]
+ "TARGET_ARM"
+{
+ operands[4] = gen_rtx_MULT (SImode, operands[0], GEN_INT (4));
+ operands[4] = gen_rtx_PLUS (SImode, operands[4],
+ gen_rtx_LABEL_REF (SImode, operands[2]));
+ operands[4] = gen_rtx_MEM (SImode, operands[4]);
+ MEM_READONLY_P (operands[4]) = 1;
+ MEM_NOTRAP_P (operands[4]) = 1;
+})
+
+(define_insn "*arm_casesi_internal"
[(parallel [(set (pc)
(if_then_else
(leu (match_operand:SI 0 "s_register_operand" "r")
(match_operand:SI 1 "arm_rhs_operand" "rI"))
(mem:SI (plus:SI (mult:SI (match_dup 0) (const_int 4))
- (label_ref (match_operand 2 "" ""))))
- (label_ref (match_operand 3 "" ""))))
+ (label_ref:SI (match_operand 2 "" ""))))
+ (label_ref:SI (match_operand 3 "" ""))))
(clobber (reg:CC CC_REGNUM))
- (use (label_ref (match_dup 2)))])]
+ (use (label_ref:SI (match_dup 2)))])]
"TARGET_ARM"
"*
if (flag_pic)
--- gcc/config/arm/thumb2.md.jj 2019-01-01 12:37:28.280792453 +0100
+++ gcc/config/arm/thumb2.md 2019-02-21 15:00:26.811137210 +0100
@@ -1079,17 +1079,37 @@ (define_insn "thumb2_zero_extendqisi2_v6
(set_attr "neg_pool_range" "*,250")]
)
-(define_insn "thumb2_casesi_internal"
+(define_expand "thumb2_casesi_internal"
+ [(parallel [(set (pc)
+ (if_then_else
+ (leu (match_operand:SI 0 "s_register_operand")
+ (match_operand:SI 1 "arm_rhs_operand"))
+ (match_dup 4)
+ (label_ref:SI (match_operand 3 ""))))
+ (clobber (reg:CC CC_REGNUM))
+ (clobber (match_scratch:SI 5))
+ (use (label_ref:SI (match_operand 2 "")))])]
+ "TARGET_THUMB2 && !flag_pic"
+{
+ operands[4] = gen_rtx_MULT (SImode, operands[0], GEN_INT (4));
+ operands[4] = gen_rtx_PLUS (SImode, operands[4],
+ gen_rtx_LABEL_REF (SImode, operands[2]));
+ operands[4] = gen_rtx_MEM (SImode, operands[4]);
+ MEM_READONLY_P (operands[4]) = 1;
+ MEM_NOTRAP_P (operands[4]) = 1;
+})
+
+(define_insn "*thumb2_casesi_internal"
[(parallel [(set (pc)
(if_then_else
(leu (match_operand:SI 0 "s_register_operand" "r")
(match_operand:SI 1 "arm_rhs_operand" "rI"))
(mem:SI (plus:SI (mult:SI (match_dup 0) (const_int 4))
- (label_ref (match_operand 2 "" ""))))
- (label_ref (match_operand 3 "" ""))))
+ (label_ref:SI (match_operand 2 "" ""))))
+ (label_ref:SI (match_operand 3 "" ""))))
(clobber (reg:CC CC_REGNUM))
(clobber (match_scratch:SI 4 "=&r"))
- (use (label_ref (match_dup 2)))])]
+ (use (label_ref:SI (match_dup 2)))])]
"TARGET_THUMB2 && !flag_pic"
"* return thumb2_output_casesi(operands);"
[(set_attr "conds" "clob")
@@ -1097,18 +1117,39 @@ (define_insn "thumb2_casesi_internal"
(set_attr "type" "multiple")]
)
-(define_insn "thumb2_casesi_internal_pic"
+(define_expand "thumb2_casesi_internal_pic"
+ [(parallel [(set (pc)
+ (if_then_else
+ (leu (match_operand:SI 0 "s_register_operand")
+ (match_operand:SI 1 "arm_rhs_operand"))
+ (match_dup 4)
+ (label_ref:SI (match_operand 3 ""))))
+ (clobber (reg:CC CC_REGNUM))
+ (clobber (match_scratch:SI 5))
+ (clobber (match_scratch:SI 6))
+ (use (label_ref:SI (match_operand 2 "")))])]
+ "TARGET_THUMB2 && flag_pic"
+{
+ operands[4] = gen_rtx_MULT (SImode, operands[0], GEN_INT (4));
+ operands[4] = gen_rtx_PLUS (SImode, operands[4],
+ gen_rtx_LABEL_REF (SImode, operands[2]));
+ operands[4] = gen_rtx_MEM (SImode, operands[4]);
+ MEM_READONLY_P (operands[4]) = 1;
+ MEM_NOTRAP_P (operands[4]) = 1;
+})
+
+(define_insn "*thumb2_casesi_internal_pic"
[(parallel [(set (pc)
(if_then_else
(leu (match_operand:SI 0 "s_register_operand" "r")
(match_operand:SI 1 "arm_rhs_operand" "rI"))
(mem:SI (plus:SI (mult:SI (match_dup 0) (const_int 4))
- (label_ref (match_operand 2 "" ""))))
- (label_ref (match_operand 3 "" ""))))
+ (label_ref:SI (match_operand 2 "" ""))))
+ (label_ref:SI (match_operand 3 "" ""))))
(clobber (reg:CC CC_REGNUM))
(clobber (match_scratch:SI 4 "=&r"))
(clobber (match_scratch:SI 5 "=r"))
- (use (label_ref (match_dup 2)))])]
+ (use (label_ref:SI (match_dup 2)))])]
"TARGET_THUMB2 && flag_pic"
"* return thumb2_output_casesi(operands);"
[(set_attr "conds" "clob")
--- gcc/config/aarch64/aarch64.md.jj 2019-01-19 09:39:18.847831222 +0100
+++ gcc/config/aarch64/aarch64.md 2019-02-21 15:25:27.874532191 +0100
@@ -622,13 +622,27 @@ (define_expand "casesi"
operands[0], operands[2], operands[4]));
operands[2] = force_reg (DImode, gen_rtx_LABEL_REF (DImode, operands[3]));
- emit_jump_insn (gen_casesi_dispatch (operands[2], operands[0],
- operands[3]));
+ operands[2]
+ = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, operands[2], operands[0]),
+ UNSPEC_CASESI);
+ operands[2] = gen_rtx_MEM (DImode, operands[2]);
+ MEM_READONLY_P (operands[2]) = 1;
+ MEM_NOTRAP_P (operands[2]) = 1;
+ emit_jump_insn (gen_casesi_dispatch (operands[2], operands[3]));
DONE;
}
)
-(define_insn "casesi_dispatch"
+(define_expand "casesi_dispatch"
+ [(parallel
+ [(set (pc) (match_operand:DI 0 ""))
+ (clobber (reg:CC CC_REGNUM))
+ (clobber (match_scratch:DI 2))
+ (clobber (match_scratch:DI 3))
+ (use (label_ref:DI (match_operand 1 "")))])]
+ "")
+
+(define_insn "*casesi_dispatch"
[(parallel
[(set (pc)
(mem:DI (unspec [(match_operand:DI 0 "register_operand" "r")
@@ -637,7 +651,7 @@ (define_insn "casesi_dispatch"
(clobber (reg:CC CC_REGNUM))
(clobber (match_scratch:DI 3 "=r"))
(clobber (match_scratch:DI 4 "=r"))
- (use (label_ref (match_operand 2 "" "")))])]
+ (use (label_ref:DI (match_operand 2 "" "")))])]
""
"*
return aarch64_output_casesi (operands);

42
gcc9-pr89014.patch
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@ -1,42 +0,0 @@
--- gcc/config/aarch64/aarch64-option-extensions.def
+++ gcc/config/aarch64/aarch64-option-extensions.def
@@ -44,7 +44,8 @@
the extension (for example, the 'crypto' extension depends on four
entries: aes, pmull, sha1, sha2 being present). In that case this field
should contain a space (" ") separated list of the strings in 'Features'
- that are required. Their order is not important. */
+ that are required. Their order is not important. An empty string means
+ do not detect this feature during auto detection. */
/* Enabling "fp" just enables "fp".
Disabling "fp" also disables "simd", "crypto", "fp16", "aes", "sha2",
--- gcc/config/aarch64/driver-aarch64.c
+++ gcc/config/aarch64/driver-aarch64.c
@@ -253,6 +253,12 @@ host_detect_local_cpu (int argc, const char **argv)
char *p = NULL;
char *feat_string
= concat (aarch64_extensions[i].feat_string, NULL);
+
+ /* If the feature contains no HWCAPS string then ignore it for the
+ auto detection. */
+ if (strlen (feat_string) == 0)
+ continue;
+
bool enabled = true;
/* This may be a multi-token feature string. We need
--- gcc/testsuite/gcc.target/aarch64/options_set_10.c
+++ gcc/testsuite/gcc.target/aarch64/options_set_10.c
@@ -0,0 +1,11 @@
+/* { dg-do compile { target "aarch64*-*-linux*" } } */
+/* { dg-additional-options "-mcpu=native" } */
+
+int main ()
+{
+ return 0;
+}
+
+/* { dg-final { scan-assembler-not {\.arch .+\+profile.*} } } */
+
+ /* Check that an empty feature string is not detected during mcpu=native. */

20
gcc9-pr89434.patch
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@ -1,20 +0,0 @@
2019-02-27 Jakub Jelinek <jakub@redhat.com>
PR target/89434
* config/arm/arm.md (*subsi3_carryin_compare_const): Use
trunc_int_for_mode (-INTVAL (...), SImode), just instead of
-UINTVAL (...).
--- gcc/config/arm/arm.md.jj 2019-02-25 11:32:02.914684615 +0100
+++ gcc/config/arm/arm.md 2019-02-26 14:41:41.128767480 +0100
@@ -1185,7 +1187,9 @@ (define_insn "*subsi3_carryin_compare_co
(minus:SI (plus:SI (match_dup 1)
(match_operand:SI 3 "arm_neg_immediate_operand" "L"))
(ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))]
- "TARGET_32BIT && UINTVAL (operands[2]) == -UINTVAL (operands[3])"
+ "TARGET_32BIT
+ && (INTVAL (operands[2])
+ == trunc_int_for_mode (-INTVAL (operands[3]), SImode))"
"sbcs\\t%0, %1, #%n3"
[(set_attr "conds" "set")
(set_attr "type" "adcs_imm")]

60
gcc9-pr89490.patch
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@ -1,60 +0,0 @@
2019-02-27 Bernd Edlinger <bernd.edlinger@hotmail.de>
PR rtl-optimization/89490
* varasm.c (get_block_for_section): Bail out for mergeable sections.
(default_use_anchors_for_symbol_p, output_object_block): Assert the
block section is not mergeable.
--- gcc/varasm.c.orig 2019-02-21 23:50:24.000000000 +0100
+++ gcc/varasm.c 2019-02-27 11:33:32.741967812 +0100
@@ -363,7 +363,11 @@ use_object_blocks_p (void)
/* Return the object_block structure for section SECT. Create a new
structure if we haven't created one already. Return null if SECT
- itself is null. */
+ itself is null. Return also null for mergeable sections since
+ section anchors can't be used in mergeable sections anyway,
+ because the linker might move objects around, and using the
+ object blocks infrastructure in that case is both a waste and a
+ maintenance burden. */
static struct object_block *
get_block_for_section (section *sect)
@@ -373,6 +377,9 @@ get_block_for_section (section *sect)
if (sect == NULL)
return NULL;
+ if (sect->common.flags & SECTION_MERGE)
+ return NULL;
+
object_block **slot
= object_block_htab->find_slot_with_hash (sect, hash_section (sect),
INSERT);
@@ -7014,14 +7021,13 @@ default_asm_output_anchor (rtx symbol)
bool
default_use_anchors_for_symbol_p (const_rtx symbol)
{
- section *sect;
tree decl;
+ section *sect = SYMBOL_REF_BLOCK (symbol)->sect;
- /* Don't use anchors for mergeable sections. The linker might move
- the objects around. */
- sect = SYMBOL_REF_BLOCK (symbol)->sect;
- if (sect->common.flags & SECTION_MERGE)
- return false;
+ /* This function should only be called with non-zero SYMBOL_REF_BLOCK,
+ furthermore get_block_for_section should not create object blocks
+ for mergeable sections. */
+ gcc_checking_assert (sect && !(sect->common.flags & SECTION_MERGE));
/* Don't use anchors for small data sections. The small data register
acts as an anchor for such sections. */
@@ -7630,6 +7636,7 @@ output_object_block (struct object_block
else
switch_to_section (block->sect);
+ gcc_checking_assert (!(block->sect->common.flags & SECTION_MERGE));
assemble_align (block->alignment);
/* Define the values of all anchors relative to the current section

17
gcc9-pr89629.patch Normal file
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@ -0,0 +1,17 @@
2019-03-08 Jonathan Wakely <jwakely@redhat.com>
PR libstdc++/89629
* libsupc++/hash_bytes.cc (std::_Hash_bytes): Change len_aligned type
from int to size_t.
--- libstdc++-v3/libsupc++/hash_bytes.cc
+++ libstdc++-v3/libsupc++/hash_bytes.cc
@@ -139,7 +139,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
// Remove the bytes not divisible by the sizeof(size_t). This
// allows the main loop to process the data as 64-bit integers.
- const int len_aligned = len & ~0x7;
+ const size_t len_aligned = len & ~0x7;
const char* const end = buf + len_aligned;
size_t hash = seed ^ (len * mul);
for (const char* p = buf; p != end; p += 8)

2
sources
View File

@ -1,3 +1,3 @@
SHA512 (gcc-9.0.1-20190227.tar.xz) = 0d42138bc1d2ac54fabf7e7d680a3492283955b869ec4ab1576e2d88a6d4ee7283e45a16a1b1db14dbdd6096da86461d81461bf8db70c4c65451529c7dc46145
SHA512 (gcc-9.0.1-20190309.tar.xz) = 84aadddc04c9f655c7ecaf90bb111da9aa82e0b4e937588f7e2c4089cb8d8e55c4ae9479fc0e46c0e2c9cd4738f8afcb178f3920528c0badb1c15c5aba54f0a1
SHA512 (nvptx-newlib-aadc8eb0ec43b7cd0dd2dfb484bae63c8b05ef24.tar.xz) = 94f7089365296f7dfa485107b4143bebc850a81586f3460fd896bbbb6ba099a00217d4042133424fd2183b352132f4fd367e6a60599bdae2a26dfd48a77d0e04
SHA512 (nvptx-tools-c28050f60193b3b95a18866a96f03334e874e78f.tar.xz) = a688cb12cf805950a5abbb13b52f45c81dbee98e310b7ed57ae20e76dbfa5964a16270148374a6426d177db71909d28360490f091c86a5d19d4faa5127beeee1