From 85294665125ff2cd24b9b3c85be27b4deacb4b29 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Tue, 17 Jan 2012 18:29:23 +0100 Subject: [PATCH] 4.7.0-0.7 --- .gitignore | 1 + gcc.spec | 40 +++++++++++++++++++++---- gcc47-no-add-needed.patch | 12 ++++++++ gcc47-pr50325.patch | 62 +++++++++++++++++++++++++++++++++++++++ gcc47-pr51876.patch | 17 +++++++++++ sources | 2 +- 6 files changed, 127 insertions(+), 7 deletions(-) create mode 100644 gcc47-pr50325.patch create mode 100644 gcc47-pr51876.patch diff --git a/.gitignore b/.gitignore index 7e552f7..b00df73 100644 --- a/.gitignore +++ b/.gitignore @@ -12,3 +12,4 @@ /gcc-4.7.0-20120105.tar.bz2 /gcc-4.7.0-20120106.tar.bz2 /gcc-4.7.0-20120112.tar.bz2 +/gcc-4.7.0-20120117.tar.bz2 diff --git a/gcc.spec b/gcc.spec index fd28128..f66bc65 100644 --- a/gcc.spec +++ b/gcc.spec @@ -1,9 +1,9 @@ -%global DATE 20120112 -%global SVNREV 183134 +%global DATE 20120117 +%global SVNREV 183258 %global gcc_version 4.7.0 # Note, gcc_release must be integer, if you want to add suffixes to # %{release}, append them after %{gcc_release} on Release: line. -%global gcc_release 0.6 +%global gcc_release 0.7 %global _unpackaged_files_terminate_build 0 %global multilib_64_archs sparc64 ppc64 s390x x86_64 %ifarch %{ix86} x86_64 ia64 ppc ppc64 alpha @@ -12,7 +12,7 @@ %global build_ada 0 %endif %global build_java 1 -%ifarch %{ix86} x86_64 ppc ppc64 +%ifarch %{ix86} x86_64 %global build_go 1 %else %global build_go 0 @@ -22,7 +22,7 @@ %else %global build_libquadmath 0 %endif -%ifarch %{ix86} x86_64 %{arm} alpha +%ifarch %{ix86} x86_64 %{arm} alpha ppc ppc64 %global build_libitm 1 %else %global build_libitm 0 @@ -174,6 +174,8 @@ Patch12: gcc47-libstdc++-docs.patch Patch13: gcc47-no-add-needed.patch Patch14: gcc47-ppl-0.10.patch Patch15: gcc47-libitm-fno-exceptions.patch +Patch16: gcc47-pr50325.patch +Patch17: gcc47-pr51876.patch Patch1000: fastjar-0.97-segfault.patch Patch1001: fastjar-0.97-len1.patch @@ -673,6 +675,8 @@ package or when debugging this package. %patch14 -p0 -b .ppl-0.10~ %endif %patch15 -p0 -b .libitm-fno-exceptions~ +%patch16 -p0 -b .pr50325~ +%patch17 -p0 -b .pr51876~ %if 0%{?_enable_debug_packages} cat > split-debuginfo.sh <<\EOF @@ -887,7 +891,7 @@ CC="$CC" CFLAGS="$OPT_FLAGS" CXXFLAGS="`echo $OPT_FLAGS | sed 's/ -Wall / /g'`" --with-system-zlib --enable-__cxa_atexit --disable-libunwind-exceptions \ --enable-gnu-unique-object --enable-linker-build-id --with-linker-hash-style=gnu \ --enable-languages=c,c++,objc,obj-c++,java,fortran${enablelada}${enablelgo},lto \ - --enable-plugin \ + --enable-plugin --enable-initfini-array \ %if !%{build_java} --disable-libgcj \ %else @@ -1912,6 +1916,14 @@ fi %{_prefix}/lib/gcc/%{gcc_target_platform}/%{gcc_version}/include/spu2vmx.h %{_prefix}/lib/gcc/%{gcc_target_platform}/%{gcc_version}/include/vec_types.h %endif +%ifarch %{arm} +%{_prefix}/lib/gcc/%{gcc_target_platform}/%{gcc_version}/include/unwind-arm-common.h +%{_prefix}/lib/gcc/%{gcc_target_platform}/%{gcc_version}/include/mmintrin.h +%{_prefix}/lib/gcc/%{gcc_target_platform}/%{gcc_version}/include/arm_neon.h +%endif +%ifarch sparc sparcv9 sparc64 +%{_prefix}/lib/gcc/%{gcc_target_platform}/%{gcc_version}/include/visintrin.h +%endif %{_prefix}/libexec/gcc/%{gcc_target_platform}/%{gcc_version}/collect2 %{_prefix}/lib/gcc/%{gcc_target_platform}/%{gcc_version}/crt*.o %{_prefix}/lib/gcc/%{gcc_target_platform}/%{gcc_version}/libgcc.a @@ -2625,6 +2637,22 @@ fi %{_prefix}/libexec/gcc/%{gcc_target_platform}/%{gcc_version}/plugin %changelog +* Tue Jan 17 2012 Jakub Jelinek 4.7.0-0.7 +- update from trunk + - PRs bootstrap/51860, c++/14179, c++/20681, c++/50012, c++/51403, + c++/51620, c++/51633, c++/51714, c++/51777, c++/51813, c++/51827, + c++/51854, c++/51868, c/12245, fortran/36755, fortran/48351, + fortran/51800, fortran/51809, fortran/51816, fortran/51842, + fortran/51869, libitm/51173, libitm/51855, middle-end/51782, + middle-end/8081, other/51165, rtl-optimization/51821, target/47852, + target/50925, target/51756, tree-optimization/51865 + - fix up ppc64 bootstrap with -mminimal-toc (#773040, PR bootstrap/51872) + - fix up -ftree-tail-merge (#782231, PR tree-optimization/51877) +- package up arm and sparc specific headers (#781765) +- enable libitm and disable go on ppc/ppc64 +- fix up big-endian libstdc++ miscompilation (PR middle-end/50325) +- fix up arm neon vectorization ICEs (PR target/51876) + * Thu Jan 12 2012 Jakub Jelinek 4.7.0-0.6 - update from trunk - PRs ada/41929, bootstrap/51705, bootstrap/51796, c++/47450, diff --git a/gcc47-no-add-needed.patch b/gcc47-no-add-needed.patch index 7e38b0b..e8bf23a 100644 --- a/gcc47-no-add-needed.patch +++ b/gcc47-no-add-needed.patch @@ -5,6 +5,7 @@ * config/gnu-user.h (LINK_EH_SPEC): Likewise. * config/alpha/elf.h (LINK_EH_SPEC): Likewise. * config/ia64/linux.h (LINK_EH_SPEC): Likewise. + * config/freebsd-spec.h (LINK_EH_SPEC): Likewise. --- gcc/config/alpha/elf.h.jj 2011-01-03 12:52:31.118056764 +0100 +++ gcc/config/alpha/elf.h 2011-01-04 18:14:10.931874160 +0100 @@ -50,3 +51,14 @@ #endif #define CPP_OS_LINUX_SPEC "-D__unix__ -D__gnu_linux__ -D__linux__ \ +--- gcc/config/freebsd-spec.h.jj 2011-12-21 20:32:34.998649834 +0100 ++++ gcc/config/freebsd-spec.h 2012-01-17 17:55:03.528567495 +0100 +@@ -135,7 +135,7 @@ is built with the --enable-threads confi + #endif + + #if defined(HAVE_LD_EH_FRAME_HDR) +-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} " ++#define LINK_EH_SPEC "--no-add-needed %{!static:--eh-frame-hdr} " + #endif + + /* Use --as-needed -lgcc_s for eh support. */ diff --git a/gcc47-pr50325.patch b/gcc47-pr50325.patch new file mode 100644 index 0000000..c9b65aa --- /dev/null +++ b/gcc47-pr50325.patch @@ -0,0 +1,62 @@ +diff -up ../_clean/gcc/expmed.c gcc/expmed.c +--- ../_clean/gcc/expmed.c 2011-12-09 15:20:36.000000000 +0100 ++++ gcc/expmed.c 2011-12-09 15:23:01.000000000 +0100 +@@ -543,7 +543,8 @@ store_bit_field_1 (rtx str_rtx, unsigned + is not allowed. */ + fieldmode = GET_MODE (value); + if (fieldmode == VOIDmode) +- fieldmode = smallest_mode_for_size (nwords * BITS_PER_WORD, MODE_INT); ++ fieldmode = smallest_mode_for_size (nwords * ++ BITS_PER_WORD, MODE_INT); + + last = get_last_insn (); + for (i = 0; i < nwords; i++) +@@ -557,9 +558,21 @@ store_bit_field_1 (rtx str_rtx, unsigned + 0) + : (int) i * BITS_PER_WORD); + rtx value_word = operand_subword_force (value, wordnum, fieldmode); ++ unsigned HOST_WIDE_INT new_bitsize = ++ MIN (BITS_PER_WORD, bitsize - i * BITS_PER_WORD); + +- if (!store_bit_field_1 (op0, MIN (BITS_PER_WORD, +- bitsize - i * BITS_PER_WORD), ++ /* If the remaining chunk doesn't have full wordsize we have ++ to make sure that for big endian machines the higher order ++ bits are used. */ ++ if (new_bitsize < BITS_PER_WORD && BYTES_BIG_ENDIAN && !backwards) ++ value_word = simplify_expand_binop (word_mode, lshr_optab, ++ value_word, ++ GEN_INT (BITS_PER_WORD ++ - new_bitsize), ++ NULL_RTX, true, ++ OPTAB_LIB_WIDEN); ++ ++ if (!store_bit_field_1 (op0, new_bitsize, + bitnum + bit_offset, + bitregion_start, bitregion_end, + word_mode, +--- ../_clean/gcc/optabs.c 2011-12-23 23:39:30.000000000 +0100 ++++ gcc/optabs.c 2011-12-24 18:40:01.000000000 +0100 +@@ -659,7 +659,7 @@ expand_ternary_op (enum machine_mode mod + calculated at compile time. The arguments and return value are + otherwise the same as for expand_binop. */ + +-static rtx ++rtx + simplify_expand_binop (enum machine_mode mode, optab binoptab, + rtx op0, rtx op1, rtx target, int unsignedp, + enum optab_methods methods) +diff -up ../_clean/gcc/optabs.h gcc/optabs.h +--- ../_clean/gcc/optabs.h 2011-12-23 23:39:30.000000000 +0100 ++++ gcc/optabs.h 2011-12-24 18:40:01.000000000 +0100 +@@ -859,6 +859,10 @@ extern rtx expand_ternary_op (enum machi + extern rtx expand_binop (enum machine_mode, optab, rtx, rtx, rtx, int, + enum optab_methods); + ++extern rtx simplify_expand_binop (enum machine_mode mode, optab binoptab, ++ rtx op0, rtx op1, rtx target, int unsignedp, ++ enum optab_methods methods); ++ + extern bool force_expand_binop (enum machine_mode, optab, rtx, rtx, rtx, int, + enum optab_methods); + diff --git a/gcc47-pr51876.patch b/gcc47-pr51876.patch new file mode 100644 index 0000000..8e11f8b --- /dev/null +++ b/gcc47-pr51876.patch @@ -0,0 +1,17 @@ +2012-01-17 Jakub Jelinek + + PR target/51876 + * config/arm/neon.md (*neon_vswp): Fix up operand + numbers in the insn pattern. + +--- gcc/config/arm/neon.md.jj 2012-01-13 21:47:35.000000000 +0100 ++++ gcc/config/arm/neon.md 2012-01-17 12:46:14.419950640 +0100 +@@ -2869,7 +2869,7 @@ (define_insn "*neon_vswp" + (match_operand:VDQX 1 "s_register_operand" "+w")) + (set (match_dup 1) (match_dup 0))] + "TARGET_NEON && reload_completed" +- "vswp\t%1, %2" ++ "vswp\t%0, %1" + [(set (attr "neon_type") + (if_then_else (match_test "") + (const_string "neon_bp_simple") diff --git a/sources b/sources index 6bd74cf..4686b52 100644 --- a/sources +++ b/sources @@ -1,2 +1,2 @@ 2659f09c2e43ef8b7d4406321753f1b2 fastjar-0.97.tar.gz -455a63796c213d036cbdf0e90586b295 gcc-4.7.0-20120112.tar.bz2 +d0ca06c510747d217e2450e3a33a3a5a gcc-4.7.0-20120117.tar.bz2