Add support for RISC-V in libphobos math

Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>

0001-Enable-RISC-V-in-libphobos-especially-math.d.patch

@@ -0,0 +1,147 @@
+From a0308671e12ccbd235717aacce15d06f37aa758a Mon Sep 17 00:00:00 2001
+From: David Abdurachmanov <david.abdurachmanov@gmail.com>
+Date: Wed, 23 Jan 2019 10:55:00 +0100
+Subject: [PATCH] Enable RISC-V in libphobos (especially math.d)
+
+Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
+---
+ .../allocator/building_blocks/region.d        |  3 +-
+ libphobos/src/std/math.d                      | 59 +++++++++++++++++++
+ 2 files changed, 61 insertions(+), 1 deletion(-)
+
+diff --git a/libphobos/src/std/experimental/allocator/building_blocks/region.d b/libphobos/src/std/experimental/allocator/building_blocks/region.d
+index 80157aee7e6..ad90d17df00 100644
+--- a/libphobos/src/std/experimental/allocator/building_blocks/region.d
++++ b/libphobos/src/std/experimental/allocator/building_blocks/region.d
+@@ -390,7 +390,8 @@ struct InSituRegion(size_t size, size_t minAlign = platformAlignment)
+     else version (PPC) enum growDownwards = Yes.growDownwards;
+     else version (PPC64) enum growDownwards = Yes.growDownwards;
+     else version (MIPS32) enum growDownwards = Yes.growDownwards;
+-    else version (MIPS64) enum growDownwards = Yes.growDownwards;
++    else version (RISCV32) enum growDownwards = Yes.growDownwards;
++    else version (RISCV64) enum growDownwards = Yes.growDownwards;
+     else version (SPARC) enum growDownwards = Yes.growDownwards;
+     else version (SystemZ) enum growDownwards = Yes.growDownwards;
+     else static assert(0, "Dunno how the stack grows on this architecture.");
+diff --git a/libphobos/src/std/math.d b/libphobos/src/std/math.d
+index 7bb4d7c23db..42493364596 100644
+--- a/libphobos/src/std/math.d
++++ b/libphobos/src/std/math.d
+@@ -4654,6 +4654,7 @@ private:
+     // The Pentium SSE2 status register is 32 bits.
+     // The ARM and PowerPC FPSCR is a 32-bit register.
+     // The SPARC FSR is a 32bit register (64 bits for SPARC 7 & 8, but high bits are uninteresting).
++    // The RISC-V (32 & 64 bit) are 32-bit register.
+     uint flags;
+ 
+     version (CRuntime_Microsoft)
+@@ -4725,6 +4726,15 @@ private:
+                     return result;
+                 }
+             }
++            else version (RISCV_Any)
++            {
++                uint result = void;
++                asm pure nothrow @nogc
++                {
++                    "frflags %0" : "=r" (result);
++                }
++                return result;
++            }
+             else
+                 assert(0, "Not yet supported");
+         }
+@@ -4799,6 +4809,15 @@ private:
+                     }
+                 }
+             }
++            else version (RISCV_Any)
++            {
++                uint oldValues = void;
++                uint newValues = 0x0;
++                asm pure nothrow @nogc
++                {
++                    "fsflags %0 %1" : "r" (oldValues) : "r" (newValues);
++                }
++            }
+             else
+                 assert(0, "Not yet supported");
+         }
+@@ -4968,6 +4987,10 @@ else version (PPC_Any)
+ {
+     version = IeeeFlagsSupport;
+ }
++else version (RISCV_Any)
++{
++    version = IeeeFlagsSupport;
++}
+ else version (MIPS_Any)
+ {
+     version = IeeeFlagsSupport;
+@@ -5162,6 +5185,21 @@ struct FloatingPointControl
+                                  | inexactException,
+         }
+     }
++    else version (RISCV_Any)
++    {
++        enum : ExceptionMask
++        {
++            inexactException      = 0x01,
++            divByZeroException    = 0x02,
++            underflowException    = 0x04,
++            overflowException     = 0x08,
++            invalidException      = 0x10,
++            severeExceptions   = overflowException | divByZeroException
++                                 | invalidException,
++            allExceptions      = severeExceptions | underflowException
++                                 | inexactException,
++        }
++    }
+     else version (SPARC64)
+     {
+         enum : ExceptionMask
+@@ -5292,6 +5330,10 @@ private:
+     {
+         alias ControlState = uint;
+     }
++    else version (RISCV_Any)
++    {
++        alias ControlState = uint;
++    }
+     else version (SPARC64)
+     {
+         alias ControlState = ulong;
+@@ -5359,6 +5401,15 @@ private:
+                 }
+                 return cont;
+             }
++            else version (RISCV_Any)
++            {
++                ControlState cont;
++                asm pure nothrow @nogc
++                {
++                    "frcsr %0" : "=r" (cont);
++                }
++                return cont;
++            }
+             else
+                 assert(0, "Not yet supported");
+         }
+@@ -5444,6 +5495,14 @@ private:
+                     }
+                 }
+             }
++            else version (RISCV_Any)
++            {
++                uint oldState = void;
++                asm pure nothrow @nogc
++                {
++                    "fscsr %0, %1;" : "r" (oldState) : "r" (newState);
++                }
++            }
+             else
+                 assert(0, "Not yet supported");
+         }
+-- 
+2.20.1
+

gcc.spec

@@ -101,7 +101,7 @@
 Summary: Various compilers (C, C++, Objective-C, ...)
 Name: gcc
 Version: %{gcc_version}
-Release: %{gcc_release}.davidlt.0%{?dist}
+Release: %{gcc_release}.davidlt.1%{?dist}
 # libgcc, libgfortran, libgomp, libstdc++ and crtstuff have
 # GCC Runtime Exception.
 License: GPLv3+ and GPLv3+ with exceptions and GPLv2+ with exceptions and LGPLv2+ and BSD
@@ -267,6 +267,7 @@ Patch18: gcc9-pr88906.patch
 
 Patch30: libphobos-enable-riscv.patch
 Patch31: libphobos-asserts.patch
+Patch32: 0001-Enable-RISC-V-in-libphobos-especially-math.d.patch
 
 Patch1000: nvptx-tools-no-ptxas.patch
 Patch1001: nvptx-tools-build.patch
@@ -855,6 +856,7 @@ to NVidia PTX capable devices if available.
 
 %patch30 -p1 -b .libphobos-riscv~
 %patch31 -p1 -b .libphobos-asserts~
+%patch32 -p1 -b .libphobos-riscv-math~
 
 cd nvptx-tools-%{nvptx_tools_gitrev}
 %patch1000 -p1 -b .nvptx-tools-no-ptxas~