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9.0.1-0.1

This commit is contained in:
Jakub Jelinek 2019-01-23 19:22:27 +01:00
parent adee8bcb39
commit 80dc8803df
11 changed files with 63 additions and 445 deletions
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1
.gitignore vendored
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@ -59,3 +59,4 @@
/gcc-8.2.1-20190109.tar.xz
/gcc-9.0.0-20190119.tar.xz
/gcc-9.0.0-20190121.tar.xz
/gcc-9.0.1-20190123.tar.xz

33
gcc.spec
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@ -1,10 +1,10 @@
%global DATE 20190121
%global SVNREV 268128
%global gcc_version 9.0.0
%global DATE 20190123
%global SVNREV 268193
%global gcc_version 9.0.1
%global gcc_major 9
# Note, gcc_release must be integer, if you want to add suffixes to
# %%{release}, append them after %%{gcc_release} on Release: line.
%global gcc_release 0.4
%global gcc_release 0.1
%global nvptx_tools_gitrev c28050f60193b3b95a18866a96f03334e874e78f
%global nvptx_newlib_gitrev aadc8eb0ec43b7cd0dd2dfb484bae63c8b05ef24
%global _unpackaged_files_terminate_build 0
@ -258,12 +258,7 @@ Patch9: gcc9-Wno-format-security.patch
Patch10: gcc9-rh1574936.patch
Patch11: gcc9-d-shared-libphobos.patch
Patch12: gcc9-pr88714.patch
Patch13: gcc9-pr88044.patch
Patch14: gcc9-pr88927.patch
Patch15: gcc9-pr87064.patch
Patch16: gcc9-pr88904.patch
Patch17: gcc9-pr88905.patch
Patch18: gcc9-pr88906.patch
Patch13: gcc9-pr89014.patch
Patch1000: nvptx-tools-no-ptxas.patch
Patch1001: nvptx-tools-build.patch
@ -843,12 +838,7 @@ to NVidia PTX capable devices if available.
%endif
%patch11 -p0 -b .d-shared-libphobos~
%patch12 -p0 -b .pr88714~
%patch13 -p0 -b .pr88044~
%patch14 -p0 -b .pr88927~
%patch15 -p0 -b .pr87064~
%patch16 -p0 -b .pr88904~
%patch17 -p0 -b .pr88905~
%patch18 -p0 -b .pr88906~
%patch13 -p0 -b .pr89014~
cd nvptx-tools-%{nvptx_tools_gitrev}
%patch1000 -p1 -b .nvptx-tools-no-ptxas~
@ -3182,6 +3172,17 @@ fi
%endif
%changelog
* Wed Jan 23 2019 Jakub Jelinek <jakub@redhat.com> 9.0.1-0.1
- update from trunk
- PRs c++/87893, c++/88293, c++/88757, c++/88984, c/44715, driver/89014,
fortran/88579, libstdc++/88740, lto/88422, middle-end/88968,
rtl-optimization/87763, sanitizer/86229, sanitizer/89010,
target/87835, target/88469, target/88909, target/88939, target/88941,
target/88954, target/88965, target/PR88946, tree-optimization/88862,
tree-optimization/88964, tree-optimization/89008
- hopefully fix arm C++ issues (#1668323)
- fix aarch64 -march=native (#1668631)
* Tue Jan 22 2019 David Abdurachmanov <david.abdurachmanov@gmail.com>
- fix libgphobos-static requires (#1668204)

4
gcc9-libstdc++-docs.patch
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@ -4,7 +4,7 @@
<a class="link" href="https://www.fsf.org" target="_top">FSF
</a>
</p><p>
+ Release 9.0.0
+ Release 9.0.1
+ </p><p>
Permission is granted to copy, distribute and/or modify this
document under the terms of the GNU Free Documentation
@ -17,7 +17,7 @@
</p><p>
- The API documentation, rendered into HTML, can be viewed online
+ The API documentation, rendered into HTML, can be viewed locally
+ <a class="link" href="api/index.html" target="_top">for the 9.0.0 release</a>,
+ <a class="link" href="api/index.html" target="_top">for the 9.0.1 release</a>,
+ online
<a class="link" href="http://gcc.gnu.org/onlinedocs/" target="_top">for each GCC release</a>
and

17
gcc9-pr87064.patch
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@ -1,17 +0,0 @@
2019-01-21 Jakub Jelinek <jakub@redhat.com>
PR target/87064
* config/rs6000/vsx.md (*vsx_reduc_<VEC_reduc_name>_v2df_scalar):
Disable for little endian.
--- gcc/config/rs6000/vsx.md.jj 2019-01-19 09:39:13.224924063 +0100
+++ gcc/config/rs6000/vsx.md 2019-01-21 23:39:27.527774247 +0100
@@ -4351,7 +4351,7 @@ (define_insn_and_split "*vsx_reduc_<VEC_
(match_dup 1))
(parallel [(const_int 1)])))
(clobber (match_scratch:DF 2 "=0,0,&wd,&wa"))]
- "VECTOR_UNIT_VSX_P (V2DFmode)"
+ "BYTES_BIG_ENDIAN && VECTOR_UNIT_VSX_P (V2DFmode)"
"#"
""
[(const_int 0)]

18
gcc9-pr88044.patch
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@ -1,18 +0,0 @@
2019-01-18 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/88044
* tree-ssa-loop-niter.c (number_of_iterations_cond): If condition
is false in the first iteration, but !every_iteration, return false
instead of true with niter->niter zero.
--- gcc/tree-ssa-loop-niter.c.jj 2019-01-10 11:43:02.254577008 +0100
+++ gcc/tree-ssa-loop-niter.c 2019-01-18 19:51:00.245504728 +0100
@@ -1824,6 +1824,8 @@ number_of_iterations_cond (struct loop *
tree tem = fold_binary (code, boolean_type_node, iv0->base, iv1->base);
if (tem && integer_zerop (tem))
{
+ if (!every_iteration)
+ return false;
niter->niter = build_int_cst (unsigned_type_for (type), 0);
niter->max = 0;
return true;

77
gcc9-pr88904.patch
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@ -1,77 +0,0 @@
2019-01-21 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/88904
* cfgcleanup.c (thread_jump): Verify cond2 doesn't mention
any nonequal registers before processing BB_END (b).
* gcc.c-torture/execute/pr88904.c: New test.
--- gcc/cfgcleanup.c.jj 2019-01-01 12:37:19.147942300 +0100
+++ gcc/cfgcleanup.c 2019-01-21 16:45:52.576636305 +0100
@@ -338,6 +338,13 @@ thread_jump (edge e, basic_block b)
insn != NEXT_INSN (BB_END (b)) && !failed;
insn = NEXT_INSN (insn))
{
+ /* cond2 must not mention any register that is not equal to the
+ former block. Check this before processing that instruction,
+ as BB_END (b) could contain also clobbers. */
+ if (insn == BB_END (b)
+ && mentions_nonequal_regs (cond2, nonequal))
+ goto failed_exit;
+
if (INSN_P (insn))
{
rtx pat = PATTERN (insn);
@@ -362,11 +369,6 @@ thread_jump (edge e, basic_block b)
goto failed_exit;
}
- /* cond2 must not mention any register that is not equal to the
- former block. */
- if (mentions_nonequal_regs (cond2, nonequal))
- goto failed_exit;
-
EXECUTE_IF_SET_IN_REG_SET (nonequal, 0, i, rsi)
goto failed_exit;
--- gcc/testsuite/gcc.c-torture/execute/pr88904.c.jj 2019-01-21 16:47:16.194265770 +0100
+++ gcc/testsuite/gcc.c-torture/execute/pr88904.c 2019-01-21 16:46:59.278543027 +0100
@@ -0,0 +1,38 @@
+/* PR rtl-optimization/88904 */
+
+volatile int v;
+
+__attribute__((noipa)) void
+bar (const char *x, const char *y, int z)
+{
+ if (!v)
+ __builtin_abort ();
+ asm volatile ("" : "+g" (x));
+ asm volatile ("" : "+g" (y));
+ asm volatile ("" : "+g" (z));
+}
+
+#define my_assert(e) ((e) ? (void) 0 : bar (#e, __FILE__, __LINE__))
+
+typedef struct {
+ unsigned M1;
+ unsigned M2 : 1;
+ int : 0;
+ unsigned M3 : 1;
+} S;
+
+S
+foo ()
+{
+ S result = {0, 0, 1};
+ return result;
+}
+
+int
+main ()
+{
+ S ret = foo ();
+ my_assert (ret.M2 == 0);
+ my_assert (ret.M3 == 1);
+ return 0;
+}

142
gcc9-pr88905.patch
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@ -1,142 +0,0 @@
2019-01-21 Jakub Jelinek <jakub@redhat.com>
PR target/88905
* optabs.c (add_equal_note): Add op0_mode argument, use it instead of
GET_MODE (op0).
(expand_binop_directly, expand_doubleword_clz,
expand_doubleword_popcount, expand_ctz, expand_ffs,
expand_unop_direct, maybe_emit_unop_insn): Adjust callers.
* gcc.dg/pr88905.c: New test.
--- gcc/optabs.c.jj 2019-01-01 12:37:17.711965861 +0100
+++ gcc/optabs.c 2019-01-21 13:56:18.263446049 +0100
@@ -55,7 +55,7 @@ void debug_optab_libfuncs (void);
/* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
the result of operation CODE applied to OP0 (and OP1 if it is a binary
- operation).
+ operation). OP0_MODE is OP0's mode.
If the last insn does not set TARGET, don't do anything, but return 1.
@@ -64,7 +64,8 @@ void debug_optab_libfuncs (void);
try again, ensuring that TARGET is not one of the operands. */
static int
-add_equal_note (rtx_insn *insns, rtx target, enum rtx_code code, rtx op0, rtx op1)
+add_equal_note (rtx_insn *insns, rtx target, enum rtx_code code, rtx op0,
+ rtx op1, machine_mode op0_mode)
{
rtx_insn *last_insn;
rtx set;
@@ -136,16 +137,16 @@ add_equal_note (rtx_insn *insns, rtx tar
case POPCOUNT:
case PARITY:
case BSWAP:
- if (GET_MODE (op0) != VOIDmode && GET_MODE (target) != GET_MODE (op0))
+ if (op0_mode != VOIDmode && GET_MODE (target) != op0_mode)
{
- note = gen_rtx_fmt_e (code, GET_MODE (op0), copy_rtx (op0));
- if (GET_MODE_UNIT_SIZE (GET_MODE (op0))
+ note = gen_rtx_fmt_e (code, op0_mode, copy_rtx (op0));
+ if (GET_MODE_UNIT_SIZE (op0_mode)
> GET_MODE_UNIT_SIZE (GET_MODE (target)))
note = simplify_gen_unary (TRUNCATE, GET_MODE (target),
- note, GET_MODE (op0));
+ note, op0_mode);
else
note = simplify_gen_unary (ZERO_EXTEND, GET_MODE (target),
- note, GET_MODE (op0));
+ note, op0_mode);
break;
}
/* FALLTHRU */
@@ -1127,7 +1128,7 @@ expand_binop_directly (enum insn_code ic
if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
&& ! add_equal_note (pat, ops[0].value,
optab_to_code (binoptab),
- ops[1].value, ops[2].value))
+ ops[1].value, ops[2].value, mode0))
{
delete_insns_since (last);
return expand_binop (mode, binoptab, op0, op1, NULL_RTX,
@@ -2298,7 +2299,7 @@ expand_doubleword_clz (scalar_int_mode m
seq = get_insns ();
end_sequence ();
- add_equal_note (seq, target, CLZ, xop0, 0);
+ add_equal_note (seq, target, CLZ, xop0, NULL_RTX, mode);
emit_insn (seq);
return target;
@@ -2340,7 +2341,7 @@ expand_doubleword_popcount (scalar_int_m
seq = get_insns ();
end_sequence ();
- add_equal_note (seq, t, POPCOUNT, op0, 0);
+ add_equal_note (seq, t, POPCOUNT, op0, NULL_RTX, mode);
emit_insn (seq);
return t;
}
@@ -2511,7 +2512,7 @@ expand_ctz (scalar_int_mode mode, rtx op
seq = get_insns ();
end_sequence ();
- add_equal_note (seq, temp, CTZ, op0, 0);
+ add_equal_note (seq, temp, CTZ, op0, NULL_RTX, mode);
emit_insn (seq);
return temp;
}
@@ -2589,7 +2590,7 @@ expand_ffs (scalar_int_mode mode, rtx op
seq = get_insns ();
end_sequence ();
- add_equal_note (seq, temp, FFS, op0, 0);
+ add_equal_note (seq, temp, FFS, op0, NULL_RTX, mode);
emit_insn (seq);
return temp;
@@ -2736,7 +2737,7 @@ expand_unop_direct (machine_mode mode, o
if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
&& ! add_equal_note (pat, ops[0].value,
optab_to_code (unoptab),
- ops[1].value, NULL_RTX))
+ ops[1].value, NULL_RTX, mode))
{
delete_insns_since (last);
return expand_unop (mode, unoptab, op0, NULL_RTX, unsignedp);
@@ -3588,7 +3589,8 @@ maybe_emit_unop_insn (enum insn_code ico
if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
&& code != UNKNOWN)
- add_equal_note (pat, ops[0].value, code, ops[1].value, NULL_RTX);
+ add_equal_note (pat, ops[0].value, code, ops[1].value, NULL_RTX,
+ GET_MODE (op0));
emit_insn (pat);
--- gcc/testsuite/gcc.dg/pr88905.c.jj 2019-01-21 14:19:17.279746531 +0100
+++ gcc/testsuite/gcc.dg/pr88905.c 2019-01-21 14:18:56.264091537 +0100
@@ -0,0 +1,21 @@
+/* PR target/88905 */
+/* { dg-do compile } */
+/* { dg-options "-Og -fno-tree-ccp" } */
+/* { dg-additional-options "-mabm" { target { i?86-*-* x86_64-*-* } } } */
+
+int a, b, c;
+extern void baz (int);
+
+static inline int
+bar (unsigned u)
+{
+ int i = __builtin_popcountll (-(unsigned long long) u);
+ baz (i & c);
+ return a + b + c;
+}
+
+void
+foo (void)
+{
+ bar (2376498292ULL);
+}

94
gcc9-pr88906.patch
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@ -1,94 +0,0 @@
2019-01-21 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/49429
PR target/49454
PR rtl-optimization/86334
PR target/88906
* expr.c (emit_block_move_hints): Move marking of MEM_EXPRs
addressable from here...
(emit_block_op_via_libcall): ... to here.
* gcc.target/i386/pr86334.c: New test.
* gcc.target/i386/pr88906.c: New test.
--- gcc/expr.c.jj 2019-01-10 11:43:08.958466880 +0100
+++ gcc/expr.c 2019-01-21 12:06:41.782406169 +0100
@@ -1631,14 +1631,6 @@ emit_block_move_hints (rtx x, rtx y, rtx
if (may_use_call < 0)
return pc_rtx;
- /* Since x and y are passed to a libcall, mark the corresponding
- tree EXPR as addressable. */
- tree y_expr = MEM_EXPR (y);
- tree x_expr = MEM_EXPR (x);
- if (y_expr)
- mark_addressable (y_expr);
- if (x_expr)
- mark_addressable (x_expr);
retval = emit_block_copy_via_libcall (x, y, size,
method == BLOCK_OP_TAILCALL);
}
@@ -1884,6 +1876,15 @@ emit_block_op_via_libcall (enum built_in
tree call_expr, dst_tree, src_tree, size_tree;
machine_mode size_mode;
+ /* Since dst and src are passed to a libcall, mark the corresponding
+ tree EXPR as addressable. */
+ tree dst_expr = MEM_EXPR (dst);
+ tree src_expr = MEM_EXPR (src);
+ if (dst_expr)
+ mark_addressable (dst_expr);
+ if (src_expr)
+ mark_addressable (src_expr);
+
dst_addr = copy_addr_to_reg (XEXP (dst, 0));
dst_addr = convert_memory_address (ptr_mode, dst_addr);
dst_tree = make_tree (ptr_type_node, dst_addr);
--- gcc/testsuite/gcc.target/i386/pr86334.c.jj 2019-01-21 17:52:04.408370956 +0100
+++ gcc/testsuite/gcc.target/i386/pr86334.c 2019-01-21 17:52:58.504482908 +0100
@@ -0,0 +1,21 @@
+/* PR rtl-optimization/86334 */
+/* { dg-do run { target ia32 } } */
+/* { dg-options "-O -march=i386 -mtune=athlon -minline-all-stringops -minline-stringops-dynamically -mmemcpy-strategy=libcall:-1:align -Wno-psabi" } */
+
+typedef int V __attribute__ ((vector_size (64)));
+
+static inline V
+foo (V g)
+{
+ g[0] = 4;
+ return g;
+}
+
+int
+main ()
+{
+ V x = foo ((V) { });
+ if (x[0] != 4 || x[1] || x[2] || x[3] || x[4] || x[5] || x[6] || x[7])
+ __builtin_abort ();
+ return 0;
+}
--- gcc/testsuite/gcc.target/i386/pr88906.c.jj 2019-01-21 12:08:53.110252030 +0100
+++ gcc/testsuite/gcc.target/i386/pr88906.c 2019-01-21 17:53:08.082325657 +0100
@@ -0,0 +1,21 @@
+/* PR target/88906 */
+/* { dg-do run { target ia32 } } */
+/* { dg-options "-O -march=i386 -mtune=k6 -minline-all-stringops -minline-stringops-dynamically -mmemcpy-strategy=libcall:-1:align -Wno-psabi" } */
+
+typedef unsigned V __attribute__ ((vector_size (16)));
+
+static inline V
+foo (V v)
+{
+ __builtin_sub_overflow (0, 0, &v[0]);
+ return v;
+}
+
+int
+main ()
+{
+ V v = foo ((V) { ~0 });
+ if (v[0] || v[1] || v[2] || v[3])
+ __builtin_abort ();
+ return 0;
+}

78
gcc9-pr88927.patch
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@ -1,78 +0,0 @@
PR go/88927
From aa3469119f6256799badc9722861976a416abbcc Mon Sep 17 00:00:00 2001
From: Ian Lance Taylor <iant@golang.org>
Date: Sat, 19 Jan 2019 22:40:27 -0800
Subject: [PATCH] runtime, internal/cpu: fix build for ARM GNU/Linux
Was failing with
../../../libgo/go/internal/cpu/cpu.go:138:2: error: reference to undefined name 'doinit'
138 | doinit()
| ^
Fix it by adding in Go 1.12 internal/cpu/cpu_arm.go, and the code in
runtime that initializes the values.
Fixes https://gcc.gnu.org/PR88927.
Change-Id: Ib376fcbd443acf428fa93d4aa77ec74edbaa71ee
---
--- libgo/go/internal/cpu/cpu_arm.go
+++ libgo/go/internal/cpu/cpu_arm.go
@@ -0,0 +1,33 @@
+// Copyright 2017 The Go Authors. All rights reserved.
+// Use of this source code is governed by a BSD-style
+// license that can be found in the LICENSE file.
+
+package cpu
+
+// arm doesn't have a 'cpuid' equivalent, so we rely on HWCAP/HWCAP2.
+// These are linknamed in runtime/os_(linux|freebsd)_arm.go and are
+// initialized by archauxv().
+// These should not be changed after they are initialized.
+var HWCap uint
+var HWCap2 uint
+
+// HWCAP/HWCAP2 bits. These are exposed by Linux and FreeBSD.
+const (
+ hwcap_VFPv4 = 1 << 16
+ hwcap_IDIVA = 1 << 17
+)
+
+func doinit() {
+ options = []option{
+ {Name: "vfpv4", Feature: &ARM.HasVFPv4},
+ {Name: "idiva", Feature: &ARM.HasIDIVA},
+ }
+
+ // HWCAP feature bits
+ ARM.HasVFPv4 = isSet(HWCap, hwcap_VFPv4)
+ ARM.HasIDIVA = isSet(HWCap, hwcap_IDIVA)
+}
+
+func isSet(hwc uint, value uint) bool {
+ return hwc&value != 0
+}
--- libgo/go/runtime/os_linux_arm.go
+++ libgo/go/runtime/os_linux_arm.go
@@ -4,6 +4,8 @@
package runtime
+import "internal/cpu"
+
var randomNumber uint32
func archauxv(tag, val uintptr) {
@@ -14,5 +16,9 @@
// it as a byte array.
randomNumber = uint32(startupRandomData[4]) | uint32(startupRandomData[5])<<8 |
uint32(startupRandomData[6])<<16 | uint32(startupRandomData[7])<<24
+ case _AT_HWCAP:
+ cpu.HWCap = uint(val)
+ case _AT_HWCAP2:
+ cpu.HWCap2 = uint(val)
}
}

42
gcc9-pr89014.patch Normal file
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@ -0,0 +1,42 @@
--- gcc/config/aarch64/aarch64-option-extensions.def
+++ gcc/config/aarch64/aarch64-option-extensions.def
@@ -43,7 +43,8 @@
the extension (for example, the 'crypto' extension depends on four
entries: aes, pmull, sha1, sha2 being present). In that case this field
should contain a space (" ") separated list of the strings in 'Features'
- that are required. Their order is not important. */
+ that are required. Their order is not important. An empty string means
+ do not detect this feature during auto detection. */
/* Enabling "fp" just enables "fp".
Disabling "fp" also disables "simd", "crypto", "fp16", "aes", "sha2",
--- gcc/config/aarch64/driver-aarch64.c
+++ gcc/config/aarch64/driver-aarch64.c
@@ -253,6 +253,12 @@ host_detect_local_cpu (int argc, const char **argv)
char *p = NULL;
char *feat_string
= concat (aarch64_extensions[i].feat_string, NULL);
+
+ /* If the feature contains no HWCAPS string then ignore it for the
+ auto detection. */
+ if (strlen (feat_string) == 0)
+ continue;
+
bool enabled = true;
/* This may be a multi-token feature string. We need
--- gcc/testsuite/gcc.target/aarch64/options_set_10.c
+++ gcc/testsuite/gcc.target/aarch64/options_set_10.c
@@ -0,0 +1,11 @@
+/* { dg-do compile { target "aarch64*-*-linux*" } } */
+/* { dg-additional-options "-mcpu=native" } */
+
+int main ()
+{
+ return 0;
+}
+
+/* { dg-final { scan-assembler-not {\.arch .+\+profile.*} } } */
+
+ /* Check that an empty feature string is not detected during mcpu=native. */

2
sources
View File

@ -1,3 +1,3 @@
SHA512 (gcc-9.0.0-20190121.tar.xz) = 18dda8f278e99e1cf93fb30f60faa2b4828c13f289de7412e62d59076357b0674f5ae891ac879d7d47a18cf0c291fdb34795162180fc9c9b2651ad42ca08f478
SHA512 (gcc-9.0.1-20190123.tar.xz) = 640e27164ec6624366af3fdcb9f1bd399c47bd1a8adc57a0f5f0214493354a218d1cdc7c8e60bb9323baf01c3e2ef09233d57896b3e3047149064b1c353b6b8c
SHA512 (nvptx-newlib-aadc8eb0ec43b7cd0dd2dfb484bae63c8b05ef24.tar.xz) = 94f7089365296f7dfa485107b4143bebc850a81586f3460fd896bbbb6ba099a00217d4042133424fd2183b352132f4fd367e6a60599bdae2a26dfd48a77d0e04
SHA512 (nvptx-tools-c28050f60193b3b95a18866a96f03334e874e78f.tar.xz) = a688cb12cf805950a5abbb13b52f45c81dbee98e310b7ed57ae20e76dbfa5964a16270148374a6426d177db71909d28360490f091c86a5d19d4faa5127beeee1