diff --git a/gcc.spec b/gcc.spec index 686db3d..6e5f9fa 100644 --- a/gcc.spec +++ b/gcc.spec @@ -3,7 +3,7 @@ %global gcc_version 4.9.1 # Note, gcc_release must be integer, if you want to add suffixes to # %{release}, append them after %{gcc_release} on Release: line. -%global gcc_release 6 +%global gcc_release 7 %global _unpackaged_files_terminate_build 0 %global _performance_build 1 %global multilib_64_archs sparc64 ppc64 ppc64p7 s390x x86_64 @@ -200,6 +200,8 @@ Patch17: gcc49-aarch64-async-unw-tables.patch Patch18: gcc49-aarch64-unwind-opt.patch Patch19: gcc49-pr62098.patch Patch20: gcc49-pr62103.patch +Patch21: gcc49-pr62025.patch +Patch22: gcc49-pr62073.patch Patch1100: cloog-%{cloog_version}-ppc64le-config.patch @@ -730,6 +732,8 @@ rm -f libgo/go/crypto/elliptic/p224{,_test}.go %patch18 -p0 -b .aarch64-unwind-opt~ %patch19 -p0 -b .pr62098~ %patch20 -p0 -b .pr62103~ +%patch21 -p0 -b .pr62025~ +%patch22 -p0 -b .pr62073~ %if 0%{?_enable_debug_packages} cat > split-debuginfo.sh <<\EOF @@ -2802,6 +2806,10 @@ fi %{_prefix}/libexec/gcc/%{gcc_target_platform}/%{gcc_version}/plugin %changelog +* Thu Aug 14 2014 Jakub Jelinek 4.9.1-7 +- fix up scheduler deps handling fix (PR target/62025) +- vectorization fix (PR tree-optimization/62073) + * Wed Aug 13 2014 Jakub Jelinek 4.9.1-6 - update from the 4.9 branch - PRs c++/58714, c++/60872, c++/61959, c++/61994, fortran/61999, diff --git a/gcc49-pr62025.patch b/gcc49-pr62025.patch new file mode 100644 index 0000000..1c00ccc --- /dev/null +++ b/gcc49-pr62025.patch @@ -0,0 +1,94 @@ +2014-08-14 Jakub Jelinek + + PR target/62025 + * sched-deps.c (find_inc): Limit the test for inc_insn defs + vs. mem_insn uses to !backwards case only. Give up also if + any mem_insn def is used by inc_insn or if non-clobber + mem_insn def in backwards case is clobbered by inc_insn. + +--- gcc/sched-deps.c.jj 2014-08-12 17:06:26.000000000 +0200 ++++ gcc/sched-deps.c 2014-08-14 00:09:38.000000000 +0200 +@@ -4746,23 +4746,70 @@ find_inc (struct mem_inc_info *mii, bool + "inc conflicts with store failure.\n"); + goto next; + } ++ else ++ { ++ df_ref *use_rec, *def2_rec; ++ for (use_rec = DF_INSN_USES (mii->inc_insn); ++ *use_rec; use_rec++) ++ { ++ df_ref use = *use_rec; ++ if (reg_overlap_mentioned_p (DF_REF_REG (def), ++ DF_REF_REG (use))) ++ { ++ if (sched_verbose >= 5) ++ fprintf (sched_dump, ++ "mem def conflict with inc use " ++ "failure.\n"); ++ goto next; ++ } ++ } ++ /* If both inc_insn and mem_insn clobber the same register, ++ it is fine, but avoid the case where mem_insn e.g. ++ sets CC and originally earlier inc_insn clobbers it. */ ++ if ((DF_REF_FLAGS (def) & DF_REF_MUST_CLOBBER) == 0 ++ && backwards) ++ for (def2_rec = DF_INSN_DEFS (mii->inc_insn); ++ *def2_rec; def2_rec++) ++ { ++ df_ref def2 = *def2_rec; ++ if (reg_overlap_mentioned_p (DF_REF_REG (def), ++ DF_REF_REG (def2))) ++ { ++ if (sched_verbose >= 5) ++ fprintf (sched_dump, ++ "mem def conflict with inc def " ++ "failure.\n"); ++ goto next; ++ } ++ } ++ } + } + + /* The inc instruction could have clobbers, make sure those +- registers are not used in mem insn. */ +- for (def_rec = DF_INSN_DEFS (mii->inc_insn); *def_rec; def_rec++) +- if (!reg_overlap_mentioned_p (DF_REF_REG (*def_rec), mii->mem_reg0)) ++ registers are not used in mem insn, if mem_insn is originally ++ earlier than inc_insn. */ ++ if (!backwards) ++ for (def_rec = DF_INSN_DEFS (mii->inc_insn); *def_rec; def_rec++) + { +- df_ref *use_rec; +- for (use_rec = DF_INSN_USES (mii->mem_insn); *use_rec; use_rec++) +- if (reg_overlap_mentioned_p (DF_REF_REG (*def_rec), +- DF_REF_REG (*use_rec))) +- { +- if (sched_verbose >= 5) +- fprintf (sched_dump, +- "inc clobber used in store failure.\n"); +- goto next; +- } ++ df_ref def = *def_rec; ++ if (!reg_overlap_mentioned_p (DF_REF_REG (def), mii->mem_reg0)) ++ { ++ df_ref *use_rec; ++ for (use_rec = DF_INSN_USES (mii->mem_insn); ++ *use_rec; use_rec++) ++ { ++ df_ref use = *use_rec; ++ if (reg_overlap_mentioned_p (DF_REF_REG (def), ++ DF_REF_REG (use))) ++ { ++ if (sched_verbose >= 5) ++ fprintf (sched_dump, ++ "inc def conflict with mem use " ++ "failure.\n"); ++ goto next; ++ } ++ } ++ } + } + + newaddr = mii->inc_input; diff --git a/gcc49-pr62073.patch b/gcc49-pr62073.patch new file mode 100644 index 0000000..c89c4d6 --- /dev/null +++ b/gcc49-pr62073.patch @@ -0,0 +1,63 @@ +2014-08-12 Felix Yang + + PR tree-optimization/62073 + * tree-vect-loop.c (vect_is_simple_reduction_1): Check that DEF1 has + a basic block. + + * gcc.dg/vect/pr62073.c: New test. + +--- gcc/tree-vect-loop.c (revision 213900) ++++ gcc/tree-vect-loop.c (revision 213901) +@@ -2321,7 +2321,8 @@ vect_is_simple_reduction_1 (loop_vec_inf + } + + def1 = SSA_NAME_DEF_STMT (op1); +- if (flow_bb_inside_loop_p (loop, gimple_bb (def_stmt)) ++ if (gimple_bb (def1) ++ && flow_bb_inside_loop_p (loop, gimple_bb (def_stmt)) + && loop->inner + && flow_bb_inside_loop_p (loop->inner, gimple_bb (def1)) + && is_gimple_assign (def1)) +--- gcc/testsuite/gcc.dg/vect/pr62073.c (revision 0) ++++ gcc/testsuite/gcc.dg/vect/pr62073.c (revision 213901) +@@ -0,0 +1,40 @@ ++/* { dg-do compile } */ ++/* { dg-additional-options "-O1" } */ ++ ++struct S0 ++{ ++ int f7; ++}; ++struct S0 g_50; ++int g_70; ++int g_76; ++ ++int foo (long long p_56, int * p_57) ++{ ++ int *l_77; ++ int l_101; ++ ++ for (; g_70;) ++ { ++ int **l_78 = &l_77; ++ if (g_50.f7) ++ continue; ++ *l_78 = 0; ++ } ++ for (g_76 = 1; g_76 >= 0; g_76--) ++ { ++ int *l_90; ++ for (l_101 = 4; l_101 >= 0; l_101--) ++ if (l_101) ++ *l_90 = 0; ++ else ++ { ++ int **l_113 = &l_77; ++ *l_113 = p_57; ++ } ++ } ++ ++ return *l_77; ++} ++ ++/* { dg-final { cleanup-tree-dump "vect" } } */