From 26c09a98ec1d62ddde1c8c9c7177aef34c1b0c8e Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Tue, 18 May 2010 21:17:39 +0000 Subject: [PATCH] 4.4.4-4 --- .cvsignore | 2 +- gcc.spec | 17 ++++++-- gcc44-debug-sra-be.patch | 92 ++++++++++++++++++++++++++++++++++++++++ import.log | 1 + sources | 2 +- 5 files changed, 109 insertions(+), 5 deletions(-) create mode 100644 gcc44-debug-sra-be.patch diff --git a/.cvsignore b/.cvsignore index b3ec3cf..00c0ebe 100644 --- a/.cvsignore +++ b/.cvsignore @@ -1,2 +1,2 @@ fastjar-0.97.tar.gz -gcc-4.4.4-20100514.tar.bz2 +gcc-4.4.4-20100518.tar.bz2 diff --git a/gcc.spec b/gcc.spec index 3c5675f..a338abe 100644 --- a/gcc.spec +++ b/gcc.spec @@ -1,9 +1,9 @@ -%global DATE 20100514 -%global SVNREV 159406 +%global DATE 20100518 +%global SVNREV 159543 %global gcc_version 4.4.4 # Note, gcc_release must be integer, if you want to add suffixes to # %{release}, append them after %{gcc_release} on Release: line. -%global gcc_release 3 +%global gcc_release 4 %global _unpackaged_files_terminate_build 0 %global multilib_64_archs sparc64 ppc64 s390x x86_64 %if 0%{?fedora} >= 13 || 0%{?rhel} >= 6 @@ -176,6 +176,7 @@ Patch17: gcc44-pr38757.patch Patch18: gcc44-libstdc++-docs.patch Patch19: gcc44-ppc64-aixdesc.patch Patch20: gcc44-no-add-needed.patch +Patch21: gcc44-debug-sra-be.patch Patch1000: fastjar-0.97-segfault.patch Patch1001: fastjar-0.97-len1.patch @@ -487,6 +488,7 @@ which are required to compile with the GNAT. %if 0%{?fedora} >= 13 %patch20 -p0 -b .no-add-needed~ %endif +%patch21 -p0 -b .debug-sra-be~ # This testcase doesn't compile. rm libjava/testsuite/libjava.lang/PR35020* @@ -1876,6 +1878,15 @@ fi %doc rpm.doc/changelogs/libmudflap/ChangeLog* %changelog +* Tue May 18 2010 Jakub Jelinek 4.4.4-4 +- update from gcc-4_4-branch + - PR fortran/44135 +- C++ -Wunused-but-set-variable fix (PR c++/44108) +- avoid C++ gimplification affecting mangling (#591635, PR c++/44148) +- asm goto fixes (PRs middle-end/44102, bootstrap/42347) +- VTA backports + - PRs debug/41371, debug/44112 + * Fri May 14 2010 Jakub Jelinek 4.4.4-3 - update from gcc-4_4-branch - PRs debug/43370, documentation/44016, fortran/44036, middle-end/43671, diff --git a/gcc44-debug-sra-be.patch b/gcc44-debug-sra-be.patch new file mode 100644 index 0000000..8f82f6d --- /dev/null +++ b/gcc44-debug-sra-be.patch @@ -0,0 +1,92 @@ +2010-05-18 Jakub Jelinek + + * dwarf2out.c (new_loc_descr_op_bit_piece): Add offset + argument. Don't use DW_OP_piece if offset is non-zero, + put offset into second DW_OP_bit_piece argument. + (dw_sra_loc_expr): Adjust callers. For memory expressions + compute offset. + +--- gcc/dwarf2out.c.jj 2010-05-15 08:09:16.000000000 +0200 ++++ gcc/dwarf2out.c 2010-05-18 15:49:26.000000000 +0200 +@@ -14364,12 +14364,12 @@ dw_loc_list_1 (tree loc, rtx varloc, int + if it is not possible. */ + + static dw_loc_descr_ref +-new_loc_descr_op_bit_piece (HOST_WIDE_INT bitsize) ++new_loc_descr_op_bit_piece (HOST_WIDE_INT bitsize, HOST_WIDE_INT offset) + { +- if ((bitsize % BITS_PER_UNIT) == 0) ++ if ((bitsize % BITS_PER_UNIT) == 0 && offset == 0) + return new_loc_descr (DW_OP_piece, bitsize / BITS_PER_UNIT, 0); + else if (dwarf_version >= 3 || !dwarf_strict) +- return new_loc_descr (DW_OP_bit_piece, bitsize, 0); ++ return new_loc_descr (DW_OP_bit_piece, bitsize, offset); + else + return NULL; + } +@@ -14448,7 +14448,7 @@ dw_sra_loc_expr (tree decl, rtx loc) + if (padsize > decl_size) + return NULL; + decl_size -= padsize; +- *descr_tail = new_loc_descr_op_bit_piece (padsize); ++ *descr_tail = new_loc_descr_op_bit_piece (padsize, 0); + if (*descr_tail == NULL) + return NULL; + descr_tail = &(*descr_tail)->dw_loc_next; +@@ -14461,7 +14461,46 @@ dw_sra_loc_expr (tree decl, rtx loc) + decl_size -= bitsize; + if (last == NULL) + { +- *descr_tail = new_loc_descr_op_bit_piece (bitsize); ++ HOST_WIDE_INT offset = 0; ++ if (GET_CODE (varloc) == VAR_LOCATION ++ && GET_CODE (PAT_VAR_LOCATION_LOC (varloc)) != PARALLEL) ++ { ++ varloc = PAT_VAR_LOCATION_LOC (varloc); ++ if (GET_CODE (varloc) == EXPR_LIST) ++ varloc = XEXP (varloc, 0); ++ } ++ do ++ { ++ if (GET_CODE (varloc) == CONST ++ || GET_CODE (varloc) == SIGN_EXTEND ++ || GET_CODE (varloc) == ZERO_EXTEND) ++ varloc = XEXP (varloc, 0); ++ else if (GET_CODE (varloc) == SUBREG) ++ varloc = SUBREG_REG (varloc); ++ else ++ break; ++ } ++ while (1); ++ /* DW_OP_bit_size offset should be zero for register ++ or implicit location descriptions and empty location ++ descriptions, but for memory addresses needs big endian ++ adjustment. */ ++ if (MEM_P (varloc) ++ && ((unsigned HOST_WIDE_INT) INTVAL (MEM_SIZE (varloc)) ++ * BITS_PER_UNIT) != bitsize) ++ { ++ unsigned HOST_WIDE_INT memsize ++ = INTVAL (MEM_SIZE (varloc)) * BITS_PER_UNIT; ++ if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN ++ && (memsize > BITS_PER_WORD || bitsize > BITS_PER_WORD)) ++ return NULL; ++ if (memsize < bitsize) ++ return NULL; ++ if (BITS_BIG_ENDIAN) ++ offset = memsize - bitsize; ++ } ++ ++ *descr_tail = new_loc_descr_op_bit_piece (bitsize, offset); + if (*descr_tail == NULL) + return NULL; + descr_tail = &(*descr_tail)->dw_loc_next; +@@ -14472,7 +14511,7 @@ dw_sra_loc_expr (tree decl, rtx loc) + the decl. */ + if (descr != NULL && decl_size != 0) + { +- *descr_tail = new_loc_descr_op_bit_piece (decl_size); ++ *descr_tail = new_loc_descr_op_bit_piece (decl_size, 0); + if (*descr_tail == NULL) + return NULL; + } diff --git a/import.log b/import.log index 1f80e29..c620a56 100644 --- a/import.log +++ b/import.log @@ -16,3 +16,4 @@ gcc-4_4_3-19_fc14:HEAD:gcc-4.4.3-19.fc14.src.rpm:1272396546 gcc-4_4_4-1_fc14:HEAD:gcc-4.4.4-1.fc14.src.rpm:1272658058 gcc-4_4_4-2_fc14:HEAD:gcc-4.4.4-2.fc14.src.rpm:1272918393 gcc-4_4_4-3_fc14:HEAD:gcc-4.4.4-3.fc14.src.rpm:1273873902 +gcc-4_4_4-4_fc14:HEAD:gcc-4.4.4-4.fc14.src.rpm:1274217418 diff --git a/sources b/sources index b147997..ecf79a9 100644 --- a/sources +++ b/sources @@ -1,2 +1,2 @@ 2659f09c2e43ef8b7d4406321753f1b2 fastjar-0.97.tar.gz -f0941df8a6d1e8a9443b56122c73be3f gcc-4.4.4-20100514.tar.bz2 +b7e838fc8d20ea7431118b45d6a7ecca gcc-4.4.4-20100518.tar.bz2